Download SERVICE MANUAL 5N11&5N07 CHASSIS - e-Rusu
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SERVICE MANUAL 5N11&5N07 CHASSIS Design and specifications are subject to change without prior notice. ( ONLY REFERRENCE) _____ ENGINEER BY: _____ CHECKED BY: PPROVED BY: _____ Contents Safety Notice--------------------------------------------------------2 Technical specification--------------------------------------------3-4 Chassis Block Diagram---------------------------------------------5 IC Block Diagram --------------------------------------------------6-12 Transistor mark ----------------------------------------------------13 Chassis wiring diagram --------------------------------------------14 PCB Top layer --------------------------------------------------15-17 Service Adjustments ---------------------------------------------18-21 Purity and Convergence Adjustment ---------------------------22 Control Location ---------------------------------------------------23 Input and Output Terminals----------------------------------------24 Operation Instructions---------------------------------------25-27 Mechanical Disassemblies---------------------------------------28 Cabinet parts List ---------------------------------------------------29 Circuit Diagram-----------------------------------------------------30 Safety Notice SAFETY PRECAUTIONS 1:An isolation transformer should be connected in the power line between the receiver and the AC line when a service is performed on the primary of the converter transformer of the set. 2:Comply with all caution and safety-related notes provided on the cabinet back, inside the cabinet, on the chassis or the picture tube. 3:When replacing a chassis in the cabinet, always be certain that all the protective devices are installed properly,such as,control knobs, adjustment covers or shields, barriers,isolation resistor-capacitor networks etc.. Before returning any television to the customer,the service technician must be sure that it is completely safe to operate without danger of electrical shock. X-RADIATION PRECAUTION The primary source of X-RADIATION in television receiver is the picture tube. The picture tube is specially constructed to limit X-RADIATION emissions. For continued X-RADIATION protection, the replacement tube must be the same type as the original including suffix letter. Excessive high voltage may produce potentially hazardous X-RADIATION. To avoid such hazards, the high voltage must be maintained within specified limit. Refer to this service manual, high voltage adjustment for specific high voltage limit. If high voltage exceeds specfied limits, take necessary corrective action. Carefully follow the instructions for +B1 volt power supply adjustment, and high voltage check to maintain the high voltage within the specified limits. PRODUCT SAFETY NOTICE Product safety should be considered when a component replacement is made in any area of a receiver. Components indicated by mark ! in the parts list and the schematic diagram designate components in which safety can be of special significance. It is particularly recommended that only parts designated on the parts list in this manual be used for component replacement designated by mark ! . No deviations fromresistance wattage or voltage ratings may be made for replacement items designated by mark ! . -2- -3- -4- -5- REMOTE KEY I C002 EEPROM I C205 A N5613 POWER N N5198 S3P8849 I C701 STV5348 I C201 IIC PRE-AMP I C001 TUNER +140V +24V +14V +70V (FOR STANDBY) I C301 T A8859 I C404 MSP3413 I C403 A N5891 SOUND SAW PICTURE SAW FBT Q302 T302 I C204 T A8427 CRT BOARD I C401 T A8256 +200V +12V 29V HEATER LH LV Chassis Block Diagram IC Block Diagram IC 001 (MULTI SYSTEM COLOR TV CPU) S3P8849 RESET P0.0 - P0.7 P1.0 - P1.7 Port 0 Port 1 INT0 - INT3 XIN XOUT Test SAM87 Bus Main Osc Timer A Port I/O and Interrupt Control OSC IN OSC OUT L-C Osc Timer 0 TO T0CK H-sync V-sync Vred Vgreen Vblue Vblank OSDHT ADC0 ADC1 ADC2 ADC3 OnScreen Display 24/32-KByte 4-Bit ADC PWM Block SAM87 CPU ROM 272-Byte Register File PWM Counter and Data Capture 14-Bit PWM CAPA PWM0 PWM1 SAM87 Bus Port 2 Port 3 P2.0 - P2.7 P3.0 - P3.1 -6- 8-Bit PWM PWM2 PWM3 PWM4 PWM5 -7- Test 1 50 SCL 2 PN/S SW R SW Y/R-Y Matrix CAPCI + ABC L + 4 G SW Y/G-Y Matrix 3 B SW G-Y Ys 5 Saturation B-Y 48 1H Delay Line R-Y 49 Y/B-Y Matrix 512bit EEPROM DAC/SW IIC BUS Interface Power On Reset 51 45 R-Y Amp 50/60Hz Detect De-emph R 6 G 7 B 8 R Clamp 9V Vcc1 (VCJ) 9 R 10 R Cut off Drive G Cut off G Clamp G Contrast R Contrast B Cut off Drive B Clamp B Contrast Tune Bell G 11 Killer2 (NTSC) IH FF 40 B 12 38 37 + 15 16 Delay Trap CV Clamp 36 + 17 QS Sync.Sep PCP SW Sync. Sep. Pedestal Clamp Black Expansion Sharpness S Vcc3 4.7V (DAC) SAW 18 IF Amp 19 VIF Detect Noise Inverter Video Amp 34 21 QIF Amp VCO SIF fs Detect Amp 29 23 AFT 24 + 25 SIF Detect IF AGC EXT Video/Cin QAGC QSS SW VCXO 28 Limiter SIF SW Pre-Amp RFAGC AFT Out out 22 30 Tune Q Det RF AGC APC Trap GND QSS (IF) in 20 IF AGC 31 Deemphasis ASW 32 VIF Lock Det Phase Shift VCO 33 SIF in Vcc1 9V (Chroma) Audio monitor Buffer Black Level VIF DeEXT Det out Det out Audio out Audio in emphasis VSW 35 Video out 9V Vcc1 4.43MHz SECAM (IF) SECAM PLL ref Bell ref 14 VCXO (4.43MHz) BPF P N APC ACC Amp ACC Det VCXO (3.58MHz) Tint B-Y Demod Tune Hor. Lock Det CSW Ver. Sync Sep SCP GND (VCJ) 13 39 Yin Ver. Sync in Hor. Sync Sep CW Generate R-Y Demod +/- BGP HVBLK HBLK Killer1 (PAL) Ident Hor. Count down Killer3 (SECAM) Amp Ident Brightness VCO Limiter Hor. Out AFC1 41 H Vcc Vcc2 6.3V Hor. Reg. HVCO AFC2 42 H out 43 Contrast SECAM Demod 44 B-Y I H Amp FF Ver Count down Ver. Out 46 Pedestal Adjust 47 AFC1 Saw Tooth Decoupling 9V 9V - 26 BPF 27 VAFC BPF SW Q Det out Exta BPF (exp.5.74MHz) IC 201 (MULTI 52 V DD1 SV S C P (CMOS) Vss Ver.AGC CW out (CMOS) X-ray FBP in S D A V out Hor. Sync 9V 3.58MHz in IC Block Diagram SYSTEM COLOR TV SIGNAL PROCESSOR) Nn5198 IC Block Diagram IC403(AN5891) [Application Circuit] Rin Vcc 0.68u 0.1u 10u + 10u + + + 10n 10u + 24 22 RIN 23 MODE V cc Control SDA SCL Rout 21 V ref 20 BB 19 RB 10u + 10u + 10u + 18 RT 17 BLD 16 15 14 ROUT SDA TD + 10u + + 33n 10u PF3 5 39n 15n PF4 GND 6 7 LT 8 10n 33n LB 9 BD 10 VD LOUT 12 11 + 220k PF2 4 + + LIN 3 Balance /MUTE 2.2k + AGC 2 PFI 1 Tone Control SURR + + AGC Volume Control 13 SCL 0.1u 10u 10u 10u Lout Lin [ Application Circuit to get L + R output instead of Super Bass Boos]t Vcc 10u + Rin L+R Out 0.1u 10u + 10u + 10u + + 10n 24 23 MODE V cc Control 22 RIN 21 V ref 20 BB 19 RB Rout SDA SCL 10u + 10u + 10u + 18 RT 17 BLD 16 15 14 TD ROUT SDA + 10u + + 33n 10u PF2 4 PF3 5 39n 15n PF4 GND 6 7 33n LT 8 10n LB 9 BD 10 VD LOUT 12 11 + 220k LIN 3 + + AGC 2 Balance /MUTE 2.2k + PFI 1 Tone Control SURR + + AGC Volume Control 13 SCL 0.1u 10u 10u 10u Lout Lin -8- IC Block Diagram IC404(MSP3413) -9- IC Block Diagram IC301(TA8859) + + 16 TRIGER IN 13 15 14 RAMP PULSE GENE 12 TRIGER AGC PARABOLA CORRECT 11 10 ETH CRCT S CORRECT ETH CRCT + 1 2 + 4 3 EW DRIVE ETH INPUT V CC 9 BUS INTERFACE LINEARITY CORRECT CORRECT NC BUS CONTROL LINE SCL SDA 5 EW FEED BACK 6 7 V NC FEED BACK 8 V DRIVE IC601 <POWER > STR-G6456 4 VIN 1 D START O.V.P LATCH DRIVE 2 REG. T.S.D + Vth(1) O.S.C Comp1 S 5 O.C.P/F.B + Vth(2) Comp2 3 GND -10- IC Block Diagram IC401(TA8256) + - - + 6 Ripple Filter 4k + AMP 1 - 4 9 OUT1 8 30k INPUT1 Vcc + RL V18 Pre-GND 2.1V 20k 350 3 PW-GND10 20k 350 RL INPUT2 - + INPUT3 - + 1 OUT2 AMP 2 + 4k 12 + - 30k 2 + 30k 4k 350 + AMP 3 20k OUT3 + RL 5 7 MUTE T C -+ MUTE SW MUTE 11 MUTE OFF IC205(AN5613)<YUV>(Option) Vcc 18 17 R-Y 16 15 B-Y 14 12 13 R-Y 1 2 Y Pedestal Clamp 3 4 5 Pedestal Clamp Pulse -11- 10 Pedestal Clamp G-Y Color Matrix Control Picture Contrast Control GND 11 6 BLK Pulse G-Y B-Y R , G ,B Matrix Blanking 7 8 9 R G B IC Block Diagram IC701(STV5348)<TELETEXT>(Option) 0.1uF 0.1uF +5V +5V 1uF +5V SL MA + - 1 CVBS CBLK 28 2 MA/SL TEST 27 3 V DDA V SSA 26 4 POL V SSO 25 S T 6 FFB V 7 V 5 8 R 3 9 G 4 10 B 11 RGB REF 8 C1 XTI 24 5 STTV/LFB XTO 23 3.9k 1k 20 19 18 SDA 17 13 COR SCL 16 Y 15 14 ODD/EVEN D613<PHOTO TRANSISTOR> TLP621 TLP621 1 4 2 3 -12- TV VCR/TV 21 12 BLAN 1:ANODE 2:CATHODE 3:EMITTER 4:COLLECTOT +5V 13.875MHz V DDD 22 SSD +5V 0.1uF C2 VCR 47k +5V 1uF10nF Transistor Mark E C NPN NPN E C B B E C B NPN B E C L7812 A1499 B E C C27 17 B C22 16 E C NPN C21 20 B E C B PNP B42 0 B77 4 A1015 E C B B E C PNP PNP E C B PNP C18 15 C2230 E C B NPN B42 1 A10 13 E C NPN C27 03 NPN C24 82 PNP L7805 C5148 INPUT B C GND E B E C L7809 Se140 INPUT Vout SENSE OUTPUT GROUND OUTPUT GND COLLECTOR -13- INPUT OUTPUT GND Chassis wiring diagram -14-