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172PIN DDR2 400 Micro-DIMM 512MB With 32Mx16 CL3 TS512MPA0512U Description Placement The TS512MPA0512U is a 64M x 64bits DDR2-400 Micro-DIMM. The TS512MPA0512U consists of 8pcs 32Mx16bits DDR2 SDRAMs in 84 ball FBGA packages and a 2048 bits serial EEPROM on a 172-pin printed circuit board. The TS512MPA0512U is available as non-ECC module in 2-row 64Mx64 organization and is intended for mounting into 172-pin edge connector sockets. C B A Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible D on both edges of DQS. Range of operation frequencies, E programmable latencies allow the same device to be F H G useful for a variety of high bandwidth, high performance memory system applications. PCB: 09-2420 Features • RoHS compliant products. • JEDEC standard 1.8V ± 0.1V Power supply • VDDQ=1.8V ± 0.1V • Max clock Freq: 200MHZ; 400Mb/s/Pin. A • Posted CAS B 44.50 1.752 • Programmable CAS Latency: 3,4,5 C 42.50 1.673 • Programmable Additive Latency :0, 1,2,3 and 4 D 1.00 0.039 • Write Latency (WL) = Read Latency (RL)-1 E 2.75± 0.10 0.108± 0.004 • Burst Length: 4,8(Interleave/nibble sequential) F 15.00 0.591 • Programmable sequential / Interleave Burst Mode G 30.00± 0.20 0.984± 0.008 • Bi-directional Differential Data-Strobe (Single-ended H 0.80 ± 0.10 0.031 ± 0.004 Dimensions Side data-strobe is an optional feature) • Off-Chip Driver (OCD) Impedance Adjustment • MRS cycle with address key programs. • On Die Termination • Serial presence detect with EEPROM Transcend Information Inc. Millimeters 45.50 ± 0.20 1.791 ± 0.008 (Refer Placement) 1 Inches
