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Preface Computer T890M Service Manual Preface I Preface Notice The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Preface Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version 1.0 October 2009 Trademarks Windows® is a registered trademark of Microsoft Corporation. Other brand and product names are trademarks and/or registered trademarks of their respective companies. II Preface About this Manual This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the T890M series computer. The following information is included: Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Preface Appendix A, Part Lists Appendix B, Schematic Diagrams III Preface IMPORTANT SAFETY INSTRUCTIONS Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment: Preface 1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool. 2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning. 3. Do not use the telephone to report a gas leak in the vicinity of the leak. 4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. Check with local codes for possible special disposal instructions. 5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19V, 1.58A or 19V, 1.57A (30 Watts) minimum AC/DC Adapter. CAUTION TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER, TELECOMMUNICATION LINE CORD IV Preface Instructions for Care and Operation The computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions: 1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged. • • Do not place it on an unstable surface. Do not place anything heavy on the computer 2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. • • • Do not expose it to excessive heat. Do not leave it in a place where foreign matter or moisture may affect the system. Don’t store the computer in a humid environment. 3. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data. • • • • Preface 4. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer. 5. Take care when using peripheral devices. • • Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices. V Preface Power Safety The computer has specific power requirements: Power Safety Warning Preface Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. VI • • • • • • Only use a power adapter approved for use with this computer. Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies. Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord. Preface Battery Precautions • Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. • Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. • Recharge the batteries using the computer’s system. Incorrect recharging may make the battery explode. • Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. • Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. • Keep the battery away from metal appliances. • Affix tape to the battery contacts before disposing of the battery. • Do not touch the battery contacts with your hands or metal objects. Battery Guidelines Preface The following can also apply to any backup batteries you may have. • If you do not use the battery for an extended period, then remove the battery from the computer for storage. • Before removing the battery for storage charge it to 60% - 70%. • Check stored batteries at least every 3 months and charge them to 60% - 70%. Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste officials for details in your area for recycling options or proper disposal. Caution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions. Battery Level Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10% will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week. VII Preface Related Documents You may also need to consult the following manual for additional information: Preface User’s Manual on CD This describes the computer’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the computer. VIII Preface Contents Schematic Diagrams................................. B-1 Overview .........................................................................................1-1 System Specifications .....................................................................1-2 External Locator - LCD Panel View ...............................................1-4 External Locator - Top & Right side Views ...................................1-5 External Locator - Left Side & Bottom View .................................1-6 External Locator - Rear View .........................................................1-7 Mainboard Overview - Top (Key Parts) .........................................1-8 Mainboard Overview - Bottom (Key Parts) ....................................1-9 Mainboard Overview - Top (Connectors) .....................................1-10 Mainboard Overview - Bottom (Connectors) ...............................1-11 System Block Diagram ...................................................................B-2 Clock Generator ..............................................................................B-3 Silverthorne, Thermal IC 1/2 ..........................................................B-4 Silverthorne 2/2 ..............................................................................B-5 Poulsbo 1/6 Host .............................................................................B-6 Poulsbo 2/6 VGA, LVDS, RTC .....................................................B-7 Poulsbo 3/6 USB, PATA/IDE ........................................................B-8 Poulsbo 4/6 DDR2 ..........................................................................B-9 Poulsbo 5/6 Power ........................................................................B-10 Poulsbo 6/6 VSS ...........................................................................B-11 DDR2 SO-DIMM .........................................................................B-12 CH7317 SDVO to CRT ................................................................B-13 LVDS Conn, LCD Power, CRT ...................................................B-14 SDIO, Mini Card, B/T, CCDI .......................................................B-15 New Card Socket ..........................................................................B-16 JMH 330 SATA ............................................................................B-17 PCI-E LAN RTL8102E ................................................................B-18 Audio Codec ALC269 QFN .........................................................B-19 Touch Panel Control .....................................................................B-20 USB2.0, GSensor, GPS, RFID .....................................................B-21 TO SW, Barcode Conn .................................................................B-22 Hotkey Board ................................................................................B-23 KBC-ITE IT8513E & BIOS .........................................................B-24 VDD5, VDD3 ...............................................................................B-25 System VS Power .........................................................................B-26 VCCNB, 1.5V, 1.05VS, M_BTN .................................................B-27 1.8V, 0.9VS ..................................................................................B-28 VCORE .........................................................................................B-29 AC-In, Charger .............................................................................B-30 Disassembly ...............................................2-1 Overview .........................................................................................2-1 Maintenance Tools ..........................................................................2-2 Connections .....................................................................................2-2 Maintenance Precautions .................................................................2-3 Disassembly Steps ...........................................................................2-4 Removing the Battery ......................................................................2-5 Removing the Hard Disk Drive .......................................................2-6 Removing the System Memory (RAM) ..........................................2-8 Removing the Wireless LAN Module .............................................2-9 Removing the Bluetooth Module ..................................................2-10 Part Lists ..................................................A-1 Part List Illustration Location ........................................................ A-2 MB with RFID ............................................................................... A-3 Back Cover ..................................................................................... A-4 LCD with Barcode Reader ............................................................. A-5 LCD without Barcode Reader ........................................................ A-6 IX Preface Introduction ..............................................1-1 Preface Preface Fingerprint Board ......................................................................... B-31 USB Board ................................................................................... B-32 X Introduction Chapter 1: Introduction Overview This manual covers the information you need to service or upgrade the T890M series computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer. Operating systems (e.g. Windows XP, Windows Vista, etc.) have their own manuals as do application software (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. 1.Introduction The T890M series is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the “” symbol. The balance of this chapter reviews the computer’s technical specifications and features. Overview 1 - 1 Introduction System Specifications Processor Options BIOS Card Reader/ExpressCard Intel® Atom Processor: One 8Mb SPI Flash ROM Phoenix™ BIOS Intel® US15W Integrated 5-in-1 Card Reader (SD/ Mini SD/ SDIO/ MMC/ RS MMC) Note: Mini SD/ SDIO/ RS MMC Cards require a PC adapter One ExpressCard 34 Slot 512K On-die L2 Cache, 533MHz FSB, FCBGA8 Package Z520 (1.33GHz), Z530 (1.60GHz), Z540 (1.86GHz) Core Logic Intel® US15W Chipset 1.Introduction LCD Options 8.9” WSVGA (1024 * 600) TFT LED Backlight LCD with Touch Panel (Stylus Pen & Finger Sensitivity) - Factory Option 8.9” WSVGA (1024 * 600) TFT LED Backlight LCD with Touch Panel (Stylus Pen & Finger Sensitivity) (Sunlight Readable with Brightness at least 350 nits) - Factory Option Drop Protection G-Sensor Software HDD Drop Protection from 40cm when system is powered on Shock Mounted HDD Drop protection from 120cm when system is powered off Storage Shock Mounted Hard Disk Drive SATA 2.5" HDD or SATA Solid State Drive (Factory option) Single Level Cell Audio Intel® High Definition Audio Built-In Microphone 2 * Built-In Speakers (1.5W) Communication Built-In 10M/100Mb Base-TX Ethernet LAN Bluetooth 2.1 + EDR (Enhanced Data Rate) Module 802.11b/g Wireless LAN Mini-Card Module with USB interface GPS Module (Factory Option) HF RFID Reader (Factory Option) Security Security (Kensington® Type) Lock Slot Fingerprint ID Reader Module BIOS Password Memory Button Keys One 200 Pin SO-DIMM Socket Supporting DDRII (DDR2) 553MHz Memory Expandable up to 2GB 5 Directional Key Buttons (Camera, Zoom, Page Up, Page Down & Menu) Supports Wake on LAN Interface Power Two USB 2.0 Ports One External Monitor Port One Headphone-Out Jack One Microphone-In Jack One RJ-45 LAN Jack One Docking Connector One DC-In Jack Full Range AC/DC Adapter AC input 100 - 240V, 50 - 60Hz, DC Output 19V, 1.58A or 19V, 1.57A (30 Watts) Li-Polymer 6600mAH Battery Pack Energy Star 5.0 Hot Swap Design Battery Gauge Indicator Battery Life Around 10 Hours Video Adapter Intel® US15W Integrated Video (Intel® Graphics Media Accelerator 500) Video Camera 2M Pixel Video Camera Module with USB Interface 1 - 2 System Specifications Power Management Introduction Operating System Factory Options Windows® Vista Home Basic 32bit (with Service Pack 2) Windows® XP (with Service Pack 3) GPS Module Bluetooth 2.1 + EDR (Enhanced Data Rate) Module HF RFID Reader 8.9” WSVGA (1024 * 600) TFT LED Backlight LCD with Touch Panel (Stylus Pen & Finger Sensitivity) 8.9” WSVGA (1024 * 600) TFT LED Backlight LCD with Touch Panel (Stylus Pen & Finger Sensitivity) (Sunlight Readable with Brightness at least 350 nits) Environmental Spec Temperature Operating: Non-Operating: Relative Humidity Operating: Non-Operating: 5°C - 35°C -20°C - 60°C 20% - 80% 10% - 90% 1.Introduction Dimensions & Weight 239mm (w) * 190mm (d) * 30mm (h) Around 1.5 kg With Battery Indicators Power/ Suspend/ Battery/ HDD Battery Gauge Optional USB to RS232 Cable Docking Station (Power Charge and USB * 4) Input 12V-24Vdc, Output 19V Car Adapter, 60W Shoulder Strap/Carrying Handle/Hand Holder Charger Box One External 12.7 mm Combo/Super Multi USB Optical Device Drive System Specifications 1 - 3 Introduction Figure 1 External Locator - LCD Panel View 1.Introduction LCD Panel View 1. Built-In Microphone 2. LED Indicators 3. LCD Touch Panel Screen 4. Speakers 5. Fingerprint Reader 6. 5 Function Buttons 7. Protective Surround 1 2 7 7 3 4 4 5 6 1 - 4 External Locator - LCD Panel View Introduction External Locator - Top & Right side Views Figure 2 Front Views 1 2 1 3 4 1. Strap Holders (for Carrying Strap) 2. Power Button 3. RFID (Radio Frequency Identification) Reader (Factory Option) 4. RJ-45 LAN Jack 5. 1 * USB 2.0 Ports 5 Right Side Views 4 1 2 3 1 2 5 1. Headphone-Out Jack 2. External Monitor Port 3. Card Reader Cover 4. ExpressCard 34 Slot (see below) 5. 5-in-1 Card Reader External Locator - Top & Right side Views 1 - 5 1.Introduction Figure 3 Introduction External Locator - Left Side & Bottom View Figure 4 Left Side View 1. Security Lock Slot 2. Stylus Pen & Holder 3. DC-In Jack 4. 1 * USB 2.0 Port 1 3 1.Introduction 2 Figure 5 Bottom View 1 - 6 External Locator - Left Side & Bottom View 4 1 2 3 4 Introduction External Locator - Rear View Figure 6 Rear View 2 1 1. 2. 3. 3 3 5. 6. 5 6 Overheating To prevent your computer from overheating make sure nothing blocks the vent/fan intakes while the computer is in use. External Locator - Rear View 1 - 7 1.Introduction 4 4. Built-In PC Camera GPS Active Aerial Socket (for optional Active Aerial) Protective Surround Stylus Pen & Holder Battery Gauge Battery Introduction Figure 7 Mainboard Overview - Top (Key Parts) 1.Introduction Mainboard Top Key Parts 1. Intel Atom CPU 2. Memory Slots DDR2 SO-DIMM 3. System Controller Hub 4. Super I/O 5. Transformer 6. Card Reader Socket 7. Mini-Card Connector (WLAN Module) 1 2 3 7 6 4 1 - 8 Mainboard Overview - Top (Key Parts) 5 Introduction Mainboard Overview - Bottom (Key Parts) Figure 8 Mainboard Bottom Key Parts 1. ExpressCard Connector 2. KBC ITE IT8513E 1.Introduction 2 1 Mainboard Overview - Bottom (Key Parts) 1 - 9 Introduction Figure 9 Mainboard Overview - Top (Connectors) 1.Introduction Mainboard Top Connectors 1. Second Bridge Battery Cable Connector 2. USB Cable Connector 3. CCD Cable Connector 4. GPS Cable Connector 5. Bluetooth Cable Connector 6. CMOS Battery Cable Connector 7. Microphone Cable Connector 8. BarCode Reader Cable Connector 9. LVDS Cable Connector 10. Speaker Cable Connector 10 1 1 - 10 Mainboard Overview - Top (Connectors) 9 2 8 6 3 4 5 7 Introduction Mainboard Overview - Bottom (Connectors) Figure 10 Mainboard Bottom Connectors 1. HDD Connector 2. Function Button Cable Connector 3. Docking Cable Connector 2 3 1.Introduction 1 Mainboard Overview - Bottom (Connectors) 1 - 11 1.Introduction Introduction 1 - 12 Disassembly Chapter 2: Disassembly Overview This chapter provides step-by-step instructions for disassembling the T890M series computer’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. Information A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar. Warning Overview 2 - 1 2.Disassembly Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are repeated here for your convenience. Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too). Maintenance Tools The following tools are recommended when working on the computer: 2.Disassembly • • • • • • M3 Philips-head screwdriver M2.5 Philips-head screwdriver (magnetized) M2 Philips-head screwdriver Small flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap Connections Connections within the computer are one of four types: 2 - 2 Overview Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start. Disassembly Maintenance Precautions The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions: Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. Cleaning Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer. Overview 2 - 3 2.Disassembly 1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. 2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. 3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). 4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. 5. Be careful with power. Avoid accidental shocks, discharges or explosions. •Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. •When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. 6. Peripherals – Turn off and detach any peripherals. 7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. 8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. 9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer. Disassembly Disassembly Steps The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM THE DISASSEMBLY STEPS IN THE ORDER INDICATED. To remove the Battery: 1. Remove the battery page 2 - 5 To remove the HDD: 2.Disassembly 1. Remove the battery 2. Remove the HDD page 2 - 5 page 2 - 6 To remove the System Memory: 1. Remove the battery 2. Remove the HDD 3. Remove the system memory page 2 - 5 page 2 - 6 page 2 - 8 To remove the Wireless LAN Module: 1. Remove the battery 2. Remove the HDD 3. Remove the wireless LAN page 2 - 5 page 2 - 6 page 2 - 9 To remove the Bluetooth Module: 1. Remove the battery 2. Remove the HDD 3. Remove the Bluetooth 2 - 4 Disassembly Steps page 2 - 5 page 2 - 6 page 2 - 10 Disassembly Removing the Battery 1. 2. 3. 4. Turn the computer off, and turn it over. Loosen the screws 1 - 4 . Remove the battery bay cover 65 . Lift the battery 67 in the direction of the arrow 6 out of the computer. a. Battery Removal a. Loosen the screws. b. Remove the battery bay cover. c. Lift the battery out of the bay as indicated. b. 3 1 2.Disassembly 2 c. Figure 1 5 4 6 7 5. Battery Bay Cover 7. Battery Removing the Battery 2 - 5 Disassembly Removing the Hard Disk Drive Figure 2 HDD Assembly Removal a. Remove the screw. b. Remove the rubber side case and screws. c. Remove the rubber top case. The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk. Hard Disk Upgrade Process 1. Turn off the computer, remove the battery (page 2 - 5). 2. Remove screws 1 - 10 and then remove the rubber side case 11 . 3. Remove screws 12 - 21 and then remove the rubber top case 22 . 2.Disassembly a. 7 b. 8 21 1 12 13 14 15 2 18 11 3 20 19 6 C. 5 11. Rubber Side Case 22. Rubber Top Case 16 17 4 10 • 20 Screws 2 - 6 Removing the Hard Disk Drive 9 22 11 Disassembly 4. Carefully lift the bottom case 24 as indicated by the arrow 23 . 5. Slide the hard disk assembly in the direction of the arrow 25 . 6. Lift the hard disk 26 off the computer. Figure 3 HDD Assembly Removal (cont’d.) d. d. Lift the bottom case off the computer. e. Slide the HDD as directed. f. Lift the HDD out of the computer. 24 23 2.Disassembly e. HDD System Warning New HDD’s are blank. Before you begin make sure: 25 You have backed up any data you want to keep from your old HDD. You have all the CD-ROMs and FDDs required to install your operating system and programs. f. 26 If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan to install. Copy these to a removable medium. 24. Bottom Case 26. HDD 7. Reverse the process to install any new hard disk (pay careful attention to the disk’s orientation in the case). Removing the Hard Disk Drive 2 - 7 Disassembly Figure 4 RAM Module Removal a. Pull the release latch(es). b. Remove the module. Removing the System Memory (RAM) The computer has one memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting DDR2 533MHz. The main memory can be expanded up to 2GB. The SO-DIMM modules supported are 1024MB, and 2048MB and DDRII Modules. The total memory size is automatically detected by the POST routine once you turn on your computer. Memory Upgrade Process 2.Disassembly 1. Turn off the computer, remove the battery (page 2 - 5) and harddisk (page 2 - 6). 2. Gently pull the two release latches ( 1 & 2 ) on the sides of the memory socket in the direction indicated by the arrows (Figure 4a). b. a. 1 Contact Warning Be careful not to touch the metal pins on the module’s connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the module’s performance. 3. RAM Module 3 2 3. The RAM module 3 will pop-up (Figure 4b), and you can then remove it. 4. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. 5. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE the module; it should fit without much pressure. 6. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 7. Secure the metal casing, replace the battery and restart the computer to allow the system to detect the hard disk drive. 8. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. 2 - 8 Removing the System Memory (RAM) Disassembly Removing the Wireless LAN Module 1. 2. 3. 4. Figure 5 Turn off the computer, remove the battery (page 2 - 5) and harddisk (page 2 - 6). Carefully disconnect cables 1 - 2 , then remove screw 3 from the module socket. The Wireless LAN module 4 will pop-up. Lift the Wireless LAN module up and off the computer. a. b. a. Disconnect the cable and remove the screw. b. The WLAN module will pop up to allow you to remove it. Note: Make sure you reconnect the antenna cable to “1” + “2” socket (Figure a). 4 3 1 2 4. WLAN Module • 1 Screw Removing the Wireless LAN Module 2 - 9 2.Disassembly 4 Wireless LAN Module Removal Disassembly Figure 6 Bluetooth Module Removal a. Remove the screw and disconnect the cable and connector. b. Lift the Bluetooth module up off the computer. Removing the Bluetooth Module 1. Turn off the computer, remove the battery (page 2 - 5) and harddisk (page 2 - 6). 2. Remove the screw 1 and disconnect the cable 2 & connector 3 from the module. 3. Lift the Bluetooth module 4 (Figure 6e) up and off the computer. a. b. 1 2.Disassembly 2 4 3 e. 4. Bluetooth Module • 1 Screw 2 - 10 Removing the Bluetooth Module Part Lists Appendix A: Part Lists This appendix breaks down the T890M series computer’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used. A.Part Lists Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers. A - 1 Part Lists Part List Illustration Location The following table indicates where to find the appropriate part list illustration. Table A- 1 Part List Illustration Location A.Part Lists Parts A - 2 Part List Illustration Location MB with RFID page A - 3 Back Cover page A - 4 LCD with Barcode Reader page A - 5 LCD without Barcode Reader page A - 6 Part Lists MB with RFID Figure A - 1 無鉛 無鉛 (華力)無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 (華力)無鉛 無鉛 藍天7 互億 無鉛 海華 無鉛 無鉛 鼎緯 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 MB with RFID A - 3 A.Part Lists MB with RFID Part Lists Back Cover A.Part Lists Figure A - 2 Back Cover 銘板 無鉛 銘板 無鉛 銘板 無鉛 無鉛 無鉛 無鉛 無鉛 (華力)無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 (華力)無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 (設變肉厚) 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 銘板 無鉛 無鉛 A - 4 Back Cover Part Lists LCD with Barcode Reader 保護膜 無鉛 無鉛 精乘 無鉛 無鉛 無鉛 Figure A - 3 LCD with Barcode Reader 無鉛 無鉛 無鉛 精乘 無鉛 精乘 無鉛 (紘立) 無鉛 無鉛 無鉛 無鉛 無鉛 (華力)無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 鴻富 無鉛 無鉛 強化玻璃 強化功能 (二合一) (三合一) 無鉛 無鉛 (華力)無鉛 (華力)無鉛 LCD with Barcode Reader A - 5 A.Part Lists 無鉛 Part Lists LCD without Barcode Reader 保護膜 無鉛 無鉛 A.Part Lists Figure A - 4 LCD without Barcode Reader 無鉛 精乘 無鉛 無鉛 無鉛 無鉛 ～ 無鉛 無鉛 精乘 無鉛 精乘 無鉛 (紘立)無鉛 無鉛 無鉛 無鉛 無鉛 (華力)無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 鴻富 無鉛 無鉛 嵩達 嵩達 強化玻璃 強化功能 (二合一) (三合一) A - 6 LCD without Barcode Reader 無鉛 無鉛 (華力)無鉛 (華力)無鉛 Schematic Diagrams Appendix B: Schematic Diagrams This appendix has circuit diagrams of the T890M computer’s PCB’s. The following table indicates where to find the appropriate schematic diagram. Diagram - Page Diagram - Page System Block Diagram - Page B - 2 CH7317 SDVO to CRT - Page B - 13 KBC-ITE IT8513E & BIOS - Page B - 24 Clock Generator - Page B - 3 LVDS Conn, LCD Power, CRT - Page B - 14 VDD5, VDD3 - Page B - 25 Silverthorne, Thermal IC 1/2 - Page B - 4 SDIO, Mini Card, B/T, CCDI - Page B - 15 System VS Power - Page B - 26 Silverthorne 2/2 - Page B - 5 New Card Socket - Page B - 16 VCCNB, 1.5V, 1.05VS, M_BTN - Page B - 27 Poulsbo 1/6 Host - Page B - 6 JMH 330 SATA - Page B - 17 1.8V, 0.9VS - Page B - 28 Poulsbo 2/6 VGA, LVDS, RTC - Page B - 7 PCI-E LAN RTL8102E - Page B - 18 VCORE - Page B - 29 Poulsbo 3/6 USB, PATA/IDE - Page B - 8 Audio Codec ALC269 QFN - Page B - 19 AC-In, Charger - Page B - 30 Poulsbo 4/6 DDR2 - Page B - 9 Touch Panel Control - Page B - 20 Fingerprint Board - Page B - 31 Poulsbo 5/6 Power - Page B - 10 USB2.0, GSensor, GPS, RFID - Page B - 21 USB Board - Page B - 32 Poulsbo 6/6 VSS - Page B - 11 TO SW, Barcode Conn - Page B - 22 DDR2 SO-DIMM - Page B - 12 Hotkey Board - Page B - 23 Table B - 1 Schematic Diagrams B.Schematic Diagrams Diagram - Page Version Note The schematic diagrams in this chapter are based upon version 6-7P-T8903-003. If your mainboard (or other boards) are a later version, please check with the Service Center for updated diagrams (if required). B - 1 Schematic Diagrams B.Schematic Diagrams System Block Diagram Sheet 1 of 31 System Block Diagram B - 2 System Block Diagram Schematic Diagrams Clock Generator Sheet 2 of 31 Clock Generator ? ? ? PULL HIGH , AND 0? ? CLOCK GENERATOR D02 1022 R2 4 3 1 .5 V S *1 0 K _ 0 4 R 2 40 F SL C C 29 2 C 3 10 C3 1 1 C2 5 2 C 2 78 C2 4 8 1 U _ 6 . 3 V _X 5R _ 04 .1 U_ 1 0 V _ X 7 R_ 0 4 . 1 U _ 10 V _ X 7 R _ 0 4 . 1 U _ 1 0V _X 7 R _ 04 . 0 1 U _ 5 0V _X 7R _ 04 .0 1 U_ 5 0 V _ X 7 R_ 0 4 10 U _6 . 3 V _ X 5 R _ 0 6 7 C L K _ REF _ SC H R 23 6 3 3 _1 % _ 0 4 C2 8 6 C 2 81 . 1 U _1 0 V _ X 7 R _ 0 4 C2 5 1 XI N _ C L K _ 1 4 _R C L K _ T E S T _ MO D E C L K _ TE S T_ S E L R2 4 4 C P U T 0_ L P R C P U C 0_ L P R 6 10 11 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD R E F _3 . 3 CO RE_ 1 .5 CO RE_ 1 .5 I O_ 1 . 5 I O_ 1 . 5 CO RE_ 1 .5 CO RE_ 1 .5 I O_ 1 . 5 I O_ 1 . 5 CO RE_ 1 .5 I O_ 1 . 5 RE F C P U T 1_ L P R C P U C 1_ L P R C P U T 2_ L P R C P U C 2_ L P R S R C T 0_ L P R S R C C 0_ L P R S R C T 1_ L P R S R C C 1_ L P R S R C T 2_ L P R S R C C 2_ L P R TE S T_ M OD E TE S T_ S E L F S C_ L F SB_ L 48 47 C L K _ C P U _ B C LK _R 1 C L K _ C P U _ B C LK #_ R 2 4 3 RN 3 4P 2R X 0_ 0 4 44 43 H _ C LK _R H _ C LK #_ R 1 2 4 3 RN 4 4P 2R X 0_ 0 4 39 38 I C S _C L K 2 I C S _C L K # 2 27 26 CL K _ P C IE _ IN_ R CL K _ P C IE _ IN# _ R 1 2 4 3 RN 7 4P 2R X 0_ 0 4 32 31 CL K _ P C IE _ S W _ R 1 CL K _ P C IE _ S W # _ R 2 4 3 RN 6 4P 2R X 0_ 0 4 35 34 C L K _ P C I E _ N C _R C L K _ P C I E _ N C #_ R 1 2 4 3 RN 5 4P 2R X 0_ 0 4 9 37 FSL C FSL B R 2 22 1 I C S _C P U S TP # 21 20 I C S _D R E F S S C L K I C S _D R E F S S C L K # 1 2 4 3 RN 9 4 P 2 R X 0 _0 4 17 16 I C S _D R E F C L K I C S _D R E F C L K # 1 2 4 3 RN 8 4 P 2 R X 0 _0 4 24 28 36 I C S _C L K _ S C H _O E # I C S _P C I E _ C L K R E Q # I C S _N C _ C LK R E Q # 4 3 X TA L_ I X TA L_ O CL K _ C P U_ B C L K 3 CL K _ C P U_ B C L K # 3 CL K _ S C H_ B C L K 5 CL K _ S C H_ B C L K # 5 0827 CL K _ PC IE_ IN 6 CL K _ P C IE _ IN# 6 CL K _ PC IE_ L A N 1 7 CL K _ P C IE _ L A N# 1 7 CPU Frequency Select Table FSLC FSLB CPU M HZ 0 0 133 0 1 166 1 0 100 1 1 200 3. 3V S CL K _ P C IE _ NC 1 5 CL K _ P C IE _ NC # 1 5 R2 1 0 0_04 *4 . 7 K _ 0 4 R2 1 7 0_04 P M_ S T P C P U # 7 * 10 m i l _s h o rt 12 13 2 SCL K _ 3 .3 SDAT A_ 3 .3 D OT 9 6 T_ L P R D O T9 6 C _ L P R C L K P W R GD # / P D I C S 9U MS 9 6 1 0 *C R # 0 *C R # 1 *C R # 2 X1 X2 0829 DR E F S S CL K 7 DR E F S S CL K # 7 DR E F C L K DR E F C L K# 7 7 R2 4 7 4 7 0 _0 4 CL K _ S C H_ O E # 7 R2 4 2 4 . 7K _0 4 R2 2 8 *1 M _1 % _ 0 4 7 18 19 25 33 40 45 49 G ND RE F GN D D OT GN D L C D G ND S RC GN D S R C G ND CP U GN D C P U G ND 2 8 CL K E N # 3 ,5 R 2 45 L C D 1 0 0 T_ L P R L C D 10 0 C _ L P R 7 , 1 1 , 15 S MB _ C L K 7 , 1 1 , 15 S MB _ D A TA C P U_ B S E L 2 U1 8 5 8 14 15 22 23 29 30 41 42 46 C PU_ ST O P# *1 0 m li _ s ho r t 1 .0 5 VS B.Schematic Diagrams C2 8 7 * 10 K _ 0 4 0_ 0 4 3 . 3V S 4. 7 U _6 . 3 V _ X 5 R _ 0 6 V C C _ C LK L30 H C B 1 6 0 8 K F -1 21 T 2 5 _0 6 1U _ 6. 3 V _ X 5 R _0 4 1 .5 V S R2 4 1 R2 3 8 X3 C2 5 4 * 47 0 _ 0 4 TP3 6 2 1 R3 8 2 3 4 4 . 7K _0 4 F S X 8 L_ 1 4 . 3 18 M H z C2 7 2 6 -2 2- 14 R3 1- 1B K 2 2 P _5 0 V _ N P O_ 0 4 Designs that utilize the CK540 or CK610 clock solution should directly connect the BSEL2 pin of the processor the clock chip and the IntelR SCH BSEL2 pin. The processor BSEL[1:0] pins can be left No Connect. In addition, the clock FS_B signal should be grounded since IntelR CentrinoR AtomTM will only support FSB frequencies at 100 MHz or 133 MHz. 22 P _ 5 0 V _ N P O _0 4 D02 1208 N C _ C LK R E Q # 15 R3 8 3 PLACE CRYSTAL WITHIN 500 MILS OF ICS9UMS9610 4 . 7K _0 4 D02 1107 HSX531S_14.318MHz D02 1015 1 .0 5 V S 1 .5 VS 3 .3 VS 3. . 5 , 7 , 9 , 2 5 , 26 4, 6 , 7 , 9 , 1 4 , 15 , 2 6 6, 7 , 9 , 1 1 . . 2 3, 2 5 , 2 6 , 2 8 Clock Generator B - 3 Schematic Diagrams Silverthorne, Thermal IC 1/2 5 H _ D # [ 6 3: 0 ] 5 H _A D S T B # 1 5 H_ PB E# 5 5 5 5 H _S T P C LK # H _I N T R H _N MI H _S M I # H _ A 2 0 M# H _ I GN N E # B5 A 12 D5 E 12 B9 A6 B 13 E 14 A 10 B7 D 13 A8 C4 A 14 B 11 D 11 G 30 J 28 H 27 K1 H 31 L 28 J 26 1 . 0 5V S _ C 6 R N2 8 P 4 R X 0 _0 4 1 8 2 7 3 6 4 5 Z 0 30 6 Z 0 30 7 Z 0 30 8 Z 0 30 9 A E 16 A F 17 A D 15 A D 17 D9 D7 E8 E 10 L 30 J 30 K 29 A [1 7 ]# A [1 8 ]# A [1 9 ]# A [2 0 ]# A [2 1 ]# A [2 2 ]# A [2 3 ]# A [2 4 ]# A [2 5 ]# A [2 6 ]# A [2 7 ]# A [2 8 ]# A [2 9 ]# A [3 0 ]# A [3 1 ]# A D S T B[1 ]# R R R R R R R R R R S V D7 S V D8 S V D9 S V D1 0 S V D0 S V D1 S V D2 S V D3 S V D4 S V D5 H_ BREQ # 0 5 H _I E R R # H _I N I T # P R O C H OT # T H R MD A TH R M D C 5 5 H _ D I N V # [ 3: 0 ] 5 H_ DS T B P # [3 : 0 ] 5 5 H _ D S TB N # [ 3 : 0] H_CPURST# 1" ~ 6.5" H _ LO C K # 5 H_ CP U RS T # 5 either stripline or microstrip routing is acceptable H_ RS # [2 :0 ] 5 5 H _ DS T B N# 0 5 H _ DS T B P # 0 5 H _ D I N V #0 5 H _ D # [ 6 3: 0 ] H _ TR D Y # 5 H _R S # 0 H _R S # 1 H _R S # 2 H_ HI T # H _ H I T M# F1 E2 F5 D3 E4 F7 L2 N2 M1 P1 J4 G2 6 B P M 0# B P M 1# B P M 2# B P M 3# P R DY # P R E Q# C P U_ X DP _ T CK C P U_ X DP _ T DI C P U_ X DP _ T DO C P U _ X D P _ T MS C P U_ X DP _ T RS T # H5 T5 U4 H _P R OC H O T# H _T H E R MD A H _T H E R MD C T1 5 5 1. 0 5 V S R 17 1 5 6 _ 1% _ 0 4 1 /1 6 W 5% 0402 1 .0 5 V S _ C6 Ot he r s wi tc hi ng si gn als s ho ul d b e at le as t 2 5 mi ls aw ay fr om GT LR EF R 15 9 1 K _ 1% _ 0 4 C L K _ C P U _B C L K 2 C L K _ C P U _B C L K # 2 C1 6 4 R 15 1 *. 1 U _ 1 0 V _X 5 R _ 0 4 2 K _ 1% _ 0 4 2, 5 1 0 0K _ 0 4 H H H H H H H H H H H H H H H H _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D # 16 # 17 # 18 # 19 # 20 # 21 # 22 # 23 # 24 # 25 # 26 # 27 # 28 # 29 # 30 # 31 AE2 4 A C2 4 A J2 0 AE2 0 A J2 2 AF2 5 A H2 5 A H2 3 A H1 9 AF2 3 AE1 8 A H1 7 A D1 9 A J2 4 A J1 8 AF1 9 AF2 1 A H2 1 AE2 2 G TL V R E F A J2 6 R 3 43 R 3 29 *1 K _ 0 4 *1 K _ 0 4 P3 1 T3 1 A C LK P H D CL K P H <0 .5 inc h Z 0 3 05 V2 7 AE2 6 C 1 56 R1 5 0 * . 1 U _ 10 V _ X 5 R _ 04 . H _ A 2 0 M# R1 6 6 * 0 _0 4 R3 0 M3 1 U2 8 Z 0 3 10 D D D D D D D D D D D D D D D D D D D [ 0] # [ 1] # [ 2] # [ 3] # [ 4] # [ 5] # [ 6] # [ 7] # [ 8] # [ 9] # [ 10 ] # [ 11 ] # [ 12 ] # [ 13 ] # [ 14 ] # [ 15 ] # S TB N [ 0 ] # S TB P [ 0] # INV[0 ]# D D D D D D D D D D D D D D D D D D D [ 16 ] # [ 17 ] # [ 18 ] # [ 19 ] # [ 20 ] # [ 21 ] # [ 22 ] # [ 23 ] # [ 24 ] # [ 25 ] # [ 26 ] # [ 27 ] # [ 28 ] # [ 29 ] # [ 30 ] # [ 31 ] # S TB N [ 1 ] # S TB P [ 1] # INV[1 ]# G TL R E F 1 K _ 04 O th er sw it ch ing s ig na ls s ho uld b e at le as t 25 m il s a wa y fr om CM RE F 1K _1 % _ 04 MISC TEST1 TEST2 D[3 2 ]# D[3 3 ]# D[3 4 ]# D[3 5 ]# D[3 6 ]# D[3 7 ]# D[3 8 ]# D[3 9 ]# D[4 0 ]# D[4 1 ]# D[4 2 ]# D[4 3 ]# D[4 4 ]# D[4 5 ]# D[4 6 ]# D[4 7 ]# D S TB N [ 2 ] # D ST B P[2 ]# DIN V [2 ]# D[4 8 ]# D[4 9 ]# D[5 0 ]# D[5 1 ]# D[5 2 ]# D[5 3 ]# D[5 4 ]# D[5 5 ]# D[5 6 ]# D[5 7 ]# D[5 8 ]# D[5 9 ]# D[6 0 ]# D[6 1 ]# D[6 2 ]# D[6 3 ]# D S TB N [ 3 ] # D ST B P[3 ]# DIN V [3 ]# C OM P [ 0 ] C OM P [ 1 ] C OM P [ 2 ] C OM P [ 3 ] DP R S T P # D PSL P# DP W R # P W R GO OD SL P# RS V D1 2 BSE L [0 ] BSE L [1 ] BSE L [2 ] AE8 A D7 A H1 5 AF9 A H9 AE1 0 A J 16 AF1 3 AF7 AF1 5 A H1 3 A J 14 A J 12 A H7 AJ 8 A J 10 A H1 1 AF1 1 AE1 2 H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D #3 2 #3 3 #3 4 #3 5 #3 6 #3 7 #3 8 #3 9 #4 0 #4 1 #4 2 #4 3 #4 4 #4 5 #4 6 #4 7 A H5 AB5 AJ 6 Y1 AF5 A G4 AF3 A C6 AE6 AE4 W4 A C2 AE2 A D1 AA2 A C4 AB1 AA4 Y5 H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D H_ D #4 8 #4 9 #5 0 #5 1 #5 2 #5 3 #5 4 #5 5 #5 6 #5 7 #5 8 #5 9 #6 0 #6 1 #6 2 #6 3 AE1 4 A D1 3 E1 6 F15 C P U _ C O MP 0 C P U _ C O MP 1 C P U _ C O MP 2 C P U _ C O MP 3 H _ DS T B N# 3 5 H _ DS T B P # 3 5 H _ D I N V #3 5 G2 G6 V3 1 G4 J2 K2 7 H H H H H R1 5 3 R1 5 2 R1 7 2 R1 7 3 _ D P R S TP # _ DP S L P # _ DP W R # _ P W RG D _ C P U S LP # 5 ,2 8 5 5 5 5 P M_ P S I # TP6 3 2 7 . 4_ 1 % _0 4 5 4 . 9_ 1 % _0 4 2 7 . 4_ 1 % _0 4 5 4 . 9_ 1 % _0 4 Layout note: Comp0,2 connect with Zo=27.4ohm, make trace length shorter than 0.5". Comp1,3 connect with Zo=55ohm, make trace length shorter than 0.5". CO MP[ 3: 0] t rac es s ho uld b e at le ast 2 5 mi ls (> 5 0 mil s pr efe rr ed ) awa y fr om an y ot her t og gl ing s ig na l. S IL VE RT HOR NE 1 .3 3GH Z / 1. 6G HZ D02 1 20 8 5 H _ DS T B N# 2 5 H _ DS T B P # 2 5 H _ D I N V #2 5 H _ D # [ 6 3: 0 ] 5 S I LV E R T H O R N E r ev 0. 8 D 9 73 3 0 -00 1 R1 6 7 1K _1 % _ 04 G2 8 U3 0 R S V D1 5 T EST 4 T EST 3 C MR E F [ 1 ] R S V D1 3 C P U _B S E L2 R1 5 8 Thermal IC D02 1009 3. 3 V V DD 3 R 3 24 1 0 K _ 04 1 .0 5 VS _ C6 D02 1204 H_ IE RR # R 36 1 5 6_ 1 % _0 4 H_ CP U S L P # R 37 7 1 K __ 0 4 R1 6 0 C 1 60 *1 0 0 K _ 04 1 U _6 . 3 V _ X 5R _0 4 C 4 6 9 1 5 0 U _ 4 V _B 2 R 32 5 D R 36 6 Y2 7 A H2 7 Y3 1 A C3 0 AE3 0 AF2 9 AA2 6 AB3 1 W30 A C2 8 A D3 1 AF2 7 A D2 7 A G2 8 AB2 5 A C2 6 AA2 8 AA3 0 AE2 8 1 . 0 5V S _C 6 A2 6 E6 1 .0 5 VS 1 0 0K _0 4 #0 #1 #2 #3 #4 #5 #6 #7 #8 #9 # 10 # 11 # 12 # 13 # 14 # 15 K3 1 VSS0 R S V D1 1 RS V D 6 NC D02 1210 R 36 5 _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D 5 H _ DS T B N# 1 5 H _ DS T B P # 1 5 H _ D I N V #1 0. 5" ma x le ngt h SIL VE RT HO RNE 1 .3 3G HZ /1. 6G HZ 3 .3 V H H H H H H H H H H H H H H H H P M_ T H R M T R I P # 5 P2 9 R2 8 B CL K[0 ] B CL K[1 ] 5 H_ INIT # E3 0 F2 9 B P M[ 0 ] # B P M[ 1 ] # B P M[ 2 ] # B P M[ 3 ] # P RDY # PREQ # TC K TD I T DO TM S T RS T # R S V D1 4 5 5 DATA GRP 2 CONT RO L H_ DE F E R # H_ DR DY # 5 H_ DB S Y # 5 C2 8 M5 D2 7 E2 8 E2 6 F2 5 T H E R M TR I P # S T P C LK # L I N T0 L I N T1 S M I# B2 7 W28 D2 9 H1 F3 1 HIT # H I TM # A 2 0 M# F E R R# I G NN E # H_ ADS# H_ BNR # H_ B P RI# D2 5 L OC K # S I LV E R T H O R N E re v 0. 8 D 9 73 3 0 -00 1 NE AR E C 3 .3 V R E Q[ 0 ] # R E Q[ 1 ] # R E Q[ 2 ] # R E Q[ 3 ] # R E Q[ 4 ] # C2 6 H2 5 G2 4 DATA GRP 3 H_ A# 1 7 H_ A# 1 8 H_ A# 1 9 H_ A# 2 0 H_ A# 2 1 H_ A# 2 2 H_ A# 2 3 H_ A# 2 4 H_ A# 2 5 H_ A# 2 6 H_ A# 2 7 H_ A# 2 8 H_ A# 2 9 H_ A# 3 0 H_ A# 3 1 B R0 # IE RR # INIT # R ESET # RS[0 ]# RS[1 ]# RS[2 ]# T RDY # XDP/ITP SIGNALS 25 23 20 24 21 DE F E R # D RDY # DB S Y # T HERM B D E A B Q# 0 Q# 1 Q# 2 Q# 3 Q# 4 AD S# B NR # B PR I# DAT A GRP 1 * 10 K _ 0 4 S D Z0 312 G Q2 0 2N 7 00 2 W H_ DP S L P # R 37 6 1 K __ 0 4 H _I N I T # R 3 64 1 K _ 1% _ 0 4 H_ DP R S T P # R 37 5 1 K __ 0 4 BPM 0 # R 3 62 *5 6 _ 04 H_ P W RG D R 34 2 3 90 _ 04 BPM 1 # R 3 70 *5 6 _ 04 H_ ST PCL K# R 33 4 *1 K _ 1% _ 0 4 D 11 C U8 23 E C _ A 2 0 M# G S B.Schematic Diagrams H_ RE H_ RE H_ RE H_ RE H_ RE A [3 ]# A [4 ]# A [5 ]# A [6 ]# A [7 ]# A [8 ]# A [9 ]# A [1 0 ]# A [1 1 ]# A [1 2 ]# A [1 3 ]# A [1 4 ]# A [1 5 ]# A [1 6 ]# A D S T B[0 ]# ADDR GROUP 1 Sheet 3 of 31 Silverthorne, Thermal IC 1/2 H _A # [ 3 1 : 3] 22 22 21 24 17 18 23 16 18 15 19 20 17 15 19 DAT A GRP 0 5 H _A D S T B # 0 H _R E Q# [ 4 : 0 ] E A D E B A B A E D B A D B D H _ D # [ 6 3: 0 ] U 2 8B U 2 8A H_ A# 3 H_ A# 4 H_ A# 5 H_ A# 6 H_ A# 7 H_ A# 8 H_ A# 9 H_ A# 1 0 H_ A# 1 1 H_ A# 1 2 H_ A# 1 3 H_ A# 1 4 H_ A# 1 5 H_ A# 1 6 ADDR GROUP 0 5 5 H _A # [ 3 1 : 3] H CLK 5 Q 19 2 N 7 0 0 2W 1 2 H _T H E R M D A V DD D+ T HE R M A L ERT 4 6 S C S 7 5 1 V -40 A P M_ T H R M# 7 T H E R M_ A L E R T # 23 Z 03 0 4 TP3 1 C1 5 5 BPM 2 # Pla ce N ea r C PU R 1 80 *5 6 _ 04 BPM 3 # R 3 68 *5 6 _ 04 C P U _X D P _T M S R 34 1 3 9_ 0 4 PR DY # R 3 69 *5 6 _ 04 C P U _X D P _T D I R 33 2 1 50 _ 1% _ 0 4 P RE Q # R 1 81 5 6_ 1 % _0 4 C P U _X D P _T D O R 33 3 *5 6 _0 4 H _I G N N E # R 1 69 1 K _ 1% _ 0 4 H _A 2 0 M# R 3 63 1 K _ 1% _ 0 4 H _P B E # R 1 70 5 6_ 1 % _0 4 P lac e Ne ar CP U L 1 b et we en 0. 05 " an d 0 .1 5" P ull h ig h 56? 1 . 0 5V S P M _ TH R M TR I P # R 3 40 Pl ace N ea r CPU If L1 i s be twe en 0 .0 5" an d 0. 15" , th en RS S ca n b e re mo ved a nd RT T c an b e rep la ce d wit h a 56 -O ? 5% p ull -u p re sis to r B - 4 Silverthorne, Thermal IC 1/2 5 6_ 1 % _0 4 JTAG Interface Guidelines When ITP/XDP is not Implemented TCK 27 O ? % pull-down to GND TDI 150 O ? % pull-up to VCCPC6 TMS 39 O ? % pull-up to VCCPC6 TRST# 510 O to 680 O ? % pull-down to GND C P U _X D P _T R S T# R 35 4 6 80 _ 04 C P U _X D P _T C K R 35 0 2 7_ 0 4 H _T H E R M D C . 0 0 1U _5 0 V _ X 7R _0 4 3 5 DGN D S DA T A S CL K A D M 1 03 2 A R M Layout Note: Route H_THERMDA and H_THERMDC on same layer. 10 mil trace on 10 mil spacing. 7 8 S M D_ T HER M 2 3 S M C_ T HER M 2 3 R 1 55 4 . 7K _ 0 4 R 1 54 4 . 7K _ 0 4 Layout Note: Close to Thermal IC ADM1032 1000p F75383M 2200p V DD 3 V DD3 6 , 7 , 1 4, 2 0 , 2 2. . 2 5 , 2 9 1 . 0 5 V S _ C 6 4 , 25 3 .3 V 7 , 9 , 1 3. . 1 5 , 1 7. . 1 9 , 2 1 , 23 , 2 5 . . 27 1 .0 5 VS 2 , 4 , 5 , 7, 9 , 2 5 , 26 Schematic Diagrams Silverthorne 2/2 1 .0 5 VS 1 .0 5 VS_ C 6 V CO RE U 28D VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS S1 / S2 / S4 S5 S6 S7 S8 S9 S1 0 S1 1 S1 2 S1 3 S1 4 S1 5 S1 6 S1 7 S1 8 S1 9 S2 0 S2 1 S2 2 S2 3 S2 4 S2 5 S2 6 S2 7 S2 8 S2 9 S3 0 S3 1 S3 2 S3 3 S3 4 S3 5 S3 6 S3 7 S3 8 S3 9 S4 1 S4 2 S4 5 S4 6 S4 8 S4 9 S5 1 S5 2 S5 3 S5 4 S5 5 S5 6 S5 7 S5 8 S5 9 S6 0 S6 1 S6 2 S6 3 S6 4 S6 5 S6 6 S6 7 S6 8 S6 9 S7 0 S7 1 S7 2 S7 3 S7 4 S7 5 S7 6 S7 7 S7 8 S7 9 S8 0 S8 1 S8 2 S8 3 S8 4 U2 8 C N CT F N CT F / N CT F / N CT F / N CT F / / / / / / / / N N N N N N N N CT F CT F CT F CT F CT F CT F CT F CT F / N CT F / N CT F / N CT F V S S 16 2 V S S 16 1 V S S 16 0 V S S 15 9 V S S 15 8 V S S 15 7 V S S 15 6 V S S 15 5 V S S 15 4 V S S 15 3 V S S 15 2 V S S 15 1 V S S 14 9 V S S 14 8 V S S 14 7 V S S 14 6 V S S 14 5 V S S 14 4 V S S 14 3 V S S 14 2 V S S 14 1 V S S 14 0 V S S 13 9 V S S 13 8 V S S 13 7 V S S 13 6 V S S 13 5 V S S 13 4 V S S 13 3 V S S 13 2 V S S 13 1 V S S 13 0 V S S 12 9 V S S 12 8 V S S 12 7 V S S 12 6 V S S 12 5 V S S 12 4 V S S 12 3 V S S 12 2 V S S 12 1 V S S 12 0 V S S 11 9 V S S 11 8 V S S 11 7 V S S 11 6 V S S 11 5 V S S 11 4 V S S 11 3 V S S 11 2 V S S 11 1 V S S 11 0 V S S 10 9 V S S 10 8 V S S 10 7 V S S 10 6 V S S 10 5 V S S 10 4 V S S 10 3 V S S 10 2 V S S 10 1 V S S 10 0 VSS9 9 VSS9 8 VSS9 7 VSS9 6 VSS9 5 VSS9 4 VSS9 3 VSS9 2 VSS9 1 VSS9 0 VSS8 9 VSS8 8 VSS8 7 VSS8 6 VSS8 5 Y2 9 Y2 5 Y2 3 Y2 1 Y1 9 Y1 7 Y1 5 Y1 3 Y1 1 Y9 Y7 Y3 W6 V2 9 V2 5 V2 3 V2 1 V1 9 V1 7 V1 5 V1 3 V1 1 V9 V7 V5 V3 T2 9 T2 7 T2 5 T2 3 T2 1 T1 9 T1 7 T1 5 T1 3 T1 1 T9 T7 T3 P2 7 P2 5 P2 3 P2 1 P1 9 P1 7 P1 5 P1 3 P1 1 P9 P7 P3 N2 8 M2 9 M2 5 M2 3 M2 1 M1 9 M1 7 M1 5 M1 3 M1 1 M9 M7 M3 L6 K2 5 K2 3 K2 1 K1 9 K1 7 K1 5 K1 3 K1 1 K9 K7 K3 J2 4 S I L V E R T H O R N E re v 0. 8 D 9 7 3 30 -0 0 1 S I LV ER T HO RN E 1 .3 3 GH Z / 1 .6 GH Z AA1 4 J16 R 163 *1 0 m i _l s h o rt C 179 . 1 U_ 1 0 V _ X 7 R_ 0 4 C 197 . 1 U_ 1 0 V _ X 7 R_ 0 4 C P U_ V C C P V CC P 3 5 V CC P 3 6 M2 7 V CC P C 6 0 H7 H9 J8 V CC P C 6 1 V CC P C 6 2 V CC P C 6 3 1 .0 5 VS_ C 6 C 1 62 C1 9 6 C 16 1 1 U _6 . 3 V _ X 5 R _0 4 1U _ 6 . 3 V _ X 5R _ 0 4 *1 U _ 6 . 3 V _ X 5R _ 0 4 C1 6 3 C 19 5 . 1U _ 1 0 V _ X 7R _ 0 4 . 1 U _1 0 V _ X 7 R _ 0 4 V C OR E C 1 88 C1 6 8 1 0 U_ 6 .3 V _ X 5 R_ 0 6 10 U _ 6 . 3 V _ X5 R _ 0 6 AA8 AA1 0 AA1 2 AA1 6 AA1 8 AA2 0 AA2 2 AB7 AB9 AB1 1 AB1 3 AB1 5 AB1 7 AB1 9 AB2 1 AB2 3 H1 1 H1 3 H1 5 H1 7 H1 9 H2 1 H2 3 J10 J12 J14 J18 J20 J22 L26 N2 6 R2 6 U2 6 W26 V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC V CC P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 P1 6 P1 7 P1 8 P1 9 P2 0 P2 1 P2 2 P2 3 P2 4 P2 5 P2 6 P2 7 P2 8 P2 9 P3 0 P3 1 P3 2 P3 3 P3 4 V CC 1 V CC 2 V CC 3 V CC 4 V CC 5 V CC 6 V CC 7 V CC 8 V CC 9 V CC 1 0 V CC 1 1 V CC 1 2 V CC 1 3 V CC 1 4 V CC 1 5 V CC 1 6 V CC 1 7 V CC 1 8 V CC 1 9 V CC 2 0 V CC 2 1 V CC 2 2 V CC 2 3 V CC 2 4 V CC 2 5 V CC 2 6 V CC 2 7 V CC 2 8 V CC 2 9 V CC 3 0 V CC 3 1 V CC 3 2 V CC 3 3 V CC 3 4 V CC 3 5 V CC 3 6 V CC 3 7 V CC 3 8 V CC 3 9 V CC 4 0 V CC 4 1 V CC 4 2 V CC 4 3 V CC 4 4 V CC 4 5 V CC 4 6 V CC 4 7 V CC 4 8 V C CA VID VID VID VID VID VID VID [0 ] [1 ] [2 ] [3 ] [4 ] [5 ] [6 ] L8 L10 L12 L14 L16 L18 L20 L22 L24 N 6 N 8 N 10 N 12 N 14 N 16 N 18 N 20 N 22 N 24 R 6 R 8 R 10 R 12 R 14 R 16 R 18 R 20 R 22 R 24 U 6 U 8 U 10 U 12 U 14 U 16 U 18 U 20 U 22 U 24 W8 W10 W12 W14 W16 W18 W20 W22 W24 Sheet 4 of 31 SIlverthorne 2/2 1 .5 VS N 30 P5 R 4 N 4 K5 L4 R 2 U 2 H_ VID H_ VID H_ VID H_ VID H_ VID H_ VID H_ VID 0 1 2 3 4 5 6 28 28 28 28 28 28 28 C4 0 5 C 403 .1 U_ 1 0 V _ X 7 R_ 0 4 * 1 0U _ 6 . 3 V _ X 5R _ 0 6 V C OR E V C CS E NS E C 1 77 2 . 2 U _6 . 3 V _ X 5 R _0 4 C1 8 5 2. 2 U _ 6 . 3 V _ X 5R _ 0 4 C 16 7 C 174 2 .2 U_ 6 .3 V _ X 5 R_ 0 4 2 . 2 U _ 6 . 3V _ X5 R _ 0 4 C1 6 6 2 .2 U_ 6 .3 V _ X 5 R_ 0 4 V S SS E NSE W2 C PU _ VCC S E NSE P J8 * OP E N _ 2 5 m i l V1 C P U _ V S S S E NS E P J9 * OP E N _ 2 5 m i l V C CS E NS E 2 8 VSSS EN SE 2 8 S I L V E R T H O R N E r ev 0 . 8 D 9 7 3 3 0 - 0 01 SI LV E RT HO R NE 1 . 33 GH Z /1 .6 G HZ V C OR E C 1 87 C1 8 4 C 18 3 C 173 C1 8 6 2 . 2 U _6 . 3 V _ X 5 R _0 4 2. 2 U _ 6 . 3 V _ X 5R _ 0 4 2 .2 U_ 6 .3 V _ X 5 R_ 0 4 2 . 2 U _ 6 . 3V _ X5 R _ 0 4 2 .2 U_ 6 .3 V _ X 5 R_ 0 4 0829 6-07-22511-2A0 VSS/NCTF pins on CPU can be left No Connect as they are corner balls 1 .5 V S 2, 6, 7, 9, 14 , 1 5 , 2 6 V C OR E 28 1 . 0 5V S _ C 6 3 , 2 5 1 . 0 5V S 2, 3, 5, 7, 9, 2 5 , 2 6 Silverthorne 2/2 B - 5 B.Schematic Diagrams A4 A2 8 A A6 AA2 4 A B3 AB2 7 AB2 9 AC 8 AC 1 0 AC 1 2 AC 1 4 AC 1 6 AC 1 8 AC 2 0 AC 2 2 AD 3 AD 5 AD 9 AD 1 1 AD 2 1 AD 2 3 AD 2 5 AD 2 9 A F1 AF3 1 AG 2 AG 6 AG 8 AG 1 0 AG 1 2 AG 1 4 AG 1 6 AG 1 8 AG 2 0 AG 2 2 AG 2 4 AG 2 6 AG 3 0 AH 3 AH 2 9 AJ 4 AJ 2 8 B3 B2 9 C 2 C 6 C 8 C 10 C 12 C 14 C 16 C 18 C 20 C 22 C 24 C 30 D 1 D 31 F3 F9 F1 1 F1 3 F1 7 F1 9 F2 1 F2 3 F2 7 G 8 G 10 G 12 G 14 G 16 G 18 G 20 G 22 H 3 H 29 J6 Schematic Diagrams Poulsbo 1/6 Host Sheet 5 of 31 Poulsbo 1/6 Host 1 . 05 V S 0.1-湩 decoupling capacitor that should be placed close to the reference voltage circuit 2 2 1_ 1 % _ 0 4 R1 2 7 C 1 41 1 0 0_ 1 % _ 0 4 . 1 U _ 10 V _X 7 R _ 04 1 . 0 5V S R1 3 1 D02 1003 5 6 _1 % _ 0 4 1 .0 5 VS R1 2 3 R4 2 5 R 424 *6 0 . 4 _ 1% _ 0 4 * 6 0. 4_ 1 % _ 0 4 2 4 . 9 _1 % _ 0 4 3 3 3 H _ N MI H _ SM I# H _ PBE # 3 H_ S T P CL K # 3 P M_ T H R M T R I P # D02 1216 3 3 H _ A # [3 1 :3 ] U 23A H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H_SWING requires a R1 2 4 6-13-22101-28C H_ D # [6 3 :0 ] H _ IN IT # H _ IN T R _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D #0 #1 #2 #3 #4 #5 #6 #7 #8 #9 #1 0 #1 1 #1 2 #1 3 #1 4 #1 5 #1 6 #1 7 #1 8 #1 9 #2 0 #2 1 #2 2 #2 3 #2 4 #2 5 #2 6 #2 7 #2 8 #2 9 #3 0 #3 1 #3 2 #3 3 #3 4 #3 5 #3 6 #3 7 #3 8 #3 9 #4 0 #4 1 #4 2 #4 3 #4 4 #4 5 #4 6 #4 7 #4 8 #4 9 #5 0 #5 1 #5 2 #5 3 #5 4 #5 5 #5 6 #5 7 #5 8 #5 9 #6 0 #6 1 #6 2 #6 3 H _S W I N G H _T E S T I N # H _R C OM P O H _P L LM O N 1 H _P L LM O N 1 # V8 AF 4 V2 AA1 AC 1 AD 2 V4 Y 2 U 1 Y 8 AB2 AF 2 AB4 AF 8 AE1 AB8 AJ 1 AH 2 AM 8 AN 1 AK4 AG 1 AH 8 AK8 AP8 AK2 AR 1 AT 8 AT 2 AH 4 AP4 AP2 AV4 BB6 AV6 AY 8 BA1 AU 1 AT 6 AV8 BB4 AT 4 AY 6 AV1 0 AV2 BC 1 BB2 AY 2 BD 2 BH 4 B D1 0 BK1 0 BD 6 BD 4 BF 2 BE1 BD 8 BF 4 B H1 0 BK6 BB8 BF 6 BF1 0 BH 6 AB1 0 AB6 AH 6 V6 A D1 0 AK6 T1 0 AT1 0 AP1 0 AM 6 AF1 0 AF 6 H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H _ D0 # _ D1 # _ D2 # _ D3 # _ D4 # _ D5 # _ D6 # _ D7 # _ D8 # _ D9 # _ D1 0 # _ D1 1 # _ D1 2 # _ D1 3 # _ D1 4 # _ D1 5 # _ D1 6 # _ D1 7 # _ D1 8 # _ D1 9 # _ D2 0 # _ D2 1 # _ D2 2 # _ D2 3 # _ D2 4 # _ D2 5 # _ D2 6 # _ D2 7 # _ D2 8 # _ D2 9 # _ D3 0 # _ D3 1 # _ D3 2 # _ D3 3 # _ D3 4 # _ D3 5 # _ D3 6 # _ D3 7 # _ D3 8 # _ D3 9 # _ D4 0 # _ D4 1 # _ D4 2 # _ D4 3 # _ D4 4 # _ D4 5 # _ D4 6 # _ D4 7 # _ D4 8 # _ D4 9 # _ D5 0 # _ D5 1 # _ D5 2 # _ D5 3 # _ D5 4 # _ D5 5 # _ D5 6 # _ D5 7 # _ D5 8 # _ D5 9 # _ D6 0 # _ D6 1 # _ D6 2 # _ D6 3 # H H H H H H H R R H _ NM I _ SM I# _ PBE# _ SW IN G _ ST PC L K# _ T EST IN # _ R C O MP O E S E RV E D5 E S E RV E D4 _ T H R MT R I P # H_ A 3 # H_ A 4 # H_ A 5 # H_ A 6 # H_ A 7 # H_ A 8 # H_ A 9 # H _ A 10 # H _ A 11 # H _ A 12 # H _ A 13 # H _ A 14 # H _ A 15 # H _ A 16 # H _ A 17 # H _ A 18 # H _ A 19 # H _ A 20 # H _ A 21 # H _ A 22 # H _ A 23 # H _ A 24 # H _ A 25 # H _ A 26 # H _ A 27 # H _ A 28 # H _ A 29 # H _ A 30 # H _ A 31 # H_ AD S# H_ A D S T B 0 # H_ A D S T B 1 # H_ G V R E F H _ B N R# H_ B P RI# H _ B R E Q0 # H_ C P U RS T # H _ CG V R E F HOST B.Schematic Diagrams 3 H_ C L KIN N H _C L K I N P H _ DBS Y# H _D E F E R # H _ DI NV 0 # H _ DI NV 1 # H _ DI NV 2 # H _ DI NV 3 # H _D P W R # H _ DR D Y# H _ DS T B N0 # H _ DS T B N1 # H _ DS T B N2 # H _ DS T B N3 # H_ D S T B P 0 # H_ D S T B P 1 # H_ D S T B P 2 # H_ D S T B P 3 # H _ HIT # H _ H I T M# H _ L OC K # H _ R E Q0 # H _ R E Q1 # H _ R E Q2 # H _ R E Q3 # H _ R E Q4 # H _ RS 0 # H _ RS 1 # H _ RS 2 # H _ CP U S L P # H _ TR D Y # H_ C P U P W R G D H_ D PSL P# H _ DP R S T P # M2 M8 K4 P2 F4 G1 M4 F6 H6 D2 H2 J1 F2 D4 D1 2 H1 2 G1 1 A7 A9 A1 1 B6 H8 F10 B1 0 D6 D1 0 B1 2 B4 D8 K6 H4 B8 Y1 0 R1 P1 0 L1 M6 A D4 K1 0 M1 0 H1 0 A D6 A D8 A M2 AY1 0 BK8 P6 J9 Y4 AL 1 AW 1 B H8 W1 A M4 AY4 BF8 V1 0 T6 Y6 P4 N1 K8 P8 K2 T4 T2 T8 A H1 0 F12 H H H H H H H H H H H H H H H H H H H H H H H H H H H H H 3 _ A# 3 _ A# 4 _ A# 5 _ A# 6 _ A# 7 _ A# 8 _ A# 9 _ A# 1 0 _ A# 1 1 _ A# 1 2 _ A# 1 3 _ A# 1 4 _ A# 1 5 _ A# 1 6 _ A# 1 7 _ A# 1 8 _ A# 1 9 _ A# 2 0 _ A# 2 1 _ A# 2 2 _ A# 2 3 _ A# 2 4 _ A# 2 5 _ A# 2 6 _ A# 2 7 _ A# 2 8 _ A# 2 9 _ A# 3 0 _ A# 3 1 1 .0 5 VS R 12 1 1 K_ 1 % _ 0 4 15MIL H _ GV R E F H _ CG V R E F H _ DI NV # 0 H _ DI NV # 1 H _ DI NV # 2 H _ DI NV # 3 H H H H H H H H _ DS _ DS _ DS _ DS _ DS _ DS _ DS _ DS TB TB TB TB TB TB TB TB N# 0 N# 1 N# 2 N# 3 P# 0 P# 1 P# 2 P# 3 H H H H H H H H _ RE _ RE _ RE _ RE _ RE _ RS _ RS _ RS Q# 0 Q# 1 Q# 2 Q# 3 Q# 4 #0 #1 #2 AP6 F8 AK1 0 1 .0 5 VS H _ A DS # 3 H _ A D S TB # 0 3 H _ A D S TB # 1 3 H _ B NR # 3 H _ B PR I# H _ B R E Q# 0 3 H _ CPU R S T # R 12 2 R 132 2 K_ 1 % _ 0 4 1 K _1 % _ 0 4 3 15MIL 3 C L K _ SCH _ BC L K# 2 C L K _ SCH _ BC L K 2 H _ DBS Y# 3 H _ DE F E R# 3 H _ DI NV# [3 :0 ] H _ DP W R# H _ DR DY # 3 H _ DS T BN# [3 :0 ] R 125 1 K _1 % _ 0 4 3 3 3 H _ DS T BP # [3 :0 ] 3 H _ HIT # 3 H _ HIT M # 3 H _ LO C K # 3 H _ CPU SL P # H _ TR D Y # 3 3 H _ P W R GD H _ D P S LP # H _ DPR ST P # 3 3 3 ,2 8 H _ R E Q# [ 4 : 0 ] 3 H _ RS # [2 :0 ] 3 1. 05 V S R9 9 For 533 SKU STUFF Graphice Core Frequency Select 1 00 _ 1 % _ 0 4 H _ I N I T# H _ INT R C F G0 C F G1 BSEL 2 J2 7 B3 4 F28 P OU L S B O S C H B GA J061297 10K_04->100_04 S CH _ CF G 0 S CH _ CF G 1 for ? ? C P U _B S E L 2 2 ,3 R 29 6 R9 4 1 0 K_ 0 4 *1 0 K _ 0 4 FSB CFG0 0 200 133 1 200 For 400 SKU STUFF J060697 POULSBO SCH BGA (QS)->POULSBO SCH BGA 6-03-00000-0F0 H_CPUSLP# The signal may be routed as either a microstrip or stripline with trace lengths between 0.5 inch and 12 inches H_DPSLP# 0.55" ~ 8.25" Minimum of 1:1 trace spacing ratio is allowed as long as the same ground reference plane is kept all the way from SCH and Intel MVP-6 H_DPRSTP# (SCH -> IMVP -> CPU, L1+L2 <8") Minimum of 2:1 trace spacing ratio is allowed as long as the same ground reference plane is kept all the way from SCH, Intel IMVP-6 and Processor B - 6 Poulsbo 1/6 Host 1 .5 VS 1 .0 5 V S Gfx Freq 100 2 , 4 , 6 , 7 , 9 , 1 4 , 1 5, 26 2 ..4 ,7 ,9 ,2 5 ,2 6 Default Schematic Diagrams Poulsbo 2/6 VGA, LVDS, RTC 3. 3 V S U 23 B K4 0 1 9 , 2 3 L P C _F R A M E # R 85 R 95 R 2 91 4. 7K _1 % _ 0 4 4. 7K _1 % _ 0 4 Panel EDID 8/15 L P C_ F R A M E # * 0 _ 04 1 3 L _ BKL T EN 13 13 13 L A _ D A TA N 0 L A _ D A TA N 1 L A _ D A TA N 2 A3 3 A3 1 D 28 K2 6 A2 7 H 28 D 30 A F48 A F50 L _ D A T A N3 AJ 4 3 A K4 8 AH 4 8 AG 4 5 T P4 1 13 13 13 3. 3V S L A _ D A TA P 0 L A _ D A TA P 1 L A _ D A TA P 2 L _D A T A P 3 AJ 4 5 A K5 0 AH 5 0 AG 4 3 T P 40 R3 1 0 1 0 K _ 1 % _0 4 R3 0 9 1 0 K _ 1 % _0 4 R1 1 2 1 0 K _ 1 % _0 4 S D0 _ CD # W L A N_ S D _ CL K W L A N_ S D _ CM D T P 59 SD 0 _ W P 0827 S D_ C D# S D_ CL K S D _ C MD # R 1 05 R 1 08 47_04 47_04 S D1 _ CL K S D1 _ CM D 14 14 14 14 14 14 S D_ W P # S D1 P W R# SD_ D 0 SD_ D 1 SD_ D 2 SD_ D 3 R 1 01 R 1 11 R 1 07 R 3 05 47_04 47_04 47_04 47_04 S D 1 _ D A TA 0 S D 1 _ D A TA 1 S D 1 _ D A TA 2 S D 1 _ D A TA 3 R 1 00 1 0 K_ 0 4 S D2 _ CD # R 3 06 1 0 K_ 0 4 S D2 _ CM D R3 0 3 1 0 K_ 0 4 S D2 _ W P 3. 3 V S B2 2 H 22 F20 A2 1 B2 0 D 20 F22 J19 K2 2 D 22 K2 4 D 26 B2 4 D 24 B2 6 A1 9 J23 A2 5 F26 A2 3 F24 H 24 H 26 E2 5 G 21 K L T CT L KL T EN T L A _ CL K T L B _ D A TA D CC L K D CD A T A DD E N L A_ CL K P L A_ CL K N 0_ C D # 0_ C L K 0_ C MD 0_ L E D 0_ W P 0_ P W R # 0_ D A T A 0 0_ D A T A 1 0_ D A T A 2 0_ D A T A 3 0_ D A T A 4 0_ D A T A 5 0_ D A T A 6 0_ D A T A 7 SD SD SD SD SD SD SD SD SD SD 1_ C D # 1_ C L K 1_ C MD 1_ L E D 1_ W P 1_ P W R # 1_ D A T A 0 1_ D A T A 1 1_ D A T A 2 1_ D A T A 3 SD SD SD SD SD SD SD SD SD SD SD SD SD SD 2_ C D # 2_ C L K 2_ C MD 2_ L E D 2_ W P 2_ P W R # 2_ D A T A 0 2_ D A T A 1 2_ D A T A 2 2_ D A T A 3 2_ D A T A 4 2_ D A T A 5 2_ D A T A 6 2_ D A T A 7 R E S E R V E D 18 P O U L S B O S C H B GA RES E RVE D0 RES E RVE D1 RES E RVE D2 RES E RVE D3 R 29 8 1 0 K_ 0 4 L _ D DC _ CL K R 30 4 1 0 K _ 1 % _ 04 L _ D DC _ DA T A R 96 1 0 K _ 1 % _ 04 3. 3V S R 27 6 R 29 5 1 0 K_ 0 4 1 0 K_ 0 4 LPC_STR1_MAIN HIGH: LPC_CLK0 ->2 LOAD LOW: LPC_CLK0 -> 1 LOAD S C H _R E S E R V E D 0 L P C _ S T R 1 _ MA I N E 49 B 32 B E1 5 B A2 1 C 3 30 R 29 9 D02 1003 1 5P _5 0 V _ N P O_ 0 4 Y 1 R2 7 7 3 3 2 .7 6 8 KHZ 4 RTC Circuitry 10 M _ 04 L A_ DAT AP 0 L A_ DAT AP 1 L A_ DAT AP 2 L A_ DAT AP 3 SD SD SD SD SD SD SD SD SD SD SD SD SD SD V C CR T C *1 0 K _ 0 4 L A_ DAT AN 0 L A_ DAT AN 1 L A_ DAT AN 2 L A_ DAT AN 3 SDIO / MMC 14 14 14 B1 8 D 18 J15 H 18 F18 H 20 H 16 A1 7 K1 8 F16 K1 6 B1 6 D 16 K2 0 L _B L _B L _C L _C L _D L _D L _V LVDS L A_ CL K P L A_ CL K N L _ B K LT C T L_ R L _ C T LA _C L K L _ C T LB _D A T A L _ D DC _ CL K L _ D DC _ DA T A 13 L _ D D C _ C L K 13 L _ D D C _ D A T A 13 L _ VDD E N 13 13 L P C_ C L K RU N # L P C_ S E RIR Q 2 10 K _ 0 4 1 3 , 2 3 L _B K L TC T L L P C _ C L K OU T 0 L P C _ C L K OU T 1 L P C _ C L K OU T 2 SYSTEM MGMT RTC R 288 D 36 B3 8 P M_ E X T T S # R T C _X 1 R T C _X 2 I N T V R ME N RT C RS T # EXTT S P W RO K SL PR D Y# DP R S L P V R F 48 F 50 F 46 H 48 R T C_ X 1 R T C_ X 2 S C H _I N T V R ME N R T C_ R ST # D 32 P M _ E X T TS # 1 F38 B3 6 D 38 MISC SIGNALS C L K _ L P C0 C L K _ L P C1 C L K _ L P C2 1 9 , 2 3 C L K _R U N # 1 9, 2 3 I N T _ S E R I R Q SDVO 22_04 22_04 8. 2K _1 % _ 0 4 RES E RVE D8 C 3 31 R2 7 8 S D V O B _ RE D S DV O B _ RE D# S D V O B _ GR E E N S D V OB _ G R E E N # S D V OB _ B L U E S D V OB _B LU E # P C I E _P E R n 2 P C I E _P E R p 2 P C I E _ P E Tn 2 P C I E _ P E Tp 2 P CIE_ C L KINN P CI E _ CL K IN P P C I E _ I C OM P I P C I E _I C O MP O V C CR T C 1 5P _5 0 V _ N P O_ 0 4 R2 5 0 V C CR T C 2 0 K_ 1 % _ 0 4 C 3 43 R2 8 0 C 49 J49 S C H _ P W R OK 1 0 0 K _ 04 23 1 U _6 . 3 V _ X 5 R _ 0 6 V DD 3 D 26 RB7 5 1 V D 25 RB7 5 1 V P M _S LP MO D E L43 R4 2 7 J1 * OP E N _ 2 5 m i l C4 7 1 P M _S LP R D Y # 23 P M _D P R S L P V R 2 8 D 34 L45 R S M RS T # 1 0K _1 % _ 0 4 Sheet 6 of 31 Poulsbo 2/6 VGA, LVDS, RTC D03 0220 S L P M OD E S D V O _ C T R LC L K S D V O _C T R L D A T A S D V OB _C L K S D V O B _ CL K # S D V OB _ I N T S D V O B _ INT # S D V OB _ S T A L L S D V OB _ S T A LL # SD VO B_ T VCL KIN S DV O B _ T V CL K IN# P C I E _P E R n 1 P C I E _P E R p 1 P C I E _ P E Tn 1 P C I E _ P E Tp 1 PCIE R 63 R 2 92 L P C _ CL K R 287 3 .3 VS B K5 0 L P C_ A D 0 L P C_ A D 1 L P C_ A D 2 L P C_ A D 3 +R T C _ B A T R 24 6 * 1U _ 6 . 3 V _ X5 R _ 06 1 U _ 6 . 3 V _ X 5R _ 0 6 D03 0226 23 1 K _ 1 % _ 04 P M _ RS M RS T # 2 3 *1 0 0 K _ 0 4 20 mil C 3 24 Z 0 60 1 D03 0405 30 29 V4 8 V5 0 U4 7 U4 9 N4 5 N4 3 P4 8 P5 0 SD SD SD SD SD SD SD SD VO VO VO VO VO VO VO VO B CL K C 33 7 B CL K # C 33 8 B IN T B I N T# BST AL L BST AL L # B T V CL K IN B T V CL K IN# A A A A A A M5 0 M4 8 T5 0 T4 8 R4 5 R4 3 SD SD SD SD SD SD VO VO VO VO VO VO B RE D B RE D# B GR E E N B GR E E N B B L UE B B L UE # C C C #C C C 33 4 33 3 33 5 33 6 52 53 A W45 A W43 B B4 8 B B5 0 P E G_ T X N _ 0 P E G_ T X P _ 0 C 34 0 C 33 9 B A4 3 B A4 5 B E4 9 B D5 0 P E G_ T X N _ 1 P E G_ T X P _ 1 C 34 2 C 34 1 . 1 U _ 1 0V _X 7 R _0 4 . 1 U _ 1 0V _X 7 R _0 4 S D V O_ C TR L C L K 12 S D V O_ C TR L D A TA 1 2 S D V OB _ C L K + 12 S D V OB _ C L K - 12 T P4 4 T P4 3 T P3 9 T P4 2 T P3 7 T P3 8 _ 1 0V _ 1 0V _ 1 0V _ 1 0V _ 1 0V _ 1 0V _X 7 R _X 7 R _X 7 R _X 7 R _X 7 R _X 7 R _0 4 _0 4 _0 4 _0 4 _0 4 _0 4 . 1 U _ 1 0V _X 7 R _0 4 . 1 U _ 1 0V _X 7 R _0 4 . 1 U _ 1 0 V _ X 7R _ 0 4 . 1 U _ 1 0 V _ X 7R _ 0 4 SDV SDV SDV SDV SDV SDV OB _ R E D + 12 OB _ R E D - 12 OB _ G R E E N + 1 2 OB _ G R E E N - 12 OB _ B L U E + 1 2 OB _ B L U E - 1 2 P E G _L A N _ R X N 0 1 7 P E G _L A N _ R X P 0 1 7 P E G _L A N _ T X N 0 1 7 P E G _L A N _ T X P 0 1 7 P E G _R X N 1 _ N C 1 5 P E G _R X P 1 _ N C 1 5 P E G _T X N 1 _N C 15 P E G _T X P 1 _ N C 1 5 CL K _ P C I E _ I N # 2 CL K _ P C I E _ I N 2 1. 5V S P E G_ C OM P R4 2 A C E S _ 8 5 2 0 4-0 2 0 0 1 2 1 SLPRDY# SLPMODE .1 U .1 U .1 U .1 U .1 U .1 U A Y4 8 A Y5 0 B A4 7 B A4 9 20 mil J BAT 1 <7.5" F A A A A A A A A A 2 4 . 9 _1 % _ 0 4 D02 1107 0 1 SCH ready to enter S3 0 0 SCH ready to enter S4/S5 The control bus outputs from the SDVO device (for PROM or DDC) may have a different signaling voltage than the 2.5 V used by the SDVO_CTRLCLK and SDVO_CTRLDATA signals. If 2.5-V signaling is not supported by the SDVO device buffers, then a bi-directional level shifting device will be required to properly translate the voltage levels. Route PEG_COMP less than 250 milliohm trace impedance AC coupling caps place them near to TX side (near to destination page ) as per PCI-E guidelines 1 .5 VS 3 .3 VS V D D3 V C CR T C 2, 4, 7 , 9 , 1 4 , 1 5 , 2 6 2, 7, 9 , 1 1 . . 2 3 , 2 5 , 2 6, 28 3, 7, 1 4 , 2 0 , 2 2 . . 2 5 , 29 9, 20 Poulsbo 2/6 VGA, LVDS, RTC B - 7 B.Schematic Diagrams K BC _ PCL K L P C_ C L K TP 2 4 K3 8 J39 A3 5 L39 L P C _ A D0 L P C _ A D1 L P C _ A D2 L P C _ A D3 LPC BUS 0829 23 19 19 , 2 3 19 , 2 3 19 , 2 3 19 , 2 3 Schematic Diagrams Poulsbo 3/6 USB, PATA/IDE U 23 C Sheet 7 of 31 Poulsbo 3/6 USB, PATA/IDE S B _ OC S B _ OC S B _ OC S B _ OC S B _ OC S B _ OC S B _ OC R5 5 3. 3 V S R2 7 9 R5 8 R2 8 5 R2 8 4 4 .7 K_ 0 4 1 0 K_ 0 4 5 . 6 K _ 1 % _0 4 1 0 K_ 0 4 0# 1# 2# 3# 5# 6# 7# 20 U S B _ OC 0 # 15 U S B _ OC 4 # 2 2 . 6 _ 1% _ 0 6 L<500mil 16 16 16 16 16 16 16 16 P D DR E Q P D I OR D Y I N T_ I R Q1 4 P D DA C K # P D DI O W # P D DI O R# P D CS 3 # P D CS 1 # 16 16 16 PD A2 PD A1 PD A0 P D I OR D Y I N T_ I R Q1 4 P D DR E Q P D D7 D02 1107 16 U S B _ OC 0 # U S B _ OC 1 # U S B _ OC 2 # U S B _ OC 3 # U S B _ OC 5 # U S B _ OC 6 # U S B _ OC 7 # U S B _ R B I A S _P N R4 3 W45 R4 5 U4 3 AA4 5 AA4 3 W43 U4 5 A C4 5 A C4 3 P D DR E Q P D I OR D Y I N T _I R Q1 4 P D DA CK # P D DIO W # P D DIO R# P D C S 3# P D C S 1# J43 D4 6 G4 5 B4 6 A3 7 F44 C4 7 E4 7 PD A2 PD A1 PD A0 K4 2 J45 H4 0 PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD B4 0 E4 3 H4 2 D4 2 F40 A4 3 A4 1 J41 A3 9 B4 2 F42 D4 4 L41 B4 4 G4 3 D4 0 D1 5 D1 4 D1 3 D1 2 D1 1 D1 0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 US B US B US B US B US B US B US B US B _O _O _O _O _O _O _O _O C0 # C1 # C2 # C3 # C4 # C5 # C6 # C7 # Poulsbo strapping table U S B _R B I A S N U S B _R B I A S P P A T A _ DD RE Q P A T A _ I OR D Y PA T A _ IDE IRQ P A T A _ DD A CK # P A T A _ DI O W # P A T A _ DI O R# P A T A _ DC S 3 # P A T A _ DC S 1 # P A T A _ DA 2 P A T A _ DA 1 P A T A _ DA 0 P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD P A T A _ DD 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Termination Voltage U U U U U U U 1. 05 V S VTT _ 1 VTT _ 2 VTT _ 3 VTT _ 4 VTT _ 5 VTT _ 6 VTT _ 7 VTT _ 8 VTT _ 9 V TT _ 1 0 V TT _ 1 1 V TT _ 1 2 V TT _ 1 3 V TT _ 1 4 V TT _ 1 5 V TT _ 1 7 V TT _ 1 8 V TT _ 1 9 V TT _ 2 0 V TT _ 2 1 V TT _ 2 2 V TT _ 2 3 V TT _ 2 4 V TT _ 2 5 V TT _ 2 6 V TT _ 2 7 V TT _ 2 8 V TT _ 2 9 V TT _ 1 6 AW 1 3 AV1 2 A U1 3 AT1 2 A R1 3 AP1 2 A N1 3 A M1 2 AL 1 3 AK1 2 AJ 1 3 A H1 2 A G1 3 AF1 2 AE1 3 A C1 3 AB1 2 AA1 3 Y1 2 W13 V1 2 U1 3 T 12 R1 3 P1 2 N1 3 M1 4 M1 2 A D1 2 SCH_GPIO0 C8 6 C9 0 C1 3 4 0 1 1 U _ 6 . 3 V _ X5 R _0 4 1 U _ 6 . 3 V _ X5 R _0 4 1 U _ 6 . 3 V _ X5 R _0 4 1 0 U _ 6 . 3V _X 5 R _ 0 6 0 1 Address 0xfffb0000 0xfffc0000 1 0 0xfffd0000(Default) 1 0 0xfffe0000 3 .3 V S C 11 8 C1 0 5 . 1 U _ 1 0 V _ X7 R _0 4 . 1 U _ 1 0 V _ X7 R _0 4 R 72 R8 6 * 1 0K _ 0 4 10 K _ 0 4 R 80 R7 9 1 0 K_ 0 4 *1 0 K _ 04 S C H _G P I O 0 S C H _G P I O 3 CMC Base Address R2 7 4 10 K _ 0 4 3. 3V TR S T # T MS TD I T DO T CK S T P CP U # P D D[1 5 :0 ] D02 1110 CLOCK I/F No-Connect SMB R S TR D Y # R ESET# TW A R N I OS U S 0 I OS U S 1 I OS U S 2 I OS U S 3 RS GP GP GP GP W A KE# S M I# TH R M # G PE# GP I O GP I O GP I O GP I O GP I O GP I O GP I O GP I O GP I O GP I O 0 1 2 3 4 5 6 7 8 9 SPKR H D A _ C LK H DA _ S Y NC H D A _R S T # H DA _ S D I0 H DA _ S D I1 H D A _S D O HD A _ DO CK E N # HD A _ DO CK R S T # RE S E RV E D 6 RE S E RV E D 7 D A _R E F C LK I N N D A _ RE F CL K INP D B _ RE F C L K INN S S C DB _ R E F CL K IN P S S C C L K RE Q # CL K 1 4 U S B _ CL K 4 8 S U S C LK S M B _ A LE R T # S MB _ D A TA S MB _ C LK N4 9 M5 0 K4 8 M4 8 N4 7 X DP _ T RS T # X D P _ T MS X DP _ T DI X DP _ T DO X DP _ T CK TP 45 TP 47 TP 46 TP 48 H3 0 P M _ S T P CP U # H5 0 BA4 1 K5 0 U4 1 N4 3 N4 5 R4 1 S CH _ RS T R DY # N4 1 B3 0 F32 P5 0 P C I E _W A K E # S MC _ E X TS MI # P M_ T H R M# S MC _ R U N T I M E _S C I # G2 9 K3 0 F34 G3 3 K3 6 H3 6 F36 J 31 H3 4 K2 8 S C H _ GP I O 0 S C H _ GP I O 1 GS E N _ I N T S C H _ GP I O 3 L C DI D 0 L C DI D 1 L C DI D 2 S L P I OV R # R2 6 5 1 0 0 _1 % _ 0 4 1 0 K _0 4 270 263 87 271 273 272 1 K _ 1 % _0 4 1 0 K _ 04 1 0 K _ 04 1 0 K _ 04 1 0 0 K _0 4 1 0 K _ 04 SW I# R 252 1 0 K _ 04 GS E N _ I N T R 71 1 0 K _ 04 A C_ B IT _ CL K C 126 * 22 0 0 P _ 50 V _ X 7 R _ 0 4 S MC _ E XT S M I # P M _T H R M # R 302 R 64 1 0 K _ 04 * 10 K _ 0 4 V D D3 P C I E _ W A K E # 1 4 , 1 5 , 17 S M C _ E X T S M I # 23 P M _ T H R M# 3 S M C _ R U N TI ME _ S C I # 23 N C_ C P P E # 1 5 R 84 R R R R R R 2 P M _ R S T R D Y # 23 R ST # 23 P M _ R S T W A R N 23 S B _M U T E # 1 8 L A N _ DE T E C T 1 7 P M _ P W R B TN # 2 3 SW I# 23 S B _ MU T E # L A N _ D E TE C T P M_ P W R B T N # SW I# P CI E _ W A K E # P M_ P W R B T N # S L P I OV R # LA N _ D E T E C T S B _ MU TE # S M C_ RU NT IM E _ S CI # D02 1107 3 .3 VS G S E N _I N T 2 0 L C DID 0 13 L C DID 1 13 L C DID 2 13 SL PIO VR # I S OL A T E B 1 7 S C H _ GP I O 9 25 TP2 6 J 35 K1 4 E1 3 A1 3 F14 B1 4 D1 4 E1 5 H1 4 A C Z _B I TC L K A C Z _S Y N C A C Z _R S T # R1 1 5 R1 1 7 R3 1 6 3 3 _ 1% _ 0 4 3 3 _ 1% _ 0 4 3 3 _ 1% _ 0 4 A C Z _S D A T A O U T R 3 1 1 3 3 _ 1% _ 0 4 A U4 3 A U4 5 AL 4 5 AL 4 3 AE4 5 AE4 3 B2 8 H3 2 W41 J 47 D B _ P L L MO N 1 # D B _ P L L MO N 1 6 0 . 4 _ 1% _ 0 4 6 0 . 4 _ 1% _ 0 4 K3 2 G3 7 H3 8 S MB _A LE R T # J0 606 97 PO ULS BO S CH B GA ( QS )- >P OU LS BO S CH B GA A C_ B IT _ CL K SP AC AC AC AC KR 18 _ B IT _ CL K 1 8 _ S Y N C _ C OD E C 1 8 _ RS T # 1 8 _ S D A TA I N 0 1 8 A C _ S DO UT _ CO DE C 3. 3V S 18 1 . 5V S R5 2 R4 7 D R E F C LK # 2 D R E F C LK 2 DR E F S S C L K # 2 DR E F S S C L K 2 C L K _ S C H _ OE # 2 CL K _ R E F _ S CH 2 S US CL K TP5 P O UL S B O S CH B G A B - 8 Poulsbo 3/6 USB, PATA/IDE SCH_GPIO3 C 10 1 1 .0 5 VS JT AG * 10 K _ 0 4 1 0 K_ 0 4 N0 P0 N1 P1 N2 P2 N3 P3 N4 P4 N5 P5 N6 P6 N7 P7 SYSTEM GPIOs R 2 69 R 2 51 _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D PATA/IDE B.Schematic Diagrams 3 .3 V US B US B US B US B US B US B US B US B US B US B US B US B US B US B US B US B HD AUDIO D03 0106 AE4 7 AE4 9 A D4 8 A D5 0 AB5 0 AB4 8 AA4 9 AA4 7 Y4 8 Y5 0 V5 0 V4 8 U4 7 U4 9 T50 T48 U SB _ PN0 U SB_ PP0 U S B _ H U B _P N 1 U S B _ H U B _P P 1 U S B _ B T _P N 2 U S B _ B T _P P 2 U S B _ F P _P N 3 U S B _ F P _P P 3 U SB _ PN4 U SB_ PP4 U SB _ PN5 U SB_ PP5 U S B _ CC D_ P N6 U S B _ CC D_ P P 6 U S B _ W L A N _P N 7 U SB _ W L AN_ PP 7 USB I/F 20 20 21 21 14 14 21 21 15 15 21 21 14 14 14 14 R7 7 R7 0 R6 2 3 .3 VS 1 0 K_ 0 4 2 . 2 K _ 1 %_ 0 4 2 . 2 K _ 1 %_ 0 4 S M B _ D A T A 2 , 1 1 , 15 S M B _ C L K 2 , 1 1 , 15 1 .0 5 VS 3 .3 V 1 .5 VS 3 .3 VS V D D3 2 . . 5 , 9 , 2 5 , 26 3 , 9 , 1 3 . . 1 5, 1 7 . . 1 9 , 21 , 2 3 , 2 5. . 27 2 , 4 , 6 , 9 , 1 4, 1 5 , 2 6 2 , 6 , 9 , 1 1. . 23 , 2 5 , 2 6, 2 8 3 , 6 , 1 4 , 20 , 2 2 . . 2 5 , 29 Schematic Diagrams Poulsbo 4/6 DDR2 U23D SM_ BS0 SM_ BS1 SM_ BS2 SM_CK0 SM_CK1 SM_CK0# SM_CK1# SM_ CKE0 SM_ CKE1 MEMORY SM_DQ0 SM_DQ1 SM_DQ2 SM_DQ3 SM_DQ4 SM_DQ5 SM_DQ6 SM_DQ7 SM_DQ8 SM_DQ9 SM_DQ10 SM_DQ11 SM_DQ12 SM_DQ13 SM_DQ14 SM_DQ15 SM_DQ16 SM_DQ17 SM_DQ18 SM_DQ19 SM_DQ20 SM_DQ21 SM_DQ22 SM_DQ23 SM_DQ24 SM_DQ25 SM_DQ26 SM_DQ27 SM_DQ28 SM_DQ29 SM_DQ30 SM_DQ31 SM_DQ32 SM_DQ33 SM_DQ34 SM_DQ35 SM_DQ36 SM_DQ37 SM_DQ38 SM_DQ39 SM_DQ40 SM_DQ41 SM_DQ42 SM_DQ43 SM_DQ44 SM_DQ45 SM_DQ46 SM_DQ47 SM_DQ48 SM_DQ49 SM_DQ50 SM_DQ51 SM_DQ52 SM_DQ53 SM_DQ54 SM_DQ55 SM_DQ56 SM_DQ57 SM_DQ58 SM_DQ59 SM_DQ60 SM_DQ61 SM_DQ62 SM_DQ63 POUL SBO SCH BGA SYSTEM BG49 BG47 BE45 BC43 BE47 BC47 BC45 BK44 BK42 BG41 BK40 BC41 BG43 BJ43 BJ39 BG39 BC39 BK38 BG37 BK36 BJ37 BG35 BJ35 BC35 BK34 BG31 BG33 BK30 BC33 BJ33 BJ31 BC31 BJ29 BG29 BK28 BC29 BE27 BK26 BG25 BJ25 BC25 BG23 BK22 BJ21 BK24 BJ23 BG21 BC21 BK20 BJ19 BG17 BJ17 BG19 BC19 BC17 BK16 BG15 BC15 BJ13 BK12 BK14 BJ15 BC13 BC11 SM_DQS0 SM_DQS1 SM_DQS2 SM_DQS3 SM_DQS4 SM_DQS5 SM_DQS6 SM_DQS7 SM_MA0 SM_MA1 SM_MA2 SM_MA3 SM_MA4 SM_MA5 SM_MA6 SM_MA7 SM_MA8 SM_MA9 SM_MA10 SM_MA11 SM_MA12 SM_MA13 SM_MA14 SM_VREF SM_ RAS# SM_ CAS# SM_WE# SM_CS0# SM_CS1# SM_RCOMPO SM_RCVENIN SM_RCVENOUT BC27 BE25 BA35 M_A_BS0 M_A_BS1 M_A_BS2 BG45 BE11 11 11 11 M_C LK_ DDR0 11 M_C LK_ DDR1 11 BJ4 5 BG11 M_C LK_ DDR#0 11 M_C LK_ DDR#1 11 BE39 BE37 M_C KE0 M_C KE1 BJ4 7 BJ4 1 BC37 BK32 BG27 BE23 BK18 BG13 M_ A_D QS0 M_ A_D QS1 M_ A_D QS2 M_ A_D QS3 M_ A_D QS4 M_ A_D QS5 M_ A_D QS6 M_ A_D QS7 BJ2 7 BA19 BA27 BA25 BE29 BC23 BE31 BA31 BA33 BA29 BE17 BE35 BE33 BE19 BA37 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 BE43 0P9_VREF 11 11 Sheet 8 of 31 Poulsbo 4/6 DDR2 M_A_DQS[7: 0] 11 M_A_A[14: 0] 11 1.8V 0 .9VS R76 10K_1%_04 10 MI L BE21 BA13 M_A_RAS# M_A_CAS# 11 11 R68 R118 C131 C47 7 BA17 M_A_WE# 11 10K_1%_04 30.1 _1%_04 .1U_1 0V_ X7R_0 4 10 U_6.3 V_X5R_06 M_C S#0 M_C S#1 11 11 BA23 BA15 BE13 M_R COMP0 BA39 BE41 M_R CVENIN M_R CVENOUT C4 76 10 U_6. 3V_ X5R_0 6 >1 0M IL D03A 0512 R69 0_04 The leng th o f M_R CVENI N and M_RC VENO UT ma x 1" R15 2 39. _1%->30.1_1 % M97 0714 J060697 POULSBO SC H BGA (QS)- >POULSBO SC H BGA 0. 9VS 1. 8V 11 ,27 9, 11,2 5,27 Poulsbo 4/6 DDR2 B - 9 B.Schematic Diagrams M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 DDR 11 M_A_DQ[ 63:0] C 11 0 C 12 5 32 mA C 99 C 72 C 11 3 C 73 10 0 m A C 10 2 R 1 29 * 32 m li _ sh ort S C H _V C C H D A C 1 36 .1 U _ 1 0V _ X 7R _0 4 3. 3 V S C6 9 C 61 U S B A G2 1 1 /2 0 VCC A PCIEB G V SSA PCIEB G A W 41 AY4 2 C5 1 1 . 5V S L7 H C B 10 05 K F -1 21 T2 0 S C H _V C C A U S B P LL 5 mA + V 1 P 05 _ SU S B Y P _ S C H S C H _ V C C A 15 L5 H C B 1 00 5 K F -12 1T 2 0 S C H _ VC C A U S B 3 3 5 mA Please place near SCH pin L4 H C B 1 0 05 K F -12 1 T2 0 C 1 32 C1 4 3 C1 3 9 V C C R TC 1 1 /2 0 1 1 /2 0 60 m ils + V 1P 5 S _ H P LL _ S C H 2 20 U F M 4 V D S CH_ RS V D1 C9 1 TP 2 3 3. 3 V S R 59 * 20 m il _s h ort AG 1 L8 H C B1 0 05 K F -1 21 T2 0 1 1/ 2 0 T P 22 13 6 mA L6 3. 3 V C 66 C 54 U S B A G2 D01 1021 + C 4 27 +C4 3 2 D02 1022 D01 1021 C 1 03 S C H _ V C C A P C IE C 62 1 1 /2 0 . 1U _ 1 0V _ X 7 R _0 4 . 1 U _ 10 V _ X 7R _ 0 4 . 1 U _ 10 V _ X 7R _0 4 . 1 U _ 1 0V _ X 7R _0 4 2 . 2 U _ 6. 3 V _X 5 R _ 0 4 2 . 2 U _ 6. 3 V _X 5 R _ 0 4 2 20 U _ 2. 5 V _ B 2 C 87 *1 U _ 6. 3 V _X 5 R _ 0 4 C 11 1 4 . 7 U _ 6. 3 V _X 5 R _ 0 6 C 10 4 *1 U _ 6. 3 V _X 5 R _ 04 C 89 1 U _ 6 . 3V _ X 5R _0 4 C 11 5 1U _6 . 3V _ X 5 R _0 4 A D3 4 A D3 2 A B 34 A B 32 Y3 4 Y3 2 C 59 1 U _ 6 . 3V _ X 5R _0 4 1 U _ 6. 3 V _ X 5R _0 4 C 13 7 . 1U _ 1 0V _ X 7 R _0 4 R E S E R VE D 12 R E S E R VE D 11 R E S E R VE D 13 A B 38 A A 37 W 37 C 13 5 . 1U _ 1 0V _ X 7 R _0 4 P3 8 P3 6 . 1 U _ 10 V _ X 7R _0 4 V C C 1 5 U S B _1 V C C 1 5 U S B _2 V C C 1 5 U S B _3 V C C 1 5 U S B _4 V C C 1 5 U S B _5 V C C 1 5 U S B _6 . 1U _ 1 0V _ X 7 R _0 4 VC C 5 R E F S U S V C C A D P L LA V C CA P CIE P L L V C C A D PL L B V C C 5R E F _ 1 V S S A U S B B GS U S V C C A U S B B GS U S R E S E R VE D 10 RE S E RV E D9 C 65 . 1 U _ 1 0V _ X 7R _0 4 A A4 1 AE3 9 AN 49 A G3 9 K3 4 A C4 1 AE4 1 V2 2 V 20 V1 8 AB1 8 A B 16 Y 30 Y2 8 Y2 6 Y 24 Y2 2 T34 T32 T 30 T28 T26 T2 4 T 22 T20 T18 T 16 A K 22 AK2 0 AK1 8 A K 16 A H3 4 A H3 2 A H 30 A H2 8 A H2 6 A H2 4 AH 22 A H2 0 A H1 8 A H 16 A F3 4 A F 32 AF3 0 AF2 8 A F 26 A F 24 AF2 2 AF2 0 A F 18 AF1 6 A D3 0 A D 28 A D2 6 A D2 4 A D 22 A D 20 A D1 8 A D1 6 AB3 0 A B 28 A B 26 AB2 4 AB2 2 A B 20 A M 34 A M 32 AM 3 0 A M2 8 A M 26 A M 24 AM 2 2 A M2 0 A M 18 AM 1 6 A K 34 A K 32 AK3 0 AK2 8 A K 26 A K 24 V1 6 Y1 8 Y 16 V3 4 V3 2 V3 0 V 28 V2 6 V2 4 Y 20 Core Decoupling 2 20 U _ 2. 5 V _ B 2 C 71 V C C 33 _1 5 V C C 33 _ 14 V C C 3 3_ 1 3 V C C 3 3 _1 2 V C C 33 _ 11 V C C 3 3_ 10 V C C 3 3_ 9 V C C 3 3 _6 V C C 33 _ 8 V C C 3 3_ 7 V C C 3 3_ 5 V C C 3 3 _4 V C C 33 _ 3 V C C 3 3_ 2 V C C 3 3 _1 V C C 33 _1 6 V C C 33 R T C V C C H D A _1 V CCH DA _ 2 V C C A U S B P LL V C CDHP L L V CCA HP L L C1 2 1 R3 3 R3 1 R2 9 R2 7 R2 5 R2 3 R2 1 R1 9 R1 7 R1 5 P3 4 P3 2 N3 3 N3 1 M3 8 M3 6 M3 4 M3 2 1 C 70 M 18 M 20 M2 2 M2 4 M 26 M 28 M3 0 N1 9 N1 5 N 17 N2 1 N2 3 N 25 N 27 N2 9 M 16 A4 5 K 12 J1 1 A C3 9 BB1 0 B A 11 1 U _ 6. 3 V _X 5 R _ 0 4 V C C _ 79 V CC_ 8 0 V C C _8 1 V C C _6 3 V C C _ 64 V CC_ 6 5 V C C _6 6 V C C _ 67 V C C _ 68 V CC_ 6 9 V C C _1 0 V C C_ 9 V CC_ 8 V CC_ 7 V C C _6 V C C_ 5 V CC_ 4 V C C _3 V C C _2 VC C _ 1 V CC_ 1 1 V C C _1 2 V C C _1 3 V C C _ 14 V CC_ 1 5 V C C _1 6 V C C _ 17 V C C _ 18 V CC_ 1 9 V C C _2 0 V C C _ 21 V CC_ 2 2 V C C _2 3 V C C _2 4 VC C _ 25 V CC_ 2 6 V C C _2 7 V C C _2 8 V C C _ 29 V CC_ 3 0 V C C _3 1 V C C _ 32 V C C _ 33 V CC_ 3 4 V C C _3 5 V C C _ 36 V CC_ 3 7 V C C _3 8 V C C _3 9 VC C _ 40 V CC_ 4 1 V C C _4 2 V C C _4 3 V C C _ 44 V CC_ 4 5 V C C _4 6 V C C _ 47 V C C _ 48 V CC_ 4 9 V C C _5 0 V C C _ 51 V C C _ 52 V CC_ 5 3 V C C _5 4 V C C _ 55 V CC_ 5 6 V C C _5 7 V C C _5 8 V C C _ 59 V CC_ 6 0 V C C _6 1 V C C _ 62 V C C _ 12 0 V C C _ 1 21 V C C _8 2 V C C _ 71 V C C _ 72 V CC_ 7 3 V C C _7 4 V C C _ 75 V CC_ 7 6 V C C _7 7 V C C _7 8 VC C _ 70 * 1U _6 . 3 V _X 5 R _ 04 All decoupling should be placed on the backside 2 3 . 3V S R E S E R V ED 14 R E S E RV E D1 5 RE S E RV E D1 6 R E S E R V E D 17 V C C P 33 U S B S U S _ 2 V C C P 3 3U S B S U S _1 V C C P 3 3U S B S U S _ 3 V C C 33 S U S _ 3 V C C 33 S U S _ 2 VC C 3 3S U S _1 VCC V C C 1 5 _1 V C C 1 5 _2 V C C 1 5 _3 V C C 1 5 _4 V C C 1 5 _5 V C C 1 5 _6 V C C 1 5 _7 V C C 1 5 _8 V C C 1 5 _9 V C C 15 _ 10 V C C 15 _ 11 V C C 15 _ 12 V C C 15 _ 13 V C C 15 _ 14 V C C 15 _ 15 V C C 15 _ 16 V C C 15 _ 17 V C C 15 _ 18 . 1 U _ 10 V _X 7 R _ 0 4 S C H_ V CC3 3 N3 7 N 35 A C3 7 AB3 6 Y3 8 AA3 9 W 39 T38 U 37 R 39 V C C L VD S _1 0 1 V C C L VD S _1 0 0 V C C L VD S _1 V C C L VD S _2 V C C L VD S _3 2 2U _6 . 3V _ X 5 R _0 8 * 32 m li _ sh ort . 1U _1 0 V_ X 7 R _ 04 3 . 3V . 1U _1 0V _ X 7 R _ 04 R5 1 C6 0 *1 U _ 6. 3 V _X 5 R _ 0 4 + V 1 P 05 _ SU S U S B B Y P _ S C H 1U _6 . 3 V _X 5 R _ 04 T P6 *1 U _ 6. 3 V _X 5 R _ 0 4 C8 4 *. 1U _1 0 V _X 7 R _ 04 C8 2 . 1U _ 1 0V _ X 7 R _0 4 C9 3 . 1 U _ 1 0V _ X 7R _0 4 C 1 16 * . 1U _1 0 V _X 7 R _ 04 C8 5 1 U _ 6 . 3V _ X 5R _0 4 . 1 U _ 1 0V _ X 7R _0 4 1. 8 V 1 U _ 6 . 3V _ X 5R _0 4 C S D V O_ 1 10 C S D V O_ 1 00 C S D V O_ 1 01 C S D V O_ 1 03 C S D V O_ 1 06 C S D V O_ 1 05 1 U _ 6 . 3V _ X 5R _0 4 4 . 7 U _6 . 3 V _X 5 R _ 06 V C C S M_ 4 3 V C C S M _1 00 V C C S M _1 0 1 V C C S M_ 10 2 V C C S M_ 1 03 V C C S M _1 0 4 V C C S M _ 10 5 V C C S M_ 10 6 V C C S M_ 1 07 V C C S M _1 0 8 V C C S M _ 10 V C C S M_ 1 V C C S M _2 V C C S M _3 V CCS M _ 4 V C C S M_ 5 V C C S M _6 V C C S M _7 V C C SM _ 21 V C C S M_ 2 2 VC C S M _2 3 V C C S M _ 24 V C C S M_ 25 V C C S M_ 2 6 V C C S M _2 7 V C C S M _ 28 V C C S M_ 2 9 V C C S M _3 0 V C C S M _3 1 V C C S M _ 32 V C C S M_ 3 3 V C C S M _3 4 V C C S M _3 5 V C C SM _ 36 V C C S M_ 3 7 VC C S M _3 8 V C C S M _ 39 V C C S M_ 40 V C C S M_ 4 1 V C C S M _4 2 1 U _ 6. 3 V _X 5 R _ 0 4 VC VC VC VC VC VC *. 1 U _ 10 V _ X 7R _0 4 C 1 17 CPCIE_ 4 CPCIE_ 5 CPCIE_ 6 CPCIE_ 7 CPCIE_ 8 CPCIE_ 9 CPCIE_ 1 CPCIE_ 2 CPCIE_ 3 C P C I E _ 10 0 C P C I E _ 10 1 *. 1 U _ 10 V _ X 7R _ 0 4 C 1 19 VC VC VC VC VC VC VC VC VC VC VC *. 1 U _ 10 V _ X 7R _ 0 4 73 0 mA AP1 6 AW 3 5 A W 33 AW 3 1 AW 2 9 A W2 7 A W 25 AW 2 3 AW 2 1 A W 19 A W 37 AW 1 7 AV3 6 A V 34 AV3 2 AV3 0 AV 2 8 A V 26 AV2 4 AV2 2 A V2 0 A V 18 AV1 6 AT3 0 A T 28 A T 26 AT2 4 AT2 2 A T 20 AT1 8 AT1 6 AP 3 4 A P 32 AP3 0 AP2 8 A P2 6 A P 24 AP2 2 AP2 0 A P 18 1 . 5V S AK3 6 A J3 7 A H3 8 A H3 6 AK3 8 A L3 7 1U _6 . 3 V _X 5 R _ 04 C6 4 A T3 4 A T3 2 A R3 7 AP3 8 AP3 6 A N3 7 A U3 7 A T3 8 A T3 6 A M3 6 AV3 8 1U _6 . 3 V_ X 5 R _ 04 C 12 0 1 U _ 6. 3 V _X 5 R _ 0 4 25 0 mA 1U _6 . 3V _ X 5 R _ 04 4. 7 U _ 6. 3 V _ X 5R _ 0 6 C 88 * 1U _6 . 3 V _X 5 R _ 04 1 . 5V S A G3 7 AF3 8 AF3 6 AE3 7 A D3 6 . Place CAPS next to CPU pin AG35 and AG36 . U 2 3E . B - 10 Poulsbo 5/6 Power C9 8 . Sheet 9 of 31 Poulsbo 5/6 Power C 75 . * 1U _6 . 3 V _X 5 R _ 04 6 50 m A . B.Schematic Diagrams Schematic Diagrams Poulsbo 5/6 Power 1 . 5V S 1 . 05 V S 18 00 mA +C1 4 5 1. 5 V S 20 m A Place between SCH and CPU S CH_ RS V D0 3 54 m A TP 7 1 . 5V S 3. 3 V S C7 7 56 8 mA P OU L S B O S C H B GA 1 . 5V S 5V V CCRT C 1. 0 5 VS 3. 3 V S 1. 5 V S 3. 3 V 1. 8 V 5V S D4 5 VS + V 5S _ R E F _ 1 R 57 R B 7 51 V 5VS LEAKAGE 10 _0 4 C 83 +V 5 _R E F S U S J +V 5 S _ R E F _1 0606 97 P OULS BO SCH BGA (QS )-> POUL SBO SCH BG A A G1 3 . 3V D2 4 5V H C B 10 05 K F -1 21 T 20 + V 5_ R E F S U S R 26 6 R B 7 51 V 10 _0 4 C6 7 C 32 7 U S B A G2 5 7 mA 1. 5 V S L15 H C B 1 00 5 KF -1 2 1T 2 0 11 /2 0 1 3 , 14 , 19 . . 2 1, 2 4 . .2 8 6 ,2 0 2 . . 5 , 7, 2 5, 2 6 2 , 6 , 7, 1 1. . 2 3 , 25 , 26 , 2 8 2 , 4 , 6, 7 , 14 , 1 5, 2 6 3 , 7 , 13 . . 15 , 1 7. . 1 9, 2 1 , 23 , 2 5. . 2 7 8 , 1 1, 2 5, 2 7 1 3 , 16 , 18 . . 2 1, 2 5 Schematic Diagrams Poulsbo 6/6 VSS VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_163 VSS_162 VSS_161 VSS_160 VSS_159 VSS_157 VSS_179 VSS_178 VSS_177 VSS_176 VSS_175 VSS_174 VSS_173 VSS_172 VSS_171 VSS_170 VSS_169 VSS_168 VSS_167 VSS_166 VSS_165 VSS_164 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_709 VSS_710 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_504 VSS_503 VSS_502 VSS_501 VSS_505 VSS_506 VSS_1014 VSS_1015 VSS_1016 VSS_1017 VSS_1018 VSS_1019 VSS_180 VSS_181 VSS_1 82 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_1 89 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_1 96 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_ 204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_ 211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_ 218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_ 225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_ 232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_ 239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_ 246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_ 253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_ 260 VSS_261 VSS_262 U23G W35 W33 W31 W29 W27 W25 W23 W21 W19 W17 W15 W11 W9 W7 W5 W3 V46 V44 V42 AJ41 AJ47 AJ49 AK14 AK40 AK44 AJ5 AJ7 AJ9 AJ11 AJ15 AJ17 AJ19 AJ21 AJ23 AJ25 AJ27 AJ29 AJ31 AJ33 AJ35 AJ39 L9 L7 L5 L3 K46 K44 J37 J33 J29 J25 J21 U27 U25 G47 G41 G39 G35 G31 G27 G25 G23 C19 C17 C15 C13 G3 E45 BJ1 BH50 BH48 BH46 BH44 BH42 VSS VSS_1023 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_292 VSS_291 VSS_290 VSS_289 VSS_288 VSS_287 VSS_286 VSS_285 VSS_284 VSS_283 VSS_282 VSS_281 VSS_280 VSS_279 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_158 VSS_404 VSS_403 VSS_383 VSS_378 VSS_379 VSS_380 VSS_381 VSS_382 VSS_508 VSS_507 VSS_882 VSS_881 VSS_1003 VSS_1000 VSS_1001 VSS_1004 VSS_1005 VSS_1006 VSS_1007 VSS_1008 VSS_1009 VSS_1010 VSS_1011 VSS_1012 VSS_1013 BH34 AA19 AA17 AA15 AA11 AA9 AA7 AA5 AA3 Y46 Y44 Y42 Y40 Y36 Y14 W49 W47 N9 N7 N5 N3 M46 M44 M42 M40 L49 L47 L37 L35 L33 L31 L29 L27 L25 L23 L21 L19 L17 L15 L13 L11 G19 G17 G15 G13 G9 G7 G5 AK42 E21 E23 E27 E29 E31 E33 E35 E37 E39 E41 A49 B2 A15 A5 A3 BK48 BK46 BK4 BK2 BJ4 9 BJ1 1 BJ9 BJ7 BJ5 BJ3 Sheet 10 of 31 Poulsbo 6/6 VSS VSS_1022 VSS_701 VSS_702 VSS_703 VSS_704 VSS_705 VSS_7 06 VSS_707 VSS_708 VSS_736 VSS_737 VSS_738 VSS_800 VSS_8 01 VSS_802 VSS_803 VSS_804 VSS_805 VSS_806 VSS_807 VSS_7 11 VSS_712 VSS_713 VSS_714 VSS_715 VSS_716 VSS_717 VSS_71 8 VSS_719 VSS_720 VSS_721 VSS_722 VSS_723 VSS_724 VSS_72 5 VSS_726 VSS_727 VSS_728 VSS_729 VSS_730 VSS_731 VSS_73 3 VSS_734 VSS_735 VSS_732 VSS_850 VSS_851 VSS_852 VSS_85 3 VSS_854 VSS_751 VSS_750 VSS_749 VSS_748 VSS_747 VSS_74 6 VSS_745 VSS_744 VSS_743 VSS_742 VSS_741 VSS_740 VSS_73 9 VSS_700 VSS_855 VSS_856 VSS_857 VSS_858 VSS_859 VSS_86 0 VSS_861 VSS_862 VSS_863 VSS_864 VSS_865 VSS_866 VSS_86 7 VSS_868 VSS_869 VSS_870 VSS_871 VSS_872 VSS_873 VSS_87 4 VSS_875 VSS_876 VSS_877 VSS_878 VSS_879 VSS_880 VSS_88 3 VSS_1024 VSS_1021 VSS_1020 BB24 BB22 BA7 BA5 BA3 AY46 AY44 AY40 AY38 AY36 AY34 AY32 AY30 AY28 AY26 AY24 AY22 AY20 AY18 AY16 AY14 AY12 AW49 AW47 AW39 AW15 AW11 AW9 AW7 AW5 AW3 AV46 AV44 AV42 AV40 AV14 AU41 AU39 AU35 AU33 AU31 AU29 AU27 AU25 AU23 AU21 AU19 AU17 AU15 AU11 AU9 AU7 AU5 AU3 AT46 AT44 AT42 AT40 AT14 AR49 AR47 AR41 AR39 AR35 AR33 AR31 AR29 AR27 AR25 AR23 AR21 AR19 AR17 AR15 AR11 AR9 AR7 AR5 AR3 AP46 AP44 AP42 AP40 AP14 AN47 AN41 AN39 AN35 AN33 AN31 AN29 AN27 AN25 AN23 AN21 AN19 AN17 AN15 AN11 AN9 AN7 AN5 AN3 AM 46 AL7 AL5 BH36 V38 V36 V14 U39 U35 U33 U31 U29 P48 P46 P44 J17 J13 J7 J5 J3 H4 6 H44 G49 U23 U21 U19 U17 U1 5 U11 U9 U7 U5 U3 T46 T44 T42 T40 T36 T1 4 R49 R47 R3 7 R35 R11 R7 R5 R3 R9 E19 E17 E11 E9 E7 N11 N39 P14 P16 P18 P20 P22 P24 P26 P28 P30 P40 P42 V40 E5 E3 E1 D50 D48 C45 C43 C41 C39 C3 7 C35 C33 C31 C29 C27 C25 C2 3 C21 C11 C9 C7 C5 C3 C1 B50 B48 A47 BH32 BH38 BH40 VSS VSS_76 VSS_77 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_384 VSS_385 VSS_386 VSS_387 VSS_388 VSS_389 VSS_390 VSS_391 VSS_392 VSS_393 VSS_394 VSS_395 VSS_396 VSS_397 VSS_398 VSS_399 VSS_400 VSS_401 VSS_402 VSS_522 VSS_405 VSS_406 VSS_407 VSS_408 VSS_409 VSS_410 VSS_411 VSS_412 VSS_413 VSS_510 VSS_511 POULSBO SCH BGA J060697 POULSBO SCH BGA (QS)->POULSBO SCH BGA POULSBO SCH BGA Poulsbo 6/6 VSS B - 11 B.Schematic Diagrams VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_83 VSS_82 VSS_81 VSS_80 VSS_79 VSS_78 VSS_420 VSS_421 VSS_422 VSS_423 VSS_424 VSS_425 VSS_426 VSS_427 VSS_521 VSS_520 VSS_523 VSS_519 VSS_518 VSS_517 VSS_516 VSS_515 VSS_514 VSS_416 VSS_417 VSS_418 VSS_419 VSS_414 VSS_415 VSS_513 VSS_512 AJ3 AH4 6 AH44 AH42 AH40 AH14 AG49 AG47 AG4 1 AG35 AG33 AG31 AG29 AG27 AG25 AG2 3 AG21 AG19 AG17 AG15 AG11 AG9 AG7 AG5 AG3 AF46 AF44 AF42 AF40 AF14 AE35 AE33 AE31 AE29 AE27 AE25 AE23 AE21 AE19 AE17 AE15 AE11 AE9 AE7 AE5 AE3 AD46 AD44 AD42 AD40 AD3 8 AD14 AC49 AC47 AC35 AC33 AC31 AC2 9 AC27 AC25 AC23 AC21 AC19 AC17 AC1 5 AC11 AC9 AC7 AC5 AC3 AB46 AB44 AB42 AB40 AB14 AA35 AA33 AA31 AA29 AA27 AA25 AA23 AA21 U23F BH30 BH28 BH26 BH24 BH22 BH20 BH18 BH16 BH14 BH12 BH2 BG9 BG7 BG5 BG3 BG1 BF50 BF48 BF46 BF44 BF42 BF40 BF38 BF36 BF34 BF32 BF30 BF28 BF26 BF24 BF22 BF20 BF18 BF16 BF14 BF12 BE9 BE7 BE5 BE3 BD48 BD46 BD44 BD42 BD40 BD38 BD36 BD34 BD32 BD30 BD28 BD26 BD24 BD22 BD20 BD18 BD16 BD14 BD12 BC49 BC9 BC7 BC5 BC3 BB46 BB44 BB42 BB40 BB38 BB36 BB34 BB32 BB30 BB28 BB26 BA9 BB12 BB14 BB16 BB18 BB20 AM44 AM42 AM40 AM38 AM14 AM10 AL49 AL47 AL41 AL39 AL35 AL33 AL31 AL29 AL27 AL25 AL23 AL21 AL19 AL17 AL15 AL11 AL9 AK46 AL3 Schematic Diagrams DDR2 SO-DIMM D02 1022 R388 R387 5P_50V_NPO_0 4 M_A_BS0 M_A_BS1 M_CS#0 M_CS#1 8 M _CLK_DDR#0 8 M _CLK_DDR1 C464 8 8 8 8 8 5P_50V_NPO_0 4 8 M _CLK_DDR#1 M_CKE0 M_CKE1 M_A_CAS# M_A_RAS# M_A_WE# DIM MA_SA0 DIM MA_SA1 M _CKE0 M _CKE1 M _A_CAS# M _A_RAS# M _A_WE# R372 1 0K_ 04 R373 1 0K_ 04 C46 6 C465 2,7,15 SMB_CLK 2,7,15 SMB_DATA *5 P_50V_ NPO_04 *5P_50V_NPO_0 4 R345 150_1 %_04 M_ODT0 M_ODT1 114 119 DIM MA_DM 10 26 52 67 130 147 170 185 D02 1210 8 M _A_DQS[7:0] R326 150_1 %_04 107 106 110 115 30 32 164 166 79 80 113 108 109 198 200 197 195 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 13 31 51 70 131 148 169 188 DIM MA_DQ S# 11 29 49 68 129 146 167 186 BA0 BA1 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1 DM 0 DM 1 DM 2 DM 3 DM 4 DM 5 DM 6 DM 7 DQ S0 DQ S1 DQ S2 DQ S3 DQ S4 DQ S5 DQ S6 DQ S7 DQ S0# DQ S1# DQ S2# DQ S3# DQ S4# DQ S5# DQ S6# DQ S7# M _A_ DQ0 M _A_ DQ1 M _A_ DQ2 M _A_ DQ3 M _A_ DQ4 M _A_ DQ5 M _A_ DQ6 M _A_ DQ7 M _A_ DQ8 M _A_ DQ9 M _A_ DQ10 M _A_ DQ11 M _A_ DQ12 M _A_ DQ13 M _A_ DQ14 M _A_ DQ15 M _A_ DQ16 M _A_ DQ17 M _A_ DQ18 M _A_ DQ19 M _A_ DQ20 M _A_ DQ21 M _A_ DQ22 M _A_ DQ23 M _A_ DQ24 M _A_ DQ25 M _A_ DQ26 M _A_ DQ27 M _A_ DQ28 M _A_ DQ29 M _A_ DQ30 M _A_ DQ31 M _A_ DQ32 M _A_ DQ33 M _A_ DQ34 M _A_ DQ35 M _A_ DQ36 M _A_ DQ37 M _A_ DQ38 M _A_ DQ39 M _A_ DQ40 M _A_ DQ41 M _A_ DQ42 M _A_ DQ43 M _A_ DQ44 M _A_ DQ45 M _A_ DQ46 M _A_ DQ47 M _A_ DQ48 M _A_ DQ49 M _A_ DQ50 M _A_ DQ51 M _A_ DQ52 M _A_ DQ53 M _A_ DQ54 M _A_ DQ55 M _A_ DQ56 M _A_ DQ57 M _A_ DQ58 M _A_ DQ59 M _A_ DQ60 M _A_ DQ61 M _A_ DQ62 M _A_ DQ63 R109 R110 *56_1%_04 *56_1%_04 M_A_A13 M_CS#1 M_A_BS0 M_A_A10 R104 R102 R82 R89 121_ 1%_04 121_ 1%_04 121_ 1%_04 121_ 1%_04 M_A_A3 M_A_A8 M_A_BS2 M_CKE0 R67 R50 R43 R41 121_ 1%_04 121_ 1%_04 121_ 1%_04 121_ 1%_04 M_A_BS1 M_A_A2 M_A_A6 M_A_A7 R83 R74 R60 R54 121_ 1%_04 121_ 1%_04 121_ 1%_04 121_ 1%_04 121_1%_04 121_1%_04 121_1%_04 121_1%_04 R113 R92 R78 R66 121_1%_04 121_1%_04 121_1%_04 121_1%_04 R49 121_1%_04 M _A_A1 M _A_A5 M _A_A12 M _A_A9 M _CS#0 M_A_RAS# M _A_A0 M _A_A4 M _A_A14 3 .3 VS R35 3 *2 0mil_sh ort 20MIL 1.8V DIMMA_VDDSPD C407 C406 R29 2.2U_6. 3 V_X 5R_04 1K_1%_0 4 0915 SDREFD 83 120 50 69 163 1 201 202 DDRVREF GEN. & DECOUPLING R28 C20 C21 C23 199 Tr a ce Wi dt h 1 2 M i l Sp a ce 20 M i l 47 133 183 77 12 48 184 78 71 72 121 122 196 193 8 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD1 0 VDD1 1 VDD1 2 VDDSPD NC1 NC2 NC3 NC4 NCTEST VREF GND0 GND1 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39 149 161 28 40 138 150 162 C130 C96 C100 C45 C5 5 C1 23 C1 24 C4 3 .1 U_10V_X7R_ 04 C46 .1 U_10V_X7R_ 04 C48 .1 U_10V_X7R_ 04 C44 .1 U_10V_X7R_ 04 .1U_10V_X7R_04 C68 .1U_10V_X7R_ 04 .1U_10V_X7R_04 C81 .1U_10V_X7R_ 04 .1U_10V_X7R_04 D03 0220 .1U_10V_X7R_04 .1U_10V_X7R_04 C108 220UF M 4VD .1U_10V_X7R_04 2.2U_6.3V_X5R_04 C429 + .1U_10V_X7R_04 2.2U_6.3V_X5R_04 + C127 .1U_10V_X7R_04 C347 .1U_10V_X7R_04 C364 .1U_10V_X7R_04 C359 .1U_10V_X7R_04 C356 1 C95 2 C76 150U_ 4V_ B2 C74 .1U_10V_X7R_04 0.9VS C56 2.2U_6.3V_X5R_04 2.2U_6 .3 V_X5R_04 B - 12 DDR2 SO-DIMM R75 R61 R45 R56 M _A_A11 M _CKE1 M_A_CAS# M _A_WE# AS0A421- N2RN-4F Layout note: Place capacitors between and near DDR connector if possible. C352 121_1%_04 121_1%_04 121_1%_04 121_1%_04 JDIM M1B 112 111 117 96 95 118 81 82 87 103 88 104 AS0 A42 1-N2RN-4F 1.8V R44 R40 R106 R97 1.8V .1U_10V_X7R_04 M_A_BS2 8 M_ A_BS2 8 M _A_BS0 8 M _A_BS1 8 M _CS#0 8 M _CS#1 C463 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 2.2U_6.3V_X5R_04 D02 1209 8 M _CLK_DDR0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 *2.2U_6.3V_X5R_04 *5 P_50V_ NPO_04 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16_BA2 1K_1%_0 4 C46 8 C467 *5P_50V_NPO_0 4 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85 .1U_10V_X7R_04 M _ A_ A0 M _ A_ A1 M _ A_ A2 M _ A_ A3 M _ A_ A4 M _ A_ A5 M _ A_ A6 M _ A_ A7 M _ A_ A8 M _ A_ A9 M _ A_ A1 0 M_A_A11 M_A_A12 M_A_A13 M_A_A14 D02 1210 Sheet 11 of 31 DDR2 SO-DIMM M _A_DQ[63 :0 ] 8 JDIM M1A M_A_A[14:0] 2.2U_6.3V_X5R_04 B.Schematic Diagrams 8 0.9VS 10K_1%_04 10K_1%_04 M_ODT0 M_ODT1 3.3VS 0.9VS 1.8V 2,6,7,9,12..23,25,26,28 8,27 8,9,25,27 Schematic Diagrams CH7317 SDVO to CRT 6 SDV OB_RED+ 6 SDV OB_RED6 SDV OB_GREEN+ 6 SDV OB_GREEN6 SDV OB_BLUE+ 6 SDV OB_BLUEZ1202 6 SDV OB_CLK+ 6 SDV OB_CLK- . L40 2 .5VS HCB1005KF-121T20 CH_AVDD R2 90 Z1211 39 Z1207 CH_RED 2.5 VS 10K_04 2 10U_6.3V_X5R_06 VIN 1 EN 2 36 VSYNC 18P_50V_NPO_04 D02 1003 X1H027000BI1H_27 MHXz Y2 6- 22-27 R00-1B 0 6- 22-27 R00-1B 7 13 35 C368 34 18P_50V_NPO_04 CHSYNC 13 C H 7 3 17 A 3 .3VS ( This t race sh ou ld ( +/ - 1 %) b e sho rt and wide) Z1210 R321 1. 2K_04 L46 L45 HCB1005KF-121T20 HCB1005KF-121T20 0_04 C384 22P_50V_NPO_04 R323 0_04 C383 22P_50V_NPO_04 R322 0_04 BLUE_VGA 13 C379 C372 C374 .1U_10V_X7R_04 R320 C377 C371 C373 .1U_10V_X7R_04 11 /20 10U_6.3V_X5R_06 Z1208 33 GREEN_VGA 13 RED_VGA 13 22P_50V_NPO_04 ? ? 22p for EMI M970715 EMI1210 Note : Place them close to CH7317 1A U21 C58 1 37 C382 J061297 2.5VS DISABLE 40 MIL C366 38 3 Z1206 40 Sheet 12 of 31 CH7317 SDVO to CRT 4 Z1205 41 .1U_10V_X7R_04 43 42 C363 10U_6.3V_X5R_06 44 C362 . 1U_10V_X7R_04 46 45 C355 10U_6.3V_X5R_06 57 56 AGND 55 54 SDVO_R53 SDVO_R+ 52 AVDD 51 NC 50 RPLL 49 AGND SDVO_G- SDVO_G+ 60 58 AVDD SDVO_B+ 59 62 AGND 61 SDVO_B- AVDD 64 SDVO_CLK- 63 SDVO_CLK+ 47 C358 10U_6.3V_X5R_06 .1U_10V_X7R_04 CH_GREEN R300 2. 5VS 48 Z1209 CH_BLUE 3.3VS 2. 5VS HCB1005KF-121T20 .1U_10V_X7R_04 .1U_10V_X7R_04 V3V HCB1005KF-121T20 .1U_10V_X7R_04 .1U_10V_X7R_04 VDAC2 ISET C370 CHSYNC GDAC0 C361 DVDD NC NC C367 VSYNC BSCAN 17 C360 10U_6.3V_X5R_06 16 11/2 0 DVDD 32 15 NC CH_DVDD DACA[0] HCB1005KF-121T20 DGND 30 14 . DGND SPC 31 L44 SPD VDAC0 2. 5VS 12 13 5.6K_1%_04 XI/FI N 29 6 SDVO_CTRLCLK R315 2.5 VS XO DGND NC 6 SDVO_CTRLDATA DGND 28 11 DVDD 27 10 NC *56P_04 NC CH7317 AS DACA[ 1] C365 9 NC DVDD 26 5.6K_1%_04 8 RESET* 25 R312 AS NC NC DVDD 24 *10K_04 SC_PROM GDAC1 R308 7 NC 10K_04 23 2.5 VS 6 R307 L43 DGND 22 2.5 VS L42 NC SD_PROM NC TP57 14.. 17,19,23 PCIRST# SC_DDC DACA[ 2] 5 21 4 SC_PROM 20 SD_PROM TP58 VDAC1 3 13 VGADDCCLK SD_DDC NC .1U_10V_X7R_04 2 13 VGADDCDATA NC GDAC2 .1U_10V_X7R_04 1 19 .1U_10V_X7R_04 11 /20 U24 18 C350 . . C351 . . C353 AME8816 VOUT R286 C346 C57 1K_1%_04 .01U_50V_X7R_04 10U_6. 3V_X5R_06 3 AME_ADJ GND 8 GND 7 GND ADJ 4 6 Max output current is 1A 5 GND Ra 23 CRT_PWR_DIS# Rb R293 5VS 3.3VS 9,13,16, 18..21,25 2,6, 7, 9,11,13..23, 25,26,28 976_1%_04 Vout = 1.24V ( 1 + Ra / Rb ) CH7317 SDVO to CRT B - 13 B.Schematic Diagrams C348 10U_6.3V_X5R_06 1 0K_0 4 11/2 0 Schematic Diagrams LVDS Conn, LCD Power, CRT 1 0P _ 50 V _N P O_0 4 Ra , Rb , R c(? ? ? ? ? 75 O) ? ? Int el So lut ion? , ? ? ? N B? ? C onnec to r? ? ? ? ? 1 50 O? ? 0820 foorprint 70M D D C D A TA C R T_ H S Y N C 5V S C 3 85 C R T_ V SY N C C 37 5 C1 4 0 C 1 54 7 6 6 6 6 L CDID0 L_ D D C _ C L K L_ D D C _D A T A L A_ D A T A P0 LA _ D A TA N 0 6 6 L A_ D A T A P1 LA _ D A TA N 1 6 6 L A_ D A T A P2 LA _ D A TA N 2 J _ LC D 1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 D03 0304 V E DI D L CDID 0 D D C LK C 13 3 Z 13 11 G ND VCC VCC V_ EDID ADJ C LK E D I D D AT A E D I D R XI N 0 R XI N 0 + G ND R XI N 1 R XE 1 + G ND R XI N 2 R XI N 2 + 1 0 K_ 0 4 1 0 K_ 0 4 D02 1015 R9 3 6 6 LCDID1 LCDID2 For Twinwill 1 PANEL TYPE 1 CPT CLAA089NACW 1 0 CPT CLAA089NA0FCW 0 1 1 1 1 1 29 5 VS C 5V S AC D1 2 *B A V 99 A AC C R T_ V S Y N C D8 B A V 99 30 Twinwill LC D D I 0 R 31 4 2 . 2K _ 1% _0 4 LC D D I 2 R 12 0 2 . 2K _ 1% _0 4 LC D D I 1 R 11 9 2 . 2K _ 1% _0 4 0828 INVETER 5 VS D 2 N 7 00 2W 3 3. V R 38 0 P LV D D 4 R 3 81 3 30 K _0 4 0829 G S S I 34 56 1B D V -T 1-E 3 R 2 82 C3 9 8 R3 3 5 R 32 8 . 0 22 U _ 16 V _X 7R _0 4 2 00 _ 1% _0 4 *10 0 K _0 4 D03 0304 1 00 K _0 4 L_ B K LT E N 23 B KL _ E N 4 I N V _ B LO N Z 1 31 5 U 22 R 28 1 C 34 5 7 4 AH C 1G 08 GW 1M_ 1% _ 04 * 10 0P _ 50 V _0 4 S 2 4. . 2 9 3 , 7, 9 , 14 , 15 , 1 7. . 1 9, 2 1, 2 3, 2 5. . 2 7 2 4, 2 5, 2 9 3 , 6, 7 , 14 , 20 , 2 2. . 2 5, 2 9 9 , 16 , 18 . . 21 , 2 5 2 , 6, 7 , 9, 1 1, 1 2 ,1 4 . 2. 3 , 25 , 26 , 28 9 , 14 , 19 . . 21 , 2 4. . 2 8 Q2 3 *2 N 7 00 2 W G Q 22 2 N 7 00 2W G 2 2 N 7 00 2W VIN 3 . 3V S Y S 1 5V V DD3 5 VS 3 . 3V S 5V 0 _ 04 1 3 D 6 Q7 G B - 14 LVDS Conn, LCD Power, CRT G 10 U _ 6. 3 V _X 5R _0 6 10 U _6 . 3 V_ X 5R _ 06 . 1U _ 1 0V _ X7 R _0 4 5 D03 0216 1 00 K _0 4 . 1 U _1 0 V _X 7R _ 0 4 R 37 8 * 10 mi l _s ho rt C 39 2 6 10 0K _ 04 D02 1003 C4 2 5 D D D G S D TC 11 4E U A R 35 1 Q 17 Q1 8 C 39 0 D D02 1015 R3 7 9 S D C B L_ V D D E N 3 VL ED D D 2 C 4 24 *0 . 1U _ 1 6V _ 04 Z 1 31 4 S 1 6 C 4 23 U 26 R 33 6 1M_ 1 %_ 04 1 M_ 1% _0 4 Z 13 0 4 Q2 1 A O3 41 5 S 6-15-34561-7E0 5 R 16 2 Z 1 30 3 0828 INVETER 3. 3 V S 2 D9 *B A V 99 5V 3 3. V S 0915 SWAP C R T_ H S Y N C D1 0 BA V 9 9 5 VS S Y S 1 5V 0917 3 . 3V S L _B K L TC TL 6, 2 3 LA _ C LK N LA _ C LK P LCD POWER SOURCE S Y S1 5 V 7 7 *1 0K _ 04 I N V _ BL ON C 2 F C M1 60 8 K-1 2 1T 06 _0 6 AC 2 F C M1 60 8 K-1 2 1T 06 _0 6 L 14 1 AC L 13 1 Z 13 10 LCDID0 D D C LK A Z 13 09 Q5 2 N 70 0 2W 5 VS L CDID1 L CDID2 V LE D J_LCD1 DD CDA T A F C M1 60 8K -1 21 T0 6 _0 6 A G 2 C D D G S Q6 2 N 70 02 W 4. 7 K _0 4 C S 1 2 CH S Y NC R 1 28 4 . 7K _ 04 2 F C M1 60 8 K-1 2 1T 06 _0 6 L181 1 2 V GA D D C C L K VIN L CDID1 L CDID2 0909 footprint M86TU JLCD1 R 1 42 A L 16 1 1 2 V GA D D C D A T A 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 G ND R XE C LK R X E C LK + G ND NC NC G ND G ND VL ED VL ED VL ED NC NC NC NC 87 1 26 -30 -06 5 VS R 14 9 R 14 7 0902 1 2 V S Y NC 2 20 P _5 0V _ 04 GN D 1 GN D 2 PLEASE CLOSE TO CONNECTOR D02 1009 P LV D D 0829 C 3 69 . 1 U _1 0 V_ X 7 R _0 4 C1 2 2 22 0 P_ 5 0V _ 04 C 10 9 2 20 P _5 0 V_ 0 4 C 92 22 0P _ 50 V _0 4 J_ C R T 1 C 10 54 0 -91 50 7- L 1 9 Z 1 30 1 2 24 mil 10 3 11 Z 1 30 2 4 12 5 13 6 14 7 15 8 C 1 51 F RED F GR N FBL U 10 P _5 0V _ N P O_ 04 C1 2 9 2 2P _ 50 V _N P O_0 4 C 11 2 22 P _5 0V _ N P O_ 04 Rc 75 _ 1% _0 4 Rb C8 0 2 2P _ 50 V _N P O _0 4 Ra R 1 14 7 5_ 1 %_ 04 Sheet 13 of 31 LVDS Con, LCD Power, CRT R9 8 75 _1 %_ 0 4 R 88 FC M16 0 8K -1 21 T0 6_ 0 6 FC M16 0 8K -1 21 T0 6_ 0 6 FC M16 0 8K -1 21 T0 6_ 0 6 1 0 P_ 5 0V _ N P O_0 4 1 2 R E D _V GA 1 2 GR E EN _V GA 1 2 B L U E _V GA 2 2 2 . 1U _ 10 V _X 7 R _ 04 A A C C AC A C L9 1 L1 0 1 L1 2 1 3. 3 VS R3 1 8 *2 0m li _s h ort D 7 BAV9 9 AC D6 B A V9 9 AC D5 B A V 99 ? : D1 4,D15,D 16? ? ? ? ? ? ? ? CHI P_SET ? ? ? ? ? ,? :Intel? 945GM? 2.5VS E B.Schematic Diagrams LVDS CONN 5V S *1 0U _6 . 3V _ X 5R _ 0 6 CRT PORT 0917 Schematic Diagrams SDIO, Mini Card, B/T, CCDI MINI CARD Bluetooth 3 .3 V W L A N1 .5 V S J _ MI N I 1 1 3 5 7 , 1 5 , 17 P C I E _ W A K E # R2 5 9 1 0 K_ 0 4 W L A N C L K R E Q# T P 66 T P 67 7 11 13 9 15 C R R G G 3 .3 VAUX_ 0 1 .5 V_ 0 U I M_ P W R U I M_ D A TA U I M_ C LK U I M_ R E S E T U I M_ V P P LK R E Q# E F CL K E F CL K + ND0 ND1 G ND 5 2 6 8 10 12 14 16 1 .5 VS 3 . 3V 20 mil 20 mil Z 1 4 39 Z 1 4 40 Z 1 4 41 Z 1 4 42 Z 14 2 0 R2 7 5 0827 C3 3 2 C3 2 9 . 1U _ 10 V _ X 7R _ 04 1 0 U _ 6. 3V _ X 5 R _ 0 6 2 3 8 0 P OR T _D E T # 23 3 IN 1 3 .3 V L38 3G -P OW E R *H C B 1 0 0 5K F -12 1 T 20 For WLAN Device CL _ CL K1 CL _ DAT A1 CL _ RST # 1 V D D3 FOR Debug CARD 17 19 37 39 41 43 45 47 49 51 G ND1 1 PET n 0 PET p 0 P E R n0 P E R p0 R es e rv e d0 R es e rv e d1 G ND1 2 3 .3 VAUX_ 3 3 .3 VAUX_ 4 G ND1 3 R es e rv e d2 R es e rv e d3 R es e rv e d4 R es e rv e d5 W _ D ISABL E# PER SET# S MB _ C LK S MB _ D A TA US B _ DU S B _D + 3 .3 VAUX_ 1 1 .5 V_ 1 1 .5 V_ 2 3 .3 VAUX_ 2 L E D_ W W A N # L E D _W L A N # L E D_ W P A N # 18 26 34 40 50 20 22 30 32 36 38 24 28 48 52 42 44 46 3. 3 V W L A N _ E N 23 P C I R S T # 12 , 1 5 . . 17 , 1 9 , 2 3 W DT _ EN 1 2 3 4 5 6 W D T _E N 23 R 2 32 B T _ E N# 1 0K _ 0 4 87 2 1 2-0 6 G0 Q1 5 2 N 7 0 0 2W G B T_ E N J_BT1 6 20 mil 40 mil 1 D02 1107 23 U S B _ W L A N _P N 7 7 U S B _ W L A N _P P 7 7 Z 14 3 8 R 28 3 0_ 0 6 3 .3 V 0825 FOOTPRINT L39 C han ge U SB P0- >U SB P7 M97 07 16 Sheet 14 of 31 SDIO, Mini Card, B/T, CCD W L A N 1 . 5V S 3 .3 V 20 mil 8 0 CL K 23 C3 4 4 . 1U _ 10 V _ X 7R _ 04 8 8 9 14 -5 2 04 D02 1015 1 0 U _ 6 . 3V _X 5 R _ 0 6 U S B _B T_ P N 2 U S B _B T_ P P 2 B T _ DE T # D 35 23 25 31 33 W L _ DET # T P 68 T P 69 T P 70 T P 71 . 1 U _ 1 0V _ X 7 R _ 0 4 J_ B T 1 7 7 23 D03 0106 G ND 6 G ND 7 G ND 8 G ND 9 GN D 1 0 C 32 6 S 23 G ND2 G ND3 G ND4 50mil C3 1 7 4 KE Y 21 27 29 3 V _B T L39 H C B 1 0 0 5K F - 12 1 T 20 50mil 0 _ 06 0818 foorprint SDIO CONN CCD CON 5 V _ CC D "1" : OFF S D_ CN 1 S D_ CD # S D_ CM D# V C C_ SDIO S D_ CL K 9 1 2 3 4 5 6 7 8 D A T2 _ S D C D / D A T3 _ S D C MD _S D VSS_ SD VD D_ SD C LK _ S D VSS_ SD D A T0 _ S D D A T1 _ S D C8 3 . 3V S V C C_ S D IO Q 8 S A O 3 40 9 D C9 40mil Q 11 Z 1 4 37 S C 2 2 4 . 1 U _1 0 V _ X 7R _0 4 Z 1 4 32 10 11 1 00 K _ 0 4 C2 3 8 R 20 9 C 23 2 . 1 U _ 10 V _ X 7 R _ 04 4 7 0_ 0 4 . 1 U _ 1 0 V _X 7 R _ 0 4 R1 9 8 1 U _ 6. 3 V _ X 5 R _ 0 4 1 U _ 6 . 3 V _ X5 R _ 0 4 C 22 6 J_CCD1 5 1 3 30 K _ 0 4 Z 1 4 33 J _ CC D1 8 7 21 2 -0 5G 0 SD1 PW R # 23 3. 3V S CC D_ E N From EC default HI s d r0 09 -x 0 -2 x1 1 D02 1016 C2 2 7 . 1 U _1 0 V _ X7 R _0 4 1 00 K _ 0 4 R1 8 8 6 S D _C D T S D _W P C 2 25 1 0 0 K _0 4 Q1 0 2 N 7 0 02 W G 7 US B _ CC D_ P N 6 7 U S B _C C D _P P 6 23 C C D _D E T # 1 2 3 4 5 S S D_ W P # R 1 97 R1 9 5 40 mil S hi e dl S h i el d SD_ D 1 S D _W P # A O3 4 0 9 1U _6 . 3 V _ X 5R _ 041 U _ 6 . 3V _X 5 R _ 0 4 40 mil G ND 1 GN D 2 6 6 40mil D D 6 SD_ D 0 S D _C D # SD_ D 2 SD_ D 3 S D _ C MD # G 6 6 6 6 6 5 V _ CC D L3 H C B 1 0 0 5K F - 12 1 T 20 G 5V VX8 00 SDIO PO WER OFF "0" : ON R1 9 9 R 25 4 R2 5 3 C 22 8 3 9K _ 0 4 1 0 K _ 04 10 K _ 0 4 . 0 1 U _ 1 6V _ X 7 R _ 0 4 0821 FOORPRINT OK S D _C MD # S D _C D # S D _W P # VD D3 1 .5 V S 5V 3 .3 V 3 .3 V S 3 , 6 , 7, 2 0 , 2 2. . 2 5 , 2 9 2 , 4 , 6, 7 , 9 , 1 5, 2 6 9 , 1 3, 1 9 . . 2 1, 2 4 . . 2 8 3 , 7 , 9, 1 3 , 1 5, 1 7 . . 1 9 , 21 , 2 3 , 25 . . 2 7 2 , 6 , 7, 9 , 1 1 . . 13 , 1 5 . . 2 3, 2 5 , 2 6, 28 SDIO, Mini Card, B/T, CCDI B - 15 B.Schematic Diagrams 3 .3 V S W AKE # C OE X 1 C OE X 2 Schematic Diagrams New Card Socket NEW CARD 3. 3VS 10m il .1U_10V_X7R_04 C146, C147: >>>Near to J_NEW1 for Nvidia platform >>>Near to S.B. for Intel platform D02 1107 12, 14,16,17 ,19,23 PCI RST# 4 U3 74AHC1G08GW 2 3.3V U20 C325 .1U_10 V_X7R_04 17 AVCC_AUX PERST# 3.3VS AUXOUT C306 Sheet 15 of 31 New Card Socket 2 .1U_10 V_X7R_04 12 1 23,25 SUSB# R255 R257 3.3V *10K_04 10K_04 4 5 13 14 16 3 NC_1.5V AVCC_1. 5V VOUT_1.5V 6 19 12, 14,16,1 7,19,23 PCI RST# 7 USB_OC4# NC_3.3VAUX 15 NC_3.3V VOUT_3.3V .1U_10 V_X7R_04 NC_RST# 8 AVCC_3. 3V 1.5VS C328 3 B.Schematic Diagrams 5 C461 1 SYSRST# OC# CPPE# CPUSB# 11 RCLKEN SHDN# GND GND 18 20 13 12 48 mil 48 mil C269 . 1U_10V_ X7R_04 C268 . 1U_10V_ X7R_04 C301 . 1U_10V_ X7R_04 C300 . 1U_10V_ X7R_04 14 15 9 10 NC_CPPE# NC_CPUSB# R3 9 R3 4 NC_RCLKEN R2 56 NC_SHDN# R2 58 *100K_04 *100K_04 *10K_04 *10K_04 3. 3V 7 7, 14,17 PCIE_WAKE# 2 NC_CLKREQ# 3.3VS 2 CL K_PCIE_NC 2 CL K_PCIE_NC# NC_CLKREQ# R227 D02 1107 C459 C460 .1U_10V_X7R_04 .1U_10V_X7R_04 Z1 503 Z1 504 2 0 PIN QFN ? ? +3. 3V +3. 3V +1. 5V +1. 5V CPPE# CPUSB# WAKE# CLKREQ# REFCLK+ REFCLK- 22 21 25 24 USB_PP4 USB_PN4 3 2 2,7, 11 SMB_DATA 2, 7,11 SMB_CLK 8 7 7 7 +3. 3VAUX 19 18 NC_ CPPE# D02 1022 PERST# 17 4 11 16 *10K_04 D02 1022 6 PEG_ RXP1_NC 6 PEG_ RXN1 _NC 6 PEG_ TXP1_NC 6 PEG_ TXN1_NC 7 21 1 1/2 0 0 819 J_NEW1 NC_PCI RST# . 1U_10V_ X7R_04 10 9 STBY# NC NC NC NC NC P2231NF C276 36 mil PERp0 PERn0 PETp0 PETn0 RESERVED RESERVED USB_D+ USB_DSMB_DATA SMB_CLK GND GND GND GND 5 6 NEW_RESERVED1 NEW_RESERVED2 1 20 23 26 130801 53-9 09 02 foorprint 13080153-9 D eat il A H1 2 3 4 5 H2 1 MTH237D111 9 8 7 6 2 3 4 5 H6 1 9 8 7 6 MTH237D111 2 3 4 5 H13 1 9 8 7 6 MTH237D111 2 3 4 5 H12 H15 H16 H17 C15 8D1 58 C158D158 C158D158 C158D158 H7 9 8 7 6 1 2 3 4 5 MTH237D111 1 9 8 7 6 ? ? ? MTH237D111 0917 CHANGE 710L H2 De ati l B H9 H6_5D2_ 3 H5 H5_5B6_5D3_7 B - 16 New Card Socket De ati l C & E H11 H8 C256D146 C256D146 ? ? ? M1 M- MARK M2 M-MARK M3 M-MARK M4 M-MARK M5 M-MARK M6 M- MARK M7 M-MARK M8 M-MARK D eat il D H3 H14 H4 H5_0 B2_2D2_0 H5_ 0B2_2D2_0 C237B128 D1 07 D02 1208 H1 0 C1 18B237D87 D03A 0428 3.3VS 1.5VS 3.3V 2,6, 7,9,11. .14,16 ..23,2 5,26,28 2,4, 6,7,9, 14,26 3,7, 9,13,14 ,17..1 9,21,23, 25..27 Schematic Diagrams JMH 330 SATA Reserve for measure SATA Eye Pattern. Bypass CAP must place close to power pins P D D [ 15 :0 ] 7 P IN# 4 SATA HDD 1 3. 3V S R N 10 8P 4R X3 3_ 04 3. 3V S I DE _ DD 7 I DE _ DD 8 I DE _ DD 6 I DE _ DD 9 U 30 5 6 D D 2 / DD 1 5 D D 1 2/ D MAR Q V CCO1 D D 3 / DI O W n 7 8 D D 1 1/ D I O R n D D 4 / DMA C K n 1. 8V S ID E _D D 4 GND 18 . VS ID E _D D 1 0 C 439 C 434 1U _6 . 3V _X5 R _04 . 1U _1 0V _X7 R _0 4 9 10 GNDO V CCK 1 ID E _D D 5 11 I E _D D 9 D ID E _D D 6 ID E _D D 8 12 13 14 D D 1 0/ I N TR Q D D 5 / GP I O 2 ID E _D D 7 15 1 1 1 1 11 28 2 2 I D E_ RE S ET _N PO R _N 3. 3V S R 3 95 T P5 1 X5 1 2 3. 3V S R 396 R 397 4 (LQFP64) MO D E 0 MO D E 1 MO D E 2 A TA I O E N X TA LI / O SC I I D E _D D 0 I D E _D D 1 5 I D E_ DMA R Q I D E _D I O W_ N DO I W n/ D D 3 D I OR n / D D 11 58 57 C 4 40 I D E _D A 1 . 1 U _10 V_ X7R _ 04 D A 1/ D D 9 D A 0/ D D 6 50 I D E _D A 0 49 48 47 46 I D E _D A 2 I D E _C S 0_ N 45 44 UA O 3 . 3V S 43 42 UA I GN D 41 1 . 8V S D A 2/ D D 8 C S0 n/ D D 7 P H YR D Y P IN# 24 C 45 4 . 1U _ 10V _X 7R _ 04 1 0U _6 . 3V _X 5R _0 6 D 03 01 09 10 U _6 .3 V_ X5 R _06 C 4 53 C 455 40 39 SA TA R XP 0 SA TA R XN 0 27 28 RXP P MEN FX D MA 38 37 AV D D L GN D 29 30 RXN A V DDL C L KS E L1 C L KS E L0 36 35 A GN D 2 S S C EN D A S Pn / GP I O 0 34 33 T XN T XP MS S EL / GP I O 1 SA TA T XN 0 31 S AT AT XP 0 32 3. 3 VS I D E _I N TR Q AV D D H C 4 52 22P _5 0V _N P O _04 1 . 8V S I D E _D MA C K_ N 53 52 51 C S 1n / R ES E Tn I DE _ DD 1 0 I DE _ DD 4 I DE _ DD 1 1 08 25 D 02 R 39 0 *0 _ 04 R 39 1 R 39 4 *0 _ 04 *0 _ 04 S A TA RX P 1_L S A TA RX N 1_ L S A TA TXN 1 _L R 39 3 *0 _ 04 S A TA TXP 1_ L 12 09 S1 8P 4R X3 3_ 04 1 8 P DD5 S2 S3 2 3 7 6 S4 S5 4 5 P D D 10 P DD4 P D D 11 S6 S7 SA TA T XP 0_L SA TA T XN 0_ L C 4 35 C 4 36 SA TA R XN 0 _L SA TA R XP 0_ L C 4 37 C 4 38 .0 1U _1 6V _X 7R _0 4 .0 1U _1 6V _X 7R _0 4 S AT AT XP 0 S AT AT XN 0 .0 1U _1 6V _X 7R _0 4 S AT AR X N 0 S AT AR X P0 .0 1U _1 6V _X 7R _0 4 3. 3V S R 412 I DE _ DD 3 R N 12 8P 4R X3 3_ 04 1 8 P DD3 I DE _ DD 1 2 2 7 I DE _ DD 2 I DE _ DD 1 3 3 4 6 5 P1 P2 P D D 12 P3 P DD2 P D D 13 P4 P5 P6 P7 8P 4R X3 3_ 04 1 8 P DD1 2 7 P D D 14 3 6 P DD0 P8 P9 I DE _ DD 1 4 I DE _ DD 0 I DE _ DD 1 5 4 P IN# 41 P1 2 P1 3 C 44 9 P1 4 P1 5 10 K _ 04 I D E _C S 1_ N I D E _P D I AG _ N R N 13 3. 3V S TP 6 4 TP 6 5 P HY RDY GN D GN D GN D I DE _ DD 1 P IN #44 1 . 8V S 5 P D D 15 8P 4R X8 2_ 04 I DE _ DA 0 1 8 P D A0 I DE _ DA 2 2 7 P D A2 I DE _ CS 0_ N 3 6 P D C S1 # . 1 U _10 V_ X7R _ 04 . 1 U _10 V_ X7 R_ 04 I DE _ CS 1_ N 4 5 P D C S3 # C 441 *1 0U _1 0V _0 8 5 VS Z1 72 2 Z1 72 3 Z1 72 4 Z1 72 5 508 13 -0 220 P -0 01 PD A 0 7 PD A 2 7 P I N G N D1 ~ 2= GN D PD C S 1# 7 PD C S 3# 7 C 4 42 *. 01U _ 16V _X 7R _0 4 P1 0 P1 1 R N 14 C 4 50 TP 50 3 . 3V S GN D I D E _D A S P_ N MS S EL D0 3 0 10 6 C 447 C 445 C 446 C 443 C 448 + C 44 4 Sheet 16 of 31 JMH 330 SATA 08 23 fo ot pri nt M5 4R TP 49 I D E _D MA RQ I D E _D I O W_ N JMH 3 30A P C 1- TG C C I D E _D I O R _N I D E _I O R D Y 1. 8V S R 3 98 I DE _ DD 5 PI N#5 6 I D E _D I O R _N GN D 1 . 8V S I D E _I O R D Y 56 55 54 PD I A G n/ P AT AO R U AO V CCO2 CL OS E J _H DD1 CN N J _H D D 2 GNDK 2 VC C K 3 GNDK 1 VC C K 2 H SX 531 S _25 MH z 2 2P _5 0V _N P O _04 60 59 6 5 R N 11 I OR D Y D MAC K n/ D D 4 U AI X TA LO A V DDH A GN D 1 R E XT 24 AV D D H GN D 25 1 2K 1%_ 04 R EX T 2 6 *32 mil _s hor t 3 JMH 330 R E S ET n/ C S 1n P OR n 0 1 62 61 I N TR Q / D D 10 SPG / P I O 2/ D D 5 D D 8 / DA 2 D D 7 / CS 0n 6 7 8 9 22 23 R 40 4 R 40 5 R 40 6 R 40 7 I D E _D MA CK _N R 40 8 I D E _I N TR Q R 40 9 I D E _D A 1 R 41 1 *32m li _sh or t AV D D L 22 _ 04 PD D R E Q 82 _ 04 PD D I O W# 82 _ 04 PD D I O R # 22 _ 04 PD I O R D Y 82 _ 04 PD D A C K# 22 _ 04 IN T _I R Q 14 82 _ 04 PD A 1 P D DR E Q 7 PD D I O W # 7 P D D I OR # 7 PD I O R D Y 7 PD D A C K # 7 I N T_ IR Q 1 4 7 P DA 1 7 P IN# 29 1 0U _6 . 3V _X 5R _0 6 C 45 7 10 U _6. 3V _ X5 R_ 06 C 456 C 45 8 M i cr o S AT A . 1U _1 0V _X 7R _ 04 C 4 51 GN D 3. 3V S D 02 3. 3V S XTA L_ I N XTA L_ O U T 1M_1 %_0 4 D D 9 / DA 1 D D 6 / DA 0 DD 1 4/ D D 1 DD 0 / D D 13 DD 1 5/ D D 2 D MA R Q / D D 12 3 4 10 0U _6 .3 V _B 2 3 4 I D E _D D 1 I D E _D D 1 4 1U _6 . 3V _X 5R _0 4 I D E_ D D1 2 33 . VS ID E _D D 3 I D E_ D D1 1 64 63 10 U_ 6. 3V _X 5 R_ 06 . 1U _1 0V _X 7R _0 4 DD 1 / D D 14 .1 U _1 0V _X 7R _0 4 D D 1 3/ D D 0 .1 U _1 0V _X 7R _0 4 1 2 P DD7 P DD8 P DD6 P DD9 .1 U _10 V _X 7R _0 4 P IN# 9 I D E_ D D1 3 ID E _D D 2 8 7 I D E _R E SE T _N R 3 99 33 _04 P CI R S T# 3 . 3V S P C IR S T# MI C R O _S AT A2 1 2, 14 ,1 5, 17 , 19, 2 3 1 2 3 R 41 3 MI CR O_S AT A 4 5 1 6 7 10 K _ 04 ID E _D A S P_ N R4 03 100 _04 H DD _ LE D # 5V S 3. 3V S 8 9 H D D _L ED # 2 2 Place RH2/R17 close to IDE Connector 10 11 16 12 13 08 26 14 15 SA TA R XP 1_ L SA TA R XN 1 _L SA TA TX N 1_L SA TA TX P1 _L 16 *85 20 3- 16 x2 CHECK CONNECTOR SPEC JP1 use male conne ctor JP 1 use fema le co nnec tor and pass thro ugh C able . an d unu sed C able. R15=NC, R16=100 5 VS 1. 8V S 3. 3V S 0911 9, 13 1 , 8. . 21 ,2 5 25 2, 6, 7, 9 , 11. . 15 , 17. . 23 , 25, 2 6, 28 R15=0, R16=NC JMH 330 SATA B - 17 B.Schematic Diagrams R 3 92 4 7K _04 C 43 3 1 2 Schematic Diagrams PCI-E LAN RTL8102E 3 .3 V L A NV D D3 R2 1 9 4 0 mil 4 0 mil C2 4 0 C3 0 2 C3 2 1 C3 2 2 . 1U _ 1 0V _ X 7 R _ 0 4 . 1 U _ 1 0V _X 7 R _ 0 4 . 1 U _ 1 0V _X 7 R _ 0 4 . 1 U _ 1 0V _X 7 R _ 0 4 L A N _ A VDD 3 R2 1 8 ? B4 W? ? ? ? 6 -1 9- 41 00 1- 25 3 R T L_ N C 3 3 0 mil *3 2 m i l_ s h or t Sheet 17 of 31 PCI-E LAN RTL8102E C2 5 0 C2 3 9 . 1 U _ 1 0V _X 7 R _ 0 4 . 1 U _ 1 0V _X 7 R _ 0 4 D03A 0428 Del RN1 1. 2 D V D D For ? ? ? ? EEPROM D M LM X 0- _R 1 D M LM X 0+ _ R 2 D M LM X 1- _R 3 D M LM X 1+ _ R 4 L A NV DD 3 D M L MX 0 D M L MX 0 + D M L MX 1 D M L MX 1 + 8 7 6 5 L A N _E V D D 12 2 0 mil N C2 S H OR T R T L _N C 1 R T L _N C 2 C 2 97 C 2 82 1 U _6 . 3 V _ X 5R _ 0 4 1 U _6 . 3 V _ X 5 R _ 0 4 5 8 11 14 22 28 25 31 L A N_ E G ND 23 24 6 P E G _L A N _ R X P 0 6 P E G _L A N _ R X N 0 C 3 08 C 3 09 2 C LK _P C I E _ L A N 2 C LK _P C I E _ L A N # 7 , 14 , 1 5 P C I E _ W A K E # 1 2 , 1 4. . 1 6 , 1 9 , 2 3 P C I R S T # 3 .3 V S 7 I S O LA TE B . 1 U _ 1 0 V _ X 7R _ 04 PC IE_ RXP0 _ L AN_ C 2 9 . 1 U _ 1 0 V _ X 7R _ 04 PC IE_ RXN 0_ L AN _C 3 0 CLOSE 29 & 30 PIN 26 27 R2 2 6 0_ 0 4 L AN W AKEB 19 R2 3 0 0_ 0 4 Z1801 20 R2 2 0 2. 49 K _ 1 % _0 4 R SET R2 6 0 1K _1 % _ 0 4 Z1802 R2 6 2 *0 _ 04 64 36 Z 1 80 7 6 2 R 26 1 R2 2 9 1 5 K _ 1% _ 0 4 *0 _ 04 58 52 49 43 41 38 33 32 21 15 53 46 37 16 L A N_ E G ND 6 P E G _ LA N _ T XP 0 6 P E G _ LA N _ T XN 0 EEC S EE SK EED I E E DO A V DD 1 8 A V DD 1 8 A V DD 1 8 A V DD 1 8 E V DD 1 8 E V DD 1 8 E GN D E GN D HS IP HS IN U19 V D D1 5 V D D 15 V D D1 5 V DD 1 5 V D D1 V DD 1 5 V D D 15 V D D1 5 V D D 15 V D D1 5 . 1 U _1 0 V _ X 7 R _ 0 4 EECS EESK EEDI EEDO 3 4 D M D I O 0+ D M D I O 0- 6 7 DM DIO 1 + DM DIO 1 - 9 10 R T L _M D I P 2 R T L _M D I N 2 12 13 R T L _M D I P 3 R T L _M D I N 3 R2 1 4 * 10 K _ 0 4 R2 1 3 3 . 6 K _ 1% _ 0 4 LN 1 MD I P 0 MD I N 0 MD I P 1 MD I N 1 RTL8102E MD I P 2 MD I N 2 MD I P 3 MD I N 3 RE F C L K _ P RE F C L K _ N LE D 0 LE D 1 LE D 2 LE D 3 LA N W A K E B P E RS T B V CT RL 1 8 V CT RL 1 5 RS E T I S OL A T E B CKT A L 2 CKT A L 1 D M L MX 0 D M L MX 0 + D M L MX 1 D M L MX 1 + 8 P 4 R X0 _ 0 4 TF1 L F - H 8 0P - 1 0414 L N1 C HA NG E T O RN 15 D03 0109 *1 0 K _ 0 4 Z1 82 2 Z1 82 3 1. 2A V D D 57 56 55 54 7 8 4 5 D M D I O 1+ D M D I O 1- 1 2 DR D_ CT DT D_ C T 3 6 C2 4 7 C3 1 9 C3 1 8 . 1 U _ 1 0V _X 7 R _ 0 4 . 0 1U _ 50 V _ X 7 R _ 0 4 . 0 1 U _ 5 0V _ X 7 R _ 0 4 T D+ T D- T X+ TX- N C N C N C N C R D+ R D- R X+ RX - R D_ CT T D_ C T RX _ CT T X _ CT 10 9 D ML M X0 + _ R D ML M X0 -_ R 12 13 Z1824 Z1825 16 15 D ML M X1 + _ R D ML M X1 -_ R 14 11 D RX _ CT D T X_ C T J _R J 1 C 1 0 0 91 -1 0 8 A 4 D M LM X 0+ D M LM X 0D M LM X 1+ D M LM X 1- DD C_ NP DD D_ NP R 1 91 R1 9 2 R 18 9 7 5 _ 1% _ 0 4 7 5_ 1 % _ 04 7 5 _1 % _ 0 4 R1 9 0 DA+ DADB+ DB- 4 5 7 8 L A N _ C LK O L A N_ CL K I 0826 foorprint m74 X4 RTL 8102E Z 1 8 27 2 1 3 4 H S X 53 1 S _ 2 5M H z C2 9 0 R2 4 8 10 0 0 P _ 2K V _1 2 C 2 73 C 244 C2 4 3 C3 2 0 C3 1 4 C2 5 9 . 1U _ 10 V _ X 7 R _ 0 4 . 1U _ 10 V _ X 7 R _ 0 4 . 1U _ 10 V _ X 7 R _ 0 4 . 1U _ 1 0V _ X 7 R _ 0 4 . 1 U _ 1 0V _X 7 R _ 0 4 . 1 U _ 1 0V _X 7 R _ 0 4 C2 7 7 2 7P _5 0 V _ N P O _ 0 4 27 P _ 5 0 V _ N P O _ 04 *0 _ 0 4 L A N _ DE T E C T 7 11/20 3. 3 V S 3. 3 V 1. 8 V B - 18 PCI-E LAN RTL8102E G ND 1 G ND 2 DC + DC DD + DD - C2 2 0 61 60 s h i e ld s h i e ld D0 2 12 08 Z 1 8 26 40 mi l 1 2 3 6 7 5_ 1 % _ 04 1 . 2 D V DD 4 0 mil 1 63 8 7 6 5 . 1 U _ 1 0V _X 7 R _ 0 4 D EL ET E U1 6 D M D I O 0+ D M D I O 0- PCI-E LAN B 4W RN 1 5 D M LM X 0- _R 1 D M LM X 0+ _ R 2 D M LM X 1- _R 3 D M LM X 1+ _ R 4 C2 4 6 D03A HS O P HS O N GV D D 44 48 47 45 R2 1 5 N C NC N C NC NC N C NC N C NC C 2 41 . 1 U _1 0 V _ X 7R _ 0 4 RT L _ N C4 1 7 R T L _ NC 5 1 8 34 35 39 RT L _ NC 6 4 0 42 50 51 CLOSE PIN 5 & 8 C 2 42 V D D3 3 V DD 3 3 V D D3 3 V D D3 3 2 59 1 .2 DV D D A V DD 3 3 AV D D3 3 B.Schematic Diagrams *3 2 m i _l s h ort 2, 6, 7 , 9 , 1 1 . . 1 6, 1 8 . . 2 3 , 2 5, 2 6 , 2 8 3, 7, 9 , 1 3 . . 1 5 , 18 , 1 9 , 2 1, 2 3 , 2 5 . . 2 7 8, 9, 1 1 , 2 5 , 27 Schematic Diagrams Audio Codec ALC269 QFN CODEC ALC269 L 19 H C B 1 0 0 5K F -1 2 1T 2 0 PIN25,PIN38 ? 1? 10uF/.1uF R 1 56 3 .3 V S L17 3. 3V S _ A U D H C B 10 0 5 K F -1 2 1 T 2 0 *1 0 m i _l s h o r t 3. 3V S _ A U D C 3 95 . 1U _ 1 0 V _ X7 R _ 04 C 1 71 10 U _ 6. 3V _X 5 R _0 6 5 V S _ A UD 5 VS Layout Note: U 13 C 389 C1 5 7 . 1 U _ 10 V _ X 7 R _0 4 10 U _ 6 . 3V _X 5 R _ 06 4 C4 1 6 C 198 . 1U _ 1 0V _ X7 R _ 04 1 0 U _ 6. 3 V _X 5 R _0 6 O UT S HD N# C 3 96 5 VS 3 Z1 944 5 Very close to Audio Codec 1 2 BY P Z 1 93 8 . 1 U _ 1 0 V _ X7 R _ 0 4 V IN C1 8 9 1 0 U _ 6 . 3 V _ X 5R _ 0 6 H C B 1 00 5 K F - 12 1 T 2 0 1 U _ 6 . 3 V _ X 5R _ 0 4 * G9 2 4 C3 9 3 L26 GN D C 4 08 AUD G AUD G * 0. 1U _ 1 0V _X 7 R _ 04 . 1U _ 1 0 V _ X7 R _ 04 3 .3 V C4 0 9 3 .3 VS C 190 3. 3V S _ A U D . 1U _ 1 0V _ X7 R _ 04 C 176 C 200 C 213 1 0 U _ 6. 3 V _X 5 R _0 6 R1 6 1 Low mute! R3 3 1 C1 8 1 D02 1208 AUD G A UD G U 11 7 4 A H C 1 G0 8 G W 4 S P K OU T L + S P K OU T L - 40 41 D 14 A *S C S 3 5 5 V C S P K OU T R S P K OU T R + 44 45 Z 19 4 5 S PDIF O 47 48 Z 19 0 2 Z 19 0 3 D02 1208 2 3 PD # 25 38 MI C 2 - L M I C 2 -R S P K -R S P K -R + S e n s e-B S PD IF C 2 /EAP D S PD IF O J D RE F M ON O - OU T G P I O0 G P I O1 B IT -C L K R 330 A Z _ S DI N 0 _ R 3 3 _1 % _ 0 4 MI C 1 -V R E F O - L M I C 1 -V R E F O -R MI C 2 - V R E F O S Y NC R ESET # Z 19 0 4 C 3 94 Z 1 9 05 12 PC BEEP J D _S E N S E 14 15 Z1914 Z1913 R 3 44 HP _ S E NS E 3 9 . 2 K _ 1 % _0 4 2 1 R 36 7 4 .7 K _ 0 4 16 17 M IC2 _ L M IC2 _ R 18 Z1912 19 20 Z1911 Z1910 C 402 C 4 04 4 . 7 U _ 6 . 3 V _ X 5R _ 0 6 4 . 7 U _ 6 . 3 V _ X 5R _ 0 6 J _ I NT M IC1 I N T _ MI C R 371 Z19 15 7 5_ 1 % _ 0 4 1 2 C 42 0 8 5 2 05 - 0 2 0 0 1 R 355 6 8 0 P _ 5 0 V _ X7 R _ 0 4 2 0 K _ 1 % _0 4 P C B F oo t p ri n t = 8 5 2 05 -0 2 0 0 21 22 Z1908 Z1909 23 24 Z1907 Z1906 C4 1 8 27 Z1939 C4 1 9 28 30 29 M I C 1 -V R E F O- L M I C 1 -V R E F O- R M I C 2 -V R E F O 32 33 H E A D P H ON E -L H E A D P H ON E -R 35 Z1941C 415 36 34 Z1940 Z1942 A UD G . 1 U _1 0 V _ X 7 R _ 0 4 A U DG 1 U _ 6. 3 V _X 5 R _0 6 A UD G D03 0216 2 .2 U_ 6 .3 V_ X5 R_ 0 4 C BN 1 U _6 . 3 V _ X 5 R _ 0 4 C R V RE F 1 K_ 1 % _ 0 4 1 0 0P _5 0 V _ 0 4 AVSS 1 A VSS2 1 0 K_ 0 4 H P -OU T - L H P -O U T -R G N D R 327 P VSS1 PVS S2 R 157 C1 5 9 13 V RE F S D A T A -I N 11 A C _R S T # K B C _B E E P 8 10 7 A C_ S Y NC _ CO DE C 7 L IN E 1 -L L I N E 1 -R 6 AC _ BIT _ CL K 7 A C _ S D A TA I N 0 MI C 1 - L M I C 1 -R ANALOG S D A T A -O U T D VSS2 7 Se n s e A L IN E 2 -L L I N E 2 -R S P K -L + S P K -L - DIGITAL 5 7 A C _ S D OU T _C O D E C CB P O PVEE 5 3 C4 1 7 6 31 26 37 49 7 42 43 C 397 . 1U _ 1 0V _X 7 R _ 04 Sheet 18 of 31 Audio Codec ALC269 QFN J_INTMIC1 MI C 2 -V R E F O A V DD 1 AVD D 2 M U T E A P M# DV DD 1 4 2 K B C _ MU T E # 39 46 1 U 29 P V DD 1 PVD D 2 10 0 K _ 0 4 Z19431 D V D D -I O *0 . 1 U _ 10 V _ X 7 R _ 0 4 5 S C S 3 5 5V A 3 23 D1 3 C S B _ MU T E # 9 1 0 0K _0 4 7 0 . 1 U _ 6 . 3 V _ X 7R _ 0 6 0 . 1 U _ 6 . 3 V _ X 7R _ 0 6 0 . 1 U _ 6 . 3 V _ X 7R _ 0 6 4 1 2 AL C2 6 9 Q F N 2 . 2 U _ 6 . 3 V _ X 5R _ 0 4 SOLDER SIDE VIEW A U DG A U DG H P_ SEN SE PC BEEP 23 H E A D P H O N E -R R 174 7 5 _ 1% _ 0 4 P H O NE -R H E A D P H O N E -L R 183 7 5 _ 1% _ 0 4 P H O NE -L KBC _ BEEP C1 5 8 1 U_ 6 .3 V _ X 5 R_ 0 4 7 L 20 F C M1 0 0 5K F -1 2 1T 0 3 1 2 Z 1 9 35 5 J _ H P1 4 R 3 KBC _ BEEP SP KR C4 6 2 1 U_ 6 .3 V _ X 5 R_ 0 4 1 2 L 21 F C M1 0 0 5K F -1 2 1T 0 3 SPEAKER CONNECTOR Z 1 9 36 Z 1 9 37 C 201 C 19 9 1 0 0 P _ 5 0 V _ 04 1 0 0 P _ 50 V _ 0 4 2 L 6 1 2 S J -S 3 5 1-S 3 0 HEA DPH ONE GREE N 2 1 B A R C O D E _R I N G D02 1209 C 2 07 A U DG S P K OU T R + S P K OU T R - L23 F C M 1 0 05 K F -1 21 T 0 3 1 2 1 2 0818 foorprint L39 * 1 U _ 1 0 V _ 06 S P K OU TR + _ R S P K OU TR -_ R F C M 1 0 05 K F -1 21 T 0 3 L22 J _ SPK1 S P K OU T L S P K OU T L + L24 F C M 1 0 05 K F -1 21 T 0 3 1 2 1 2 F C M 1 0 05 K F -1 21 T 0 3 L25 1 2 3 4 S P K OU TL -_ L S P K OU TL + _ L C 2 09 C2 1 0 C2 0 8 C 2 11 C 212 * 1 U _ 1 0 V _ 06 *1 8 0 P _ 5 0 V _ 04 *1 8 0 P _ 5 0 V _ 04 * 18 0 P _ 5 0 V _ 0 4 * 1 8 0P _5 0 V _ 0 4 1 2 3 4 1 .5 VS 3 .3 VS 5V S 3 .3 V 2 , 4 , 6 , 7 , 9 , 1 4, 1 5 , 2 6 2 , 6 , 7 , 9 , 1 1. . 17 , 1 9 . . 2 3 , 2 5 , 2 6, 28 9 , 1 3 , 1 6, 19 . . 2 1 , 2 5 3 , 7 , 9 , 1 3 . . 1 5, 1 7 , 1 9 , 2 1 , 2 3, 25 . . 2 7 8 7 2 12 -0 4 G 0 6-20-41A00-104 Audio Codec ALC269 QFN B - 19 B.Schematic Diagrams C4 0 1 Schematic Diagrams Touch Panel Control COMPORT IT8709E D02 1126 3 . 3V S 3. 3V D02 1126 S 3. 3 V S OS C 1 R4 1 6 0 _0 4 *0 _ 04 3 U 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 S 3 .3 VS S 3 . 3V S TO GPS 20 G P S _ R X D 1 4 . 7K _0 4 20 G P S _ TX D 1 D02 1210 GP I O 30 UP 164E/164F LOW 2E/2F R1 9 6 *5 6 0 _0 4 Sheet 19 of 31 Touch Panel Control 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VSS A V CC VST BY C LK I N D C D # / G P I O2 1 / C I R 1T X AVSS D S R # / GP I O 2 2 / C I R 1 R X C L K R U N # / G P I O2 0 S I N / C I R 0T X / GP I O2 3 L P C P D # / G P I O1 7 R TS # / C I R 0 R X / G P I O2 4 S E RI RQ S O U T / W U I N T R # / GP I O 2 5 LP C R S T # C TS # / G P I O2 6 / E D 1 L A D3 R I # / G P I O2 7 / E D 0 L A D2 D TR # / GP I O 30 / B A D D R L A D1 F I R R X / GP I O3 1 L A D0 F I R TX / G P I O3 2 L F R A ME # VSS V CC F I R R X 2 (B W )/ GP I O 3 3 L P C CL K VC C VSS E R R # / GP I O 3 4 L D R Q# S L C T / G P I O3 5 P E / G P I O1 6 S T B # / GP I O 0 0 B U S Y / G P I O1 5 P D 0 / GP I O0 1 A C K # / G P I O1 4 P D 1 / GP I O0 2 S L I N # / G P I O1 3 P D 2 / GP I O0 3 A F D # / G P I O1 2 P D 3 / GP I O0 4 I N I T # / G P I O1 1 P D 4 / GP I O0 5 P D 7 / G P I O1 0 P D 5 / GP I O0 6 P D 6 / G P I O0 7 OU T GN D VC C OE 2 Note for pin 2: If needs to support power on from IT8305 CIR, please connect pin2 for "VSTBY". If don't need to support power on from IT8305 CIR, please connect pin2 for "V33". 1 48 M H z-D S O7 5 1 S V CL K IN AVSS CL K RU N# LP C P D # 6-P 22 -48 R0 0- 1BA AVSS R 20 6 R 20 5 1 0 0 _1 % _ 04 C L K _ R U N # 6 , 23 4 .7 K_ 0 4 S3 .3 V S INT _ S E RI R Q 6 ,2 3 P C I R S T # 12 , 1 4 . . 17 , 2 3 LP C _ A D 3 6 , 23 D02 1126 LP C _ A D 2 6 , 23 S 3 . 3V S LP C _ A D 1 6 , 23 L28 LP C _ A D 0 6 , 23 L P C _ F R A ME # 6 , 2 3 S3 .3 V S L P C_ CL K 6 L D R Q# R 20 1 4 .7 K_ 0 4 S3 .3 V S 11/20 AVC C H C B 1 00 5 K F -1 21 T 2 0 C 23 4 C2 3 5 . 0 0 1 U _ 50 V _ X 7R _ 04 . 1 U _1 0 V _ X7 R _0 4 D02 1126 R 20 7 5 60 _ 0 4 AVSS I T 8 70 9 E 3. 3 V S TOUCH PANEL V C 33 U 12 C D2 0 Z 2 01 8 B A V 99 Z 2 03 3 Z 2 01 7 Z 2 01 6 LR LL Z 2 0 23 10 Mils VREF E E P _ CS E E P _ C LK W IP UL _ S EN L L _ CN LL _ C P Z2 014 Z2 013 Z2 021 Z2 012 1 0 0_ 1 % _0 4 R3 5 9 1 0 0_ 1 % _0 4 Z 2 0 24 D02 1027 10 Mils 3 .3 V S Z 2 0 25 5 . 1 _ 1% _ 04 5 . 1 _ 1% _ 04 1 0 0_ 1 % _0 4 R C S 11 0 0 1 2 3 N S N G PD N D PG PS 6 5 4 Z2027 Z2028 Z 20 1 0 Z 2 0 26 Z 20 0 9 AC L R_ X P Z 2 0 08 D1 9 BAV9 9 6-06-00099-011 L L _Y P NS NG PD ND PG P S B - 20 Touch Panel Control A A O 76 0 0 R 17 9 *0 _0 4 R 16 4 *0 _0 4 R1 6 8 1 2 3 4 5 J_TP1 1 5 8 52 0 2 -05 L L_ Y P 0821 FOORPRINT OK 0 _0 4 R178,R168 FOR ELO TYPE R179,R164 FOR 3M TYPE 10 Mils U 25 1 2 3 W IP L R_ X P C1 9 4 . 0 1U _5 0 V _ X7 R _0 4 2 0 K _ 1% _ 04 Z 2 0 06 Z 20 0 7 C C 6-06-00099-011 D02 1107 0_ 0 4 VC3 3 V C 33 D 21 BAV9 9 R 17 8 0 91 1 Z 20 1 1 C1 5 3 . 1 U _1 0 V _ X7 R _ 0 4 0 _0 4 10 Mils R3 5 7 R3 5 8 R3 5 6 A O7 6 00 V C 3 3 R1 4 8 AC R 1 77 C1 9 3 . 0 1U _ 50 V _ X 7R _0 4 D02 1126 3 .3 VS R3 5 2 J _ TP1 U R _Y N U L _ XN W IP L L_ Y P L R _ XP 10 Mils 10 Mils 21 20 19 18 17 16 15 U2 7 C 39 1 . 1 U _ 1 0V _ X 7 R _ 04 10 U _6 . 3 V _ X5 R _0 6 LR 0 _ 0 4 UL _ X N C1 9 2 5 V_ T P C3 8 8 LL 1 0 0 _1 % _0 4 * 0 . 01 U _5 0 V _ X 7R _0 4 0 _0 4 WIP 5 . 1 _ 1% _ 04 V C3 3 * 0. 0 1 U _ 5 0 V _X 7 R _0 4 *0 _ 0 4 R 41 9 20 K _ 1 %_ 0 4 C 41 0 R 41 8 20 K _ 1 %_ 0 4 R 3 39 *0 . 01 U _5 0 V _ X 7R _ 04 29 5V UL * 0 . 01 U _ 5 0 V _X 7R _0 4 C E P _D I O ND + DD E GI N G ND C 40 0 . 1 U _ 1 0V _ X 7 R _ 04 10 U _6 . 3 V _ X5 R _0 6 5 VS R 3 38 Z 2 0 15 N E G D D V R 8 9 10 11 12 13 14 C3 9 9 R1 6 5 UR UR . 01 U _5 0 V _ X7 R _ 0 4 R ST Z 20 0 5 3. 3 V S UR _ YN C 4 11 U S B _T P _ P P 3 U S B _ T P _P N 3 0_04 C1 9 1 VBU S RST D BI LR _S E N L R_ CP U L _C N L L_ S E N 1 2 3 4 5 6 7 VC 3 3 R 17 5 Z 2 01 9 Z 2 0 20 U S B _T P _ P P 2 US B _ T P _ P N2 *0 _ 04 Z 2 0 31 . 01 U _5 0 V _ X7 R _ 0 4 L ED EN TxD Rx D UR _ CN U R_ CP UR _ S EN U 10 R 3 37 RCS1100 UL 10 Mils 5 . 1 _ 1% _ 04 R3 4 8 TP _T X D T P_ RXD V C 33 R3 4 9 R1 7 6 D02 1020 21 21 Z2 032 28 27 26 25 24 23 22 23 23 6 5 4 A O 76 0 0 A A AC W IP ND PG P S *0 . 0 1U _5 0 V _ X 7R _ 04 U L_ X N A C A AC B A V 99 UR_ Y N NS NG PD C 4 12 BAV9 9 1 2 3 10 Mils C C D1 8 C 4 13 3. 3 V S D1 7 C4 1 4 3. 3V S A B.Schematic Diagrams R1 9 4 4 AVC C . D02 1126 R4 1 7 6 5 4 10 Mils Z2029 R3 6 0 5 . 1 _ 1% _ 04 Z2030 R3 4 6 5 . 1 _ 1% _ 04 R3 4 7 1 0 0_ 1 % _0 4 3 .3 V 3 .3 V S 5V 5 VS C 1 80 . 01 U _ 5 0 V _X 7 R _ 0 4 3, 7 , 9 , 1 3. . 1 5 , 1 7, 1 8 , 2 1, 2 3 , 2 5. . 27 2, 6 , 7 , 9 , 11 . . 1 8 , 20 . . 2 3 , 2 5, 2 6 , 2 8 9, 1 3 , 1 4, 2 0 , 2 1, 2 4 . . 2 8 9, 1 3 , 1 6, 1 8 , 2 0, 2 1 , 2 5 Schematic Diagrams USB2.0, GSensor, GPS, RFID 1.5 A USB 2.0 U1 4 1 2 C 7 1 U _ 6 . 3 V _ X5 R _ 0 4 3 4 G ND V OU T VIN V OU T VIN V OU T EN FL G G Sensor V CC US B 5V C 2 22 C2 2 3 10 U _ 6 . 3 V _ X5 R _ 0 6 . 1 U _ 10 V _ X 7 R _ 04 8 7 6 Z 2 1 0 4 R 12 5 1 0 K _ 04 5V R T 9 7 15 B G S D03 0224 2 1 , 25 , 2 7 D D _O N # V D D3 VD D3 U7 7 L2 H C B 16 0 8K F -12 1 T 25 _ 0 6 . VCC USB US B _ O C0 # C5 R 10 4 7 0K _0 4 R 9 5 6 0K _0 4 V C C_ US B 0 St andard USB 7 7 US B _ P P 0 2 4 3 * W C M 2 01 2 F 2 S -90 0 T 04 US B _ P N0 _ R 2 US B _ P P 0 _ R 3 4 R8 0 _ 04 R7 0 _ 04 Z 2 10 1 Z 2 10 2 1 7 8 9 12 13 14 S MD _ GS E N S MC _ GS E N V D D_ I O C S IN T 1 IN T 2 6 3 11 VDD R e se rv e d R e se rv e d SD O S D A /S DI /S DO SC L /S PC C 47 0 2 4 5 10 G ND G ND G ND G ND 4 . 7 U _ 1 0V _ X 5 R _ 08 D03 0224 Sheet 20 of 31 USB2.0, GSensor, GPS, RFID J U SB1 1 . 00 1 U _ 5 0 V _X 7 R _ 0 40915 SWAP L 1 1 US B _ P N 0 23 23 1 0K _ 0 4 0 _0 4 +C 2 1 4 C6 LI S 3 0 2 D L V+ DAT A_ L DAT A_ H GN D D 02 12 08 . 1 U _ 1 0V _ X 7 R _ 04 S K 1 07 1 3 G ND 1 GN D 2 1 0 0U _6 . 3 V _ B 2 VDD 3 sh i el d s hi e l d 7 R 1 35 R 1 36 G S E N_ I NT C1 4 2 C1 5 0 C 13 8 . 1 U _ 10 V _ X 7R _ 04 . 1 U _ 1 0V _X 7 R _ 0 4 1 0 U _ 6 . 3V _X 5 R _ 0 6 0820 FOORPRINT L390 RDIF Level Shitt 5 VS R 4 28 RFID CONNECTOR 5V S * 51 K _ 0 4 R4 2 9 * 51 K _ 0 4 U 31 U A RT _ RX D_ R U A R T _ R X D 3. 3 V S 1 2 3 4 B2 GN D VCC A A2 3 .3 V S B1 VC CB OE A1 U A R T _ T XD _ R 8 7 6 5 R4 3 0 R F I D_ 5 V D02 1210 5V S OE J _ RF ID 1 U A R T _T X D U A R T _ TX D _R R U A RT _ RX D_ RR 3. 3 V S *T X B 0 10 2 *5 1 K _0 4 R4 3 1 23 * 51 K _ 0 4 1 2 3 4 5 R F I D _D E T # J_RFID1 1 GPS (COM3) GP S _ 3 . 3 V S S N B H Y -05 R J_GPS1 Q 13 D03A 0428 5 0820 footprint L39 3. 3 V S S 3 .3 VS D C 2 33 C2 2 9 . 1U _1 0 V _ X7 R _0 4 G D03A 0430 FOR EMI 1 A O3 4 09 Z 2 1 07 *2 2P _ 5 0 V _ N P O_ 0 4 OE R4 3 2 * 0_ 0 4 R4 3 3 * 0_ 0 4 U A R T _ TX D _R C4 7 4 3 .3 VS R 44 0 R2 0 0 C2 3 0 C 10 1 00 K _ 0 4 . 1 U _ 1 0V _ X 7 R _ 04 1 0 U _ 6. 3V _ X 5 R _ 06 R4 4 2 0 _ 04 U A R T _ TX D _R R R2 0 2 GP S _ 3 . 3 V S 1 00 K _ 0 4 OE D * 0_ 0 4 U A R T _ R X D _ R R4 3 4 R4 4 3 0 _ 04 Z 2 1 10 U A RT _ RX D_ RR D U A RT _ RX D D03A 0428 Q2 5 * 10 0 K _ 04 G S C4 7 5 23 *2 2P _ 5 0 V _ N P O_ 0 4 * 2N 7 00 2 W G PS_ EN Q1 2 2 N 7 00 2 W G C 23 1 S R4 4 1 D 3 . 3V S . 1 U _ 1 0 V _X 7 R _ 0 4 Q 24 R F I D _E N J _ GP S 1 D02 1210 G *2 N 7 0 02 W S 2 1 ,2 3 0826 D03 0211 2 0K _ 1 % _0 4 U A R T _ TX D * 10 0 K _ 04 6 R2 0 3 1 0 U _ 6. 3 V _ X 5 R _ 06 1 9 G P S _ RX D1 1 9 G P S _ T XD 1 2 3 G P S _ D E T E C T# 3 .3 V S V C C R TC D03A 0428 RDIF Level Shitt R2 0 4 1 0 0K _ 0 4 1 2 3 4 5 6 8 8 2 43 -0 6 0821 FOORPRINT OK F or GP S 3.3V <=> 5V 3 .3 VS 2 1 , 2 3 U A R T _ T XD 2 1 , 23 U A R T _ R X D R 4 36 R 4 37 1 K _1 % _ 04 1 K _1 % _ 04 U A R T _T X D U A R T _R X D U3 2 1 2 3 4 G ND VR EF1 SC L 1 SD A1 EN VR EF2 S CL 2 SD A2 P C A 9 3 06 D C U R 8 7 6 5 R 43 5 R 43 8 R 43 9 20 0 K _ 04 1. 5 K _ 1 %_ 0 4 1. 5 K _ 1 %_ 0 4 R F ID_ 5 V 5 VS U A R T _T X D _ R U A R T _R XD _ R C 47 2 . 0 1 U _ 1 6V _ X 7 R _ 0 4 5V S R F I D _5 V V CC RT C 5V V DD 3 3. 3 V S 9 , 1 3 , 16 , 1 8 , 19 , 2 1 , 25 21 6 ,9 9 , 1 3 , 14 , 1 9 , 21 , 2 4 . . 28 3 , 6 , 7 , 14 , 2 2 . . 2 5, 2 9 2 , 6 , 7 , 9, 1 1 . . 1 9 , 21 . . 2 3 , 25 , 2 6 , 28 USB2.0, GSensor, GPS, RFID B - 21 B.Schematic Diagrams Vol tage Kee p 4 .9V~ 5 .25 V. D02 1015 Schematic Diagrams TO SW, Barcode Conn TO SWITCH BOARD BARCODE READ CONNECTOR 1 2 3 4 5 6 7 8 9 10 11 12 BAR_CN1 1 Sheet 21 of 31 TO SW, Barcode Conn 12 J_FPTTP1 3.3VS 1 J_M FB1 BAR_CN1 1 2 3 4 5 6 7 8 9 10 11 12 D02 1210 UART_T XD UART_RXD UART_T XD 20,23 UART_RXD 20,23 BARCODE_DET# BARCODE# LOW 20MS BARCODE_DET# 23 BARCODE_RING 1 8 BARREAD_RST# 23 D02 1209 LOW 100 us RIGHTKEY# 23 LEFTKEY# 23 ENTERKEY# 23 DOWNKEY# 23 UPKEY# 23 USB_FP_PN3 7 USB_FP_PP3 7 12 87213-12G0 87153-012 6-20-41A00-112 0826 FOORPRINT OK TO USB BOARD TO BARCODE KEY BOARD BAR_3.3V BARCOAD READ POWER BAR_J1 5V 2 USB_CON1 3. 3 V R420 *0_04 R421 0_04 USB-CON1 Q 9 3.3VS 1 BAR_3.3V BA_3.3V S 6 D02 1126 C4 AO3 409 G C21 9 R193 C221 100K_04 .1U_10V_X7R_04 1 1U_6.3V_X5R_ Z2 04 203 R4 10U_ 6.3V_X5R_06 R264 1 2 3 4 5 6 D BARCODE# 2 1 DD_O N# 20,25,27 D02 1015 87212 - 06 G0 85205 -0 2001 D02 1208 D02 1015 Change 1 pin define 20K_1 %_04 BAR_J2 4.7K_04 USB_PN5 7 USB_PP5 7 D02 1201 change footprint 100K_04 Z2 202 0825 footprint TP80 D R5 Q1 2N7002W G 23 BARREAD_EN TO DOCK BOARD 0 S RFID POWER D02 1126 5VS J_DCON1 3.3VS 0820 footprint M74 R422 0_04 D03 0304 R423 *0_04 RFID_5V J-DCON1 5V L 27 HCB1005KF-121T20 40mil RF_3.3V Q3 Z2205 S D02 1107 40mil D 1 C218 C216 .1 U_10V_X7R_04 Z2206 G R384 C217 AO 3409 R187 C1 C2 100K_04 .1U_1 0V_X7R_04 1U_ 6.3V_ X5R_04 1U_6.3V_X5R_04 100K_04 16 D02 1015 100 U_6.3V_B2 R6 D03A 0414 100K_04 R11 330K_04 DO CK_DET C3 + C473 1U_6.3V_X5R_04 1U_6.3V_X5R_0 4 0826 D02 1008 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 87213-16 Z2207 0821 FOORPRINT OK DOCK_AV 80 MAIL DOCK_DET USB_HUB_PN1 7 USB_HUB_PP1 7 D03 0106 R53 R48 *0 _04 *0 _04 USB_TP_PP2 19 USB_TP_PN2 19 D 0 90 4 C l os e C H IP SE T S I DE 2 0,23 RFID_EN B - 22 TO SW, Barcode Conn Q4 2N700 2W G From EC default LOW S B.Schematic Diagrams BAR_3. 3 V 3.3V 3,7,9,13..15,17..19,23,25..27 DOCK_AV 29 5VS 9,13,16,18..20,25 VCCRTC 6,9,20 3.3VS 2,6,7,9,11.. 2 0,22,23,25,26,28 5V 9,13,14,19,20,24..28 RFID_5V 20 Schematic Diagrams Hotkey Board SECOND BATTERY ENABLED KEY LED D1 D L ED BATT/E mail CHARGE FULL GREEN SECOND BAT KEY V DD 3 2 2 0 _ 1 % _0 4 Z 2 30 1 2 R1 8 6 2 2 0 _ 1 % _0 4 Z 2 30 2 4 1 L E D _B A T _ F U L L # 2 3 3 L E D _B A T _ C H G# 2 3 YELLOW SB_ S W 1 1 3 2 D2 B A T 2_ E N 2 3 PSW1~8 4 D L ED GREEN R1 2 2 0 _ 1 % _0 4 Z 2 30 3 2 R3 2 2 0 _ 1 % _0 4 Z 2 30 4 4 1 ACIN PWR/SUS L E D _P W R # 23 C4 2 2 D T E -1 C K -R 1 3 4 .1 U_ 1 0 V _ X 7 R_ 0 4 3 L E D _A C I N # 2 3 2 M860TU MJ_ST1 6-53-7150A-040 YELLOW Sheet 22 of 31 Hotkey Board B H D D _L E D # 1 6 3 .3 VS POWER SWITCH E C Z2309 R2 2 2 0 _ 1 % _0 4 Z 2 30 8 D3 A L ED C HDD LED(GREEN) Q2 D TA 11 4 E U A PW _ SW 1 T A -3 2 W -T / R 2 G N D1 G ND 2 3 4 1 M _ B T N# 25 C 2 15 . 1 U _1 0 V _ X 7 R _0 4 0820 footprint l39 VD D 3 3 .3 VS 5 VS 3 , 6 , 7 , 1 4 , 20 , 2 3 . . 2 5 , 2 9 2 , 6 , 7 , 9 , 1 1. . 2 1, 2 3 , 2 5 , 2 6 , 2 8 9 , 1 3 , 1 6, 18 . . 2 1 , 2 5 Hotkey Board B - 23 B.Schematic Diagrams DEFAULT : LOW HI : INENABLE R1 8 5 Schematic Diagrams KBC-ITE IT8513E & BIOS K B C_ A V DD L 41 H C B 1 00 5 K F -1 2 1T 2 0 11/20 V D D3 C1 4 8 C 78 C5 0 C1 2 8 1 0 U _ 6 . 3 V _X 5 R _ 0 6 . 1 U _ 1 0V _ X 7 R _ 0 4 . 1 U _ 1 0 V _X 7 R _ 0 4 . 1U _1 0 V _ X 7R _0 4 . 1 U _ 1 0V _ X 7 R _ 0 4 R 3 13 V DD 3 . C 1 49 * 10 K _ 0 4 W D T _E N 25mil V DD 3 V DD3 C 35 7 C 3 54 C3 4 9 R1 3 0 R3 1 7 . 1 U _ 1 0 V _X 7 R _ 0 4 . 1U _1 0 V _ X7 R _0 4 . 1 U _ 1 0V _ X 7 R _ 0 4 *1 0 K _ 04 *1 0 0K _ 0 4 R 1 16 . 1U _1 0 V _ X 7R _0 4 K BC_ VC C 1 4 B T _E N 21 B A R C O D E _ D E T# B A R C OD E _ D E T # 23 15 S C H _ P W R OK P M _ RS T W A RN K BC_ BA R CO DE 14 W L A N _E N 7 R ST# 18 K B C _ MU T E # RST # B A T _ DE T _ A B A T _ V OL T _A B A T _ DE T _ B ? ? ? ? ? ? ? ? Pul l Hi gh to VDD3 2 2 B A T 2 _ E N 3 T H E R M_ A L E R T # 6 P M _S LP R D Y # 6 P M _S LP M OD E 7 P M _R S T R D Y # 29 B A T _ V OL T _ B 29 29 3 3 20 20 C 97 6, 1 3 18 P M_ S L P R D Y # P M_ S L P M OD E P M_ R S TR D Y # S MC _ B A T S MD _ B A T S MC _ B A T S MD _ B A T S MC _ T H E R M S MD _ T H E R M S MC _ G S E N S MD _ G S E N S MC _ GS E N S MD _ GS E N * . 1 U _ 1 0V _ X 7 R _ 04 R 90 C7 9 L _ B K L TC T L KBC _ BEEP 2 1 LE F TK E Y # RIG HT K EY# E NT E RK E Y # 2 2 LE D _ B A T _C H G # 2 2 LE D _ B A T _F U L L# 2 2 LE D _ P W R # 1 10 1 11 1 15 1 16 1 17 1 18 29 30 31 32 34 14 8 0C LK 14 3I N 1 1 4 8 0 P OR T _ D E T # 2 1 B A RR E A D_ E N 2 1 B A R R E A D _ R S T# 2 0 RF ID_ DET # 8 0C L K 3 IN1 85 86 87 88 89 90 1 25 2 1 DO W NK E Y # 18 21 2 5 P W R_ SW # 20 , 2 1 R F I D _E N 20 66 67 68 69 70 71 72 73 D02 1107 D0 2 1 20 8 10 K _ 0 4 B R I GH T N E S S 24 1 U _ 6 . 3 V _X 5 R _ 0K 4B C B E E P 25 28 FOR T890M 22 11 LOW ACTIVE 76 77 78 79 80 81 33 GP S _ E N F OR T 89 0M R FI D & B AR CO DE 1 08 1 09 20 , 2 1 U A R T_ R XD 20 , 2 1 U A R T_ T X D 74 3 26 50 92 114 1 21 127 A V CC VBAT VSTBY V STBY VSTBY VS TBY VSTBY VS TBY 11 V CC DAC J0 J1 J2 J3 J4 J5 IT8513E FLASH ADC AD AD AD AD AD AD AD AD C 0 / GP C 1 / GP C 2 / GP C 3 / GP C 4 / GP C 5 / GP C 6 / GP C 7 / GP I0 I1 I2 I3 I4 I5 I6 I7 F L F R A ME # / G P G2 F L A D 0/ S C E # F LA D 1 / S I F L A D 2/ S O F L A D 3 / G P G6 F L CL K /SC K ( P D )F LR S T #/ W U I 7 / T M/ G P G0 GPIO SMBUS SM SM SM SM SM SM ( P D )K S O 16 / G P C 3 ( P D )K S O 17 / G P C 5 C L K 0 / GP B 3 D A T 0 / GP B 4 C L K 1 / GP C 1 D A T 1 / GP C 2 C L K 2 / GP F 6 ( P U ) D A T 2 / GP F 7 ( P U ) ( ( ( ( ( ( ( PWM PW M PW M PW M PW M PW M PW M PW M PW M 0 / GP A 0 ( 1 / GP A 1 ( 2 / GP A 2 ( 3 / GP A 3 ( 4 / GP A 4 ( 5 / GP A 5 ( 6 / GP A 6 ( 7 / GP A 7 ( PU PU PU PU PU PU PU PU ) ) ) ) ) ) ) ) LK 0 / G A T0 / G LK 1 / G A T1 / G LK 2 / G A T2 / G PH0 PH1 PH2 PH3 PH4 PH5 PH6 ( P D )I D 7 / G P G1 WAKE UP PF0 ( PF1 ( PF2 ( PF3 ( PF4 ( PF5 ( PU PU PU PU PU PU ) ) ) ) ) ) ( P D )W U I 5/ G P E 5 ( P D )L P C P D # / W U I 6/ G P E 6 PWM/COUNTER ( P D )TA C H 0 / G P D 6 ( P D )TA C H 1 / G P D 7 WAKE UP ( P D ) T MR I 0 / W U I 2 / G P C 4 ( P D ) T MR I 1 / W U I 3 / G P C 6 PW R SW /G PE4 ( PU ) CIR R I 1# / W U I 0 / GP D 0( P U ) R I 2# / W U I 1 / GP D 1( P U ) ( P D )C R X / G P C 0 ( P D )C T X/ G P B 2 GP INTERRUPT LPC/WAKE UP G I N T / GP D 5 ( P U ) UART ( P D )L 8 0H L A T/ G P E 0 ( P D )R I N G # / P W R F A I L# / L P C R S T #/ G P B 7 R XD / GP B 0( P U ) T X D/G P B 1 ( P U ) D02 1210 I T8 5 1 3E CLOCK CK 3 2 K E CK3 2 K 58 59 60 61 62 63 64 65 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S I0 I1 I2 I3 I4 I5 I6 I7 O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 O1 0 O1 1 O1 2 O1 3 O1 4 O1 5 P CI RS T # R 10 3 C 10 6 2 W D T _R E S E T # 1 K B C _ W RE S E T # D *2 N 7 0 02 W GN D C 3 78 1 U _6 . 3 V _ X5 R _0 4 D03A 0414 D02 0106 V D D3 CLOSE TO IT8513E D02 1015 C S M C_ B A T AC D3 1 BAV9 9 S M D_ B A T AC D3 0 BAV9 9 DEBUG PORT A C J _ H8 DB G 1 A J_H8DBG1 2 1 C 29 B A T _ DE T _ A B A T _ DE T _ A AC D2 2 BAV9 9 10 9 W DT _ E N V D D3 2 1 4 3 6 5 8 0 CL K 8 7 8 0 P OR T _D E T # 10 9 S P U F Z -1 0 S 3-V B -0-B 3I N 1 A C 29 B A T _ V OL T _ A 29 CHG _ CUR B A T _ V OL T _A AC D2 3 BAV9 9 C H G_ C U R AC D2 9 BAV9 9 B A T _ V OL T _B AC D2 8 BAV9 9 A K B C _ S P I_ S CL K V D D3 A B A R C O D E _ D E T # R 3 89 P M _S LP M OD E R 2 97 C C D _ D E T# R 1 37 *1 0 K _0 4 *1 0 K _0 4 10 K _ 0 4 BAT _ DET _ A S M C_ B A T S M D_ B A T S M C _ GS E N S M D _ GS E N BAT _ DET _ B P M _S LP R D Y # P M _R S T R D Y # 10 K _ 0 4 4. 7K _ 0 4 4. 7K _ 0 4 4. 7K _ 0 4 4. 7K _ 0 4 10 K _ 0 4 *1 0 K _0 4 *1 0 K _0 4 D02 1107 D02 1022 C CC D_ EN S M C _ GS E N 14 56 57 E C _2 N D _ B A T _D I C H A R G E 2 9 UP K EY# 21 93 94 95 96 97 98 99 W D T _E N CL K _ RU N# 6 ,1 9 T P_ RXD 19 T P _ TX D 19 0819 W D T _ E N 14 W L _ D E T # 14 B T _ D E T # 14 D D _ ON 25 1 07 C C D _D E T # AC D1 6 BAV9 9 AC D1 5 BAV9 9 B A T _ DE T _ B AC D2 7 BAV9 9 P M _R S MR S T # 6 B A T _ S E L 29 47 48 A C S M C _ E X TS M I # 7 S M C _ R U N T I ME _ S C I # 7 P M _P W R B T N # 7 35 17 A C S M D _ GS E N C C D _ D E T# 1 4 82 83 84 R R R R R R R R 2 94 1 38 1 39 1 40 1 41 2 89 73 3 01 D02 1022 A K B C_ P C L K R9 1 *1 0 _ 04 B A T _ V OL T _A R6 5 C H G_ C U R R 3 74 B A T _ V OL T _B R8 1 K B C _P C L K _R C1 0 7 * 10 P _ 5 0V _ 0 4 1 00 _ 1 %_ 0 4 B A T _ V OL T _R C6 3 1 U _ 6 . 3 V _X 5 R _ 0 4 1 00 _ 1 %_ 0 4 C U R _ S E N S E _ R C2 0 6 1 U _ 6 . 3 V _X 5 R _ 0 4 1 00 _ 1 %_ 0 4 B A T _ V OL T _B _R C9 4 1 U _ 6 . 3 V _X 5 R _ 0 4 GP S _D E T E C T # 20 C R T _P W R _ D I S # 1 2 1 20 1 24 V C OR E _ O N 2 8 D E LA Y _ P W R G D 2 8 1 19 1 23 D02 1016 D02 1015 SU SB# 15 , 2 5 A L L _P W R GD 2 6 19 1 12 S W I# 7 C H G_ E N 29 V DD3 N C1 N C_ 0 4 C 1 52 2 1 28 A C 2 9 B A T _V O L T_ B 8M bi t KBC_SPI_*_R = 0.1"~0.5" . 1 U _ 1 0V _ X 7 R _ 0 4 K B C _ CK 3 2 K E K B C _ CK 3 2 K U 9 R1 2 6 S P I_ V DD S P I_ V DD 1 0M _ 04 R 1 44 2 8 VD D SI 1 SO 1 K _1 % _ 04 K B C_ F L A S H 3 W P# X2 3 2 . 7 68 K H Z ? ? ? 4 R4 6 C1 4 6 C 14 7 10 0 K _ 0 4 1 5P _5 0 V _ N P O _0 4 1 5 P _ 50 V _ N P O _ 04 R 1 46 4 . 7K _0 4 Z 24 1 1 3 .3 VS 3 .3 V V D D3 CE # SC K 7 HO L D# VSS S S T 2 5 V F 0 80 B 11/20 N C_ 0 4 K B C _ A GN D S 4 J2 OP E N _2 5 m il 3 IN 1 K BC _ SP I_ CE# K BC _ SP I_ S I K BC _ SP I_ S O K B C_ V S S 0_04 *. 1 U _ 1 0V _ X 7 R _ 0 4 NC 3 W DI 1 0 0 K _ 04 C 1 00 1 01 1 02 1 03 1 04 1 05 1 06 1 3 74 A H C 1 G0 8 GW R E S E T# V CC R 3 19 Q1 6 *0 . 1 U _ 1 0 V _X 7 R _ 0 4 * A A T 35 1 0 I GV -2 . 9 3 -C -C -T1 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 3 4 5 C 14 4 4 5 6 8 11 12 14 15 U4 2 B - 24 KBC-ITE IT8513E & BIOS )I D 0 / G )I D 1 / G )I D 2 / G )I D 3 / G )I D 4 / G )I D 5 / G )I D 6 / G ( P D )E G A D/G P E 1 ( P D )E GC S #/ G P E 2 ( P D )E GC LK / G P E 3 PS/2 PS2 C PS2 D PS2 C PS2 D PS2 C PS2 D PD PD PD PD PD PD PD EXT GPIO 3 . 3V R S T# K SO 0 /PD0 K SO 1 /PD1 K SO 2 /PD2 K SO 3 /PD3 K SO 4 /PD4 K SO 5 /PD5 K SO 6 /PD6 K SO 7 /PD7 K S O 8/ A C K # K S O9 / B U S Y K S O1 0 / P E K S O 11 / E R R # K S O1 2 / S L C T K S O1 3 K S O1 4 K S O1 5 EC SCI# /G PD3 ( P U ) E C S MI # / G P D 4 ( P U ) A C 0 / GP A C 1 / GP A C 2 / GP A C 3 / GP A C 4 / GP A C 5 / GP K SI0 /ST B # K S I 1/ A F D # K S I2 / INIT # KS I3 /S L IN# KS I4 KS I5 KS I6 KS I7 K/B MATRIX G A 2 0/ G P B 5 K B R S T #/ G P B 6 ( P U ) P W U R E Q # / GP C 7( P U ) L 8 0L L A T / GP E 7 ( P U ) D D D D D D 24 J_KB1 J _ KB1 *8 5 20 1 - 2 40 5 1 W R ST # D02 1107 6 7 LPC AVSS 14 1 26 4 16 20 0 1 2 3 CL K A ME # IRQ R S T # / W U I 4 / GP D 2 ( P U ) 75 K BC_ W R ES ET # L AD L AD L AD L AD L PC LFR SER L PC VSS V SS VSS VS S VSS VS S VSS P CIR S T # 3 E C _ A 2 0M # 2 9 A C _ IN# 2 2 L E D_ A CI N# 1 3 BKL _ EN Sheet 23 of 31 KBC-ITE IT8513E & BIOS 5 B.Schematic Diagrams K BC_ PC L K 10 9 8 7 13 6 5 22 1 12 27 49 91 113 12 2 . U 5 L P C_ A D0 L P C_ A D1 L P C_ A D2 L P C_ A D3 K B C _P C L K L P C _ F R A ME # I NT _ S E R IRQ P CI RS T # MR # 8mil W D_ D IS A B L E * 10 K _ 0 4 U6 3 W D T _M R # 1 11/20 6, 1 9 6, 1 9 6, 1 9 6, 1 9 6 6, 1 9 6, 1 9 12 , 1 4 . . 1 7, 1 9 K B C _ A GN D G C 1 14 L1 1 H C B 10 0 5 K F - 1 21 T 2 0 3. 3 V S 25mil W D _ D I S A B LE NEAR EC PIN 2 , 6, 7 , 9 , 1 1 . . 22 , 2 5 , 26 , 2 8 3 , 7, 9 , 1 3 . . 1 5, 1 7 . . 1 9, 2 1 , 2 5. . 27 3 , 6, 7 , 1 4 , 2 0, 2 2 , 2 4, 2 5 , 2 9 5 K B C _ S P I _ S I _R R 1 34 4 7_ 0 4 K B C _S P I _S I 2 K B C _ S P I _ S O_ R R 1 43 1 5_ 1 % _0 4 K B C _S P I _S O 1 K B C _ S P I _ C E # _ R R 1 33 1 5_ 1 % _0 4 K B C _S P I _C E # 6 K B C _ S P I _ S C L K _ RR 1 45 4 7_ 0 4 K B C _S P I _S C L K C 3 7 6 4 *3 3 P _ 5 0V _ 0 4 Schematic Diagrams VDD5, VDD3 V IN1 L D O5 V LD O5 V P C 11 5 P C1 1 4 P R5 1 *1 M_ 1% _ 04 4 . 7U _1 0 V _ X5 R _ 0 8 1U _6 . 3 V _X 5 R _ 0 4 C PD5 C PD4 VIN P C 1 12 A P R 11 3 F M 05 4 0-N A 0 . 1U _5 0 V _0 6 1 0 _0 6 P C 10 1 P C 1 10 . 1 U _ 5 0V _ 0 6 4. 7 U _ 2 5V _ X 5 R _ 08 Z 2 5 22 8 22 VDD S W 1 23 V D D5 T G1 T G2 0. 1 U _ 5 0V _ 0 6 1 2 19 VIN 21 UG A T E 1 B O OS T 2 2 1 0 . 1 U _ 5 0V _ 0 6 15 P C 1 05 P C 10 7 P Q1 8A A O4 93 2 18 0 . 1U _ 50 V _ 06 IN T V CC PC1 0 2 4 . 7 U _ 25 V _ X5 R _ 0 8 B O OS T 1 P C 10 3 VIN2 Z 2 52 1 P Q1 3 A 14 U GA T E 2 A O4 93 2 8 7 + P L4 P C MB 0 5 3T _ 3. 3 U H 1 2 L GA T E 1 20 PR9 8 PR9 4 S Y S 3V B G2 L GA T E 2 17 V DD3 P J1 2 3A 1 PC8 8 A O4 9 32 3 + . 1 U _ 10 V _ X7 R _ 0 4 2 2m m PC1 1 3 Sheet 24 of 31 VDD5, VDD3 1 50 U _ 6 . 3V _ V 4 B G1 4 . 1 U _ 1 0V _ X 7R _ 04 Z 25 2 0 PR9 6 1 0M _1 2 P Q 13 B PC1 1 9 3 2 SW 2 1 6 5 P C9 9 1 50 U _ 6 . 3V _V SW 1 V DDS W 2 P Q1 8B A O4 93 2 1 2m m 13 2 3A 2 P L6 P C MB 0 5 3T _ 3. 3 U H 1 2 5 6 P J1 3 1 P R 11 6 1 0 M_ 12 7 SY S5 V 1 0 _1 % _0 4 V DD S E NS E 1 + 27 1 0 _1 % _0 4 P C 89 . 0 0 1U _5 0 V _X 7 R _ 04 V DD S E NS E 1 - 28 S E NS E 1 + S E N S E 2+ S E NS E 1 - SENSE 2 - 8 V D D S E N S E 2+ 7 V D D S E N S E 2- 11 Z 25 1 7 P R 1 0 5 0 _ 04 5 Z 25 1 6 P C1 3 2 2 0P _ 5 0V _ 0 4 P C8 3 1 0 0P _ 5 0V _ 0 4 4 Z 25 1 5 P R 97 Z 2 51 8 10 _ 1% _ 04 P C 90 . 00 1 U _ 50 V _ X7 R _0 4 P R 93 10 _ 1% _ 04 4 7K _ 0 4 PR8 PC8 4 2 2 0P _ 5 0V _ 0 4 Z 2 5 08 2 P R3 4 12 Z 2 51 1 24 2 10 K _ 0 4 Z 25 1 25 P R 23 VFB2 P R 19 1K _ 1 %_ 0 6 S G ND4 PC3 4 . 0 1U _ 50 V _ X7 R _ 0 4 C A P D1 Z 25 0 2 A C C A P D 1 2 F M0 5 40 -N Z 25 0 3 A C P D3 16 P GN D PIN 29 = SGND4 P U3 LT C 3 8 5 0 P R 18 6 3 . 4K _ 1 %_ 0 4 PR1 7 2 0 K _1 % _0 4 6-0 2- 038 50- CQ0 S G ND 4 P R3 1 F M0 5 40 -N 3 V_ EN SYS1 0 V P C1 0 0 22 0 0 P _5 0 V _X 7 R _ 04 PC2 9 * 10 0 p _5 0 V _0 4 0_ 0 4 L DO 5 V F M0 5 40 -N P D 1 0 F M0 5 40 -N . 01 U _ 5 0 V _X 7 R _ 04 S GN D 4 SYS5 V 47 K _ 04 F R E Q / P L LF L T R 9 *0 _0 4 Z 25 2 3 P R 9 0 S GN D 4 MO D E / P L L I N R UN2 D03 0216 L GA T E 1 5V P C 17 P GO OD Z 2 5 13 L D O 5V IL IM 0_ 0 4 Z 2 51 4 1 0 P R 33 IT H2 T K/SS 1 Z 2 51 0 P R 91 19 . 6 K _1 % _0 4 VFB1 T K/SS 2 3 RU N1 Z 2 50 9 S GN D 4 E X TV C C *1 0 0p _ 50 V _ 04 S G ND4 L D O 5V IT H1 1 PC1 1 Z 25 2 4 6 P R1 2 10 5 K _1 % _0 6 26 PC1 2 * 22 P _ 50 V _ 04 P R3 0 * 10 K _ 04 5 V_ EN P C9 3 2 20 0 P _5 0 V _ X7 R _ 0 4 T K/SS2 P C 96 . 00 1 U _ 50 V _ X 7R _0 4 1 PJ 1 1 2 S H OR T S GN D 4 P C 22 S Y S 5V SYS1 5 V 0 . 0 1U _1 6 V _X 7 R _ 0 4 P C8 2 P C2 4 0 . 01 U _ 5 0V _ X 7R _0 4 22 0 0 P _5 0 V _X 7 R _ 04 P R1 1 *0 _0 4 S GN D 4 S GN D 4 P R8 9 *0 _0 4 S GN D 4 VIN VIN1 VDD 3 VDD 5 5V SYS1 5 V SYS5 V 1 3, 2 5 . . 29 25 3 , 6, 7 , 1 4, 2 0 , 2 2, 2 3 , 25 , 2 9 2 5, 2 8 , 29 9 , 13 , 1 4, 1 9 . . 2 1, 2 5 . . 28 1 3, 2 5 , 29 2 5, 2 9 VDD5, VDD3 B - 25 B.Schematic Diagrams F M 05 4 0-N Schematic Diagrams System VS Power 5V 5VS 5V 3A PR 2 7 6 5 2 1 P Q 23 NT G S 4 1 4 1 NT 1 G 1 M_ 1 % _ 0 4 1.8VS SY S1 5 V 3A 4 VD D 5 P R3 5 5 VS 6 5 2 1 Power Plane SY S1 5 V 1 .8 V PQ 8 N T GS 4 1 4 1 N T1 G PC 1 6 1 M _ 1 % _0 4 PC 2 0 . 1 U _ 10 V _X 7 R _ 0 4 6 5 2 1 3A 1 0 U_ 6 .3 V _ X 5 R_ 0 6 PR8 8 Z 2 6 10 D D D S S PQ 3 5 2 N7 0 0 2 W G SU SB S 22 0 0 P _ 5 0 V _ X 7 R _ 0 4 D02 1122 ON 3VS SY S1 5 V V D D3 6 5 2 1 3. 3V 8/8 3A 4 Power Plane 1 M _ 1 % _0 4 PC 2 5 1 .0 5 V S _ C6 6 5 2 1 R 2 21 PR7 1 0 U_ 6 .3 V _ X 5 R_ 0 6 10_08 G P C1 4 PQ 1 0 0 .2 2 U F _ 1 6 V_ X7 R_ 0 6 2 N7 0 0 2 W DD _ O N# Z2603 PC 9 PC 1 0 . 1 U_ 1 0 V _ X 7 R_ 0 4 V DD 5 1 0 U _6 . 3 V _X 5 R _ 0 6 Z 2 60 5 Q 14 SU SB G 3. 3V S P R6 PC8 G PR 5 10 K _0 4 1 00 K _0 4 P Q4 2 N 70 0 2 W *6 8 0 P _ 5 0 V _ X7 R _ 0 4 G 2 N 70 0 2 W Z2 606 S S 2 2 0 0P _ 50 V _X 7 R _ 0 4 D PQ 1 5 2 N 7 00 2 W 4 PQ 5 NT G S 4 1 4 1 NT 1 G 10 0 K _ 1 % _ 0 4 Z2 602 D PC 3 3 PC 1 8 . 1 U _ 10 V _X 7 R _ 0 4 Z26 09 1 .0 5 V S D02 1208 D 1 M_ 1 % _ 0 4 PQ 1 4 NT G S 4 1 4 1 NT 1 G P R1 0 3 P Q 22 NT G S 4 1 4 1 NT 1 G SY S1 5 V 4 D 3A PR 4 4 6 5 2 1 S V DD 3 1.05VS_C6 3 .3 V S S Y S 1 5V 3 3.3V 3 Sheet 25 of 31 System VS Power S D D02 1122 P Q3 2 N7 0 0 2 W G S L P I OV R # 7 S ON POWER BOTTOM D02 1118 SYS 5 V J060697 NDS352AP_NL->MTP2303N3 VD D 3 VIN 500mA VA P Q 30 M TP 2 30 3 N 3 S D P R 77 VIN 1 PD 8 A F M 0 5 4 0 -N C P D 14 Z 2 6 11 A F M 0 5 4 0 -N C PR 1 3 3 1 0 0 K _ 1 % _0 4 D D _ ON # D D_ O N# 2 0 ,2 1 ,2 7 P W R_ S W # P R 14 0 3 30 K _0 4 P R1 4 1 PJ 6 * OP E N _ 2 5 m i l 3 3 K_ 1 % _ 0 4 Z 2 6 12 Z 2 6 13 D D _O N G S D P Q4 9 2 N 7 0 0 2W G D 1 0K _ 04 23 G P C1 4 9 PQ 3 2 2 N7 0 0 2 W P C 56 0. 1U _ 5 0 V _ 0 6 Z2615 PQ 4 7 D T A 1 1 4E U A D * . 1 U _1 0 V _ X 7 R _ 04 25mil G G P R 1 23 P C5 4 1 0 0K _ 04 0 . 1 U _ 5 0V _ 06 10 0 K _ 0 4 D D _O N D D_ O N S V IN C PQ 3 3 2 N7 0 0 2 W 1 00 K _0 4 S E D S PR8 1 P Q 48 2 N7 0 0 2 W P R 12 2 Z 26 1 4 23 ON 25mil 8mil B Z 26 1 6 PR 6 6 22 M _ B T N# 1 0 K_ 0 4 M _ BTN # VD D 5 ON C 4 21 * 0. 1U _ 1 0 V _ X 7 R _ 0 4 3 .3 V P R 1 32 1 0 K _ 04 B - 26 System VS Power C2 0 2 .0 1 U_ 5 0 V_ X 7 R _ 0 4 .0 1 U_ 5 0 V_ X 7 R _ 0 4 S US B SU SB D C2 0 3 15 , 2 3 SU SB# PQ 3 1 2 N7 0 0 2 W G PJ 7 *O P E N _ 2 5 m i l PC 7 7 . 1 U _1 0 V _ X 7 R _ 04 S C2 0 4 .0 1 U_ 5 0 V_ X 7 R _ 0 4 S US B C2 0 5 .0 1 U_ 5 0 V_ X 7 R _ 0 4 B.Schematic Diagrams S US B G PC7 8 . 1 U _ 1 0 V _ X 7R _ 0 4 . 1U _ 1 0 V _ X 7 R _ 0 4 Z2608 PQ 7 2 N7 0 0 2 W P C2 6 DD _ O N# G .0 0 1 U_ 5 0 V _ X 7 R_ 0 4 PC 7 9 4 PQ 1 N T GS 41 4 1 N T 1G 1M _ 1 % _ 0 4 PQ 1 9 2 N 7 00 2 W 3 Z2 60 1 PC 3 1 1. 8V S PL 1 * H C B 3 2 1 6 K -8 0 0 T 30 4 3 V DD 5 3 S Y S 1 5V P R1 3 4 10 0 K _ 0 4 ON 2 6, 27 SY S5 V VIN VIN 1 VA 5V 3 .3 V 1 .8 VS 1 .8 V SY S1 5 V 5 VS 3 .3 VS 0 .9 VS 1 . 0 5V S 1 . 0 5V S _ C 6 V D D5 V D D3 2 4, 29 1 3, 24 , 2 6 . . 2 9 24 29 9 , 1 3, 14 , 1 9 . . 2 1 , 2 4 , 2 6 . . 2 8 3 , 7 , 9 , 1 3. . 1 5, 17 . . 19 , 2 1 , 2 3 , 2 6 , 2 7 16 8 , 9 , 1 1, 27 1 3, 24 , 2 9 9 , 1 3, 16 , 1 8 . . 2 1 2 , 6 , 7 , 9 , 1 1. . 2 3, 26 , 2 8 8 , 1 1, 27 2 ..5 ,7 ,9 ,2 6 3, 4 2 4, 28 , 2 9 3 , 6 , 7 , 1 4, 20 , 2 2 . . 2 4 , 2 9 Schematic Diagrams VCCNB, 1.5V, 1.05VS, M_BTN 5V VIN PC145 D 1 2 PQ4 1A Z2728 7 PU4 SC412A 1 1 40 Mils 2 2mm PR110 DL Z2725 3 17 5 PC97 PQ4 1B 10_1%_04 4 4 PAD PC80 AO493 2 Z2731 GND RTN N.C N.C 7 6 8 1.05VS PJ10 1 Z2724 VCC FB V1.05 3 .5A PC134 PC106 .001U_5 0V_ X7R_04 150U_4V_B2 2 3 9 PL3 PCMB053T _1.5UH 2 LX BST VOUT ALL_PWRGD Z2726 .1U_1 0V_X7R_04 DH PGD 8 /21 .1U_50V_ 06 1 5 6 16 Z2727 15 AO493 2 PC116 10 Z2732 100K_1%_04 14 13 EN 11 PR115 N.C 3 .3 V 12 23 ALL_PWRGD C 18K_1%_04 8 ILIM 0 _04 FM054 0- N PR114 PC137 Sheet 26 of 31 VCCNB, 1.5V, 1.05VS, M_BTN 1U_ 6.3V_X 5R_04 PC147 PR131 2 1.5K_1 %_04 8/21 PC13 1 .01U_50V_X7R_04 0_04 PR130 1 0K_1 %_04 20P_50V_NPO_04 PR12 5 D03 0401 5V PC2 8/21 V1.8 1U_6. 3 V_X5 R_04 VCNTL Z2721 2N7002W PC1 PC4 PC5 4.7U_10V_ X5R_08 G S SUSB .1U_10V_ X7R_04 PQ2 SUSB 4.7U_10V_X5R_0 6 D03 0106 25,27 8 1 D 5V 180K_1%_04 VOUT GND VFB 2 AP895 3 0.015U_1 0V_X 7R_04 Z2722 PR3 1K_1%_04 PR4 1.15K_1%_04 D03 0312 1 100 Mi ls 2 PC7 VOUT EN 1.5VS PJ1 2mm 2.5A 4 3 PR2 V1.5 6 PC3 PC6 1 VI N VI N POK C428 + 2 1_5 VSOK PU1 5 9 7 150U_4V_B2 2.0A 10K_04 .1U_10V_X7R_04 PR1 3.3VS 220UF M 4V D D02 1023 3.3VS 5V 1.5VS 3.3V VDD3 1.05VS 5VS VI N1 VI N VA 2,6,7,9,11..23,25,28 9,13,14,19..21,24,25,27,28 2,4,6,7,9,14,15 3,7,9,13..15,17..19,21,23,25,27 3,6,7,14,20,22..25,29 2..5,7,9, 2 5 9,13,16,18..21,25 24,25 13,24,25,27..29 25,29 D03 0106 VCCNB, 1.5V, 1.05VS, M_BTN B - 27 B.Schematic Diagrams PR55 1_5VSOK PC1 17 N.C PQ24 *2N7002W G *.1U_10V_X7R_04 SUSB SUSB PD6 .1U_50V_06 EN_1 . 05V S 25,27 A PR54 *100K_1%_04 4.7U_25V_X5 R_08 5V Schematic Diagrams 1.8V, 0.9VS PR86 PR87 1M_1%_04 10_06 3.3V A 5V PR143 PD7 V1.8 Ra PC76 VDDQ S PGD 7 PC68 Z2802 2 1.91K_ 1%_ 04 1. 8 VOK PC61 PR78 100P_50V_ 04 C Z2801 3 10_06 100K_04 FM05 40- N PU6 PR69 TON 1U_6.3V_X5R_04 1U_6.3V_X5R_04 PR139 0_04 24 Z2811 VIN Z2823 BST CO MP 0.1U_50V_06 PC140 PR129 Z2806 10 Z2809 Z2807 5 PC155 PR57 0_04 0.068U_10V_X7R_04 VSSA PJ5 0. 9VS 2 1 1.0A VTT_M EM OPEN-1mm PR62 PC121 20K_1%_04 4.7U_10V_X5R_08 ILIM LX 14 15 12 13 V1.8 PC122 4.7U_ 10V_X5 R_08 PC1 28 1U_6.3V_X5R_04 1 11 21 Z2813 V1.8 PL8 PCMB053T-3R3 MS 3.3UH 1 2 22 Z2814 19 Z2815 DL VDDP1 20 5V PC130 VDDP2 VDDP2 PJ14 1 2 PC142 3 VTTEN PGND1 PGND1 PGND2 VSSA 0_04 D 1.8VEN D02 1021 PC1 54 . 1U_10V_X7R_04 G S PR58 2 N7002W 10K_04 VTTEN D 5V PC4 8 PQ 25 25,26 SUSB . 1U_10V_X7R_04 G 2 N7002W 0.9VS 1.8V VIN 3.3V 5V B - 28 1.8V, 0.9VS 220UF M 4 VD 18 16 17 PQ 34 20,21,25 DD_ON# C431 + . 1U_10V_X7R_04 150U_4V_B2 AO 4932 1U_6.3V_X5 R_04 EN/PSV 1.8V 2 mm PQ 42B PR135 47K_04 3.5A D02 1023 PC138 VTT VTT SC486 5V PR84 4.7U_25V_X5R_08 8 PR12415K_1%_04 VCCA PC156 .001U_50V_X7 R_04 1U_6. 3 V_X5R_04 4 VSSA G ND PC141 1U_6.3V_X5R_04 Z2816 AO 4932 VTTS 25 PC69 0.1U_50V_06 PQ 42A 0_04 23 Z2812 DH *0. 1U_10V_X7R_04 PC57 1 10_06 PC45 2 10K_1%_04 PC15 3 7 PR142 10_06 FB REF 5 6 Rb PR73 Z2805 9 1 2 Z2803 6 Z2804 8 PR67 4 Sheet 27 of 31 1.8V, 0.9VS S B.Schematic Diagrams VIN 8,11 8,9,11,25 13,24..26,28,29 3,7,9,13..15,17. .19,21,23,25,26 9,13,14,19..21,24.. 2 6, 28 Schematic Diagrams VCORE V IN P C5 2 PC 5 1 P C5 0 1 5V 2 Z 29 0 2 3. 3 V S 2 1 Z 2 91 3 8 2 0_04 A O4 9 3 2 1 1 2 32 31 30 29 28 27 26 25 P C 1 43 P R 52 1 0 K _ 04 V C CA P R1 1 1 P C 32 8/21 0 _0 4 Sheet 28 of 31 VCORE 1 V G ND 4 1 PR1 5 1 * 10 0 0 P _ 5 0V _0 4 A O 4 9 32 1 2 *0 _ 0 4 P M _ DP R S L P V R 6 P TH 1 * 1 0 0K _5 % _ 0 6 N T C 11/25 T T RIP 1 C S+ C S- * 0 _0 4 1 PR 6 0 1 0 K _ 1 % _0 4 V C CSE N SE VC C A V SSSEN SE C L SET SS PC 4 9 2 V CC S E NS E 4 H YS V GN D 4 4 . 0 0 1 U _ 5 0 V _ X 7R _ 0 4 2 P C 46 2 PU5 SC454 1 5 0 U_ 4 V _ B 2 5 6 1 0 P _ 5 0 V _ N P O _ 04 2 V SSSEN SE 4 V _ CO RE DA C 1 P R 75 2 C S1 N Z 2 91 8 P R1 0 8 *0 _ 04 P C 10 4 2 CS + * 1 0 0P _5 0 V _ 0 4 Z 2 9 1 92 P R 1 00 2 8 K _ 1 %_ 0 4 1 1 PT H2 10 0 K _ 5 % _0 6 N T C P R3 7 1 K _ 1% _ 0 4 DR N PR 1 0 9 1 7 . 4 K _ 1% _ 0 4 PC 9 8 . 0 1 5 U _ 1 6 V _ X7 R _0 4 D02 1125 1 P C 39 2 1 PR 4 3 2 D02 1023 CS- * 3 . 3n F _ 5 0 V _ X 7 R _ 0 4 P R 38 1 K _ 1% _ 0 4 1 Z 2 92 0 2 PC 4 3 V G ND 4 2 P R1 1 2 * 0_ 0 4 5V V DD 5 P R 56 1 2 0 _0 6 1 V GN D 4 PR 4 1 PR 4 0 1 0 K_ 0 4 1 0 K _ 04 V G ND 4 D E N _ V C OR E PQ 2 0 Z 2 91 7 V C OR E _ ON 2 N 7 0 02 W VIN 5V 3 .3 VS 3 .3 V V D D5 V C OR E D02 1023 1 3 , 2 4 . . 2 7, 2 9 9 , 1 3 , 1 4, 19 . . 2 1 , 2 4 . . 2 7 2 , 6 , 7 , 9 , 1 1. . 23 , 2 5 , 2 6 3 , 7 , 9 , 1 3 . . 1 5, 1 7 . . 1 9 , 2 1 , 23 , 2 5 . . 2 7 2 4 , 2 5 , 29 4 2 N 7 00 2 W S 23 G D02 1023 V G N D4 P C1 0 9 V RE F V C *O P E N _2 5 m i l PQ 2 1 G PC 4 4 2 1 0 0 P _ 50 V _ 0 4 2 P C 13 3 PC 4 7 . 0 1 U_ 5 0 V _ X 7 R_ 0 4 Z 2 9 16 P C1 2 4 . 00 1 U _5 0 V _ X 7 R _0 4 88 7 _ 1 % _0 6 1 3 0K _1 % _ 0 4 P C1 2 9 * 1 00 P _ 5 0 V _ 0 4 PR 8 0 V GN D 4 1 1 18 0 P _ 5 0 V _ N P O _ 0 4 P C1 5 1 2 3 6 5K _1 % _ 0 4 2 PR6 3 1 P C1 4 6 1 0 0 P _ 5 0V _0 4 1 3 0 K _ 1% _ 0 4 1 . 00 1 U _5 0 V _ X 7 R _0 4 P R 68 1 00 _ 1 % _ 04 6 . 9 8 K _ 1% _ 0 6 PC1 3 9 2 R 1 84 1 0 0 _1 % _ 0 4 1 /1 6 W 1% 0402 E R RO UT 1 PR 8 5 R 182 6 8 P _ 50 V _ N P O_ 0 4 VR EF VC 1 0 0 P _5 0 V _ 0 4 1 33 PR 1 4 8 EN RAM P DP R S L TT R I P C S+ C SFB+ FB- E N _ V C OR E Z 29 1 5 9 10 11 12 13 14 15 16 G ND Z 29 1 0 1 * 0 _ 04 2 11/25 Z2914 2 V RT T # BST TG D RN BG V5 C L K E N# P W R GD V I D6 V I D5 V I D4 V I D3 V I D2 V I D1 V I D0 D P R S TP # O P E N -2 m m 3 P C 41 1 24 23 22 21 20 19 18 17 H YS C LS E T VRE F A GN D V C CA E R R OU T D AC SS 1 2 3 4 5 6 7 8 D P R1 4 5 2 29 0 3 29 0 4 29 0 5 29 0 6 29 0 7 29 0 8 29 0 9 3 0 . 1 K _ 1% _ 0 4 H _D P R S T P # 6 5 4 3 2 1 0 Z Z Z Z Z Z Z *1 0 0P _5 0 V _ 0 4 3, 5 H_ VID H_ VID H_ VID H_ VID H_ VID H_ VID H_ VID 0 _0 4 0 _0 4 0 _0 4 0 _0 4 0 _0 4 0 _0 4 0 _0 4 6A 2 8/21 P C3 8 C S 1N 4 4 4 4 4 4 4 P Q 44 B V C OR E PJ 3 1 6A * 10 _ 1 % _ 06 8/21 D E LA Y _ P W R G D 2 3 2 1 37 1 38 1 46 1 47 82 76 74 V _ C OR E 8/21 D RN P R 1 21 DR N BG 1 PR PR PR PR PR PR PR 2 V G ND 4 3 .3 VS Z29 01 PL 7 P C M B 0 5 3T _ 1 . 5 U H 2 1 U _ 6. 3 V _ X 5 R _ 0 41 K _ 1% _ 0 4 2 TG P R7 9 0_ 0 4 8/22 1 U_ 6 .3 V _ X 5 R_ 0 4 1 5 0U _ 4 V _ B 2 2 .1 U_ 1 0 V _ X 7 R_ 0 4 PR5 9 CL K EN # 2 * 1 0 K _ 04 + 1 5U _ 2 5V _V PC 4 2 P C6 3 P R8 3 1 P C 67 1 2 . 2K _1 % _ 0 4 2 1 PR 1 2 6 V C CA 0 .1 U_ 5 0 V _ 0 6 F M0 5 4 0- N PR1 2 8 0_ 0 6 1 BST PR6 1 PQ 4 4 A 4 . 7 U _2 5 V _ X 5 R _0 8 1 U _ 6 . 3 V _ X 5R _ 0 4 2 C . 0 1U _ 1 6V _X 7R _ 04 .0 1 U_ 1 6 V _ X 7 R_ 0 4 . 0 1U _ 5 0V _X 7R _ 04 2 PR 5 3 1 0 _ 06 PJ 4 VCORE B - 29 B.Schematic Diagrams .0 1 U_ 5 0 V _ X 7 R_ 0 4 2 P D9 C1 7 5 3 .3 V S 2 1 P C 12 3 C 1 78 7 1 C1 6 5 S 1 C 1 82 1 2 1 1 0 . 1U _ 5 0V _0 6 A V CO RE Schematic Diagrams AC-In, Charger VA PR9 P P Q 36 A M48 35P Charge Current 0.2A Total Power 28W PQ 3 8A Z 3 045 PC 9 5 . 001 U _50 V_ X7 R_ 04 1 P Q 40 A M48 35 P 8 3 7 1 2 1 PC 1 25 D0 3 0 30 4 V _B A T_B PR 1 53 Z3 06 8 6 5 2. 7_ 08 PD 1 3 A FM5 822 C D03 02 17 PC 11 8 4 + 2 3 P Q3 8B SP 8K 1 0S FD 5 TB PC 1 44 10_ 06 Z 30 61 PR 4 9 100 K_ 04 P R 48 P C 13 2 D 02 101 3 P C 127 0. 1 U_ 50 V_ 06 0 _0 4 6 5 0_ 04 P R 92 PR 1 36 20m _32 16 PR 1 02 4. 7U _2 5V _X 5R _ 08 10K _1 %_0 4 P R 36 15 U_ 25 V_ 6X 4. 5 PR 2 6 Z 30 26 Z3 044 P C 37 PC 6 2 PL 5 4. 7 UH _ 6. 8*7 . 3*3 .5 1 2 SP 8K 10 SF D 5T B 2 1 7 P C 35 D 03 030 4 4. 7U _2 5V _X 5R _ 08 P R 25 20 m_3 216 A M48 35P 3 2 1 4. 7U _ 25V _X 5R _ 08 P Q 11 Charge Current 3.2A BAT_B Charge Voltage 8.4V 5 6 7 8 4 0 .1 U _5 0V _06 130 K_ 1%_ 04 8 PR 9 5 10 K_ 08 47 . U _25 V_ X5 R _0 8 P R 15 4. 7 U _25 V_ X5 R _08 PC 2 3 3 4 4 G2 3 S2 2 G1 1 S1 P C 40 0 . 1U _5 0V _06 D 02 10 23 8 7 6 5 P C 55 1K _ 1%_0 4 PR 1 6 P C 86 0 . 1U _5 0V _06 Z 30 62 2 DEL PC74, PC150 ,PC1 52 20 0K _1% _04 D 02 11 25 C Sheet 29 of 31 AC-In, Charger PD 1 1 F M054 0- N C A P C 87 1U _2 5V _X 7R _0 8 P J1 5 *O P E N _25 mil B A T_S E L B PQ 1 6 D TD 11 4E K E Z3 003 PR 2 0 V _B A T_A DE L PF1 P C 60 PC 6 4 *1 000 P_ 50 V_ 04 Z 30 30 200 K_ 1%_ 04 PR 1 07 100 K_ 1%_ 04 Z 30 39 S GND5 P R 32 CHARG E CURRE NT ADJ P R 10 6 P C 19 PR 1 03 S GN D 5 0_0 4 PJ 16 B Z 30 60 *O PE N _2 5mi l 8 . 2K _1% _04 SG N D 5 . 00 1U _ 50V _X 7R _0 4 22 K_ 1%_ 04 2 0K _1 %_0 4 P Q1 7 C PR 1 04 D TD 11 4E K D0 3 0 213 C PR 1 50 PR 2 8 Z 306 4 P R 21 PC 28 0. 1U _ 50V _0 6 1K _1 %_0 4 PR 2 9 Z 302 9 P C 94 E S GN D 5 P C 27 SY S 5V 4. 7U _ 25V _ X5 R_ 08 V DD5 P R4 2 D02 10 13 S G N D5 01 . U _5 0V _06 PR 47 1 0K _1% _04 . 01 U _5 0V _X7 R _04 4 Z3 06 3 1 00K _0 4 Z 30 19 1 K_ 1%_ 04 15 K_ 1%_ 04 D 02 1 12 5 PC 6 5 0. 1U _ 50V _ 06 26 25 Z 30 16 Z 30 17 Z 30 18 P R 101 PR 2 2 P C 30 SG N D 18 17 33 6 5 PC 5 8 Z3 065 10 23 22 21 20 19 8 7 2 1 P R 50 D Z 30 20 D02 P C 36 AD J 3 B AT T 3 C TL 1 39 .2 K_ 1%_ 04 MB3 9A 132 1 K_ 1%_ 04 Z 301 0 PAD . 1U _5 0V _06 0. 1U _5 0V _0 6 P R 45 2. 94 K_ 1%_ 04 TOT AL POW ER ADJ 30 29 28 27 32 31 C T L2 PR 3 9 030 4 9 10 D0 3 T RE RMA L PC 1 5 124 K _1%_ 04 SG N D 5 D OC K _A V AD J 1 CO MP 1 24 23 1 00P _5 0V _04 7 8 O U T- 2 PG N D C E LL S 3 4 5 6 Z 30 08 Z 30 09 A DJ 2 C O MP 2 C O MP 3 Z 30 06 Z 30 07 B A T_A P Q 26 A M48 35P VA VI N C TL 1 GN D V RE F RT CS Z3 02 4 15 Z 3 025 16 +I N C 1 Z 30 05 CB O UT - 1 LX VB P R 15 4 1 0K _0 4 O U TC 1 O UT C 2 + I NC 2 -I N C 2 VC C I- N C 1 +I N C 1 AC I N AC O K -I N E 3 - I N E1 1 2 Z3 021 11 Z 30 22 12 13 Z 302 3 1 4 A PU 2 0. 1 U _50 V_ 06 SG N D 5 VA Z3 070 200 K _1%_ 04 F M5 82 2 Z 30 14 Z 301 5 Z 301 1 P D1 5 Z3 012 Z 30 13 C D0 3 021 3 10 0K _1% _04 PQ 9 B B AT _S EL B AT _S E L 2 3 P Q 39 2N 7 00 2W E D T D 114 E K G P Q 50 2 N 70 02W D Z 30 31 100 K_ 04 BAT_SEL L: charge from 1st battery S S G ND 5 PR 1 4 8/8 S GN D 5 H: charge from 2nd battery D 02 112 5 PC 11 1 C T L1 0.5V/1A P R 46 0_ 04 G .0 01U _ 50 V_ X7R _ 04 C H G_ C U R S D 23 P Q6 P R 13 10 0K _04 Z 303 2 SG N D 5 G P C 108 S D S Y S5 V S GN D 5 2N 70 02W D 02 VN I G CH G _ EN 11 22 01 . U _50 V_ 06 P Q 12 23 P J2 S 2N 70 02W Battery Voltage: 6V~8.4V V _B AT _B P C 12 6 2 5mi l SG N D 5 *O P EN _ 25m li P Q 46 25 mi l BA T _A E . 01 U _50 V _X7 R _04 PR 1 27 D TA 11 4E U A C P C 81 30K _1 %_0 4 Z 30 52 P C 92 P C 85 . 0 1U _5 0V _X7 R _04 . 01 U _50 V _X7 R _04 P C 91 B AT _V O LT_ A 23 0. 1 U _50 V_ 06 8 mil 0. 1U _5 0V _0 6 PM BAT _B1 P MB AT _B 1 2 1 1 2 D Z3 050 B VD D 3 SY S 5V G P R 14 4 PC 1 48 60 . 4K _1 %_0 4 0. 1U _ 50V _0 6 8 52 05- 0 2R P C B Fo ot pr i nt = 85 205 - 02R PR 9 9 0 _06 P Q 27 2 N 700 2W S G N D5 V_ BA T _B S Y S 15V 9 /10 , M860 TU -J MODEM 1 S P R 24 6-20-43150-102 10 K_ 04 8 /4 A C _I N # 23 C P Q 45 C P D2 VA A Z3 03 3 B P Q 37 V _B AT _B E PR 1 18 D TA 11 4E U A C 8/4 P R 11 9 P R1 20 *1 00 K_ 04 10 0K _04 B AT _V O LT_ B 23 11 22 PC 7 5 10 23 . 01U _ 50V _X 7R _0 4 P MBA T _A 1 D P R 65 PC 1 36 PQ 2 8 23 E C _2N D _ BA T_ D I CH A R G E 60 . 4K _1 %_0 4 G 0. 1U _ 50V _0 6 S *. 1U _ 10 V_ X5R _ 04 D02 D 02 2N D _ BA T_ D IC H A R G E D Z3 051 B P C 21 V_ BA T_ A 30K _1 %_0 4 Z 30 53 D TD 1 14E K UD Z 16 B E P C1 35 23 23 0. 1U _ 50 V_ 06 23 2 N 700 2W S MC _B AT S MD _B AT BA T_ D ET _A P R 70 100 _1% _04 Z 30 57 P R 71 P R 72 100 _1% _04 100 _1% _04 Z 30 58 Z 30 59 EC 2nd_BAT_Discharge S Y S5 V G S B.Schematic Diagrams J060697 AO4803->AO4813 1 2 3 Z 30 28 0916 0. 1U _ 50V _0 6 0. 1U _ 50V _0 6 1 2 3 4 2D C - G 72 6- I 03 D C_1 9V VA 0 . 1U _5 0V _06 2 3 4 4 1 PL 2 H C B 453 2K F -8 00 T60 PC 6 6 PC 1 20 V IN Z3 04 9 D 02 112 6 J_D C _ JA C K1 PQ 4 3 AO 4 813 BAT_A 0 _04 P D0 2 1 12 2 2 N D _B AT _D I C H AR G E 2nd_BAT_Discharge H: Discharge from 1st battery L: Discharge from 2nd battery 0 . 1U _5 0V _06 6 5 D2 D2 D1 D1 7 Z 30 48 8 V _B A T_B AC IN & CH ARGE R P Q 29 2 N 700 2W L: Discharge from 1st battery H: Discharge from 2nd battery BA T _A D1225 B - 30 AC-In, Charger C 1 69 C 17 0 C 17 2 . 0 1U _5 0V _X7 R _04 . 01 U _50 V_ X7 R _04 0. 1 U _50 V_ 06 P C 73 PC 5 9 0 . 1U _5 0V _06 0. 1U _ 50V _0 6 P C 53 0. 1U _5 0V _0 6 PC 7 2 PC 7 0 30 P_ 50V _ NP O _0 4 30 P_ 50V _N P O _0 4 30P _5 0V _N P O _0 4 1 2 3 4 B T D- 0 5TI 1 G 0820 footprint m54R J060697 .1U_50V_X7R_04->.1U_25V_X7R_06 +N I C1 P C7 1 5 PR 6 4 *10 0K _04 D O C K _A V 2 1 V DD5 24, 2 5, 28 S Y S 15V 13, 2 4, 25 V DD3 S Y S 5V 3, 6, 7 ,1 4, 20 , 22. . 25 24, 2 5 VIN VA 13, 2 4. . 28 25 Schematic Diagrams Fingerprint Board 4 7 M R O F D R A O B R E G N I F TC S4B Un stu ff F CC1 . 1 U _ 2 5V _ X 7 R _ 0 6 F C T GR I D 0 / S E N S E _ F F Z 3 2 05 F U2 E X T_ R I N G2 C RID O RIN G MU X OU T A1 F C T E S D _ R I N G _F B1 F C T GR I D 0 / S E N S E _F F C R 16 1 00 _ 06 F C C T 3 . 3 V _F 1 T CS 4B Un stu ff T CS 4C 33 0K_ 04 3 2 F C R 18 F C C1 2 R C L A MP 0 5 02 B C 1 33 0 K _ 04 F C GN D E1 F C C6 * 33 0 K _ 04 * 1U _ 6. 3 V _ X 5R _ 04 F C TP D _ R E G _F F C GN D C F C T MC S _ F M CS G1 D A TA 1 G P I O0 M CL K U S B _D N U SB_ DP M OS I PD_ R EG N RESET D GN D D A TA 2 E X T_ R I N G1 PVD D X T AL IN P GN D X T A L OU T F CD 1 D 03 * S C S 5 5 1V -30 A * 10 m i _l s h ort F C T DV D D1 _ F F C T GP I O 1 _F A2 B2 S F C Q1 N DS 3 5 2 A P _ NL F C T G_ F E T _F G F C R2 F C GN D F CG ND F CG ND Sheet 30 of 31 Fingerprint Board * 0_ 0 6 C 2 F CT DA T A 0 _ F F C C5 D 2 F CT DA T A 1 _ F . 0 2 2U _1 6 V _ X 7R _0 4 D A GN D D A TA 0 F C C T 3. 3 V _ F F C T MI S O / MO D E 3 _ F J1 F CT A V DD _ F F CT X IN_ F E2 F C T GP I O 0 / I N T _ F F2 F C T MC LK _F F C TT C _V D D _ F G2 F C T U S B _ P N 3_ R _F F CR 3 15 _ 0 6 F C C4 F CC 7 F C R1 9 1 U _ 6 . 3 V _X 5 R _ 0 4. 1U _ 10 V _ X 7R _0 4 3 3_ 0 4 H 2 F CT US B _ P P 3 _ R_ F J2 F C T MO S I _ F A3 F C T P D _ R E G_ F B3 F C T N R E S E T _F F C TD V D D 1 _F E G P I O1 H 1 B F C C1 7 F C GN D F CT DA T A 2 _ F E3 F C T E S D _ R I N G _F 3 4 F C R2 1 V CC F CG ND * 47 K _ 0 4 F C C1 5 33 0 K _ 04 F C C2 1 2 7 R x/ C x F CR 2 0 F C C 18 1 00 K _ 0 4 1U _ 6. 3 V _ X 5 R _ 04 F C C T3 . 3 V _ F 3 4 F3 1 8 A# B F CG ND 2 F C X1 1 2 MH z-H S X5 3 1 S F CR 1 1 F Z 3 2 02 F C GN D D 3 F C C T 3 . 3V _F F CC 2 . 1 U _ 1 0V _ X 7 R _ 0 4 F CU2 1 U _ 6 . 3V _X 5 R _ 0 4 C 3 F C GN D F C T X OU T_ F F C GN D F C Q2 B TB 1 1 9 8N 3 C M IS O DV D D F C R1 4 F C T TC _ V D D _F P A D _V D D 1 B C LR # C x G ND Q 5 2 2 P _ 50 V _ N P O_ 04 F Z 32 0 4 6 F Z 32 0 1 F CC 3 2 . 2U _ 6. 3 V _ 0 4 F Z 3 2 03 F C R 1 7 10 K _ 0 4 F C GN D 2 2 P _ 50 V _ N P O _ 04 D03 0109 F C GN D F C T G_ F E T _F S N 7 4L V C 1 G1 23 D C T F C T TC _ V D D _F F CT X I N_ F G3 H 3 F C GN D F C GN D F C GN D F C T X OU T _ F J3 F C TG P I O0 / I N T_ F F C R 4 1 . 5 K _ 04 F C TU S B _ P P 3 _R _ F C R 5 2 7 . 4 _1 % _ 04 TC S 4 B F C T US B _ P P 3 _ F F CC 8 47 P _ 5 0V _0 4 F CT T C_ V DD _ F F C GN D F CT T C_ V D D_ F F CU3 F C T MI S O / MO D E 3 _ F5 F C T MOS I _F 2 1 F C T MC S _F F C T MC L K _ F 6 S Q C S# SC K VDD VSS F C C 20 F C T U S B _P N 3 _R _ F F C R 6 F C TU S B _ P N 3 _ F 27 . 4 _ 1% _ 0 4 F C TN R E S E T _ F F C R 12 47 K _ 0 4 . 1 U _ 10 V _ X 7 R _ 04 W P# 4 F C C T 3. 3 V _ F 8 H O LD # F CC 1 3 3 F C C9 1 0 0K _0 4 4 7 P _5 0 V _ 04 F CC 1 0 F C C 14 1 U _6 . 3 V _ X5 R _0 4 . 1U _ 10 V _ X 7R _ 04 . 1U _ 10 V _ X 7R _ 04 7 F C GN D M 9 51 2 8 W MN 6T P F CG ND F C R7 F CG ND F CG ND F CG ND F C GN D TC S4B 33P _5 0V _0 4 TC S4C 22P _5 0V _0 4 F C T MU XO U T _ F F CC1 1 F CT A V D D_ F F CT T C_ V D D_ F F C T D V D D 1_ F F C T TC _ V D D _F Deatil G FH 1 H7 _ 0 D4 _ 5 F C TD A T A 2 _F F H4 H 7 _0 D 4_ 5 FH 3 F H2 H 7_ 0 D 4 _ 5 H 7 _ 0D 4 _5 F C R1 3 4 7 K _ 04 3 3 P _5 0 V _ 0 4 F C GN D F C C T 3 . 3V _F F P _C ON 1 F C TU S B _ P N 3 _ F F C T USB_ PP3 _ F 4 3 2 1 FP_CON1 4 1 F C TD A T A 1 _F F C R8 F C TD A T A 0 _F F C R9 F C TG P I O1 _ F F C R1 0 F C TM I S O/ M OD E 3 F_FC R 1 1 4 7 K _ 04 F CC 1 6 F C C1 9 F C C 22 4 7 K _ 04 1 U _ 6 . 3V _ X 5 R _ 0 14 U _ 6 . 3 V _ X5 R _0 41U _ 6. 3 V _ X 5R _ 04 3 3 0K _0 4 4 7 K _ 04 8 5 2 01 -0 4 05 1 F C GN D F C GN D F C GN D F CG ND F CG ND F C GN D F CG ND F CG ND F C GN D Fingerprint Board B - 31 B.Schematic Diagrams F1 U ns tu ff 4 7P _5 0V_ 06 TC S4 B TC S4 C F C T A V D D _F AVD D F C R1 5 *4 7 P _ 5 0V _ 0 6 F C T MU XO U T _ F D 1 TC S4C 1U _10 V_ 06 F CU1 10mil F C T E S D _ R I N G_ F Schematic Diagrams USB Board DC_L1 HCB3216KF-800T30_12 DC_VCC USB 0910 DCVCC_USB Sta nda rd USB DC _USB1 4 3 2 DC_USB_PP5_R 3 4 DC_R2 0_04 DC_R1 0_04 + DC_C4 DC_C6 100U_6.3V_B2 Sheet 31 of 31 USB Board USB_GND V+ DATA_L DATA_H GN D .1U_10V_X7R_04 U SB_GND shield shield B.Schematic Diagrams DC _U SB_PP5 DC_USB_PN5_R GND1 GND 2 DC _U SB_PN5 1 DC_L2 *WCM2012 F2S-900T04 1 2 SK10713 USB_GN D USB_GND 0820 FOORPRINT L390 1.5A DC_U1 DC_5V 1 2 D C_C 3 3 USB_GND 1U_6.3V_X5R_04 4 USB_G ND DC_DD_ON# G ND VOU T VIN VOU T VIN VOU T EN DC_VCC USB DC_C2 DC _C 1 10U_6.3V_X5R_06 . 1U_10V_X7R_04 8 7 6 DC101 5 FLG RT9715BGS D03 0224 DC_C5 V oltage Keep 4.9V ~ 5.25V . USB_GN D 10K_04 DC_5V Deatil F DC H2 H5_0D2_3 TO MB CON DCH1 H5_0D2_3 DC _5V DC_USB_CON1 DC_USB_CON1 1 6 1 2 3 4 5 6 87212- 06G0 USB_G ND DC_USB_PN5 DC_USB_PP5 DC_DD_ON# 0823 footprint L39 6-20-41A10-106 B - 32 USB Board U SB_GND D02 1015 USB_GND
