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Download Stellaris LM3S1968 Evaluation Board User`s Manual (Rev. A)
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Stellaris® LM3S1968 Evaluation Board User ’s Manual EK-LM3S196 8-03 Co pyrigh t © 2 007– 201 0 Te xas In strumen ts Copyright Copyright © 2007–2010 Texas Instruments, Inc. All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments. ARM and Thumb are registered trademarks, and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others. Texas Instruments 108 Wild Basin, Suite 350 Austin, TX 78746 http://www.ti.com/stellaris 2 January 6, 2010 Stellaris® LM3S1968 Evaluation Board Table of Contents Chapter 1: Stellaris® LM3S1968 Evaluation Board ....................................................................................... 7 Features.............................................................................................................................................................. 8 Block Diagram .................................................................................................................................................... 8 Evaluation Kit Contents ...................................................................................................................................... 9 Evaluation Board Specifications ..................................................................................................................... 9 Features of the LM3S1968 Microcontroller......................................................................................................... 9 Chapter 2: Hardware Description .................................................................................................................. 11 LM3S1968 Evaluation Board ............................................................................................................................ 11 LM3S1968 Microcontroller Overview ............................................................................................................ 11 Hibernation Module....................................................................................................................................... 11 Clocking ........................................................................................................................................................ 11 Reset............................................................................................................................................................. 11 Power Supplies ............................................................................................................................................. 12 Debugging..................................................................................................................................................... 12 USB Device Controller Functions ..................................................................................................................... 13 USB Overview............................................................................................................................................... 13 USB to JTAG/SWD ....................................................................................................................................... 13 Virtual COM Port........................................................................................................................................... 13 Serial Wire Out.............................................................................................................................................. 14 Organic LED Display ........................................................................................................................................ 14 Features........................................................................................................................................................ 14 Control Interface ........................................................................................................................................... 14 Power Supply................................................................................................................................................ 14 Design Guidelines......................................................................................................................................... 14 Further Reference......................................................................................................................................... 14 Other Peripherals.............................................................................................................................................. 15 Speaker......................................................................................................................................................... 15 Push Switches .............................................................................................................................................. 15 User LED ...................................................................................................................................................... 15 Bypassing Peripherals ...................................................................................................................................... 15 Interfacing to the EVB....................................................................................................................................... 16 Using the In-Circuit Debugger Interface ........................................................................................................... 16 Appendix A: Schematics................................................................................................................................ 19 Appendix B: Connection Details ................................................................................................................... 25 Component Locations....................................................................................................................................... 25 Evaluation Board Dimensions........................................................................................................................... 26 I/O Breakout Pads ............................................................................................................................................ 27 Recommended Connectors .............................................................................................................................. 28 ARM Target Pinout ........................................................................................................................................... 28 References ....................................................................................................................................................... 29 January 6, 2010 3 List of Tables Table 2-1. Table 2-2. Table B-1. Table B-2. Table B-3. 4 Stellaris LM3S1968 Evaluation Board Hardware Debugging Configurations................................ 12 Isolating On-Board Hardware........................................................................................................ 15 I/O Breakout Pads ......................................................................................................................... 27 Recommended Connectors........................................................................................................... 28 20-Pin JTAG/SWD Configuration .................................................................................................. 28 January 6, 2010 Stellaris® LM3S1968 Evaluation Board List of Figures Figure 1-1. Figure 1-2. Figure 2-1. Figure B-1. Figure B-2. Stellaris LM3S1968 Evaluation Board Layout ................................................................................. 7 LM3S1968 Evaluation Board Block Diagram .................................................................................. 8 ICD Interface Mode ....................................................................................................................... 16 Component Locations ................................................................................................................... 25 LM3S1968 Evaluation Board Dimensions..................................................................................... 26 January 6, 2010 5 6 January 6, 2010 C H A P T E R 1 Stellaris® LM3S1968 Evaluation Board The Stellaris® LM3S1968 Evaluation Board is a compact and versatile evaluation platform for the Stellaris LM3S1968 ARM® Cortex™-M3-based microcontroller. The evaluation kit design highlights the LM3S1968 microcontroller's peripherals and its Hibernation module. A 3V lithium battery, included in the kit, supplies power to the Hibernation module and maintains data and real-time clock information for about two years in the absence of USB power. You can use the EVB either as an evaluation platform or as a low-cost in-circuit debug interface (ICDI). In debug interface mode, the on-board microcontroller is disabled, allowing connection of the debug signals to an external Stellaris microcontroller target. The kit is also compatible with high-performance external JTAG debuggers. This evaluation kit enables quick evaluation, prototype development, and creation of application-specific designs using the LM3S1968's broad range of peripherals. The kit also includes extensive source-code examples, allowing you to start building C code applications quickly. Figure 1-1. Stellaris LM3S1968 Evaluation Board Layout JTAG/SWD input and output Lithium coin cell OLED Graphics Display USB Device Interface In-circuit Debug Interface Reset switch Navigation Switches Speaker Status LEDs Power LED Select switch Hibernate LED Stellaris TM LM3S1968 Microcontroller January 6, 2010 66 pin I/O break -out header 7 Stellaris® LM3S1968 Evaluation Board Features The Stellaris LM3S1968 Evaluation Kit includes the following features: Stellaris LM3S1968 microcontroller Simple setup; USB cable provides serial communication, debugging, and power OLED graphics display with 128 x 96 pixel resolution User LED, navigation switches, and select pushbuttons 8Ω magnetic speaker with class D amplifier Internal 3 V battery and support for on-chip hibernation module USB interface for debugging and power supply Standard ARM® 20-pin JTAG debug connector with input and output modes LM3S1968 I/O available on labeled break-out pads Block Diagram LM3S1968 Evaluation Board Block Diagram Target Cable Figure 1-2. I/O Signal Break-out I/O Signal Break-out Dual USB Device Controller UART0 Stellaris LM3S1968 Microcontroller Nav Switch and peripherals 3V Coin Cell LM3S1968 Evaluation Board LED Select Switch +3V to MCU +3.3V Regulator 8 Debug +3V to debug interface +3.3V Regulator Reset OLED Display 128 x 96 I/O Signals SWD/JTAG Mux USB USB Cable Debug JTAG/SWD Output/Input Amp Speaker I/O Signal Break-out I/O Signal Break-out January 6, 2010 Stellaris® LM3S1968 Evaluation Board Evaluation Kit Contents The evaluation kit contains everything needed to develop and run applications for Stellaris microcontrollers including: LM3S1968 evaluation board (EVB) USB cable 20-pin JTAG/SWD target cable CD containing: – A supported version of one of the following (including a toolchain-specific Quickstart guide): • Keil™ RealView® Microcontroller Development Kit (MDK-ARM) • IAR Embedded Workbench • Code Sourcery GCC development tools • Code Red Technologies development tools • Texas Instruments’ Code Composer Studio™ IDE – Complete documentation – Quickstart application source code – Stellaris® Firmware Development Package with example source code Evaluation Board Specifications Board supply voltage: 4.37–5.25 Vdc from USB connector Board supply current: 130 mA typ (fully active, CPU at 50 MHz) 17 uA (Hibernate mode, operating from battery) Break-out power output: 3.3 Vdc (60 mA max), 15 Vdc (15 mA max) Speaker power: 0.3 W max Dimensions: 3.20” x 3.50” x 0.5” (LxWxH) RoHS status: Compliant Features of the LM3S1968 Microcontroller 32-bit RISC performance using ARM® Cortex™-M3 v7M architecture – 50-MHz operation – Hardware-division and single-cycle-multiplication – Integrated Nested Vectored Interrupt Controller (NVIC) – 42 interrupt channels with eight priority levels 256-KB single-cycle Flash 64-KB single-cycle SRAM Four general-purpose 32-bit timers Three fully programmable 16C550-type UARTs January 6, 2010 9 Stellaris® LM3S1968 Evaluation Board Eight 10-bit ADC channels (inputs) when used as single-ended inputs Three independent integrated analog comparators Two I2C modules Three PWM generator blocks – One 16-bit counter – Two comparators – Produces two independent PWM signals – One dead-band generator 10 Two QEI modules with position integrator for tracking encoder position 5 to 52 GPIOs, depending on user configuration On-chip low drop-out (LDO) voltage regulator Hibernation module January 6, 2010 C H A P T E R 2 Hardware Description In addition to a microcontroller, the Stellaris LM3S1968 evaluation board includes a range of useful peripherals and an integrated in-circuit debug interface (ICDI). This chapter describes how these peripherals operate and interface to the microcontroller. LM3S1968 Evaluation Board LM3S1968 Microcontroller Overview The heart of the EVB is a Stellaris LM3S1968 ARM Cortex-M3-based microcontroller. The LM3S1968 offers 256-KB Flash memory, 50-MHz operation, and a wide range of peripherals. Refer to the LM3S1968 data sheet (order number DS-LM3S1968) for complete device details. The LM3S1968 microcontroller is factory programmed with a quickstart demo program. The quickstart program resides in the LM3S1968 on-chip Flash memory and runs each time power is applied unless the quickstart has been replaced with a user program. Hibernation Module The Hibernation Module manages removal and restoration of power to the microcontroller and peripherals while maintaining a real-time clock (RTC) and non-volatile memory. The EVB includes a 3 V Lithium battery to maintain Hibernate module power when USB power is unavailable. The Hibernation state is initiated in software. Leaving Hibernation mode requires either an RTC timer match event or assertion of the WAKE signal. Pressing the Select switch on the EVB asserts WAKE. The Hibernate LED (LED4) signals that the EVB is in Hibernate state (+3.3 V disabled) as long as USB power is present. When USB power is removed, the EVB will remain in the Hibernate state, however, the LED will not be on. Clocking The EVB uses an 8.0-MHz crystal to complete the LM3S1968 microcontroller's main internal clock circuit. An internal PLL, configured in software, multiples this clock to 50 MHz for core and peripheral timing. The real-time clock oscillator is part of the microcontroller's Hibernation module and uses a 4.194304 MHz crystal for timing. This frequency divides by 128 to generate a 32.7680 kHz standard timing frequency. Reset The LM3S1968 microcontroller shares its external reset input with the OLED display. In the EVB, reset sources are gated through the CPLD, though in a typical application a simple wired-OR arrangement is sufficient. External reset is asserted (active low) under any one of three conditions: Power-on reset Reset push switch SW1 held down January 6, 2010 11 Hardware Description Internal debug mode—By the USB device controller (U5 FT2232) when instructed by debugger The LM3S1968 microcontroller has an internal power-on reset, so the external circuits used in the EVB are not required in typical applications. Power Supplies In normal operating mode, the LM3S1968 is powered from a +3.3-V supply. A low drop-out (LDO) regulator converts +5-V power from the USB cable to +3.3-V. +3.3-V power is available for powering external circuits. If +5-V is removed, the Hibernation module will remain powered by the 3-V lithium battery. Other microcontroller and board functions will not function until power is restored. +15-V power is available when the OLED display power supply is active. The speaker and OLED display boost-converter operate directly from the +5-V power. Debugging Stellaris microcontrollers support programming and debugging using either JTAG or SWD. JTAG uses the signals TCK, TMS, TDI, and TDO. SWD requires fewer signals (SWCLK, SWDIO, and, optionally, SWO, for trace). The debugger determines which debug protocol is used. For example, Keil RealView tools support only JTAG debugging. The JTAG TRST signal is not required for debugging and is not connected to the 20-pin JTAG/ SWD header. TRST may be asserted by the CPLD in debug Mode 2. Debugging Modes The LM3S1968 evaluation board supports a range of hardware debugging configurations. Table 2-1 summarizes these configurations. Table 2-1. Stellaris LM3S1968 Evaluation Board Hardware Debugging Configurations Mode Debug Function Use Selected by 1 Internal ICDI Debug on-board LM3S1968 microcontroller over USB interface. Default mode 2 ICDI out to JTAG/SWD header The EVB is used as a USB to SWD/JTAG interface to an external target. Connecting to an external target and starting debug software. The red Debug Out LED will be ON. 3 In from JTAG/SWD header For users who prefer an external debug interface (ULINK, JLINK, etc.) with the EVB. Connecting an external debugger to the JTAG/SWD header Modes 2 and 3 automatically detect the presence of an external debug cable. When the debugger software connected to the EVB's USB controller the EVB automatically selects Mode 2 and illuminates the red Debug Out LED. 12 January 6, 2010 Stellaris® LM3S1968 Evaluation Board Debug In Considerations Debug Mode 3 supports evaluation board debugging using an external debug interface. Mode 3 is automatically selected when a device such as a Segger J-Link or Keil ULINK is connected. Boards marked Revision B or later automatically configure pin 1 to be a 3.3-V reference, if an external debugger is connected. To determine the revision of your board, locate the product number on the bottom of the board; for example, EK-LM3S6965-B. The last character of the product number identifies the board revision. A configuration or board-level change may be necessary when using an external debug interface with revision A of this evaluation board. Because the evaluation board supports both debug out and debug in modes, pin 1 of the 20-pin JTAG/SWD header is, by default, not connected to +3.3 V. Consequently, devices requiring a voltage on pin 1 to power their line buffers may not work. Two solutions exist. Some debugger interfaces (such as ULINK) have an internal power jumper that, in this case, should be set to internal +3.3-V power. Refer to debugger interface documentation for full details. However, if your debugger interface does not have a selectable power source, it may be necessary to install a 0-Ω resistor on the evaluation board to route power to pin 1. Refer to the schematics and board drawing in the appendix of this manual for the location of this resistor. USB Device Controller Functions USB Overview An FT2232 device from Future Technology Devices International Ltd manages USB-to-serial conversion. The FT2232 is factory-configured to implement a JTAG/SWD port (synchronous serial) on channel A and a Virtual COM Port (VCP) on channel B. This feature allows two simultaneous communications links between the host computer and the target device using a single USB cable. Separate Windows drivers for each function are provided on the Documentation and Software CD. A small serial EEPROM holds the FT2232 configuration data. The EEPROM is not accessible by the LM3S1968 microcontroller. For full details on FT2232 operation, go to www.ftdichip.com. USB to JTAG/SWD The FT2232 USB device performs JTAG/SWD serial operations under the control of the debugger. A CPLD (U6) multiplexes SWD and JTAG functions and, when working in SWD mode, provides direction control for the bidirectional data line. The CPLD also implements logic to select between the three debug modes. The target microcontroller selection is determined by multiplexing TCK/SWCLK and asserting TRST. In Hibernate state, the JTAG/SWD interface circuit remains powered. Although debugging is not possible, maintaining power avoids re-enumeration of the USB device after each wake transition. To avoid powering the microcontroller, the CPLD sets its output signals to a high-impedance state whenever the Hibernation signal is asserted. Virtual COM Port The Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal) to communicate with UART0 on the LM3S1968 over USB. Once the FT2232 VCP driver is installed, Windows assigns a COM port number to the VCP channel. January 6, 2010 13 Hardware Description Serial Wire Out The evaluation board supports the Cortex-M3 serial-wire output (SWO) trace capabilities. Under debugger control, the CPLD can route the SWO datastream to the virtual communication port (VCP) transmit channel. The debugger can then decode and interpret the trace information received from the VCP. The normal VCP connection to UART0 is interrupted when using SWO. Not all debuggers support SWO. Refer to the Stellaris LM3S3748 data sheet for additional information on the trace port interface unit (TPIU). Organic LED Display The EVB features an Organic LED (OLED) graphics display with 128 x 96 pixel resolution. OLED is a new technology that offers many advantages over LCD display technology. The display is protected during shipping by a thin, protective plastic film. The film can be removed using a pair of tweezers. Features RiT Display P14201 series display 128 columns by 96 rows High-contrast (typ. 500:1) Excellent brightness (120 cd/m2) Fast 10 us response Control Interface The OLED display has a built-in controller IC with synchronous serial and parallel interfaces. Synchronous serial (SSI) is used on the EVB as it requires fewer microcontroller pins. Data cannot be read from the OLED controller; only one data line is necessary. The Stellaris® Firmware Development Package (included on the Documentation and Software CD) contains complete drivers with source-code for the OLED display. Power Supply A +15-V supply is needed to bias the OLED display. A FAN5331 device from Fairchild combines with a few external components to complete a boost converter. A GPIO (PH3/FAULT) is assigned to turn on and off the controller as necessary for power rail sequencing. When the OLED display is operating, a small amount of power can be drawn from the +15-V supply to power other devices. Design Guidelines The OLED display has a lifetime of about 13,000 hours. It is also prone to degradation due to burn-in, similar to CRT and plasma displays. The quickstart application includes both a screen saver and a power-down mode to extend display life. These factors should be considered when developing EVB applications that use the OLED display. Further Reference For additional information on the RiT OLED display, visit www.ritekdisplay.com. 14 January 6, 2010 Stellaris® LM3S1968 Evaluation Board Other Peripherals Speaker The LM3S1968 evaluation board's speaker circuit can be used in either tone or waveform mode. The quick-start application uses tone mode. In tone mode, the LM3S1968 microcontroller's PWM module directly generates tones within the audible frequency range. The width of the pulses determines the volume. If only one PWM signal (PWM2 or PWM3) is used, the non-PWM signal should be configured as a general-purpose output. For increased speaker volume, PWM2 and PWM3 can be configured as complementary drive signals. In tone mode, be careful to avoid large DC currents in the speaker. Waveform mode uses two high-frequency PWM signals to drive a MOSFET H-bridge with an output filter. This circuit is essentially a Class-D amplifier. The symmetrical 2nd order low-pass L-C filter has a cut-off frequency of approximately 33 kHz. The microcontroller's PWM module should be configured with a PWM frequency of at least 100 kHz. Using 500 kHz improves audio quality even further. Once configured, audio waveform data can be used to update the PWM duty cycle at a rate equal to the audio sampling rate. The speaker on the evaluation board has standard 8Ω impedance. Audio quality can be enhanced by adding a small, vented enclosure around the speaker. Push Switches The EVB has five general-purpose input switches. Four are arranged in a navigation-style configuration. The fifth functions as a Select switch on PG7. The Select switch also connects to the WAKE signal of the Hibernate module which has an internal pull-up resistor. A diode (D2) blocks current into the PG7 pin when in the Hibernate state. User LED A user LED (LED3) is provided for general use. The LED is connected to PG2/PWM0, allowing the option of either GPIO or PWM control (brightness control). Refer to the Quickstart Application source code for an example of PWM control. Bypassing Peripherals The EVB's on-board peripheral circuits require 15 GPIO lines. This leaves 31 GPIO lines and 8 ADC channels immediately available for connection to external circuits. If an application requires more GPIO lines, the on-board hardware can be disconnected. The EVB is populated with 15 jumper links, which can be cut with a knife to isolate on-board hardware. The process can be reversed by installing 0603- 0-ohm chip resistors. Table 2-2 shows the microcontroller assignments and how to isolate specific pins. Important: The quickstart application will not run if one or more jumpers are removed. Table 2-2. Isolating On-Board Hardware Microcontroller Pin Microcontroller Assignment Pin 16 PG3 Up switch JP1 Pin 17 PG2/PWM0 User LED JP2 Pin 26 PA0/U0RX Virtual COM port receive JP4 January 6, 2010 To Isolate, Remove... 15 Hardware Description Table 2-2. Isolating On-Board Hardware (Continued) Microcontroller Pin Microcontroller Assignment To Isolate, Remove... Pin 29 PA3/SSI0FSS OLED display chip select JP5 Pin 37 PG6/PHA1 Right switch JP6 Pin 36 PG7/PHB1 Select switch JP7 Pin 40 PG5 Left switch JP8 Pin 41 PG4 Down switch JP9 Pin 31 PA5/SSI0TX OLED display data in JP10 Pin 28 PA2/SSI0CLK OLED display clock JP11 Pin 34 PA6/I2C1SCL OLED display data/control select JP12 Pin 27 PA1/U0TX Virtual COM port transmit JP13 Pin 86 PH0/PWM2 Sound+ JP14 Pin 85 PH1/PWM3 Sound- JP15 Interfacing to the EVB An array of accessible I/O signals makes it easy to interface the EVB to external circuits. All LM3S1968 I/O lines (except those with both JTAG and SWD functions) are brought out to 0.1” pitch pads. For quick reference, silk-screened labels on the PCB show primary pin functions. Table B-2 on page 28 has a complete list of I/O signals as well as recommended connectors. Most LM3S1968 I/O signals are +5-V tolerant. Refer to the LM3S1968 data sheet for detailed electrical specifications. Using the In-Circuit Debugger Interface The Stellaris LM3S1968 Evaluation Kit can operate as an In-Circuit Debugger Interface (ICDI). ICDI acts as a USB to the JTAG/SWD adaptor, allowing debugging of any external target board that uses a Stellaris microcontroller. See “Debugging Modes” on page 12 for a description of how to enter Debug Out mode. Figure 2-1. ICD Interface Mode Connecting Pin 18 to GND sets external debug mode Evaluation Board USB ` PC with IDE/ debugger Stellaris MCU JTAG or SWD connects to the external microcontroller Target Cable Stellaris MCU Target Board TCK/SWCLK bypasses the on- board microcontroller 16 January 6, 2010 Stellaris® LM3S1968 Evaluation Board The debug interface operates in either serial-wire debug (SWD) or full JTAG mode, depending on the configuration in the debugger IDE. The IDE/debugger does not distinguish between the on-EVB Stellaris microcontroller and an external Stellaris microcontroller. The only requirement is that the correct Stellaris device is selected in the project configuration. January 6, 2010 17 Hardware Description 18 January 6, 2010 A P P E N D I X A Schematics This section contains the schematics for the LM3S1968 Evaluation Board: LM3S1968 Microcontroller on page 20 OLED Display, Switches and Audio on page 21 USB and Debugger Interfaces on page 22 USB, Debugger Interfaces and Power on page 23 JTAG Logic with Auto Mode Detect and Hibernate on page 24 January 6, 2010 19 LM3S1968 Microcontroller 1 2 3 4 5 6 Power Break-out Header +15V +5V +3.3V Stellaris LM3S1968 Microcontroller U1 PA0/U0Rx PA1/U0Tx PA2/SSI0CLK PA3/SSI0FSS PA4/SSI0RX PA5/SSI0TX PA6/I2C1SCL PA7/I2C1SDA A INT_TCK TMS/SWDIO PC2/TDI PC3/TDO/SWO B +3.3V R3 OMIT 26 27 28 29 30 31 34 35 PC2/TDI PC3/TDO/SWO PC4/PhA0 PC5/C1+ PC6/C2+ PC7/C2- 80 79 78 77 25 24 23 22 PE0/SSI1CLK PE1/SSI1FSS PE2/SSI1RX PE3/SSI1TX 72 73 74 75 ADC0 ADC1 ADC2 ADC3 ADC4 ADC5 ADC6 ADC7 1 2 5 6 100 99 96 95 64 MCURSTn 48 49 52 53 R2 1M Y1 1 2 1 8.00MHz C Y2 HIBERNATEn 2 C2 C3 C4 C5 10PF 10PF 27PF 27PF 9 15 21 33 39 45 54 57 63 69 82 87 94 4 97 Date Description 0 8/9/07 Final prototype release A 8/13/07 Production release with simplified wake cct. B 3/3/07 Add TVCC control to debug circuit. PB0/CCP0 PB1/CCP2 PB2/I2C0SCL PB3/I2C0SDA PB4/C0PB5/C1PB6/C0+ PB7/TRST PC0/TCK/SWCLK PC1/TMS/SWDIO PC2/TDI PC3/TDO/SWO PC4/PhA0 PC5/C1+ PC6/C2+ PC7/C2- PD0/IDX0 PD1/PWM1 PD2/U1RX PD3/U1TX PE0/SSI1CLK PE1/SSI1FSS PE2/SSI1RX PE3/SSI1TX PF0/PHB0 PF1/IDX1 PF2/PWM4 PF3/PWM5 PF4/C0O PF5 PF6/CCP1 PF7 ADC0 ADC1 ADC2 ADC3 ADC4 ADC5 ADC6 ADC7 RST On-board Peripheral Signals VBAT Jumpers can be cut to +3.3V I/O Break-out Header free GPIO lines as required. R1 10K PA0/U0Rx ADC7 ADC5 ADC0 ADC2 VCP_RX JP13 PA1/U0Tx PB7/TRST PD0/IDX0 PD1/PWM1 PD2/U1RX PD3/U1TX VCP_TX ADC6 ADC4 ADC1 ADC3 PD0/IDX0 PD2/U1RX PG3 PG1/U2TX PC7/C2PC5/C1+ JP11 PA2/SSI0CLK OLEDCLK JP5 PG0/U2RX PG1/U2TX PG2/PWM0 PG3 PG4 PG5 PG6/PHA1 PG7/PHB1 AVDD AVDD VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VBAT LDO VDD25 VDD25 VDD25 VDD25 47 61 60 59 58 46 43 42 PF0/PHB0 PF1/IDX1 PF2/PWM4 PF3/PWM5 PF4/C0O PF5 PF6/CCP1 PF7 OLEDCSn PD1/PWM1 PD3/U1TX PG2/PWM0 PG0/U2RX PC6/C2+ PC4/PhA0 PA0/U0Rx PA2/SSI0CLK PA4/SSI0RX PA6/I2C1SCL PG7/PHB1 PG5 PF7 PF5 HIBERNATEn PF3/PWM5 PF1/IDX1 PB0/CCP0 PB2/I2C0SCL PE0/SSI1CLK PE2/SSI1RX PC3/TDO/SWO PH3/FAULT PH1/PWM3 PB7/TRST PB5/C1PB4/C0- 19 18 17 16 41 40 37 36 PG0/U2RX PG1/U2TX PG2/PWM0 PG3 PG4 PG5 PG6/PHA1 PG7/PHB1 86 85 84 83 PH0/PWM2 PH1/PWM3 PH2 PH3/FAULT 3 98 8 20 32 55 PH0/PWM2 PG4 PF6/CCP1 PF0/PHB0 PF4/C0O PF2/PWM4 SOUND+ JP15 PH1/PWM3 SOUND- PB1/CCP2 PB3/I2C0SDA PE1/SSI1FSS PE3/SSI1TX PC2/TDI PH2 PH0/PWM2 PB6/C0+ JP3 PH3/FAULT EN+15V JP2 PG2/PWM0 LED JP1 PG3 +3.3V B UP_SWn 2 JP9 PG4 1 DOWN_SWn JP8 PG5 LEFT_SWn JP6 C1 0.1UF PG6/PHA1 RIGHT_SWn D2 JP7 SELECT_SWn WAKEn +3.3V C7 .033UF C8 C9 .033UF 0.1UF C10 0.1UF MBR0520 C C11 4.7UF VBAT 7 C13 0.1UF 14 38 62 88 C12 4.7UF LM3S1968 OLEDDIN JP14 PG7/PHB1 44 56 68 81 93 PA1/U0Tx PA3/SSI0FSS PA5/SSI0TX PA7/I2C1SDA PG6/PHA1 OLEDDC JP10 PA5/SSI0TX A 66 65 JP4 JP12 OSC32in OSC32out GND GND GND GND GND GND GND GND GND GND GND GND GND AGND AGND 10 11 12 13 PB0/CCP0 PB1/CCP2 PB2/I2C0SCL PB3/I2C0SDA PB4/C0PB5/C1PB6/C0+ PB7/TRST PA3/SSI0FSS PH0/PWM2 PH1/PWM3 PH2 PH3/FAULT WAKE HIB CMOD0 CMOD1 66 67 70 71 92 91 90 89 PH2 MOSCin MOSCout 4.194304MHz History Revision 50 51 65 76 PA0/U0RX PA1/U0TX PA2/SSI0CLK PA3/SSI0FSS PA4/SSI0RX PA5/SSI0TX PA6/I2C1SCL PA7/I2C1SDA C14 C15 .033UF 0.1UF BT1 3V Li Battery CR2032 C16 0.1UF D D Drawing Title: Stellaris LM3S1968 Evaluation Board Page Title: LM3S1968 Microcontroller Size Date: 1 2 3 4 5 B Document Number: 3/4/2008 EK-LM3S1968 Sheet 6 1 of 4 Rev B OLED Display, Switches and Audio 1 2 3 4 5 6 U2 +3.3V Reset A C17 R4 10K SW1 4.7UF RESET_SWn SW-B3S1000 +3.3V C18 OMIT R5 200K OLEDCSn MCURSTn OLEDDC Select/Power SW2 OLEDCLK OLEDDIN WAKEn SW-B3S1000 Up SW3 User Switches UP_SWn SW-B3S1000 +3.3V +15V Down SW4 B C19 0.1UF DOWN_SWn SW-B3S1000 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 NC VCIR VCOMH LVSS VSS BS1 BS2 IREF CSn RESn D/Cn R/Wn E D0/SCLK D1/SDIN D2 D3 D4 D5 D6 D7 VDDIO VDD VCC NC A OLED-RIT-128X96 B Left SW5 LEFT_SWn SW-B3S1000 128x96 OLED Graphics Display Right SW6 RIGHT_SWn SW-B3S1000 R6 LED 330 +3.3V 4 SPK1 4 Q2B FDG6322C SOUND+ 4.7uH 6 C6 4.7uH Q3A FDG6322C 2 1 1 C22 0.1UF C21 0.1UF LED2 Red Debug Out LED3 Green Power LED4 Red Hibernate 330 +3.3V SOUND- 4.7UF R8 200K Status R7 DBGOUTLED L2 6 1 2 3 L1 Q2A FDG6322C 2 Q3B FDG6322C 5 3 5 C LED1 Green C R10 330 R9 200K DBG+3.3V 0.2W Audio Amplifier R30 330 D D HIBERNATEn Status LEDs Drawing Title: Stellaris LM3S1968 Evaluation Board Page Title: OLED Display, Switches and Audio Size Date: 1 2 3 4 5 B Document Number: 3/4/2008 EK-LM3S1968 Sheet 6 2 of 4 Rev B USB and Debugger Interfaces 1 2 3 4 5 Debug Interface Logic USB Interface DBG+3.3V 54819-0572 P2 TP2 PLD_TDI TP3 PLD_TDO TP4 DBG+3.3V 7 C34 USBDM USBDP .033UF ACBUS0 ACBUS1 ACBUS2 ACBUS3 SI/WUA R18 1.5K B +5V +5V R20 10K U8 VCC NC ORG GND CS SK DI DO 1 2 3 4 48 1 2 47 R21 1.5K CAT93C46 43 44 1K 64X16 1 Y3 2 +5V 4 5 6.00MHz C36 C37 27PF 27PF EECS EESK EEDATA TEST XTIN XTOUT BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 BCBUS0 BCBUS1 BCBUS2 BCBUS3 SI/WUB RESET# RSTOUT# PWREN# GND GND GND GND VCC VCC VCCIOA VCCIOB 15 13 12 11 10 SRSTN DBG_JTAG_EN RESET_SWn VCP_RX R19 4.7K Bank 1 C 45 AGND AVCC A TP6 U6 LC4032V-75TN48C B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 20 21 22 23 24 26 27 28 31 32 33 34 38 TARGETCABLEn DBGOUTLED VCP_TX PB7/TRST MCURSTn B SWO_EN C35 0.1UF DBG+3.3V HIBERNATEn TVCC_CTRL MODE VCP_TX_SWO MODE is reserved for future use. DBG+3.3V 41 +5V 9 18 25 34 12 36 11 25 1 35 TCK TMS TDI TDO 18 43 19 42 A0/GOE0 A1 A2 A3 A4 A5 Bank 0 A6 A7 A8 A9 A10 A11 A12 DBG+3.3V DBG+3.3V 40 39 38 37 36 35 33 32 30 29 28 27 26 44 45 46 47 48 2 3 4 7 8 9 10 14 INT_TCK TCK TDI/DI TDO/DO TMS/OUTEN 24 23 22 21 20 19 17 16 B15/GOE1 B14 B13 8 R17 27 ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 PLD JTAG TEST POINTS TP5 41 40 39 3V3OUT 0.1UF R16 27 8 7 6 5 TP1 PLD_TMS TCK/SWCLK TMS/SWDIO 6 VCCO (Bank 1) GND (Bank 1) C33 60ohm @ 100 MHz 30 29 R29 4.7K U7 5 4 3 2 1 FB1 C32 0.1UF CLK1/I CLK0/I CLK2/I CLK3/I DBG+3.3V USB Device Controller Omit GND (Bank 0) VCCO (Bank 0) JP16 7 USBSH 5 6 G 13 37 ID GND GND D+ A13 A14 A15 D- 15 16 17 5V 6 +5V PLD_TCK DBG+3.3V VCC VCC A 6 3 42 14 31 JTAG/SWD Interface Input/Output DBG+3.3v R22 PC2/TDI R24 46 C42 330 C38 C39 C40 C41 0.1UF 0.1UF 0.1UF 0.1UF 27 27 0.1UF R26 Channel A : JTAG / SW Debug 27 Channel B : Virtual Com Port R27 PC3/TDO/SWO C P3 27 1 3 5 7 9 11 13 15 17 19 R25 TMS/SWDIO FT2232D R23 XTDI XTMS XTCK XTDO 27 2 4 6 8 10 12 14 16 18 20 Header 10X2 R28 TARGETCABLEn DBG+3.3v 4.7K D D Drawing Title: Stellaris LM3S1968 Evaluation Board Page Title: USB and Debugger Interfaces Size Date: 1 2 3 4 5 B Document Number: 3/4/2008 EK-LM3S1968 Sheet 6 3 of 4 Rev B Schematic USB, Debugger page Interfaces 1 and Power 1 2 3 4 5 6 A A +5V U3 2 C23 4.7UF R11 1M 6 IN JP18 OUT SENSE VEN BYPASS DBG+3.3V 1 3 5 C24 4.7UF C25 0.033UF 4 GND GND 7 LP3981ILD-3.3 Debugger +3.3V 200mA Power Supply +3.3V B DBG+3.3V JP19 B OMIT R12 1M C26 4.7UF 6 IN +3.3V JP17 U4 2 OUT SENSE VEN BYPASS 1 3 5 C28 HIBERNATEn C27 4.7UF 0.033UF 4 GND GND 7 LP3981ILD-3.3 Main +3.3V 300mA Power Supply C C +5V D1 L3 NR4018T100M 10uH +15V MBR0520 U5 5 VIN C30 4.7UF SW FB 4 EN+15V R15 10K SHDNn GND 1 C29 R13 200K 120pF 3 2 C31 4.7UF R14 17.8K FAN5331 D D +15V 50mA Power Supply for OLED Display Drawing Title: Stellaris LM3S1968 Evaluation Board Page Title: USB, Debugger Interfaces and Power Size Date: 1 2 3 4 5 B Document Number: 3/4/2008 EK-LM3S1968 Sheet 6 4 of 4 Rev B JTAG Logic with Auto Mode Detect and Hibernate A B C 1 D I90 SWO_EN 10 FTDI_TCK 45 DBGOUT I105 44 I85 I86 ITCK I109 41 I7 2 H 1 B A S I91 G S A B 34 F FTDI_DBG I89 VCP_TX E XTCK 2 I87 FTDI_TDI_DO 46 I6 I92 32 U0TX 24 XTDO S 3 FTDI_TDO_DI I3 B A 47 I16 JTAGEN I18 FTDI_TMS 48 I111 I4 21 4 JTAGEN I20 FTDI_DBG 5 FTDIJTAGEN 4 FTDI_SRSTn 3 3 I35 S SWDEN I36 I5 I37 I2 XTDI 4 I112 B A I17 I9 40 XTMS 5 I8 D FTDI_DBG Q DBGOUT 31 I96 6 C 7 I95 I99 33 I102 RSTSW 9 RC 14 EXTCABLEn 26 HIBn 16 7 8 A DBGLED 6 INTDBG I100 I42 I15 38 I104 I70 I106 I107 TEST TRSTn MCURSTn 7 I74 Texas Instrumens Inc. LM3S1968 Evaluation Kit JTAG Logic with Auto Mode Detect and Hibernate AUG 23, 2007 I13 DRVEN I108 B C D E F G H 8 A P P E N D I X B Connection Details This appendix contains the following sections: Component Locations Evaluation Board Dimensions I/O Breakout Pads ARM Target Pinout References Component Locations Figure B-1. Component Locations January 6, 2010 25 Evaluation Board Dimensions Evaluation Board Dimensions Figure B-2. LM3S1968 Evaluation Board Dimensions 26 January 6, 2010 Stellaris® LM3S1968 Evaluation Board I/O Breakout Pads The LM3S1968 EVB has 58 I/O pads, 13 power pads, and 1 control connection, for a total of 71 pads. Connection can be made by soldering wires directly to these pads, or by using 0.1” pitch headers and sockets. Note: In Table B-1, an asterisk (*) by a signal name (also on the EVB PCB) indicates the signal is normally used for on-board functions. Normally, you should cut the associated jumper (JP1-15) before using an assigned signal for external interfacing. Table B-1. I/O Breakout Pads Description Pad No. Description Pad No. Description Pad No. Description Pad No. PB4/C0- 1 PB1/CCP2 18 PA6/I2C1SCL 35 PG3* 52 GND 2 PB0/CCP0 19 PA7/I2C1SDA 36 PD1/PWM1 53 PB5/C1- 3 GND 20 PA4/SSI0RX 37 PD2/U1RX 54 PB6/C0+ 4 PF1/IDX1 21 PA5/SSI0TX* 38 GND 55 PB7/TRST 5 PF2/PWM4 22 PA2/SSI0CLK* 39 PD0/IDX0 56 PH0/PWM2* 6 PF3/PWM5 23 PA3/SSI0FSS* 40 ADC3 57 PH1/PWM3* 7 PF4/C0O 24 PA0/U0RX* 41 GND 58 PH2* 8 HIBn 25 PA1/U0TX* 42 ADC1 59 PH3/FAULT* 9 PF0/PHB0 26 PC4/PhA0 43 ADC2 60 PC2/TDI 10 PF5 27 GND 44 ADC4 61 PC3/TDO/SWO 11 PF6/CCP1 28 PC6/C2+ 45 ADC0 62 PE3/SSI1TX 12 PF7 29 PC5/C1+ 46 ADC6 63 PE2/SSI1RX 13 PG4* 30 PG0/U2RX 47 ADC5 64 PE1/SSI1FSS 14 PG5* 31 PC7/C2- 48 GND 65 PE0/SSI1CLK 15 GND 32 PG2/PWM0* 49 ADC7 66 PB3/I2C0SDA 16 PG7/PHB1* 33 PG1/U2TX 50 PB2/I2C0SCL 17 PG6/PHA1* 34 PD3/U1TX 51 January 6, 2010 27 Recommended Connectors Recommended Connectors Connection can be made by soldering wires directly to pads or using 0.1” pitch headers and sockets. Table B-2. Recommended Connectors Pins 1-66 (2 x 33 way) PCB Socket Sullins PPPC332LFBN-RC Digikey S7136-ND Pin Header Sullins PEC20DAAN Digikey S2012E-20-ND ARM Target Pinout In ICDI input and output mode, the Stellaris LM3S1968 Evaluation Kit supports ARM’s standard 20-pin JTAG/SWD configuration. The same pin configuration can be used for debugging over serial-wire debug (SWD) and JTAG interfaces. The debugger software, running on the PC, determines which interface protocol is used. The Stellaris target board should have a 2x10 0.1” pin header with signals as indicated in Table B-3. This applies to both an external Stellaris microcontroller target (Debug Output mode) and to external JTAG/SWD debuggers (Debug Input mode). Table B-3. 20-Pin JTAG/SWD Configuration Function Pin Pin Function VCC (optional) 1 2 nc nc 3 4 GND TDI 5 6 GND TMS 7 8 GND TCK 9 10 GND nc 11 12 GND TDO 13 14 GND nc 15 16 GND nc 17 18 GND nc 19 20 GND ICDI does not control RST (device reset) or TRST (test reset) signals. Both reset functions are implemented as commands over JTAG/SWD, so these signals are not necessary. It is recommended that connections be made to all GND pins; however, both targets and external debug interfaces must connect pin 18 and at least one other GND pin to GND. 28 January 6, 2010 Stellaris® LM3S1968 Evaluation Board References In addition to this document, the following references are included on the Stellaris LM3S1968 Evaluation Kit CD-ROM and are also available for download at www.ti.com/stellaris: Stellaris LM3S1968 Evaluation Kit Quickstart Guide for appropriate tool kit (see “Evaluation Kit Contents,” on page 9) Stellaris LM3S1968 Read Me First for the CAN Evaluation Kit StellarisWare® Driver Library, Order number SW-DRL StellarisWare® Driver Library User’s Manual, publication number SW-DRL-UG Stellaris LM3S1968 Data Sheet, publication DS-LM3S1968 Additional references include: Solomon Systech SSD0323-OLED Controller Datasheet Future Technology Devices Incorporated FT2232C Datasheet Information on development tool being used: – RealView MDK web site, www.keil.com/arm/rvmdkkit.asp – IAR Embedded Workbench web site, www.iar.com – Code Sourcery GCC development tools web site, www.codesourcery.com/gnu_toolchains/arm – Code Red Technologies development tools web site, www.code-red-tech.com – Texas Instruments’ Code Composer Studio™ IDE web site, www.ti.com/ccs January 6, 2010 29 References 30 January 6, 2010 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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