Download LG Projector RD-JT41 User's Manual
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LG RD-JT40/41 Service Manual RD-JT40/RD-JT41 SERVICE MANUAL C a u tio n B e su re to re a d th is m a n ua l b e fo re s e rvic in g . T o a s s u re s afe ty fro m fire , e le ctric s h o c k , in jury, h a rm fu l ra d ia tio n a n d m a te ria ls , va rio u s m e a s u re s a re pro v id e d in th is A c e r D L P p ro jec to r. B e s u re to re a d c a utio n a ry ite m s de s c rib e d in th e m a n u al to m a in ta in s afe ty b efo re s ervic in g . S e rv ic e W a rn in g 1 . W h e n re p la c e the la m p , to a vo id b u rn s to yo r fin g e rs. T h e la m p b ec om e s to o h o t. 2 . N e v r to uc h th e la m p b u lb w ith a fin g e r o r a n ythin g e lse . N e ve r d ro p it o r g ive it a sh o c k . T h e y m a y ca u se b u rstin g o f th e b u lb . 3 . T his p ro je c to r is p ro vid e d w ith a h ig h vo lta g e c irc uit fo r th e lam p . D o n o t tou c h th e e le c tric p a rts o f p o w re r u n it (m a in ), w h e n tu rn o n th e p o je c to r. 4 . D o n o t to u c h th e e x h a us t fa n , d u rin g o p e ra tio n . C o n te n ts 1 . S p e c ific atio n s ............................................................................................................................................2 2 . S p a re P arts L is t .......................................................................................................................................4 3 . S h ip p in g C n te n ts ......................................................................................................................................5 4 . P ro je c to r D s rip tio n ....................................................................................................................................6 5 . R m o te C o n tro l D e s rip tio n .........................................................................................................................9 6 . Ins a lla tio n ................................................................................................................................................1 1 7 . O p e ra tio n ................................................................................................................................................1 3 8 . S h u td o w n ................................................................................................................................................2 1 9 . M a in te n a n c e ...........................................................................................................................................2 2 1 0 . L a m p R e p la c em e n t..............................................................................................................................2 3 1 1 . T ro u b le S h o o tin g ..................................................................................................................................2 5 1 2 . T im in g C h a r..........................................................................................................................................3 3 1 3 . D M D Im a g e S ec ific a tio n .......................................................................................................................3 4 1 4 . E le c tric a l n te rfac e C a ra c te r..................................................................................................................3 7 1 5 . F in a l A ss e m b ly A lig n en t P ro ce d u re ......................................................................................................3 9 1 6 . P a k n g D e s c rip tio n ................................................................................................................................4 4 1 7 . A p p e a ra n c e D e s c rip tion .......................................................................................................................4 5 1 8 . D im e n sio n ............................................................................................................................................4 7 1 9 . S c h e m a tic s ..........................................................................................................................................4 8 2 0 . A s s y D ra w in g .......................................................................................................................................8 5 1 LG RD-JT40/41 Service Manual 1. SPECIFICATIONS Projector Specifications Technical Specifications Note: All specifications are subject to change without notice. General Product name Personal Projector Model name RD-JT40 1024*768XGA RD-JT41 800*600SVGA Optical Display system 1-CHIP DMD Lens F/Number F/2.6 Lamp 210W NSH lamp Electrical Power supply AC100 ~ 240V, 3.5A, 50/60 Hz (Automatic) Power consumption 330 W (Max) Mechanical Dimensions 308mm/12in (W) x 95mm/3.7in (H) x 238mm/9.4in (D) Operating temperature range 10 C ~ 40 C Weight 6.9 lbs (3.1 Kg) Input terminal Computer input RGB input D-sub 15-pin (female) Video signal input S-VIDEO Mini DIN 4-pin port x1 VIDEO RCA jack x1 HDTV signal input YPBPR RCA jack x3 Audio signal input Audio 1 Mini jack stero port Audio 2 RCA jack L, R x2 Output USB mouse connector A/B series x1 Speaker 2 watt x 1 Control RS-232C 9-pin x1 2 LG RD-JT40/41 Service Manual Service Information Accessories (included in the Standard Package) Description of parts Part No. Power cord (EU) 27.82718.281 Power cord (US) 27.01818.000 Power cord (UK) 27.01018.000 VGA signal cable 50.J0508.502 Video cable 50.73213.501 S-Video cable 50.72920.011 PC audio cable 50.74405.501 Soft carrying case 98.J3402.001 HDTV cable 50.J2401.001 USB mouse cable 50.73213.501 Remote control 98.J3401.001 3-2 converter 22.91007.011 Optional Accessories (not included in the Standard Package) Description of parts Part No. Mac adapter (switchable) 20.20118.A15 Spare lamp module 60.J3416.CB1 3 LG RD-JT40/41 Service Manual 2. Spare Parts List Item No:99.J3477.L11 Projector LG RD-JT40 spare parts list Parts No 55.J3405.001 55.J3408.001 60.J3419.001 55.J3407.001 60.J3477.L11 55.J3419.001 60.J3403.021 42.J3415.001 65.J3406.001 55.J3401.001 55.J3402.031 60.J3414.031 55.J3404.001 60.J3415.021 71.01076.001 60.J3404.001 60.J3405.002 60.J3407.021 60.J3409.001 60.J3412.061 55.J3403.001 60.J3416.001 60.J3482.001 27.01018.000 27.01818.000 27.82718.281 50.73213.501 50.J0508.502 50.J7111.501 50.72918.001 50.72920.011 50.74405.501 98.J3403.001 98.J3404.001 Description PCBA FAN CONTROL/B DX660 PCBA DC-DC/B DX660 ASSY PFC MODULE DX660 PCBA PFC CONTROL/B DX660 ASSY ENGINE DX660-L11 PCBA THERMAL/B DX660 ASSY LOWER CASE P838 DX660/LG FOOT REAR SILICON BLA. DX660 ADJUST FOOT FRONT MARS PCBA DMD/B DX660 PCBA MAIN/BD LG DX660 ASSY OPTICAL ENG. DX660/LG PCBA CHIP/B DX660 ASSY HSG DMD DX660/LG IC DIGITA IMAG DMD1076-7LGA11 ASSY BALLAST MODULE DX660 ASSY REAR FAN HLD MODULE DX66 ASSY REAR CVR MODULE DX660/LG ASSY CAP LENS TRANS. DX660 ASSY UPPER CASE P896 DX660/LG PCBA KEYPAD BD DX660 ASSY LAMP MODULE U DX660 ASSY REMOTE+CABLE LG DXS660 CORD H05VV-F 13A250V 1830MM U CORD SVT#18*3C 10A125V 1830US CORD H05VV-F 10A250V EUR BLK CABLE 4P USB A-B 1800MM BLACK SIGNAL/C 15/15P 2500MM/BLK CABLE A/V (G.B.R)1800 BLK 784 CABLE A/V RCA(R,W,Y)1500MM C.A MIN-DIN 4P S-VIDEO W/S 15 CABLE AUD PC99PT284C/PT577C B REMOTE CONTROLLER DXS660 LG SOFT CASE DXS660 LG Item No:99.J3877.L11 Projector LG RD-JT41 spare parts list 4 LG RD-JT40/41 Service Manual Parts No 55.J3405.001 55.J3408.001 60.J3419.001 55.J3407.001 60.J3877.L11 55.J3419.001 60.J3403.021 42.J3415.001 65.J3406.001 60.J3406.061 55.J3801.001 55.J3804.M21 60.J3410.001 60.J3411.001 60.J3414.041 55.J3802.001 60.J3415.021 71.08460.000 60.J3404.001 60.J3405.002 60.J3407.021 60.J3409.001 60.J3412.071 55.J3403.001 60.J3413.071 60.J3416.001 60.J3417.021 60.J3481.001 60.J3482.001 98.J3403.001 98.J3404.001 Description PCBA FAN CONTROL/B DX660 PCBA DC-DC/B DX660 ASSY PFC MODULE DX660 PCBA PFC CONTROL/B DX660 ASSY ENGINE DS660-L11 PCBA THERMAL/B DX660 ASSY LOWER CASE P838 DX660/LG FOOT REAR SILICON BLA. DX660 ADJUST FOOT FRONT MARS ASSY INTERFACE MODULE DS660/L PCBA DMD/BD FOR DS660 PCBA MAIN/BD FOR LG DS660 ASSY BOX LAMP DX660 ASSY BKT BLOWER DX660 ASSY OPTICAL ENG. DS660/LG PCBA DMD CHIP/BD FOR DS660 ASSY HSG DMD DX660/LG IC DIGITAL IMAG DMD8460 LGA11 ASSY BALLAST MODULE DX660 ASSY REAR FAN HLD MODULE DX660 ASSY REAR CVR MODULE DX660/LG ASSY CAP LENS TRANS. DX660 ASSY UPPER CASE P896 DS660/LG PCBA KEYPAD BD DX660 ASSY SUB U/C P896 DS660/LG ASSY LAMP MODULE U DX660 ASSY DOOR LAMP P838 DX660/LG ASSY MANU+WARRANTY LG ASSY REMOTE+CABLE LG DXS660 REMOTE CONTROLLER DXS660 LG SOFT CASE DXS660 LG 3. Shipping Contents The Projector is shipped with the cables required for connection to standard PC or laptop computers. Carefully unpack and verify that you have all the items shown below. If any of these items are missing, please contact personnel at the place of purchase. 5 LG RD-JT40/41 Service Manual Optional Accessories 1. Macintosh adapter 2. 210W Lamp module 4. Projector Description Projector 6 LG RD-JT40/41 Service Manual External Control Panel 7 LG RD-JT40/41 Service Manual Adjuster 8 LG RD-JT40/41 Service Manual The projector is equipped with 2 quick-release adjuster feet. Push the buttons to adjust its tilt angle. 1. Lift the projector up and press the adjuster button to release the adjuster. 2. The adjuster will drop into position and be locked. Projector Features The projector integrates high-performance optical engine projection and a user-friendly design to deliver high reliability and ease of use. The projector offers the following features: Small and light for portability Full-function remote control with laser pointer/ remote mouse function Hight quality manual zoom lens One-key auto-adjustment to display the best picture quality Easy digital keystone correction through hot keys to correct distorted images Adjustable color balance control for data/video display Ultra-high brightness projection lamp Ability to display 16.7 million colors On-screen menus in 8 languages: English, French, German, Italian, Spanish, Korean, Simplified Chinese, and Traditional Chinese. Switchable Normal/ Video mode for data/ video display Powerful AV function to provide high quality AV picture HDTV compatibility (YPBPR) Note: The brightness of the projected image will vary depending on the ambient lighting conditions and contrast/brightness settings. 5. Remote Control Description 9 LG RD-JT40/41 Service Manual The remote control sensors are located in the front/ back of the projector. The distance between the sensor and the remote control should not exceed 6 meters. Installing or Replacing Batteries 10 LG RD-JT40/41 Service Manual Caution Avoid excessive heat and humidity. There may be danger of an explosion if batteries are incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Dispose of used batteries according to the manufacturers instructions. 11 LG RD-JT40/41 Service Manual 6. INSTALLATION Screen Size Place the projector at the required distance from the screen according to the desired picture size (see the table below). Screen Size (Max.) Diagonal (cm/in) A. Width (cm/in) C. Height (cm/in) 77/30.4 61.8/24 46.3/18 154/60.8 123.65/49 232/91.2 L. Projection distance (cm/in) Screen Size (Min.) Diagonal (cm/in) B. Width (cm/in) D. Height (cm/in) 100/39 63/24.9 50.7/20 38.0/15 92.7/36 200/79 127/49.9 101.3/40 76.0/30 185.3/73 138.9/55 300/118 190/74.7 151.9/60 113.9/45 309/121.5 247.0/97 185.2/73 400/157 253/99.7 202.5/80 151.9/60 386/151.9 308.7/122 231.6/91 500/197 316/124.6 253.2/100 189.9/75 463/182.3 370.5/146 277.9/109 600/236 380/149.5 303.8/120 227.9/90 541/213.1 432.2/170 324.18/128 700/276 443/174.6 354.4/140 266.2/105 617/243.1 494.0/194 370.5/146 800/315 506/199.4 405.1/160 303.8/120 695/273.5 555.7/219 416.7/164 900/354 570/224.3 455.7/180 341.8/135 772/303.9 617.5/243 463.11/182 1000/394 633/249.2 506.3/200 379.8/150 Connecting to Various Equipment HDTV description The projector is capable of displaying various High Definition TV display modes. Some of these sources are: Digital-VHS (D-VHS) player DVD player Satellite Dish HDTV receiver DTV tuners Most of these sources will provide an analog component video output, a standard VGA output, or a YPBPR (default) format. The projector is capable of accepting HDTV data through a YPBPR connector. Use a HDTV cable that came with your projector to display HDTV images. The following standards are supported in the HDTV function: 480i 480p 720p 1080i Please refer to "Menu System" on page 13 for information on the HDTV OSD selections. 12 LG RD-JT40/41 Service Manual Connecting to Various Equipment It only takes a few seconds to connect your projector to your desktop or notebook computer, VCR, or other systems. However, a Mac adapter (an optional accessory) is needed for connection to Macintosh computers. 13 LG RD-JT40/41 Service Manual 7. OPERATION Start Up 1. Plug the power cord into a wall socket. 2. Turn on the main power switch. 3. Press POWER to start the unit. The back-lit POWER key flashes green and stays green when the power is turned on (When the power is turned off, there is a 60-second cooling period before the projector can be re-started.) 4. Switch on all connected equipment. 14 LG RD-JT40/41 Service Manual Digital Keystone Correction Keystoning refers to the situation where the projected image is noticeably wider at either the top or bottom. To correct this, press KEYSTONE +/- (hot key) on the control panel of the projector or on the remote control, and then adjust the sliding bar labeled Keystone, as needed. Press + to correct keystoning at the top of the image. Press - to correct keystoning at the bottom of the image. Auto Adjustment In some cases, you may need to optimize the picture quality. To do this, press the AUTO key on the control panel of the projector or on the remote control. Within 3 seconds, the built-in Intelligent Auto Adjustment function will re-adjust settings to provide the best picture quality. 15 LG RD-JT40/41 Service Manual Source Selection When several input sources are available, press the SOURCE key to make a selection from the control panel of the projector or the remote control. Menu System Press Menu for the main menu, and then press or to select a sub-menu. Press Menu again to select items in the sub-menu. 16 LG RD-JT40/41 Service Manual 1. Display Menu 17 LG RD-JT40/41 Service Manual 2. Image Menu 18 LG RD-JT40/41 Service Manual 3. Source Menu 19 LG RD-JT40/41 Service Manual 4. Control Menu FUNCTION DESCRIPTION Language sets the language for the OSD control menus. Language Use the 3 / 4 key to select the desired language from among English, French, German, Italian, Spanish, Korean, Simplified Chinese and Traditional Chinese. OSD OSD Pos. Selects a desired OSD position. OSD Time Sets the length of time the OSD will remain active after the last time you pressed the button. The range is from 5 to 60 seconds in 5-second increments. Source scan When selected, activates the Source scan function. Keystone hold When selected, preserves the last keystone correction value even when the projector is restarted. Setup Mirror hold When selected, preserves the last mirror correction value even when the projector is restarted. Blank time Determines the length of time before the projector is shut off when Blank is activated. Auto off Sets the length of time before the system is shut off when no input is detected. User logo Enables the user to define the logo screen that will display during start-up. Three modes are available: Default (BOXLIGHT logo), black screen and blue screen. Default Returns all settings to their factory preset values. Video Mode Selects video mode. Lamp hour Shows lamp usage time. 20 LG RD-JT40/41 Service Manual 5. PIP Menu These functions are available only when the input mode is PC and the PIP source is Video or S-Video 21 LG RD-JT40/41 Service Manual 8. Shutdown 1. Press POWER and a warning message will appear. POWER again. To turn off the projector, press 2. The fan will continue to run for approximately two minutes. 3. Turn off the main power switch. 4. Disconnect the power cord from the wall socket. Caution Please do not unplug the power cord before POWER is shut down or during the two-minute cooling process. If the projector is not properly shut down, to protect the lamp, the system will detect this and cool the lamp for two minutes automatically before turning on again. 22 LG RD-JT40/41 Service Manual 9. MAINTENANCE Lamp Information Use and Replacement of the Lamp When the lamp Indicator lights up red or a message appears suggesting the time of lamp replacement, please install a new lamp or consult your dealer. An old lamp could cause a malfunction in the projector and in rare instances may even explode. Lamp LED Indicators Lamp Life Indicators When the LED lights up red, it is warning you that lamp usage has exceeded 1500 hours. Replace the projection lamp with a new one immediately. The Lamp is not properly LED lights up red. attached The temperature is too high When the projectors internal temperature is too high for the projector to operate safely, the LED blinks orange and the lamp turns off automatically. The LED keeps blinking while the unit is off. If the LED light is off, the operation and temperature of the projectors lamp are normal. Caution The LAMP indicator will light up if the lamp becomes too hot. projector cool for 45 minutes. Turn off the power and let the If the LAMP indicator is still red when turning the power on, please contact your dealer. 23 LG RD-JT40/41 Service Manual 10. Lamp Replacement Caution To reduce the risk of electrical shock, always turn off the projector and disconnect the power cord before changing the lamp 24 LG RD-JT40/41 Service Manual Caution To reduce the risk of severe burns, allow the projector to cool for at least 45 minutes before replacing the lamp. The reduce the risk of injuries to fingers and damage to internal components, use caution when removing lamp glass that has shattered into sharp pieces. To reduce the risk of injuries to fingers and/or compromising image quality by touching the lens, do not touch the empty lamp compartment when the lamp is removed. This lamp contains mercury. Consult your local hazardous waste regulations to dispose of this lamp in a proper manner. Resetting Lamp Hours If you replace the lamp after 1500hours of operation, please follow the instructions below within 10 minutes of powering on. Temp Information When the LED lights up, it is warning you of the following possible problems: 1. The internal temperature is too high. 2. The fans are not working. Turn off the projector and contact qualified service personnel for further help. 25 LG RD-JT40/41 Service Manual 11. TROUBLE SHOOTING Common Problems & Solutions PROBLEMS NO POWER NO PICTURE TRAPEZOID IMAGE ON THE SCREEN POOR COLOR BLURRED IMAGE REMOTE CONTROL DOES NOT WORK Status Messages On-Screen Messages SEARCHING ACQUIRING SIGNAL OUT OF RANGE LAMP WARNING CHANGE LAMP AND RESET LAMP TIMER! OUT OF LAMP USAGE TIME. CHANGE THE LAMP! OUT OF LAMP USAGE TIME. YOU HAVE TO CHANGE THE LAMP! TRY THESE SOLUTIONS Make sure the power cord is inserted snuged into the AC adapter socket. Make sure the power cord is inserted snuged into the power outlet. Toggle the power switch to the position I Wait two minutes after the projector is turned off before turning the projector back on. Check for the proper input source. Ensure all cables are connected properly. Adjust the brightness and contrast. Remove the lens cap. Reposition the unit to improve its angle on the screen. Use the Keystone correction key on the control panel of the projector or the remote control unit. Select the correct video system. Adjust brightness, contrast, or saturation. Press Auto on the control panel of the projector or the remote control unit to get better picture quality. Adjust the focus. Reposition the unit to improve its projection angle. Ensure the distance between the unit and screen is within the adjustment range of the lens. Replace the batteries with new ones. Make sure there is no obstacle between the remote control and the projector. Stand within 4 meters (13 feet) of the projector. Make sure nothing is blocking the front and rear receivers. Description Projector is searching for input. Projector has identified the input signal and is running the auto image adjustment function. Input signal frequency exceeds the projectors range. The lamp has been in operation for 1400 hours. Install a new lamp for optimal performance. The lamp has been in operation for 1480 hours, and the power will turn off after 20 hours. The lamp has been in operation for over 1500 hours. The warning message will display for 30 seconds every 5 minutes after you turn on the projector and the power will turn off automatically after 10 minutes. 26 LG RD-JT40/41 Service Manual 1. Final Assembly Trouble Shooting Guide S y s te m T r o u b le S h o o tin g F lo w C h a r B a c k - L IG H T O K ? No STEP: 1 .C h e c k p o w e r c o r e 2 . C h e c k p o w e r b o a r d a n d w ir e No 1 . C h e c k la m p d o o r . 2 .C h e c k th e rm a l s w itc h a n d w ire 3 . C h e c k 1 2 V F a n a n d w ir e 4 .C h e c k p o w e r b o a r d a n d w ir e 5 .C h e c k c o lo r w h e e l F P C 6 .C h e c k s c r e w s o n c o lo r w h e e l 7 .C h e c k c o lo r w h e e l m o to r 8 . C h e c k D M D d r iv e r b o a r d a n d 1 2 0 p i n s c o n n e c t o r 9 . C h e c k T r a n s l a t i o n b o a r d a n d w ir e a n d 5 0 p i n s c o n n e c t o r 1 0 . C h e c k M a in b o a r d 1 1 . C h e c k A V B o x c o n n e c t o r ( i f w it h t h i s o p t i o n ) Yes Power O N O K? (L A M P O N ? ) Yes N o S i g n a l? Yes 1 . C h e c k in p u t c a b le 2 .C h e c k O S D s o u r c e s e t u p Yes 1 .C 2 .C 3 .C 4 .C 5 .C 6 .C No A u to P o w e r O ff? No V id e o N G ? Yes h e c k O S D la m p h o u r s h e c k O S D A u t o O f f s e t u p v a lu e h e c k la m p d o o r h e c k 1 2 V fa n h e c k th e rm a l s ta tu s h e c k A V B o x c o n n e c t o r ( if w i t h t h is o p t io n ) 1 .C h e c k A V B o x 2 . C h e c k V id e o c a b l e No A u d io N G ? Yes 1 .C h e c k A V B o x 2 . C h e c k a u d io c a b le Yes 1 .C 2 .C 3 .C 4 .C Yes 1 .C h e c k D M D c h ip 2 .C h e c k D M D b o a r d Yes 1 .C 2 .C 3 .C 4 .C No IR R e m o te C o n tr o l NG? h e c k R e m o t e m o d u le b a t t e r y h e c k R e m o t e m o d u le h e c k T r a n s la tio n b o a r d h e c k M a in b o a r d No P ix e l F a il ? No Im a g e N G ? ( R a in d r o p s ) h e c k c o lo r heck D M D heck D M D le a n D M D w h e e l a n d S e n s o r b o a rd c h ip a n d h o ld e r c o n d u c t iv e e la s t o m e r s a s s e m b l in g c o n d u c t iv e e la s t o m e r s No A 27 LG RD-JT40/41 Service Manual 2. Engine Assembly Trouble Shooting Guide A Image NG? (Blank) Yes 1.Check 2.Check 3.Check 4.Check DMD board color wheel and Sensor board DMD conductive elastomers Main and Translation boards Yes 1.Check color wheel and Sensor board 2.Check DMD board 3.Check Main and Translation boards Yes 1.Check DMD board 2.Check color wheel and Sensor board Yes 1.Check color wheel 2.Check Sensor board color index signal Yes 1.Check DMD holder Yes 1.Check Main and Translation boards 2.Check DMD board No Image NG? (Screen flashing) No Image NG? (Screen dimmish) No Image NG? (Freezing) No Image NG? (Missing column bar) No Image NG? (Screen overlap) 28 LG RD-JT40/41 Service Manual S tart P ower O n 1 .ch k 2 .ch k 3 .ch k 4 .ch k NG CW D M D /b M a in /b T R /b OK Im a g e Q u a lity NG Dust 1 .cle a n D M D ch ip 2 .cle a n T IR (D M D sid e ) Y es No B lu e E d g e 1 .ch k le n s h o u s in g / D M D h o u s in g A s s e m b ly 2 .c h k lig h t p ip e a s s e m b ly 3 .ch k T IR a ss e m b ly 4 ,ch a n g e lig h t p ip e c lip 5 .ch a n g e lig h t p ip e Y es No Focus N G OK ch a n g e p ro je c tio n le n s Y es No P ixe l F a ilu re EE P e rfo rm a n c e NG S ys te m T ro u b le sh o o tin g G uid e 1 .c h a n g e D M D 2 .c h a n g e D M D /b 3 .c le a n e la s to m e r Y es No lig h t le a k a g e Y es OK O ptic a l P e rfo rm a n c e NG B rig h tn e s s 1 .ch k D M D b a ffle 2 .ch k T IR Y es 1 .R e s e t F a c to ry m o d e , ch k D C o ffse t/G a in s e tu p 2 .ch k D M D /b 3 .c le a n p ro je c tio n le n s 4 .c le a n T IR 5 .c le a n o p tic a l p a rts Y es 1 .ch k T IR 2 .ch k p ro je c tio n le n s Y es 1 .R e s e t F a c to ry m o d e , ch k D C o ffse t/G a in s e tu p 2 .ch k D M D b a ffle 3 .c h a n g e p ro je c tio n le n s Y es 1 .R e s e t F a c to ry m o d e , ch k C W d e la y 2 .ch a n g e C W 3 .ch a n g e p ro je c tio n le n s Y es 1 .ch k T IR 2 .ch k D M D 3 .ch k D M D /b No U n ifo rm ity No C o n tra s t No C o lo r No C o lo r U n ifo rm ity 29 LG RD-JT40/41 Service Manual 3. Main Board Trouble Shooting Guide S y s te m n o w o rk Y es a . IC 2 0 1 b a d s o ld ie r in g b . F la s h ( I C 2 0 1 ) w i t h o u t s o f t w a r e in s i d e . c . IC 6 0 7 ( R e s e t IC ) fu n c tio n a b n o r m a l d . IC 9 0 1 n o w o rk . a . C h e c k IC 6 0 9 (3 .3 V ) o r IC 6 1 0 (2 .5 V ) b. C heck M C LK and D C LK Y es a . IC 9 0 1 b a d s o ld ie r in g c a u s in g IC 9 0 1 n o w o r k . b . C h e c k IC 6 0 9 (3 .3 V ) o r IC 6 1 0 (2 .5 V ). c . C h e c k IC 2 0 3 , IC 2 0 2 if th e re w a s M C L K a n d D C L K o u tp u t t o I C 9 0 1 . No N o d a t a s ig n a l o u tp u t t o D M D B D No T h e im a g e d is p la y " N o S ig n a l" w h e n th e in p u t is P C Y es a . C h e c k th e v o lta g e o f IC 5 0 2 , IC 5 0 3 ( 3 .3 V ) , IC 5 0 1 (3 .3 V ), B C 5 3 7 (3 .3 V ) b . if v o lta g e a b o v e a r e O K , th e n c h e c k IC 6 1 1 (V S Y N C ) a n d IC 6 0 6 (H S Y N C ) if t h e r e w e r e t h e s e t w o s ig n a l o r n o t . c . R e p la c e IC 5 0 2 No T h e g h o s t Im a g e d is p la y o u tp u t o f V id e o in p u t Y es a . C N 6 0 5 b a d s o l d i e r in g b .IC 9 0 1 b a d s o ld ie r in g c . A v b o x a n d M a i n B D b a d c o n n e c t io n No C o u l d n 't d o w n l o a d n e w s o ftw a re to M ia n B D Y es a . R e p la c e I C 6 0 2 b . IC 9 0 1 No R e m o te m o u s e d o n 't w o r k Y es a .C h e c k th e m o u s e o f P C is s till w o r k in g n o r m a lly b . C h e c k t h e m o u s e d r i v e r o f P C i s P S 2 c o m p a t ib le m ouse c .R e p la c e IC 8 0 2 No K e y p a d w o r k in g a b n o r m a lly Y es C h e c k IC 6 1 3 Y es C h e c k IC 6 1 2 No L a m p L i t s ig n a l a b n o rm a l No I R d o e s n 't w o r k . Y es a . C h e c k s o l d i e r in g c o n d i t io n o f R 6 9 2 . b .IC 9 0 1 b a d s o ld ie r in g No G ra y b a r a b n o rm a l o r im a g e c o n t o u r ( P C in p u t ) Y es C h e c k th e r e s is te rs b e tw e e n IC 5 0 2 a n d IC 9 0 1 (R P 5 0 1 RP 512) 30 LG RD-JT40/41 Service Manual 4. Power Supply Trouble Shooting Guide INPUT LINE 0VACOR 220VAC B + B380VDC YES CHECK SPS B/D. WHETHER POOR SOLDER NO B + B54VDC YES CHECK PFC B/D. WHETHER POOR SOLDER NO B + B0VDC NO CHECK R663,R662, R66 ,R659, R660,ZD65 YES F65 OPEN YES NO CHECK L65 L652 WHETHER POOR SOLDER Q65 DAMAGE (D.S. SHORT) YES CHECK IC65 R656,D65 BD65 ,R658 R678 NO YES CHECK R6 2,R609 Q60 DAMAGE D6 0,IC60 (D.S. SHORT) R6 ,Q602 NO CHECK POLARITY : B+ PGND, B + B-, C659 31 LG RD-JT40/41 Service Manual 5. Translation Board Trouble Shooting Guide D S 6 6 0 T r a n s la t io n B o a r d T r o u b le S h o o tin g V C C C P U O P O W E R f u n c t io n O N A O K ? N o 1 .Q 2 .Q 8 0 3 7 0 3 , Q V C C ,1 2 V f u n c t io n O K ? N o 1 2 3 4 7 7 7 7 G u id e K 7 0 4 Y e s . . . . Q Q Q Q 0 0 0 0 5 6 1 2 Y e s A b n o r m a l f u n c t io n O K ? N o I C 8 0 6 Y e s L A M P E N - S f u n c t io n O K ? N o 1 .Q 8 0 2 2 .IC 8 0 5 N o 1 .Q 2 .Q N o 1 .IC 2 .IC Y e s L A M P _ L IT f u n c t io n O K ? 7 0 7 7 0 8 Y e s IR 0 fu n c tio n O K ? 8 0 2 8 0 3 Y e s L E D _ 1 ~ 3 , F A N _ H S O f u n c t io n O K ? N o IC 8 0 2 N o 1 2 3 4 5 6 7 8 Y e s V P O S R A IL , V N E G R A IL f u n c t io n O K ? Y e s . . . . . . . . Q Q D D U D D D 1 9 8 1 2 1 1 9 5 0 2 1 E N D 32 LG RD-JT40/41 Service Manual 6. DMD Board Trouble Shooting Guide Check power voltages. Check clocks from oscillator (58 MHz), from ASIC (58 MHz and 116 MHz), from FPGA (9.667 MHz and 2.4 MHz), to Hitachi (14 MHz), to motor controller (9.667 MHz) Verify HSYNC, VSYNC, ACTDATA, SYNCVALID, POWERGOOD, RESETZ source at 60 Hz. from computer or Verify these signals meet TI specified timing per Hardware ICD. Verify color wheel index running at 120 Hz If no color wheel spinning, check data transfer on the following lines: MTRDATA, MTRCLK, MTRSELZ. Verify phase lock of color wheel by checking rising edge of Index 275 us after Vsync If previous steps are verified, microcontroller is OK. Verify motor_spin line from microcontroller to FPGA is logic high. Verify hardware LAMPEN to ballast. Lamp type must be set to appropriate type if problems with getting LAMPLIT appear. 3.5 seconds after LAMPLIT, DMD should become active (unpark) and display an image. Verify reset (HRESETZ, pin 1) from FPGA to microcontroller only goes low once during the lamp strike period. LAMPLIT should be stable after microcontroller last reset. If everything else verified, but still no image, perform the following checks: Check DMD voltages at output of generation circuits, but also out of SR16 IC (be careful not to probe on pins or the device could be damaged): VBIAS (22-25v), VRESET (-26V), VCC2 (7.5V). Please attached file for reset waveform. Check voltage enables from FPGA are active as appropriate. If not, output drivers may be blown from previous probing. Be sure two reset lines are not tied together or the device WILL be damaged. Verify I2C communication by reading system status and microcontroller version. Verify READY bit in Status Byte. Set curtain mode to Full Green and verify green is displayed over entire screen. and Blue. Repeat for Red This checks for functionality of TI electronics between ASIC and DMD. If colors are wrong, check color wheel is spinning the correct direction. Put unit in red curtain mode and use a photosensor to verify that red is displayed 220 uS after color wheel Index. Use spoke light test register number 0x0E to verify sequence color transitions occur during wheel spoke interval. See Software ICD for register 0x0E. Other suggestions: Be sure front end electronics are sending one pixel per clock. Elastomer and DMD are aligned properly to pads. Check data transfer on the following lines: PBCLKZ, PBDAT0, PBDAT1. If Color wheel has difficulty in starting or is unstable, the timing capacitors may need to be adjusted to match the motor parameter. 33 LG RD-JT40/41 Service Manual 12. Timing Chart 34 LG RD-JT40/41 Service Manual DMD Image Specification 1. SCOPE TM This document specifies the image quality requirements applicable to the DLP The Component Set provides the DLP Micromirror Device (DMD) technology. TM XGA Component Set. XGA Projector with digital imaging functionality based on Digital 2. Definitions 2.1 Blemish A blemish is an obstruction, reflection, or refraction of light that is visible, but out of focus in the projected image under specified conditions of inspection (see Table 1). It is caused by a particle, scratch, or other artifact located in the image illumination path. 2.2 Dark pixel A single pixel or mirror that is stuck in the OFF position and is visibly darker than the surrounding pixels. 2.3 Bright pixel A single pixel or mirror that is stuck in the ON position and is visibly brighter than the surrounding pixels. 2.4 Unstable pixel A single pixel or mirror that does not operate in sequence with parameters loaded into memory. The unstable pixel appears to be flickering asynchronously with the image. 2.5 Adjacent pixel Two or more stuck pixels sharing a common border or common point, also referred to as a cluster. 2.6 Streaks Artifact resulting from locallized variation in mirror tilt angle relative to surrounding mirrors. They are similar in appearance to window scratches but appear at the mirror level. Streaks appear as faint diagonal or arcing patterns in the image. 2.7 Sea of Mirrors (SOM) 2.8 SOM is a rectangular array of off-state mirrors surrounding the active area. Eyecatcher A small localized light spot which has high spatial frequency and high differential brightness. These are due to various DMD window or window aperture defects including: digs, voids, particles and scratches. 2.9 Border Artifacts All variations of these artifacts are acceptable under this image quality specification. Border artifacts are a general category of image artifacts that may show up on screen in the area outside of the active array. Border artifacts include: Exposed Bond Wires, Exposed Metal 2, and Reflective Edge. 2.9.1 Bond Wires Bond Wires attach the die to the superstructure. If visible, they will appear as short light 35 LG RD-JT40/41 Service Manual 2.9.2 parallel lines outside of the Sea of Mirrors (SOM). Exposed Metal 2 Exposed Metal 2 is due to a shift in positioning of either the die or the window aperture which may allow light to be reflected off of the layer of metal 2 that is below the super structure (mirrors). 2.9.3 This defect is located at the outer edge of the SOM. Reflective Edge Reflective Edge is light that may reflect from the edge of the DMDs window aperture onto the projection screen. It will appear as a thin diffuse line outside of the SOM. 2.10 Two Zone Blue 60 Screen The Two Zone Blue 60 screen is used to test for major dark blemishes. Refer to Figure 1 for configuration. All areas of the screen are colored a Microsoft Paintbrush blue 60 (green and red set at 0, blue set at 60). NOTE: If linear degamma is not used then the Microsoft Paintbrush values must be adjusted to match the degamma table being used in order to generate an equivalent blue level on the test screen image. 2.11 Two Zone Gray 10 Screen The Two Zone Gray 10 screen is used to test for major light blemishes. Refer to Figure 1 for configuration. All areas of the screen are colored a Microsoft Paintbrush gray 10 (green, red, and blue set at 10). NOTE: If linear degamma is not used then the Microsoft Paintbrush values must be adjusted to match the degamma table being used in order to generate an equivalent gray level on the test screen image. 3. ACCEPTANCE REQUIREMENTS 3.1 Conditions of Acceptance All DMD image quality defects must be determined under the following projected image test conditions: 3.2 a. Projector degamma shall be linear. b. Projector error diffusion shall be off c. Projector brightness and contrast settings shall be set to nominal. d. The diagonal size of the projected image shall be a minimum of 60 inches. e. The projection screen shall be 1X gain. f. The projected image shall be inspected from an 8 feet minimum viewing distance. g. The image shall be in focus during all Table 1 tests. Test Sequence Tests shall be run in the sequence listed in Table 1. 36 LG RD-JT40/41 Service Manual TABLE 1. Image Quality Specification SEQ # TEST SCREEN ACCEPTANCE CRITERIA 1 Major Dark Two Zone Blue 60 1. No blemish will be darker than Microsoft Blemish Blue 60 in the Critical Zone 2. 3. No blemish will be > ½ long/diameter 2 Major Light Blemish Two Zone Gray 10 1. No blemish will be lighter than Microsoft Gray 10 in the Critical Zone 2. 3. No blemish will be > ½ long/diameter 3 Eyecatcher Gray 10 1. No eyecatcher will be lighter than Microsoft Gray 10 Streaks Blue 60 1. No streaks Gray 10 White Projected Images Any screen 1. No adjacent pixels 2. No bright pixels (Active Area) 3. 4. 5. 6. No DMD window aperture shadowing on the Active Area 7. No unstable pixels in Active Area Notes: 1. Projected blemish numbers include the count for the shadow of the artifact in addition to the artifact itself, so that the count usually represents a single artifact on the window. 2. No blemish shall be more than 5 inches long or have a total area of more than 5 square inches 3. During all Table 1 tests, projected images shall be inspected in accordance with the conditions of inspection specified in Section 3. 4. The rejection basis for all cosmetic DMD defects (scratches, nicks, particles) will be the projected image tests referenced in Table 1. 5. Any other image quality issue not specifically defined in this document shall be acceptable. 6. Black screens shall not be used as a basis for rejecting DMDs for image quality. 37 LG RD-JT40/41 Service Manual 14. Electrical Interface Character Interface Definition 15 pin definition of the mini D-sub male for DDC1/2B protocol 5 6 0 5 Pin Definition Pin Definition Pin Definition Pin Definition 1 Red video 2 3 4 5 Return 6 9 +5 Volt Supply (Mandatory Supply) Monitor ID bit 2 Blue Video Return 10 Sync. Return 11 Monitor ID bit 0 13 Horizontal Sync 14 Vertical Sync 15 Data clock (SCL) Green Video Red Video Return Blue Video Green Video Return 7 8 12 Bi-directional data (SDA) Video & Component Input 1 2 4 3 Definition 1 Composite video input Luminance video input 4 6 Component input Composite input Pi 5 Pi Definition Pi 2 Audio input (left channel) B-Y Chroma input 3 5 6 Definition Audio input (right channel) R-Y Chroma input 3.5 mm phone plug is used for stereo audio signal input. S-Video input 4 3 2 1 Pin 1 2 3 4 Description GND GND Luminance Chroma 38 LG RD-JT40/41 Service Manual Control Port 8 7 5 6 4 2 3 1 Pin 1 3 5 7 Description Reserved TX Reserved RX Pin 2 4 6 8 Description Reserved Reserved Reserved GND 39 LG RD-JT40/41 Service Manual 15. Final Assembly Alignment Procedure Unless other specified, all alignments should meet the following conditions: 1. All power on and power off condition should be last for more than 5 minute. i.e. no power on is permitted if UUT(Unit under test) had not been power off and last for more than 5 minute since last power on. 2. 3. 4. Brightness and contrast should be measured only 5 minute or more after lamp is on. UUT should be placed at a distance ranges from 1.5 to 5 meter. Applied timing should be 1024*768 @65Hz (XGA); 800*600@60Hz (SVGA) Before test, be sure the following configurations are done properly: 1. Turn off light in test chamber. 2. Test chamber condition as per ANSI IT7.215-1992. 3. Connect DSUB cable to Graphics port of UUT. 4. Connect stereo input to stereo input of UUT. 5. Connect RCA terminal to Video input of UUT. 6. Connect S terminal to S-Video input of UUT. 7. Connect AC power cord to UUT. (A) Video EE Check Equipment: VG828, DVD Player Aspect Ratio: 4:3 Prime Channel Mode Composite * Video Timing Pattern Item NTSC PT2 Gray (H: 15.73KHz, Master Pattern H&V Res. 29.96Hz, I) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk PT976 Gray & Color 64Gray & Color Check PT863 EM Character Text Movie Video Essential PAL PT2 Gray (H: 15.63KHz, Master Pattern H&V Res. 25Hz, I) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Criteria 0-100% 1 Line Hue, Sat need correct Color Noise Acceptable Not acceptable As optical spec Only Color Noise Acceptable 64 Step EM distinguish Color Noise Acceptable 0-100% 1 Line Hue, Sat need correct Color Noise Acceptable Not acceptable As optical spec Only Color Noise Acceptable 40 LG RD-JT40/41 Service Manual Channel S-Video YcbCr YPbPr Prime Mode * * * Timing Pattern Item NTSC PT2 Gray (H: 15.73KHz, Master Pattern H&V Res. 29.96Hz, I) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk PT976 Gray & Color 64Gray & Color Check PT863 EM Character Text Movie Video Essential PAL PT2 Gray (H: 15.63KHz, Master Pattern H&V Res. 25Hz, I) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk NTSC PT2 Gray (H: 15.73KHz, Master Pattern H&V Res. 29.96Hz, I) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk PT976 Gray & Color 64Gray & Color Check PT863 EM Character Text Movie Video Essential PAL PT2 Gray (H: 15.63KHz, Master Pattern H&V Res. 25Hz, I) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk 480p PT2 Gray (H: 31.54KHz, Master Pattern H&V Res. 60.08Hz, p) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk PT976 Gray & Color 64Gray & Color Check Criteria 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 64 Step EM distinguish 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 64 Step EM distinguish 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 64 Step 41 LG RD-JT40/41 Service Manual PT863 Text Movie 720p PT2 (H: 45.00KHz, Master Pattern 60Hz, p) (B) PC EE Check: EM Character Video Essential Gray H&V Res. Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk 1080I PT2 Gray (H: 33.75Khz, Master Pattern H&V Res. 30Hz, I) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Equipment: Chroma 2250, CL-100 Aspect Ratio: 4:3 Channel Prime Timing Pattern Mode DSB * 1024*768@8 PT5 5Hz SMPTE 3 (68.677KHz, 84.997Hz) PT48 32 Gray PT85 Text PT46 10 Gray EM Clear 0-100% 2 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 4 Line Hue, Sat need correct Not acceptable As optical spec Only interlace jitter acceptable Item Criteria Gray H&V Res. Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Gray Check 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable Character Clear 32 Step ColorTemp@80 %Gray Cool (1) (0.272,0.283) 0.02 Standard (2) (0.281,0.311) 0.02 Warm (3) (0.313,0.329) 0.02 Picture check Picture Phone Lady 640*400@70 PT2 Gray Hz Master Pattern H&V Res. (31.47KHz, Color 70.08Hz) Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk 640*480@60 PT2 Gray Hz Master Pattern H&V Res. 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 1 Line 42 LG RD-JT40/41 Service Manual (31.469KHz, 59.94Hz) 640*400@85 PT2 Hz Master Pattern (43.269KHz, 85.008Hz) 800*600@60 PT2 Hz Master Pattern (37.879KHz, 60.317Hz) 800*600@75 PT2 Hz Master Pattern (46.875KHz, 75Hz) 800*600 @85Hz (53.67KHz, 85.06Hz) PT2 Master Pattern 1024*768@6 PT2 0Hz Master Pattern (48.4KHz, 60Hz) 1024*768@7 PT2 5Hz Master Pattern (60.023KHz, 75.029Hz) Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Gray H&V Res. Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Gray H&V Res. Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Gray H&V Res. Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Gray H&V Res. Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Gray H&V Res. Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Gray H&V Res. Color Smear Linearity Jitter, Swing, Snack, Ring, Cross-talk Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 1 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 2 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 2 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 0-100% 2 Line Hue, Sat need correct Not acceptable As optical spec Not Acceptable 43 LG RD-JT40/41 Service Manual (C) Optical Check Equipment: Chroma 2250, CL-100 Aspect Ratio: 4:3 User OSD setting: (PC), 30 gray Final Check Step 1.Brightness Screen 100% W Pattern Check Items ANSI Lumens >=450@PC mode Uniformity >=70% 2.Contrast Ratio Checker Board ANSI C/R 3.Color Chromaticity Coordinate x, y <=0.04 G Pattern Chromaticity Coordinate x, y <=0.04 B Pattern Chromaticity Coordinate x, y <=0.04 100% W Chromaticity Coordinate x, y <=0.04 Uniformity <=0.04 Chromaticity Coordinate x, y <=0.04 Uniformity <=0.04 50% W Pattern Blue 180 Dark Blemish <=6 Pattern Dark pixel <=4 Bright Blemish <=6 Bright pixel =0 Gray 30 Pattern Equipment >=130:1 R Pattern Pattern 4.DMD Acceptance Criteria Inspection Step Check Items Acceptance Criteria 1.Apperance CHK Appearance C315 2.Buttom CHK Functionality Shinning and No Stuck 3.Front / Rear Foot CHK Functionality Adjustable 4.Zoom / Focus Ring CHK Functionality Adjustable 5.CFM Measure Air Flow >= TBD CFM Jitter Geometry Focus/Ring Stuck Bit Color Ramp Pattern Flashing Tint Phone Lady picture General Picture Quality Static pattern Flicker (SMPTE133 Pattern) Stuck Bit Dynamic movie (Toy Tint Story/ Noise Video Essential) General Picture Quality Input / Output Equipment SMPTE133 Pattern 6.PC 7.Video (RCA, S-Video) 8.Audio 9.OSD/Remote 10.Hi-Pot PC DVD Player DVD Player PC input High Power Generator 44 LG RD-JT40/41 Service Manual 16. PACKING DESCRIPTION CTN LBL PRINTING: 45 LG RD-JT40/41 Service Manual 46 LG RD-JT40/41 Service Manual 17. APPEARANCE DESCRIPTION 47 LG RD-JT40/41 Service Manual SPEC LBL PRINTING LAMP LBL PRINTING 48 LG RD-JT40/41 Service Manual 18. Dimensions 49 5 4 3 2 1 D D XGA_DMD DMDVCC VBIAS VCC2 DMDVCC VBIAS VCC2 DMDMODE0 DMDMODE1 COMP LOADZ LOAD16 LSET SCA_BUS UROWENZ DMDMODE0 DMDMODE1 COMP LOADZ LOAD16 LSET SCA_BUS UROWENZ DMD_DCLK DMDACLK DMD_DCLK DMDACLK C CWCTR CWY3 CWY2 CWY1 CWCTR CWY3 CWY2 CWY1 OPDIODE CWSPEED OPDIODE CWSPEED DD[5:57] DMDMODE0 DMDMODE1 COMP LOADZ LOAD16 LSET SCA_BUS UROWENZ DMD_DCLK DMDACLK OPDIODE CWSPEED DD[5:57] MBRST0 MBRST1 MBRST2 MBRST3 MBRST4 MBRST5 MBRST6 MBRST7 MBRST8 MBRST9 MBRST10 MBRST11 MBRST12 MBRST13 MBRST14 B 03_DMD MBRST0 MBRST1 MBRST2 MBRST3 MBRST4 MBRST5 MBRST6 MBRST7 MBRST8 MBRST9 MBRST10 MBRST11 MBRST12 MBRST13 MBRST14 02_80Pin_CONN*2 80Pin_CONN*2 C CWCTR CWY3 CWY2 CWY1 MBRST[0:14] DD[5:57] DMDVCC VBIAS VCC2 B MBRST[0:14] Project Code A Title Size A3 Date: DS660 Document Number 304-C01 Monday, March 25, 2002 Prepared By ANGEL HU 5 4 3 2 99.J3877.001 A DMD CHIP BD 48.J3802.S01 FAB:S01 Sheet Reviewed By BILL WJ CHANG 1 1 of 4 Approved By T.S.WU Rev 0 5 4 3 DD49 DD51 DD50 DD47 DD43 DD45 DD41 DD44 DD35 DD38 DD32 DD34 DD29 DD31 DD33 DD37 DD28 DD30 DD24 DD21 DD16 DD18 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 J9 DD14 DD15 DD13 DD12 DD7 DD9 DD5 COMP MBRST11 MBRST10 MBRST9 MBRST14 MBRST13 MBRST12 DMDMODE0 DMDMODE1 DMD_DCLK LSET UROWENZ LOADZ LOAD16 SCA_BUS DMDACLK VBIAS DMDVCC MBRST2 MBRST3 MBRST0 MBRST1 MBRST8 MBRST4 MBRST5 MBRST6 MBRST7 VCC2 CWSPEED OPDIODE CWCTR CWY1 CWY2 CWY3 DD57 DD56 DD48 DD46 DD54 DD53 DD55 DD52 DD42 DD36 DD39 DD40 DD26 DD27 DD23 DD25 DD22 DD20 DD17 DD19 DD10 DD11 DD6 DD8 DMDVCC MBRST2 MBRST3 MBRST0 MBRST1 MBRST8 MBRST4 MBRST5 MBRST6 MBRST7 VCC2 CWSPEED OPDIODE CWCTR CWY1 CWY2 CWY3 4 B DMDVCC COMP MBRST11 MBRST10 MBRST9 MBRST14 MBRST13 MBRST12 DMDMODE0 DMDMODE1 DMD_DCLK LSET UROWENZ LOADZ LOAD16 SCA_BUS DMDACLK VBIAS 5 3 2 2 1 D D DD[5:57] C C J8 B A Title Project Code Size A3 Date: DS660 ANGEL HU DMD CHIP BD 99.J3877.001 Document Number 304-C01 Monday, March 25, 2002 Prepared By A 48.J3802.S01 FAB:S01 Sheet Reviewed By BILL WJ CHANG 1 2 of 4 Approved By T.S.WU Rev 0 5 4 3 2 1 J1 CWY3 CWY2 CWY1 CWCTR 4 3 2 1 D D CON_4P_S J2 3 2 1 CWSPEED OPDIODE CON_3P_S DD[5:57] DMDVCC DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15 DD16 DD17 DD18 DD19 DD20 DD21 DD22 DD23 DD24 DD25 DD26 DD27 DD28 DD29 DD30 DD[5:57] C57 D56 C55 C53 D52 C51 D50 C49 D48 C47 D46 C45 D44 C43 D42 C41 D40 C39 D38 C37 D36 C35 D34 C33 D32 C31 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 U3 MBRST[0:14] MBRST14 MBRST13 MBRST12 MBRST11 MBRST10 MBRST9 MBRST8 MBRST7 MBRST6 MBRST5 MBRST4 MBRST3 MBRST2 MBRST1 MBRST0 B7 B9 B11 B13 B15 B17 B19 A20 B21 A22 B23 A24 A26 B27 A28 A44 A46 A48 A50A52 B DMD_DCLK COMP LSET DMDVCC LOADZ SCA_BUS VBIAS DMDDCLK COMP LSET R96 DMDVCC 10K LOADZ SCA_BUS VBIAS B1 A4 B45 B57 A56 B51 A54 A40 A2 B29 MBRST14 MBRST13 MBRST12 MBRST11 MBRST10 MBRST9 MBRST8 MBRST7 MBRST6 MBRST5 MBRST4 MBRST3 MBRST2 MBRST1 MBRST0 GND GND GND GND GND DCLK COMP LSET DSEL_0 DSEL_1 LOADB RE_WEB SAC_BUS SDOUT SHIELD A18 B25 B31 B33 A34 B35 A36 B37 A38 B47 LOAD_B ROWENB ACLK MODE0 MODE1 B49 B43 B39 A42 A41 VCC2A VCC2B VCC2C VCC2D VCC2E VCC2F B3 B5 B53 B55 C1 D54 VCCA VCCB VCCC VCCD A30 A32 D26 D28 GND GND GND GND GND GND A6 A8 A10 A12 A14 A16 LOAD16 UROWENZ DMDACLK DMDMODE0 DMDMODE1 C113 VCC2 C114 .047U 50V K .047U 50V K LOAD16 UROWENZ DMDACLK DMDMODE0 DMDMODE1 VCC2 B DMDVCC C111 C112 .047U 50V K .047U 50V K DMDVCC DD57 DD56 DD55 DD54 DD53 DD52 DD51 DD50 DD49 DD48 DD47 DD46 DD45 DD44 DD43 DD42 DD41 DD40 DD39 DD38 DD37 DD36 DD35 DD34 DD33 DD32 DD31 D2 C3 D4 C5 D6 C7 D8 C9 D10 C11 D12 C13 D14 C15 D16 C17 D18 C19 D20 C21 D22 C23 D24 C25 C27 C29 D30 c115 4.7U 50V Z C A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D52 D51 D50 D49 D48 D47 D46 D45 D44 D43 D42 D41 D40 D39 D38 D37 D36 D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 MBRST[0:14] C R1 560 DD[5:57] DD[5:57] Project Code A Title Size A3 Date: DS660 Document Number 304-C01 Monday, March 25, 2002 Prepared By ANGEL HU 5 4 3 2 99.J3877.001 A DMD CHIP BD 48.J3802.S01 FAB:S01 Sheet Reviewed By BILL WJ CHANG 1 3 of 4 Approved By T.S.WU Rev 0 5 4 3 2 1 D D Screw Holes C C 9 5 4 8 3 7 4 8 3 7 2 6 2 6 1 5 1 9 5 1 1 Ñ°¬·½¿´ б·²¬- 9 5 4 8 4 8 3 7 3 7 2 6 2 6 H1 H2 H3 H4 HOLE-V8 HOLE-V8 HOLE-V8 HOLE-V8 9 OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP OP8 OP OP9 OP OP10 OP OP11 OP OP12 OP OP13 OP OP14 OP B B Project Code A 99.J3877.001 A Title DS660 Size A3 Date: Document Number 304-C01 Monday, March 25, 2002 Prepared By ANGEL HU 5 4 3 2 DMD CHIP BD 48.J3802.S01 FAB:S01 Sheet Reviewed By BILL WJ CHANG 1 4 of 4 Approved By T.S.WU Rev 0 5 4 3 2 1 VDD VDD J1 D KEY[6:0] KEY[6:0] 4 3 2 1 47 KEY0 KEY1 KEY2 KEY3 KEY4 KEY5 KEY6 R1 10K R2 150 3 LED0 LED1 LED2 LED3 5 6 7 8 R3 LED2A LED2 SW1 1 VDD R5 2K R6 2K R7 2K R8 2K R9 2K R10 2K 2K 3 2 5 C1 12V 680P 50V J 4 2 C2 12V 5 4 680P 50V J 3 R13 LED3A LED3 Q2 2N3904 1 VDD LED3 R19 LED5 1 GREEN LED6 1 GREEN LED8 R27 LED9 1 GREEN LED10 R29 1 LED11 1 GREEN LED12 R31 1 2 3 LED0A 2 RED Q3 2N3904 1 2 2K 5 4 680P 50V J SW6 1 3 2 VDD GREEN SW7 1 2 2 5 C6 12V 680P 50V J B 4 R21 150 3 GREEN R22 10K 2 2 C7 12V GREEN 5 4 680P 50V J R25 LED1A LED1 Q4 2N3904 1 2K 2 D3 1 2 RED GND GREEN 150 2 1 2 Project Code 99.J2077.001 A Title Size A3 Date: DX660 4 3 2 KEYPAD BD Document Number 304-C01 A SCHEMAICS FAB:S01 48.J3403.S01 Saturday, March 02, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 D2 1 R16 3 150 2 150 5 4 680P 50V J 150 2 150 GREEN 150 2 150 1 R30 LED4 2 C5 12V 2 150 2 R24 LED7 R28 GREEN 150 1 R26 1 R20 B 2 C4 12V R15 10K GREEN 150 2 150 1 R23 LED2 R18 1 3 LED0 GREEN 150 C VDD 3 LED1 R17 5 4 680P 50V J SW4 1 2 VDD 1 R4 150 R14 150 SW5 1 2 3 R12 10K 2K 2 C3 12V KEY0 KEY1 KEY2 KEY3 KEY4 KEY5 KEY6 4 YL/GN 3 KEY[6:0] C D1 VDD SW2 1 R11 2K SW3 1 D Q1 2N3904 1 2 LED0 LED1 LED2 LED3 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 GND 3 RN1 BILL WJ CHANG 1 of 2 Approved By H.C.TSOU 1 Rev 0 5 4 3 Ñ°¬·½¿´ Ð 2 1 ±·²¬- OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP D D OP8 OP OP9 OP OP10 OP OP11 OP OP12 OP OP13 OP OP14 OP Screw Holes C C 5 9 5 9 5 9 5 9 4 8 4 8 4 8 4 8 3 7 3 7 3 7 3 7 2 6 2 6 2 6 2 6 H1 H2 H3 H4 HOLE-V8 HOLE-V8 HOLE-V8 HOLE-V8 GND B B Project Code Title A Size A3 Date: 99.J2077.001 DX660 Document Number 304-C01 4 3 SCHEMAICS 2 FAB:S01 48.J3403.S01 Saturday, March 02, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 KEYPAD BD 2 of 2 Approved By BILL WJ CHANG H.C.TSOU 1 Rev 0 A POWERON VDD 3.3V 3.3V V12 DRO[7:0] DRE[7:0] DGO[7:0] DGE[7:0] DBO[7:0] DBE[7:0] Yp /Yc Pb/Cb Pr/Cr Yp/Yc Pb/Cb Pr/Cr GBE[7:0] GHS GVS GBE[7:0] GHS GVS HSYNC VSYNC GBLKSPL GFBK GCLK GCOAST PC_YP_SW GBLKSPL GFBK GCLK GCOAST PC_YP_SW Yp/Yc Pb/Cb Pr/Cr GND GPENSOG GRO[7:0] GRE[7:0] GGO[7:0] GGE[7:0] GBO[7:0] GBE[7:0] GHS GVS DCLK Page_7 07_PW166 VDD GBLKSPL GFBK GCLK GCOAST PC_YP_SW 3.3V LAMPENA D[0:7] LAMPENA SDA SCL SDA SCL CS0n CS0n CS0n AUDIO_MUT AUDIO_MUT LOW_P LOW_P ALERT ALERT LED[3:0] SDA SCL LAMPLITZ RESETZ PC_AUDIO_L PC_AUDIO_R GND SDA SCL LAMPLITZ VDD V12 3.3V PC_AUDIO_L PC_AUDIO_R AUDIO_MUT LOW_P ALERT AUDIO_R AUDIO_L PC_AUDIO_L PC_AUDIO_R GND AUDIO_R AUDIO_L LED [3:0] Page_11 11_USB REMOTE_IR REMOTE_IR LED[3:0] VDD GND GND PAGE1 AUDIO_R AUDIO_L RXD TXD 3.3V VDD LAMPLITZ RXD TXD 3.3V SDA_M SCL_M VDD RXD TXD 3 CWINDEX IRRCVR GND Page1 V12 DCLK IRRCVR PC_YP_SW Page_2 02_INPUT DBE[7:0] DHS DVS DEN VDD VDD Page_5 05_AFE 2 DGE[7:0] DBE[7:0] LAMPLIT GGE[7:0] GGE[7:0] BAIN_B HSY NC V SYNC DRE[7:0] DGE[7:0] 2 LAMPLIT GRE[7:0] GRE[7:0] GAIN_B HSYNC VSYNC DRE[7:0] LAMPENA SCL SDA V33 V33 RAIN_B POWERON RESETZ DHS DVS DEN Page_4 04_DECODE 3 POWERON RESETZ POWERON RESETZ VDD TCK TDI TMS TDO RESET NMI Page_9 09_DISPLAY LAMPLIT SCL SDA V33 GND VVS VFIELD VPEN VHS VCLK BHENn RESET VVS VFILD VPEN VHS VCLK VUV[7:0] 4 VDD DCKEXT MCKEXT CHROMA VVS VFIELD VPEN VHS VCLK VY[7:0] WATCHDOG A0 CHROMA VUV[7:0] VUV[7:0] A[19:1] CHROMA LUMA VY[7:0] VY[7:0] D[0:15] LUMA CVBS ROMOEn ROMWEn VPPEN EEP_WP LUMA VDD CVBS CVBS LLC1 LLC2 GND VDD 3.3V RESET DCKEXT MCKEXT DCKEXT MCKEXT VDD HSYNC_O VSYN C_O RAIN_B GAIN_B BAIN_B HSYNC_O VSYNC_O A[19:1] RAIN_B GAIN_B BAIN_B 4 E GND Page_8 08_MISC WATCHDOG GND Page_6 06_MEMORY GND 3.3V D D[0:15] VDD SCL_M SDA_M VDD 3.3V A[19:1] VDD VDD C D[0:15] 03_DOUT RAIN_B GAIN_B BAIN_B HSYNC_O VSYNC_O Page_3 B ROMOEn ROMWEn VPPEN EEP_WP A Page_10 10_AUDIO_&_DETECT VDD V12 3.3V Project Code Model Name DX660 99.J3477.001 1 Title OEM/ODM Model Name NA Size PCB P/N <Size> 48.J3402.S03 PCB Rev. Document Number S03 ANGEL HU B C D R ev . 304-C02 Tues day, May 21, 2002 Date: Sheet Prepared By Reviewed By A 1 MAIN BD BILL WJ CHANG E 1 1 of 12 Approved By T.S.WU A B C D E L1 CHROMA VDD BEAD 2 2 17 R8 VDD 1 D3 1 D4 0 D5 3 R9 4.7K R12 4.7K RV1 47 GSCL 5.1V 1 BAV99 DN7 5 SDA VSS 4 6 SCL A2 3 7 WP A1 2 8 VCC A0 1 C1 6 BAIN_B GAIN_B BAIN_B J2 2 2 1 1 L4 BEAD R10 18 Pr/Cr 4 4 3 3 L5 BEAD R11 18 Pb/Cb 6 6 5 5 L6 BEAD R13 18 Yp /Yc VDD U1 7 2 5 12 9 1 4 U2 GSDA 3 1 1 BAV99 DN6 2 5.1V 2 5.1V RH1 47 2 2 2 3 3 47 75 75 75 0 R7 VDD R3 R4 R5 R6 RAIN_B GND A0 A1 A2 A3 OE0 OE1 VCC O0 O1 O2 O3 OE2 OE3 14 3 6 11 8 13 10 74AHC125 R14 R15 47 HSY NC HSYNC_O 47 VS YNC VSYNC_O DN8 3 PC_YP_SW DN9 3 56 R22 L11 BEAD PC_AUDIO_R 0 PC_AUDIO_L 25V Z C5 0.1U 47P 50V J 2 DN12 BAV99 C7 47P 50V J 1 C6 3 3 DN13 VDD PC_AUDIO_L VDD L7 4 4 3 3 L8 6 6 5 5 L10 BEAD C2 0.1U 25V Z R19 0 AUDIO_L C4 0.1U 25V Z R21 0 AUDIO_R BEAD VDD 2210019011 VDD DN14 3 BAV99 C9 3 C8 BAV99 1 2 2210185001 PC_AUDIO_R 1 1 47P 50V J DN15 BAV99 3 47P 50V J B C D PCB Rev. Document Number S03 1 R ev . 1 304-C02 Tues day, May 21, 2002 Sheet Prepared By Reviewed By ANGEL HU A OEM/ODM Model Name NA MAIN BD Size PCB P/N <Size> 48.J3402.S03 Date: DN16 BAV99 Model Name DX660 99.J3477.001 Title AUDIO_R VDD Project Code 1 2 AUDIO_L 2 25V Z C3 0.1U 1 1 4 2 BEAD 2 2 4 2 L9 2 1 3 5 0 56 CVBS CV12 25V 0.1U M 2 3 5 R20 56 DN11 BEAD 1 R16 R17 R18 CVBS J3 1 VDD Yp/Yc 1 BAV99 2 DN10 3 2 J4 Pb/Cb BAV99 BAV99 BAV99 GND AT24C02A Pr/Cr 3 2210019011 PC_YP_SW 0.1U 25V Z HSY NC HSYNC_O VSYNC VSYNC_O 2 2024012015 DDC5V G AIN_B 1 VDD 2 1N4148 2 1N4148 RAIN_B 47 BAV99 2 15 1 D1 1 D2 47 R2 DN5 3 1 14 R1 VDD 2 CV11 0.1U M 25V 1 2 13 4 2 1 12 2 LUMA 6 RED_GND RIN_1 GREEN_GND GIN_1 BLUE_GND BIN_1 PC_5VIN 1 5 11 LUMA BEAD 1 1 L3 6 1 7 2 8 3 9 4 10 5 BAV99 4 BAV99 L2 4 BAV99 J1 3 BAV99 1 DN4 3 5 16 DN1 DN3 3 1 4 2 2 VDD DN2 3 CHROMA CV10 0.1U M 25V 1 3 VDD 3 VDD BILL WJ CHANG E 2 of 12 Approved By T.S.WU B C D E 17 A L13 47 V_OUT 14 HSYNC_O R24 47 H_OUT 13 5 10 4 9 3 8 2 7 1 6 12 DN17 3 16 R25 75 RGBO_B GREEN_OUT R26 75 RGBO_G RED_OUT R27 75 RGBO_R RGBO_B RGBO_G RGBO_R VDD 2024012015 DN18 3 DN19 3 DN20 3 BAV99 1 BAV99 1 BAV99 1 BAV99 11 2 2 VDD 4 BLUE_OUT 2 R23 DN21 3 BAV99 1 HSYNC_O VSYN C_O 2 VSYNC_O 1 4 2 15 3 3 VDD -5V_PIN1 R31 2 RGBO_R RAIN_B RGBO_R R34 R35 820 820 IN 1- DIS2 -IN2 13 3 DIS3 +IN2 12 GAIN_B 4 +VS -VS 11 -5V 5 +IN1 +IN3 10 6 -IN1 -IN3 9 OUT1 OUT3 8 7 GAIN_B R37 R36 820 820 CAP+ U4 1 2 3 4 C15 õ 10U 25V -5V BAIN_B IN 3- C13 RGBO_G 1 IN 2- 820 820 CAP- 0.1U NC CAP+ GND CAP- V+ OSC LV VOUT ICL7660S 5V BAIN_B RGBO_B 8 7 6 5 25V Z -5V C18 C17 2 RAIN_B 2 R32 R33 0 0.1U 25V Z 0.1U 25V Z -5V C16 25V 22U 1 0.1U 25V Z DIS1 OUT2 14 2 C14 RGBO_G 1 õ U3 VDD GND RGBO_B 2 AD8013 Project Code Model Name DX660 99.J3477.001 1 Title B C D PCB Rev. Document Number S03 R ev . 1 304-C02 Tues day, May 21, 2002 Sheet Prepared By Reviewed By ANGEL HU A 1 MAIN BD Size PCB P/N <Size> 48.J3402.S03 Date: OEM/ODM Model Name NA BILL WJ CHANG E 3 of 12 Approved By T.S.WU A B C E DECOE V33 SCL SDA C24 C25 C26 C27 C28 C29 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 25V Z 25V Z 25V Z 25V Z 25V Z 25V Z 25V Z 25V Z LD1117-3.3V 2 VOUT VIN C20 0.1U 25V Z 4 VAA C19 22U 25V õ 2 C23 U6 3 1 VDD CVBS CHROMA 3 LUMA CVBS R39 CHROMA R40 LUMA R41 RCVBS C31 RLUM .047U 50V K 18 18 RC HR 18 C30 .047U 50V K TDO TDI TRST TCK TMS TEST19 TEST18 TEST17 TEST16 TEST15 TEST14 TEST13 TEST12 TEST11 TEST10 TEST9 TEST8 TEST7 TEST6 TEST5 TEST4 TEST3 TEST2 TEST1 AMXCLK AMCLK ALRCLK ASCLK SDA SCL INT_A CE RES RTCO RTS1 RTS0 LLC2 LLC XTRI A5 B5 C6 B6 D6 P13 P2 N14 N13 N3 N2 N1 D13 C14 C13 C12 C4 C3 B14 B13 B12 B2 A13 A12 M12 P11 P12 N11 P10 N9 P9 N4 P5 L10 N10 M10 N5 P4 B11 0.1U 25V Z R38 10K C22 1 C21 VOUT V33 GND VIN 2 1 VDD V33 LD1117-3.3V LLC2 LLC1 U5 3 LLC2 LLC1 XRI VDD 4 GND SCL SDA D M13 J2 K1 K2 L3 K3 C2 G4 G3 H2 J3 H1 E3 F2 F3 G1 F1 L2 B1 D2 D1 E1 D3 P3 M1 M2 J4 H3 E4 C1 M3 K4 H4 F4 D4 L1 J1 G2 E2 X200 AI12 C41 .047U 50V K C42 .047U 50V K C43 .047U 50V K AI22 C44 .047U 50V K AI3D C45 .047U 50V K AI4D AI1D AI2D R42 R43 R44 56 56 56 VAA XRV XRH XRDY XDQ XCLK XPD0 XPD1 XPD2 XPD3 XPD4 XPD5 XPD6 XPD7 HPD0 HPD1 HPD2 HPD3 HPD4 HPD5 HPD6 HPD7 ITRI IGP1 IGP0 IGPV IGPH ITRDY IDQ ICLK IPD0 IPD1 IPD2 IPD3 IPD4 IPD5 IPD6 IPD7 CLKEXT ADP0 U7 SAA7118E VAA VAA VAA VAA VAA VAA VAA VAA C32 C33 C34 C35 C36 C37 C38 C39 C40 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 3 VUV[7:0] VUV[7:0] VUV0 VUV1 VUV2 VUV3 VUV4 VUV5 VUV6 VUV7 ITRI VFILD VFILD VVS VHS VCLK_A VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7 R45 VVS VHS VPEN VCLK 0 VPEN VCLK R46 2 10K VY[7:0] VY[7:0] GND VSSD2 VSSD4 VSSD6 VSSD8 VSSD10 VSSD12 VDDD2 VDDD4 VDDD6 VDDD8 VDDD10 VDDD12 VSSD1 VSSD3 VSSD5 VSSD7 VSSD9 VSSD11 VSSD13 VDDD1 VDDD3 VDDD5 VDDD7 VDDD9 VDDD11 VDDD13 VSS(xtal) VDD(xtal) XTOUT XTALO XTALI ADP8 ADP7 ADP6 ADP5 ADP4 ADP3 ADP2 ADP1 2 FSW AI11 AI12 AI13 AI14 AI1D AGND AI21 AI22 AI23 AI24 AI2D AI31 AI32 AI33 AI34 AI3D AGNDA AI41 AI42 AI43 AI44 AI4D EXMCLR AOUT VSSA0 VSSA1 VSSA2 VSSA3 VSSA4 VDDA0 VDDA1 VDDA2 VDDA3 VDDA4 VDDA1A VDDA2A VDDA3A VDDA4A VAA D8 C7 A6 B7 A7 A8 B8 A9 B9 A10 B10 A11 C11 D14 E11 E13 E12 E14 F13 F14 G13 L12 K13 L14 K14 K12 N12 L13 M14 G14 G12 H11 H14 H13 J14 J13 K11 N6 N8 LLC2 LLC1 D7 D10 F11 J11 L5 L9 C8 C10 F12 J12 M5 M9 D5 D9 D11 G11 L4 L8 L11 C5 C9 D12 H12 M4 M8 M11 A4 B3 A2 A3 B4 P6 M6 L6 N7 P7 L7 M7 P8 LLC2 LLC1 1 V33 XTAL XTALI V33 C46 õ Project Code 22U 25V 24.576MHZ Y1 Title C47 C48 Size PCB P/N <Size> 48.J3402.S03 50V J 18P 50V J 18P Date: B C D OEM/ODM Model Name NA 1 MAIN BD PCB Rev. Document Number S03 R ev . 1 304-C02 Tues day, May 21, 2002 Sheet Prepared By Reviewed By ANGEL HU A Model Name DX660 99.J3477.001 2 1 BILL WJ CHANG E 4 of 12 Approved By T.S.WU D LD1117-3.3V AVDD VIN 1KF GFILT 1 GAIN_B BAIN_B RAIN_B G AIN_B BAIN_B PC_YP_SW BAIN V33 1 GCLK GFBK GHS1 GVS PC_YP_SW BAIN B 8 7 6 5 5 GCLK GFBK GHS1 GVS 7 6 5 2 3 4 3 G GE[7:0] GGE[7:0] 22P 22P CN3 8 1 Project Code GRE[7:0] C Model Name DX660 99.J3477.001 Title OEM/ODM Model Name NA Size PCB P/N <Size> 48.J3402.S03 PCB Rev. Document Number S03 R ev . 304-C02 Tues day, May 21, 2002 Date: Sheet Prepared By Reviewed By D 1 MAIN BD ANGEL HU A GBE[7:0] GAIN BA7657F 1 10U M 20V 4 1 2 3 4 1 4 47 RN5 5 GAIN 47 R59 RA IN 4 RA IN 6 0.01U 68K C64 8GRE4 7GRE5 6GRE6 5GRE7 3 C90 50V K 2 C91 GAIN_I 1 10U M 20V RN6 47 7 0.01U 16V Z 8 C88 50V K 2 C89 R AIN_I 1 10U M 20V 50V K 2 0.01U 24 23 22 21 20 19 18 17 16 15 14 13 C76 1U 1 C86 50V K 2 C87 RIN_1 HIN_1 HDdetect DIN_2 GIN_1 HD_O GND R_out BIN_1 VCC GND G_out RIN_2 CON_IN GND CON_O GIN_2 CTL GND B_out BIN_2 VD_out VIN_1 VIN_2 4 3 2 1 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 CN8 U12 1 2 3 4 5 6 7 8 9 10 11 12 C75 0.01U GRE0 GRE1 GRE2 GRE3 5 R58 0.01U Pb/Cb_I 1 10U M 20V ADVS ADSOG ADHS ADCK BEAD 4 3 2 1 L14 8 RAIN_B C78 50V K 2 C85 Pb/Cb VDD 1 10U M 20V RN7 8 7 6 5 1 2 3 4 22P 0.01U G BE[7:0] GRE [7:0] 47 1 2 3 4 6 C73 50V K 2 C74 0.1U 0.1U 25V Z 25V Z 2 V33 CN6 Pb/Cb Yp /Yc Pr/Cr_I 1 10U M 20V 1 Yp/Yc Pr/Cr 47 4 3 2 1 RN4 5 6 7 8 47 5 6 7 8 Pr/Cr AVDD AVDD V33 RN3 4 0.01U 5 6 7 8 7 C71 50V K 2 C72 2 5 470P 50V K 0.1U 25V Z ADGE0 ADGE1 ADGE2 ADGE3 ADGE4 ADGE5 ADGE6 ADGE7 CN5 22P 47 4 3 2 1 22P C70 C69 H DD 6 470K C63 22U 25V C84 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 4 R57 AVDD U11 AD9883AKST-140 4 3 2 1 RN2 5 6 7 8 3 AVDD C83 5 G VREF C82 4 G RIN C60 õ 22P 50V K .047U C81 CN2 AVDD AVDD 5 6 7 8 2 C68 GG IN ADBE0 ADBE1 ADBE2 ADBE3 ADBE4 ADBE5 ADBE6 ADBE7 8 GRIN_A AVDD 50V K .047U C80 CN4 22P RN1 47 CN7 68 R55 C183 10P J SCL SDA G GIN_A C66 C67 1000P 50V K 3 RA IN SCL SDA 68 R53 C182 10P J ADRE7 ADRE6 ADRE5 ADRE4 ADRE3 ADRE2 ADRE1 ADRE0 GAIN GND B0 B1 B2 B3 B4 B5 B6 B7 VDD GND G0 G1 G2 G3 G4 G5 G6 G7 GND 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 G BIN_A C65 GND VD BAIN GND VD VD GND GAIN SOGIN GND VD VD GND RAIN A0 SCL SDA REF BYPASS VD GND 7 RA IN 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 25V Z 25V Z 25V Z 25V Z 25V Z 25V Z V33 68 AVDD GBIN 2 BAIN AVDD 50V K .047U AVDD GAIN C79 22U 25V 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 BAIN C181 10P J R52 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 PVDD 0.1U 25V Z PVDD GND 3 C77 õ 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 PVDD C61 GND VD CLAMP MIDSCV GND PVD PVD FILT GND VSYNC HSYNC COAST GND VD VD GND GND VDD VDD GND 1U K <Spec> VS YNC HSY NC GCOAST GBLKSPL GND VD GND VSOUT SOGOUT HSOUT DATACK GND VDD R7 R6 R5 R4 R3 R2 R1 R0 VDD VDD GND 390K GVMID AVDD V33 2 8 C258 PVDD 2 V33 3.3K AVDD VSYNC HSY NC GCOAST GBLKSPL VOUT V33 220K 74LV123 R152 R49 8 R150 1 2 D32 1N4148 C257 220P R151 25V K GHS C62 0.1U 25V Z 6 360 C56 3 47K C55 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 25V Z 25V Z 25V Z 25V Z 25V Z 25V Z 3 CX2 RCX2 6 7 R47 R48 2 1N4148 C54 7 2R 5 12 1 D6 C53 7 2Q 2Q 13 4 C52 2 2A 2B 390P K C51 6 11 1R C57 C50 22U 25V õ 8 9 10 1Q 1Q 14 15 0.1U 25V Z 39N C59 25V K R EF_A LD1117-3.3V VIN 1 3 CX1 RCX1 3900P C58 50V K U10 3 VDD 2 1A 1B C49 U9 2 1 2 GHS1 GND 4 VCC 16 PVDD VDD AVDD 2 VOUT 1 3 VDD 1 U8 PVDD GND 1KF 2 VDD R50 E GND C 1 B V33 1 A BILL WJ CHANG E 5 1 of 12 Approved By T.S.WU A B C D E A[19:1] 3.3V 3.3V R60 ROMWPn 1M A16 A15 A14 A13 A12 A11 A10 A9 4 R61 3.3K 3.3V ROMWEn ROMWEn 3.3V Q1 2 2N3906 3 3.3V 3.3V 3.3V VPP 1 C92 VP3 0.1U 25V Z A19 A18 A8 A7 A6 A5 A4 A3 A2 R62 1K 3 R63 1K VPPEN R64 1M VPPON R65 R66 3.3K VP11 10K Q2 2N3904 A15 A16 A14 BYTE# A13 VSS A12 DQ15/A-1 A11 DQ7 A10 DQ14 A9 DQ6 A8 DQ13 A19 DQ5 NC DQ12 WE# DQ4 RESET# VCC NC DQ11 NC DQ3 U13 RY/BY# DQ10 A18 DQ2 A17 MBM29LV400TC DQ9 A7 DQ1 A6 DQ8 A5 DQ0 A4 OE# A3 VSS A2 CE# A1 A0 A17 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 3.3V D[0:15] 4 D[0:15] D15 D7 D14 D6 D13 D5 D12 D4 D11 3.3V D3 D10 D2 D9 D1 D8 D0 ROMOEn ROMOEn A1 3 2 VPPEN 3 VP2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 R67 3.3K GND VDD 2 2 VDD U14 1 2 3 4 NC NC NC GND VCC WP SCL SDA 8 7 6 5 SCL_M SDA_M R68 2K 3 C93 0.1U 25V Z SCL_M SDA_M 2 AT24C16 16K Q3 1 EEP_WP 2N3904 Project Code Model Name DX660 99.J3477.001 1 Title B C D PCB Rev. Document Number S03 R ev . 1 304-C02 Tues day, May 21, 2002 Sheet Prepared By Reviewed By ANGEL HU A 1 MAIN BD Size PCB P/N <Size> 48.J3402.S03 Date: OEM/ODM Model Name NA BILL WJ CHANG E 6 of 12 Approved By T.S.WU A B C GFBK GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 F18 E19 E20 J18 H20 J19 J20 K19 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 D16 A18 C17 B18 A19 B19 A20 D18 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GRO0 K20 GRO1 L17 GRO2 L18 GRO3 L19 GRO4 L20 GRO5 M18 GRO6 M17 GRO7 M19 GRO0 GRO1 GRO2 GRO3 GRO4 GRO5 GRO6 GRO7 GGO0 GGO1 GGO2 GGO3 GGO4 GGO5 GGO6 GGO7 GBO[7:0] GBO0 GBO1 GBO2 GBO3 GBO4 GBO5 GBO6 GBO7 2 E17 C19 B20 C20 E18 F17 D19 D20 B15 A16 C15 D15 B16 A17 C16 B17 Graphics Port D12 VCLK VPEN C13 VPEN VVS VHS VFIELD VY[7:0] A14 B14 A15 VVS VHS VFIELD VUV[7:0] GBO0 GBO1 GBO2 GBO3 GBO4 GBO5 GBO6 GBO7 VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7 AUDIO_MUTA 47 2K LOW_PA RN13 5 4 6 3 7 2 8 1 RN15 47 POWERON 5 4 RESETZ 6 3 EEP_WP 7 2 VPPEN 8 1 LED0 47 LED1 LED2 LED3 D0 D1 D2 D3 PW166-10TK D4 D5 Misc D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 F4 F3 E1 F2 F1 G2 G1 H1 H4 H3 H2 J1 J2 J4 J3 K1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 RD WR BHEN ROMOE ROMWE RAMOE RAMWE CS0 CS1 M3 M4 N2 M1 L2 L1 K2 M2 N1 EXTINT E2 NMI D1 MCKEXT DCKEXT P3 P4 XTALI XTALO C1 D3 RXD TXD E4 D2 IRRCVR0 IRRCVR1 C2 B1 B2 A1 C4 D5 B3 A2 PORTA0 PORTA1 PORTA2 PORTA3 PORTA4 PORTA5 PORTA6 PORTA7 A3 C5 D6 B4 A4 C6 B5 A5 PORTB0 PORTB1 PORTB2 PORTB3 PORTB4 PORTB5 PORTB6 PORTB7 LED[3:0] U15B U15D PW166-10TK Video Port VUV0 VUV1 VUV2 VUV3 VUV4 VUV5 VUV6 VUV7 V3P TMS TCK TDI TDO R77 R78 R79 R81 DEN Y15 DRE0 DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7 R19 T20 R18 R17 T18 U19 T17 V20 DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 U18 V19 W20 W19 Y20 V17 U16 W18 DBE0 DBE1 DBE2 PW166-10TK DBE3 DBE4 Display Port DBE5 DBE6 DBE7 Y19 Y18 V16 U15 Y16 V15 W16 W15 DRO0 DRO1 DRO2 DRO3 DRO4 DRO5 DRO6 DRO7 Y12 W11 Y11 U10 V10 W10 Y10 W9 RN9 R RE0 5 D RE0 4 R RE1 6 D RE1 3 R RE2 7 D RE2 2 R RE3 8 D RE3 1 R RE4 5 D RE4 4 R RE5 6 D RE5 3 R RE6 7 47 D RE6 2 R RE7 8 D RE7 1 RN11 47 RN10 RGE0 5 DGE0 4 RGE1 6 DGE1 3 RGE2 7 DGE2 2 RGE3 8 DGE3 1 RGE4 5 DGE4 4 RGE5 6 DGE5 3 RGE6 7 47 DGE6 2 RGE7 8 DGE7 1 RN14 47 RN12 RBE0 5 DBE0 4 RBE1 6 DBE1 3 RBE2 7 DBE2 2 RBE3 8 DBE3 1 RBE4 5 DBE4 4 RBE5 6 DBE5 3 RBE6 7 47 DBE6 2 RBE7 8 DBE7 1 47 RN16 D RO0 D RO1 D RO2 D RO3 D RO4 D RO5 D RO6 D RO7 DGO0 DGO1 DGO2 DGO3 DGO4 DGO5 DGO6 DGO7 Y9 W8 V8 U8 Y8 Y7 W7 Y5 DGO0 DGO1 DGO2 DGO3 DGO4 DGO5 DGO6 DGO7 X702 X703 X704 4.7K 4.7K 1M D13 A6 CPUTMS CPUTCK W3 CPUTDO A13 U5 B6 MODE0 MODE1 MODE2 DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7 V6 U6 W5 Y4 V5 Y3 V4 Y2 DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7 A[19:1] D[0:15] U15C W Rn TP1 BHENn ROMOEn ROMWEn TP2 TP3 CS0n RAMOEn RAMWEn CS0n TP4 N MI R80 1K 4.7K 1 V3P C98 õ 2 C7 C18 U20 V18 Y17 V12 V9 Y6 V3 K3 C96 22U 25V V3P Power and Ground V3P V25 C99 C100 õ 0.1U 25V Z V3P V3P 0.1U 25V Z V3P V25 C97 22U 25V V25 0.1U 25V Z V25 V25 V25 V25 C101 0.1U 25V Z V25 C102 C103 C104 C105 C106 C107 C108 C109 C110 C111 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z V3P D4 D7 D10 B11 A12 D14 D17 G17 K17 P17 T19 U17 W17 U14 W14 U12 U11 U9 U7 W6 W4 U4 L4 K4 G4 з¨»´©±®µÐ®±½»--±® Ó±¼ V25 V3P GND V3P V3P V3P V25 V25 V25 V25 V25 ð ÒÑ ÒÑ ð ÒÑ ìòéÕ ð ìòéÕ ÒÑ ð ìòéÕ ìòéÕ Î»-»®ª» ¼ ÒÑ Î»-»®ª» ¼ ÒÑ ÒÑ V25 C112 C113 C114 C115 C116 C117 C118 C119 C120 C121 ÒÑ ÒÑ ìòéÕ 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z ÒÑ ìòéÕ ÒÑ ÒÑ 4 DGE[7:0] DBE[7:0] 3 DRO[7:0] DG O[7:0] DBO[7:0] 2 ìòéÕ ìòéÕ VDD » VDD λ-»®ª» ¼ BC2 B C VIN LM317M VOUT 2 õ U16_A R83 4.7U 50V Z Û²¿¾´» ײ¬»®²¿´ ÐÔÔô Ñ-½·´´¿¬±®ô ¿²¼ ÖÌßÙ °±®¬ Û²¿¾´» ÖÌßÙ V25 3 BC1 22U 25V 2K R84 2K ᮬ Project Code Model Name DX660 99.J3477.001 Û²¿¾´» ײ¬»®²¿´ ¿²¼ Ñ-½·´´¿¬ ±® ÐÔÔ ÐÔÔ Date: D OEM/ODM Model Name NA 1 MAIN BD Size PCB P/N <Size> 48.J3402.S03 ÐÉïêì Ó±¼» Û²¿¾´» ײ¬»®²¿´ Title PCB Rev. Document Number S03 R ev . 1 304-C02 Tues day, May 21, 2002 Sheet Prepared By Reviewed By ANGEL HU A DRE[7:0] U16 V3P VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 C3 C10 C11 B12 C14 G18 K18 P18 V14 Y14 V11 V7 L3 G3 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 D8 C8 B7 A7 B8 D9 C9 A8 VUV0 B9 VUV1 A9 VUV2 B10 VUV3 A10 VUV4 D11 VUV5 A11 VUV6 C12 VUV7 B13 GGO0 GGO1 GGO2 GGO3 GGO4 GGO5 GGO6 GGO7 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 U15E VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7 SDA SCL AUDIO_MUT R75 LOW_P R76 ALERT LAMPLITZ PC_YP_SW WATCHDOG POWERON RESETZ EEP_WP VPPEN VCLK 3.3V PW166-10TK RXD TXD U15A L15 BEAD R82 W13 Y13 X700 X701 SDA SCL AUDIO_MUT LOW_P ALERT LAMPLITZ PC_YP_SW W ATCHDOG V25P 27 MCKEXT DCKEXT IRRCVR 3.3V V25 2K RX2 1M PW166-10TK A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 1 GGO[7:0] M20 N19 N18 N17 N20 P20 P19 R20 P1 P2 N3 N4 R1 R2 T1 T2 R3 U1 U2 R4 T3 V1 W1 V2 T4 U3 Y1 W2 RESET DCLK DVS DHS DEN 2 GRO[7:0] 2K E3 GND 3 RX1 1M RESET X700 X701 GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 R73 R74 GBLKSPL GCOAST W12 V13 U13 1 GBE[7:0] V25 H17 H18 F19 F20 GFBK GREF GBLKSPL GCOAST 1 GRE[7:0] GCLK GPENSOG GVS GHS 471RN8 2 3 4 RDK 8 RDV 7 R DH 6 RDE 5 DCLK DVS DHS A0 2 H19 G20 J17 G19 GGE[7:0] 1 E 3.3V 3.3V GCLK GPENSOG GVS GHS 4 D BILL WJ CHANG E 7 of 12 Approved By T.S.WU A B C D E 3.3V 3.3V 3.3V C128 0.1U 25V Z U17 4 7 POWERON OE 6 4 Y3 U17_X1 U17_X2 R86 S0 S1 1 8 RDCK 5 CLK 3.3V DCKEXT 3 GND ICS501 R90 820K U18_X1 U18_X2 Y4 16.257MHZ 7 OE VDD 2 6 4 S0 S1 CLK 5 1 8 X1 X2 GND R91 C127 C124 10P 50V J 10P 50V J 3.3V U18 çèÓئ 22 X1 X2 16.257MHZ 2 VDD 4 ïíðÓئñìïÓئ R87 GND RMCK MCKEXT 22 3 ICS501 820K C125 10P 50V J C122 0.1U 25V Z C126 10P 50V J 3 3 VDD 2 VDD D7 1N4148 1 R85 0 U19 1 NC 2 VSS 3 NC VDD 5 RES 4 C123 50V Z 4.7U RESET_I R88 270 RESETY UR2 R89 510 V6300L 2 RESETX 1 A RESETY 2 B 3 GND 3.3V VCC 5 Y 4 2 RESET 74AHC1G32 RA5 0 VDD 1K CA2 10U Z 2 RA3 2N3906 QR1 WATCHDOG 1 3.3V RA7 RA1 1K UR1 1 2 3 4 3 WATCHDOG 8 7 6 5 CA1 10K NE555 RA2 100K 0.1U M Project Code RESETX Model Name DX660 99.J3477.001 OEM/ODM Model Name NA 1 2 1 1 RA4 Title 1K MAIN BD Size PCB P/N <Size> 48.J3402.S03 3 2N3904 QR2 PCB Rev. Document Number S03 Tues day, May 21, 2002 Date: Sheet Prepared By Reviewed By ANGEL HU A B C D R ev . 304-C02 BILL WJ CHANG E 8 1 of 12 Approved By T.S.WU A B C D E 3.3V DBE[7:0] DRE[7:0] DGE[7:0] JR1 DCLK DEN DVS CWINDEX POWERON RESETZ DCLK DEN D VS CWINDEX R107 100 POWERON RESETZ POW_A 3.3V 3.3V C134 4.7U 50V Z 2 3 1 D RE0 Q6 MMBT2222A R99 DBE4 47 C129 4.7U 16V Z DBE2 DBE0 DHS R104 2K 3 R108 1K SCL_M SDA_M IRRCVR2 IRRCVR2 R110 510 R111 510 R113 510 LAMPSYNC LAMPEN RESETZ 3.3V U23A 14 LAMP_S_I 1 LAMP_OUT 3 LAMP_RESET R112 47 Q8_B 1 2 C136 470P 16V J 7 74HC08 R109 270 LAMPENA Q7 2N3904 1 Q8 2N3904 GND VDD 2 VDD C135 4.7U 50V Z VDD VDD R114 V12 C137 4.7U 50V Z 10K IRRCVR1 U24 510 I R_II1 R116 510 2 4 3 R115 1M IRRCVR 74AHC1G08 Project Code SC1 SD1 VSS SC0 8 7 6 5 Model Name DX660 99.J3477.001 SCL_M SDA_M Title Size PCB P/N <Size> 48.J3402.S03 PCA9540DP Date: B C D OEM/ODM Model Name NA 1 MAIN BD PCB Rev. Document Number S03 R ev . 1 304-C02 Tues day, May 21, 2002 Sheet Prepared By Reviewed By ANGEL HU A C131 10U 25V 3.3V LAMPEN LAMPLITZ LAMPSYNC SCL_M SDA_M R103 C133 0.1U 25V Z õ D HS SYNCVALID LAMPEN LAMPLITZ LAMPSYNC 1M SCL SDA VDD SD0 R100 1M VDD R102 1 2 3 4 Q4_C IRRCVR1 U22 SCL SDA 3.3V Q5_B R101 33K IR VCC C130 0.1U 25V Z IRRCVR2 1 Q5_E LAMPLIT 1 VDD DBE6 1 LAMPLIT 1 3 2 MMBT2222A Q4 1N4148 Q7_C 3 DBE1 10P 50V J C132 D RE2 D8 2 1 3 DBE3 D RE4 Q5 MMBT2222A 2 DBE5 LAMPLITZ LAMPLITZ 2 DBE7 FM-6038LM U21 D RE6 Q8_C D RE1 Q4_B 3 D RE3 Q5_C DGE1 2 D RE5 DGE3 2 D RE7 4 DGE5 3 DGE0 R98 1M 2 DGE2 R97 1K 5 DGE4 VS GND OUT 4 R96 2K DGE7 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 3 2 1 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 DGE6 BILL WJ CHANG E 9 of 12 Approved By T.S.WU A B C D E 3.3V RESETZ RESETZ VDD KEY[6:0] K EY[6:0] D[0:7] THERMAL_B 2N3904 Q10_C VDD R120 0 R117 5 6 7 8 47 CS0n CS0n 2 4 6 8 11 13 15 17 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1 19 1G 2G 20 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 18 16 14 12 9 7 5 3 LED[3:0] LED[3:0] 74AHC244 J5 RN18 D0 D1 D2 D3 D4 D5 D6 D7 LED0 LED1 LED2 LED3 KEY[6:0] 5 6 7 8 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 17 LED_A0 LED_A1 LED_A2 LED_A3 4 3 2 1 47 KEY[6:0] KEY0 KEY1 KEY2 KEY3 KEY4 KEY5 KEY6 GND 3 Q10 2N3906 KEY0 KEY1 KEY2 KEY3 KEY4 KEY5 KEY6 U25 VDD 10 Q10_B 1 2K 2 OVERT OVERT R118 10K Q11 1 RN17 1 K0 2 K1 3 K2 4 K3 K4 K5 K6 VCC R119 3 2 4 47 8 7 6 5 4 3 2 1 RN19 D[0:7] C138 0.1U 25V Z VDD 3.3K MMBT2222A 2 AUDIO_MUT 3 MUT_OUT Q9 1 4 GND 3 3 VDD 470 V12 BEAD L17 BEAD VDD_A 3.3V 3.3V_A 1 V12 BOUTL BINL C147 õ 35V 1U 1 V12 C148 õ L20 L21 PC_AUDIO_R C149 25V Z AUDIO_R 0.1U C150 IN1_R 25V Z PC_AUDIO_L PC_AUDIO_R 0.1U 0.1U IN1_L C152 IN2_L 25V Z IN2_R C153 25V Z IN1-L IN1-R 4 MONIN-MUTE 3 2 IN2-L IN2-R 18 19 SCL SDA U26 TDA7433D 8 7 R129R130R131R132 LEFT-FRONT RIGHT-FRONT LEFT-REAR RIGHT-REAR CREF 16 15 14 13 LEFT_F RIGHT_F R126 R127 100 100 1 2 1U 35V AUDIO_OUT R128 OPEN BINR 25V Z C155 BEAD 35V 1U 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 LOW_P MUT_OUT ALERT AUDIO_OUT 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 2 SCL OVERT LAMPLIT LAMPENA THERMAL_B THERMAL_B C REF BOUTR C157 C156 C154 õ Project Code 0.1U 0.1U 25V Z 10U 25V Title 2700P 50V K Model Name DX660 99.J3477.001 R133 3.9K C D PCB Rev. Document Number S03 1 R ev . 1 304-C02 Tues day, May 21, 2002 Sheet Prepared By Reviewed By ANGEL HU B OEM/ODM Model Name NA MAIN BD Size PCB P/N <Size> 48.J3402.S03 Date: A 3.3V C144 õ 1U 16V 1 1 SCL SDA C143 õ 1U 16V TAR 10K 10K 10K 10K SCL SDA BEAD J6 SDA C151 6 5 L18 TAR PC_AUDIO_L 0.1U 12 AUDIO_R AUDIO_L BINL BOUTL TRL VS GND AUDIO_L BINR BOUTR 2 BEAD V12_A BEAD 2 D9 9.1V L19 1 R125 L16 2 Q12_B C142 4.7U 35V 1 õ 2 0.1U 25V Z 10 10 9 11 17 20 0.1U 47U 25V TRL_A C145 R122 1 2700P 50V K U26_B 25V Z C146 0.1U 25V Z C141 õ Q12_C 2 C140 1 C139 R123 4.7K 3 2 2 1 Q12_E 2N3904 2 Q12 BILL WJ CHANG E 10 of 12 Approved By T.S.WU 6 9 5 3 1 C160 10U õ 9 U27 L22 BEAD TX.DL_A TX.DL 25V Z TX.DL V+ 1 3 C1_A 25V Z C2_A 1 4 4 2 2 E 6 10 L23 BEAD RX.DL_A 2210252001 D VDD 4 5 C RX.DL 232V- 232V- RX.DL C161 0.1U C1_B C162 0.1U C2_B C158 C159 C164 C165 R 2IN C166 100P 25V K 100P 25V K 0.1U 25V Z 0.1U 25V Z 0.1U 25V Z 1 2 3 4 5 6 7 8 C1+ V+ C1C2+ C2VT2OUT R2IN 16 15 14 13 12 11 10 9 VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT 4 25V 2 10 7 8 J7 7 B 8 A TX.DL RX.DL RXD_A R134 1K TX.DL RX.DL RXD TXD R135 2K SP232ECN V+ 2 2 DN22 DN23 3 3 BAV99 3 74AHCT14DB U28A 47 2 1 U28_1 R137 47 U28_4 7 R136 4 3 7 VD D 232V- 14 VDD 1 1 BAV99 14 3 U29 C169 4.7U 25V 1 2 2 0.1U 25V Z 1 6 7 10 2 9 8 C171 Q13_C 0.1U 25V Z VSS KI0 KI1 KI2 KI3 K01 K02 DSW NC USBMD Iclk Idata DD+ 19 18 17 16 15 14 13 11 D11 Q13 1 0.1U25V Z Q13_B R138 1 VUSB 2N3904 C173 0.1U 25V Z R139 20K 1N4148 2 MC68HC908JB8 D12 D13 VUSB USB_DUSB_D+ BEAD BEAD BEAD D14 47P 47P 0.1U 10U 50V J 50V J 25V Z 25V 2 5.1V 1 1 1 5.1V C176 R142 õ L27 BEAD 4.7K R141 20K VUSB USB_DUSB_D+ USB_X2 10M C174 20P 50V J USB_X1 C175 20P 50V J Project Code GND Title C180 0.1U 25V Z Size PCB P/N <Size> 48.J3402.S03 C D OEM/ODM Model Name NA 1 MAIN BD PCB Rev. Document Number S03 R ev . 1 304-C02 Tues day, May 21, 2002 Sheet Prepared By Reviewed By ANGEL HU B Model Name DX660 99.J3477.001 VUSB_A Date: A 20K VUSB_A 2 6MHZ 2 L24 L25 L26 5.1V USB_GND RST_A Y5 ¾» C177 C178 C179 1 20 R140 USB_V USB_D-A USB_D+A 2 6 »´ § ò 1 6 7 2 2 2 7 3 1 2210218201 ̸» ¬®¿½» ©·¼¬¸ ±º ¬¸·- °±®¬·±² -¸±«´¼ ¹®»¿¬»® ¬¸¿² îë ³·´ò 3 5 4 5 8 4 J8 8 1 ̸»-» °¿®¬- ±º ¬¸·- °±®¬·±² -¸±«´¼ ¾» ½±²²»½¬»¼ ½´±- RST C172 2 USB_DUSB_D+ 12 3 0.1U 25V Z data C170 2 5.1V õ 10U 25V VDD VR 74AHCT14DB U28B X2 C168 5 4 3 D10 1 2 1 VR_A C167 õ X1 VUSB VUSB REMOTE_IR BILL WJ CHANG E 11 of 12 Approved By T.S.WU A B C D E 4 4 3 3 Screw Holes Ñ°¬·½¿´ ¬-б·² 2 9 5 4 8 3 7 4 8 3 7 2 6 2 6 1 5 1 9 1 5 1 GND 9 5 4 8 4 8 3 7 3 7 2 6 2 6 H3 H4 H5 H6 HOLE-V8 HOLE-V8 HOLE-V8 HOLE-V8 9 OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP OP8 OP OP9 OP OP10 OP OP11 OP OP12 OP OP13 OP OP14 OP 2 Project Code Model Name DX660 99.J3477.001 1 Title OEM/ODM Model Name NA Size PCB P/N <Size> 48.J3402.S03 PCB Rev. Document Number S03 ANGEL HU B C D R ev . 304-C02 Tues day, May 21, 2002 Date: Sheet Prepared By Reviewed By A 1 MAIN BD BILL WJ CHANG E 12 1 of 12 Approved By T.S.WU 5 4 3 2 1 C WS PEED OPDI ODE TP8 E1 DPF2A DD[0:63] DMD_DCLK 80_Pin_Conn*2 DD[0:63] DD[0:63] DD[0:63] DMD_DC LK DMD_DCLK DMD_DCLK DD[0:63] DMD_DCLK SDRAM SDD A[0..31] SDD A[0..31] SDD A[0..31] SDD B[0..31] SDD B[0..31] D SDD B[0..31] SDA_MCLK SD A_MCLK SDA_MCLK SDB_MCLK SD B_MCLK SDB_MCLK SDA _MCSZ SD A_MC SZ S DA_MCSZ SDB _MCSZ SD B_MC SZ LOAD16 UROW ENZ DMDACLK DMDMODE0 DMDMODE1 COMP LSET LOA DZ S AC_BUS LOAD16 UROW ENZ DMDACLK DMDMODE0 DMDMODE1 COMP LSET LOA DZ S AC_BUS D VC C2 VB IA S VCC 2 VBIAS S DB_MCSZ P3P3V CWY 3 CWY 2 CWY 1 CWCTR P3P3V 06_SDRAM DMDVCC DMDVCC MBRST0 1 E1 MBRST7 1 E1 MBRST[0:14] TP22 TP23 TP9 E1 11_80_Pin_Conn_2 U5_Relateds K SR16C FPGA_TDO FPGA_TDO U6 PBDATA1 PB CLKZ PBDATA1 TCK PB CLKZ TMS S R16ADR2 S R16ADR3 S R16ADR3 SR16SEL0 SR16SEL0 SR16SEL1 SR16SEL1 SR16MOD0 VB IA S VC C2 VBIAS VCC 2 SR16MOD0 SR16MOD1 SR16MOD1 VRST SR 16STRO S R16STRO U5 MSMPLE VRST C SR 16CV CC SR 16V CCE TFIELD TCK VN EGSE N DMDVCCE N 1 E1 TP6 TP5 S R16VCCE E1 SR 16CV CC DMDVCCEN VRST VRST S R16VCCE V NEGSEN V NEGSEN DMDVCC TCK TMS TP7 TP4 DMDVCCEN FPGA DCLK TFIELD 1 E1 1 E1 RESE T_Device_B WSMPL FPGA DCLK TFIELD MBRST[0:14] S R16ADR1 S R16ADR2 10_KSR16C CTMRDY W SMPL FPGAD CLK S R16ADR0 S R16ADR1 MALSY NC MSMPLE WS MPL S R16ADR0 DS TART CTMRDY MSMPLE SR16STRO MOENZ MALSY NC CTMRDY SR 16MOD1 MRSEL12Z DSTA RT MALSYNC PBDATA0 SR 16MOD0 MRCMD1 MOENZ DSTA RT SR 16SE L1 MRCMD0 MRSEL12Z MOE NZ P3P3V PBDATA0 MWCMD0 MRCMD1 MRSE L12Z VDD SR 16SE L0 MWCMD0 MRCMD1 SR 16A DR3 MWCMD1 MRCMD0 MRCMD0 SR 16A DR2 P LLRSTZ MWCMD1 MWCMD0 C SR 16A DR1 SYS RSTZ P LLRSTZ PLLRSTZ MWCMD1 SR 16A DR0 DW SC BD SYS RSTZ SYS RSTZ P3P3V VDD FPGA_TDO DW SC BD DWS CB D VN EGRAI L TMS DMDVCC RESE T_Device_A VNE GRAIL V NEGRAIL VDD PB IRQ VDD 08_RESE T_Device 05_DPF2A TP3 TP2 TP1 E1 E1 E1 RESE T_Device_C TP18 E1 VP BS EN VC C2EN BI NBEN B VS YNCZ BIN CEN BIN DEN 120P IN_Connector&Peripherals P OWER ON SY NCVA LID OPDI OD E C WSPEED LAMPE N LAMPSY NC LAMPLIT PB IRQ CWI NDEX 01_120P IN_Connector&Peripherals P12V VDD VS YNCZ POWERON SY NCVA LID P OWERON SY NCVA LID LAMPEN BI NEEN VPBSEN VC C2EN BI NBEN VB IA S VC C2EN VC C2 BI NBEN BIN CEN BIN DEN VBIAS VC C2 VP OSRAIL VP OSRA IL BIN CEN P12V P12V V POSRAIL B VDD BIN DEN BI NEEN BI NEEN VDD P 12V LAMPEN LAMP SYNC VPBSEN P12V 07_RESE T_D evice_A 09_RE SET_Dev ice_C LAMPS YNC LAMPLIT P3P3V LAMPLIT CW INDEX C WINDEX RE SETZ P 3P3V RE SETZ P3P3V TP16 1E1 E1 TP17 E1 E1 E1 E1 E1 1 E1 1 E1 1 E1 02_U 5_Relateds 1E1 TP15 TP13 TP11 TP14 TP12 TP10 TP19 TP20 TP21 CPU&MotorDriver Flash P3P3V P12V VDD PB CLKZ PB DATA1 PB DATA0 VDD A PB IRQ P BCLKZ PBDATA1 P 3P3V PBDATA0 PB IRQ A 03_Flash P12V 04_CPU& MotorDriver CWY 3 CWY 2 CWY 1 CWCTR Project Code Title PB IRQ PB CLKZ PBDATA1 PBDATA0 Size A3 Date: 99.J3477.001 DX660 DMD BD Document Number 48.J3401.S03 304-C03 Wednesday, April 17, 2002 Sheet Prepared By Reviewed By AN GEL HU 5 4 3 2 BI LL WJ CHANG 1 FA B:S03 1 of 12 Approved By H.C.TS OU Rev 1 5 4 3 2 1 BU[0..7] RV[0..7] GY[1..8] JR1 GY7 D GY5 GY3 GY1 RV7 RV5 RV3 RV1 BU7 BU5 BU3 BU1 CLKIN CLKIN ACTDATA ACTDATA C VSYNCZ CWINDE X VSYNCZ CWINDE X POW ERON RESETZ POW ERON RESETZ P3P3V P3P3V C3 õ B C120 22U 10V .047U 50V K 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 FM-6038LM U45 GY8 GY6 D VDD GY4 R189 GY2 IRV CC 47 C117 C118 4.7U 16V Z 0.1U 25V Z RV6 IRR CVR2 RV4 RV2 RV0 BU6 BU4 From CW Sensor 20.L2021.003 BU2 BU0 CWSPE ED 5V_SENSOR HSYNCZ SYNCVALID LAMPEN LAMPLIT LAMPSYNC R106 75K SYNCVALID LAMPEN LAMPLIT LAMPSYNC SCL SDA R107 2K R104 6.8 K C151 10P J 10K OPDIODE C C150 0.1U 25V Z IRR CVR2 180 10K R190 SCL SDA IRR CVR2 R180 R105 HSYNCZ VSYNCZ RX10 U15 VDD VDD C50 4.7U Z OUTPUT 2 V+ 3 C121 .047U 50V K C149 0.1U 25V Z R108 47K 1 V- INP UT+ INP UT- 5 CX5 2 1000P J 3 A VCC 5 Y 4 B GND CWINDE X 74AHC1G32 4 LMC7225 330K P12V P12V õ C1 3.3U 35V B C2 .047U 50V K VDD F5 C181 .047U 50V K A 5V_SENSOR BEAD C122 4.7U 16V Z C183 .047U 50V K A Project Code Power Supply noly for CW Sensor Title Size A3 1 page is modified all Date: 4 3 2 99.J3477.001 DX660 DMD BD Document N umber 304-C03 48.J3 401.S03 W ednesday, April 17, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 VDD U15A 1 R102 1M BILL WJ CH ANG 1 FAB:S 03 2 of 12 Approved By H.C.TSOU Rev 1 5 4 3 2 1 P3P3V P3P3V C28 C29 C30 C31 C32 C33 C34 C35 .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K C24 C25 C26 C27 .047U 50V K .047U 50V K .047U 50V K .047U 50V K SEQADR[0..17] D D SEQDATA[0..7] TO FLASH SR16VCCE DMDVCC EN VNEGSEN SEQDATA0 SEQDATA1 SEQDATA2 SEQDATA3 SEQDATA4 SEQDATA5 SEQDATA6 SEQDATA7 MALSYNC CTMRDY MSMPLE WSMPL To U6 C 1 4 2 3 BIN SEL1 BIN SEL0 SW1 62.40019.001 R111 CWINDE X LAMPLIT VSYNCZ CW SPIN SYNCVALID HTST_PNT R109 2K 2K SYNCVAL R110 P3P3V FPGADCLK TFIELD PBDATA1 PBCLKZ To U6 10K R148 10K FL_RSTZ R24 10K XPROGEN SYSRSTZ 2K RESETZA POW ERGOOD 1K R112 RESETZ POW ERGOOD TCK 1MHWBINSE L OE R23 R40 From CPU CWINDE XA R25 10K TDI R26 10K INIT TMS P3P3V B P3P3V P3P3V P3P3V R115 2K R114 2K PWRG OOD 1 POW ERGOOD Q26 MMBT2222A R116 PARK_A POW ERON 1 Q25 MMBT2222A 151 147 138 132 128 122 113 109 60 59 31 42 141 140 126 163 167 40 46 164 47 100 36 120 57 116 133 137 56 48 50 150 152 110 115 114 9 8 17 123 77 108 26 55 78 106 130 154 183 205 2 14 25 37 49 67 79 90 101 119 131 142 160 171 182 194 SEQD0 SEQD1 SEQD2 SEQD3 SEQD4 SEQD5 SEQD6 SEQD7 SR16VCCEN SR16STROBE SR16OENZ SR16MODE1 SR16MODE0 SR16SEL1 SR16SEL0 SR16ADDR3 SR16ADDR2 SR16ADDR1 SR16ADDR0 DMDVCC EN VCC2SEN VPBSEN VNEGSEN BIN A BIN B BIN C BIN D MALSYNC CTCRDY MSM PLE W SMPLE BIN SEL1 BIN SEL0 CW SPIN CWINDEX LAMPLIT VSYNCZ RDY/BSYZ SYNCVAL HTSTPNT SDRCLK TFIELD HW BINSE L OE SPARE_INO RS HPRSTZ M2 M1 M0 PBDATA1 PCLKZ SYSRSTZ RESETZ PWRG OOD TCK TDI TMS CSO INIT PROBRAM Z VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 U5 2500911 SYSRSTOZ PLLRSTZ HVSYNCZ HRST CWR STZ LAMPSYNC LAMPEN PBDATA0 CK2M CK10M CK14M FPGATP2 ROM_OE Z ROM _WEZ CWINDEXO MW CM D1 MW CM D0 MRCM D1 MRCM D0 MR SEL12Z MOENZ DSTART DWSC BD RASAZ CASAZ W ENAZ DQMA RASBZ CASBZ W ENBZ DQMB CKE MODE1 MODE0 ACLK LOADZ LOAD16 COMP LSET SAC_BUS SAC_EN LROW ENZ UROW ENZ SPARE 172 202 201 189 188 193 192 198 197 196 195 170 173 176 177 143 144 145 146 SR16VCCE SR16STRO To Page 8 SR16STRO SR16MOD1 SR16MOD0 SR16SEL1 SR16SEL0 SR16ADR3 SR16ADR2 SR16ADR1 SR16ADR0 DMDVCCEN SR16MOD1 SR16MOD0 SR16SEL1 SR16SEL0 SR16ADR3 SR16ADR2 SR16ADR1 SR16ADR0 To KSR16C VCC2EN VPBSEN VNEGSEN BIN A BIN B BIN C BIN D LAMPSYNC(TO INPUT) 111 SYSRSTZ 44 38 136 135 LAMPSYNC R205 2K 169 168 149 127 129 134 R28 1K 39 45 41 43 28 27 24 23 29 30 21 22 75 76 80 81 95 96 97 98 99 DMDMODE1A 13 DMDMODE0A 12 DM DACLKA 7 LOADZA 6 15 LOAD16A 5 16 COMPA 6 18 LSETA 7 19 SAC_BUSA 8 20 RP4 11 UROW ENZA R202 10 139 To Page 9 BIN BEN BIN CEN BIN DEN BIN EEN R27 C SYSRSTZ PLLRSTZ PBDATA0 H_VSYNCZ HRSTZ INDEXOUT 2K LAMPEN CK2P33M CK9P33M1 CK14MC1 ROM_OEZ ROM_WEZ MWCMD1 MWCMD0 MRCMD1 MRCMD0 MRSEL12Z MOENZ DSTART DWSC BD RASAZ CASAZ W ENAZ DQMA RASBZ CASBZ W ENBZ DQMB CKE 5 6 7 8 RP34 3 2 1 47 47 TO FLASH TO U6 B TO SDRAM 4 3 2 1 DMDMODE1 DMDMODE0 DM DACLK LOADZ 47 TO DMD LOAD16 COMP LSET SAC_BUS UROW ENZ P6B5 2K TO CPU TO U6 FPGA_TDO A P3P3V R22 A 10K Project Code Title SDAB[0..11] SDAA[0..11] Size A3 TO SDRAM Date: DX660 DMD BD Document N umber 304-C03 4 3 2 48.J3 401.S03 W ednesday, April 17, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 99.J3477.001 BILL WJ CH ANG 1 FAB:S 03 3 of 12 Approved By H.C.TSOU Rev 1 5 4 3 2 1 D D SEQDATA[0..7] FROM U5 SEQADR[0..17] U4 FROM U5 C ROM_OEZ ROM_WEZ P3P3V R101 10K SEQADR17 SEQADR16 SEQADR15 SEQADR14 SEQADR13 SEQADR12 SEQADR11 SEQADR10 SEQADR9 SEQADR8 SEQADR7 SEQADR6 SEQADR5 SEQADR4 SEQADR3 SEQADR2 SEQADR1 SEQADR0 6 10 11 5 4 12 1 31 2 3 13 14 15 16 17 18 19 20 FLRESET 32 7 9 30 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 SEQDATA7 SEQDATA6 SEQDATA5 SEQDATA4 SEQDATA3 SEQDATA2 SEQDATA1 SEQDATA0 29 28 27 26 25 23 22 21 P3P3V P3P3V GND 8 24 P3P3V DE WE RESET CE C C36 .047U 50V K AT49LV002NT-12TC Screw Holes Ñ°¬·½¿´ б·² ¬- B 5 9 5 9 5 9 5 9 4 8 4 8 4 8 4 8 3 7 3 7 3 7 3 7 2 6 2 6 2 6 2 6 H1 H2 H3 H4 HOLE-V8 HOLE-V8 HO LE-V8 HO LE-V8 OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP OP8 OP OP9 OP OP10 OP OP11 OP OP12 OP OP13 OP OP14 OP B A A Project Code Title Size A3 Date: DX660 DMD BD Document N umber 304-C03 4 3 2 48.J3 401.S03 W ednesday, April 17, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 99.J3477.001 BILL WJ CH ANG 1 FAB:S 03 4 of 12 Approved By H.C.TSOU Rev 1 5 4 3 2 1 P12V VDD D D C4 .047U 50V K TOP VIEW 3 C5 .047U 50V K C6 .047U 50V K C11 .047U 50V K õ C12 .047U 50V K C123 3.3U 35V C164 1U 50V Z C165 1U 50V Z C166 1U 50V Z P12V P12V D4 BAT54 1 2 RB717F BAT54SWT1 VDD 3 F2 VDD B EAD A LVDD R15 D3 RB 717F D3A R5 10K VDD C9 .047U 50V K U9 2 1 R8 10K C7 C140 .047U 50V K .047U 50V K MD0 FL_MODE1 FL_VPP R98 R99 C 1K 1K CFG1 CFG0 VDD Motor Pole R99 Open R2 R3 2K 2K From U5 U6 PBDATA0 HRE SETZ CK14M From U5 HRE SETZ NMIZ CK14M CK2P33M H_VS YNCZ INDEXOUT CWTAC H SD A SC L From INPUT R21 R4 R6 560F 560F 2K R1 10K R7 10K 29 47 8 73 12 56 38 5 4 7 79 78 69 68 67 66 65 37 36 35 34 33 32 31 30 10 1 6 3 21 23 24 25 13 80 14 15 16 17 18 19 20 52 AV CC VC C2 VC C1 V SS 3 V SS 2 V SS 1 A VS S MD0 MD1 STBYZ/FVPP P8-5/RDX 1 P8-4/TX D1 P3-4/D4 P3-3/D3 P3-2/D2 P3-1/D1 P3-0/D0 P7-7 P7-6 P7-5 P7-4 P7-3 P7-2 P7-1 P7-0 P5-1/RX D0 RE SZ NMIZ EX TA L P6-0/FTCI P6-2/CAP TA P6-3/CAPTC P6-4/CAPTC P9-7/SD A P8-6/SC L P9-6 P9-5 P9-4 P9-3 P9-2/IRQ0 P9-1 P9-0 P2-3/A 11 P3-5/D5 P3-6/D6 P3-7/D7 P8-0/HA 0 P8-1/GA 20 P8-2/CSIZ P8-3/IORZ P1-0/A 0 P1-1/A 1 P1-2/A 2 P1-3/A 3 P1-4/A 4 P1-5/A 5 P1-6/A 6 P1-7/A 7 P2-0/A 8 P2-1/A 9 P2-2/A 10 P2-4/A 12 P2-5/A 13 P2-6/A 14 P2-7/A 15 P5-2/S CK0 P5-0/TX D0 XTAL P4-0/TMCI0 P4-1/TMD0 P4-2/TMRI0 P4-3/HIRQ11 P4-4/HIRQ P4-5/HIRQ12 P 4-6/PW 0 P 4-7/PW 1 P6-1/FTDA P6-6/IRQ6 P6-7/IRQ7 70 71 72 74 75 76 77 64 63 62 61 60 59 58 57 55 54 53 51 50 49 48 9 11 2 39 40 41 42 43 44 45 46 22 27 28 HTST_PNT CW SP IN R203 560F TO U5 CWY 3 U17 VDD C15 2700P K C8 4700P K C13 1U 50V Z 0.22U C16 50V K CK9P33M R11 3M CW SP INA MTRDATA MTRCLK MTRSELZ 1 15 CD2 2 CW D 3 CS T 4 BRAKE 11 CRE S 12 MFILT 13 14 CK9P33M 16 HRE SETZ_1 20 MTRSELZ 21 MTRCLK 22 MTRDATA 23 CD1 24 3 V BB VDD CD2 CW D CST BR AKE Z CRE S FILTER SECDRT OSC RES ETZ CSZ CLOCK OATAIN CD1 OUTA OUTB OUTC CWCTR1 5 8 9 10 OUTA OUTB OUTC CWCTR1 CWTACH 17 CWTAC H GNDA GNDB GNDC GNDD R20 1.5 CWY 2 CWY 2 D7 BAT54 6 7 18 19 C 3 C17A PB CLKZ PBDATA1 To U5 U6 5600P K C18 5600P 50V K C19 0.15U 25V K A8902 C17W R16 1.5 CWY 1 R118 1.5 CWCTR CWY 1 C17B 5600P K CWCTR D6 BAT54 VDD Ground Guard Protection 3 R100 2K R19 R217 P6-5/CAPTD CWY 3 D5 BAT54 P12V R204 1M 26 P6B5 HRE SETZ R12 R18 0 C21 C23 C22 1000P 50V J 150 1000P 50V J 1M 1000P 50V J 150 HRE SETZ From U5 R218 HD64F3334 VDD 1.5 R13 10K C10 .047U 50V K 150 RE SETZ PB IRQ From U6 C20 1000P 50V J Ò± ײ-¬¿´´ º±® ÜÈêêð ïî °±´»- ³±¬±® B B R98 YES YES NO R99 YES NO YES 8POLES 12POLES 16POLES VDD VDD VDD VDD C143 .047U 50V K R32 2K R29 2K HRE SETZ U8B HRE SETZ U8A CK14MC1 FROM U5 1 CK14M 2 74LVC14A CK14M TO CPU CK9P33M1 3 4 FROM U5 74LVC14A CK9P33M CK9P33M HRSTZ Q1 MMBT2222AWT1 1 FROM U5 A A Project Code Title Size A3 Date: 99.J3477.001 DX660 DMD BD Document Number 48.J3401.S03 304-C03 Wednesday, April 17, 2002 Sheet Prepared By Reviewed By AN GEL HU 5 4 3 2 BI LL WJ CHANG 1 FA B:S03 5 of 12 Approved By H.C.TS OU Rev 1 5 4 3 2 1 SDD A[0..31] TO U5 SDD B[0..31] CTMRDY TO SDRAM P3P3V P3P3V DD[0:63] D From U5 MWCMD1 MWCMD0 MRCMD1 MRCMD0 MRSEL12Z MOENZ D2A_MCSZ From U5 D2AMCKD2 DSTA RT DW SCB D D2A _DCLK DOZEN D2A_MCLK C52 4.7P 50V J D2A _DCLK DOENZ GY[1..8] RV[ 0.. 7] C BU[ 0.. 7]] TO U5 FROM INPUT From U5 CPU PBDATA1 PB CLKZ D2ATSENZ SYS RSTZ FPGA_TDO TRSTZ FROM U5 2K R201 2K D2ATSENZ TCK TMS TRSTZ R97 1K P LLRSTZ P LL_VDD PLLENZ LF CK58M PLLGND B PLL_VDD PLLENZ LF CK58M PLLGND MWCMD1 MWCMD0 MRCMD1 MRCMD0 MRSE L12Z MOE NZ MCSZ MCLK MCLKD2 DSTA RT DWS CB D DCLK DOENZ A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 FLDSE LOE Z FLDS YNC IV ALID OLACT HSYNC VS YNC WC LK DSDDA T7 DSDDA T6 DSDDA T5 DSDDA T4 DSDDA T3 DSDDA T2 DSDDA T1 DSDDA T0 OVA LID OSDACT P BP OL P BLK 1 P BLK 0 PB DT1 PC LK Z ICTS ENZ TEST RSTZ TD1 TCK TMS TRSTZ PLLRSTZ VC CA AP LLBNZ LF ADS CI GNDA TE ST2 U6 DP F2A A E8 AF7 AD 8 A E7 AF6 AC 8 AD 7 A E6 AF5 AC 7 AD 6 A E5 AF4 AC 6 AD 5 A E4 AC 5 AD 4 AC 3 A B4 AC 2 A B3 A A4 AC 1 A B2 A A3 Y4 A B1 A A2 Y3 W4 A A1 Y2 W3 Y1 W2 V3 W1 V2 U3 V1 T4 U2 T3 U1 T2 R4 T1 R3 R2 R1 P4 P3 P2 N2 N3 M1 M2 L1 M4 L2 K1 L3 K2 C1 D3 AC 15 A E16 E4 A E21 AF22 AF17 L25 M23 L26 K25 L24 U25 U26 T25 AD 10 AC 11 A E10 AF10 M25 DD63A 5 DD62A 6 DD61A 7 DD60A 8 DD59A RN1 DD58A DD57A DD56A DD55A 5 DD54A 6 DD53A 7 DD52A 8 DD51A RN3 DD50A DD49A DD48A DD47A 5 DD46A 6 DD45A 7 DD44A 8 DD43A RN5 DD42A DD41A DD40A DD39A 5 DD38A 6 DD37A 7 DD36A 8 DD35A RN7 DD34A DD33A DD32A DD31A 5 DD30A 6 DD29A 7 DD28A 8 DD27A RN9 DD26A DD25A DD24A DD23A 5 DD22A 6 DD21A 7 DD20A 8 DD19ARN11 DD18A DD17A DD16A DD15A 5 DD14A 6 DD13A 7 DD12A 8 DD11ARN13 DD10A DD9A DD8A DD7A 5 DD6A 6 DD5A 7 DD4A 8 DD3A RN15 DD2A DD1A DD0A 4 3 2 1 475 6 7 8 RN2 4 3 2 1 475 6 7 8 RN4 4 3 2 1 475 6 7 8 RN6 4 3 2 1 475 6 7 8 RN8 4 3 2 1 475 6 7 8 RN10 4 3 2 1 475 6 7 8 RN12 4 3 2 1 475 6 7 8 RN14 4 3 2 1 475 6 7 8 RN16 4 3 2 1 47 4 3 2 1 47 4 3 2 1 47 4 3 2 1 47 4 3 2 1 47 4 3 2 1 47 4 3 2 1 47 4 3 2 1 47 D C PB IRQ PBDATA0 WSMPL MALSYN C MSMPLE S DBMCSZ1 S DAMCSZ1 D2A MCSZ1 SDBMCLK1 R47 R48 R49 R50 47 47 47 47 SDAMCLK1 D2AMCLK1 D2AD CLK1 FPGA DCLK1 DMDDCLK1 R51 R42 R43 R44 R45 47 47 47 47 47 D2AMKD2A R46 47 DD[0:63] DD63 DD62 DD61 DD60 DD59 DD58 DD57 DD56 DD55 DD54 DD53 DD52 DD51 DD50 DD49 DD48 DD47 DD46 DD45 DD44 DD43 DD42 DD41 DD40 DD39 DD38 DD37 DD36 DD35 DD34 DD33 DD32 DD31 DD30 DD29 DD28 DD27 DD26 DD25 DD24 DD23 DD22 DD21 DD20 DD19 DD18 DD17 DD16 DD15 DD14 DD13 DD12 DD11 DD10 DD9 DD8 DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0 SDB _MCSZ SDA _MCSZ D2A_MCSZ SDB_MCLK SDA_MCLK D2A _MCSZ D2A_MCLK D2A _DCLK D2A MCKD2 D2A_MCLK D2A_DCLK FPGADCLK DMD_DCLK TO CPU From U5 CPU TO U5 TO SDRAM FROM U5 R200 TFIELD A CTDATA HSYNCZ VS YNCZ CLKIN A E19 AF20 AF19 AD 18 A E20 AD 19 D 2A _MCSZ AF21 D2A_MCLK R23 D 2A MCKD2 M26 A E13 AD 13 AF12 A E12 GY8 C4 GY7 D5 GY6 A3 GY5 B4 GY4 C5 GY3 D6 GY2 A4 GY1 B5 C6 D7 RV 7 A5 RV 6 B6 RV 5 D8 RV 4 A6 RV 3 B7 RV 2 C8 RV 1 A7 RV 0 B8 C9 D10 BU 7 A8 BU 6 B9 BU 5 C10 BU 4 A9 BU 3 D11 BU 2 B10 BU 1 C11 BU 0 A10 B11 D12 E2 D1 G4 OLACT E1 F3 E3 A11 H1 K4 J3 H2 G1 H3 G2 F1 G3 H4 AF15 AD 14 AC 14 AD 15 A E15 J1 K3 J2 AF18 AC 16 A E18 A E17 AC 10 P24 A E14 P25 R24 N25 DIG_PLLEN AF8 DD63 DD62 DD61 DD60 DD59 DD58 DD57 DD56 DD55 DD54 DD53 DD52 DD51 DD50 DD49 DD48 DD47 DD46 DD45 DD44 DD43 DD42 DD41 DD40 DD39 DD38 DD37 DD36 DD35 DD34 DD33 DD32 DD31 DD30 DD29 DD28 DD27 DD26 DD25 DD24 DD23 DD22 DD21 DD20 DD19 DD18 DD17 DD16 DD15 DD14 DD13 DD12 DD11 DD10 DD9 DD8 DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0 FSD16 PROPTST PBINT PB DT0 WS MPL MALSYNC MSMPL TDO MSC03Z MSC02Z MSC01Z AC LK5 AC LK4 AC LK3 AC LK2 AC LK1 AC LKD2A AC LKD2B AC LK D2C AC LK D2D AC LKD2E TO DMD TO U5 TO DMD B D2AMCKD2 R95 1K VDD VDD P3P3V C44 C45 C46 C47 C53 C56 .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U .047U 50V K 50V K PLL_VDD P3P3V F3 VD D58OSC 4 B EAD E N58OSC 1 A C37 .047U 50V K C39 .047U 50V K P3P3V R31 U3 VCC OUT OE GND 3 CK58MC1 2 CK58M F4 BEAD 47 58MHZ R30 C43 .047U 50V K POWERON POWERON PLLGND C57 C60 C59 C58 C61 C64 C63 C62 C68 C65 C66 C67 C72 C69 C70 C71 C51 C48 C49 .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K P LL_VDD P3P3V PLLGND TRSTZ .047U 50V K LF1 1K VDD C54 C42 PLL_VDD CK58M C55 C40 0.033U 25V K R33 47 R34 1K C41 680P 50V J TRSTZ DOENZ R38 1K DOZEN PLLE NZ PLLE NZ R37 10K R36 10K R35 1K D2ATSENZ TCK LF TMS LF A R39 10K TMS Ground Protection D2ATSENZ Project Code TCK TO U5 Title Size A3 Date: 99.J3477.001 DX660 DMD BD Document N umber 48.J3401.S03 304-C03 Wednesday, April 17, 2002 Sheet Prepared By Reviewed By AN GE L HU 5 4 3 2 BI LL WJ CHA NG 1 FAB :S03 6 of 12 Approved By H.C.TS OU Rev 1 5 4 3 2 1 P3P3V P3P3V C75 C76 C77 C78 C79 C80 .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K C85 C86 C87 C88 C89 C90 .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K D D P3P3V P3P3V P3P3V SDDB[0..31] SDAA[0..11] SDDA[0..31] TO U5 SDAA0 SDAA1 SDAA2 SDAA3 SDAA4 SDAA5 SDAA6 SDAA7 SDAA8 SDAA9 SDAA10 SDAA11 C 25 26 27 60 61 62 63 64 65 66 24 22 23 16 71 28 59 TO U5 DQMA TO U6 TO U5 TO U6 68 67 17 18 19 20 SDA_MCLK CKE W ENAZ CASAZ RASAZ SDA_MCSZ 14 21 30 57 69 70 73 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP BA0 BA1 DQM0 DQM1 DQM2 DQM3 U22 K4S643232C-70 CLK CKE WE CAS RAS CS NC1 NC2 NC3 NC4 NC5 NC6 NC7 2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56 SDDA0 SDDA1 SDDA2 SDDA3 SDDA4 SDDA5 SDDA6 SDDA7 SDDA8 SDDA9 SDDA10 SDDA11 SDDA12 SDDA13 SDDA14 SDDA15 SDDA16 SDDA17 SDDA18 SDDA19 SDDA20 SDDA21 SDDA22 SDDA23 SDDA24 SDDA25 SDDA26 SDDA27 SDDA28 SDDA29 SDDA30 SDDA31 TO U6 SDAB[0..11] TO U6 SDAB0 SDAB1 SDAB2 SDAB3 SDAB4 SDAB5 SDAB6 SDAB7 SDAB8 SDAB9 SDAB10 SDAB11 TO U5 DQMB 16 71 28 59 SDB_MCLK 68 67 17 18 19 20 TO U5 TO U6 TO U5 TO U6 25 26 27 60 61 62 63 64 65 66 24 22 23 W ENBZ CASBZ RASBZ SDB_MCSZ CKE 14 21 30 57 69 70 73 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP BA0 BA1 U23 DQM0 DQM1 DQM2 DQM3 K4S643232C-70 CLK CKE WE CAS RAS CS NC1 NC2 NC3 NC4 NC5 NC6 NC7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 SDDB0 SDDB1 SDDB2 SDDB3 SDDB4 SDDB5 SDDB6 SDDB7 SDDB8 SDDB9 SDDB10 SDDB11 SDDB12 SDDB13 SDDB14 SDDB15 SDDB16 SDDB17 SDDB18 SDDB19 SDDB20 SDDB21 SDDB22 SDDB23 SDDB24 SDDB25 SDDB26 SDDB27 SDDB28 SDDB29 SDDB30 SDDB31 2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56 C B B P3P3V C74 .047U 50V K C73 .047U 50V K C84 .047U 50V K C83 .047U 50V K C82 .047U 50V K P3P3V C81 .047U 50V K C96 C95 C94 C93 C92 C91 .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K .047U 50V K A A Project Code Title Size A3 Date: DX660 DMD BD Document N umber 304-C03 4 3 2 48.J3 401.S03 W ednesday, April 17, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 99.J3477.001 BILL WJ CH ANG 1 FAB:S 03 7 of 12 Approved By H.C.TSOU Rev 1 5 4 3 2 1 C170 R144 40.2KF 4.7P 50V J D D Q27 IRFL9014PC R145 1MF VPOS4 R146 27 VPOS6 3 2 VPOSRAIL TO Page9 R149 Q28 UMT2907A U24 VDD 5 VDD õ C C171 3.3U 35V 4 VIN SW 1 GND 2 FB 3 SHDN D8 1 27K VPOS8 R150 27K 2 MBR0540T1 C174 D9 SW P12V B 1K C LT1613CS5 P12V õ C173 4.7U 50V Z 1 VPOS7 R147 C172 3.3U 35V VNEG1 L7 BEAD 2 4.7U Z 1 VNEGRAIL TO Page8 MBR0540T1 C175 4.7U Z B D10 1 2 MBR0540T1 3D 1G A 2S 2N2201 MQSF1P02LT1 3C 4D 4C 1 1B 2E 1G 2 D 3 S 1B2C 3E 2 2N2222A 2N2907 IRFL9014_SOT-223 FZT649 FZT849 MBR0540T1 SOD123 Project Code Title Size A3 Date: DX660 DMD BD Document Number 304-C03 4 3 2 A 48.J3401.S03 FAB:S03 Wednesday, April 17, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 99.J3477.001 8 BILL WJ CHANG of 12 Approved By H.C.TSOU 1 Rev 1 5 4 3 2 VDD 1 Q17 MMBF2202PT1 VDD VDD 3Q16 MGSF1P02LT1 2 2 DMDVCC 3 SR16CVCC To DMD To KSR16C D D DMDVCCEN FROM U5 R53 10K DVCCENC R52 1K DVCCENB 1 C138 4.7U 50V Z R55 Q2 MMBT2222A R54 SR16VCCE FROM U5 R56 1K SVCCENC 10K 1K SVCCENB Q3 MMBT2222A 1 R57 1K C C Q4 MMBT2222A 1 Q4A VNEGRAIL FROM Page7 R70 4.7 R65 27K U10 VREFN5 R63 100KF D1 3 õ 2 ó VNEGSEN R68 FROM U5 Q11 VNEGSENC 2 3 1K UMT2907A VNRSN6 10 Q10 1 UMT2907A R67 1K C98 3900P 50V K VRST BAV99 56 Q12A 1 2 BAV99 1 C156 3900P 50V K 4.7U Z 1U 50V Z B VNEGRAIL 3 Project Code 1 2 LM4040 1 2 BAV99RET1 SOT-23 Size A3 Date: 4 3 2 99.J3477.001 DX660 DMD BD Document Number 304-C03 A 48.J3401.S03 FAB:S03 Wednesday, April 17, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 C135 UMT2907A Q12 Title A C99 D14 R69 4.75KF VNEGRAIL 3 VRST0 20KF VNRSN5 TO KSR16C R120 D13 VNRSN7 R62 R64 4.7 R66 VNEGSENB 2 TLE2141 LM4040 B 6 1 9 BILL WJ CHANG of 12 Approved By H.C.TSOU 1 Rev 1 5 4 3 2 1 V POSRAIL From Page7 P12V C101 3900P 50V K R79 2K D Q18 FZT649 1 D VR EF5 D11 R76 27K D2 LM4040 R78 27K 2 1 BAV99 U11 VPBOPP VP BSENZ 1 3 2 Q5 MMBT2222A õ 6 R72 4.7 VBIAS0 VPBSN4 R71 10 VPBSN5 R75 4.7 ó TO KSR16C R121 VB IAS 56 D12 C100 C136 C159 3900P 50V K 4.7U Z 1U 50V Z TLE2141 R77 VPBSEN From U5 1K VPBSENB 1 1 Q6 MMBT2222A 2 BAV99 Q13 1 R84 1K UMT2907A VPBOPN R73 20KF R74 4.7KB VPBSN20 R80 866F R81 301F R82 576F R83 51.1F C C MMBF2201NT1 Q24 1 1 MMBF2201NT1 Q23 1 MMBF2201NT1 Q22 1 MMBF2201NT1 Q21 BI NBEN BIN CEN From U5 BIN DEN BI NEEN P12V B B P12V VR EF5 R85 27K .047U 50V K VC C2ENZ C103 .047U 50V K R90 27K C180 1 U12 VC C2REF 1 Q7 MMBT2222A 3 õ 2 ó Q19 FZT849 R93 6 VCC 2N 1 VC C2N2 10 R87 3.3 TLE2141 VCC 2N B1 VC C2EN From U5 TO KSR16C R122 R86 VCC 20 Q8 MMBT2222A R91 10 1K R92 1K 1 VCC 2 0 C102 C161 C137 õ .047U 1U 50V K 50V Z 3.3U 35V C105 4.7U 16V Z Q14 UMT2907A R89 VCC 2N 6 R88 4.02KF 2K F A A Project Code Title Size A3 Date: 99.J3477.001 DX660 DMD BD Document N umber 48.J3401.S03 304-C03 Wednesday, April 17, 2002 Sheet Prepared By Reviewed By AN GE L HU 5 4 3 2 BI LL WJ CHA NG 1 FAB :S03 10 of 12 Approved By H.C.TS OU Rev 1 5 4 3 1 u18 DMDKSR16C D 44 59 62 VDD1 VDD2 VDD3 75 71 67 34 30 26 15 11 7 VBIAS8 VBISA7 VBIAS6 VBIAS5 VBIAS4 VBIAS3 VBIAS2 VBIAS1 VBIAS0 78 77 73 69 64 37 32 28 24 23 17 13 9 5 VRST13 VRST12 VRST11 VRST10 VRST9 VRST8 VRST7 VRST6 VRST5 VRST4 VRST3 VRST2 VRST1 VRST0 79 66 65 36 35 22 18 4 VDFF7 VDFF6 VDFF5 VDFF4 VDFF3 VDFF2 VDFF1 VDFF0 SR16STRO SR16MOD1 SR16MOD0 SR16SEL1 SR16SEL0 54 46 45 48 49 STROBE MODE1 MODE0 SEL1 SEL0 SR16ADR3 SR16ADR2 SR16ADR1 SR16ADR0 53 52 51 50 A3 A2 A1 A0 55 OEZ SR16CVCC VBIAS CX1 C104 1U 4.7U Z 50V Z CX2 4.7U Z C 2 C176 1U 50V Z From Page 8 VRST CX3 4.7U Z C177 1U 50V Z From Page 9 VCC2 C178 1U 50V Z B From U5 U21 1 2 3 NC VDD 5 SR16CVCC 4 SR16OENZ GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT09 OUT08 OUT07 OUT06 OUT05 OUT04 OUT03 OUT02 OUT01 OUT00 D 3 19 21 38 39 41 42 43 47 56 57 58 60 63 80 MBRST[0:14] TO DMD RN17 33 31 29 27 25 16 14 12 MBRST14A MBRST13A MBRST12A MBRST11A MBRST10A MBRST9A MBRST8A 10 8 6 76 74 72 70 68 MBRST7A MBRST6A MBRST5A MBRST4A MBRST3A MBRST2A MBRST1A MBRST0A RN18 5 6 7 8 4 3 2 1 5 6 7 8 MBRST14 MBRST13 MBRST12 MBRST11 MBRST10 MBRST9 MBRST8 MBRST7 4 3 2 1 MBRST6 MBRST5 MBRST4 MBRST3 MBRST2 MBRST1 MBRST0 47 5 6 7 8 RN22 4 3 2 1 47 47 NC4 NC3 NC2 NC1 NC0 B 61 40 20 2 1 SR16CVCC VSS NC RES Project Code V6300L Title A Size A3 Date: 4 3 2 99.J3477.001 DX660 DMD BD Document Number 304-C03 A 48.J3401.S03 FAB:S03 Wednesday, April 17, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 C RN21 47 5 6 7 8 4 3 2 1 11 BILL WJ CHANG of 12 Approved By H.C.TSOU 1 Rev 1 5 4 3 2 1 DD[0:63] D C D J1 J2 C B B Project Code Title A Size A3 Date: DX660 DMD BD Document Number 304-C03 4 3 2 A 48.J3401.S03 FAB:S03 Wednesday, April 17, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 99.J3477.001 12 BILL WJ CHANG of 12 Approved By H.C.TSOU 1 Rev 1 5 4 3 2 1 D D FAN_CONTROL Page1 C C GND FAN_CONTROL GND Page1 B B Project Code Model Name DX660 99.J3877.001 A Title FAN CONTROL BD Size PCB P/N <Size> 48.J3405.S04 Date: 4 3 2 PCB Rev. Document Number S04 304-C05 Wednesday, May 01, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 OEM/ODM Model Name NA JOHN LIN 1 of 3 Approved By H.C.TSOU 1 Rev. 1 A 5 4 C1 0.1U 50V Z V12 R1 3 2 3.3V_F 51 3.3V_F C3 0.1U 50V Z V12 R3 51 C2 0.1U 50V Z V12 V12 R2 51 V12 8 FAN2_B 10 MAX6660AEEE R26 OVERT 11 FAN1_E ALERT 9 OVERT 3 50V K C8 4 2200P 8 FAN1_B FAN VCC 15 2 1 TACHIN STBY SDA VFAN 15 2 1 AGND MAX6660AEEE 0 ALERT DXN SDA 12 5 SMBCLK SMDATA DXP ALERT DXN AGND MAX6660AEEE PGND 2200P SMDATA FAN1_G ADD1 4 VCC DXP SCL OVERT 14 SCL 12 SDA D SCL SDA 11 ALERT 9 OVERT 7 50V K C9 OVERT FAN 3 SCL 14 ADD0 FAN2_E STBY FAN2_G ALERT SMBCLK 6 9 SDA 5 U2 16 FANSPIN1 PGND 11 TACHIN R9 5.1K 50V Z 1U 7 AGND OVERT SDA U3 16 FANSPIN2 VFAN 15 2 VCC VFAN DXN 12 50V Z 1U SCL ADD1 FAN3_B ALERT SCL ADD0 8 SMDATA DXP 14 6 2200P 10K 10K 10K 10K SMBCLK R11 5.1K 10 4 PGND 50V K C7 C6 7 3 FAN3_E FAN ADD1 5 FAN3_G TACHIN ADD0 16 FANSPIN3 STBY 1 C5 U1 6 50V Z 1U V12 R5 R6 R7 R8 R4 5.1K 10 C4 D 1 3.3V_F 3.3V GND J1 THERMAL_B VDD DOOR_LOCK C17 470U 1 2 3 4 5 6 7 8 9 10 FAN1_E FAN1_B 3.3V J4 R27 VDD_A SDA LOW_P MUT_OUT FAN_P LOW_P MUT_OUT FAN_P Q7 2N3904 1 AUDIO_OUT AUDIO_OUT MUT_OUT 1 C11 õ 10U <Spec> 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 C12 10U <Spec> 2 2 C15 10U <Spec> 470U R17 <Spec> 1K V12 FAN1_G FANSPIN1 1 2 2 C14 õ 10U <Spec> SDA 3.3K DOOR_LOCK õ J3 2 õ 2 4 6 8 10 12 14 2 CA1 0.1U K 1 2 C10 10U <Spec> SCL OVERT LAMPLIT LAMPENA THERMAL_B SCL OVERT LAMPLIT B LAMPENA THERMAL_B CA2 0.1U K V12 FAN1_G Q6 SI4431DY-T1 270 LAMPLIT VDD_A VDD R28 47K 3 R20 LOW_P DOOR_LOCK R19 Q3 SI4431DY-T1 8 7 6 5 47 4 1Q2 2N3904 3 2 1 VDD 3.3V R22 47K FAN_P R23 3 2 1 8 7 6 5 3.3V_F R24 1K 47 Project Code Model Name DX660 99.J3877.001 Title 4 LAMPENA OEM/ODM Model Name NA FAN CONTROL BD 2 A CON4 2 470U <Spec> 1 2 C20 J7 1 2 3 4 C 1 1 C19 220K RA2 20K J6 õ 1 3 5 7 9 11 13 V12 VDD_A <Spec> 2 RA1 1K C116 1000U <Spec> 3 õ R14 4.3K R15 B V12 1 0.22U VDD FAN3_E FAN3_B FANSPIN3 V12 FAN3_G 1 50V Z 0 J5 J8 C13 R13 2 FANSPIN2 AUDIO_OUT 5 4 3 2 1 õ V12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 V12 FAN2_G 1 J2 4 3 2 1 3.3V U4 1 C FAN2_E FAN2_B THERMAL_B IN1 VAOUT1 VOLUME VAOUT2 IN2 NC SVR SGND STBY MUTE PGND OUT2 VS OUT1 PGND 6 5 4 3 2 1 Size PCB P/N <Size> 48.J3405.S04 Date: 4 3 2 Document Number S04 304-C05 Wednesday, May 01, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 PCB Rev. JOHN LIN 2 of 3 Approved By H.C.TSOU 1 Rev. 1 A 5 4 3 2 1 D D C C Screw Holes Ñ°¬·½¿´ б·²¬- 9 5 4 8 3 7 4 8 3 7 2 6 2 6 1 5 1 9 5 1 1 GND 9 5 4 8 4 8 3 7 3 7 2 6 2 6 H1 H2 H3 H4 HOLE-V8 HOLE-V8 HOLE-V8 HOLE-V8 9 OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP OP8 OP OP9 OP OP10 OP OP11 OP OP12 OP OP13 OP OP14 OP B B Project Code Model Name DX660 99.J3877.001 A Title 4 3 2 PCB Rev. Document Number S04 304-C05 Wednesday, May 01, 2002 Sheet Prepared By Reviewed By ANGEL HU 5 NA A FAN CONTROL BD Size PCB P/N <Size> 48.J3405.S04 Date: OEM/ODM Model Name JOHN LIN 3 of 3 Approved By H.C.TSOU 1 Rev. 1 5 4 3 2 1 D D GND Page1 DMDMODE0 DMDMODE1 COMP LOADZ LOAD16 LSET SCA_BUS UROWENZ DMDMODE0 DMDMODE1 COMP LOADZ LOAD16 LSET SCA_BUS UROWENZ DMD_DCLK DMDACLK DMD_DCLK DMDACLK C CWCTR CWY3 CWY2 CWY1 CWCTR CWY3 CWY2 CWY1 OPDIODE CWSPEED OPDIODE CWSPEED DD[0:63] DMDMODE0 DMDMODE1 COMP LOADZ LOAD16 LSET SCA_BUS UROWENZ DMD_DCLK DMDACLK OPDIODE CWSPEED DD[0:63] MBRST0 MBRST1 MBRST2 MBRST3 MBRST4 MBRST5 MBRST6 MBRST7 MBRST8 MBRST9 MBRST10 MBRST11 MBRST12 MBRST13 MBRST14 02_80Pin_CONN*2 80Pin_CONN*2 B MBRST0 MBRST1 MBRST2 MBRST3 MBRST4 MBRST5 MBRST6 MBRST7 PAGE1 C CWCTR CWY3 CWY2 CWY1 MBRST[0:7] DD[0:63] DMDVCC VBIAS VCC2 GND GND GND XGA_DMD DMDVCC VBIAS VCC2 DMDVCC VBIAS VCC2 03_DMD B MBRST[0:7] Project Code A 99.J3477.001 A Title DX660 CHIP BD Size A3 Date: Document Number 304-C06 Saturday, April 27, 2002 Prepared By ANGEL HU 5 4 3 2 48.J3404.S02 FAB:S02 Sheet Reviewed By BILL WJ CHANG 1 1 of 4 Approved By T.S.WU Rev 0 5 4 3 DD49 DD51 DD50 DD47 DD43 DD45 DD41 DD44 DD35 DD38 DD32 DD34 DD29 DD31 DD33 DD37 DD28 DD30 DD24 DD21 DD16 DD18 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 J9 DD14 DD15 DD13 DD12 DD7 DD9 DD3 DD4 DD1 DD5 COMP MBRST11 MBRST10 MBRST9 MBRST14 MBRST13 MBRST12 DMDMODE0 DMDMODE1 DMD_DCLK LSET UROWENZ LOADZ LOAD16 SCA_BUS 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 DMDVCC MBRST2 MBRST3 MBRST0 MBRST1 MBRST8 MBRST4 MBRST5 MBRST6 MBRST7 VCC2 CWSPEED OPDIODE CWCTR CWY1 CWY2 CWY3 DD57 DD56 DD48 DD46 DD54 DD53 DD55 DD52 DD59 DD58 DD61 DD60 DD63 DD62 DD42 DD36 DD39 DD40 DD26 DD27 DD23 DD25 DD22 DD20 DD17 DD19 DD10 DD11 DD6 DD8 DD2 DD0 DMDVCC MBRST2 MBRST3 MBRST0 MBRST1 MBRST8 MBRST4 MBRST5 MBRST6 MBRST7 VCC2 CWSPEED OPDIODE CWCTR CWY1 CWY2 CWY3 4 B DMDVCC COMP MBRST11 MBRST10 MBRST9 MBRST14 MBRST13 MBRST12 DMDMODE0 DMDMODE1 DMD_DCLK LSET UROWENZ LOADZ LOAD16 SCA_BUS DMDACLK VBIAS GND DMDACLK VBIAS 5 3 2 2 1 D D DD[0:63] C C J8 GND B A Title Project Code DX660 CHIP BD Size A3 Date: ANGEL HU 99.J3477.001 304-C06 Saturday, April 27, 2002 Prepared By A Document Number 48.J3404.S02 FAB:S02 Sheet Reviewed By BILL WJ CHANG 1 2 of 4 Approved By T.S.WU Rev 0 5 4 3 2 1 D D DD[0:63] A46 B47 A48 B49 A50 B53 A54 B51 A52 C57 C55 C53 D52 C51 D50 C49 D48 C47 D46 C45 D44 C43 D42 C41 D40 C39 D38 C37 D36 C35 D34 C33 DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15 DD16 DD17 DD18 DD19 DD20 DD21 DD22 DD23 DD24 DD25 DD26 DD27 DD28 DD29 DD30 DD31 DD[0:63] VBIAS D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 VBIAS c115 4.7U 50V Z MBRST[0:7] MBRST[0:7] MBRST7 MBRST6 MBRST5 MBRST4 MBRST3 MBRST2 MBRST1 MBRST0 C J1 CWY3 CWY2 CWY1 CWCTR 4 3 2 1 CON_4P_S J2 3 2 1 CWSPEED DMDACLK DMDMODE1 DMDMODE0 LOAD16 UROWENZ SCA_BUS DMDACLK DMDMODE1 DMDMODE0 LOAD16 UROWENZ SCA_BUS B17 SOM_BIAS A18 B19 A20 B21 A22 B23 A24 B25 MBRST_7 MBRST_6 MBRST_5 MBRST_4 MBRST_3 MBRST_2 MBRST_1 MBRST_0 B39 A34 B41 A36 B37 A14 ACLK MODE1 MODE0 LOAD16 ROWENB SAC_BUS U1 CON_3P_S GND DMDVCC LOADZ DMDVCC LOADZ LSET COMP DMDDCLK 10K B45 B35 A38 A16 B15 B27 A56 D2 GND D30 GND D54 VCCA DSEL0 LOADB RE_WEB LSET COMP DCLK B13 B29 VCCD C29 VCC2A B1 VCC2C C B55 VCC2E C1 EVCC A26 C111 DMDVCC C112 .047U 50V K .047U 50V K C113 VCC2 C114 .047U 50V K .047U 50V K DMDVCC VCC2 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 LSET COMP DMD_DCLK R96 A2 GND GND SDOUT DMD1076 OPDIODE GND B DD32 DD33 DD34 DD35 DD36 DD37 DD38 DD39 DD40 DD41 DD42 DD43 DD44 DD45 DD46 DD47 DD48 DD49 DD50 DD51 DD52 DD53 DD54 DD55 DD56 DD57 DD58 DD59 DD60 DD61 DD62 DD63 D28 C27 D26 C25 D24 C23 D22 C21 D20 C19 D18 C17 D16 C15 D14 C13 D12 C11 D10 C9 D8 C7 D6 C5 B7 A6 B5 A8 B9 A10 B11 A12 B DD[0:63] DD[0:63] Project Code A 99.J3477.001 A Title DX660 CHIP BD Size A3 Date: Document Number 304-C06 Saturday, April 27, 2002 Prepared By ANGEL HU 5 4 3 2 48.J3404.S02 FAB:S02 Sheet Reviewed By BILL WJ CHANG 1 3 of 4 Approved By T.S.WU Rev 0 5 4 3 2 1 D D Screw Holes C 1 1 1 1 GND 9 5 9 5 9 5 4 8 4 8 4 8 4 8 3 7 3 7 3 7 3 7 2 6 2 6 2 6 2 6 5 H1 H2 H3 H4 HOLE-V8 HOLE-V8 HOLE-V8 HOLE-V8 9 C Ñ°¬·½¿´ б·²¬OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP OP8 OP OP9 OP OP10 OP OP11 OP OP12 OP OP13 OP OP14 OP B B Project Code A 99.J3477.001 A Title DX660 CHIP BD Size A3 Date: Document Number 304-C06 Saturday, April 27, 2002 Prepared By ANGEL HU 5 4 3 2 48.J3404.S02 FAB:S02 Sheet Reviewed By BILL WJ CHANG 1 4 of 4 Approved By T.S.WU Rev 0