Download LG 47LT760H-ZA User's Manual
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Internal Use Only North/Latin America Europe/Africa Asia/Oceania http://aic.lgservice.com http://eic.lgservice.com http://biz.lgservice.com LED LCD TV SERVICE MANUAL CHASSIS : LD2FF MODEL : 47LT760H 47LT760H-ZA CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL. P/NO : MFL67659804 (1210-REV00) Printed in Korea CONTENTS CONTENTS . ............................................................................................. 2 SAFETY PRECAUTIONS ......................................................................... 3 SERVICING PRECAUTIONS..................................................................... 4 SPECIFICATION........................................................................................ 6 ADJUSTMENT INSTRUCTION................................................................. 9 TROUBLESHOOTING GUIDE.................................................................. 17 BLOCK DIAGRAM.................................................................................... 26 EXPLODED VIEW .................................................................................. 27 SCHEMATIC CIRCUIT DIAGRAM .............................................................. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -2- LGE Internal Use Only SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer. General Guidance Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet. An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts. Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer. Leakage Current Hot Check circuit Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock. Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -3- LGE Internal Use Only SERVICING PRECAUTIONS CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First. General Servicing Precautions 1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board module or any other receiver assembly. b. Disconnecting or reconnecting any receiver electrical plug or other electrical connection. c. Connecting a test substitute in parallel with an electrolytic capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc". 3. Do not spray chemicals on or near this receiver or any of its assemblies. 4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10 % (by volume) Acetone and 90 % (by volume) isopropyl alcohol (90 % - 99 % strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required. 5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped. 6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed. 7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last. 8. Use with this receiver only the test fixtures specified in this service manual. CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver. Electrostatically Sensitive (ES) Devices Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor “chip” components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes 2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static type solder removal device. Some solder removal devices not classified as “anti-static” can generate electrical charges sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.) General Soldering Guidelines 1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500 °F to 600 °F. 2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead. 3. Keep the soldering iron tip clean and well tinned. 4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners. 5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature. (500 °F to 600 °F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuit board printed foil. 6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature (500 °F to 600 °F) b. First, hold the soldering iron tip and solder the strand against the component lead until the solder melts. c. Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil. d. Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush. -4- LGE Internal Use Only IC Remove/Replacement Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above. Removal 1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts. 2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC. Replacement 1. Carefully insert the replacement IC in the circuit board. 2. Carefully bend each IC lead against the circuit foil pad and solder it. 3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas). 3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures. Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered. At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections). "Small-Signal" Discrete Transistor Removal/Replacement 1. Remove the defective transistor by clipping its leads as close as possible to the component body. 2. Bend into a "U" shape the end of each of three leads remaining on the circuit board. 3. Bend into a "U" shape the replacement transistor leads. 4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection. Power Output, Transistor Device Removal/Replacement 1. Heat and remove all solder from around the transistor leads. 2. Remove the heat sink mounting screw (if so equipped). 3. Carefully remove the transistor from the heat sink of the circuit board. 4. Insert new transistor in the circuit board. 5. Solder each transistor lead, and clip off excess lead. 6. Replace heat sink. Diode Removal/Replacement 1. Remove defective diode by clipping its leads as close as possible to diode body. 2. Bend the two remaining leads perpendicular y to the circuit board. 3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4. Securely crimp each connection and solder it. 5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. 1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary). 2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. 3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection. 4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire. At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board. 1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens. 2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern. 3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges. Fuse and Conventional Resistor Removal/Replacement 1. Clip each fuse or resistor lead at top of the circuit board hollow stake. 2. Securely crimp the leads of replacement component around notch at stake top. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -5- LGE Internal Use Only SPECIFICATION NOTE : Specifications and others are subject to change without notice for improvement. 1. Application range This specification is applied to the LCD TV used LD23E chassis. 3. Test method 2. Requirement for Test Each part is tested as below without special appointment. 1) Performance: LGE TV test method followed 2) Demanded other specification - Safety : CE, IEC specification - EMC : CE, IEC - Wireless : Wireless HD Specification (Option) 1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C 2) Relative Humidity: 65 % ± 10 % 3) Power Voltage : Standard input voltage (AC 100-240 V~, 50/60 Hz) * Standard Voltage of each products is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 20 minutes prior to the adjustment. 4. Model General Specification No. 1 Item Market Specification Remarks DTV & Analog (Total 33 countries) DTV (MPEG2/4, DVB-T) : 33 countries (Albania/Austria/Belarus/Belgium/Bosnia/Bulgaria/Croatia/ Czech/Estonia/France/Germany/Greece/Hungary/Ireland/ Italy/Kazakhstan/Latvia/Lithuania/Luxembourg/Morocco/ Netherlands/Poland/Portugal/Romania/Russia/Serbia/ Slovakia/Slovenia/Spain/Switzerland/Turkey/UK/Ukraine) EU(PAL Market-33Countries) DTV (MPEG2/4, DVB-C) : 33 countries (Albania/Austria/Belarus/Belgium/Bosnia/Bulgaria/Croatia/ Czech/Estonia/France/Germany/Greece/Hungary/Ireland/ Italy/Kazakhstan/Latvia/Lithuania/Luxembourg/Morocco/ Netherlands/Poland/Portugal/Romania/Russia/Serbia/ Slovakia/Slovenia/Spain/Switzerland/Turkey/UK/Ukraine) 2 3 Broadcasting system Receiving system 1) PAL-BG 2) PAL-DK 3) PAL-I/I’ 4) SECAM L/L’, DK, BG, I Analogue VHF : E2 to E12, UHF : E21 to E69, CATV : S1 to S20, HYPER : S21 to S47 5) DVB-T 6) DVB-C Digital VHF UHF ► DVB-T - Guard Interval(Bitrate_Mbit/s) 1/4, 1/8, 1/16, 1/32 - Modulation : Code Rate QPSK : 1/2, 2/3, 3/4, 5/6, 7/8 16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8 64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8 Analog : Upper Heterodyne Digital : COFDM, QAM ► DVB-C - Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s - Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -6- LGE Internal Use Only No. Item Specification 4 Scart Input (1EA) 5 RS-232C 6 RGB Input (1EA) 7 HDMI Input (3EA) 8 9 Audio Input (1EA) SPDIF out (1EA) 10 USB (2EA) 11 12 13 Ethernet Connect(2EA) CI Slot(1EA) Clock LED Ext. Speaker out(1EA) Ext. Volume control(1EA) 14 Remarks Scart jack is Full scart and support ATV/DTV-Out (not support MNT-Out) PAL, SECAM SVC, Control, Power outlet (Selectable 12V/1A or 5V/2A) RGB-PC HDMI1-DTV HDMI2-DTV HDMI3-DTV RGB/DVI Audio SPDIF out EMF, DivX HD, For SVC (download) Ethernet Connect CI Clock LED Ext. Speaker out Ext. volume control Analog (D-SUB 15PIN) HDMI1 : ARC Support(HDMI Version 1.4) Support HDCP L/R Input JPEG, MP3, DivX HD WOL Support EU PPV CH. Support Clock Display Stereo 1W / 8Ω, Variable 5. RGB input (PC) No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 1 720*400 31.468 70.08 28.321 2 640*480 31.469 59.94 25.17 VESA 3 800*600 37.879 60.31 40.00 VESA 4 1024*768 48.363 60.00 65.00 VESA(XGA) 5 1360*768 47.72 59.8 84.75 WXGA 6 1920*1080 66.587 59.93 138.625 WUXGA Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes Remark For only DOS mode -7- Input 848*480 60Hz, 852*480 60Hz → 640*480 60Hz Display FHD model LGE Internal Use Only 6. HDMI Input 6.1. DTV mode No. Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Proposed 1. 720*480 31.469 / 31.5 59.94 / 60 27.00/27.03 SDTV 480P 2. 720*576 31.25 50 54 SDTV 576P 3. 1280*720 37.500 50 74.25 HDTV 720P 4. 1280*720 44.96 / 45 59.94 / 60 74.17/74.25 HDTV 720P 5. 1920*1080 33.72 / 33.75 59.94 / 60 74.17/74.25 HDTV 1080I 6. 1920*1080 28.125 50.00 74.25 HDTV 1080I 7. 1920*1080 26.97 / 27 231.97 / 24 74.17/74.25 HDTV 1080P FHD model 8. 1920*1080 33.716 / 33.75 29.976 / 30.00 74.25 HDTV 1080P FHD model 9. 1920*1080 56.250 50 148.5 HDTV 1080P FHD model 10. 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50 HDTV 1080P FHD model Proposed 6.2. PC mode No. Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) 1. 720*400 31.468 70.08 28.321 Proposed 2. 640*480 31.469 59.94 25.17 VESA HDCP 3. 800*600 37.879 60.31 40.00 VESA HDCP 4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP HDCP 5. 1360*768 47.72 59.8 84.75 WXGA HDCP 6. 1280*1024 63.595 60.0 108.875 SXGA HDCP / FHD model 7. 1920*1080 67.5 60.00 138.625 WUXGA HDCP / FHD model Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -8- LGE Internal Use Only ADJUSTMENT INSTRUCTION 1. Application Range 3.1.3. Adjustment method 2. Designation 3.2. MAC address D/L, CI+ D/L (1) Adjustment method - Don’t need to adjust ADC because there is data in OTP and adjusted initially. This spec. sheet applies to LD2FF Chassis applied LCD TV all models manufactured in TV factory. (1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of 25 °C ± 5 °C of temperature and 65 % ± 10 % of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep AC 100-240 V~, 50/60 Hz. (5) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15. In case of keeping module is in the circumstance of 0 °C, it should be placed in the circumstance of above 15 °C for 2 hours. In case of keeping module is in the circumstance of below -20 °C, it should be placed in the circumstance of above 15 °C for 3 hours. 3.2.1. Equipment & Condition 1) Play file: keydownload.exe 3.2.2. Communication Port connection 1) Key Write: Com 1,2,3,4 and 115200 (Baudrate) 2) Barcode: Com 1,2,3,4 and 9600 (Baudrate) 3.2.3. Download process 1) Select the download items. 2) Mode check: Online Only 3) Check the test process - DETECT -> MAC -> CI+ 4) Play: START 5) Check of result: Ready, Test, OK or NG 6) Printer Out (MAC Address Label) 3.2.4. Communication Port connection Connect: PCBA Jig → RS-232C Port== PC → RS-232C Port [Caution] When still image is displayed for a period of 20 minutes or longer (Especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area. 3. MAIN PCBA Adjustments 3.1. ADC Calibration 3.2.5. Download 3.1.1. Overview ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device and to compensate RGB deviation. 3.1.2. Equipment & Condition (1) USB to RS-232C Jig (2) M SPG-925 Series Pattern Generator (MSPG-925FA, pattern - 65) - Resolution :1080P Comp1 1920*1080 RGB - Pattern : Horizontal 100% Color Bar Pattern - Pattern level : 0.7 ± 0.1 Vp-p - Image Play: Start 3.2.6. Inspection - In INSTART menu, check these keys. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes -9- LGE Internal Use Only 3.3. LAN Inspection 3.5. Model name & Serial number Download 3.3.1. Equipment & Condition 3.5.1. Model name & Serial number D/L Press "Power on" key of service remote control. (Baud rate : 115200 bps) ▪ Connect RS232 Signal Cable to RS-232 Jack. ▪ Write Serial number by use RS-232. ▪ Must check the serial number at Instart menu. ▪ Each other connection to LAN Port of IP Hub and Jig ▪ 3.5.2. Method & notice (1) Serial number D/L is using of scan equipment. (2) Setting of scan equipment operated by Manufacturing Technology Group. (3) Serial number D/L must be conformed when it is produced in production line, because serial number D/L is mandatory by D-book 4.0. 3.3.2. LAN inspection solution ▪ LAN Port connection with PCB ▪ Network setting at MENU Mode of TV(Instart -> menu -> Network Setup) ▪ Setting automatic IP ▪ Setting state confirmation → If automatic setting is finished, you confirm IP and MAC Address. * Manual Download (Model Name and Serial Number) If the TV set is downloaded by OTA or service man, sometimes model name or serial number is initialized.(Not always) It is impossible to download by bar code scan, so It need Manual download. 1) Press the "Instart" key of Adjustment remote control. 2) Go to the menu "7.Model Number D/L" like below photo. 3) Input the Factory model name(ex 42LT760H-ZA) or Serial number like photo. 3.4. LAN PORT INSPECTION(PING TEST) 3.4.1. Equipment setting (1) Play the LAN Port Test PROGRAM. (2) Input IP set up for an inspection to Test Program. *IP Number : 12.12.2.2 Connect SET → LAN port == PC → LAN Port SET PC 4) Check the model name Instart menu. → Factory name displayed. (ex 42LT760H-ZA) 5) C heck the Diagnostics.(DTV country only) → Buyer model displayed. (ex 42LT760H-ZA) 3.4.2. LAN PORT inspection(PING TEST) (1) Play the LAN Port Test Program. (2) Connect each other LAN Port Jack. (3) Play Test (F9) button and confirm OK Message. (4) Remove LAN cable. 3.6. CI+ Key checking method - Check the Section 3.2 Check whether the key was downloaded or not at ‘In Start’ menu. (Refer to below). => Check the Download to CI+ Key value in LGset. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 10 - LGE Internal Use Only 4. Manual Adjustment 3.6.1. Check the method of CI+ Key value (1) Check the method on Instart menu (2) Check the method of RS232C Command 1) Into the main ass’y mode(RS232: aa 00 00) CMD 1 CMD 2 A A * ADC adjustment is not needed because of OTP(Auto ADC adjustment) Data 0 0 0 2) Check the key download for transmitted command (RS232: ci 00 10) CMD 1 CMD 2 C I 4.1. E DID(The Extended Display Identification Data)/DDC(Display Data Channel) download 4.1.1. Overview It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of "Plug and Play". Data 0 1 0 4.1.2. Equipment - Since embedded EDID data is used, EDID download JIG, HDMI cable and D-sub cable are not need. - Adjustment remote control 3) Result value - Normally status for download : OKx - Abnormally status for download : NGx 3.6.2. Check the method of CI+ key value(RS232) 4.1.3. Download method (1) Press "ADJ" key on the Adjustment remote control then select "12.EDID D/L", By pressing "Enter" key, enter EDID D/L menu. (2) S elect "Start" button by pressing "Enter" key, HDMI1/ HDMI2/ HDMI3/ HDMI4/ RGB are writing and display OK or NG. 1) Into the main ass’y mode(RS232: aa 00 00) CMD 1 CMD 2 A A Data 0 0 0 2) Check the mothed of CI+ key by command (RS232: ci 00 20) CMD 1 CMD 2 C I Data 0 2 For Analog For HDMI EDID D-sub to D-sub DVI-D to HDMI or HDMI to HDMI 0 3) Result value i 01 OK 1d1852d21c1ed5dcx CI+ Key Value 3.7. WIFI MAC ADDRESS CHECK (1) Using RS232 Command Transmission H-freq(kHz) V-freq.(Hz) [A][I][][Set ID][][20][Cr] [O][K][X] or [NG] (2) Check the menu on in-start 4.1.4. EDID DATA ▪ HDMI_EDID DATA_2D 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 00 0x01 FF ⓒ FF FF FF FF FF 00 1E 6D 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 ⓐⓓ ⓑ 26 0x02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 0x04 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30 0x05 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A 0x06 3E 1F 53 10 00 0A 20 20 20 20 20 20 01 ⓔ1 14 03 20 21 0x07 ⓓ ⓓ 0x00 02 03 26 F1 4E 10 9F 04 13 05 0x01 22 15 01 26 15 07 50 09 57 07 0x02 02 12 ⓕ E3 05 00 00 00 1D 80 18 71 1C 16 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 80 51 D0 1A 20 0x04 6E 88 55 00 A0 5A 00 00 00 1A 02 3A 80 18 71 38 0x05 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 66 21 50 B0 0x06 51 00 1B 30 40 70 36 00 A0 5A 00 00 00 1E 00 00 0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ⓔ2 0x03 ⓕ ▪ RGB_EDID 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 00 0x01 FF FF FF FF FF 00 1E 6D 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 ⓐ ⓑ 26 0x02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 0x04 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30 0x05 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A 0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 ⓔ3 0x07 Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes FF ⓒ - 11 - ⓓ ⓓ LGE Internal Use Only ▪ Reference - HDMI1 ~ HDMI3 / RGB - In the data of EDID, bellows may be different by S/W or Input mode. 4.2.3. Equipment connection MAP Co lo r Analyzer RS -232C Probe Co m p ut er ⓐ Product ID RS -232C HEX EDID Table DDC Function 0001 01 00 Analog 0001 01 00 Digital Signal Source * If TV internal pattern is used, not needed ⓑ Serial No: Controlled on production line. ⓒ Month, Year: Controlled on production line: ex) Monthly : ‘01’ → ‘01’ Year : ‘2012’ → ‘16’ ⓓ Model Name(Hex): LGTV MODEL NAME MODEL NAME(HEX) LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV) RS -232C Pat t ern Generat o r 4.2.4. Adj. Command (Protocol) <Command Format> START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP - LEN: Number of Data Byte to be sent - CMD: Command - VAL: FOS Data value - CS: Checksum of sent data - A: Acknowledge Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX] ⓔ Checksum(LG TV): Changeable by total EDID data. ⓔ1 ⓔ2 ⓔ3 HDMI1 43 15 X HDMI2 43 5 X HDMI3 43 F5 X RGB X X 5C ▪ RS-232C Command used during auto-adjustment. RS-232C COMMAND [CMD ID DATA] ⓕ Vendor Specific(HDMI) Input Model name(HEX) HDMI1 67 03 0C 00 10 00 80 2D HDMI2 67 03 0C 00 20 00 80 2D HDMI3 67 03 0C 00 30 00 80 2D 4.2. White Balance Adjustment 4.2.1. Overview ▪ W/B adj. Objective & How-it-works (1) Objective: To reduce each Panel's W/B deviation (2) How-it-works : When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value. (3) Adjustment condition : normal temperature 1) Surrounding Temperature : 25 °C ± 5 °C 2) Warm-up time: About 5 Min 3) Surrounding Humidity : 20 % ~ 80 % Explantion wb 00 00 Begin White Balance adjustment wb 00 10 Gain adjustment(internal white pattern) wb 00 1f Gain adjustment completed wb 00 20 Offset adjustment(internal white pattern) wb 00 2f Offset adjustment completed wb 00 ff End White Balance adjustment (internal pattern disappears ) Ex) wb 00 00 -> Begin white balance auto-adj. wb 00 10 -> Gain adj. ja 00 ff -> Adj. data jb 00 c0 ... ... wb 00 1f → Gain adj. completed *(wb 00 20(Start), wb 00 2f(end)) → Off-set adj. wb 00 ff → End white balance auto-adj. 4.2.2. Equipment (1) Color Analyzer: CA-210 (LED Module : CH 14) (2) Adjustment Computer(During auto adj., RS-232C protocol is needed) (3) Adjustment Remote control (4) Video Signal Generator MSPG-925F 720p/216-Gray (Model: 217, Pattern: 78) → Only when internal pattern is not available ▪ Color Analyzer Matrix should be calibrated using CS-1000. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 12 - LGE Internal Use Only ▪ Adj. Map (2) O/S Module(AUO, CMI, Sharp,IPS…) Adj. item Cool Command (lower caseASCII) Data Range (Hex.) CMD1 MIN MAX CMD2 Default (Decimal) y Temp ∆uv j g 00 C0 Cool 0.271 ± 0.002 0.276 ± 0.002 13,000 K 0.0000 G Gain j h 00 C0 Medium 0.287 ± 0.002 0.296 ± 0.002 9,300 K 0.0000 B Gain j i 00 C0 Warm 0.315 ± 0.002 0.332 ± 0.002 6,500 K 0.0000 R Cut ▪ Standard color coordinate and temperature using CA-210 (CH 14) - by aging time 1) Edge LED models (applied only LGD Module) in LGERS B Cut R Gain j a 00 C0 G Gain j b 00 C0 B Gain j c 00 C0 R Gain j d 00 C0 G Gain j e 00 C0 B Gain j f 00 C0 R Cut G Cut B Cut Warm x R Gain G Cut Medium Coordinate Mode R Cut G Cut 4.2.5. Adjustment method (1) Auto WB calibration 1) Set TV in ADJ mode using P-ONLY key(or POWER ON key) 2) Place optical probe on the center of the display - It need to check probe condition of zero calibration before adjustment. 3) Connect RS-232C Cable. 4) Select mode in ADJ Program and begin a adjustment. 5) When WB adjustment is complete with OK message, adjustment status of pre-set mode(Cool, Medium, Warm) 6) Remove probe and RS-232C cable ▪ W/B Adj. must begin as start command “wb 00 00” , and finish as end command “wb 00 ff”, and Adj. offset if need. Cool 0.269 0.273 13000 K 0.0000 Medium 0.285 0.293 9300 K 0.0000 Warm 0.313 0.329 6500 K 0.0000 Aging time (Min) 1 2 3 4 5 6 7 8 9 0-2 3-5 6-9 10-19 20-35 36-49 50-79 80-149 Over 150 Cool X y 269 273 279 288 278 286 277 285 276 283 274 280 272 277 271 275 270 274 269 273 Medium x y 285 293 295 308 294 306 293 305 292 303 290 300 288 297 287 295 286 294 285 293 Warm x y 313 329 319 338 318 336 317 335 316 333 314 330 312 327 311 325 310 324 309 323 2) Edge LED models (applied only LGD Module) in LGEKR (GUMI) (wintertime) 4.2.6. Reference (White balance Adj. coordinate and color temperature) ▪ Luminance : 204 Gray, 80IRE ▪ Standard color coordinate and temperature using CS-1000 (over 26 inch) Coordinate Mode Temp ∆uv x y GP2 GP2 Aging time (Min) 1 2 3 4 5 6 7 8 9 281 280 279 277 275 273 271 270 269 Cool X y 269 273 293 297 290 296 289 295 286 293 282 291 278 289 276 287 274 286 273 285 Medium x y 285 293 313 321 310 320 309 319 306 317 302 315 298 313 296 311 294 310 293 309 Warm x y 313 329 343 338 340 336 339 335 333 333 332 330 328 327 326 325 324 324 323 323 4.3. Tool Option selection ▪ Method : Press "ADJ" key on the Adjustment remote control, then select Tool option. ▪ Standard color coordinate and temperature using CA-210(CH 14) (1) LGD Mode Coordinate x y Temp ∆uv Cool 0.269 ± 0.002 0.273 ± 0.002 13,000 K 0.0000 Medium 0.285 ± 0.002 0.293 ± 0.002 9,300 K 0.0000 Warm 0.313 ± 0.002 0.329 ± 0.002 6,500K 0.0000 Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 13 - LGE Internal Use Only 4.4. Wi-Fi Test (2) Check the sound from the TV Set Step 1) Turn on TV Step 2) Select Network Connection option in Network Menu. Instart menu -> Menu -> Network Setup (3) Check the Sound from the Speaker or using AV & Optic TEST program (It’s connected to MSHG-600) Step 3) Select Start Connection button in Network Connection. * Remark: Inspect in Power Only Mode and check SW version in a master equipment 5. Check Commercial features Mode info. Step 4) If the system finds any AP like blow PIC, it is working well. Name inch LT760H-ZA 32/37/42/47 Commercial Feature IR Out DC Power Out(12V) Ext SPK Out RJP (HDMI interface) Pro:Idiom O O O O O 5.1. External SPK Out 4.5. HDMI ARC Function Inspection 4.5.1. Test equipment - Optic Receiver Speaker - MSHG-600 (SW: 1220 ↑) - HDMI Cable (for 1.4 version) 4.5.2. Test method 5.1.1. Equipment & Condition ▪ Jig (Speaker out JIG) or Oscilloscope ▪ Power only mode (1) Insert the HDMI Cable to the HDMI ARC port from the master equipment (HDMI1) 5.1.2. Check the speaker out 1) Connect the External Speaker : check the sound Connect oscilloscope, you can see this waveform. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 14 - LGE Internal Use Only 5.2. IR Out and DC Power Outlet (12V) (1) Equipment & Condition ▪ Jig (commercial check JIG) ▪ Special 232C Cable for commercial check Jig ▪ Power only mode ▪ PCB mode (instart menu -> menu -> Configuration Setup -> RS232 DC Power Outlet ) (2) Check the power out & IR out - commercial check jig 1) Connect each other RS232c port on the Commercial Check JIG 2) P ress RED Color Button on SVC Remote-control in power only mode (or PCB mode) 3) Check the LED of jig board - +12V LED (OK condition: Turn On) - IR LED (OK condition: blinking) 6. AUDIO output check 6.1. Audio input condition 1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation 2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms 3) RGB PC: 1 KHz sine wave signal 0.7 Vrms 6.2. Specification Item Min Typ Max Unit Au dio practical max Output, L/R (Distortion=10% max Output) 9.0 8.5 10.0 8.9 12.0 9.9 W Vrms Remark (1) Measurement condition - EQ/AVL/Clear Voice: Off (2) Speaker (8Ω Impedance) 7. GND and HI-POT Test 7.1. GND & HI-POT auto-check preparation (1) Check the POWER CABLE and SIGNAL CABE insertion condition 7.2. GND & HI-POT auto-check (1) Pallet moves in the station. (POWER CORD / AV CORD is tightly inserted) (2) Connect the AV JACK Tester. (3) Controller (GWS103-4) on. (4) GND Test (Auto) - If Test is failed, Buzzer operates. - If Test is passed, execute next process (Hi-pot test). (Remove A/V CORD from A/V JACK BOX) (5) HI-POT test (Auto) - If Test is failed, Buzzer operates. - If Test is passed, GOOD Lamp on and move to next process automatically. (3) Check the power out & IR out - mini jig 1) Connect mini jig on RS232c port 2) Press RED Color Button on SVC Remote control in power only mode (or PCB mode) 3) Check the LED of mini jig 7.3. Checkpoint (1) Test voltage - GND: 1.5KV/min at 100mA - SIGNAL: 3KV/min at 100mA (2) TEST time: 1 second (3) TEST POINT - GND Test = POWER CORD GND and SIGNAL CABLE GND. - H i-pot Test = POWER CORD GND and LIVE & NEUTRAL. (4) LEAKAGE CURRENT: At 0.5 mArms (4) Pro:Idiom Check 1) Connect the RF Cable 2) Turn to the Pro:Idiom channel (No. 333) 3) Check the video & sound ** Only displayed at “POWER ONLY” mode Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 15 - LGE Internal Use Only 8. USB S/W Download(Service only) 4) Press the In-start Key on the ADJ remote after at least 1 min of signal reception. Then, select 7.External ADC. And Press OK or Right Button for going to sub menu. 5) Press OK in Comp 480i menu 6) Give a 1080p Mode, Horizontal 100% Color Bar Pattern to Comp1. (MSPG-925FA → Model: 225, Pattern: 65) 7) Press OK in Comp 1080p menu 8) Perform (6) and (7) in RGB-PC 9) If ADC Comp is successful, “ADC Component Success” is displayed. If ADC calibration is failure, “ADC Component Fail” is displayed. 10) I f ADC calibration is failure, after rechecking ADC pattern or condition, retry calibration 11) I f ADC RGB calibration is successful, “ADC RGB Success” is displayed. If ADC calibration is failure, “ADC RGB Fail” is displayed. 12) If ADC calibration is failure, after recheck ADC pattern or condition, retry calibration (1) Put the USB Stick to the USB socket. (2) Automatically detecting update file in USB Stick. - If your downloaded program version in USB Stick is Low, it didn't work. But your downloaded version is High, USB data is automatically detecting.(Download Version High & Power only mode, Set is automatically Download) (3) Show the message "Copying files from memory". 9.2. Manual White balance Adjustment (4) Updating is starting. 9.2.1. Adj. condition and cautionary items (5) Updating Completed, The TV will restart automatically. (6) If your TV is turned on, check your updated version and Tool option. (explain the Tool option, next stage) * If downloading version is more high than your TV have, TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn’t have a DTV/ ATV test on production line. (1) Lighting condition in surrounding area surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding. (2) Probe location: Color Analyzer (CA-210) probe should be within 10 cm and perpendicular of the module surface (80 °~ 100 °) (3) Aging time 1) After Aging Start, Keep the Power ON status during 5 Minutes. 2) In case of LCD, Back-light on should be checked using no signal or Full-white pattern. 9.2.2. Equipment (1) Color Analyzer: CA-210(NCG: CH 9/ WCG: CH12/ LED: CH14) (2) Adj. Computer(During auto adj., RS-232C protocol is needed) (3) Adjust Remote control (4) Video Signal Generator MSPG-925F 720p/216-Gray (Model: 217, Pattern: 78) * After downloading, have to adjust Tool Option again. (1) Push "IN-START" key in service remote control. (2) Select "Tool Option 1" and push "OK" key. (3) Punch in the number. (Each model has their number) 9.2.3. Adjustment 9. Optional adjustments 9.1. Manual ADC Calibration 9.1.1. Equipment & Condition (1) Adjustment Remote control (2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern Generator - Resolution: 480i Comp1(MSPG-925FA: model-209, pattern-65) - Resolution: 1080p Comp1(MSPG-925FA: model-225, pattern-65) - Resolution : 1080p RGB (MSPG-925FA: model-225, pattern-65) - Pattern : Horizontal 100% Color Bar Pattern - Pattern level: 0.7±0.1 Vp-p 9.1.2. Adjust method (1) ADC 480i/1080p Comp1, RGB 1) Check connected condition of Comp1/RGB cable to the equipment 2) Give a 480i Mode, Horizontal 100% Color Bar Pattern to Comp1. (MSPG-925FA → Model: 209, Pattern: 65) 3) Change input mode as Component1 and picture mode as “Standard” Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 16 - (1) Set TV in Adj. mode using POWER ON (2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10cm of the surface. (3) Press ADJ key → EZ adjust using adj. R/C → 6. WhiteBalance then press the cursor to the right (Key ►). W hen Key(►) is pressed 216 Gray internal pattern will be displayed. (4) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value. (5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of color temperature. ▪ If internal pattern is not available, use RF input. In EZ Adj. menu 6.White Balance, you can select one of 2 Test-pattern: ON, OFF. Default is inner(ON). By selecting OFF, LGE Internal Use Only TROUBLESHOOTING GUIDE 1. Power-Up Boot Fail Trouble Shooting guide Check P2401 All Voltage Level (3.5V, 12V, 24V). N Check power connector and RL_ON signal OK? N Replace Power Board. Y Check Q2407 output Voltage(12V). N Check Q2407 application circuit Or replace Q2407. Y N Check LVDS Cable. Replace Cable. Y Check LCD Module Control board 2. No OSD Trouble Shooting guide Check P2401 All Voltage Level (3.5V, 12V, 24V). N Check power connector and RL_ON signal OK? N Replace Power Board. Y N Check IC8700 RESET pin. Check switch SW8700. Y Check X8701 Clock 10MHz. N Check X8701 application circuit or Replace X8701. Y Check IC8700 IIC Communication status. N Check IIC line or replace IC8700. Y Check IR input state of IC8700 13pin. N Check IR board. Y Re-download NEC Micom Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 17 - LGE Internal Use Only 3. Analog RF Video Trouble Shooting guide Check RF cable & signal. Y Check TU6500 Pin8. (Video output) N Replace Tuner.. Y N Check tuner 5V power R6513. N Check IC2404. Replace IC2404. Y N Check tuner 3.3V power L6502. Replace L6502 Y Check tuner 1.8V power IC6501 2pin : 1.8V N Replace IC6501. Y N Check MTK LVDS output. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes Replace IC105. - 18 - LGE Internal Use Only 4. Digital RF Trouble Shooting guide Check RF cable & signal. Y N Check tuner 5V power R6513. N Check tuner 5V power R6513. Replace IC2404. Y Check IIC Signal TU6500 Pin#3,4. N Replace TU6500. Y Check DIF Signal TU6500 Pin#10,11. N Replace TU6500. Y Check X100 and application circuit. N Replace X100. Y Replace IC105. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 19 - LGE Internal Use Only 5. AV Video Trouble Shooting guide Check input signal format. Is it supported? Y Check AC cable for damage For damage or open conductor. Y Check JK4600 Can you see the normal waveform? N Replace JK4600. Y Check the input of MTK(IC105). Measure waveform at C616 because it’s more easy to check. Can you see the normal waveform? Y This board has big problem because Main chip (MTK) have some troubles. After checking thoroughly all path once again, You should decide to replace MTK or not. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 20 - LGE Internal Use Only 6. HDMI Video Trouble Shooting guide Check input signal format. Is it supported? Y Check AC cable for damage For damage or open conductor Y Check JK3301/JK3302/JK3303 Can you see the normal waveform? N Replace JK3301, JK3302, JK3303 Y Check HDCP key NVRAM(IC100) Power & I2C signal N Replace IC100. Y Check the input of MTK(IC105). Measure waveform at R323, R324 because it’s more easy to check. Can you see the normal waveform? Y This board has big problem because Main chip (MTK) have some troubles. After checking thoroughly all path once again, You should decide to replace MTK or not. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 21 - LGE Internal Use Only 7. RGB-PC Video Trouble Shooting guide Check input signal format. Is it supported? Y Check AC cable for damage For damage or open conductor. Y Check JK3603 Can you see the normal waveform? N Replace JK3603. Y Check the input of MTK(IC105). Measure waveform at R323, R324 because it’s more easy to check. Can you see the normal waveform? Y This board has big problem because Main chip (MTK) have some troubles. After checking thoroughly all path once again, You should decide to replace MTK or not. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 22 - LGE Internal Use Only 8. Analog RF Audio Trouble Shooting guide Check RF cable & signal. Y Check TU6500 Pin6. (SIF output) N Replace Tuner. Y Check Audio AMP output L5402, L5403, L5404, L5405. N Replace L5402, L5403, L5404, L5405. Y N Check IC5400. Replace IC5400. Y Check C352. (SIF signal to IC105) Y Replace IC105. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 23 - LGE Internal Use Only 9. AV / RGB-PC Audio in Trouble Shooting guide Check input signal format. Is it supported? Y Check AC cable for damage For damage or open conductor Y Check JK4600/JK3604 Can you see the normal waveform? N Replace JK4600/JK3604. Y Check the input of MTK(IC105). Measure waveform at C610, C611, C319, C320 because it’s more easy to check. Can you see the normal waveform? Y Check Audio AMP output L5402, L5403, L5404, L5405. N Replace L5402, L5403, L5404, L5405. Y This board has big problem because Main chip (MTK) have some troubles. After checking thoroughly all path once again, You should decide to replace MTK or not. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 24 - LGE Internal Use Only 10. HDMI Audio in Trouble Shooting guide Check input signal format. Is it supported? Y Check AC cable for damage For damage or open conductor. Y Check JK3301/JK3302/JK3303. Can you see the normal waveform? N Replace JK3301, JK3302, JK3303. Y Check Audio AMP output L5402, L5403, L5404, L5405. N Replace L5402, L5403, L5404, L5405 Y This board has big problem because Main chip (MTK) have some troubles. After checking thoroughly all path once again, You should decide to replace MTK or not. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 25 - LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes M ICOM To USB2 M-Remote Wi-Fi R ealtek WOL Magic WOL - 26 - HDMI1 HDMI2 HDMI3 SPDIF Vol+/ - PHY Chip Rear Ext SPK AMP PC Audio RGB, H/V SYSTEM DDR3 X 4 (2Gb) RGB PC SPDIF OUT L/R OUT Ext. Speaker Vol Control Audio RGB,H/V I2S Out LVDS TS CVBS Demod LGE2112 (EU Commercial) Ethernet HDMI S/W USB Video,RGB Video Audio Audio Full Scart SC_ID, FB ID,FB DTV/MNT_Vout & Audio out Video, Audio out Ethernet HUB IC Ext. Speaker R/L PC- RGB A/V1 AUX LAN LAN Ext. SPK USB to Serial USB1 Side NAND Flash (16Gb) 37/42/47 HDCP EEPROM Audio AMP 32 30P(HD) CI Slot R L Intelligent Sensor IR&Key CLOCK Display Pro:idiom TS_Serial_OUT NEC Sub Micom 51 P (FHD) URAT TS_Serial_IN CLK S/W CI_Common CI_Parallel_ IN CI_Parallel_ OUT SIF CVBS(M) DIF(+/-) SYSTEM EEPROM X 1 (256Kb) RS-232C DVB T/C H/N TU RF Rear Speaker BLOCK DIAGRAM LGE Internal Use Only EXPLODED VIEW IMPORTANT SAFETY NOTICE 300 * Set + Stand * Stand Base + Body A2 A4 120 A10 530 820 810 200 900 910 550 570 501 LV1 540 500 521 510 400 Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes - 27 - LGE Internal Use Only EAX6430790* : LD22* / LC22* EAX6443420* : LT22* / LJ22* / LA22* / LB22* 12pF Crystal&load cap. X100-*1 27.0MHZ Crystal Matching Test result : 27pF -> 20pF -> 24pF 12pF Crystal +3.5V_ST R103 4.7K +3.3V_NORMAL +3.3V_NORMAL NVRAM X-TAL X100 27MHz Write Protection R105 4.7K OPT R104 4.7K NC 1 8 2 7 E2 3 VSS 6 4 5 JTAG R146 10K MTK_JTAG AR100 10K MT5369_XTAL_OUT 1 R182 2.7K WP SCL R136 SDA R183 2.7K 33 R137 33 R1030 OPT R1031 OPT 33 SCL_NVRAM JTDI 3 JTMS 4 JTCLK 5 SDA_NVRAM EMMC_CLK R174 10K IC105 LGE2112 6 I2C_SCL4 33 JTDO I2C_SDA4 R143 33 AP14 7 JTCLK MTK_JTAG +3.3V_NORMAL 8 R144 10K AM14 JTDI AR14 JTDO AR15 JTMS 10 AN14 JTRST# 11 HDCP_EEPROM_MICRO HDCP EEPROM A0 1 HDCP_EEPROM_ST IC100 M24C16-R NC_2 NC_3 VSS 8 2 7 3 6 4 5 12 R145 10K MTK_JTAG IC100-*1 24LC16B +3.3V_NORMAL 1 0 2 JTRST# 9 NC_1 C115 24pF C113 24pF Close to eMMC Flash (IC8100) MTK_JTAG R152 MTK_JTAG P100 1K 12507WS-12L VCC OPT E1 MT5369_XTAL_IN - Low : Normal Operation - High : Write Protection +3.5V_ST IC104 M24M01-HRMN6TP C113-*1 C115-*1 8pF 8pF 50V 50V 12pF Crystal 12pF Crystal R119 C101 0.1uF 16V VCC WC SCL SDA 8 AN12 OSCL0 WP A2 3 6 SCL 5 SDA AN15 OSCL1 AU34 MT5369_XTAL_OUT 4.7K R191 22 R192 JTMS U1RX JTRST U1TX AH26 C116 0.1uF I2C_SCL1 OSDA0 POWE POOE POCE1 OSDA1 POCE0 OSCL1 PDD7 PDD6 XTALI PDD5 XTALO PDD4 PDD3 AVDD33_XTAL_STB PDD2 AVSS33_XTAL_STB PDD1 PDD0 22 I2C_SDA1 PARB R147 1K OPT STRAPPING R153 1K OPT R150 1K LED_PWM0 LED_PWM1 AVDD_33SB OPCTRL3 PACLE AK18 LED_PWM0 ICE mode + 27M + Serial boot 0 0 0 ICE mode + 27M + ROM to Nand boot 0 0 1 ICE mode + 27M + Rom to eMMC boot from eMMC pins (share pins w/s NAND) 0 1 0 C117 0.1uF AK17 AVDD33_VGA_STB AVSS33_VGA_STB PAALE MTK_NEC_TX EMMC_CMD C33 B34 EMMC_DATA[2-7] D33 D29 EMMC_DATA[7] C30 EMMC_DATA[6] D30 EMMC_DATA[5] B31 EMMC_DATA[4] A31 EMMC_DATA[3] B32 EMMC_DATA[2] R157 4.7K OPT A32 C32 D32 A34 EMMC_DATA[0] C29 R154 1K EMMC_CLK ICE mode + 27M + ROM to eMMC boot from SDIO pins 0 1 C118 0.1uF 1 AM27 AVDD33_PLLGP ORESET OPT AVSS33_PLLGP AU21 IR +3.3V_NORMAL R128 1.2K R131 1.2K R134 2.7K R139 2.7K R142 2.7K R173 2.7K R185 2.7K R188 2.7K R156 2.7K R160 2.7K R164 2.7K SOC -> Pro:Idiom or CI SLOT OPT R177 2.7K R1026 STB_SCL R110 33 I2C_SCL1 STB_SDA R111 33 I2C_SDA1 OPCTRL_11_SCL R112 33 OPCTRL_10_SDA R113 33 I2C_SDA2 OSCL1 R114 33 I2C_SCL3 OSDA1 R115 33 I2C_SDA3 OSCL2 R116 33 R117 33 I2C_SDA4 R118 33 I2C_SCL5 OSDA0 R121 33 I2C_SDA5 OPCTRL_1_SCL R122 33 I2C_SCL6 OPCTRL_0_SDA R123 33 I2C_SDA6 F37 CI_ADDR[2] F36 TS_S_OUT_VAL CI_ADDR[3] G37 CI_ADDR[4] G36 CI_ADDR[5] G35 0 SOC -> CI SLOT MT5369_MIVAL_ERR R1022 0 MT5369_MISTRT R1023 0 CI_ADDR[6] G34 CI_ADDR[7] H34 CI_ADDR[8] L34 CI_ADDR[9] L32 CI_ADDR[10] K33 CI_ADDR[11] K32 CI_ADDR[12] H33 CI_ADDR[13] L35 CI_ADDR[14] K36 J32 J34 R1028 10K IC106 NLASB3157DFT2G K34 MT5369_TS_OUT[0] TCLK_SEL B1 I2C_SCL4 OSDA2 CI_ADDR[1] TS_S_OUT_DATA MT5369_TS_OUT[0-7] +3.3V_NORMAL I2C_SCL2 OSCL0 0 TS_S_OUT_CLK GND B0 1 6 2 5 3 MT5369_MCLKI 4 SELECT +3.3V_NORMAL VCC A CI_DATA[0-7] C121 0.1uF K35 K37 MT5369_TS_OUT[3] J37 MT5369_TS_OUT[4] J35 MT5369_TS_OUT[5] J33 J36 MT5369_TS_OUT[6] G33 MT5369_TS_OUT[7] OPT R1027 0 MT5369_TS_OUT[1] R1024 MT5369_TS_OUT[2] MT5369_MCLKI_SW 0 H35 CI_DATA[0] H31 CI_DATA[1] F34 CI_DATA[2] E36 CI_DATA[3] N33 CI_DATA[4] P32 CI_DATA[5] M35 CI_DATA[6] M37 CI_DATA[7] M33 F35 MT5369_TS_IN[0] E35 MT5369_TS_IN[1] Model Option +3.3V_NORMAL E37 MT5369_TS_IN[2] CI SLOT -> SOC N32 MT5369_TS_IN[3] M34 MT5369_TS_IN[4] M36 MODEL_OPT_0 MODEL_OPT_1 LG FRC2 Reserved 0 1 1 0 1 0 1 E32 WARM_MODE LOW C106 0.1uF OPT C123 0.1uF OPT C122 0.1uF OPT /USB2SER_RESET LAN1_DET THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. F31 E29 Not Support MODEL_OPT_9 MODEL_OPT_10 Reserved EPI Default Support Not Support M24 Not Support Support SC_ID_SOC MDS62110214 Support S Tuner M23 T2 Tuner MODEL_OPT_8 GASKET9.5T_HEATSINK MODEL_OPT_7 MDS62110213 MODEL_OPT_8 MODEL_OPT_9 GASKET3.5T_HEATSINK Disable Enable M22 DDR_Default AP9 AT9 MODEL_OPT_7 M_RFModule_ISP MODEL_OPT_5 NON_3D_Depth_IC MDS62110213 DDR_768MB M21 MODEL_OPT_6 CP BOX 3D_Depth_IC GASKET3.5T_HEATSINK DDR MDS62110213 3D DEPTH E30 E31 MODEL_OPT_3 GASKET3.5T_HEATSINK MODEL_OPT_4 MODEL_OPT_5 NON_OPTIC MODEL_OPT_10 MTK_NON_EPI R190 4.7K MTK_NON_DVB_C2_TUNER R187 4.7K MTK_NON_DVB_S_TUNER R184 4.7K MTK_NON_DVB_T2_TUNER R141 4.7K MTK_NON_CP_BOX R138 4.7K MTK_DDR_DEFAULT R133 4.7K M_RFModule_ISP MODEL_OPT_7 OPTIC MODEL_OPT_3 M20 MODEL_OPT_6 0 ERROR_OUT MDS62110213 MODEL_OPT_5 R1033 MODEL_OPT_0 MODEL_OPT_1 GASKET3.5T_HEATSINK /S2_RESET MODEL_OPT_4 MTK_NON_3D_DEPTH_IC R129 4.7K A29 C31 HD FHD F32 D31 C102 0.1uF OPT MODEL_OPT_3 MTK_NON_OPTIC_Tx_IC R127 4.7K 100 USB_CTL1 MODEL_OPT_2 MTK_HD R109 4.7K R1010 USB_CTL2 MODEL_OPT_0 HIGH MTK_NO_FRC/FRC3 R107 4.7K E33 /USB_OCD2 /USB_OCD1 MODEL_OPT_2 MTK_NO_FRC/Int_FRC R102 4.7K L33 MT5369_TS_IN[7] MODEL_OPT_1 Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes M32 MT5369_TS_IN[6] 0 NO_FRC MTK_EPI R189 4.7K MTK_DVB_C2_TUNER R186 4.7K MTK_DVB_S_TUNER R175 4.7K MTK_DVB_T2_TUNER R140 4.7K MTK_CP_BOX R135 4.7K MTK_DDR_768MB R132 4.7K MTK_3D_DEPTH_IC R130 4.7K MTK_OPTIC_Tx_IC R125 4.7K MTK_FHD R108 4.7K MTK_Int_FRC/URSA5 R106 4.7K MTK_FRC3/URSA5 R101 4.7K MT5369_TS_IN[5] SoC internal FRC STB_SCL AR21 AR9 AU9 MODEL_OPT_6 GPIO1 DEMOD_TSCLK GPIO2 DEMOD_TSDATA0 GPIO3 DEMOD_TSDATA1 GPIO4 DEMOD_TSDATA2 GPIO5 DEMOD_TSDATA3 GPIO6 DEMOD_TSDATA4 GPIO7 DEMOD_TSDATA5 GPIO8 DEMOD_TSDATA6 GPIO9 DEMOD_TSDATA7 GPIO10 DEMOD_TSSYNC GPIO11 DEMOD_TSVAL GPIO12 CI_INT GPIO14 CI_TSCLK GPIO15 CI_TSDATA0 GPIO16 CI_TSSYNC GPIO17 CI_TSVAL GPIO18 GPIO19 GPIO20 PVR_TSCLK PVR_TSVAL GPIO21 PVR_TSSYNC GPIO22 PVR_TSDATA0 GPIO23 PVR_TSDATA1 GPIO24 GPIO25 SPI_CLK GPIO27 SPI_DATA GPIO28 SPI_CLE GPIO29 AN23 R176 R162 10K AN24 10K AP23 R163 10K AR23 AU23 M_RFModule_RESET OPC_EN /TU_RESET /S2_RESET AT23 R1016 100 AM24 AM23 T36 OPWM2 GPIO31 OPWM1 GPIO32 OPWM0 C114 0.1uF 16V SOC <- P:I U36 TS_S_IN_0_CLK T33 TS_S_IN_0_VAL T30 TS_S_IN_0_SYNC V33 TS_S_IN_0_DATA V32 V31 V30 T35 T31 /PCM_REG T37 /PCM_CE1 R35 MT5369_TS_SYNC CI SLOT -> SOC /PCM_WE R37 R36 /PCM_OE R34 R1005 0 R32 R1006 0 R33 R1007 0 P33 R1008 0 P34 R1001 0 P35 N34 N35 MT5369_TS_VAL CI SLOT -> SOC CI_A_VS1 MT5369_TS_CLK CI SLOT -> SOC /PCM_IRQA /PCM_WAIT +3.3V_NORMAL /CI_CD2 /CI_CD1 R168 4.7K OPT /PCM_IORD /PCM_IOWR AU12 GPIO30 R166 2.7K OPT AT12 R161 4.7K OPT R171 22 R170 22 R169 10K AR12 PWM_DIM2 PWM_DIM1 A_DIM OPT GPIO33 C120 2.2uF 10V OPT PWM2_PULL_DOWN_1K PWM1_PULL_DOWN_1K A37 GPIO34 SD_D0 GPIO35 SD_D1 GPIO36 T32 N37 SPI_CLK1 GPIO26 22 PCM_RST N36 GPIO13 SD_D2 GPIO37 SD_D3 GPIO38 SD_CMD GPIO39 SD_CLK R197 1K C35 A36 B35 R198 1K B36 B37 GPIO40 GPIO41 AT11 GPIO42 LDM_CS GPIO43 LDM_CLK GPIO44 LDM_VSYNC GPIO45 LDM_DO GPIO46 LDM_DI AU11 L/DIM0_SCLK AR10 L/DIM0_VS AM9 L/DIM0_MOSI AP10 GPIO47 GPIO48 AN22 GPIO49 LED_PWM1 GPIO50 LED_PWM0 LED_PWM1 AP21 LED_PWM0 GPIO51 GPIO52 5V Tolerance GPIO53 AU20 GPIO54 OPCTRL11 GPIO55 OPCTRL10 OPCTRL9 NON_EU R193 10K MODEL_OPT_4 DEMOD_RST GPIO0 R172 STB_SDA T34 H32 TS_S_OUT_SYNC SOC -> Pro:Idiom or CI SLOT R1021 MT5369_MCLKI_SW E AT21 SOC_RESET R1002 10K OPT 4.7K STB_SDA CI_ADDR[0] AMP, L/DIMMING,HDCP KEY T-CON MICOM S/Demod,T2/Demod, LNB NVRAM TUNER_MOPLL(T/C,ATV) R159 FSRC_WR STB_SCL CI_ADDR[0-14] C 33 R158 OPT D27 AVDD10_LDO C108 2.2uF 10V R155 10K OPT Q1001 MMBT3904(NXP) OPT B R1003 100 AM22 AK23 AJ20 I2C +3.3V_NORMAL OPWRSB VDD3V3 C107 2.2uF 10V : : : : : : R178 4.7K OPT EMMC_DATA[1] C34 OIRI I2C_1 I2C_2 I2C_3 I2C_4 I2C_5 I2C_6 +3.3V_NORMAL AM20 OPCTRL3 R151 1K OPT MTK_NEC_RX AT16 EMMC_CLK LED_PWM1 R148 1K SOC_RX A35 AK27 +3.3V_NORMAL SOC_TX AP18 AU16 AT34 MT5369_XTAL_IN AVDD_33SB R181 JTDO AP15 OSDA1 7 U0RX OSCL0 VCC A1 2 VSS 4 13 U0TX JTDI AP12 OSDA0 R149 10K MTK_JTAG AR18 JTCK OPCTRL8 ADIN0_SRV OPCTRL7 ADIN1_SRV OPCTRL6 ADIN2_SRV OPCTRL5 ADIN3_SRV OPCTRL4 ADIN4_SRV OPCTRL3 ADIN5_SRV OPCTRL2 ADIN6_SRV OPCTRL1 ADIN7_SRV OPCTRL0 OPCTRL_11_SCL AT20 OPCTRL_10_SDA AN18 LAN2_DET AP20 SC_DET AM18 AN19 R1025 AP19 AR19 R1014 AN21 R1015 AM19 R1009 AN20 AR20 DSUB_DET 100 0 OPT 33 OPT TCLK_SEL HDMI_CEC MAIN_AMP_RESET OPCTRL3 0 EXT_SPK_DET OPCTRL_1_SCL OPCTRL_0_SDA MODEL OPTION 8 is just for CP Box It should not be appiled at MP xxLT760H-UA MID_MAIN_1 2011.09.29 8 LGE Internal Use Only PLACE AT JACK SIDE C319 10uF 16V 1608 sizs For EMI R314 PC_L_IN_SOC PC_L_IN 0 R300 C314 100pF 50V OPT C300 560pF 50V OPT 470K OPT C320 10uF 16V 1608 sizs For EMI R336 PC_R_IN_SOC PC_R_IN 0 R301 470K OPT C315 100pF 50V OPT C301 560pF 50V OPT +5V_NORMAL R308 1.2K OPT R302 180 C311 ARC HDMI_ARC 1uF 10V R303 82 DSUB_VSYNC R324 C329 5pF 50V OPT R309 100K 22 DSUB_HSYNC C330 5pF 50V OPT R323 22 DSUB_VSYNC_SOC OPT R325 2K DSUB_HSYNC_SOC OPT R326 2K IC105 LGE2112 IC105 LGE2112 CHANGE SYMBOL OPT To NEC & HDMI R380 HDMI_CEC 0 AA32 AE33 AC33 AH32 DDC_SCL_4_JACK AD33 AB33 AH33 DDC_SDA_4_JACK 5V_HDMI_2_JACK 5V_HDMI_3_JACK R304 1K AG31 R305 1K AE31 AC31 R307 5V_HDMI_4_JACK 1K HDMI_0_RX_1 HDMI_1_SCL HDMI_0_RX_1B HDMI_2_SCL HDMI_0_RX_2 HDMI_3_SCL HDMI_0_RX_2B HDMI_0_RX_C AH31 HDMI_0_SDA HDMI_1_RX_0 HDMI_3_SDA HDMI_1_RX_0B HDMI_1_RX_1 HDMI_0_PWR5V HDMI_1_RX_1B HDMI_1_PWR5V HDMI_1_RX_2 HDMI_2_PWR5V HDMI_1_RX_2B HDMI_3_PWR5V HDMI_1_RX_C AE32 AC32 AJ32 HDMI_HPD_4_JACK HDMI_1_HPD HDMI_2_RX_0 HDMI_2_HPD HDMI_2_RX_0B HDMI_3_HPD Y24 W24 AB24 HDMI_2_RX_1 HDMI_2_RX_1B AA24 C356 10uF 10V AVDD12_HDMI_0_RX HDMI_2_RX_2 AVDD12_HDMI_1_RX HDMI_2_RX_2B AVDD12_HDMI_2_RX AVDD12_HDMI_3_RX HDMI_2_RX_C AA29 Y29 AC29 C304 0.1uF C307 0.1uF HDMI_3_RX_0 AVDD33_HDMI_1_RX HDMI_3_RX_0B AVDD33_HDMI_2_RX HDMI_3_RX_1 AVDD33_HDMI_3_RX HDMI_3_RX_1B HDMI_3_RX_2 AF31 AF32 AVSS33_HDMI_RX_1 AO4N AO4P D1-_HDMI2_JACK AF35 AOCLKN D2+_HDMI2_JACK AF34 AOCLKP D2-_HDMI2_JACK AH35 AO2N CK+_HDMI2_JACK AH34 AO2P CK-_HDMI2_JACK D0+_HDMI3_JACK AE36 AD34 E27 MODEL_OPT_9 D0-_HDMI3_JACK D1+_HDMI3_JACK AD35 F30 MODEL_OPT_10 F29 R318 OPT 22 R319 OPT 22 D1-_HDMI3_JACK AC35 MAIN_AMP_MUTE D2+_HDMI3_JACK AC34 EXT_AMP_MUTE D2-_HDMI3_JACK AE35 EXT_SPK_VOL+ CK+_HDMI3_JACK AE34 EXT_SPK_VOL- CK-_HDMI3_JACK PANEL_CTL AB35 INV_CTL AB34 MODEL_OPT_2 AA35 PCM_5V_CTL AA34 EMMC_RST HDMI_3_RX_2B AVSS33_HDMI_RX_2 HDMI_3_RX_C AVSS33_HDMI_RX_3 HDMI_3_RX_CB B27 A27 R316 22 EXT_SPK_CONTROL B28 R317 R348 0 EXT_SPK_CONTROL OPT OPT A28 R347 22 0 C28 D28 E28 F28 B29 USB2 W/O HUB C37 TCON2 AO0P TCON3 TCON4 AE4N TCON5 AE4P TCON6 AE3N TCON7 AE3P TCON8 AECLKN TCON9 AECLKP TCON10 AE2N TCON11 AE2P TCON12 AE1N +1.2V_MTK_AVDD AA36 AE0N AC37 AC36 AJ6 C350 0.1uF D0+_HDMI4_JACK AK34 C354 0.1uF AJ34 AJ36 AJ33 AK33 AE6 C347 0.1uF D1-_HDMI4_JACK AJ37 AF6 AH7 D0-_HDMI4_JACK D1+_HDMI4_JACK AJ35 VDD3V3 AVDD12_LVDS_1 AG5 D2-_HDMI4_JACK AF5 CK+_HDMI4_JACK AE5 CK-_HDMI4_JACK AH5 BO4N AVDD12_VPLL BO4P AVDD33_LVDSB BO3N AVDD33_LVDSA BO3P BOCLKN AVSS12_LVDS_2 BOCLKP AVSS12_LVDS_1 BO2N AVSS12_VPLL BO2P AVSS33_LVDSB BO1N AVSS33_LVDSA BO1P BO0N AG7 REXT_VPLL USB_DP_P0 BE4P BE3N USB_DM_P1 AU13 WIFI_DM BE3P BECLKN USB_DP_P2 BECLKP USB_DM_P2 BE2N AT14 USB2SER_DP AU14 USB2SER_DM USB_DP_P3 SC_R_IN_SOC BE2P USB_DM_P3 SC_L_IN_SOC BE1N BE1P D35 AP13 BE0N AVDD33_USB_P0P1 AU37 AU35 AVSS33_USB_P1 AVSS33_USB_P2 PC_R_IN_SOC W35 +1.2V_MTK_AVDD W34 Y34 Y35 VDD3V3 C316 0.1uF PCIE11_TXN TXVP_0 AVDD33_PCIE11 AM16 AD15 REXT PCIE11_REFCKN PCIE11_REFCKP R310 30K AT37 AU36 AP34 EPHY_RDN AR37 EPHY_RDP AR33 AP32 PHYLED0 W36 W37 AT17 AN16 PHYLED1 AVSS12_PCIE11 AT35 AT36 RXVP_1 W30 30K EPHY_TDN AU17 RXVN_1 AVDD12_PCIE11 R311 PC_L_IN_SOC EPHY_TDP AU18 TXVN_0 PCIE11_RXN PCIE11_RXP U24 V24 C308 0.1uF AT18 PCIE11_TXP 24K +1.2V_MTK_AVDD EPHY_ACTIVITY AR36 EPHY_LINK AP37 AR35 R315 AP36 AD14 AVDD12_REC AD16 AVDD33_COM AD17 AVDD33_LD C321 10uF 10V AR0_ADAC AIN0_L_AADC AL0_ADAC AIN1_L_AADC AR1_ADAC AIN2_R_AADC AL1_ADAC AIN2_L_AADC AIN3_R_AADC AR2_ADAC AIN3_L_AADC AL2_ADAC AIN4_R_AADC AIN4_L_AADC AR3_ADAC AIN5_R_AADC C352 AVSS12_REC AVDD33_DAC AIN6_L_AADC AVDD33_DAC1 C362 0.1uF AJ28 AVDD33_AADC Close to Tuner IF_N R331 0 C309 OPT ALIN ASPDIF0 ASPDIF1 AOBCK AN28 AOLRCK AOMCLK C363 1uF 25V C358 0.01uF 50V AOSDATA4 AOSDATA3 AOSDATA2 51 AOSDATA1 C336 1uF 10V 1uF R335 AU32 51 AT32 10V VDD3V3 AK3 AK4 AJ3 AJ4 AJ1 AJ2 AH3 AH4 TXA4N AU2 CI_ADDR[0-14] CH3 TXA4P AT1 CI_ADDR[0] TXA3N AU1 TXACLKP AP1 CH2 C341 0.047uF VSYNC RP BP AVDD12_DEMOD C351 0.1uF R342 AJ26 10K AVSS33_DEMOD PB1P C355 PR1P U35 Close to MT5369 TP300 IF_AGC Y1P RF_AGC SOY1 COM0 AP31 AN30 LOUTN PB0P LOUTP PR0P Y0P V35 OSCL2 V34 OSDA2 OSCL2 TXA0P CI_ADDR[10] CI_ADDR[11] TXB4N AU6 CI_ADDR[12] TXB4P AP6 CI_ADDR[13] TXB3N AR6 CI_ADDR[14] AR29 VDACX_OUT SC0 AR5 TXBCLKP AT4 TXB2N AU4 CH6 TXB2P AP4 TXB1N AR4 TXB1P AP3 TXB0N AR3 TXB0P CH5 For PCB Pattern CH4 SCART_ROUT_SOC AN34 TU_CVBS R340 100 C359 0.047uF AR31 AN29 C361 1uF AP30 CVBS3P AK24 AK25 CI_DATA[0] AM32 CI_DATA[1] CI_DATA[2] TP338 TP339 TP340 CI_DATA[3] TP341 CI_DATA[4] TP342 CI_DATA[5] AM33 TP343 CI_DATA[6] AM36 1.2K R376 AM35 1.2K R377 1.2K R378 1.2K R379 TP345 C399 1200pF C398 1200pF C397 1200pF TP344 CI_DATA[7] C3001 1200pF AF30 DAC_3V3 C365 0.01uF AE30 PLACE AT JACK SIDE SPDIF_OUT C380 0.1uF ARC L300 /CI_CD2 BLM15BD121SN1 Y32 AR11 R366 100 AP11 R367 100 AM12 R368 100 R371 AM10 AM11 AN11 AUD_SCK C333 47pF 50V R322 75 AUD_LRCK /CI_CD1 D301 ADLC 5S 02 015 5.5V AUD_MASTER_CLK 100 C387 22pF OPT Don’t use as GPIO AN10 AUD_LRCH C389 22pF OPT C393 22pF OPT C396 33pF OPT L301 BLM15BD121SN1 DSUB_HSYNC_SOC AM25 0.01uF C366 100 R356 AR24 0.01uF C367 AU24 0.01uF C368 100 R358 AP24 0.01uF C369 100 R359 AT24 1500pF C370 100 AR22 TP355 TP356 TP357 /PCM_IOWR TP358 PCM_RST /PCM_REG TP307 /PCM_CE1 TP309 /PCM_WE C335 47pF 50V TP311 R321 75 C334 47pF 50V R320 75 /PCM_OE TP308 D300 ADLC 5S 02 015 5.5V TP359 DSUB_VSYNC_SOC R357 L304 /PCM_WAIT DSUB_B+ BLM15BD121SN1 RGB_DDC_SDA AP22 TP354 /PCM_IORD DSUB_G+ AN9 AR25 SC_ID_SOC DSUB_R+ AR16 RGB_DDC_SCL D302 ADLC 5S 02 015 5.5V SC_COM_SOC AR26 SC_G_SOC AP26 AU26 AP25 TP364 SC_R_IN_SOC TP365 SC_L_IN_SOC TP366 SC_CVBS_IN_SOC TP367 SC_COM_SOC TP368 SC_G_SOC TP369 SC_R_SOC TP370 SC_B_SOC TP371 SC_R_SOC SC_FB_SOC TP372 SC_B_SOC DTV/MNT_V_OUT_SOC TP373 SC_FB_SOC For PCB Pattern C333 / C334 / C335 MTK Recommend : 10 pF SCART_ROUT_SOC AU28 AT28 TP374 SCART_LOUT_SOC TP375 PCM_5V_CTL TP377 SC_DET TP378 AR28 AP27 AR27 AU30 0 AP29 0 OPT R349 R350 DTV/MNT_V_OUT_SOC VDD3V3 AD21 AVDD33_VDAC CVBS2P AD19 CVBS1P AVDD12_RGB +1.2V_MTK_AVDD CVBS0P CVBS_COM VDD3V3 CI_DATA[0-7] EXT_SPK_ROUT_MAIN AM34 AD20 AVDD33_VDAC_BG AT30 AR30 TP324 TXBCLKN VDACY_OUT SY0 SC_CVBS_IN_SOC TP322 TP326 TXB3P AP5 TP321 TP323 TP325 SOY0 OSDA2 AP28 For PCB Pattern TP320 CI_ADDR[9] AT26 COM1 U34 TP319 CI_ADDR[8] VGA_SCL AVSS12_DEMOD 0.047uF Close to Tuner SOG VGA_SDA AM28 10K GP COM AL27 C353 10uF 10V R332 HSYNC ADCINN_DEMOD AVDD33_DEMOD C364 0.1uF +1.2V_MTK_AVDD 33pF TP318 CI_ADDR[7] TXA0N AM4 TP317 CI_ADDR[6] CH1 TXA1P AM3 TP316 CI_ADDR[5] TXA1N AN2 TP315 CI_ADDR[4] TXA2P AN1 TP314 CI_ADDR[3] TXA2N AP2 TP313 CI_ADDR[2] TXACLKN AR2 TP312 CI_ADDR[1] TXA3P AR1 AN25 ADCINP_DEMOD AD22 C310 IF_AGC AL2 AOSDATA0 Close to MT5369 C337 TP304 AL1 Y33 AVSS33_AADC 0.01uF R339 2.2K OPT R334 TP303 TXB4P AL4 AVSS33_DAC1 MPXP 33pF TP302 TXB4N AG30 AIN6_R_AADC VMID_AADC 0 TP301 TXA4P AL3 AL3_ADAC AIN5_L_AADC AJ27 AL14 R346 TXA4N AD2 AD1 AK30 AL15 IF_P AE2 AM37 AL31 C305 1uF 25V TUNER_SIF C312 AE1 EXT_SPK_LOUT_MAIN AIN1_R_AADC AVSS33_DAC AL16 AVSS33_LD AVSS33_COM AE4 AN35 AIN0_R_AADC VDD3V3 VDD3V3 C328 0.1uF AE3 SCART_LOUT_SOC D34 AR13 AF4 BE0P For PCB Pattern AVDD33_USB_P2P3 C302 0.1uF AF3 AT6 BE4N USB_DP_P1 AT13 WIFI_DP AG2 BO0P R343 24K 1% USB_DM_P0 D37 AG1 AT2 AVDD12_LVDS_2 AJ5 D2+_HDMI4_JACK AG4 AE0P AG6 D36 USB_DP2 USB_DM2 VDD3V3 AO1P AO0N AE1P C36 USB_DP1 USB_DM1 USB1 W/ HUB TCON0 TCON1 AA37 AVSS33_HDMI_RX_4 USB Port was changed !!!! AO1N F27 MODEL_OPT_8 AK35 AVDD33_HDMI_0_RX AB30 AD30 AG36 HDMI_2_RX_CB AB29 VDD3V3 AG37 HDMI_1_RX_CB HDMI_0_HPD AO3P D0-_HDMI2_JACK D1+_HDMI2_JACK AE37 HDMI_2_SDA AO3N D0+_HDMI2_JACK AG34 HDMI_0_RX_CB HDMI_1_SDA AG32 MTK_HPD HDMI_HPD_3_JACK +1.2V_MTK_AVDD HDMI_0_SCL AF33 DDC_SDA_2_JACK DDC_SDA_3_JACK HDMI_0_RX_0 HDMI_0_RX_0B AG33 DDC_SCL_2_JACK DDC_SCL_3_JACK AG3 AG35 HDMI_CEC AJ22 AVSS33_VDAC_BG AVDD33_CVBS_1 AVSS12_RGB AVDD33_CVBS_2 AVSS33_VDAC AJ21 C382 0.1uF AL24 AL25 AM26 AVSS33_CVBS_1 AVSS33_CVBS_2 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes xxLT760H-UA MID_MAIN_2 2011.09.29 9 LGE Internal Use Only +3.3V_NORMAL +1.2V_MTK_CORE VDD3V3 C503 10uF C500 10uF 5600mA 60mA L500 BLM18PG121SN1D C510 0.1uF C524 10uF C504 2.2uF C506 10uF C505 10uF C529 0.1uF C532 0.1uF IC105 LGE2112 C535 0.1uF IC105 LGE2112 +1.2V_MTK_CORE +1.2V_MTK_CORE AR7 AT7 AU7 AP8 AR8 +1.2V_MTK_CORE AT8 AU8 AM7 C539 10uF C543 0.1uF C546 0.1uF C548 0.1uF C550 0.1uF C552 0.1uF C553 0.1uF AN7 AP7 AM8 AN8 P14 R14 T14 VDD3V3 U14 AVDD_33SB V14 L501 BLM18PG121SN1D W14 Y14 C509 10uF 10V AA14 C501 0.1uF +1.2V_MTK_CORE +1.2V_MTK_AVDD AB14 AC14 L502 BLM18PG121SN1D AC19 P15 C525 10uF AC15 P16 AC16 V23 W23 Y23 AA23 AC22 VCCK_43 VCCK_31 VCCK_45 VCCK_32 VCCK_47 VCCK_36 VCCK_42 VCCK_8 VCCK_44 VCCK_10 VCCK_46 VCCK_12 VCCK_48 VCCK_33 VCCK_37 VCCK_30 VCCK_39 VCCK_7 VCCK_41 VCCK_29 VCCK_38 VCCK_6 VCCK_40 VCCK_27 VCCK_1 VCCK_5 VCCK_9 VCCK_26 VCCK_11 VCCK_4 VCCK_13 VCCK_34 VCCK_14 VCCK_35 R2 AC23 R3 AD24 J4 P23 R4 R24 Y4 T24 F5 AC24 J5 AC21 R5 P20 Y5 AC20 W5 P19 L7 AC18 M7 P18 R7 AC17 AA5 P17 AB5 AD18 K7 AD23 U7 VCCK_16 W7 VDD3V3 E9 VCCK_18 VCCK_20 E8 AL9 VCCK_22 VCC3IO_B_4 VCCK_23 VCC3IO_B_2 VCCK_28 VCC3IO_B_1 VCCK_2 VCC3IO_B_3 VCCK_24 VCC3IO_A_5 VCCK_3 VCC3IO_A_7 VCCK_25 VCC3IO_A_6 VCCK_15 VCC3IO_A_8 VCCK_17 VCC3IO_A_3 VCCK_19 VCC3IO_A_4 VCCK_21 VCC3IO_A_2 F9 AK10 G14 AK9 J6 AK11 R15 H29 T15 J29 U15 H30 V15 J30 W15 G31 Y15 G32 AA15 F33 AB15 E34 H11 VCC3IO_A_1 R16 T16 U16 V16 DAC_3V3 +5V_NORMAL W16 IC501 AP1117E33G-13 Y16 AA16 AB16 INADJ/GND R17 OUT POWER_ON/OFF1 T17 C526 10uF 10V TP500 U17 V17 Y17 T18 V18 Y18 R500 1 T19 V19 Y19 C540 10uF 10V C544 0.1uF 16V W17 AA17 AB17 R18 AB6 H19 H22 J11 J12 J22 R6 DVSS_51 DVSS_55 DVSS_52 DVSS_62 DVSS_37 DVSS_73 DVSS_53 DVSS_83 DVSS_107 DVSS_92 DVSS_20 DVSS_104 DVSS_38 DVSS_117 DVSS_54 DVSS_127 DVSS_108 DVSS_137 DVSS_95 DVSS_29 DVSS_44 DVSS_63 DVSS_46 DVSS_74 DVSS_56 DVSS_84 DVSS_120 DVSS_93 DVSS_130 DVSS_105 DVSS_43 DVSS_118 DVSS_77 DVSS_128 DVSS_97 DVSS_138 DVSS_13 DVSS_64 DVSS_12 DVSS_75 DVSS_22 DVSS_85 DVSS_28 DVSS_94 DVSS_39 DVSS_106 DVSS_57 DVSS_119 DVSS_68 DVSS_129 DVSS_78 DVSS_139 DVSS_87 DVSS_65 DVSS_99 DVSS_76 DVSS_112 DVSS_86 DVSS_122 DVSS_140 DVSS_132 DVSS_96 DVSS_34 DVSS_30 DVSS_58 DVSS_27 DVSS_69 DVSS_109 DVSS_79 DVSS_17 DVSS_88 DVSS_25 DVSS_100 DVSS_45 DVSS_113 DVSS_66 DVSS_123 DVSS_7 DVSS_133 DVSS_14 DVSS_59 DVSS_8 DVSS_70 DVSS_18 DVSS_80 DVSS_26 DVSS_89 DVSS_33 DVSS_114 DVSS_136 DVSS_71 DVSS_126 DVSS_90 DVSS_49 DVSS_115 DVSS_103 DVSS_72 DVSS_82 DVSS_91 DVSS_61 DVSS_116 DVSS_110 DVSS_101 DVSS_135 DVSS_124 DVSS_125 DVSS_134 DVSS_102 DVSS_60 DVSS_131 DVSS_81 DVSS_121 DVSS_35 DVSS_47 DVSS_36 DVSS_67 DVSS_40 DVSS_98 DVSS_41 DVSS_111 DVSS_42 DVSS_11 R20 T20 U20 V20 W20 Y20 AA20 AB20 G16 R21 T21 U21 V21 W21 Y21 AA21 AB21 R22 T22 U22 V22 W22 Y22 AA22 AB22 R23 T23 U23 AB23 W6 G17 F25 Y6 E21 F21 L8 T7 D11 E11 D12 E22 F22 G25 AB19 AA19 P22 W19 U19 R19 Y7 AB18 AA18 W18 U18 AA7 N22 T8 W8 Y8 E7 F8 DVSS_21 +3.3V_NORMAL 3.3V_EMMC L504 BLM18PG121SN1D +3.3V_NORMAL EMMC_VCCQ L506 BLM18PG121SN1D C512 0.1uF 16V C522 0.1uF 16V DECAP FOR SOC (HIDDEN - UCC) +1.2V_MTK_CORE +1.2V_MTK_CORE C514 0.1uF C520 0.1uF +1.5V_DDR C508 0.1uF THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes C527 0.1uF C531 0.1uF C537 0.1uF C545 0.1uF +1.5V_DDR C523 0.1uF C533 0.1uF xxLT760H-UA MID_MAIN_3 C536 0.1uF C547 0.1uF 2011.09.29 10 LGE Internal Use Only PLACE AT JACK SIDE R610 51K SC_ID SC_ID_SOC 1/16W 1% R613 10K READY FOR FILTER (EMI) R611 SC_CVBS_IN_IF SC_CVBS_IN 120-ohm R604 75 1% C607 100pF C601 10pF OPT SC_FB_SOC SC_FB R608 75 1% R609 22 PLACE AT MAIN SOC SIDE SC_R R605 75 1% R623 100 C615 0.01uF R622 100 C614 0.01uF SC_R_SOC C604 10pF SC_G_SOC SC_G R606 75 1% C605 10pF SC_B R607 75 1% R620 100 C612 0.01uF R621 100 C613 0.01uF SC_COM_SOC SC_B_SOC PLACE AT IC8602 C606 10pF SC_CVBS_IN_IF SCART_ROUT_SOC R617 100 15K C616 0.047uF 15K SCART_Rout C610 10uF 16V 0 R633 R619 +12V OPT R628 100K OPT R631 100K SCART_Lout R603 330pF 50V READY FOR FILTER (EMI) OPT R630 100K R632 R618 R627 330pF 50V SCART_LOUT_SOC +12V SC_CVBS_IN_SOC 0 OPT R629 100K R614 0 SC_L_IN SC_L_IN_SOC R625 30K R601 470K OPT 1/16W 5% C608 100pF 50V C602 330pF 50V OPT C611 10uF 16V R624 0 SC_R_IN SC_R_IN_SOC R602 470K OPT R626 30K 1/16W 5% C609 100pF 50V C603 330pF 50V OPT READY FOR FILTER (EMI) R600 DTV/MNT_V_OUT_SOC R616 75 1% TU_CVBS THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes R615 75 1% 0 C600 220pF OPT C617 220pF OPT DTV/MNT_V_OUT TP600 MID_MAIN_SCART 2011.11.21 11 LGE Internal Use Only +1.5V_DDR IC703 H5TQ2G63BFR-PBC IC701 H5TQ2G63BFR-PBC A_RVREF2 A_RVREF4 M8 A0 VREFCA A1 A_RVREF1 A_RVREF1 C713 0.1uF R706 1K 1% A3 VREFDQ R710 R707 1K 1% A2 H1 1% 240 A4 A5 L8 A6 ZQ C714 0.1uF +1.5V_DDR A7 A8 B2 D9 G7 +1.5V_DDR K2 K8 A_RVREF4 C715 0.1uF R708 1K 1% N1 N9 R1 R9 VDD_1 A9 VDD_2 A10/AP VDD_3 A11 VDD_4 A12/BC VDD_6 D2 E9 F1 H2 N3 M8 N3 VREFCA A0 P7 P7 A1 P3 P3 A2 N2 N2 H1 VREFDQ A3 P8 P8 A4 P2 P2 A5 R8 R2 R8 L8 ZQ A6 R2 A7 T8 T8 A8 R3 L7 R7 N7 T3 A9 VDD_1 A10/AP VDD_2 A11 VDD_3 A12/BC VDD_4 BA0 R3 L7 G7 R7 K2 N7 T3 K7 CK VDDQ_2 VDDQ_3 VDDQ_4 CKE K1 K3 L3 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 C1 K7 C9 K9 F1 K1 H2 J3 K3 G3 DML VSS_4 DMU VSS_5 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 A9 C7 B3 B7 E7 D3 F7 M9 P1 F2 P9 F8 T1 H3 T9 H8 G2 DQU0 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 VSS_4 VSS_5 DQL0 VSS_7 VSS_6 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 K8 N1 N9 R1 R1 R9 R9 VDD_3 D1 C3 D8 C8 E2 C2 E8 A7 F9 A2 G1 B8 G9 A3 DQL5 VSS_12 NC_6 VDD_7 A1 A1 A8 A8 C1 C1 C9 C9 D2 D2 E9 E9 F1 F1 H2 H2 H9 H9 J1 J1 J9 J9 L1 L1 L9 L9 T7 T7 A9 A9 L1 P2 R8 L9 R2 T8 VSSQ_1 DQU0 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 VSSQ_8 DQU6 R3 T7 ARA[14] L7 CK VDDQ_4 CKE VDDQ_5 VDDQ_2 CK CK A9 M2 B3 M3 E1 J7 G8 K7 K9 J2 L2 J8 CKE VDDQ_5 VDDQ_6 CS ODT VDDQ_8 RAS VDDQ_9 CAS K1 M1 J3 K3 M9 L3 WE NC_1 NC_2 B3 E1 G8 G8 J2 J2 J8 J8 P1 T2 RESET P9 NC_3 NC_4 F3 DQSL M1 M1 M9 M9 P1 P1 P9 P9 T1 T1 T9 T9 VSS_1 DQSU VSS_2 DQSU G3 T1 C7 T9 B7 VSS_3 CS VDDQ_7 ODT VDDQ_8 RAS CAS DML DMU VSS_8 DQL1 DQL2 VSS_10 DQL3 VSS_11 DQL4 VSS_12 B1 B1 B9 B9 D1 D1 D8 D8 E2 E2 E8 E8 F9 F9 G1 G1 G9 G9 VSSQ_9 B9 F2 F8 D1 H3 H8 D8 G2 H7 E2 DQL7 VSSQ_1 D7 VSSQ_2 DQU0 DQU1 VSSQ_4 DQU2 VSSQ_5 DQU3 VSSQ_6 DQU4 VSSQ_7 DQU5 VSSQ_8 DQU6 VSSQ_9 DQU7 A_RVREF3 L8 A6 ARA[11] R7 A10/AP VDD_2 ARA[11] ARA[12] N7 ARA[13] T3 A11 VDD_3 A12/BC VDD_4 ARA[13] A13 VDD_5 A15 M3 K3 /ARCAS /ARCAS L3 J3 /ARRAS /ARRAS K3 K1 ARODT ARODT L3 /ARWE /ARWE F3 DQSL CK VDDQ_2 CK VDDQ_3 CKE VDDQ_4 DQSU VSS_2 DQSU CS VDDQ_6 VSS_3 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 IC105 LGE2112 E9 F1 H2 +1.5V_DDR H9 DML VSS_4 E8 C3 C8 F9 C2 A7 G1 A2 B8 G9 A3 ARDQM0 D3 ARDQM1 DMU VSS_5 ARDQ[16-23] ARDQ[0-7] VSS_6 E3 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 VSS_10 DQL3 VSS_11 DQL4 VSS_12 DQL5 F7 F8 H3 H8 G2 VSSQ_3 DQU1 VSSQ_4 DQU2 VSSQ_5 DQU3 VSSQ_6 DQU4 VSSQ_7 DQU5 VSSQ_8 DQU6 VSSQ_9 DQU7 F7 F2 F8 ARDQ[20] H3 ARDQ[21] H8 ARDQ[22] G2 ARDQ[23] H7 H7 ARDQ[24-31] D7 DQU0 E3 ARDQ[19] ARDQ[8-15] VSSQ_2 ARDQ[16] ARDQ[17] ARDQ[18] F2 DQL7 VSSQ_1 D3 ARDQM3 C3 C8 C2 A7 A2 B8 ARDQ[24] C3 ARDQ[26] C8 ARDQ[27] C2 ARDQ[28] A7 ARDQ[29] A2 ARDQ[30] B8 ARDQ[31] A3 A3 IC703-*3 H5TQ2G63DFR-PBC AC1 AC2 P3 N2 P8 L9 NC_4 DQSL P7 L1 T7 NC_6 P2 R8 ARA[14] R2 T8 R3 L7 N7 A9 DQSU VSS_1 DQSU VSS_2 VSS_4 DMU VSS_5 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 N8 M3 VREFCA P3 A3 VREFDQ K7 K9 M1 P2 A5 A6 K1 J3 K3 P1 L3 T8 A9 VDD_1 A10/AP VDD_2 A11 VDD_3 A12 VDD_4 NC_6 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 VDDQ_3 CKE VDDQ_4 CS VDDQ_6 VDDQ_5 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 NC_2 NC_3 NC_4 DQSL DQSU DQSU B1 VSSQ_1 B9 VSSQ_2 VSSQ_3 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 D3 D1 D8 F8 E2 H8 E8 H7 F9 D7 G1 C8 G9 A7 F2 DML VSS_4 VSS_5 VSS_6 H3 G2 DQL1 VSS_7 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 N8 C3 C2 A2 VSSQ_9 B8 A3 L8 C1 K7 C9 K9 R2 T8 B2 A9 VDD_1 A10/AP VDD_2 A11 VDD_3 A12/BC VDD_4 A13 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 L2 F1 K1 H2 J3 H9 K3 L3 N7 T3 VDDQ_2 CK VDDQ_3 CKE VDDQ_4 CS VDDQ_6 VDDQ_5 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 NC_3 L9 NC_4 F3 A9 C7 B3 B7 C1 K7 C9 K9 D2 E9 K1 H2 J3 H9 K3 J2 D3 M1 E3 F7 P1 F2 P9 F8 T1 H3 T9 H8 DML VSS_4 DMU VSS_5 G2 H7 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 J9 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 D1 C3 D8 C8 C2 E2 E8 A7 F9 A2 G1 B8 G9 A3 VDD_3 VDD_4 C3 K2 K8 AC3 N1 N9 VDD_7 AC4 R1 VDD_8 R9 VDD_9 BA0 A8 VDDQ_2 CK VDDQ_3 CKE VDDQ_4 CS VDDQ_6 C1 VDDQ_7 VDDQ_8 CAS VDDQ_9 J2 D3 J8 M1 E3 M9 F7 P1 F2 P9 F8 T1 H3 T9 H8 G2 H7 VSSQ_2 DQU0 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 G21 H9 J1 NC_1 VSSQ_7 DQU5 VSSQ_8 DQU6 D1 C3 C8 E2 C2 E8 A7 F9 A2 G1 B8 G9 A3 VSSQ_9 DQU7 DDR_HYNIX DDR_HYNIX DDRV_5 ARDQ1 DDRV_8 ARDQ2 DDRV_10 ARDQ3 DDRV_4 ARDQ4 DDRV_7 ARDQ5 DDRV_46 ARDQ6 DDRV_47 ARDQ7 ARDQM1 MEMTN ARDQS1 ARDQS1 RVREF_B ARDQ8 RVREF_A ARDQ9 L1 ARDQ11 F10 ARCKE ARDQ12 ARCKE A9 DML VSS_4 DMU VSS_5 DQL0 VSS_7 DQL1 VSS_8 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 C9 G8 /ARCLK1 J2 J8 VSS_6 DQL2 ARCLK1 E1 A21 /ARCLK0 T1 T9 VSSQ_3 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 +1.5V_DDR B9 F17 /ARRAS D1 E17 D8 /ARCAS E2 E16 E8 RVREF_A F9 VSSQ_7 DQU5 G1 VSSQ_8 DQU6 ARCLK1 ARDQ15 ARCLK0 ARDQM2 ARCLK0 ARDQS2 R730 1K 1% G9 VSSQ_9 /ARCS C746 0.1uF D14 /ARWE R731 1K 1% C747 0.1uF C760 1uF 10V ARODT ARDQ16 ARRAS ARDQ17 ARCAS ARDQ18 ARCS ARDQ19 ARWE ARDQ20 ARDQ21 B14 ARREST DDR_HYNIX_NEW ARRESET ARDQ22 ARBA0 G11 ARBA1 D16 ARBA0 R732 1K 1% R733 1K 1% +1.5V_DDR C726 0.1uF C728 0.1uF C705 1uF C17 D24 C16 C24 D15 ARDQM1 B20 ARDQS1 C20 ARDQ[8-15] /ARDQS1 A17 A23 D17 B23 D20 D22 D19 C22 C748 0.1uF C749 0.1uF C761 1uF 10V C707 10uF 10V @optio ARDQM2 B9 ARDQS2 A9 /ARDQS2 C12 ARDQ[16-23] D6 B12 C5 C13 A5 A12 B5 E10 ARBA1 ARDQM3 ARBA2 ARDQS3 ARDQS3 ARCSX ARA[14]C15 ARA[13]A15 RVREF_B C724 0.1uF D23 ARDQ23 A13 +1.5V_DDR C722 0.1uF ARDQ[0-7] /ARDQS0 B17 A7 ARDQS2 E18 ARODT B1 VSSQ_1 DQU1 ARDQ14 A20 ARCLK0 P1 P9 VSSQ_2 DQU2 ARCLK1 F18 C720 0.1uF ARDQS0 C23 M1 M9 DQL6 DQU0 ARDQ13 D9 B3 VSS_2 VSS_3 ARBA2 C718 0.1uF ARDQM0 C21 B21 D21 MEMTP L9 T7 NC_6 VSS_1 DQSU DQU7 DDR_SS ARDQ0 ARDQ10 DDR_NANYA DDR_NANYA DDRV_2 J9 NC_4 DQSL D7 D8 ARDQS0 G13 F1 H2 DQL7 B9 ARDQS0 DDRV_1 E9 NC_2 DQSU E7 G9 TP701 RVREF_A RVREF_B D2 VDDQ_5 ODT RAS TP700 C9 NC_3 C7 B7 E1 G8 ARDQM0 DDRV_45 G10 A1 VDDQ_1 CK F3 A9 B3 C19 DDRV_44 BA1 L9 T7 B3 D9 G7 VDD_5 VDD_6 RESET B1 VSSQ_1 D7 B9 VDD_1 VDD_2 A11 A12/BC T2 DQL6 DQL7 B1 VSSQ_1 VSSQ_2 A9 A10/AP DQSL VSS_2 VSS_3 J8 M9 D4 B2 WE L1 C4 L8 ZQ A7 A8 L2 F1 G3 VSS_1 DQSU DQSU E7 A5 A6 J7 NC_6 DQSL E1 G8 B4 BA2 A8 L3 NC_1 VREFDQ A3 A4 NC_5 J1 NC_2 A4 H1 M2 A1 VDDQ_1 CK A1 A2 M7 R1 R9 A3 M8 VREFCA A0 A13 N1 N9 N8 RESET G3 L7 R7 K2 K8 M3 L1 T7 D9 G7 BA1 T2 J9 R3 BA2 D2 E9 R8 ZQ A7 A8 J7 A8 DQL6 DQL7 DQU0 A5 A6 DQSL VSS_2 DMU DQL0 P8 P2 M2 NC_7 VSS_1 VSS_3 E3 F7 VREFDQ M7 DQSL E7 A3 A4 WE C7 B7 DQU2 N7 T3 N2 P7 R1 R9 N3 H1 P3 N1 N9 M8 VREFCA A1 A2 J1 NC_1 F3 DQL7 DQU1 L7 R7 K2 K8 A0 A1 VDDQ_2 CK T1 DQL6 DQU0 D9 G7 M3 VDDQ_1 CK RESET G3 R3 BA1 T2 T9 R2 B2 WE P9 R8 L8 ZQ A7 A8 L2 M9 P8 A4 J7 J8 N2 H1 BA2 J2 P7 A1 A2 M2 G8 VSS_6 DQL0 A0 M7 E1 VSS_3 DML T3 B3 N3 M8 N3 J9 NC_2 D7 ARDQ[25] IC703-*2 K4B2G1646C-HCK0 IC703-*1 NT5CB128M16BP-DI J1 NC_1 E7 ARDQM2 C734 0.1uF D2 R7 E7 C704 10uF 10V C9 DQSL B7 /ARDQS3 /ARDQS1 C702 1uF A8 C7 ARDQS3 ARDQS1 B7 C757 0.1uF C1 VDDQ_5 F3 /ARDQS2 /ARDQS0 C7 VSS_1 C755 0.1uF A1 RESET G3 R719 1K 1% R9 WE ARDQS2 ARDQS0 G3 C753 0.1uF R1 NC_3 NC_4 C751 0.1uF N9 VDDQ_1 T2 ARREST ARREST N1 BA1 L2 /ARCS /ARCS J3 K9 C745 0.1uF C733 0.1uF R718 1K 1% VDD_9 J7 K7 ARCKE /ARCLK1 /ARCLK0 C701 10uF 10V +1.5V_DDR +1.5V_DDR A_RVREF3 K8 BA2 R714 100 5% R712 100 5% ARCKE C703 1uF K2 VDD_8 BA0 ARCLK0 K7 K1 M3 ARBA2 ARBA2 K9 N8 C758 0.1uF @optio C736 0.1uF G7 VDD_7 M2 ARBA1 ARCLK1 R721 1K 1% D9 VDD_6 M7 ARBA1 C756 0.1uF +1.5V_DDR VDD_1 ARA[12] N8 C754 0.1uF B2 A9 R7 ARBA0 1% 240 R716 ZQ A7 A8 T3 ARBA0 C735 0.1uF R720 1K 1% VREFDQ A4 NC_3 B1 F7 DQL5 VSSQ_3 ARA[10] A_RVREF2 H1 A3 N7 T2 DQL6 E3 DQL0 VSS_9 L7 T8 ARA[9] R3 ARA[10] L7 RESET NC_2 D3 VSS_6 VSS_7 ARA[8] WE NC_1 E7 VSS_4 VSS_5 ARA[6] R8 ARA[7] R2 ARA[8] ARA[6] DQSL M7 N8 VDDQ_3 VDDQ_7 A5 ARA[7] ARA[9] L2 VDDQ_6 NC_6 BA2 VDDQ_4 A2 R3 R2 VREFCA A1 ARA[3] N2 ARA[4] P8 ARA[5] P2 T8 R8 C752 0.1uF M8 A0 T3 BA0 VDDQ_1 NC_7 B3 E1 DDR_SS DDR_HYNIX_NEW VDDQ_3 R7 NC_5 VDD_8 VDD_9 J9 N2 P8 ARA[5] J7 CK VDDQ_2 N7 A12 VDD_5 VDD_6 DQL6 DQU7 VSSQ_9 DQU7 A11 VDD_4 DQL6 D7 B9 VSSQ_8 DQU6 A3 VSS_2 VSS_3 B1 VSSQ_1 A2 VSS_1 DML DMU VDDQ_1 J1 P7 P3 DQSL DQSU DQL7 DQL7 B8 K2 K8 N1 N9 NC_6 DQSL E3 M1 H7 D7 C2 NC_4 DQSU G8 J2 DQL6 A7 NC_1 NC_2 J8 VSS_6 E3 C3 VDDQ_8 VDDQ_9 E1 VSS_3 C8 G7 K2 A9 A10/AP DQSL VSS_2 DQSU H8 VDDQ_6 VDDQ_7 RAS CAS F3 T7 VSS_1 DQSU G2 CS ODT NC_3 NC_6 DQSL H7 VDDQ_4 VDDQ_5 RESET DQSL E7 F8 VDDQ_2 VDDQ_3 L1 C7 H3 CK CK L9 NC_4 F3 F7 VDDQ_1 WE NC_2 A8 VDD_1 VDD_2 BA1 T2 J9 D9 G7 VDD_9 CKE L3 NC_3 F2 VDD_7 VDD_8 J1 RESET D3 VDD_5 VDD_6 BA0 L2 H9 NC_1 B7 VDD_3 VDD_4 D9 BA1 J7 E9 WE T2 G3 A11 A12/BC D2 VDDQ_5 L2 J3 A7 VDD_1 VDD_2 BA2 CK A6 B2 B2 A9 A10/AP NC_5 A8 ZQ A7 A8 A1 VDDQ_1 A3 A5 L8 L8 ZQ A13 N8 BA2 J7 K9 A5 M2 M3 A0 A2 VREFDQ A4 A6 H9 N3 VREFCA A1 R1 R9 VDD_9 H1 VREFDQ A3 A4 M7 N9 VDD_7 VDD_8 BA0 BA1 M3 M8 H1 A1 A2 ARA[4] P2 BA2 VDDQ_9 M8 VREFCA A0 N1 VDD_6 NC_5 N8 B2 D9 K8 VDD_5 A13 M7 M2 IC701-*1 NT5CB128M16BP-DI IC701-*2 K4B2G1646C-HCK0 IC701-*3 H5TQ2G63DFR-PBC ARA[3] P8 M2 A1 C9 ARA[2] N2 M7 VDD_8 BA1 C1 P3 ARA[0] N3 ARA[1] P7 ARA[2] P3 A15 VDD_7 C716 0.1uF A8 ARA[0] ARA[1] A13 VDD_5 VDD_9 R709 1K 1% N3 P7 C750 0.1uF ARA[0-13] ARA[0-13] +1.5V_DDR +1.5V_DDR ARDQ24 ARDQ25 ARA14 ARDQ26 ARA[12]F13 ARA[11]C14 ARA13 ARDQ27 ARA12 ARDQ28 ARA[10]F11 ARA[9] E15 ARA11 ARDQ29 ARA10 ARDQ30 ARA[8] D13 ARA[7] B15 ARA9 ARDQ31 ARA[6] E14 ARA[5] F16 ARA7 ARA6 AVDD33_MEMPLL ARA[4] E13 ARA[3] B13 ARA5 AVSS33_MEMPLL ARA[2] A14 ARA[1] F14 ARA3 ARA2 DVSS_50 ARA[0] F15 ARA1 DVSS_48 ARDQM3 C8 ARDQS3 D8 ARDQ[24-31] /ARDQS3 C6 D10 D7 C11 C7 C10 B7 B10 AVDD3V3_MEMPLL ARA8 N14 +3.3V_NORMAL AVDD3V3_MEMPLL N15 L700 BLM18PG121SN1D ARA4 R1 C700 0.1uF P21 C759 10uF 10V ARA0 ARA[0-14] +1.5V_DDR C717 0.1uF C719 0.1uF C721 0.1uF C723 0.1uF C725 0.1uF C727 0.1uF C706 1uF C708 10uF 10V IC105 LGE2112 RVREF_C @optio RVREF_D P13 V7 F3 /BRCLK0 V3 B_RVREF6 +1.5V_DDR A0 VREFCA R702 1K 1% A1 B_RVREF5 C709 0.1uF A2 H1 A3 VREFDQ A4 R703 1K 1% R711 C710 0.1uF 1% 240 A5 L8 A6 ZQ +1.5V_DDR A7 A8 B2 D9 +1.5V_DDR G7 K2 B_RVREF6 R704 1K 1% K8 C711 0.1uF N1 N9 R1 R705 1K 1% R9 A9 VDD_1 VDD_2 A10/AP VDD_3 A11 A12/BC VDD_4 VDD_6 C1 C9 D2 E9 F1 H2 H9 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 VREFCA A0 P7 A2 H1 VREFDQ A3 A4 P8 P2 L8 ZQ R2 A8 B2 VDD_1 A9 A10/AP VDD_2 A11 VDD_3 A12/BC VDD_4 A13 VDD_5 NC_5 VDD_7 VDD_6 VDD_8 M2 M3 BA0 J3 K3 L3 T8 R3 L7 R7 N7 T3 VDDQ_1 CK VDDQ_2 CK VDDQ_3 CKE VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 T2 NC_2 RESET NC_3 NC_4 F3 H2 H9 K7 J3 L3 VDD_1 VDD_2 VDD_3 A11 A12/BC VDD_4 A13 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 A8 B2 D9 D9 G7 G7 K2 K2 K8 K8 N1 N1 N9 N9 R1 R1 R9 R9 VDD_1 A9 VDD_2 A10/AP VDD_3 A12 NC_6 VDD_6 VDD_7 BA1 BA2 VDDQ_1 VDDQ_2 CK CK VDDQ_3 CKE VDDQ_4 CS VDDQ_6 VDDQ_5 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 NC_1 T2 NC_2 RESET L9 NC_3 NC_4 F3 A1 A1 A8 A8 C1 C1 C9 C9 D2 D2 E9 E9 F1 F1 H2 H2 H9 H9 J1 J1 J9 J9 L1 L1 L9 L9 T7 T7 VDDQ_1 VDDQ_2 VDDQ_3 CK CKE VDDQ_5 VDDQ_6 DQSU VSS_1 DQSU VSS_2 DML VSS_4 VSS_3 E7 D3 VSS_5 DMU VSS_6 E3 F7 F2 F8 H3 H8 G2 H7 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 VSSQ_1 C8 A7 A2 B8 A3 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 VSSQ_5 DQU3 VSSQ_6 DQU4 VSSQ_7 DQU5 VSSQ_8 DQU6 VSSQ_9 DQU7 VSS_2 DQSU J8 VSS_3 E7 D3 M9 P1 DML VSS_4 DMU VSS_5 P9 T1 T9 VSS_6 E3 F7 F2 F8 H3 H8 G2 DQU0 VSS_1 DQSU M1 B1 D7 C2 E1 C7 B7 H7 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 VDDQ_7 ODT VDDQ_8 RAS VDDQ_9 CAS NC_1 NC_2 D8 E2 E8 F9 G1 G9 C3 C2 A7 A2 B8 A3 BRA[14] T7 A9 A9 B3 B3 CK VDDQ_3 CK VDDQ_4 CKE VDDQ_5 CS VDDQ_7 ODT VDDQ_8 RAS VDDQ_9 CAS E1 E1 G8 G8 J2 J2 J8 J8 M1 M1 M9 M9 P1 P1 P9 P9 T1 T1 T9 T9 VSS_2 VSS_4 DML DMU DQL0 DQL1 VSS_9 DQL2 VSS_10 DQL3 VSS_11 DQL4 VSS_12 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 DQU0 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 B1 B1 B9 B9 D1 D1 D8 D8 E2 E2 E8 E8 F9 F9 G1 G1 G9 G9 VSSQ_1 VSSQ_2 M2 G8 N8 M3 J2 J8 K7 K9 M1 M9 K1 J3 P1 K3 L3 P9 T1 VSSQ_3 DQU1 VSSQ_4 DQU2 VSSQ_5 DQU3 VSSQ_6 DQU4 VSSQ_7 DQU5 VSSQ_8 DQU6 VSSQ_9 DQU7 BRA[4] N2 BRA[4] P8 BRA[5] P2 BRA[6] R8 T8 BRA[8] A6 R3 BRA[9] BRA[7] R2 BRA[8] T8 L7 BRA[10] A8 R7 BRA[11] BRA[9] R3 BRA[10] L7 A9 VDD_1 N7 BRA[12] A10/AP VDD_2 T3 BRA[13] BRA[11] R7 BRA[12] N7 BRA[13] T3 A12/BC VDD_4 A13 VDD_5 N8 M3 BRBA0 BRBA2 BRBA1 K1 J3 K3 L3 BRBA2 BRCLK1 R713 100 5% K7 K9 BRCLK0 F3 G3 C7 VSS_1 DQSU VSS_2 DQSU BRCKE /BRCS /BRCLK1 /BRCS BRODT BRODT /BRRAS E7 DML VSS_4 /BRCAS /BRRAS /BRWE /BRCAS BRREST VSS_6 BRDQS0 BRDQS2 /BRDQS0 DQL0 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 VSS_11 DQL4 VSS_12 DQL5 D1 F7 F2 D8 F8 H3 E2 H8 G2 E8 H7 F9 C3 G1 C8 C2 A7 G9 BRDQS3 /BRDQS1 BRDQM0 BRDQM2 BRDQM1 BRDQM3 BRDQ[16-23] F7 BRDQ[16] BRDQ[17] F2 BRDQ[18] F8 BRDQ[19] H3 BRDQ[20] H8 BRDQ[21] G2 BRDQ[22] H7 DQL7 B1 BRDQ[23] BRDQ[8-15] VSSQ_1 D7 VSSQ_2 DQU0 VSSQ_3 DQU1 VSSQ_4 DQU2 VSSQ_5 DQU3 VSSQ_6 DQU4 VSSQ_7 DQU5 VSSQ_8 DQU6 DQU7 VSSQ_9 A2 B8 M3 A11 VDD_3 VDD_6 VDD_7 VDD_8 BA0 K1 K3 L3 R728 1K 1% D9 G7 B_RVREF8 K2 CK VDDQ_2 CK VDDQ_3 CKE VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 K8 NC_1 RESET NC_2 NC_4 F3 DQSL R723 1K 1% R1 R9 D2 E9 F1 DML VSS_4 DMU VSS_5 VSS_6 E3 F8 H3 H8 G2 H7 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 BRDQ[24-31] C3 BRDQ[24] C8 BRDQ[25] L1 P3 L9 P8 T7 R8 P7 N2 P2 BRA[14] R2 C2 BRDQ[26] A7 BRDQ[27] A2 BRDQ[28] B8 BRDQ[29] A3 BRDQ[30] B8 BRDQ[31] A3 C3 C8 C2 A7 A2 J2 J8 M1 M9 P1 P9 T1 R7 N7 T3 DDR_SS THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes DDR_NANYA A0 M3 P3 H1 VREFDQ A4 P2 A5 A6 L8 ZQ T8 A8 VDD_1 A10/AP VDD_2 A11 VDD_3 A12 VDD_4 NC_6 VDD_5 VDD_6 VDD_7 VDD_8 BA0 J3 L3 T9 T3 N9 R9 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 T2 RESET DQSL J7 K7 NC_2 E9 L2 K1 H2 J3 H9 K3 J9 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 A3 B9 D1 D8 E2 E8 VSS_1 VSS_3 DMU F7 F2 F8 H3 H8 G2 H7 VSS_4 VSS_5 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 G1 G9 C8 C2 A7 A2 B8 VDD_4 A13 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 B2 R3 D9 L7 G7 R7 K2 N7 K8 T3 N1 N9 R9 M5 BRA[10] P4 BRA[9] M3 BRA[8] L6 BRA[7] L3 BRA[6] N4 BRA[5] K5 BRA[4] N6 BRA[3] N2 BRA[2] M1 BRA[1] N3 BRA[0] K6 BRODT BRDQM1 BRCAS BRDQS1 BRCS BRDQS1 BRDQ8 BRBA0 BRDQ9 BRBA1 BRDQ10 BRBA2 BRDQ11 BRDQ12 M3 VDDQ_1 CK VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 A8 J7 K7 K9 E9 L2 F1 K1 H2 J3 H9 K3 L3 NC_2 NC_4 F3 J9 C7 B3 B7 E1 G8 E7 J2 D3 M9 F7 F2 P9 F8 T1 H3 T9 H8 H7 DQU0 VSSQ_2 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 VSS_1 VSS_2 DML VSS_4 VSS_3 VSS_5 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 B9 D7 D1 C3 D8 C8 E2 C2 E8 A7 F9 A2 G1 B8 G9 A3 VDD_4 A13 VDD_5 NC_5 VDD_7 BA0 VDD_9 VDD_6 VDD_8 D9 VDDQ_1 CK VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 CS VDDQ_6 ODT VDDQ_7 RAS VDDQ_8 CAS VDDQ_9 NC_1 NC_2 NC_3 NC_4 F3 A9 C7 B3 B7 E1 G8 E7 J2 D3 R9 V6 M9 F7 F2 P9 F8 T1 H3 T9 H8 G2 H7 VSSQ_1 DQU0 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 DQSU VSS_1 DQSU VSS_2 DML VSS_4 VSS_3 VSS_5 VSS_6 DQL0 VSS_7 DQL1 VSS_8 DQL2 VSS_9 DQL3 VSS_10 DQL4 VSS_11 DQL5 VSS_12 A8 C1 B9 D7 D1 C3 D8 C8 E2 C2 E8 A7 F9 A2 G1 B8 G9 A3 H10 C9 D2 H13 E9 F1 E20 H2 H9 F20 J1 G20 J9 L1 G15 L9 T7 G18 B3 C25 E1 G8 B25 J2 J8 A25 M1 M9 H7 P1 P9 H8 T1 T9 J8 BRDQM0 BRDQS0 /BRDQS0 BRDQ[0-7] J1 B2 J2 C2 K1 A2 K2 BRA14 F2 J3 BRDQM1 BRDQS1 /BRDQS1 BRDQ[8-15] B1 H3 D3 G3 C1 G4 D2 BRDQ15 BRA13 Y1 BRA12 BRDQM2 BRA11 BRDQS2 BRA10 BRDQS2 BRA9 BRDQ16 BRA8 BRDQ17 BRA7 BRDQ18 BRA6 BRDQ19 BRA5 BRDQ20 BRA4 BRDQ21 BRA3 BRDQ22 BRA2 BRDQ23 BRA1 V2 V1 T4 BRDQS3 BRDQ24 DDRV_11 BRDQ25 DDRV_13 BRDQ26 DDRV_38 BRDQ27 DDRV_42 BRDQ28 DDRV_40 BRDQ29 DDRV_14 BRDQ30 DDRV_18 BRDQ31 DDRV_23 BRDQ[16-23] /BRDQS2 P2 AB3 P3 AB1 P1 AB2 W3 W4 AA3 BRDQM3 BRDQS3 /BRDQS3 BRDQ[24-31] U4 AA4 T3 Y3 U3 Y2 U2 M2 BRRESET DDRV_39 BRDQM2 BRDQS2 AB4 U1 BRDQM3 BRDQS3 DDRV_41 F1 +1.5V_DDR BRREST E23 DDRV_48 DDRV_16 DDRV_19 DDRV_22 DDRV_24 DDRV_29 DDRV_49 DDRV_21 DDRV_36 DDRV_28 DDRV_37 DDRV_17 DDRV_43 DVSS_15 DDRV_35 DVSS_23 DDRV_32 DVSS_1 DDRV_33 DVSS_3 DDRV_15 DVSS_5 DDRV_20 DVSS_9 DDRV_27 DVSS_16 DDRV_25 DVSS_24 DDRV_26 DVSS_31 DDRV_12 DVSS_32 DDRV_9 DVSS_19 DDRV_6 DVSS_2 DDRV_3 DVSS_4 DDRV_30 DVSS_6 DDRV_31 DVSS_10 F24 G24 F23 G23 E24 E12 F12 A18 B18 C18 D18 E19 F19 G19 G22 E25 A26 B26 C26 D26 DDRV_34 DQL6 DQL7 B1 J10 D25 E3 P1 P7 A9 DMU J8 M1 N7 N9 R1 NC_6 DQSL AC6 K8 N1 A1 CK G7 G7 K2 BA1 RESET G3 DQL6 DQL7 B1 DQU1 DQSU DQSU E3 P1 VDD_2 VDD_3 A12/BC DQSL DMU J8 M1 B2 VDD_1 A10/AP A11 L9 T7 AC5 F7 A8 A9 T2 L1 NC_6 DQSL ZQ A6 A7 WE J1 NC_1 L8 CKE D2 T6 A4 A5 BA2 C1 C9 H1 VREFDQ BRDQ13 BRDQ14 BRCSX G6 A1 D1 BRRAS G5 U6 A2 A3 M2 N8 A1 CK VREFCA A0 A1 M7 R1 BA1 NC_3 G2 VSSQ_1 D7 C3 VDD_2 VDD_3 A12/BC RESET A9 DQL6 DQL7 F9 VDD_1 A10/AP A11 L9 T7 R2 T8 A8 A9 T2 L1 R8 DQSL VSS_2 E3 ZQ A6 A7 WE G3 DQSU DML P2 L8 CKE F1 NC_7 DQSU E7 D3 K9 D2 L3 NC_4 F3 A8 N2 P8 A4 A5 BA2 J1 NC_1 H1 VREFDQ M8 N3 P7 P3 A2 A3 M2 C1 C9 VREFCA A0 A1 M7 R1 M3 WE G3 N7 A1 CK L2 K3 R7 K8 N1 N8 CK CKE K1 R3 L7 G7 K2 VDD_9 VDDQ_1 J7 K9 B2 D9 BA1 BA2 K7 R8 R2 A7 A9 N2 P8 NC_3 B1 VSSQ_2 BRA[11] E6 IC704-*3 H5TQ2G63DFR-PBC M8 N3 P7 A2 A3 M2 N8 VREFCA A1 NC_5 A3 DDR_HYNIX_NEW M8 M7 B7 DQU0 N5 F6 N3 G8 IC704-*2 K4B2G1646C-HCK0 DQSL D7 BRA[12] U5 C7 VSSQ_1 M4 V5 IC704-*1 NT5CB128M16BP-DI J9 DQL6 DQL7 BRA[13] BRDQ6 E4 E3 BRDQ7 BRWE L5 T5 H9 E1 BRDQ5 L4 E5 H2 B3 BRDQ4 D5 R3 VSS_3 K4 BRBA2 /BRWE BRA[14] +1.5V_DDR C9 T8 VSS_2 C763 1uF 10V BRDQ3 BRCLK1 BRA0 C1 A9 VSS_1 E7 F2 C738 0.1uF P5 BRBA1 BRDQ1 BRCLK1 N1 A8 NC_6 DQSU DQSU F7 C744 0.1uF N9 DQSL C7 D3 R729 1K 1% N1 J1 T2 B7 C737 0.1uF R722 1K 1% C743 0.1uF A1 VDDQ_1 WE G3 RVREF_D BA1 L2 J3 C762 1uF 10V BRA[0-14] VDD_9 BA2 K9 C742 0.1uF C740 0.1uF +1.5V_DDR B2 K3 BRBA0 +1.5V_DDR L7 BRDQS1 E3 VSS_7 A7 H5 /BRCAS +1.5V_DDR NC_3 BRDQ[0-7] B7 B9 D3 DMU VSS_5 DQL6 D3 B7 N8 1% 240 R717 ZQ M2 K7 BRCKE /BRCLK0 /BRDQS3 VSS_3 L8 J7 R715 100 5% BRREST DQSL A5 A15 BRBA1 R725 1K 1% VREFDQ A4 H4 BRDQ0 BRDQ2 H6 /BRCS H1 A3 M7 BRBA0 NC_3 NC_4 A2 BRA[3] RESET NC_2 B_RVREF7 BRA[6] /BRWE G3 D7 DQU0 A1 /BRDQS2 E1 E3 VSS_7 VSS_8 P3 BRA[5] DQSL B3 M7 E7 VSS_5 BRA[2] R727 1K 1% BRCLK0 BRCKE /BRRAS C741 0.1uF C739 0.1uF R724 1K 1% VREFCA BRA[7] T2 A9 N7 T3 DQSU VSS_6 BRA[3] L7 R7 T9 VSS_3 A0 R2 P2 WE NC_1 NC_6 F3 DQSU BRA[2] M8 R8 P8 L2 VDDQ_6 C7 VSS_1 R726 1K 1% B_RVREF7 BRA[0] N3 BRA[1] P7 J7 VDDQ_2 T8 NC_3 DQSL BRA[0-13] R3 T2 DQL6 D7 C8 R8 RESET NC_4 VDDQ_1 R2 WE DQL7 B9 D1 P8 P2 L2 CS L9 N2 BA2 DQSL G8 J2 DQL6 DQL7 C3 B3 P3 N2 J7 CK VDDQ_4 NC_7 NC_6 DQSL A9 C7 BA0 L1 P7 NC_5 VDD_8 VDD_9 DQSL B7 A11 VDD_4 VDD_5 BA1 WE G3 A6 BA2 T7 DQSL ZQ A7 B2 A9 A10/AP J9 L1 A5 L8 A7 A8 L2 K1 K3 NC_6 DQSL L8 ZQ E9 F1 J1 NC_1 A5 A6 J7 K9 A3 A4 A8 C9 VREFDQ VREFDQ A3 A2 H1 A4 M2 D2 A0 A1 H1 R9 C1 VREFCA A1 A2 M7 M3 N3 M8 VREFCA A0 N9 R1 N8 WE G3 K8 N1 A1 L2 K1 G7 K2 BA1 J7 K9 D9 VDD_9 BA2 K7 R8 A7 M7 N8 P3 N2 A5 A6 M8 N3 A1 P3 M2 J1 J9 M8 N3 P7 IC702-*1 NT5CB128M16BP-DI IC702-*2 K4B2G1646C-HCK0 BRA[1] M7 BA0 BA1 A8 BRA[0] P7 A15 VDD_7 VDD_8 VDD_9 C712 0.1uF N3 A13 VDD_5 A1 IC702-*3 H5TQ2G63DFR-PBC B_RVREF8 BRA[0-13] M8 B_RVREF5 RVREF_C +1.5V_DDR BRDQS0 P6 BRCKE BRODT IC704 H5TQ2G63BFR-PBC BRDQS0 V4 BRCLK1 IC702 H5TQ2G63BFR-PBC BRDQM0 RVREF_D BRCLK0 /BRCLK1 +1.5V_DDR G2 RVREF_C F4 BRCLK0 B1 VSSQ_1 DQU0 VSSQ_2 DQU1 VSSQ_3 DQU2 VSSQ_4 DQU3 VSSQ_5 DQU4 VSSQ_6 DQU5 VSSQ_7 DQU6 VSSQ_8 DQU7 VSSQ_9 B9 D1 D8 E2 E8 F9 G1 G9 DDR_HYNIX DDR_HYNIX DDR_NANYA DDR_SS DDR_HYNIX_NEW xxLT760H-UA DDR ONE SIDE 2011.09.06 12 LGE Internal Use Only CI_DATA[0-7] CI_A_DATA[0-7] CI_A_DATA[0] AR904 0 CI_A_DATA[1] CI DETECT CI_DATA[1] CI_A_DATA[2] CI_DATA[2] CI_A_DATA[3] CI_DATA[3] CI_A_DATA[4] +3.3V_NORMAL CI TS INPUT Close to MT5369 MT5369_TS_OUT[0-7] CI_MDI[0-7] AR902 47 MT5369_TS_OUT[0] R910 10K CI_MDI[1] MT5369_TS_OUT[2] CI_MDI[2] MT5369_TS_OUT[3] CI_MDI[3] MT5369_TS_OUT[4] CI_MDI[4] MT5369_TS_OUT[5] CI_MDI[5] MT5369_TS_OUT[6] CI_MDI[6] MT5369_TS_OUT[7] CI_MDI[7] MT5369_MIVAL_ERR MT5369_MCLKI 47 R908 47 R909 47 0 CI_DATA[4] CI_A_DATA[5] CI_DATA[5] CI_A_DATA[6] CI_DATA[6] CI_A_DATA[7] CI_DATA[7] +5V_CI_ON R914 10K R929 10K /CI_CD1 R930 47K R933 10K OPT R934 10K OPT R935 10K R936 10K /CI_CD2 /PCM_WAIT +3.3V_NORMAL PCM_INPACK CI_A_ADDR[0-14] CI_ADDR[0-14] CI_VS1 R906 10K OPT AR903 47 R907 AR905 CI_MDI[0] MT5369_TS_OUT[1] MT5369_MISTRT CI_DATA[0] R913 47K R919 47K R918 47K R923 10K OPT CI_A_ADDR[0] AR906 CI_A_ADDR[1] /PCM_REG R924 10K OPT 22 CI_ADDR[6] /PCM_OE CI_ADDR[7] CI_A_ADDR[8] AR908 CI_A_ADDR[9] R931 CI_VS1 CI_A_VS1 OPT CI_ADDR[4] CI_ADDR[5] CI_A_ADDR[7] /PCM_IOWR Close to CI Slot 0 CI_A_ADDR[6] PCM_RST /PCM_IORD C902 12pF 50V OPT CI_ADDR[3] CI_A_ADDR[4] AR907 CI_A_ADDR[5] CI_IN_TS_VAL Close to MT5369 CI_ADDR[2] CI_A_ADDR[3] /PCM_IRQA CI_ADDR[0] CI_ADDR[1] CI_A_ADDR[2] /PCM_CE2 CI_IN_TS_SYNC CI_IN_TS_CLK 0 0 CI_ADDR[8] CI_ADDR[9] CI_A_ADDR[10] CI_ADDR[10] CI_A_ADDR[11] CI_ADDR[11] /PCM_WE R932 /PCM_CE1 CI_A_ADDR[12]AR909 CI_A_ADDR[13] 22 /PCM_A_REG /PCM_REG 0 CI_ADDR[12] CI_ADDR[13] CI_A_ADDR[14] OPT CI_ADDR[14] CI TS OUTPUT Close to CI Slot MT5369_TS_IN[0-7] MT5369_TS_IN[0] MT5369_TS_IN[1] AR900 47 CI_TS_DATA[1] MT5369_TS_IN[2] CI_TS_DATA[2] MT5369_TS_IN[3] MT5369_TS_IN[4] CI_TS_DATA[0-7] CI_TS_DATA[0] CI_TS_DATA[3] AR901 47 CI_TS_DATA[4] MT5369_TS_IN[5] CI_TS_DATA[5] MT5369_TS_IN[6] CI_TS_DATA[6] MT5369_TS_IN[7] CI_TS_DATA[7] Close to CI Slot MT5369_TS_CLK MT5369_TS_VAL MT5369_TS_SYNC Close to MT5369 R915 47 R916 47 R917 47 +5V_CI_ON CI_TS_CLK CI_TS_VAL CI_TS_SYNC C900 12pF 50V OPT C904 0.1uF C905 10uF 10V CI_A_DATA[0-7] JK900 10067972-050LF 35 1 36 2 CI_A_DATA[3] 37 3 CI_A_DATA[4] CI_TS_DATA[4] 38 4 CI_A_DATA[5] CI_TS_DATA[5] 39 5 CI_A_DATA[6] CI_TS_DATA[6] CI_TS_DATA[7] 40 6 CI_A_DATA[7] 41 7 42 8 43 9 44 10 CI_A_ADDR[11] 45 11 CI_A_ADDR[9] R927 /CI_CD1 R911 /PCM_IORD R912 /PCM_IOWR 22 CI_TS_DATA[3] 100 /PCM_CE2 CI_VS1 22 CI_MDI[0-7] /PCM_WAIT CI_A_ADDR[10] 46 12 CI_A_ADDR[8] 47 13 CI_MDI[1] CI_A_ADDR[13] 48 14 CI_MDI[2] CI_A_ADDR[14] 49 15 CI_MDI[3] 50 16 51 17 0 OPT R940 C906 R938 0 0.1uF OPT 18 53 19 CI_MDI[5] 54 20 CI_MDI[6] 55 21 CI_MDI[7] 56 22 CI_A_ADDR[7] 57 23 CI_A_ADDR[6] 22 58 24 CI_A_ADDR[5] R922 22 22 OPT 59 25 CI_A_ADDR[4] 60 26 CI_A_ADDR[3] 61 27 CI_A_ADDR[2] 62 28 CI_A_ADDR[1] 63 29 CI_A_ADDR[0] CI_TS_VAL CI_TS_SYNC CI_TS_DATA[0] 64 30 CI_TS_DATA[1] 65 31 CI_TS_DATA[2] /CI_CD2 66 32 67 33 R928 100 34 68 R925 0 G2 69 /PCM_OE CI_A_ADDR[12] R921 R920 22 22 C907 0.1uF 16V 52 /PCM_A_REG R941 R942 /PCM_WE /PCM_IRQA 22 CI_MDI[4] CI_TS_CLK PCM_INPACK 22 CI_MDI[0] R926 PCM_RST R939 /PCM_CE1 CI_A_DATA[0] CI_A_DATA[1] +5V_CI_ON CI_A_DATA[2] R937 10K OPT G1 CI_IN_TS_VAL CI_IN_TS_CLK CI_IN_TS_SYNC THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes MID_MAIN_CI 2011.09.26 13 LGE Internal Use Only FROM LIPS & POWER B/D PWM_DIM2 3.5V 12 3.5V GND 13 14 GND GND 15 16 GND/V-sync 12V 17 18 INV ON 12V 19 20 A.DIM 21 22 P.DIM1 GND/P.DIM2 23 24 Err OUT 25 SMAW200-H24S2 P2401 #16/#20/#23 LD - GND OR USE LE(N.L.D.) - OPEN LE(L.D.) - USE 0 POWER_16_VSYNC R2425 100 L/DIM0_VS INV_CTL A_DIM R2462 0 NON_37_LGD POWER_16_GND SLIM_32~55 C2401 0.1uF 50V R2423 R2426 PWM_DIM1 10K PANEL_CTL C2440 1uF 25V OPT 1/8W 2K 10 11 S G 1/8W 2K PANEL_DISCHARGE_REG R2452 9 3.5V C2435 4.7uF 50V PANEL_DISCHARGE_REG R2451 3.5V C2413 0.1uF 50V MTK_EPI GND GND R2442 10K 6 8 12V +12V L2401 CIS21J121 5 7 C2433 0.1uF 50V MTK_EPI C2406 0.1uF 16V GND GND C2432 0.01uF 50V L2403 CIS21J121 R2441 1.8K L2402 CIS21J121 24V 24V R2442-*1 33K +3.5V_ST 2 4 Q2407 AO3407A MTK_NON_EPI PWR ON 1 24V 3 E R2441-*1 5.6K Q2402 MMBT3904(NXP) OPT B PANEL_VCC 4.7K MTK_NON_EPI R2464 +24V 0 R2401 10K TYP 1450mA L2408 BLM18SG121TN1D NORMAL_32 NORMAL_EXCEPT_32 P2402 P2400 FW20020-24S FM20020-24 2 OPT POWER_24_GND R2453 OPT 10K 3 1 10K 0 R2422 R2463 C +12V Q2401 R2420 0 OPT R2461 RL_ON PANEL_POWER MMBT3906(NXP) R2408 10K D +3.5V_ST +3.5V_ST C2443 0.1uF 50V C R2437 10K Q2406 MMBT3904(NXP) B E R2460 10K +3.3V_NORMAL R2424 4.7K OPT R2405 ERROR_OUT 22 POWER_24_ERROR_OUT FOR LPB Download [To LED DRIVER] FOR LPB MODEL P2403 12507WR-08L Power_DET +5V_Normal +3.5V_ST R2417 100K OPT R2413 0 5% IC2402 VCC 3 2 L2407 BLM18PG121SN1D 3 R2419 100 RESET 2 +5V_NORMAL POWER_DET 4 1 C2411 0.1uF 16V PD_12V R2409 1.2K 1% R2421 10K OPT NCP803SN293 C2415 10uF 16V GND IC2404 TPS54327DDAR [EP]GND C2412 0.1uF 16V On-semi +24V R1 1% R2435 10K EN C24001 0.1uF 16V VFB 56K IC2401 PD_24V R2411 1.5K 1% C2410 0.1uF 16V 3 2 2 VREG5 OPT 1 R2 24V-->3.48V 12V-->3.58V ST_3.5V-->3.5V GND FOR LPB MODEL R2458 33 6 6 VIN VBST C2429 0.1uF 16V SW R2439 10K L2409 3.6uH 3A 5 I2C_SDA5 FOR LPB MODEL R2459 33 8 9 GND C2430 22uF 10V C2428 3300pF 50V C2417 1uF 10V 1% 4 I2C_SCL5 7 NR8040T3R6N SS R2418 100 RESET 7 3 C2416 100pF 50V NCP803SN293 VCC 8 1 R2415 not to RESET at 8kV ESD PD_3.5V R2429 0 5% 5 POWER_ON/OFF2_3 R2416 100K +3.5V_ST PD_24V R2412 8.2K 1% 1 +12V 9 PD_12V R2410 2.7K 1% +3.5V_ST THERMAL +12V POWER_ON/OFF1 POWER_ON/OFF2_1 POWER_ON/OFF2_2 POWER_ON/OFF2_3 POWER_ON/OFF2_4 DDR MAIN 1.5V +1.2V_MTK_CORE C2418 10uF 10V C2419 0.1uF 16V 2 GND_1 3 BOOT 13 PWRGD EN R2404 GND_2 11 PH_2 10 IC2403 TPS54319TRE 9 PH_1 4 3A AGND 5 POWER_ON/OFF1 C2422 SS/TR C2424 10uF 10V C2425 10uF 10V C2446 10uF 10V 0.01uF 50V C2427 0.1uF 16V C2447 10uF 10V R2432 1/16W 330K 5% R2431 15K Vout=0.8*(1+R1/R2) 1/16W VBST 14 13 5% R1 C2421 4700pF C2426 100pF 50V SW2 C2434 0.1uF 50V 1 12 NR8040T3R6N R2434 C2448 10uF 10V PH_3 THERMAL 17 C2431 10uF 16V L2406 3.6uH 47K 1% R2 VIN1 12 1 VIN_2 VIN2 16V 8 R2403 10K VIN_1 14 L2405 BLM18PG121SN1D R1 RT/CLK C2404 0.1uF 16V C2405 4700pF 50V 7 R2402 3.3K IC2405 TPS54425PWPR [EP]PGND 3.4 A +3.3V_NORMAL C2423 0.1uF +1.5V_DDR COMP COMP 5.6K 1% EN C2441 3300pF 50V OPT VIN_3 5 C2414 10uF 10V 15 6 4 C2409 10uF 10V 6 3 C2408 10uF 10V VSENSE FB C2407 10uF 10V 1% C2403 0.1uF 16V OPT NC_1 OPT R24000 R2406 10K C2402 10uF 16V 7 L2410 BLM18PG121SN1D 0.1uF 16V +3.5V_ST NC_2 MAX +3.3V_NORMAL THERMAL AGND C2400 10uF 16V 2 9 VIN 8 THERMAL Placed on SMD-TOP 1 +12V C2420 [EP]LX *NOTE 17 PGND EP[GND] IC2400 AOZ1038PI 16 L2400 BLM18PG121SN1D L2404 2uH 15 10K R2430 POWER_ON/OFF2_1 +12V 2 VO R2 R2428 10K VFB 1% 3 4A 11 4 10 5 9 6 8 7 VREG5 C2438 1uF 10V SS R1 SW1 PGND2 PGND1 GND R2407 PG EN 100K R2414 10K C2437 0.1uF 50V C2445 22pF 50V R2427 33K 1% C2439 3300pF 50V POWER_ON/OFF2_2 +3.3V_NORMAL L2411 2uH 3A $ 0.145 R2433 56K 1/16W 1% R2 C2442 22uF 10V C2444 22uF 10V Vout=0.827*(1+R1/R2)=1.521V Vout=(0.763+0.0017*Vout.set)*(1+R1/R2) THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes xxLT760H-UA MID_POWER 2011.09.29 24 LGE Internal Use Only 5V_HDMI_4_JACK 5V_HDMI_3_JACK 13 12 11 10 9 8 7 6 5 4 3 2 1 100 100 18 17 DDC_SDA_4_JACK 16 DDC_SCL_4_JACK SCL R3343 0 15 IR_OUT_HDMI3 NC 14 CEC_REMOTE CEC 13 CK-_HDMI4_JACK CLK- 12 CLK_SHIELD 11 CK+_HDMI4_JACK CLK+ 10 D0-_HDMI4_JACK DATA0DATA0_SHIELD 9 8 D0+_HDMI4_JACK DATA0+ 7 D1-_HDMI4_JACK DATA1DATA1_SHIELD 6 5 D1+_HDMI4_JACK DATA1+ 4 D2-_HDMI4_JACK DATA2- 3 DATA2_SHIELD 2 D2+_HDMI4_JACK DATA2+ 1 A1 R3331 1K HDMI_HPD_3_JACK VDD[+5V] R3328 100 SDA R3329 100 MMBD6100 D3302 R3346 4.7K OPT E DDC/CEC_GND DDC_SDA_3_JACK C3302 0.1uF 16V R3337 R3339 47K 47K DDC_SCL_3_JACK SCL R3342 A2 B C HOT_PLUG_DETECT 0 IR_OUT_HDMI2 RESERVED CEC_REMOTE DDC_SCL_3_JACK CEC CK-_HDMI3_JACK TMDS_CLK- DDC_SDA_3_JACK TMDS_CLK_SHIELD CK+_HDMI3_JACK TMDS_CLK+ D0-_HDMI3_JACK TMDS_DATA05V_HDMI_2_JACK +5V_NORMAL TMDS_DATA0_SHIELD 5V_HDMI_4_JACK +5V_NORMAL D0+_HDMI3_JACK TMDS_DATA0+ D1-_HDMI3_JACK TMDS_DATA1TMDS_DATA1_SHIELD A1 14 R3308 R3309 19 A2 15 DDC/CEC_GND SDA Q3303 R3327 100K MMBT3904(NXP) MMBD6100 D3301 D1+_HDMI3_JACK TMDS_DATA1+ MMBD6100 D3303 C 17 16 +5V_POWER R3345 4.7K OPT C 20 A1 18 E HDMI_HPD_4_JACK Q3301 MMBT3904(NXP) R3336 4.7K C R3311 1K B R3307 100K HPD R3330 1K BODY_SHIELD 20 19 5V_HDMI_3_JACK +5V_NORMAL R3312 4.7K C A2 R3310 1K SHIELD D2-_HDMI3_JACK TMDS_DATA2C3301 0.1uF 16V TMDS_DATA2_SHIELD D2+_HDMI3_JACK C3303 0.1uF 16V R3324 R3326 47K 47K TMDS_DATA2+ R3338 R3340 47K 47K YKF45-7058V UI : HDMI2 JK3301 RSD-105156-100 DDC_SCL_2_JACK DDC_SCL_4_JACK DDC_SDA_2_JACK DDC_SDA_4_JACK JK3303 UI : HDMI3 5V_HDMI_2_JACK R3318 4.7K R3316 1K SHIELD C 20 Q3302 R3313 MMBT3904(NXP) 100K 13 12 11 10 9 8 7 6 5 4 3 2 1 DDC/CEC_GND R3314 100 SDA R3315 100 DDC_SDA_2_JACK HPD SWITCH DDC_SCL_2_JACK SCL R3300 For CEC 0 NC HPD_CTL L H CEC_REMOTE CEC CK-_HDMI2_JACK OPT CLK- R3341 CONNECTION B0 - A B1 - A HPD_CTL NEC_HPD +3.5V_ST IR_OUT_HDMI1 CLK_SHIELD SELECT CK+_HDMI2_JACK HDMI_ARC CLK+ C3306 0.1uF D0-_HDMI2_JACK DATA0DATA0_SHIELD IC3301 NLASB3157DFT2G +3.5V_ST MTK_HPD 0 R3300 MTK Recommend : 0 Ohm VCC 6 1 5 2 B1 R3376 0 R3377 0 MTK_HPD GND D0+_HDMI2_JACK A DATA0+ HDMI_HPD_2_JACK D1-_HDMI2_JACK 4 3 B0 R3303 120K R3302 27K D3304 NEC_HPD From HDMI Connector CEC_REMOTE BAT54_SUZHO DATA1DATA1_SHIELD D1+_HDMI2_JACK R3375 HDMI_CEC To NEC Q3300 RUE003N02 HDMI_CEC_FET_ROHM 0 DATA1+ OPT D2-_HDMI2_JACK S 14 +5V_POWER G 15 HDMI_HPD_2_JACK R3347 4.7K OPT E D 16 R3317 1K G 17 B DATA2S 18 HPD D 19 Q3300-*1 SI1012CR-T1-GE3 HDMI_CEC_FET_VISHAY DATA2_SHIELD D2+_HDMI2_JACK DATA2+ YKF45-7058V JK3302 UI : HDMI1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes xxLT760H-UA HDMI 4 2011.09.29 33 LGE Internal Use Only RGB_5V RGB PC +5V_NORMAL RGB_5V A1 C A2 MMBD6100 D3620 R3641 IC3600 M24C02-RMN6T E0 E1 E2 VSS 1 2 7 3 6 4 5 WC R3643 SCL RGB_DDC_SCL 22 RGB_DDC_SDA C3634 18pF 50V OPT D3615 30V DSUB_HSYNC 22 R3644 SDA C3633 18pF 50V DSUB_VSYNC R3642 2.7K 2.7K VCC 8 D3621 ADUC 5S 02 0R5L 5.5V OPT D3622 ADUC 5S 02 0R5L 5.5V OPT OPT D3616 30V DSUB_B+ +3.3V_NORMAL DSUB_G+ R3646 10K DSUB_DET D3623 5.6V DDC_GND 16 SHILED DDC_CLOCK GND_1 V_SYNC SYNC_GND 15 5 10 BLUE BLUE_GND H_SYNC GREEN DDC_DATA GREEN_GND RED GND_2 NC 14 4 9 13 3 2 8 12 11 7 6 1 SPG09-DB-010 JK3603 Closed to JACK RED_GND DSUB_R+ PC AUDIO JK3604 PEJ027-04 3 SPDIF OUT JP3605 OPT R3620 2.7K R3615 33 JP3606 T_TERMINAL1 7A B_TERMINAL1 PC_R_IN JK3602 2F01TC1-CLM97-4F 4 R_SPRING GND 1 5 T_SPRING VCC 2 VIN 3 Fiber Optic +3.3V_NORMAL E_SPRING 6A 7B B_TERMINAL2 6B T_TERMINAL2 Diode_OLD D3624 5.6V for EMI_Cap D3624-*1 18pF 50V PC_L_IN SPDIF_OUT THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes C3615 0.1uF 16V 4 SHIELD D3613 5.5V OPT ADUC 5S 02 0R5L Diode_OLD D3625 5.6V for EMI_Cap D3625-*1 18pF 50V xxLT760H-UA JACK HIGH / MID 2011.09.29 36 LGE Internal Use Only EXT UART SWITCH RS232C DBG_SW L H 1A@5V /1A@12V FOR COMMERCIAL(RS-232C POWER) EXT_5V CONNECTION B0 - A MTK ADJ B1 - A MTK DEBUG UART_SW2 CONNECTION L B0 - A Interactive H B1 - A USB Download EXT_12V 10 5 L3801 L3800 UART_SW1 UART_SW2 JP3811 IC3811 NLASB3157DFT2G 9 OPT IC3802 NLASB3157DFT2G JP3810 4 IR_OUT_RS232C +3.5V_ST IC3800 R3820 100 R3821 100 C1+ 3 1 16 VCC JP3812 V+ C1- 2 15 3 14 4 13 5 12 GND 0.1uF D3804 20V OPT D3805 20V OPT 1K 50V 4 SOC_TX 6 C3802 C2+ C2- 0.1uF C3803 V- 6 11 RIN1 RIN2 7 10 8 9 +3.5V_ST B1 MTK_NEC_RX GND 6 SELECT VCC C3811 R3859 0 B0 1 ON SEMICONDUCTOR ANALOG SWITCH 2 5 R3843 0 RS232_TX B0 RS232_TX 3 4 A 0.1uF R3835 0 NEC_TX EAN38256201 R3834 +3.5V_ST R3862 0 OPT JK3803 IC3812 NLASB3157DFT2G IC3804 NLASB3157DFT2G ROUT1 R3811 4.7K DIN1 R3814 4.7K SELECT RS232_RX VCC RS232_TX DOUT2 MTK_DBG_TX GND 3 SPG09-DB-009 0.1uF R3842 0 EAN38256201 1 BAP70-02 D3803 DOUT1 B1 1 ON SEMICONDUCTOR ANALOG SWITCH 5 2 C3822 0.1uF A 2 +3.5V_ST C3801 VCC 7 JP3809 C3804 0.1uF 6 JP3808 L3802 C3800 SELECT 8 +3.5V_ST MAX3232CDR 0.1uF R3858 0 DIN2 ROUT2 6 1 C3823 0.1uF A 4 R3847 0 MTK_DBG_RX ON SEMICONDUCTOR ANALOG SWITCH 5 2 SOC_RX R3860 0 B1 MTK_NEC_TX GND GND R3861 0 B0 3 B1 R3846 0 RS232_RX RS232_RX EAN38256201 B0 1 6 ON SEMICONDUCTOR ANALOG SWITCH 2 5 3 4 SELECT VCC C3813 0.1uF A R3836 0 NEC_RX EAN38256201 EAN41348201 R3863 0 OPT UART DBG SWITCH UART_DBG_SW L H CONNECTION B0 - A B1 - A EXT_SPK_CONTROL & DBG OUT DBG_SW Debug MTK +3.5V_ST IC3806 NLASB3157DFT2G R3849 3.6K UART_DBG_SW IC3805 NLASB3157DFT2G R3844 4.7K B1 EXT_SPK_VOL+ R3848 0 B1 1 MTK_DBG_TX GND B0 3 +3.5V_ST SELECT 6 ON SEMICONDUCTOR ANALOG SWITCH 2 5 NEC_DBG_TXD DBG_SW L H +3.3V_NORMAL Debug NEC GND B0 VCC JK_DBG_TX 1 3 C3814 A 0.1uF 4 6 ON SEMICONDUCTOR ANALOG SWITCH 2 5 4 CONNECTION B0 - A DEBUG_NEC/MTK B1 - A EXT.SPK VOL Control +3.5V_ST SELECT VCC A C3816 0.1uF EAN38256201 JK_DBG_TX JK3801 PEJ027-04 EAN38256201 E_SPRING IC3808 NLASB3157DFT2G R3851 3.6K IC3807 NLASB3157DFT2G B1 R3850 0 EXT_SPK_VOLB1 MTK_DBG_RX GND 1 6 ON SEMICONDUCTOR ANALOG SWITCH 2 5 SELECT GND NEC_DBG_RXD 3 4 6 ON SEMICONDUCTOR ANALOG SWITCH 2 5 +3.5V_ST SELECT VCC VCC B0 C3815 0.1uF B0 1 JK_DBG_RX 3 4 A JK_DBG_RX EAN38256201 EAN38256201 A C3817 0.1uF OPT C3818 1000pF 50V OPT D3806 5.6V JP3802 +3.5V_ST R3845 4.7K JP3801 +3.3V_NORMAL OPT C3819 1000pF 50V D3807 5.6V OPT 3 T_TERMINAL1 6A B_TERMINAL1 7A R_SPRING 4 T_SPRING 5 B_TERMINAL2 7B T_TERMINAL2 6B EXT_SPK_CONTROL NVRAM I2C SWITCH UART_SW2 CONNECTION L B0 - A H B1 - A NVRAM - NEC NVRAM - MTK EEPROM_SW IC3809 NLASB3157DFT2G +3.5V_ST SELECT VCC C3820 0.1uF A SCL_NVRAM 6 1 ON SEMICONDUCTOR ANALOG SWITCH 5 2 4 3 B1 R3852 0 I2C_SCL5 GND B0 R3853 0 NEC_EEPROM_SCL EAN38256201 R3856 0 OPT SELECT VCC C3821 0.1uF A SDA_NVRAM IC3810 NLASB3157DFT2G 6 1 ON SEMICONDUCTOR ANALOG SWITCH 5 2 4 3 B1 R3854 0 I2C_SDA5 GND B0 R3855 0 NEC_EEPROM_SDA EAN38256201 R3857 0 OPT THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes xxLT760H-UA JACK_COMMON 2011.09.29 38 LGE Internal Use Only +3.3V_NORMAL IR & KEY +3.5V_ST I_SENSOR L4101 BLM18PG121SN1D +3.5V_ST P4102 +3.5V_ST R4101 47K OPT IR +3.5V_ST R4103 47K R4102 10K C OPT E R4113 100 R4118 10K 1% C4110 0.1uF 16V OPT L4102 BLM18PG121SN1D C4109 0.1uF 16V I_SENSOR R4104 47K C B E Q4101 2SC3052 R4107 47K OPT R4114 100 1 L4103 BLM18PG121SN1D 2 C4100 0.1uF C4102 0.1uF D4100 5.6V AMOTECH D4101 5.6V AMOTECH R4108 +3.5V_ST L4100 BLM18PG121SN1D R4132 10K B D4104 5.6V AMOTECH R4126 1.5K 8 LED_R R4109 10K OPT R4123 100 I_SENSOR 9 10 I2C_SCL2 I2C_SCL3 E OPT R4127 100 11 I_SENSOR I2C_SDA2 +5V_ST R4124 100 I2C_SDA3 R4128 100 OPT R4134 10K D4105 CDS3C05HDMI1 5.6V IR_OUT_HDMI1 D4106 CDS3C05HDMI1 5.6V R4136 10K C Q4103 2SC3052 5 7 C4107 100pF 50V C R4135 30K C4104 1000pF 50V 6 IR_OUT_RS232C R4133 22 3 NON_I_SENSOR 4 C4101 0.1uF 16V R4130 10K Q4102 2SC3052 0 0 +5V_ST R4131 22 12507WR-10L KEY2 C4103 0.1uF 16V OPT R4100 C4108 1000pF 50V I_SENSOR KEY1 B Q4100 2SC3052 OPT R4117 10K 1% B E C B E Q4104 2SC3052 Zener Diode is close to wafer +5V_ST R4138 10K R4137 22 IR_OUT_HDMI2 R4140 10K C Q4105 2SC3052 R4139 30K C B IR_OUT_CTRL B E E Q4106 2SC3052 +5V_ST R4142 10K R4141 22 IR_OUT_HDMI3 R4144 10K C Q4107 2SC3052 R4143 30K C B E THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes B E Q4108 2SC3052 xxLT760H-UA IR / KEY 2011.09.26 41 LGE Internal Use Only USB To SERIAL I/F USB_WIFI +3.3V_USB2SER M_REMOTE C4316 L4301 BLM18PG121SN1D C4313 0.1uF 16V M_REMOTE C4312 0.1uF 16V M_REMOTE 20pF M_REMOTE 12MHz R4305 10K M_REMOTE R4304 X2 GND_3 VCC_2 25 26 27 P3.3 P3.1 P3.4 28 29 30 31 20 RTS 6 19 SOUT/IR_SOUT 7 18 GND_2 8 17 SIN/IR_SIN VIN2 WIFI C4320 0.1uF 16V WIFI C4321 10uF 10V WIFI C4339 10uF 10V WIFI MAX 0.4A VIN1 C4324 10uF 16V P4301 VBST 12507WR-04L SW2 WIFI VDD C4326 0.1uF 50V 1 M_REMOTE_TX DM WIFI_DM DP WIFI_DP RI/CP +3.3V_USB2SER To SOC +3.3V_USB2SER M_REMOTE R4306 GND 1 14 13 2 3 12 4A 11 4 10 5 9 6 8 7 VO R4331 22K VFB R2 VREG5 1% C4327 1uF 10V SS R1 SW1 R4330 120K 1% GND R4328 2 PGND2 M_REMOTE_RX 16 15 DCD DSR CTS +5V_USB BLM18PG121SN1D PG 100K C4329 3300pF 50V C4332 22pF 50V 3 PGND1 R4309 15K M_REMOTE IC4305 TPS54425PWPR [EP]PGND L4302 WIFI For EMI 5 WAKEUP C4317 22pF M_REMOTE C4318 22pF M_REMOTE GND_1 TEST0 DTR 14 DM 33 23 L4305 BLM18PG121SN1D +5V_USB C4319 0.1uF 16V CLKOUT 13 DP TEST1 21 12 PUR 1.5K 24 22 IC4304 TUSB3410RHBR 11 4 M_REMOTE M_REMOTE_DEV 32 3 VDD18 SCL USB2SER_DM R4303 VCC_1 THERMAL 33 10 USB2SER_DP 2 SDA R4301 M_REMOTE_DEV R4302 33 SUSPEND 9 C4309 0.1uF 16V 1 RESET M_REMOTE R4310 10K M_REMOTE C4310 0.01uF 25V VREGEN M_REMOTE +12V THERMAL M_REMOTE R4307 91K OPT 1% [EP] P3.0 +3.3V_USB2SER X1/CLKI 1M 1% OPT 15 +3.3V_USB2SER R4308 100K OPT 1% +5V_USB FOR USB C4315 M_REMOTE X4300 20pF M_REMOTE C4311 0.1uF 16V M_REMOTE OPT RCLAMP0502BA D4300 +3.3V_NORMAL EN R4329 10K C4328 0.1uF 4 POWER_ON/OFF2_4 +5V_USB L4308 2uH 5 . C4333 22uF 10V 10K C4334 22uF 10V /USB2SER_RESET C4314 1uF M_REMOTE Vout=(0.763+0.0017*Vout.set)*(1+R1/R2)=4.98V USB2 USB1 +3.3V_NORMAL +3.3V_NORMAL R4327 10K OPT R4311 10K OPT R4323 10K IC4303 TPS2554 R4312 10K IC4306 TPS2554 [EP] [EP] +5V_USB ILIM_SEL /USB_OCD2 EN THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes 11 7 5 6 C4340 10uF 10V ILIM0 ILIM1 OPT R4313 27K 4 OUT_1 USB_DP2 3AU04S-345-ZC-H-LG 1 3AU04S-345-ZC-H-LG DVR Ready MAX 1.8A JK4304 USB_DM2 5 4 3 2 USB DOWN STREAM 1 To SOC OPT RCLAMP0502BA D4303 USB_DM1 USB_DP1 8 2 1/10W R4300 27K 1/10W OPT R4341 27K USB_CTL2 JK4303 3 OUT_2 3 ILIM1 IN_2 DVR Ready MAX 1.8A 9 USB DOWN STREAM 10uF 10V ILIM0 2 4 6 C4323 FAULT 5 5 OUT_1 10 1/10W USB_CTL1 7 IN_1 OPT RCLAMP0502BA D4304 EN 8 4 1 OUT_2 R4314 27K /USB_OCD1 3 GND 1/10W ILIM_SEL 9 +5V_USB FAULT THERMAL IN_2 2 10 11 IN_1 1 THERMAL GND To SOC xxLT760H-UA USB3_HUB_WiFi 2011.09.29 43 LGE Internal Use Only Full Scart +3.3V_NORMAL +12V R4601 10K CLOSE TO JUNCTION SC_DET D4611-*1 5.6V 200pF D4611-*2 5.6V 200pF D4611 5.6V OPT ESD_LG1152_SCART E MMBT3906(NXP) Q4600 C4604 0.1uF SC_CVBS_IN AV_DET D4609-*2 5.5V 15pF ESD_LG1152_SCART D4609-*1 5.5V 15pF ESD_MTK_SCART D4609 5.5V OPT 22 75 Q4601 MMBT3904(NXP) C R4602 390 B D4610 5.5V OPT SYNC_OUT 19 Gain=1+Rf/Rg Rf R4600 D4610-*1 5.5V 15pF ESD_MTK_SCART SYNC_GND2 18 C4606 0.1uF 50V R4606 47K C4607 47uF 25V E DTV/MNT_V_OUT Rg R4604 180 SYNC_IN 20 R4605 R4603 390 COM_GND 21 470 B C ESD_MTK_SCART C4605 100uF 16V R4608 SYNC_GND1 R4607 15K 0 OPT 17 RGB_IO SC_FB 16 R_OUT D4601 5.6V OPT 15 RGB_GND 14 R_GND 13 D2B_OUT D4601-*1 5.6V 200pF ESD_MTK_SCART D4601-*2 5.6V 200pF ESD_LG1152_SCART 12 G_OUT SC_R 11 D2B_IN D4602 5.5V OPT 10 G_GND 9 ID D4602-*1 5.5V 15pF ESD_MTK_SCART 8 B_OUT SC_G 7 AUDIO_L_IN 6 B_GND 5 D4603 5.5V OPT D4603-*1 5.5V 15pF ESD_MTK_SCART D4604 5.5V OPT D4604-*1 5.5V 15pF ESD_MTK_SCART AUDIO_GND 4 AUDIO_L_OUT SC_B 3 AUDIO_R_IN 2 AUDIO_R_OUT 1 PSC008-01 JK4600 SC_ID SC_L_IN D4605 5.6V OPT D4600 20V OPT D4600-*1 20V 10pF ESD_MTK_SCART D4600-*2 20V 10pF ESD_LG1152_SCART D4605-*1 5.6V 200pF ESD_MTK_SCART D4605-*2 5.6V 200pF ESD_LG1152_SCART SC_R_IN D4606 5.6V OPT D4606-*1 5.6V 200pF ESD_MTK_SCART D4606-*2 5.6V 200pF ESD_LG1152_SCART [SCART AUDIO MUTE] BLM18PG121SN1D L4600 D4607 5.6V OPT C4600 1000pF 50V DTV/MNT_L_OUT DTV/MNT_L_OUT C4602 4700pF +3.5V_ST C Q4602 MMBT3904(NXP) BLM18PG121SN1D L4601 E DTV/MNT_R_OUT D4608 5.6V OPT C4601 1000pF 50V B R4625 4.7K OPT C4603 4700pF R4623 SCART_MUTE 510 DTV/MNT_R_OUT C B Q4603 MMBT3904(NXP) E THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes SCART GENDER 2011.10.26 46 LGE Internal Use Only ZigBee_Radio Pulse M_REMOTE OPTION +3.3V_NORMAL P4800 12507WR-08L L4800 120-ohm M_REMOTE 1 M_REMOTE 3.3V C4800 2 3 4 5 6 7 8 GND 0.1uF AR4800 100 1/16W RX M_REMOTE_RX TX M_REMOTE_TX RESET M_RFModule_RESET DC M_RFModule_ISP DD 3D_SYNC_RF GND M_REMOTE 9 3D_SYNC_RF Only For PDP M_REMOTE_RX M_REMOTE_TX ALL M_REMOTE OPTION THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes xxLT760H-ZA MOTION REMOTE 2011.06.04 48 LGE Internal Use Only 33 From SOC MAIN_AMP_RESET R5421 50V 2ND : 0TR387500AA C5416 L5401 BLM18PG121SN1D AUD_MASTER_CLK +24V_AMP 22000pF 1ST : 0TRIY80001A C5415 1000pF 50V +3.3V_NORMAL DUAL COMPONENT Q1801 R5422 10K OPT R5406 3.3 3 LF 4 DGND_PLL 5 GND_1 6 R5401 10K R5405 C R5400 MAIN_AMP_MUTE B 10K 100 C5404 1000pF Q5400 50V MMBT3904(NXP) PVDD1_1 PVDD1_2 PVDD1_3 OUT1A_1 OUT1A_2 BST1A /RESET AD GND_IO PGND1A 37 38 39 40 41 42 43 OUT1B_1 34 PGND1B R5414 12 33 BST1B 32 VDR1 31 VCC_5 SDATA 9 28 BST2A WCK 10 27 PGND2A BCK 11 26 OUT2A_2 SDA 12 25 OUT2A_1 R5408 12 5.1K C5434 0.47uF 50V SPEAKER_L C5437 0.1uF 50V NRS6045T100MMGK R5412 12 R5416 5.1K C5425 22000pF 50V WAFER-ANGLE 4 SPK_L- 3 SPK_R+ C5427 1uF 25V C5428 1uF 25V C5433 1uF 25V 2 SPK_R- 1 C5426 22000pF 50V P5400 24 23 22 21 20 19 18 C5430 390pF 50V D5401 1N4148W 100V OPT C5436 0.1uF 50V NRS6045T100MMGK R5415 SPK_L+ VDR2 0x54 L5404 10.0uH SPK_L- AGND C5417 22000pF PVDD2_3 PVDD2_2 PVDD2_1 OUT2B_2 OUT2B_1 PGND2B SPK_R+ BST2B +3.5V_ST 35 29 17 C5408 33pF 50V OUT1B_2 30 SCL C5406 33pF 50V 36 8 MONITOR2 100 IC5400 NTP-7500L 16 I2C_SCL1 100 R5407 12 L5405 10.0uH 7 AUD_SCK R5403 SPK_L+ DVDD AUD_LRCK R5402 OPT C5424 0.01uF 50V D5400 1N4148W 100V OPT DGND AUD_LRCH I2C_SDA1 THERMAL 49 15 C5412 0.1uF 16V DVDD_PLL 44 2 45 AVDD_PLL 46 1 47 AGND_PLL 3.3K OPT C5410 10uF 10V C5422 10uF 35V C5420 0.1uF 50V C5429 390pF 50V MONITOR1 R5404 100pF 50V C5418 0.1uF 50V C5411 0.1uF 16V 14 C5402 C5409 10uF 10V MONITOR0 C5403 1000pF 50V C5407 4.7uF 10V /FAULT C5405 10uF 10V 48 C5401 0.1uF 50V 13 C5400 0.1uF 50V 16V CLK_I 0.1uF L5400 CIS21J121 OPT C5414 10uF 10V [EP] C5413 VDD_IO +24V_AMP +24V +24V_AMP D5402 1N4148W 100V OPT R5409 12 R5413 12 C5419 C5421 C5423 0.1uF 50V 0.1uF 50V 10uF 35V D5403 1N4148W 100V OPT L5403 10.0uH C5432 390pF 50V R5410 12 L5402 10.0uH NRS6045T100MMGK C5431 390pF 50V NRS6045T100MMGK R5411 12 C5435 0.47uF 50V C5438 R5417 0.1uF 50V 5.1K C5439 R5418 0.1uF 50V 5.1K SPEAKER_R 50V SPK_R- E THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes xxLT760H-UA AMP_NEO 2011.04.30 54 LGE Internal Use Only CI POWER ENABLE CONTROL +5V_CI_ON +5V_NORMAL C6202 0.1uF 16V G OPT D S Q6201 AO3407A R6241 22K R6221 10K OPT C6207 4.7uF 10V OPT C6210 1uF 25V OPT R6248 10K R6242 2.2K R6223 4.7K PCM_5V_CTL R6218 10K C Q6200 MMBT3904(NXP) B E Option FOR MTK Option FOR LG1152 C6210-*1 1uF 25V CI_MTK THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes CI SLOT 2011.10.31 62 LGE Internal Use Only H/NIM for Commercial (EU) TU6500 TDSS-G101D 1 2 3 4 5 6 7 8 9 10 11 NC RESET SCL SDA +3.3V OPT SIF OPT +1.8V C6501 18pF 50V C6500 18pF 50V R6500 CVBS R6503 470 I2C_SDA6 33 close to TUNER IF_AGC DIF[P] 0.1uF 16V R6504 82 R6508 220 TUNER_SIF E R6510 220 2012 perallel because of derating TU_CVBS C6505 DIF[N] +5V_TU +5V_TU I2C_SCL6 33 R6501 B R6502 4.7K E C Q6500 MMBT3906(NXP) B R6507 1K 12 SHIELD C Max 240mA Q6501 MMBT3906(NXP) +3.3V_TU +1.8V_TU OPT IC6501 AZ1117BH-1.8TRE1 +3.3V_TU +3.3V_TU C6509 100pF 50V OPT R6511 100K C6511 0.1uF 16V IN 3 2 OUT R6517 1 1 /TU_RESET ADJ/GND C6510 0.1uF 16V C6523 10uF 10V R6506 100 close to Tuner R6505 C6507 0.1uF 16V 100 C6524 0.1uF 16V 1. should be guarded by ground IF_AGC2. No via on both of them 3. Signal Width >= 12mils Signal to Signal Width = 12mils Ground Width >= 24mils should be guarded by groumd IF_N IF_P L6503 BLM18PG121SN1D C6525 100pF 50V C6526 0.1uF 16V C6527 0.1uF 16V +1.8V_TU close to Tuner‘ 150mA(MAX) 465mA(MAX) +3.3V_NORMAL R6513 0 L6502 BLM18PG121SN1D C6513 0.1uF 16V C6515 22uF 10V +5V_TU +5V_NORMAL +3.3V_TU C6518 0.1uF 16V C6517 0.1uF 16V C6519 22uF C6520 22uF 10V 10V C6521 0.1uF 16V Close to the tuner Close to the tuner THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes xxLT760H-UA TUNER 2011.08.11 65 LGE Internal Use Only LVDS LVDS_51PIN P7100 FI-RE51S-HF-J-R1500 [51Pin LVDS OUTPUT Connector] [30Pin LVDS OUTPUT Connector] LVDS_30PIN 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 P7101 FF10001-30 NC NC NC 1 NC 2 AUO_65_MIRROR +3.3V_NORMAL 4 LVDS_SEL NC R7107 33 5 PWM_DIM1 R7105 1K 37_LGD 37_LGD L/DIM_ENABLE GND RA0N TXA0N RA0P TXA0P RA1N TXA1N 0 OPT 3 LVDS_SEL NC R7108 OPC_SEL 0 3 NC OPT 2 R7109 1 6 TXA3P 7 TXA3N 8 R7106 10K OPT 9 TXACLKP 10 TXACLKN OPC_EN 11 RA1P TXA1P 12 TXA2P TXA2N 13 TXA2N TXA2P 14 RA2N RA2P GND 15 TXA1P TXACLKN 16 TXA1N TXACLKP 17 RACLKN RACLKP GND 18 TXA0P TXA3N 19 TXA0N TXA3P 20 RA3N RA3P RA4N 21 RA4P 22 GND LVDS_SEL 23 BIT_SEL 24 BIT_SEL RB0N TXB0N 25 TXB0P 26 TXB1N 27 TXB1P 28 TXB2N 29 RB0P RB1N RB1P RB2N RB2P 30 TXB2P GND 31 RBCLKN TXBCLKN RBCLKP TXBCLKP GND RB3N TXB3N RB3P TXB3P RB4N RB4P GND GND GND GND PANEL_VCC GND NC L7100 BLM18SG121TN1D VLCD VLCD VLCD VLCD C7100 10uF 16V OPT C7101 1000pF 50V OPT C7102 0.1uF 50V OPT LVDS_SEL BIT_SEL +3.3V_NORMAL +3.3V_NORMAL 52 GND 3.3K BIT_SEL_HIGH BIT_SEL R7104 10K BIT_SEL_LOW THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes R7101 R7103 3.3K LVDS_SEL_HIGH LVDS_SEL R7102 10K LVDS_SEL_LOW xxLT760H-UA LVDS_HIGH_MID 2011.08.11 71 LGE Internal Use Only LOCAL DIMMING [To LED DRIVER] +3.3V_NORMAL LOCAL_DIM P7600 12507WR-08L R7600 10K OPT 1 2 R7601 10K LOCAL_DIM AR7600 33 1/16W 3 L/DIM0_SCLK 4 5 L/DIM0_MOSI 6 I2C_SCL1 7 LOCAL_DIM 8 R7606 I2C_SDA1 33 L/DIM0_VS LOCAL_DIM 9 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes R7607 4.7K LOCAL_DIM xxLT760H-UA LOCAL DIMMING 2011.04.30 76 LGE Internal Use Only eMMC I/F EMMC_VCCQ 10K R8107 IC8100-*3 H26M31001EFR IC8100-*1 H26M21001ECR A3 EMMC_DATA[1] A4 EMMC_DATA[2] A5 EMMC_DATA[3] EMMC_DATA[4] B2 EMMC_DATA[5] B4 B3 EMMC_DATA[6] EMMC_DATA[7] B5 AR8101 22 1/16W B6 DAT0 NC_25 DAT1 NC_26 DAT2 NC_27 DAT3 NC_28 DAT4 NC_29 DAT5 NC_30 DAT6 NC_31 DAT7 NC_32 NC_33 NC_34 M6 M5 CLK NC_35 CMD NC_36 NC_37 NC_38 A6 C5 E5 E8 EMMC_CLK AR8102 E9 22 E10 EMMC_CMD F10 EMMC_RST G3 G10 H5 OPT J5 C8107 10pF 50V K6 K7 K10 P7 P10 NC_39 NC_4 NC_40 NC_23 NC_41 NC_42 NC_46 NC_43 NC_47 NC_44 NC_48 NC_45 NC_49 NC_52 NC_50 NC_58 NC_51 NC_59 NC_53 NC_66 NC_54 NC_73 NC_55 NC_80 NC_56 NC_81 NC_57 NC_82 NC_60 NC_116 NC_61 NC_119 NC_62 K5 RESET OPT C8100 0.1uF 16V C6 M4 3.3V_EMMC EMMC_VCCQ N4 P3 EMMC_RESET_BALL EMMC_CMD_BALL EMMC_CLK_BALL DAT6 DAT5 DAT4 DAT3 P5 VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5 C8105 0.1uF 16V C8106 2.2uF 10V E6 F5 J10 K9 VCC_1 VCC_2 VCC_3 VCC_4 EMMC_VDDI C2 VDDI C8104 0.1uF 16V E7 G5 H10 K8 C8102 0.1uF 16V C8103 2.2uF 10V C4 N2 N5 P4 P6 VSS_1 SANDISK_EMMC_4GB A7 NC_3 NC_63 NC_64 NC_65 NC_67 NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89 VSS_2 NC_90 VSS_3 NC_91 VSS_4 NC_92 VSSQ_1 NC_93 VSSQ_2 NC_94 VSSQ_3 NC_95 VSSQ_4 NC_96 VSSQ_5 NC_97 NC_98 NC_99 DAT3 DAT4 A2 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 Don’t Connect Power At VDDI B13 EMMC_VDDI B14 C1 (Just Interal LDO Capacitor) DAT5 NC_100 A1 C3 C7 NC_1 NC_101 NC_2 NC_102 NC_5 NC_103 NC_6 NC_104 NC_7 NC_105 NC_8 NC_106 NC_9 NC_107 NC_10 NC_108 NC_11 NC_109 NC_12 NC_110 NC_13 NC_111 NC_14 NC_112 NC_15 NC_113 NC_16 NC_114 NC_17 NC_115 NC_18 NC_117 NC_19 NC_118 NC_20 NC_120 NC_21 NC_121 NC_22 NC_122 NC_24 NC_123 DU1 DU2 DU3 DU4 DU5 DU6 DU7 DU8 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics. Inc. All rights reserved. Only for training and service purposes DUMMY_1 DUMMY_9 DUMMY_2 DUMMY_10 DUMMY_3 DUMMY_11 DUMMY_4 DUMMY_12 DUMMY_5 DUMMY_13 DUMMY_6 DUMMY