1
Download Power PC 440GX Embedded Processor
Transcript
Revision 1.20 – June 9, 2009 440GX – Power PC 440GX Embedded Processor Data Sheet DCR Address Map 4KB of Device Configuration Registers Function Start Address End Address Size 000 3FF 1KW (4KB)1 Reserved 000 00B 12W Clocking Power On Reset 00C 00D 2W System DCRs 00E 00F 2W Memory Controller 010 011 2W External Bus Controller 012 013 2W External Bus Master I/F 014 015 2W PLB Performance Monitor 016 01F 10W SRAM 020 02F 16W L2 Controller 030 03F 16W Reserved 040 07F 64W PLB 080 08F 16W PLB to OPB Bridge Out 090 09F 16W Reserved 0A0 0A7 8W OPB to PLB Bridge In 0A8 0AF 8W Power Management 0B0 0B7 8W Reserved 0B8 0BF 8W Interrupt Controller 0 0C0 0CF 16W Interrupt Controller 1 0D0 0DF 16W Clock, Control, and Reset 0E0 0EF 16W Reserved 0F0 0FF 16W DMA Controller 100 13F 64W Reserved 140 17F 64W Ethernet MAL 180 1FF 128W Base Interrupt Controller 200 20F 16W Interrupt Controller 2 210 21F 16W Reserved 220 3FF 480W Total DCR Address Space1 By function: Notes: 1. DCR address space is addressable with up to 10 bits (1024 or 1K unique addresses). Each unique address represents a single 32-bit (word) register. One kiloword (1024W) equals 4KB (4096 bytes). 8 AMCC
