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Thus, any transition between “On” and “Off” would result in the loss of the approximately M seconds out of the
nominal N seconds of observation time.
a2) Spectrometer as Slave: “Enable/Disable FFT”
This mode is very similar to a1) described above, except that it uses the front panel μDB-15 connector input
“Enable/disable FFT” (pin 1 of the connector) to actually veto the accumulation of power spectra. The transition to
‘enable’ clears the already accumulated spectrum since one typically wants to avoid mixing spectra before and after
the transition.
There would still be some loss of accumulated spectra, but this method would have the advantage that the host
computer would not have to continuously monitor the “Data Ready” line. It would be sufficient to read the value of
the “Off Target” signal whenever an interrupt occurs.
b) Spectrometer as Master
In this mode, the 8 output lines of the front panel μDB-15 connector can be used to initiate the movement of the
telescope or other actions. The host computer software would typically wait until an accumulation is terminated
before reading and resetting the FFT accumulation and setting the appropriate lines on the μDB-15 connector to get
the telescope to move. It probably would have to monitor one of the input lines to detect when the telescope is in a
stable position.
6.3.8. Registers in FFT Spectrometer Firmware
This section describes in detail all registers that are specific to the FFT Spectrometer Firmware.
6.3.8.1.
Indirect Access Port
This register gives access to large data blocks, together with the Indirect Address Register and the Buffer Identifier
Register. As seen by the control software, it acts like a FIFO data port.
Register Space
Register Number
Register Address
Customer
0
0x2200
31..0
IndirData
[31..0]
IndirData
RW
6.3.8.2.
Indirect Data value. Every read or write access uses the indirect
address defined by the Indirect Address and Buffer Identifier
registers.
Indirect Address Register
Register Space
Register Number
Register Address
Customer
1
0x2204
31..0
IndirAddr
[31..0]
IndirAddr
RW
This register defines the address for Indirect Access.
It is used when accessing the Indirect Access Port. This address is
defined in bytes and is auto incremented by 4 for each read or written
word from / to the Indirect Access Port.
6.3.8.3.
Buffer Identifier Register
Register Space
Register Number
Register Address
Customer
2
0x2208
31..0
IndirCtr
[31..0]
IndirCtr
RW
This register defines the target for indirect Access. Available Buffers
are listed in the section 6.2.2.
User Manual: Analyzers AC210, AC240 + FFT
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