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ABSOLUTE MAXIMUM RATINGS*
PIN FUNCTION DESCRIPTION
VDD to DGND ..............................................................................................................................-0.3V to + 7V
Pin No.
1
2
3
4
Digital Input Voltage to DGND
(CONVST, RD, CS) ...............................................................................................................-0.3V, VDD + 0.3V
Digital Output Voltage to DGND
(BUSY, DB0-DB7) .................................................................................................................-0.3V, VDD + 0.3V
Mnemonic
VREF
VIN
GND
CONVST
REFIN to AGND ......................................................................................................................-0.3V, VDD + 0.3V
Analog Input ..........................................................................................................................-0.3V, VDD + 0.3V
Storage Temperature Range.................................................................................................-65 to + 150°C
Junction Temperature ........................................................................................................................... 150°C
Plastic DIP Package, Power Dissipation .............................................................................................450mW
JA Thermal Impedance...................................................................................................................105°C/W
Lead Temperature, (Soldering 10 sec)................................................................................................260°C
SOIC Package, Power Dissipation ......................................................................................................450mW
JA Thermal Impedance .....................................................................................................................75°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) ....................................................................................................................215°C
Infrared (15 sec)............................................................................................................................220°C
SSOP Package, Power Dissipation.....................................................................................................450mW
JA Thermal Impedance ...................................................................................................................115°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) ....................................................................................................................215°C
Infrared (15 sec).............................................................................................................................220°C
5
6
CS
RD
7
BUSY
8-15
16
DB0-DB7
VDD
Description
Reference Input, 1.2V to VDD.
Analog Input, 0V to VREF.
Analog and Digital Ground.
Convert Start. A low-to-high transition on this pin initiates a 1.5 µs pulse on an
internally generated CONVST signal. A high-to-low transition on this line initiates the
conversion process if the internal CONVST signal is low. Depending on the signal on
this pin at the end of a conversion, the AD7819 automatically powers down.
Chip Select. This is a logic input. CS is used in conjunction with RD to enable outputs.
Read Pin. This is a logic input. When CS is low and RD goes low, the DB7-DB0 leave
their high impedance state and data is driven onto the data bus.
ADC Busy Signal. This is a logic output. This signal goes logic high during the
conversion process.
Data Bit 0 to 7. These outputs are three-state TTL-compatible.
Positive power supply voltage, 2.7V to 5.5V.
PIN CONFIGURATION DIP/SOIC
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charge as high as 4000V
readily accumulate on the human body and test equipment and can discharge
without detection. Although the AD7819 features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high-energy electrostatic
discharges, Therefore, proper ESD precaution are recommended to avoid performance degradation or loss of
functionality.
Figure 1. Load Circuit for Digital Output Timing Specifications
ORDERING GUIDE
Model
AD7819YN
AD7819YR
AD7819YRU
Linearity Error(LSB)
± 1 LSB
± 1 LSB
± 1 LSB
Package Description
Plastic DIP
Small Outline IC
Thin Shark Small
Outline (TSSOP)
Package Option
N-16
R-16A
RU-16
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only;
functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
8
9