Download Texas Instruments Chipset TRF2436EVM User's Manual

User's Guide
SLWU038 – August 2006
TRF2436EVM
This user’s guide provides an overview of the TRF2436 evaluation module (EVM) to
get you started using the TRF2436EVM right away. It also provides a general
description of the features and functions to be considered when using this module.
1
2
3
Contents
Introduction .......................................................................................... 1
TRF2436EVM Operational Procedure ........................................................... 2
Physical Description ................................................................................ 3
List of Figures
1
2
3
4
Top Layer 1..........................................................................................
Ground Plane Layer 2..............................................................................
Power Plane Layer 3 ...............................................................................
Bottom Layer 4 ......................................................................................
4
4
5
5
List of Tables
1
1
Introduction
1.1
Purpose
TRF2436EVM PARTS LIST ....................................................................... 6
The TRF2436 EVM provides a platform for evaluating the TRF2436 high-power, dual-band RF front-end
under various signals, reference, and supply conditions. Use this document with the EVM schematic
diagram supplied. Using the TRF2436EVM, you can rapidly evaluate the TRF2436 with a minimum of
manual setup.
1.2
System Requirements
Use the following equipment when evaluating the TRF2436EVM:
• +3.3-V power supply, 800 mA.
• Signal generator: Agilent ESG Series (with baseband I/Q modulation option for modulated testing) or
equivalent.
• Spectrum analyzer: Agilent PSA Series (with phase noise option) or equivalent.
• Vector signal analyzer: Agilent 89600 Series for 802.16x modulated EVM testing or equivalent.
1.3
Power Requirements
The demonstration board requires only one supply for proper operation. Connect +3.3 V at P1 and the
return to P2. Always terminate active PA outputs before enabling the power supply.
Voltage Limits
Exceeding the maximum input voltages can damage EVM components. Undervoltage can cause improper
operation of some or all of the EVM components.
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TRF2436EVM Operational Procedure
1.4
Hardware Configuration
The TRF2436EVM can be set up in a variety of configurations to accommodate a specific mode of
operation. Before starting an evaluation, decide on the configuration and make the appropriate
connections or changes. The demonstration board comes with the following factory-set configuration:
Jumper J10 installed between 1-2
Jumper J11 installed between 2-3
Jumper J12 installed between 1-2
Jumper J13 installed between 1-2
Jumper J14 installed between 1-2
LO input drive
The TRF2436 has been designed to be driven with a differential LO input. A simple balun centered at ~2.6
GHz can be used to convert a single-ended input from an RF source to a differential pair to provide a
differential LO to the EVM through SMA connectors J3 and J4.
The 2436 will function if driven single-ended, but it is not designed to operate in this condition, nor has it
been evaluated in this condition. To drive the LO single-ended, connect an RF source to the LOP SMA
(J3) and terminate the LON SMA (J4) input with 50 Ω.
Filtering
The TRF2436EVM is provided with no filtering. The mixer output, PA input/LNA output, and RF
input/output pins are brought out directly to SMA connectors on the EVM. Filtering may be incorporated
by:
• Connecting an external filter to RFANTA (J6) for filtering after the PA in TX mode or before the LNA in
RX mode.
• Connecting an external filter between the MFA (J8) and RFA (J9) jacks for filtering between the mixer
and PA/LNA stages
2
TRF2436EVM Operational Procedure
2.1
TX Operation
1. Connect +3.3 V to P1 and ground to P2 but do not turn on.
2. Connect differential LO source to LOP/LON jacks (or use external balun).
Set the appropriate frequency and power level between 0 to +4 dBm. Remember that for A-band
operation, the LO input frequency is doubled inside the TRF2436; so, the LO should be set to half the
frequency desired at the mixer LO port.
3. Connect an IF source to the IF port. Set to 374 MHz with a typical power level of –20 dBm.
4. Set ABSEL (J12) to a logic high 1.
5. Set TR (J13) to a logic high 1.
6. Set PA_B SEL (J11) to a logic low 0.
7. Set PA_A SEL (J10) to logic high 1.
8. RXDGC = don’t care
9. For mixer stage measurement:
a. Terminate RFA (J9) and RFANTA (J6) into 50 Ω.
b. Connect a spectrum analyzer to MFA (J8).
c. Turn on the 3.3-V power supply (~300 mA to 320 mA).
d. Observe the output of the mixer stage on a spectrum analyzer.
10. For PA stage measurement:
a. Terminate IF (J7) and MFA (J8) into 50 Ω.
b. Apply an RF to RFA (J9).
c. Connect a spectrum analyzer to RFANTA (J6).
d. Turn on the power supply.
e. Observe the PA output on a spectrum analyzer.
2
TRF2436EVM
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Physical Description
2.2
RX Operation
1. Set TR (J13) to logic 0.
2. Set PA_A SEL (J10) to logic 0.
3. Connect a differential LO source to the LOP/LON SMAs (or use an external balun).
Set the LO to an appropriate frequency, with the power level between 0 to +4 dBm. Remember that for
A-band operation, the LO input frequency is doubled inside the TRF2436; so, the LO should be set to
half the frequency desired at the mixer LO port.
4. For mixer stage measurement:
a. Terminate RFA (J9) and RFANTA (J6) into 50 Ω.
b. Connect an RF source to MFA (J8). Set to a desired RF frequency and typical power level
of –20 dBm.
c. Connect a spectrum analyzer to the IF (J7) output.
d. Turn on the 3.3-V power supply (~90 mA).
e. Observe the IF output on a spectrum analyzer (374 MHz).
5. For LNA stage measurement:
a. Terminate IF (J7) and MFA (J8) into 50 Ω.
b. Connect an RF source to RFANTA (J6). Set to a desired frequency and typical power
level of –40 dBm.
c. Connect a spectrum analyzer to RFA (J9).
d. Turn on the power supply.
e. Observe the LNA output on a spectrum analyzer.
f. Use jumper J14 (RXDGC) to select between LNA high (pins 2-3) and low gain (pins 1-2)
modes.
3
Physical Description
This section describes the physical characteristics and PCB layout of the EVM and lists the components
used on the module.
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Physical Description
3.1
PCB Layout
The EVM is constructed on a 4-layer, 3.6-inch × 3.6-inch, 0.042-inch thick PCB using Polycad 370
Turbo/HR material. Figure 1 through Figure 4 show the PCB layout for the EVM.
Figure 1. Top Layer 1
Figure 2. Ground Plane Layer 2
4
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Physical Description
Figure 3. Power Plane Layer 3
Figure 4. Bottom Layer 4
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Physical Description
3.2
Part List
Table 1 lists the parts used in constructing the EVM.
Table 1. TRF2436EVM PARTS LIST
QTY
3.3
Ref
Value
Part Number
Note
1
C1
470pF
GRM033R71C471KD
1
C2
10pF
GRM1555C1H100JZ
1
C3
5600pF
C0402C562K3RACT
7
C4 C6 C11 C15 C17 C24
C33
0.01µF
GRM155R71E103KA
12
C5 C9 C12–C14 C16 C19
C20 C22 C25 C26 C31
100pF
GRM1555C1H101JD
3
C7 C8 C18
10µF
ECJ-4YB1A106K
3
C10 C23 C29
1000pF
GRM155R71H102KA
2
C21 C32
1.2pF
04025A1R2BAT2A
1
C28
0.1µF
ECJ-0EB1A104K
2
FL1 FL2
Filter, 2400–2484MHz
DFCB22G44LBJAA
DNI
2
FL3 FL4
Filter, 5597.5MHz
DFCB35G59LAHAA
DNI
1
FL5
Filter Block, DC power
BNX002-01
9
J1–J9
MXB SMA
142-0701-841
5
J10–J14
PA_A SEL
54201-S08-3
4
L1 R3 R4 R31
3
L2 L3 L7
27Ω at 100MHz
EXC-ML16A270U
4
L6 L8 L10 L12
120Ω at 100MHz
BLM15AG102SN1D
2
L9 L11
33nH
LQW15AN33NJ00D
1
P1
+3.3V_IN
ST-351A
1
P2
PSG
ST-351B
2
Q1 Q3
IRLML6401
IRLML6401
2
Q2 Q4
MMST2222A
MMST2222A-7
8
R1 R2 R6 R7 R35–R38
TRACE GAP, NO PART
1
R5
634
ERJ-2RKF6340X
9
R8–R13 R15 R32 R33
10K
ERJ-2GEJ103X
7
R16–R18 R24 R25 R28
R29
1K
ERJ-2GEJ102X
4
R20–R23
200
ERJ-2RKF2000X
1
R26
750
ERJ-2GEJ751X
1
R27
2K POT
3214W-1-202E
1
R30
5.1K
ERJ-2GEJ512X
1
T1
ADT4-1T
ADT4-1T
6
TP1–TP6
T POINT R
5015
1
U1
TRF2436
TRF2436
2
U2 U3
MMDT3906
MMDT3906-7
1
U4
MMDT3904
MMDT3904-7
DNI
DNI
Schemtic Drawing
The schematic drawing for the TRF2436EVM appears on the following page.
6
TRF2436EVM
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3
MXB SMA
3
1
RFB SMA
3
J2
RFB_SMA 1
J1
MXB_SMA 1
D
2
2
4
2
5
TRACE GAP, NO PART
R1
2
FL1
1
MXB 1
D
TRACE GAP, NO PART
IN
OUT
2
R2
RFB 2
1
Filter, 2400-2484 MHz
DFCB22G44LBJAA_DNI
DNI
50 OHM
ABSEL
100 OHM
T1
VDD
1
50 OHM
50 OHM
1
FL4
2MXA 1
IN
OUT
2 RFA 1
R7
634
C3
5600 pF
2
1
3
1
J6
1
R35
2
C2
10pF
RFANTB SMA
2
RFANTA SMA
TRACE GAP, NO PART
FL3
1FANTA 1
2
IN
OUT
2FANTA_S 2
R36
1
Filter, 5597.5MHz
DFCB35G59LAHAA_DNI
DNI
BCIN
C4
0.01uF
B
2
Filter, 5597.5MHz
DFCB35G59LAHAA_DNI
DNI
MXA_SMA
R5
1
R38
Filter, 2400-2484 MHz
DFCB22G44LBJAA_DNI
DNI
BYPOUT
C1
470pF
2
TRACE GAP, NO PART
TRACE GAP, NO PART
R6
BCOUT
2 FANTB_S
OUT
50 OHM
2
C16
100pF
1
1
2
B
C15
.01uF
RFANTA
2
4
50 OHM
1FANTB
1 IN
TRACE GAP, NO PART
2
3
L1
DNI
RFANTB
TRACE GAP, NO PART J5
FL2
1
5
V+LNABA
R37
2
DETP
DETN
2
IF SMA
2
30
29
28
27
26
25
24
23
22
21
1
IF_SMA
50 OHM
6
TRF 2436
V+PA1A
V+GEN
V+PA2A
PABCA
V+PA3A
1
1
V+PA3B
DETP
DETN
RFANTB
V+LNABA
RFANTA
GND2
GND1
BYPOUT
BYPIN
TRACE GAP, NO PART
TP2
11
12
13
14
15
16
17
18
19
20
2
J7
100 OHM
V+IF
V+IFP
V+IFN
3
ADT4-1T
LOADJA
LOP
LON
IFP
IFN
MXB
ABSEL
V+LOB
LOADJA
LOP
LON
IFP
IFN
MXA
L+LOA
V+PA3B
C
2
3
1
2
3
4
5
6
7
8
9
10
BACK
TXGADJB
LOADJB
TR
RXDGC
RFB
RSVD1
V+PA1B
PABCB
BCIN
V+PA2B
U1
R4
DNI
V+IF
V+IFP
V+IFN
RFA
V+PA1A
V+GEN
V+PA2A
PABCA
V+PA3A
BCOUT
1
LON SMA
1
1
C14
100pF
2
DNI
41
40
39
38
37
36
35
34
33
32
31
2
1
C
R3
1
1
50 OHM
TP1
1
J4
LOADJB
TR
RXDGC
50 OHM
3
VDD
2
50 OHM
LOP SMA
2
1
RFA_SMA
2
V+PA1B
PABCB
BCIN
V+PA2B
3
J3
1
A
1
A
J8
J9
3
MXA SMA
2
2
3
RFA SMA
Title
Engineer:
M. ARNOLD
Drawn By:
L. NGUYEN
Size
B
Date:
5
4
3
2
TRF2436 Evaluation Module
Document Number
Monday, April 17, 2006
Rev
TRF2436EVM-SCH
Sheet
1
1
A
of
3
5
4
3
2
1
2
2
2
D
VDD
27 OHM @ 100MHz
C8
10uF
TP3
GND
Filter Block, DC power
Murata BNX002-01
GND
V+PA2A
1
VDD
1
C11
.01uF
C10
1000pF
IRLML6401
Q2
1
2
3
R9
1
Q1
2
2
2
3
27 OHM @ 100MHz
C9
100pF
R8
10K
2
L3
1
PSG
C7
10uF
10K
MMST2222A
C12
V+PA3A
2
1
1
2
R32
10K
100pF
2
C13
100pF
J10
PA_A SEL
1
PSG
1
1
PSG
CB
CG2
CG1
C6
.01uF
C5
100pF
3
B
BLK
1 1
1
L2
D
P2
V+PA1A
2
3.3V_IN
2
+3.3V_IN
1
FL5
RED
1 1
VDD
CG3
P1
1
VDD
C
C
VDD
VDD
2
3
C23
1000pF
VDD
1
C24
.01uF
Q4
R11
1
Q3
IRLML6401
2
2
3
1
1
2
C22
100pF
1
2
C32
1.2pF
27 OHM @ 100MHz
1
V+PA2B
V+LNABA
1
2
1
C31
100pF
1
2
120 ohm @ 100MHz
R10
10K
2
L7
V+IF
C21
1.2pF
VDD
2
L12
2
L6
C20
100pF
C18
10uF
TP4
VDD
120 ohm @100MHz
2
1
2
C17
.01uF
C19
100pF
2
VDD
V+GEN
1
C28
.1uF
1
V+PA1B
120 ohm @ 100MHz
1
L10
1
2
3
10K
MMST2222A
B
C29
2
2
5 MIL trace
V+IFP
5 MIL trace
V+IFN
33nH
L11
1
1000pF
R33
10K
2
VDD
2
100pF
C26
100pF
120 ohm @100MHz
B
1
1
1
L9
PA_B SEL
C25
V+PA3B
L8
J11
LOADJB
33nH
LOADJA
R31
DNI
R30
5.1K
A
A
Title
Size
B
Date:
5
4
3
2
TRF2436 Evaluation Module
Document Number
Rev
TRF2436EVM-SCH
Thursday, April 13, 2006
Sheet
1
2
A
of
3
5
4
3
2
VDD
1
VDD
VDD
D
1
D
R13
10K
R15
10K
2
R12
10K
.01uF
C33
J12
1
2
3
ABSEL
J13
ABSEL
1
2
3
TR
R16
1K
TR
1
2
3
J14
R17
1K
RXDGC
R18
1K
RXDGC
C
C
VDD
VDD
R20
200
R21
200
TP6
TP5
PABCA
R22
200
R23
200
PABCB
U2
U3
E1
C1
E1
C1
B1
B2
B1
B2
C2
E2
C2
E2
B
B
MMDT3906
MMDT3906
C1
B2
E2
B1
C2
VDD
E1
R24
1K
R25
1K
U4
MMDT3904
R26
750
R28
1K
R27
2K POT
R29
1K
A
A
Title
Size
B
Date:
5
4
3
2
TRF2436 Evaluation Module
Document Number
Rev
TRF2436EVM-SCH
Thursday, April 13, 2006
Sheet
1
3
A
of
3
EVALUATION BOARD/KIT IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are
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including product safety and environmental measures typically found in end products that incorporate such semiconductor
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Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30
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Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the
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FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15
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EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 0 V to 3.3 V and the output voltage range of 0 V to 3.3 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load
specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 85°C. The EVM is designed to
operate properly with certain components above 85°C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
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