Download Transcend Memoria Ram DDR2 2GB

TS256MFB72V8U-T
240PIN DDR2 800 Fully Buffered DIMM
2GB With 128Mx8 CL5
Description
MBIST and IBIST Test functions
The TS256MFB72V8U-T is a 256M x 72bits ECC
Hot add-on and Hot Remove Capability
DDR2-800 Fully Buffered DIMM. The TS256MFB72V8U-T
Transparent mode for DRAM test support
consists of 18pcs 128Mx8bits DDR2 SDRAMs in 68 ball
Support ECC Function.
FBGA package, 1 pcs AMB IC, and a 2048 bits serial
Placement
EEPROM on a 240-pin printed circuit board. The
TS256MFB72V8U-T is a 240pin fully buffered dual in-line
memory module.
The Advanced Memory Buffer also allows buffering of
memory traffic to support large memory capacities. All
memory control for the DRAM resides in the host,
B
including memory request initiation, timing, refresh,
scrubbing, sparing, configuration access, and power
D
FE
management. The Advanced Memory Buffer interface is
responsible for handling channel and memory requests to
A
and from the local DIMM and for forwarding requests to
AMB
other DIMMs on the memory channel. Fully Buffered
DIMM provides a high memory bandwidth, large capacity
channel solution that has a narrow host interface.
Features
C
240pin fully buffered dual in-line memory module
3.2Gb/s, 4.0Gb/s, 4.8Gb/s link transfer rate
G
1.8V +/- 0.1V Power Supply for DRAM VDD/VDDQ
H
1.5V +/- 0.075V Power Supply for AMB VCC
3.3V +/- 0.3V Power Supply for VDDSPD
Buffer
Interface
with
high-speed
I
differential
M
J
K
point-to-point Link at 1.5 volt
L
Channel error detection & reporting
Channel fail over mode support
PCB: 09-2602
Serial presence detect with EEPROM
8 Banks
Posted CAS
Programmable CAS Latency : 3, 4, 5
Automatic DDR2 DRAM bus and channel calibration
Transcend Information Inc.
1
N
240PIN DDR2 800 Fully Buffered DIMM
2GB With 128Mx8 CL5
TS256MFB72V8U-T
Dimensions
Pin Description
Side
Millimeters
Inches
Symbol
A
133.35±0.15
5.250±0.006
SCK
System Clock Input, positive line
B
51
2.0
/SCK
System Clock Input, negative line
C
67
2.64
PN[13:0]
Primary Northbound Data, positive lines
D
5
0.197
/PN[13:0]
Primary Northbound Data, negative lines
E
2.5
0.0980
F
1.5±0.10
0.059±0.039
PS[9:0]
Primary Southbound Data, positive lines
G
5.175
0.204
/PS[9:0]
Primary Southbound Data, negative lines
H
3.25
0.128
SN[13:0]
Secondary Northbound Data, positive lines
I
3
0.118
/SN[13:0]
Secondary Northbound Data, negative lines
J
9.5
0.374
SS[9:0]
Secondary Southbound Data, positive lines
K
18.8
0.74
/SS[9:0]
Secondary Southbound Data, negative lines
L
30.35±0.15
1.2±0.006
SCL
Serial Presence Detect (SPD) Clock Input
M
1.27±0.10
0.050±0.004
N
6.80
0.268
SDA
SA[2:0]
(Refer Placement)
VID[1:0]
AMB reset signal
RFU
Reserved for Future Use
VTT
AMB Core Power and AMB Channel interface
Power (1.5 Volt)
DRAM Power and AMB DRAM I/O Power (1.8
Volt)
DRAM Address/Command/Clock Termination
Power (VDD/2)
VDDSPD
SPD Power
VSS
Ground
The DNU/M Test pin provides an external
connection R/Cs A-D for testing the margin of
Vref which is produced by a voltage divider on
the module. It is not intended to be used in
normal system operation and must not be
connected(DNU) in a system. This test pin
may have other features on future card
designs and if it does, will be included in this
specification at that time.
VDD
DNU/M_Test
2
SPD Data Input / Output
SPD Address Input, also used to select the
DIMM number in the AMB
Voltage ID: these pins must be unconnected
for DDR2-base Fully Buffered DIMMs
VID[0] is VDD value:OPEN=1.8V,GND=1.5V
VID[1] is Vcc value:OPEN=1.5V,GND=1.2V
RESET
VCC
Transcend Information Inc.
Function
240PIN DDR2 800 Fully Buffered DIMM
2GB With 128Mx8 CL5
TS256MFB72V8U-T
Pinouts:
Pin
No
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin
Name
VDD
VDD
VDD
VSS
VDD
VDD
VDD
VSS
VCC
VCC
VSS
VCC
VCC
VSS
VTT
VID1
/RESET
VSS
RFU**
RFU**
VSS
PN0
/PN0
VSS
PN1
/PN1
VSS
PN2
/PN2
VSS
PN3
/PN3
VSS
PN4
/PN4
VSS
PN5
/PN5
VSS
PN13
Pin
No
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Pin
Name
/PN13
VSS
VSS
RFU**
RFU**
VSS
VSS
PN12
/PN12
VSS
PN6
/PN6
VSS
PN7
/PN7
VSS
PN8
/PN8
VSS
PN9
/PN9
VSS
PN10
/PN10
VSS
PN11
/PN11
VSS
VSS
PS0
/PS0
VSS
PS1
/PS1
VSS
PS2
/PS2
VSS
PS3
/PS3
Transcend Information Inc.
Pin
No
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
Pin
Name
VSS
PS4
/PS4
VSS
VSS
RFU**
RFU**
VSS
VSS
PS9
/PS9
VSS
PS5
/PS5
VSS
PS6
/PS6
VSS
PS7
/PS7
VSS
PS8
/PS8
VSS
RFU**
RFU**
VSS
VDD
VDD
VSS
VDD
VDD
VDD
VSS
VDD
VDD
VTT
SA2
SDA
SCL
Pin
No
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
3
Pin
Name
VDD
VDD
VDD
VSS
VDD
VDD
VDD
VSS
VCC
VCC
VSS
VCC
VCC
VSS
VTT
VID0
DNU/M_Test
VSS
RFU**
RFU**
VSS
SN0
/SN0
VSS
SN1
/SN1
VSS
SN2
/SN2
VSS
SN3
/SN3
VSS
SN4
/SN4
VSS
SN5
/SN5
VSS
SN13
Pin
No
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
Pin
Name
SN13
VSS
VSS
RFU**
RFU**
VSS
VSS
SN12
/SN12
VSS
SN6
/SN6
VSS
SN7
/SN7
VSS
SN8
/SN8
VSS
SN9
/SN9
VSS
SN10
/SN10
VSS
SN11
/SN11
VSS
VSS
SS0
/SS0
VSS
SS1
/SS1
VSS
SS2
/SS2
VSS
SS3
/SS3
Pin
No
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
Pin
Name
VSS
SS4
/SS4
VSS
VSS
RFU**
RFU**
VSS
VSS
SS9
/SS9
VSS
SS5
/SS5
VSS
SS6
/SS6
VSS
SS7
/SS7
VSS
SS8
/SS8
VSS
RFU**
RFU**
VSS
SCK
/SCK
VSS
VDD
VDD
VDD
VSS
VDD
VDD
VTT
VDDSPD
SA0
SA1