Download LG Electronics RAS375F Stereo System User Manual

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North/Latin America
Europe/Africa
Asia/Oceania
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LED TV
SERVICE MANUAL
CHASSIS : LD3AF
MODEL : 37LN549E
37LP63*H
37LN549E-ZA
37LP63*H-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67800104 (1305-REV00)
Printed in Korea
CONTENTS
CONTENTS . ............................................................................................. 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS ................................................................... 4
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 10
TROUBLESHOOTING GUIDE................................................................. 19
BLOCK DIAGRAM ................................................................................. 25
EXPLODED VIEW .................................................................................. 26
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-3-
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug
or other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication
of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks
are correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder
ES devices.
4. Use only an anti-static type solder removal device. Some solder removal devices not classified as “anti-static” can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will
be installed.
CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within
the range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand
against the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This specification is applied to the LED TV used LD3AF
chassis.
3. Test method
2. Requirement for Test
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
Each part is tested as below without special appointment.
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Model General Specification
No.
1
Item
Market
Specification
Remarks
EU(PAL Market-37Countries) DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) :37 countries
UK/Italy/Germany/France/Spain/Sweden/Finland/Netherlands/ Belgium/Luxemburg/Greece/Denmark/Czech/Austria
/Hungary/Swiss/Croatia/Turkey/Norway/Slovenia/Poland/
Ukraine/Portugal/Ireland/Morocco/Latvia/Estonia/Lithania/
Rumania/Bulgaria/Russia/Slovakia/Bosnia/Serbia/Albania/
Kazakhstan/Belarus
DTV (MPEG2/4, DVB-T2): 8 countries
UK/Denmark/Sweden/Finland/Norway/Ireland/Ukraine/Kazakhstan
DTV (MPEG2/4, DVB-C): 37 countries
UK/Italy/Germany/France/Spain/Sweden/Finland/Netherlands/ Belgium/Luxemburg/Greece/Denmark/Czech/Austria
/Hungary/Swiss/Croatia/Turkey/Norway/Slovenia/Poland/
Ukraine/Portugal/Ireland/Morocco/Latvia/Estonia/Lithania/
Rumania/Bulgaria/Russia/Slovakia/Bosnia/Serbia/Albania/
Kazakhstan/Belarus
DTV (MPEG2/4,DVB-S): 29 countries
Italy/Germany/France/Spain/Netherlands/Belgium/Luxemburg/ Greece/Czech/Austria/Hungary/Swiss/Croatia/Turkey/
Slovenia/Poland/Portugal/Morocco/Latvia/Estonia/Lithuania/
Rumania/Bulgaria/Russia/Slovakia/Bosnia/Serbia/Albania/
Belarus
Supported satellite : 22 satellites
HISPASAT 1C/1D, ATLANTIC BIRD 2, NILESAT 101/102,
ATLANTIC BIRD 3, AMOS 2/3, THOR 5/6, IRIUS 4, EUTELSAT-W3A, EUROBIRD 9A, EUTELSAT-W2A, HOTBIRD
6/8/9, EUTELSAT-SESAT, ASTRA 1L/H/M/KR, ASTRA 3A/3B,
BADR 4/6, ASTRA 2D, EUROBIRD 3, EUTELSAT-W7, HELLASSAT 2, EXPRESS AM1, TURKSAT 2A/3A, INTERSAT10
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-6-
LGE Internal Use Only
No.
2
Item
Broadcasting system
Specification
Remarks
Analogue TV
1) PAL-BG
2) PAL-DK
3) PAL-I/I’
4) SECAM L/L’
Digital TV
1) DVB-T/C/T2
Satellite Digital TV
1) DVB-T/C/S/S2
Analogue TV : (RF) VHF: E2 to E12, UHF : E21 to E69
(CATV) S1 to S20, HYPER: S21 to S47
Digital TV : VHF, UHF
Satellite TV : VHF, UHF, C-Band, Ku-Band
Analog : Upper Heterodyne
Digital : COFDM , QAM
3
Receiving system
4
Scart Jack (1EA)
5
Component Input (1EA)
6
RGB Input
RGB-PC
7
HDMI Input (3EA)
HDMI1-DTV/DVI
HDMI2-DTV
HDMI3-DTV
8
Audio Input (1EA)
RGB/DVI/Component Audio
9
10
11
SDPIF out (1EA)
External Speaker out (1EA)
External Speaker out Control (1EA)
12
Earphone out (1EA)
SPDIF out
Stereo, 1W (8 Ω), Single-End
Phone Jack
Antenna, AV1, AV2, Component,
RGB, HDMI1, HDMI2, HDMI3
13
USB
14
DVB
PAL, SECAM
Y/Cb/Cr
Y/Pb/Pr
DVB-C
RS232C(1EA)
16
Ethernet (1EA)
3P Phone Jack type
3P Phone Jack type
JPEG, MP3, DivX HD
* 1EA (LP63xH-ZA model support )
* 2EA (LN549E-ZA model support )- USB IN, Wireless Dongle
: Wireless Dongle port only use for Wireless
CI : U
K, Finland, Denmark, Norway, Sweden, Russia, Spain, Ireland,
Luxemburg, Belgium, Netherland
CI+ : France(Canal+), Italy(DGTVi)
CI : Switzerland, Austria, Slovenia, Hungary, Bulgaria
CI+ : S
witzerland(UPC,Cablecom), Netherland(Ziggo),
Germany(KDG,CWB), Finland(labwise)
EMF,
DivX HD,
For SVC (download)
DVB-T
15
* DVB-T2 ( T2 model only support )
* DVB-S/S2 (Satellite model only support )
► DVB-T
- Guard Interval (Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2
- Guard Interval (Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
► DVB-C
- Symbolrate :
4.0Msymbols/s to 7.2Msymbols/s
- Modulation :
16QAM, 64-QAM, 128-QAM and 256-QAM
► DVB-S
- symbol rate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
Scart 1 Jack is Full scart and support RF-OUT(analog).
Phone Jack type
Video only(Rear)
Analog(D-SUB 15PIN)
*LN549E-ZA model only support
PC(HDMI version 1.3)
Support HDCP
The number of Input ports is different by model.
RGB/DVI & Component Audio common port
* Component/DVI Audio (LP63xH-ZA model support)
* Component/RGB/DVI Audio (LN549E-ZA model support)
Interactive mode support
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Support only communication with Pro :Centrc Server
Support only LP63xH-ZA model
-7-
LGE Internal Use Only
5. Supported video resolutions (2D)
5.1. Component Input (Y, CB/PB, CR/PR)
No.
Resolution
H-freq(kHz)
V-freq(Hz)
Pixel clock(MHz)
Proposed
1
720*576
15.625
50.00
13.5
SDTV ,DVD 576I
2
720*480
15.73
60.00
13.5135
SDTV ,DVD 480I
3
720*480
15.73
59.94
13.50
SDTV ,DVD 480I
4
720*576
31.25
50.00
27.00
SDTV 576P
5
720*480
31.50
60.00
27.027
SDTV 480P
6
720*480
31.47
59.94
27.00
SDTV 480P
7
1280*720
37.50
50.00
74.25
HDTV 720P
8
1280*720
45.00
60.00
74.25
HDTV 720P
9
1280*720
44.96
59.94
74.176
HDTV 720P
10
1920*1080
28.125
50.00
74.25
HDTV 1080I
11
1920*1080
33.75
60.00
74.25
HDTV 1080I
12
1920*1080
33.72
59.94
74.176
HDTV 1080I
13
1920*1080
56.25
50.00
148.50
HDTV 1080P
14
1920*1080
67.50
60.00
148.50
HDTV 1080P
15
1920*1080
67.432
59.94
148.352
HDTV 1080P
16
1920*1080
27.00
24.00
74.25
HDTV 1080P
17
1920*1080
26.97
23.94
74.176
HDTV 1080P
18
1920*1080
33.75
30.00
74.25
HDTV 1080P
19
1920*1080
33.71
29.97
74.176
HDTV 1080P
5.2. RGB Input (PC) - HD Model
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
DDC
1.
640*480
31.469
59.94
VESA(VGA)
O
2.
800*600
37.879
60.31
VESA(SVGA)
O
3.
1024*768
48.363
60.00
VESA(XGA)
O
4.
1152*864
54.348
60.053
VESA
O
5.3. RGB Input (PC) - FHD Model
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
DDC
1
640*350
31.468
70.09
25.17
EGA
X
2
720*400
31.469
70.08
28.32
DOS
O
3
640*480
31.469
59.94
25.17
VESA(VGA)
O
4
800*600
37.879
60.31
40.00
VESA(SVGA)
O
5
1024*768
48.363
60.00
65.00
VESA(XGA)
O
6
1152*864
54.348
60.053
80.00
VESA
O
7
1360*768
47.712
60.015
85.50
VESA (WXGA)
O
8
1920*1080
66.587
59.934
138.5
HDTV 1080P
O
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
5.3. HDMI Input(PC/DTV)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
PC(DVI)
1
Proposed
Remark
DDC
640*350
31.468
70.09
25.17
EGA
X
2
720*400
31.469
3
640*480
31.469
70.08
28.32
DOS
O
59.94
25.17
VESA(VGA)
O
4
800*600
37.879
60.31
40.00
VESA(SVGA)
O
5
1024*768
48.363
60.00
65.00
VESA(XGA)
O
6
1152*864
54.348
60.053
80.00
VESA
O
7
1360*768
47.712
60.015
85.50
VESA (WXGA)
O
8
1280*1024
63.981
60.020
108.0
VESA (SXGA)
O
9
1920*1080
67.50
60.00
148.5
HDTV 1080P
O
1
720*480
31.47
59.94
27.00
SDTV 480P
2
720*480
31.50
60.00
27.027
SDTV 480P
3
720*576
31.250
50.00
27.00
SDTV 576P
4
1280*720
37.50
50.00
74.25
HDTV 720P
5
1280*720
45.00
60.00
74.25
HDTV 720P
6
1280*720
44.96
59.94
74.176
HDTV 720P
7
1920*1080
28.125
50.00
74.25
HDTV 1080I
8
1920*1080
33.75
60.00
74.25
HDTV 1080I
DTV
9
1920*1080
33.72
59.94
74.176
HDTV 1080I
10
1920*1080
56.250
50.00
148.50
HDTV 1080P
11
1920*1080
67.50
60.00
148.50
HDTV 1080P
12
1920*1080
67.432
59.94
148.352
HDTV 1080P
13
1920*1080
27.00
24.00
74.25
HDTV 1080P
14
1920*1080
26.97
23.976
74.176
HDTV 1080P
15
1920*1080
33.75
30.00
74.25
HDTV 1080P
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application Range
(4) Click "Connect" tab. If "Can't" is displayed, check connection
between computer, jig, and set.
This specification sheet is applied to all of the LED TV with
LD3AF chassis.
(2)
(3)
2. Designation
(1) The adjustment is according to the order which is designated
and which must be followed, according to the plan which
can be changed only on agreeing.
(2) Power adjustment : Free Voltage.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation : Above 5 Minutes (Heat Run)
Temperature : at 25 °C ± 5 °C
Relative humidity : 65 ± 10 %
Input voltage : 220 V, 60 Hz
(6) Adjustment equipments: Color Analyzer(CA-210 or CA-110),
DDC Adjustment Jig, Service remote control.
(7) Push the "IN STOP" key - For memory initialization.
Please Check the Speed :
To use speed between
from 200KHz to 400KHz
(5) Click "Auto" tab and set as below.
(6) Click "Run".
(7) After downloading, check "OK" message.
Case1 : Software version up
1. After downloading S/W by USB , TV set will reboot
automatically.
2. Push “In-stop” key.
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first.
2. Push “Power on” key for turning it on.
→ If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
(4)
filexxx.bin
(5)
(7)...........OK
(6)
* USB DOWNLOAD
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.
(3) Show the message "Copying files from memory".
(4) Updating is starting.
3. Main PCB check process
▪ APC - After Manual-Insert, executing APC
* Boot file Download
(1) Execute ISP program "Mstar ISP Utility" and then click
"Config" tab.
(2) Set as below, and then click "Auto Detect" and check "OK"
message.
If "Error" is displayed, check connection between computer,
jig, and set.
(3) Click "Read" tab, and then load download file(XXXX.bin)
by clicking "Read"
(5) Updating Completed, The TV will restart automatically.
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
(1)
filexxx.bin
* After downloading, have to adjust Tool Option again.
(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 10 -
LGE Internal Use Only
3.1. ADC Process
(1) ADC
- Enter Service Mode by pushing "ADJ" key,
- Enter Internal ADC mode by pushing "►" key at "8. ADC
Calibration".
EZ ADJUST
4. Total Assembly line process
4.1. Adjustment Preparation
ADC Calibration
0. Tool Option1
ADC Comp 480i
1. Tool Option2
NG
ADC Comp 1080p
2. Tool Option3
NG
ADC RGB
NG
3. Tool Option4
Start
4. Tool Option5
Reset
5. Commercial Tool Option
6. Country Group
7. Area Option
8.ADC Calibration
►
9. White Balance
10. 10 Point WB
11. Test Pattern
12 EDID D/L
13. Sub B/C
14. Ext. Input Adjust
▪ W/B Equipment condition
ca210 : LED -> CH14, Test signal: Inner pattern(80IRE)
▪ Above 5 minutes H/run in the inner pattern. (“power on” key
of adjust remote control)
▪ If it is executed W/B adjustment in 2~3 minutes H/run, it is
adjusted by Target data
Mode
Temp
Cool
13,000 k
Medium
9,300 k
Warm
6,500 k
Aging
time
(Min)
1
2
3
4
5
6
7
8
9
* ADC Calibration Protocol (RS232)
Adjust Sequence
Item
<Test Signal>
Inner pattern
(204gray, 80IRE)
▪ Normal line
<Caution> U sing "P-ONLY" key of the Adjustment remote
control, power on TV.
If there is no Component Input, disappear “ADC Comp” message.
NO
Coordinate spec
X=0.269 (±0.002)
Y=0.273 (±0.002)
X=0.285 (±0.002)
Y=0.293 (±0.002)
X=0.313 (±0.002)
Y=0.329 (±0.002)
CMD 1
CMD 2
Enter
Adjust MODE
Adjust
‘Mode In’
Data 0
A
A
0
0
When transfer the ‘Mode In’,
Carry the command.
ADC adjust
ADC Adjust
A
D
1
0
Automatically adjustment
(The use of a internal pattern)
▪ aa 00 00 [Enter Adjust Mode]
▪ xb 00 40 [Component1 Input (480i)]
▪ ad 00 10 [Adjust 480i Comp1]
▪ xb 00 60 [RGB Input (1024*768)]
▪ ad 00 10 [Adjust 1024*768 RGB]
▪ aa 00 90 End Adjust mode
* Required equipment : Adjustment remote control.
0-2
3-5
6-9
10-19
20-35
36-49
50-79
80-119
Over 120
Cool
X
y
271
270
281
287
280
285
278
284
276
281
275
277
274
274
273
272
272
271
271
270
Medium
x
y
285
293
295
310
294
308
292
307
290
304
289
300
288
297
287
295
286
294
285
293
Warm
x
y
313
329
320
342
319
340
317
339
315
336
314
332
313
329
312
327
311
326
310
325
Medium
285
293
294
308
290
303
286
298
283
295
281
291
280
288
279
286
278
284
278
283
285
293
Warm
313
329
319
340
315
335
311
330
308
327
306
323
305
320
304
318
303
316
303
315
310
325
▪ Aging chamber
Aging
time
(Min)
3.2. Function Check
3.2.1. Check display and sound
■ Check Input and Signal items. (cf. work instructions)
1. TV
2. AV
3. COMPONENT (480i)
4. RGB (PC : 1024 x 768 @ 60hz)
5. HDMI
6. PC Audio In
* Display and Sound check is executed by Remote controller
Caution : Not to push the INSTOP KEY after completion if the
function inspection.
1
2
3
4
5
6
7
8
9
0-5
6-10
11-20
21-30
31-40
41-50
51-80
81-119
Over 120
Cool
271
270
280
285
276
280
272
275
269
272
267
268
266
265
265
263
264
261
264
260
271
270
* Connecting picture of the measuring instrument
(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER ON →
Enter the mode of White-Balance, the pattern will come out.
Full White Pattern
CA-210
COLOR
ANALYZER
TYPE : CA-210
RS-232C Communication
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 11 -
LGE Internal Use Only
* Auto-control interface and directions
(1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10 lux).
(2) Adhere closely the Color analyzer(CA210) to the module
less than 10 cm distance, keep it with the surface of the
Module and Color analyzer's prove vertically.(80° ~ 100°).
(3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.
- Using 'no signal' or 'POWER ONLY' or the others, check
the back light on.
4.2. DPM operation confirmation
(Only Apply for MNT Model)
Check if Power LED Color and Power Consumption operate as
standard.
■ Set Input to RGB and connect D-sub cable to set
■ Measurement Condition: (AC 100-240V~, 50/60 Hz)
■ Confirm DPM operation at the state of screen without Signal
4.3. DDC EDID Write (RGB 128Byte )
■ Connect D-sub Signal Cable to D-Sub Jack.
■ Write EDID DATA to EEPROM (24C02) by using DDC2B
protocol.
■ Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
▪ Auto adjustment Map(RS-232C)
RS-232C COMMAND
[CMD ID DATA]
Wb
00 00
White Balance Start
Wb
00 ff
White Balance End
RS-232C COMMAND
[CMD ID DATA]
Cool
Mid
Warm
R Gain
jg
Ja
jd
G Gain
jh
Jb
je
B Gain
ji
Jc
jf
CENTER
(DEFAULT)
MIN
4.4. DDC EDID Write (HDMI 256Byte)
MAX
Cool
Mid
Warm
00
172
192
192
192
00
172
192
192
192
00
192
192
172
192
R Cut
64
64
64
128
G Cut
64
64
64
128
B Cut
64
64
64
128
■ Connect HDMI Signal Cable to HDMI Jack.
■ Write EDID DATA to EEPROM(24C02) by using DDC2B
protocol.
■ Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
4.5. EDID data
(1) All Data : HEXA Value
(2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum
<Caution>
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.(When R/G/B Gain are all
C0, it is the FULL Dynamic Range of Module)
* Manual W/B process using adjust Remote control.
4.5.1. Auto Download
■ After enter Service Mode by pushing “ADJ” key,
■ Enter EDID D/L mode.
■ Enter “START” by pushing “OK” key.
* Caution : Never connect HDMI & D-sub Cable when EDID
downloaded.
▪ After enter Service Mode by pushing "ADJ" key,
▪ E nter White Balance by pushing " ► " key at "8. White
Balance".
EZ ADJUST
0. Tool Option1
0. Tool Option1
HDMI1
NG
1. Tool Option2
HDMI2
NG
172
2. Tool Option3
HDMI3
NG
172
3. Tool Option4
RGB
B-Gain
192
4. Tool Option5
R-Cut
64
5. Tool Option Commercial
2. Tool Option3
Color Temp.
3. Tool Option4
R-Gain
4. Tool Option5
G-Gain
5. Commercial Tool Option
6. Country Group
◄ Cool
►
64
6. Country Group
B-Cut
64
7. Area Option
Test-Pattern
ON
8. ADC Calibration
10. 10 Point WB
Backlight
100
9. White Balance
11. Test Pattern
Reset
To Set
10. 10 Point WB
G-Cut
7. Area Option
8. ADC Calibration
9. White Balance
►
EDID
EZ ADJUST
Whit Balance
1. Tool Option2
NG
Start
Reset
EDID
12. EDID D/L
11. Test Pattern
13. Sub B/C
12. EDID D/L
14. Ext. Input Adjust
13. Sub B/C
HDMI1
OK
HDMI2
OK
HDMI3
OK
RGB
►
OK
Start
Reset
14. Ext. Input Adjust
* After you finished all adjustments, Press "In-start" key and
compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model's module from factory Jig model.
* P ush the "IN STOP" key after completing the function
inspection. And Mechanical Power Switch must be set “ON”.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
* EDID data and Model option download (RS232)
NO
Item
CMD 1 CMD 2 Data 0
Enter download Download
MODE
‘Mode In’
A
A
0
EDID data and
Model option
download
A
E
Automatically download
00 10 (The use of a internal
data)
- 12 -
Download
0
When transfer the ‘Mode
In’, Carry the command.
LGE Internal Use Only
4.5.2. Manual Download
<Caution>
(1) Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
(2) Never connect HDMI & D-sub Cable at the same time.
(3) Use the proper cables below for EDID Writing.
(4) Download HDMI1, HDMI2 separately because HDMI1 is
different from HDMI2.
For Analog
For HDMI EDID
D-sub to D-sub
DVI-D to HDMI or HDMI to HDMI
No.
Item
Condition
Hex Data
1
Manufacturer ID
GSM
1E6D
2
Version
Digital : 1
01
3
Revision
Digital : 3
03
0
00
1
2
3
4
5
FF FF FF FF FF
c
01 03 68 A0
0F 50 54 A1 08 00
01 01 01 01 01 01
45 00 A0 5A 00 00
40 70 36 00 A0 5A
3E 1E 53 10 00 0A
6
FF
5A
31
02
00
00
20
7
00
78
40
3A
1E
00
20
8
1E
0A
45
80
66
00
20
9
6D
EE
40
18
21
1E
20
A
B
C
D
a
91
61
71
50
00
20
E
F
b
(2) FHD HDMI EDID data
00
10
20
30
40
50
60
70
80
90
A0
B0
C0
D0
E0
F0
0
00
1
2
3
4
5
FF FF FF FF FF
c
01 03 80 A0
0F 50 54 A1 08 00
01 01 01 01 01 01
45 00 A0 5A 00 00
40 70 36 00 A0 5A
3E 1E 53 10 00 0A
02
22
03
15
22
01
f
01
31 00 00
20 C2 31
45 00 A0
B8 28 55
00 00 00
F1
26
1D
9E
00
5A
40
00
4E
15
80
01
00
00
C4
00
10
07
18
1D
1E
00
8E
00
6
FF
5A
31
02
00
00
20
7
00
78
40
3A
1E
00
20
8
1E
0A
45
80
66
00
20
9
6D
EE
40
18
21
1E
20
A
B
C
a
91
61
71
50
00
20
d
9F 04 13 05 14
50 09 57 07
71 1C 16 20 58
00 72 51 D0 1E
02 3A 80 18 71
00 1E 01 1D 00
21 00 00 1E 00
00 00 00 00 00
D
E
F
b
A3 54 4C 99
40 71 40 81
38 2D 40 58
B0 51 00 1B
00 00 FD 00
20
d
01
03 02 12 20
f
2C 25 00 20
20 6E 28 55
38 2D 40 58
BC 52 D0 1E
00 00 00 00
00 00 00 00
1
2
3
4
5
FF FF FF FF FF
c
01 03 68 A0
0F 50 54 A1 08 00
01 01 01 01 01 01
35 00 40 84 00 00
6E 28 55 00 A0 5A
3E 1E 53 10 00 0A
26
80
2C
30
3A
e
21
0
00
1
2
3
4
5
FF FF FF FF FF
c
01 03 80 A0
0F 50 54 A1 08 00
01 01 01 01 01 01
36 00 40 84 63 00
18 88 03 06 40 84
3E 1E 53 10 00 0A
02 03
22 15
80 1E
00 00
20 C2
96 00
58 2C
00 00
7
00
78
40
21
1C
00
20
8
1E
0A
61
50
01
00
20
9
6D
EE
40
A0
1D
1E
20
A
B
C
D
a
91
45
51
00
00
20
E
F
b
A3 54 4C 99 26
40 31 40 01 01
00 1E 30 48 88
72 51 D0 1E 20
00 00 FD 00 3A
20
d
00 e
22
01
01
00
31
A0
45
00
F1
26
1D
9E
00
5A
00
00
4E 10
15 07
80 18
01 1D
00 1E
00 00
A0 5A
00 00
6
FF
5A
31
66
00
63
20
7
8
9
A B C D E
00 1E 6D
a
b
78 0A EE 91 A3 54 4C 99
40 45 40 61 40 71 40 01
21 50 B0 51 00 1B 30 40
1E 64 19 00 40 41 00 26
00 00 18 00 00 00 FD 00
20 20 20 20 20
d
d
01
1F 04 93 05 14 03 02 12 20
50 09 57 07
f
71 1C 16 20 58 2C 25 00 A0
00 72 51 D0 1E 20 6E 28 55
8C 0A D0 8A 20 E0 2D 10 10
00 18 02 3A 80 18 71 38 2D
00 00 00 1E 00 00 00 00 00
00 00 00 00 00 00 00 00 00
- 13 -
26
01
70
30
3A
e
21
5A
00
3E
40
00
e
MODEL NAME
HEX
EDID Table
DDC Function
HD/FHD Model
0001
01 00
Analog/Digital
b. Serial No: Controlled on production line.
c. Month, Year: Controlled on production line:
ex) Week : '01' -> '01'
Year : '2012' -> '16' fix
d. Model Name(Hex):
cf) TV set’s model name in EDID data is below.
Model name
MODEL NAME(HEX)
LG TV
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)
e. Checksum: Changeable by total EDID data.
FHD
HD
HDMI
RGB
HDMI
Block 0
43
5C
A4
25 (HDMI1)
5B (HDMI1)
Check sum
(Hex)
Block 1 15 (HDMI2)
4B (HDMI2)
5 (HDMI3)
3B (HDMI3)
EDID C/S data
C2
00
2C
20
00
e
F
(5) Detail EDID Options are below
a. Product ID
RGB
A5
-
f. Vendor Specific(HDMI)
Input
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
6
FF
5A
71
1B
00
00
20
d
00
10
20
30
40
50
60
70
80
90
A0
B0
C0
D0
E0
F0
A3 54 4C 99 26
40 71 40 81 80
38 2D 40 58 2C
B0 51 00 1B 30
00 00 FD 00 3A
20
d
00 e
d
0
00
00
10
20
30
40
50
60
70
(4) HD HDMI EDID data
(1) FHD RGB EDID data
00
10
20
30
40
50
60
70
(3) HD RGB EDID data
MODEL NAME(HEX)
FHD
HD
HDMI1
67030C001000801E
67030C001000
HDMI2
67030C002000801E
67030C002000
HDMI3
67030C003000801E
67030C003000
LGE Internal Use Only
4.6. Outgoing condition Configuration
■ When pressing IN-STOP key by SVC remocon, Red LED
are blinked alternatively. And then automatically turn off.
(Must not AC power OFF during blinking)
5.2. Comand Set
4.7.1. HI-POT auto-check preparation
- Check the POWER cable and SIGNAL cable insertion condition
(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process automatically.
CMD(hex)
LENGTH(hex)
Description
A0h
84h+n
n-bytes Write (n = 1~16)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in EEPROM,.
4.7. HI-POT Test
4.7.2. HI-POT auto-check
Adjust mode
EEPROM WRITE
5.3. Method & notice
4.7.3. Checkpoint
(1) Test voltage
- Touchable Metal : 3 KV / min at 100 mA
- SIGNAL : 3 KV / min at 100 mA
(2) TEST time: 1 second. (case : mass production )
(3) TEST POINT
- Touchable Metal => LIVE & NEUTRAL : Touchable Metal.
- SIGNAL => LIVE & NEUTRAL : SIGNAL.
(1) Serial number D/L is using of scan equipment.
(2) S etting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced in
production line, because serial number D/L is mandatory by
D-book 4.0.
* Manual Download(Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "5.Model Number D/L" like below photo.
3) Input the Factory model name or Serial number like photo.
5. Model name & Serial number D/L
▪ Press "Power on" key of service remote control.
(Baud rate : 115200 bps)
▪ Connect RS232 Signal Cable to RS-232 Jack.
▪ Write Serial number by use RS-232.
▪ Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below).
4) Check the model name Instart menu. → Factory name displayed.
(ex 42LD450-ZA)
5) Check the Diagnostics.(DTV country only) → Buyer model
displayed.(ex 42LD450)
5.1. Signal Table
CMD
LENGTH
ADH
ADL
DATA_1
...
Data_n
CS
DELAY
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +...+ Data_n
Delay : 20ms
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 14 -
LGE Internal Use Only
6. CI+ Key Download method
2. Check the method of CI+ key value (RS232)
1) Into the main ass’y mode (RS232 : aa 00 00)
6.1. Download Procedure
(1) Press "Power on" key of a service Remote control.
(Baud rate : 115200 bps)
(2) Connect RS232-C Signal Cable.
(3) Write CI+ Key through RS-232-C.
(4) Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).
CMD 1
CMD 2
A
A
Data 0
0
0
2) Check the mothed of CI+ key by command
(RS232 : ci 00 20)
CMD 1
CMD 2
C
I
Data 0
2
0
3) result value
i 01 OK 1d1852d21c1ed5dcx
CI+ Key Value
8. Commercial Feature inspection
8.1. LG Logo inspection
(1) Turn on TV.
(2) Check LG Logo operation when TV is turning on. (Check
LG Logo is displayed well or not.)
8.2 Welcome Screen Function check
(Image File must be in USB LG_DTV folder)
(1) Press “IN STOP” key.
(2) Turn on TV.
(3) Insert USB.
(4) Press “MENU” key.
(5) Move cursor to OPTION and press “7” key 7 times.
(6) Move cursor to “LOGO Image Download” key and select it.
=> Check the Download to CI+ Key value in LGset.
1. Check the method of CI+ Key value
a. Check the method on Instart menu
(7) Select image file.
b. Check the method of RS232C Command
1) Into the main ass’y mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
A
Data 0
0
0
2) Check the key download for transmitted command
(RS232 : ci 00 10)
CMD 1
CMD 2
C
I
Data 0
1
0
3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 15 -
LGE Internal Use Only
(8) Check displayed image status(color, size) when TV is
turning on.
8.3. USB Cloning Function check
● CASE 1. Clock LED Model
<Image for test- 720x576> Please use this image for test.
(9) Try this inspection with various resolution images.
* Must Restore to LG Logo.
(10) Press “MENU” key.
(11) Move cursor to OPTION and press “7” key 7 times.
(12) Select accurate CPU S/W file and check “LOGO Image”
button. (Press yellow color key on Remote Control.)
(13) Check LG Logo operation when TV is turning on.
If the clock LED of TV 2 is on and TV 1, 2 had a same TV
channels → USB cloning is success!!
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 16 -
LGE Internal Use Only
● CASE 2. No Clock LED Model
8.4. Check Commercial features concerning
Output.(IR Out/SPK Out/External Clock)
Model Info
Commercial Feature
Name
IR Out
External Speaker out
External Clock
LP63xH-ZA
O
O
O
LN549E-ZA
O
O
X
8.4.1. External SPK Out and Volume control
(1) Connect external speaker to speaker out port with phone
jack on TV side as below.
(2) Check the Max. speaker output is 1W or not. Sine wave
with 1KHz will be displayed.
(3) Press Vol. control button up/down in turns and check the
waveform of Oscilloscope
Button of Vol. control
Waveform of Oscilloscope
UP(+)
DOWN(-)
8.4.2. IR Out
< Equipment & Condition >
▪ Simple Jig (commercial check JIG)
▪ Power only mode
#1
(1) Connect each other RS232C port on the Commercial
Check JIG.
(2) Press any key on SVC Remote-control.
(3) Check the LED status of the Check JIG.
- IR LED(OK condition: blinking) (LED #1)
If the auto volume of TV 2 is on and TV 1, 2 had a same TV
channels → USB cloning is success!!
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 17 -
LGE Internal Use Only
8.4.3. External Clock
< Equipment & Condition >
▪ Simple Jig (External Clock Assy)
▪ Power only mode
(1) Connect external Clock Assy to CLOCK INTERFACE.
(2) Check the LED CLOCK.
Check LED Clock in Power on mode.
* After finishing 8.1 ~ 8.4 inspections,
press “IN STOP” key.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 18 -
LGE Internal Use Only
TROUBLESHOOTING GUIDE
1. Check the booting Voltage
Make sure the Stand-by Voltage.
P401 3, 5pin : +3.5V_ST
No
Make sure the Power
Connector.
No
Make sure the disconnection of
Main board 3.5V circuit.
No
Exchange the
Circuit board.
Yes
Make sure the Micom voltage.
L301 : +3.5V_ST
No
Exchange the L301.
Yes
Make sure the CLK of X300
Is 10MHz.
No
Exchange the X300.
Yes
Push Micom Reset(SW300) and
make sure the PWR_ON
P401 1pin : 3.3V
No
No
Re-download of
Firmware.
Exchange the Mstar(IC101)
Or Main board
Yes
Make sure the Multi Voltage.
P401 9, 10pin : 24V, 13~15pin : 12V
No
Exchange the circuit
board.
Yes
Make sure the Output Voltage of IC
402/3/7.
IC402 : 2.5V, IC403: 1.1V, IC407 :
1.5V, Q403 : 3.3V
No
Exchange the
IC402/3/7, Q403.
Yes
Make sure the voltage of LVDS
Power.
Q409 : 12V
No
Exchange the Q409.
Yes
Make sure the output of MSTAR
LVDS.
No
Exchange the Mstar(IC101
or Main board.
Yes
Make sure the CLK of X300 is
10MHz.
No
Exchange the circuit or
check the LCD module.
Yes
Exchange the LCD Module.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 19 -
LGE Internal Use Only
2. Digital TV Video
Check the Stand-by Voltage
P401 3, 5pin : +3.5V_ST
Yes
Check the Tuner 3.3V
; L2606
No
Exchange the L2606.
Yes
Check the Tuner 1.8V.
IC2603 2pin : 1.8V
No
Exchange the IC2603.
Yes
Check the IF_P/N signal
TU2601~3 10/11pin
No
Exchange the Tuner.
Yes
Check the LVDS output signal of
Mstar IC.
No
Exchange the Mstar(IC101)
or Main board.
3. Analog TV Video
Check the RF cable and RF signal.
Yes
Check the Tuner 3.3V
; L2606
No
Exchange the L2606.
Yes
Check the Tuner 1.8V.
IC2603 2pin : 1.8V
No
Exchange the IC2603.
Yes
Check the CVBS signal
TU2601~3 8pin
No
Exchange the Tuner.
Yes
Check the LVDS output signal of
Mstar IC.
No
Exchange the Mstar(IC101)
or Main board.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 20 -
LGE Internal Use Only
4. Component Video
Make sure the input signal type and
our TV can support the signal.
Yes
Check Component cable(gender)
defect or status of conductor
Yes
Make sure the JK1603, COMP Y/Pb/
Pr signal
No
Exchange Component Jack.
Yes
Make sure the Rear_COMP_DET
signal.
No
Exchange the R9912.
Yes
Make sure the LVDS output signal of
Mstar IC.
No
Exchange the Mstar(IC101)
or Main board.
5. RGB Video (LN549E Only)
Make sure the input signal type and
Our TV can support the signal.
Yes
Check the RGB cable defect or
status of conductor.
Yes
No
Check the EDID, I2C signal.
Download the EDID data, exchange
the Mstar(IC101) or Main board.
Yes
Check the JK1104 H / V_Sync / R /
G / B signal.
No
Exchange the D-SUB Jack.
Yes
No
Check the DSUB_DET signal.
Exchange the resistor R1146 / R1147.
Yes
Check the LVDS output signal of
Mstar IC.
No
Exchange the Mstar(IC101) or Main
board.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 21 -
LGE Internal Use Only
6. HDMI Video
Make sure the input signal type and
Our TV can support the signal.
Yes
Check the HDMI cable defect or
status of conductor.
Yes
Check the EDID, I2C signal
R884 ~ R891
No
Exchange the IC or download the
EDID data.
Yes
Check the HDMI Jack.
JK801, JK802, JK803
No
Exchange the HDMI Jack.
Yes
No
Check the HDMI_DET(HPD) signal.
Exchange the Resistor.
R810, R811, R823
Yes
No
Check the HDMI signal.
Exchange the Mstar(IC101) or Main
board.
Yes
Check the LVDS output signal of
Mstar IC.
No
Exchange the Mstar(IC101) or Main
board.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 22 -
LGE Internal Use Only
7. Audio of All input
Check the speaker menu.
(menu -> sound -> TV speaker)
No
Menu toggle
Yes
Check the voltage of AMP IC(IC501).
24V, 3.3V
No
Exchange the AMP IC or Main board.
Yes
Check the Mstar Audio_Master_CLK signal.
R148
No
Exchange the Mstar(IC101) or Main
board.
Yes
Check the AMP I2C Line.
R140, R141
No
Check the I2C signal or exchange the
Mstar(IC101).
Yes
Check the Mstar I2S output.
IC501 9, 10, 11pin
No
Check the I2C signal or
Exchange the Mstar(IC101).
Yes
Check the Audio output signal.
IC501 1, 2, 3, 4pin
No
Exchange the Audio AMP.
IC501
Yes
No
Check the connector P501.
Exchange the connector If
the connector is defect.
Yes
No
Check the Speaker resistor or connector.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Exchange the speaker.
- 23 -
LGE Internal Use Only
8. TV Audio
No
Check the RF cable of RF signal
Menu toggle
Yes
No
Check the voltage of Tuner 3.3V : L2606
Exchange the L2606.
Yes
Check the voltage of Tuner 1.8V
IC2603 2pin : 1.8V
No
Exchange the L2606.
Yes
Check the IF_P/N signal TU2601~3
10/11pin
No
Exchange the Tuner.
Yes
Implement the “7. Audio of all input”
Of Malfunction guide.
9. AUDIO IN (Component/DVI Audio) (PC Audio:LN549E Only)
Check the cable is defective.
Yes
No
Check the signal of JK1102.
Exchange AUDIO IN Jack.
Yes
Implement the “7. Audio of all input”
Of Malfunction guide.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 24 -
LGE Internal Use Only
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 25 -
EXT
Speaker
Speaker
CI
CI
Digital
Analog
Sub Amp
LAN
Ext SPK control
AMP
Headphone
SPIDIF
PC/COMP L/R
USB
SCART
COMP
(phone jack type)
FE_TS_Parallel
DVB - T/C
DVB - T2/C
DVB - T/C/S2
Tuner
S7LR2
(LGE2111A-T8)
TVLink
MAX3232
NEC TX/RX
(UPD78F1164)
CLOCK
HDMI1
HDMI2
Side HDMI
NAND
Flash 2Gb
DDR3
2Gb x 1
DDR3
1Gb x 1
NEC Micom
Module
MST TX/RX
I2C
EEPROM
650M
74.25M
LVDS
BLOCK DIAGRAM
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
510
A10
A2
300
301
500
* Set + Stand
* Stand Base + Body
200T
200
Only LGD Module
122
530
LV1
120
123
540
521
900
910
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 26 -
LGE Internal Use Only
R448
2.7K
S
OPT
R461
10K
RL_ON
2
C
R462
10K
B
R421
10K
B
R406
4.7K
E
R401
10K
OPT
R407
2.2K
OPT
R405
2.2K
PANEL_CTL
Q405
MMBT3904(NXP)
C
R429
47K B
Q406
MMBT3904(NXP)
PD_+24V
POWER_DET
IC408-*1
C474
0.1uF
APX803D29
RESET
R407-*1
3K
PANEL_DISCHARGE_RES
E
C412
0.1uF
16V
PD_+24V
PD_+24V
3
2
2
3
VCC
1
GND
PWR_DET_ON_DIODES
IC409-*1
PWR_DET_ON_SEMI
IC409
APX803D29
VCC
R405-*1
3K
E
R435
22K
R402
100
RESET
PD_+24V
R404
100K
+24V
Q407
MMBT3904(NXP)
INV_CTL
C
B
C455
0.1uF
16V
C
R498
10K
+3.5V_ST
C451
0.1uF
OPT
R440
5.6K
R426
10K
3
2
GND
1%
Q402
3
G
R431
22K
R482
8.2K
+3.5V_ST
R419
1K
OPT
R463
10K
1
APX803D29
PD_+24V
R480
100
RESET
RESET
2
3
VCC
1
1
1%
+3.3V_Normal
1
C443
10uF
25V
R447
1.21K
C411
0.1uF
16V
+3.5V_ST
PWR_DET_ON_SEMI
IC408
APX803D29
VCC
Q409
AO3407A
PANEL_VCC
MMBT3906(NXP)
R488
100K
New item
R439
33K
+3.5V_ST
1/10W
1%
PD_+12V
C438
0.1uF
16V
R403
1.5K
0.01uF
C436
0.01uF
50V
D
0.015uF
C409
0.015uF
50V
+3.5V_ST
+12V/+15V
20V-->3.51V --> 3.76V (3.59V)
24V-->3.78V --> 3.92V (3.79V)
R450
0
ST_3.5V--> 3.375V --> 3.46V
12V -->3.58V --> 3.82V (3.68V)
PD_+3.5V
5%
L412
PANEL_POWER
PD_+12V
1%
+12V/+15V
FROM LIPS & POWER B/D
GND
GND
PD_+24V_PWR_DET_DIODES
PANEL_DISCHARGE_RES
Power_DET
Q401
MMBT3904(NXP)
E
P401
SMAW200-H18S1
24V
0.1uF
11
12
GND
12V
GND
MLB-201209-0120P-N2
50V
12V
C404
13
14
12V
15
16
N.C
GND
17
18
GND
L402
+12V/+15V
0.1uF
MLB-201209-0120P-N2
R408
100
PWM1
Max 1000mA
T120
+3.5V_ST
IC407
AP7173-SPG-13 HF(DIODES)
L420
[EP]
BLM18PG121SN1D
16V
19
IN
1
+3.5V_ST
FET_AOS
Q403
AO3407A
0.1uF
16V
8
JP_GND4
9
3
6
FB
R457
4.3K
SS
1/16W
1%
R1
GND
5
C467
560pF
50V
FET_2.5V
C423-*1
2.2uF
10V
R443
10K
POWER_ON/OFF_1
C
B
FET_2.5V
R445-*1
2.2K
FET_2.5V_DIODE
DMP2130L
Q403-*1
R2
D404
5V
OPT
FET_2.5V_AOS
AO3435
Q403-*2
Q400
MMBT3904(NXP)
G
4
4.7K
R456
EN
D403
5V
OPT
C437
22uF
16V
C425
0.1uF
16V
100
C476
0.1uF
16V
C472
22uF
10V
1%
1/16W
R433
10K
C423
4.7uF
16V
FET_AOS
FET_AOS
R445
1.5A
16V
0.1uF
C461
10uF
10V
7
C475
JP_GND3
JP_GND2
JP_GND1
2
VCC
+3.3V_Normal
THERMAL
.
PG
R438
22K
R434
10K
OUT
+3.3V_Normal
L403
BLM18PG121SN1D
D
GND
10
5
S
8
9
780 mA
+1.5V_DDR
G
PDIM#2
7
24V
+1.5V_DDR
PWM_DIM
D
6
GND
+24V
C418
PDIM#1
S
L407
DRV ON
4
D
3.5V
CB2012PK501T
16V
2
S
0.1uF
1
3
G
3.5V
C435
PWR ON
L404
+3.5V_ST
C406
+3.3V_Normal
5V OPT
CB2012PK501T
L408
L414
BLM18PG121SN1D
D401
E
Vout=0.8*(1+R1/R2)=1.5319
+5V_Normal
&
+5V_USB
Vout=0.8*(1+R1/R2)
C489
0.047uF
25V
C490
22uF
16V
R424
33K
1%
R425
27K
1%
+2.5V/+1.8V
R422
300 mA
C485
0.1uF
16V
OPT
C486
330pF
50V
R2
9
FB
C482
100pF
50V
OPT
2
6
R420
4.7K
OPT
1
OPT
C432
0.1uF
16V
GND
C403
10uF
10V
C440
0.1uF
16V
D402
5V
OPT
USB1_OCD
5
USB1_CTL
4
3
R411
2K
RLIM
2
EN_SW
ROSC
SS
1
EN
R423
10K
+2.5V_Normal
OUT
FAULT
COMP
16
V7V
AGND
3
+5V_Normal +3.3V_Normal
7
14
IC401
TPS65281RGV
VIN
[EP]
IC402
TJ1118S-2.5
IN
SW_OUT
15
C481
4 . 7 u F 10V
+3.3V_Normal
+5V_USB
8
13
10
C484 CAP_10uF_X5R
10uF
CHANGE TO
10V
10UF/10V/X5R
85C
PGND
THERMAL
17
C480
10uF
16V
11
12
LX
BST
CHANGE TO
16V/X5R
SW_IN
11K 1%
L401
CB2012PK501T
R410
100K
C487
22uF
16V
OPT
R427
0
+12V/+15V
+5V_Normal
R1
L406
3.6uH
C484-*1
R416
20K
C483
3300pF
50V
10uF 10V
CAP_10uF_X7R
S7LR core 1.2V volt
+3.3V_Normal
10K
R428
C447
0.1uF
16V
PWRGD
EN
PH_2
PH_1
4
AGND
SS/TR
OLP
Not used :
only for small(ready)
L415
3.6uH
C488
NR8040T3R6N
C453
22uF
10V
C444
0.1uF
16V
C456
22uF
10V
D405
5V
OPT
3300pF
8
GND_2
+1.10V_VDDC
BOOT
13
14
15
11
10
IC403
TPS54319TRE
9
RT/CLK
3
6
2
GND_1
7
VIN_2
PH_3
COMP
C431
0.1uF
16V
12
THERMAL
17
5
C430
10uF
10V
C441
0.1uF
16V
1
VSENSE
VIN_1
16
L413
VIN_3
EP[GND]
+3.5V_ST
R1
R432
1/16W 330K 5%
R436
15K
R442
27K
1/16W
1%
50V
100pF
C439
C448
3300pF
50V
4A
$ 0.165
R2
R441
56K
1/16W
1%
Vout=0.827*(1+R1/R2)=1.225V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EMEA INTERACTIVE
LP63xH-ZA
POWER_LARGE
2012.11.05
4
LGE Internal Use Only
P4R_GLOBAL_TUNER_BLOCK
OPT
IC2601
74LVC1G08GW
ERROR & VALID PIN
RF_SW_OPT
R2603
0
OPT
R2627
0
FE_TS_VAL
1
+3.3V_TU
5
OPT
C2640
0.1uF
16V
RF_SWITCH_CTL
+3.3V_TU
RF_SW_OPT
C2603
0.1uF
16V
TU2602
TDSS-G201D
1
2
3
4
5
6
7
8
9
10
11
B1
B1
A1
TU2603
TDSN-G301D
NC_1
RESET
RESET
2
SCL
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
26
D7
27
B1
25
D6
26
NC_2
+B4[1.23V]
24
D5
25
B1
23
D4
24
+B2[1.8V]
+B3[3.3V]
22
D3
23
NC_3
21
D2
22
SDA
NC_1
20
D1
21
CVBS
19
D0
RF_S/W_CTL
SIF
18
MCLK
19
+B1[3.3V]
17
VALID
20
4
16
SYNC
18
SCL
15
ERROR
17
3
14
GND
16
RESET
13
NC_5
15
TU2603-*1
TDSN-C201D
12
+B4[1.23V]
14
TU_CHINA
11
+B3[3.3V]
12
SHIELD
10
NC_4
11
A1
9
NC_3
10
DIF[N]
8
NC_2
9
DIF[P]
7
CVBS
8
IF_AGC
6
+B2[1.8V]
7
NC_3
5
SIF
6
+B2[1.8V]
4
+B1[3.3V]
5
NC_2
3
SDA
4
+B1[3.3V]
2
SCL
3
SDA
1
27
28
A1
A1
28
NC_4
29
GND
30
SHIELD
ERROR
31
SYNC
VALID
32
MCLK
33
D0
D1
D2
34
TU_T/C
D3
13_bushing_T/C
35
TU2602-*1
TDSS-G101D
D4
TU2602-*2
TDSS-G101D(B)
1
D5
2
1
D7
2
D8
3
28
4
SHIELD
5
6
7
8
9
10
11
NC
3
4
RESET
5
6
SCL
7
8
SDA
9
10
+3.3V
11
B1
SIF
B1
A1
36
NC
37
SDA
R2870
1K
R2871
1K
TU_I2C_NON_FILTER
R2610 33
C2607
20pF
50V
+B1[3.3V]
C2612
20pF
50V
C2651
20pF
50V
C2652
20pF
close
50V
+3.3V_TU
+1.8V_TU
C2602
100pF
50V
TU_SDA
IF_AGC_MAIN
T/C_DIF[N]
E
B
R2616
4.7K
NON_ASIA_TU
ASIA_TU
R2660
390
C2660
10pF
50V
ASIA_TU
C2604
0.1uF
16V
T/C_IF_AGC
C2600
0.1uF
16V
C
NC_4
GND_1
ERROR
CVBS
IF_N_MSTAR
T2
R2606
0
OPT
C2601
0.1uF
16V
+3.3V_T2_TU
T2
C2614
100pF
50V
T2
C2618
10uF
6.3V
T2
C2617
0.1uF
16V
close to TUNER
T2
C2616
0.1uF
16V
SYNC
FULL_NIM_NON_S
AR3701
Close to the tuner
T2
L2601
BLM18PG121SN1D
+1.23V_TU
DEMOD_RESET
IF_AGC
38
A1
T2
C2620
0.1uF
16V
IC2603
AP1117E18G-13
A1
47
FE_TS_SYNC
FE_TS_VAL
AR3701-*1
33
1/16W
FE_TS_CLK
D0
R2872
0
DVB_S
D2
FULL_NIM_NON_S
AR3702
FE_TS_DATA[0-7]
47
AR3702-*1
33
1/16W
FE_TS_DATA[1]
FE_TS_DATA[2]
C2642
10uF
10V
VREF=1.25V
FE_TS_DATA[3]
D4
FULL_NIM_NON_S
AR3703
D5
DVB_S
FULL_NIM
47
FE_TS_DATA[4]
IC2602
TJ4220GDP-ADJ[EP]GND
FE_TS_DATA[5]
AR3703-*1
33
1/16W
FE_TS_DATA[6]
D6
FE_TS_DATA[7]
NC_1
D7
DVB_S
FULL_NIM
R2629
3.3K
GND_2
+1.23V_TU
GND_3
DVB_S
C2608
100pF
50V
S2_RESET
+B4[3.3V]
DVB_S
C2611
0.1uF
16V
DVB_S
R2600
51
NC4
DVB_S
C2615
10uF
10V
S2_SCL
LNB
DVB_S
22
R2605
GND_4
DVB_S
R2613
10
+3.3V_S2_DE
1
DVB_S
C2624
100pF
50V
DEMOD_SCL
DVB_S
C2625
0.1uF
16V
2
3
4
13_bushing_T2/C
5
6
TU2603-*2
TDSN-G301D(B)
7
8
3
5
6
7
8
9
10
Pull-up can’t be applied
because of MODEL_OPT_2
11
12
Surge protectioin
13
LNB_OUT
OPT
C2605
33pF
50V
DVB_S
C2609
33pF
50V
6
4
5
VOUT
NC_2
FULL_NIM
R2634
22K
1%
FULL_NIM
C2647
10uF
10V
FULL_NIM
C2645
0.1uF
16V
TU2601-*1
TDSQ-G001D(B)
2
DVB_S
C2650
18pF
50V
3
ADJ/SENSE
13_bushing_T/C/S2
A1
OPT
C2649
18pF
50V
7
+1.23V_TU
FULL_NIM
R2633
12K
R2
1%
S2_RESET
DVB_S
R2604 22
DVB_S_NON_FILTER
R2875
0
2
8
R1
DVB_S
C2619
0.1uF
16V
S2_SDA
1
Vo=0.8*(1+R2/R1)
GND
+1.23V_TU
DVB_S
R2612
2.2K
LNB_TX
EN2
VIN3
C2635
0.1uF
16V
DVB_S
L2600
BLM18PG121SN1D
+B3[1.23V]
S2_F22_OUTPUT
C2641
0.1uF
16V
Vo=VREF*(1+R2/R1)
FE_TS_DATA[0]
D3
IF_AGC
DIF[N]
R2632
1
R2
D1
SHIELD
DIF[P]
OPT
R2873
200
1%
OUT
FE_TS_ERR
MCLK
SHIELD
CVBS
LNA2_CTL
INADJ/GND
DVB_S_FILTER
R2875-*1
MLB-201209-0120P-N2
DIF[N]
+1.8V_TU
R1
4
DIF[P]
This was being applied to the only china demod,
so this has to be deleted in both main and ISDB sheet.
+3.3V_TU
1
B1
C
R2664
0
ASIA_TU
DEMOD_SDA
B1
Q2601
MMBT3906(NXP)
NON_ASIA_TU
B
OPT
R2622
1K
C2661
10pF
50V
ASIA_TU
SIF
+1.8V
E
IF_P_MSTAR
HALF_NIM/EU_NON_T2
R2601
0
VALID
TU_CVBS
NON_ASIA_TU
R2621
0
NC_2
NC_3
R2625
220
NON_ASIA_TU
R2624
220
NON_ASIA_TU
NON_ASIA_TU
Q2600
MMBT3906(NXP)
R2663
390
ASIA_TU
ASIA_TU
R2662
2K
should be guarded by ground
R2661
0
ASIA_TU
HALF_NIM/EU_NON_T2
R2602
0
NON_ASIA_TU
R2619
82
TU_SIF
C2623
0.1uF
16V
C2621
100pF
50V
C2626
0.1uF
16V
HALF_NIM/EU_NON_T2
R2608
0
NON_ASIA_TU
R2618
470
to TUNER
NON_ASIA_TU
SIF
+B2[1.8V]
+3.3V_TU
+3.3V_TU
TU_SCL
SDA
R2628
0
OPT
R2615
0
C2626-*1
0
ASIA_TU
TU_I2C_NON_FILTER
R2609 33
SCL
+3.3V
12
+1.8V
TU_I2C_FILTER
R2610-*1
MLG1005SR27JT
RESET
SCL
GPIO must be added.
+3.3V_TU
RESET
T/C_DIF[P]
FE_TS_VAL_ERR
TUNER_RESET
C2622
0.1uF
16V
TU_I2C_FILTER
R2609-*1
MLG1005SR27JT
NC_1
CVBS
OPT
R2631
0
4
R2614
100K
R2611
100
TU2601
TDSQ-G001D
NC_1
1
12
2
3
TU_T/C/S2
13
1
Close to TUNER
9
TU_T2/C
2
THERMAL
SI2156_DVB_1INPUT_H
FE_TS_ERR
DVB_S
D2600
3.0SMCJ20A(suzhougrande)
20V
14
DVB_S
R2874
2.2K
1W
15
16
17
18
19
20
21
12
22
23
SHIELD
24
25
26
27
B1
B1
A1
NC_1
9
RESET
10
SCL
11
SDA
12
+B1[3.3V]
13
SIF
14
+B2[1.8V]
15
CVBS
16
NC_2
17
NC_3
18
NC_4
19
+B3[3.3V]
20
+B4[1.23V]
21
NC_5
22
GND
23
ERROR
24
SYNC
25
VALID
26
MCLK
27
D0
28
D1
29
D2
30
D3
31
D4
32
D5
33
D6
34
D7
35
A1
36
28
37
SHIELD
B1
B1
38
A1
NC_1
RESET
SCL
SDA
+B1[3.3V]
SIF
+B2[1.8V]
CVBS
T/C_IF_AGC
T/C_DIF[P]
T/C_DIF[N]
NC_2
NC_3
NC_4
+3.3V_TU
+3.3V_S2_DE
+3.3V_TU
+3.3V_Normal
GND_1
ERROR
SYNC
DVB_S
L2602
BLM18PG121SN1D
VALID
MCLK
D0
L2606
UBW2012-121F
D1
D2
D3
D4
D5
DVB_S
C2632
10uF
10V
C2630
0.1uF
16V
D6
DVB_S
C2634
0.1uF
16V
C2643
22uF
10V
C2644
0.1uF
16V
C2646
22uF
10V
C2648
0.1uF
16V
D7
GND_2
GND_3
+3.3V_T2_TU
+B3[1.23V]
S2_RESET
+B4[3.3V]
S2_F22_OUTPUT
T2
L2603
BLM18PG121SN1D
S2_SCL
S2_SDA
LNB
GND_4
A1
T2
C2631
10uF
10V
T2
C2633
0.1uF
16V
SHIELD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LP63xH-ZA
2012/11/05
TUNER_EU
26
LGE Internal Use Only
MODEL OPTION
F4
PHM_OFF
PHM_ON
MODEL_OPT_2
AB2
NON_DVB_T2
DVB_T2
MODEL_OPT_3
T25
NON_3D
3D
MODEL_OPT_4
U23
NON_OLED
OLED
MODEL_OPT_5
T24
NON_DVB_S
DVB_S
MODEL_OPT_6
B8
NON_120HZ
120HZ
MODEL_OPT_7
A8
K1
D1-_HDMI1
L2
D2+_HDMI1
L3
D2-_HDMI1
T5
DDC_SDA_1
T4
DDC_SCL_1
V5
HPD1
RXA0N
IP
RXA1P
IM
RXA1N
RXA2P
RXA2N
SIFP
SIFM
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C276
C277
C280
C283
C4011
C4019
C4024
+3.3V_Normal
AE3
L208
BLM18PG121SN1D
HALF_NIM/EU_NON_T2
L227
BLM18PG121SN1D
AD4
AC5
HOTPLUGA/GPIO19
I2C_SDAM1/GPIO76
0.1uF
0.1uF
0.1uF
0.1uF
C232
C267
C265
C4031
0.1uF
0.1uF
P15
AVDD_AU33
DDCDA_CK/GPIO23
I2C_SCKM1/GPIO75
P14
R10
AC3
C4064
0.1uF
HALF_NIM/EU_NON_T2
IF_AGC
N12
ANALOG SIF
Close to MSTAR
AD3
DDCDA_DA/GPIO24
RF_AGC
M12
HALF_NIM/EU_NON_T2
R4019
10K
P10
P19
M14
C4065
0.047uF
25V
HALF_NIM/EU_NON_T2
W9
AVDD2P5
W10
W11
W12
Normal 2.5V
TU_SDA
Close to MSTAR
AE11
D2+_HDMI4
AD11
D2-_HDMI4
AE8
DDC_SDA_4
AD8
DDC_SCL_4
AC8
HPD4
F2
CK+_HDMI2
F3
CK-_HDMI2
G3
D0+_HDMI2
F1
D0-_HDMI2
D1+_HDMI2
G2
G1
H2
D2+_HDMI2
H3
D2-_HDMI2
R6
DDC_SDA_2
U6
DDC_SCL_2
P5
HPD2
R4
CEC_REMOTE_S7
RXC1P
RXC1N
USB0_DM
USB0_DP
RXC2P
RXC2N
DDCDC_DA/GPIO28
USB1_DM
USB1_DP
RXDCKN
I2S_IN_WS/GPIO149
RXD0P
RXD0N
I2S_OUT_BCK/GPIO156
RXD1P
I2S_OUT_MCK/GPIO154
RXD1N
I2S_OUT_SD/GPIO157
I2S_OUT_WS/GPIO155
DSUB_HSYNC
DSUB_R+
DSUB_G+
R228 33 RGB
C204
0 . 0 4 7 u FRGBN2
R229 68 RGB
R230 33 RGB
C205
0 . 0 4 7 u FRGBP3
C206
0 . 0 4 7 u FRGBN3
R231 68 RGB
R232 33 RGB
R233 68 RGB
C207
0 . 0 4 7 u FRGBN1
C208
0 . 0 4 7 u FRGBM3
C209
0 . 0 4 7 u FRGBM2
C210
1000pF RGBM1
2.4K
SC1_SOG_IN
1M
D8
R214
22
DVB_S
D9
DEMOD_SCL
DEMOD_SDA
REAR_COMP_DET
B10
AUD_SCK
C9
AVDD25_PGA
AUD_LRCH
R253
33
C211
0.047uF
U3
R254
68
C212
0.047uF
U2
R255
33
C213
0.047uF
T1
R256
C214
C215
0.047uF
0.047uF
T2
R257
68
33
R2
R258
68
C216
0.047uF
R1
C217
1000pF
T3
R236
0
VDD33
C10
AUD_LRCK
AUL1
VSYNC0
AUR1
RIN0P
AUL2
RIN0M
AUR2
GIN0P
AUL3
GIN0M
AUR3
BIN0P
AUL4
BIN0M
AUR4
AB9
C236
2.2uF
AA11
C237
2.2uF
Y9
C244
2.2uF
AA9
C245
2.2uF
SIDE COMP
REAR_COMP_Y+
REAR_COMP_Pb+
COMPONENT R237
33
R238
68
COMPONENT
C218 0 . 0 4 7 u F
AA2
Y2
0 . 0 4 7 u F AA3
COMPONENT R239
COMPONENT
33
C220
R240
68
C221
COMPONENT
33
C222
0 . 0 4 7 u F W2
0 . 0 4 7 u F Y3
R242
68
0.047uF
V1
C223
0 . 0 4 7 u F W3
C224
1000pF
W1
SC1_CVBS_IN
33
C225
0 . 0 4 7 u F AA8
R245
33
C226
0.047uF
Y4
W4
CVBS In/OUT
AA5
Y5
AA4
TP210
Y6
AA1
DTV/MNT_VOUT
R252
68
C233
0.047uF
AB4
HSYNC1
VSYNC1
AUOUTL0
RIN1P
AUOUTL2
RIN1M
AUOUTL3
GIN1P
AUOUTR0
GIN1M
AUOUTR2
BIN1P
W7
R19
W19
C4027
0.1uF
L223
VDD33
VDDC_5
GND_38
VDDC_6
GND_39
VDDC_7
GND_40
VDDC_8
GND_41
VDDC_9
GND_42
VDDC_10
GND_43
VDDC_11
GND_44
VDDC_12
GND_45
VDDC_13
GND_46
VDDC_14
GND_47
GND_49
AVDD1P0
GND_50
FB_CORE
GND_51
AVDDL_MOD
GND_52
AVDD10_LAN
GND_53
DVDD_DDR
GND_54
GND_56
AVDD2P5_ADC_1
GND_57
AVDD2P5_ADC_2
GND_58
AVDD2P5_ADC_3
GND_59
AVDD25_REF
GND_60
GND_61
AUOUTR3
GND_63
AVDD_MOD_1
GND_64
AVDD_MOD_2
GND_65
V19
GND_67
AVDD25_PGA
GND_68
AVSS_PGA
GND_69
GND_70
SC1/COMP1_L_IN
SC1/COMP1_R_IN
+1.5V_DDR
Close to IC with width trace
PC_L_IN
AA7
AB8
Y8
Y10
AC7
AD7
J17
K15
K16
PC_R_IN
L15
K17
L17
DDR3 1.5V
M17
L16
AVDD_DDR0:55mA
EXTERNAL SPEAKER OUT
W6
V6
SCART1_Lout
V4
Y7
EXT_AMP_L
TP208
W5
SCART1_Rout
U5
EXT_AMP_R
E9
GND_72
AVDD_DVI_USB_1
GND_73
AVDD_DVI_USB_2
GND_74
AVDD3P3_MPLL
GND_75
AVDD_DMPLL
GND_76
GND_77
GND_79
AVDD_AU33
GND_80
AVDD_EAR33
GND_81
GND_82
VDDP_1
GND_83
VDDP_2
GND_84
GND_85
AVDD_LPLL_1
GND_86
AVDD_LPLL_2
GND_87
GND_88
A23
B17
C23
A5
C11
C19
D14
AVDD_DDR1:55mA
D19
E17
L202
BLM18SG121TN1D
RIN2M
AUVRM
GIN2M
BIN2P
AUVAG
BIN2M
AUVRP
SOGIN2
EARPHONE_OUTR
E18
AD5
AE5
E19
C249
4.7uF
C253
1uF
C256
0.1uF
E22
C263
10uF
F8
STby 3.5V
AC6
AA6
AB6
L203
5.6uH HEAD_PHONE
L205
5.6uH HEAD_PHONE
H/P OUT
CVBS1
HP_ROUT
ET_RXD[0]/RP/GPIO60
ET_TXD[0]/TP/GPIO57
CVBS4
CVBSOUT0
ET_RXD[1]/RN/GPIO63
ET_TXD[1]/LED1/GPIO56
CVBSOUT1
ET_TX_CLK/TN/GPIO59
VCOM
ET_TX_EN/GPIO58
ET_MDIO/GPIO62
ET_COL/LED0/GPIO55
C268
4.7uF
10V
HEAD_PHONE
C6
EPHY_RP
C5
EPHY_TP
F17
F18
AVDD_NODIE
F19
HP_LOUT
CVBS0
CVBS5
GND_89
VDDP_NAND
GND_91
AVDD_DDR0_D_1
GND_92
AVDD_DDR0_D_2
GND_93
AVDD_DDR0_D_3
GND_94
AVDD_DDR0_C
GND_95
GND_96
AVDD_DDR1_D_1
GND_97
AVDD_DDR1_D_2
GND_98
AVDD_DDR1_D_3
GND_99
AVDD_DDR1_C
GND_100
C272
4.7uF
10V
HEAD_PHONE
G8
AVDD_NODIE:7.362mA
H8
+3.3V_Normal
L207
BLM18PG121SN1D
C286
0.1uF
N22
C252
0.1uF
N21
N20
M22
A6
M21
EPHY_RN
C4
M20
F10
B5
EPHY_TN
C3
RSDS Power OPT
V15
+1.10V_VDDC
W16
A3
B3
MIUVDDC
T18
ARC0
HWRESET
GND_EFUSE
GND_103
GND_105
GND_1
GND_106
GND_2
GND_107
GND_3
GND_108
GND_4
GND_109
GND_5
GND_110
GND_6
GND_111
GND_7
GND_112
GND_8
GND_113
GND_9
GND_114
GND_10
GND_115
GND_11
GND_116
GND_12
GND_117
GND_13
GND_118
GND_14
GND_119
GND_15
GND_120
GND_16
GND_121
GND_17
GND_122
GND_18
GND_123
GND_19
GND_124
GND_20
GND_125
GND_21
GND_126
GND_22
GND_127
GND_23
GND_128
GND_24
GND_129
GND_25
GND_130
GND_26
GND_131
GND_27
GND_132
GND_28
GND_133
GND_29
GND_134
GND_30
GND_135
GND_31
GND_136
G10
G11
G12
G13
G14
G17
G18
G19
G24
H11
H12
H13
H14
H15
H16
H17
H18
H19
J9
J10
J11
J12
J13
J14
J15
J16
J18
J19
J25
K9
K13
K14
H10
K18
K19
K22
L8
L9
J8
L12
L13
L18
L19
M8
K8
M10
M11
L14
M15
M16
M18
M25
N10
N11
N13
N14
N15
N16
N17
N19
K7
P8
P9
M9
P11
P13
P16
P17
P18
P12
R8
R9
R11
R12
R13
R17
T8
T9
N7
T11
T12
T13
T14
T15
T16
T17
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
R18
V9
V10
V11
V12
V14
V17
T7
E8
R298
C4071
10uF
IRIN/GPIO4
V8
L228
BLM18PG121SN1D
B4
GND_102
GND_104
C22
RIN2P
CVBS3
GND_78
DVDD_NODIE
+1.5V_DDR
HSYNC2
CVBS2
GND_71
AVDD_NODIE
GND_90
SOGIN1
GIN2P
GND_62
AVDD25_LAN
BLM18SG121TN1D
BIN1M
ET_MDC/GPIO61
Close to MSTAR
GND_37
GND_101
EARPHONE_OUTL
R244
VDDC_4
SOGIN0
COMPONENT
TU_CVBS
V7
D18
C219
COMPONENT R241
M19
W18
NON_EU
REAR_COMP_Pr+
1uF
T19
10uF
V3
AVDD_AU33
L219
BLM18PG121SN1D
C278
V2
C4045
AUD_MASTER_CLK_0
B9
C4036
SC1_B+/COMP1_Pb+
DVB_S
0.1uF
SC1_G+/COMP1_Y+
22
AUDIO OUT
SC1_FB
HSYNC0
M7
P7
AVSS_PGA
AUR0
L7
R7
+1.5V_DDR
SC1_ID
SC1_R+/COMP1_Pr+
R213
C4046
10K
RGB
R4023
SCART1_RGB/COMP1
RGB
R4026
DSUB_B+
R3
C8
HOTPLUGD/GPIO22
CEC/GPIO5
U7
AVDD25_PGA:13mA
C4070
0.1uF
16V
AUDIO IN
DSUB
DSUB_VSYNC
P2
AVSS_PGA
VDD33
L229
BLM18PG121SN1D
SIDE USB
RXD2N
DDCDD_CK/GPIO29
W15
AVDD_NODIE
SIDE_USB1_DP
RXD2P
DDCDD_DA/GPIO30
C274
0.1uF
SIDE_USB1_DM
AE12
AMP_SDA
I2S_IN_SD/GPIO151
W14
AVDD25_PGA
AVDD2P5_MOD
AC12
AMP_SCL
RXDCKP
C273
0.1uF
SIDE_USB2_DP
HOTPLUGC/GPIO21
I2S_IN_BCK/GPIO150
C271
0.1uF
C270
0.1uF
SIDE_USB2_DM
E2
DDCDC_CK/GPIO27
AUL0
R4024 510 RGB
R4025 510 RGB
E3
I2S_I/F
D1-_HDMI2
CAP_10uF_X7R
C269
10uF
SPDIF_OUT
0.1uF
D1-_HDMI4
D6
C4042
AD10
GND_36
GND_66
0.1uF
AC11
VDDC_3
D7
RXC0P
RXC0N
U19
AVDD2P5:172mA
L211
BLM18PG121SN1D
C4009
AD9
D0-_HDMI4
D1+_HDMI4
AVDD2P5_MOD
22pF
85C
D0+_HDMI4
RXCCKN
SPDIF_IN/GPIO152
SPDIF_OUT/GPIO153
V18
10V
AC10
RXCCKP
GND_35
AVDD2P5
0.1uF
AC9
CK-_HDMI4
+2.5V_Normal
0.1uF
C4038
CK+_HDMI4
HOTPLUGB/GPIO20
X201
24MHzC262
22pF
CAP_10uF_X5R
C269-*1 10uF
AE9
XOUT
AC1
R287
HDMI
R5
PM_MODEL_OPT_1
C261
VDDC_2
GND_55
TU_SCL
AD1
GND_34
IF_AGC_MAIN
Y17
XIN
GND_33
VDDC_1
GND_48
MIUVDDC
TUNER_I2C
AD6
T10
L11
AE2
AE6
R15
R16
HALF_NIM/EU_NON_T2
R4004
0
AD2
C241
0.1uF
C240
0.1uF
R14
85C
K2
RXA0P
L10
10V
J1
D0-_HDMI1
D1+_HDMI1
K11
M13
CAP_10uF_X5R
C4001-*1 10uF
D0+_HDMI1
RXACKN
VIFP
VIFM
AC4
85C
K3
RXACKP
47
10V
J3
CK-_HDMI1
0 . 1 u F R4003
TU_SIF
C4025
C251
47
CAP_10uF_X5R
C284-*1 10uF
CK+_HDMI1
0 . 1 u F R4002
K10
0.1uF
C4069
100pF
HALF_NIM/EU_NON_T2
HALF_NIM/EU_NON_T2
H9
L204
BLM18PG121SN1D
IF_N_MSTAR
IC101
LGE2112-T8
C250
G9
C4020
0.1uF
GND_32
AVDDLV_USB
VDD33
+3.3V_Normal
0.1uF
HALF_NIM/EU_NON_T2
C258
K12
IF_P_MSTAR
HALF_NIM/EU_NON_T2
C4068
100pF
C4014
100
S7LR_DIVX_MS10
Normal Power 3.3V
DTV_IF
0.1uF
0.1uF
R289
C257
HALF_NIM/EU_NON_T2
C4043
100
IC101
LGE2112-T8
+1.10V_VDDC
Close to MSTAR
R288
HALF_NIM/EU_NON_T2
J2
10uF
C4069-*1
68pF
0.1uF
1K
C4068-*1
68pF
* Dual Stream is only Korea 3D spec
S7LR_DIVX_MS10
+1.10V_VDDC
VDDC : 2026mA
HALF_NIM/ASIA HALF_NIM/ASIA
OS:NON_DualStream OS:DualStream
NonOS:ErrorOut
NonOS:NON_ErrorOut
FHD
R227
PHM_OFF
R212
1K
NON_DVB_T2
R209
1K
NON_3D
R207
1K
NON_OLED
R4029
1K
NON_DVB_S
R4030
1K
NON_120HZ
R294
1K
R293
1K
MODEL_OPT_7
C4012
MODEL_OPT_6
C4007
MODEL_OPT_5
CAP_10uF_X7R
C4001 10uF
MODEL_OPT_4
CAP_10uF_X7R
C284 10uF
MODEL_OPT_3
MODEL_OPT_1
HD
10uF
MODEL_OPT_2
+1.10V_VDDC
VDDC 1.05V
FHD
C275
MODEL_OPT_1
HIGH
LOW
AB3
C228
MODEL_OPT_0
PIN NO.
MODEL_OPT_0
0.1uF
1K
HD
R226
PHM_ON
R211
1K
1K
DVB_T2
R208
1K
3D
R206
R4027 OLED 1K
DVB_S
R4028
1K
1K
120HZ
R291
1K
OPT
RF_SWITCH_CTL
R290
R202BOOSTER_OPT 100
R203RF_SW_OPT 100
LNA2_CTL
PIN NAME
+3.3V_Normal
C4044
+3.3V_Normal
+2.5V_Normal
MODEL OPTION
N4
T6
HDMI1_ARC
R210
33
HDMI1_ARC
C231 0 . 0 4 7 u F
N5
0
C4062
0.1uF
HDMI_ARC
SOC_RESET
R200
10K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EMEA INTERACTIVE
LP63xH-ZA
MAIN2, HW OPT
2012.11.05
2
LGE Internal Use Only
AMP_RESET
C516
1000pF
50V
50V
2
DVDD_PLL
3
LF
5
GND_1
6
E
PVDD1_2
PVDD1_3
OUT1A_1
PGND1A
BST1A
/RESET
AD
37
38
39
40
41
42
43
44
45
PGND1B
R515
12
33
BST1B
32
VDR1
31
VCC_5
30
AGND
L506
10.0uH
C537
0.1uF
50V
R516
4.7K
C535
0.47uF
50V
SPEAKER_L
C538
0.1uF
50V
R513
12
R517
4.7K
11
26
OUT2A_2
SDA
12
25
OUT2A_1
C526
22000pF
50V
WAFER-ANGLE
SPK_L+
4
SPK_L-
3
SPK_R+
C528
1uF
25V
C529
1uF
25V
C534
1uF
25V
2
SPK_R-
1
C527
22000pF
50V
P501
24
BCK
23
PGND2A
22
27
21
10
20
WCK
19
BST2A
18
L505
10.0uH
SPK_L-
28
C518
22000pF
PVDD2_3
PVDD2_2
SPK_R+
PVDD2_1
Q501
MMBT3904(NXP)
C505
1000pF
50V
34
29
OUT2B_2
B
100
OUT1B_1
9
OUT2B_1
AMP_MUTE
C
R506
35
R509
12
8
PGND2B
R501
10K
7
SCL
R502
10K
R520
10K
C509
33pF
50V
IC501
NTP-7500L
17
C507
33pF
50V
C531
390pF
50V
SDATA
AUD_SCK
+3.5V_ST
OUT1B_2
VDR2
AUD_LRCK
AMP_SCL
SPK_L+
DVDD
AUD_LRCH
AMP_SDA
4
DGND_PLL
DGND
THERMAL
49
BST2B
C513
0.1uF
16V
OUT1A_2
C517
AVDD_PLL
16
3.3K
C523
10uF
35V
C521
0.1uF
50V
R508
12
36
1
MONITOR2
R505
46
AGND_PLL
100pF
50V
15
C503
C519
0.1uF
50V
C530
390pF
50V
MONITOR1
C504
1000pF
50V
GND_IO
C512
0.1uF
16V
MONITOR0
C510
10uF
10V
47
C508
0.1uF
16V
14
C506
10uF
10V
C502
0.1uF
50V
CLK_I
16V
/FAULT
C501
0.1uF
50V
[EP]
L501
UBW2012-121F
C515
10uF
10V
48
0.1uF
13
C514
VDD_IO
+24V_AMP
+24V
+24V_AMP
22000pF
AUD_MASTER_CLK
L502
BLM18PG121SN1D
PVDD1_1
R521
10K
+3.3V_Normal
+24V_AMP
R510
12
R514
12
C532
390pF
50V
C520
C522
C524
0.1uF
50V
0.1uF
50V
10uF
35V
L504
10.0uH
C533
390pF
50V
R511
12
L503
10.0uH
R512
12
C536
0.47uF
50V
C539
R518
0.1uF
50V
4.7K
C540
R519
0.1uF
50V
4.7K
SPEAKER_R
50V
SPK_R-
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EMEA INTERACTIVE
LP63xH-ZA
AUDIO AMP
2012.11.05
5
LGE Internal Use Only
FOR FHD REVERSE(10bit)
Change in S7LR
MIRROR
[51Pin LVDS Connector]
(For FHD 60/120Hz)
LVDS_SEL
+3.3V_Normal
P703
FI-RE51S-HF-J-R1500
FHD
1
2
RXA0+
RXA0-
RXA4-
RXA0-
RXA0+
RXA3+
RXA1+
RXA1-
[30Pin LVDS Connector]
(For HD 60Hz_Normal)
R705
RXA3-
RXA1-
RXA1+
P705
3.3K
OPT
RXACK+
RXA2+
RXA2-
FF10001-30
HD
R710
10K
OPT
3
Pol-change
RXA4+
RXACK-
RXA2-
RXA2+
RXA2+
RXACK+
RXACK-
1
RXA2-
RXACK-
RXACK+
2
RXA1+
RXA3+
RXA3-
3
RXA1-
RXA3-
RXA3+
4
RXA0+
RXA4+
RXA4-
5
RXA0-
RXA4-
RXA4+
6
RXA3+
7
RXA3-
4
5
6
7
8
9
RXB4+
10
11
12
RXA4+
13
RXA4-
14
RXA3+
15
RXA3-
16
RXACK+
17
RXACK-
18
19
RXA2+
20
RXA2-
21
RXA1+
23
RXA1-
25
RXB0-
8
RXB4-
RXB0-
RXB0+
9
RXACK+
RXB3+
RXB1+
RXB1-
10
RXACK-
RXB3-
RXB1-
RXB1+
11
RXBCK+
RXB2+
RXB2-
12
RXA2+
RXBCK-
RXB2-
RXB2+
13
RXA2-
RXB2+
RXBCK+
RXBCK-
14
RXB2-
RXBCK-
RXBCK+
15
RXA1+
RXB1+
RXB3+
RXB3-
16
RXA1-
RXB1-
RXB3-
RXB3+
17
RXB0+
RXB4+
RXB4-
18
RXA0+
RXB0-
RXB4-
RXB4+
19
RXA0-
21
22
R712
3.3K
OPT
RXA0+
23
RXA0R706
26
24
0
NON_AUO/NON_HD
27
FOR FHD REVERSE(8bit)
R711
10K
OPT
PANEL_VCC
25
L701
120-ohm
26
28
RXB4+
29
RXB4-
30
RXB3+
Change in S7LR
HD
27
28
MIRROR
Pol-change
Shift
29
31
RXB3-
RXA4+
RXA4+
RXA4-
RXA0-
32
RXBCK+
RXA4-
RXA4-
RXA4+
RXA0+
33
RXBCK-
RXA3+
RXA0+
RXA0-
RXA1RXA1+
HD
C703
0.1uF
16V
30
34
RXA3-
RXA0-
RXA0+
35
RXB2+
RXACK+
RXA1+
RXA1-
RXA2-
36
RXB2-
RXACK-
RXA1-
RXA1+
RXA2+
37
RXA2+
RXA2+
RXA2-
RXACK-
38
RXB1+
RXA2-
RXA2-
RXA2+
RXACK+
39
RXB1-
RXA1+
RXACK+
RXACK-
RXA3-
40
RXB0+
RXA1-
RXACK-
RXACK+
RXA3+
41
RXB0-
RXA0+
RXA3+
RXA3-
RXA4-
RXA0-
RXA3-
RXA3+
RXA4+
RXB4+
RXB4+
RXB4-
RXB0-
RXB4-
RXB4-
RXB4+
RXB0+
RXB3+
RXB0+
RXB0-
RXB1-
RXB3-
RXB0-
RXB0+
RXB1+
RXBCK+
RXB1+
RXB1-
RXB2-
RXBCK-
RXB1-
RXB1+
RXB2+
RXB2+
RXB2+
RXB2-
RXBCK-
RXB2-
RXB2-
RXB2+
RXBCK+
RXB1+
RXBCK+
RXBCK-
RXB3-
RXB1-
RXBCK-
RXBCK+
RXB3+
RXB0+
RXB3+
RXB3-
RXB4-
RXB0-
RXB3-
RXB3+
RXB4+
42
LVDS_SEL
+3.3V_Normal
20
22
24
RXB0+
R707
0
43
NON_AUO/NON_HD
R708
0
44
NON_AUO/NON_HD
PANEL_VCC
31
45
46
47
L702
120-ohm
FHD
48
49
50
51
C710
0.1uF
16V
FHD
52
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EMEA INTERACTIVE
LP63xH-ZA
LVDS WAFER
2012.11.05
7
LGE Internal Use Only
RS232C
10
5
9
IR_OUT_RS232C
4
8
3
7
2
6
+3.5V_ST
1
+3.5V_ST
C1000
0.33uF
C1+
C1001
0.1uF
C1002
0.1uF
C1-
C2-
VC1004
0.1uF
SPG09-DB-009
R1004
1K
JK1000
90V
1
16
2
15
3
14
4
13
5
12
6
11
7
10
VCC
+3.5V_ST
V+
C2+
C1003
0.1uF
D1002
1SS355
C1005
0.1uF
IC1000
MAX3232CDR
DOUT2
RIN2
8
9
GND
DOUT1
RIN1
R1005
4.7K
R1006
4.7K
ROUT1
UART_RX
DIN1
UART_TX
DIN2
ROUT2
EAN41348201
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EMEA INTERACTIVE
LP63xH-ZA
RS232C_9PIN
2012.11.05
10
LGE Internal Use Only
RGB/SPDIF/PC/HP/USB
+5V_Normal
D1115
MMBD6100
A2
C
A1
R1140
2.2K
R1139
2.2K
C1129
0.1uF
16V
EARPHONE BLOCK
RGB_DDC_SCL
RGB_DDC_SDA
C1127
18pF
50V
HEAD_PHONE
R1125
C
1K HEAD_PHONE
Q1101
MMBT3904(NXP)
+3.3V_Normal
B
E
Q1104
MMBT3904(NXP)
CHEAD_PHONE
R1155
1K
GND
5
L
4
DSUB_HSYNC
HEAD_PHONE
Q1105
MMBT3906(NXP)
3
HEAD_PHONE
1
RGB
R1153
68
RGB
USB2_NORMAL
EAN61849601
IN_2
C1141
10uF
10V
120OHM
R1190
2K
1/8W
5%
R1191
USB2_NORMAL
2K
1/8W
C1140
5%
22uF
16V
OUT_1
FLG
6
5
3
4
USB2_NORMAL
C1142
0.1uF
CLOCK
CLK_COM2
USB2_OCD
R1159
RGB
GND_1
V_SYNC
NC
BLUE
H_SYNC
BLUE_GND
GREEN
DDC_DATA
RGB
10
14
4
3
9
13
12
8
R1164
68
7
R1149
68 CLOCK
CLK_DATA1
1
2
3
SIDE_USB2_DP
RGB
1K
R1147
DSUB_DET
CLOCK
R1172 68
R1157
68 CLOCK
R1156
68 CLOCK
CLK_DATA5
CLK_COM5
CLK_COM4
CLOCK
CLK_COM1
SIDE_USB2_DM
5
5
R1163
0
CLOCK
4
3AU04S-305-ZC-(LG)
1
2
3
4
USB DOWN STREAM
USB DOWN STREAM
SIDE_USB1_DM
SIDE_USB1_DP
USB2_NORMAL
R1193
10K
1
JK1106
JK1105
USB2_NORMAL
R1192
47
2
USB2_NORMAL
SPG09-DB-010
22uF
10V
JK1104
USB1_NORMAL
C1117
RGB
D1112
20V
10pF
RGB
RED
USB2_CTL
R1150
0
RED_GND
RGB
R1137
75
R1173
GREEN_GND0
RGB
DSUB_R+
3AU04S-305-ZC-(LG)
R1166
68
R1151
68
EN
+5V_USB
USB1_NORMAL
0
CLK_DATA2
RGB
R1146
10K
CLOCK
SHILED
USB2_NORMAL
+3.3V_Normal
16
IN_1
RGB
R1165
0
0
2
USB2_NORMAL
L1150
BLM18PG121SN1D
DDC_GND
$0.077
7
R1152
0
GND
SYNC_GND R1199 RGB
DDC_CLOCK0
R1171
OUT_2
1
8
15
USB2_NORMAL
L1140
USB2_NORMALUBW2012-121F
NC
RGB
D1111
20V
10pF
RGB
RGB
R1135
75
R1160
0
R1176 68
R1158
0
DSUB_G+
CLOCK_DET
CLK_DATA7
RGB
+5V_Normal
USB2_NORMAL
OPT
CLOCK
IC1107
AP2191DSG
5
USB2_DIODES
CLK_DATA4
R1170
68
R1168
68
CLK_DATA3
USB1_DIODES
CLOCK
CLOCK
OPT
CLK_COM3
RGB
R1167
0 RGB
CLOCK
RGB
SIDE_HP_MUTE
Q1106
MMBT3904(NXP)
E
HEAD_PHONE
RGB
D1110
20V
10pF
R1161
0
B
R1154
0
GND_2
E
R1129
3.3K
HEAD_PHONE
Q1103
MMBT3904(NXP)
C HEAD_PHONE
RGB
R1133
75
11
B
HEAD_PHONE
R1180
10K
R1169
0
DSUB_B+
C
R1177
0
E
B
6
C
Q1102
MMBT3904(NXP)
HEAD_PHONE
B
HEAD_PHONE
R1128
1K
E
C
R
C1119
10uF
16V
HEAD_PHONE
RGB
D1113
20V
10pF
RGB
D1109
20V
10pF
+3.5V_ST
DETECT
HP_DET
HP_ROUT
C1128
18pF
50V
DSUB_VSYNC
HEAD_PHONE
JK1101
KJA-PH-0-0177
E
B
R1130
10K
C1118
10uF
16V
HEAD_PHONE
HEAD_PHONE
HP_LOUT
CLK_DATA6
R1174
68
PC/COMPONENT AUDIO
JK1102
PEJ027-04
3
SPDIF OPTIC JACK
E_SPRING
6A
T_TERMINAL1
7A
B_TERMINAL1
5.15 Mstar Circuit Application
+3.3V_Normal
C1131
0.1uF
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C1121
100pF
50V
1
VCC
2
VIN
3
R1107
15K
PC_R_IN
4
R_SPRING
5
T_SPRING
7B
B_TERMINAL2
6B
T_TERMINAL2
C1107
100pF R1102
50V
470K
R1110
10K
R1108
15K
PC_L_IN
C1108 R1103
100pF 470K
50V
R1111
10K
4
SHIELD
SPDIF_OUT
GND
Fiber Optic
JK1103
2F01TC1-CLM97-4F
EMEA INTERACTIVE
LP63xH-ZA
INTERFACE
2012.11.05
11
LGE Internal Use Only
+3.3V_Normal
S_FLASH_MAIN_MACRONIX
IC1300
MX25L8006EM2I-12G
CS#
/SPI_CS
1
8
2
7
3
6
VCC
C1300
0.1uF
SO/SIO1
SPI_SDO
WP#
/FLASH_WP
GND
4
HOLD#
SCLK
SPI_SCK
SI/SIO0
5
SPI_SDI
S_FLASH_MAIN_WINBOND
IC1300-*1
W25Q80BVSSIG
CS
DO[IO1]
%WP[IO2]
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
1
8
2
7
3
6
4
5
VCC
HOLD[IO3]
CLK
DI[IO0]
EMEA INTERACTIVE
LP63xH-ZA
S-FLASH
2012.11.05
13
LGE Internal Use Only
REAR COMPONENT PHONE JACK
COMPONENT
JK1603
REAR_COMP_Pr+
D1613
ESD_COMP_ZENER_ROHM
PEJ029-02
8
G_SPRING
3
E_SPRING
4
R_SPRING
5
T_SPRING
7
B_TERMINAL
6
T_TERMINAL
D1613-*1
ESD_COMP_ZENER_KEC
R9908
75
COMPONENT
D1614
ESD_COMP_ZENER_ROHM
D1614-*1
ESD_COMP_ZENER_KEC
D1615-*1
ESD_COMP_ZENER_KEC
D1616-*1
ESD_COMP_ZENER_KEC
REAR_COMP_Pb+
D1615
R9909
75
COMPONENT
ESD_COMP_ZENER_ROHM
D1616
D1617-*1
ESD_COMP_ZENER_KEC
ESD_COMP_ZENER_ROHM
D1620-*1
ESD_COMP_ZENER_KEC
REAR_COMP_Y+
D1617
ESD_COMP_ZENER_ROHM
R9910
75
COMPONENT
D1620
D1602-*1
ESD_SCART_ZENER_KEC
ESD_COMP_ZENER_ROHM
D1612-*1
ESD_SCART_ZENER_KEC
+3.3V_Normal
COMPONENT
R9904
10K
R9912
1K
REAR_COMP_DET
COMPONENT
D1619
5.6V
OPT
Full Scart/ Comp1
+3.3V_Normal
R1613
10K
IN CASE OF SMALL= 15V
+12V/+15V
R1614
1K
SC1/COMP1_DET
+12V/+15V
C1607
0.1uF
16V
EU_OPT
L1606
EU_OPT
R1611
0
B
SC1_CVBS_IN
ESD_SCART_ZENER_ROHM
D1602
EU_OPT
AV_DET
22
COM_GND
21
SYNC_IN
C
EU_OPT
C1604
47pF
50V
EU_OPT
R1609
75
D1612
ESD_SCART_ZENER_ROHM
SYNC_OUT
EU_OPT
R1628
75
SYNC_GND2
18
SYNC_GND1
17
RGB_IO
D1603
20V
10pF
EU_OPT
Rf
EU_OPT
C1620
100uF
16V
NON_EMI_FILTER
L1609-*1
0
SC_EMI_FILTER
L1609
CM2012FR10KT
16
RGB_GND
14
R_GND
D1604
20V
10pF
R1608
75
SC1_R+/COMP1_Pr+
SC_EMI_FILTER
C1624
47pF
50V
13
SC_EMI_FILTER
L1610
CM2012FR10KT
D2B_OUT
12
SC_EMI_FILTER
C1626
47pF
50V NON_EMI_FILTER
EU_OPT
R1616
75
EU_OPT
R1627
22
Rg
SC1_FB
G_GND
D1605
20V
10pF
9
R1604 SC_EMI_FILTER
C1627
75
47pF
50V
IC1601
AZ4580MTR-E1
EU_OPT
R1656
2.2K
EU_OPT
R1664
33K
EU_OPT
C1644
10uF
16V
DTV/MNT_VOUT
EU_OPT
R1639
180
OUT1
DTV/MNT_L_OUT
EU_OPT
C1621
47uF
25V
EU_OPT
C1654
33pF
EU_OPT
R1642
15K
IN1-
IN1+
EU_OPT
R1667
10K
VEE
EU_OPT
C1605
0.1uF
50V
1
8
VCC
2
7
OUT2
3
6
IN2-
4
5
IN2+
EU_OPT
R1659
2.2K
330pF
C1664
EU_OPT
DTV/MNT_R_OUT
EU_OPT
R1646
33K
EU_OPT
R1647
10K
EU_OPT
C1606
10uF
16V
EU_OPT
C1613
33pF
EU_OPT
R1651
5.6K
SCART1_Lout
SCART1_Rout
220K
R1643
EU_OPT
EU_OPT
R1669
220K
EU_OPT
C1614
330pF
L1610-*1
0
CLOSE TO MSTAR
SC1_G+/COMP1_Y+
D2B_IN
10
EU_OPT
EU_OPT
C1625
0.1uF
50V
EU_OPT
R1657
5.6K
G_OUT
11
EU_OPT
R1641
47K
E
Gain=1+Rf/Rg
R_OUT
15
EU_OPT
Q1602
MMBT3904(NXP)
EU_OPT C
R1622
B
390
EU_OPT
R1635
390
20
19
EU_OPT
C1623
0.1uF
50V
EU_OPT
R1640
470
EU_OPT E
MMBT3906(NXP)
Q1601
SC1_SOG_IN
SC_EMI_FILTER
C1628
47pF
50V
CLOSE TO MSTAR
ID
8
B_OUT
EU_OPT
R1623
15K
7
AUDIO_L_IN
6
B_GND
5
SC_EMI_FILTER
L1611
CM2012FR10KT
AUDIO_GND
4
EU_OPT
D1618
20V
10pF
NON_EMI_FILTER
L1611-*1
0
AUDIO_L_OUT
3
AUDIO_R_IN
2
AUDIO_R_OUT
D1606
20V
10pF
SC1_B+/COMP1_Pb+
SC_EMI_FILTER
C1629
47pF
50V
SC_EMI_FILTER
C1630
47pF
50V
R1605
75
1
R1617
10K
PSC008-01
JK1602
SC1/COMP1_L_IN
R1606
470K
L1604
120-ohm
C1611
330pF
50V
+3.5V_ST
DTV/MNT_L_OUT
SC1/COMP1_R_IN
L1603
120-ohm
C1612
330pF
50V
[SCART AUDIO MUTE]
R1630
12K
R1618
10K
R1607
470K
SC1_ID
EU_OPT
R1629
3.9K
R1631
12K
EU_OPT
Q1607
MMBT3904(NXP)
EU_OPT
R1648
2K
EU_OPT
MMBT3906(NXP)
Q1610
EU_OPT
R1652
10K
SCART1_MUTE
DTV/MNT_L_OUT
EU_OPT
L1601
BLM18PG121SN1D
EU_OPT
C1609
1000pF
50V
EU_OPT
C1618
4700pF
EU_OPT
C1610
1000pF
50V
EU_OPT
C1619
4700pF
3
DTV/MNT_R_OUT
EU_OPT
Q1608
MMBT3904(NXP)
1
2
EU_OPT
R1650
2K
EU_OPT
C1636
0.1uF
DTV/MNT_R_OUT
EU_OPT
L1602
BLM18PG121SN1D
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EMEA INTERACTIVE
LP63xH-ZA
REAR JACK
2012.11.05
16
LGE Internal Use Only
EXT_SPK AMP
UART/I2C SWITCH
+12V/+15V
L1710
EXT_SPK
EXT_SPK
L1711
BLM18PG121SN1D
UART_SW1
CONNECTION
L
A - B0
MSTAR ADJ
H
A - B1
MSTAR DEBUG
C1738
0.1uF
16V
EXT_SPK
EXT_SPK
R1776
100
UART_SW2
CONNECTION
L
A - B0
INTERACTIVE
H
A - B1
NEC USB_DOWNLOAD
C1739
C1740
C1741
10uF
10uF
0.1uF
16V
25V
25V
OPT
EXT_SPK EXT_SPK
EXT_SPK
AMP_RESET
IC1700
TPA3124D2PWPR
+3.5V_ST
R1720
100
PVCCL_1
R1777
10K
EXT_SPK
EXT_SPK
10K
R1778
C
B
SUB_AMP_MUTE
1
SD
EXT_SPK
Q1700
MMBT3904(NXP)
PVCCL_2
E
MUTE
C1732
1uF
10V
LIN
24
2
23
3
22
4
21
5
EXT_AMP_L
20
PGNDL_2
PGNDL_1
EXT_SPK
L1712
22.0uH
LOUT
C1742
0.22uF
50V
EXT_SPK
BSL
AVCC_2
EXT_SPK
R1779
4.7K
EXT_SPK
C1743
1uF
50V
L1713
22.0uH
EXT_SPK
RIN
EXT_SPK_R
6
EXT_AMP_R
C1733
1uF
10V
BYPASS
EXT_SPK
C1734
1uF
50V
AGND_1
19
7
AGND_2
PVCCR_1
VCLAMP
18
8
17
9
16
10
15
11
14
R1781
10K
OPT
GAIN0
IC1707
NLASB3157DFT2G
+3.5V_ST
SELECT
C1710
0.1uF
C1748
100uF
25V
EXT_SPK
AVCC_1
UART_SW2
IC1703
NLASB3157DFT2G
+3.5V_ST
EXT_SPK
10K
R1790
EXT_SPK
EXT_SPK EXT_SPK
C1745
C1746
R1780
1uF
0.47uF
4.7K
50V
50V
EXT_SPK
EXT_SPK
EXT_SPK_L
EXT_SPK
C1744
0.47uF
50V
R1728
100
UART_SW1
EXT_SPK
C1747
100uF
25V
VCC
A
MST_TX
6
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
4
EXT_SPK
10K
R1791
3
B1
MST_DBG_TX
SELECT
GND
C1712
0.1uF
VCC
PVCCR_2
12
13
1
B1
MST_NEC_TX
GND
B0
UART_TX
A
NEC_RX
EAN38256201
4
3
B0
UART_RX
EAN38256201
R1782
10K
OPT
GAIN1
BSR
EXT_SPK
C1749
0.22uF
50V
ROUT
R1783
10K
EXT_SPK
IC1708
NLASB3157DFT2G
IC1704
NLASB3157DFT2G
R1784
10K
EXT_SPK
SELECT
SELECT
6
1
ON SEMICONDUCTOR
VCC ANALOG SWITCH
5
2
PGNDR_2
B1
MST_DBG_RX
A
PGNDR_1
MST_RX
4
3
GND
NEC_TX
B0
6
1
ON SEMICONDUCTOR
VCC ANALOG SWITCH
5
2
A
EXT_SPK
C1735
1uF
50V
6
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
4
3
B1
MST_NEC_RX
GND
B0
UART_TX
UART_RX
EAN38256201
EAN38256201
C1736
10uF
25V
EXT_SPK
C1737
0.1uF
16V
EXT_SPK
EXT_SPK_CONTROL/DEBUGDBG_SW
L
H
DBG_SW
CONNECTION
A - B0DEBUG_NEC/MSTAR
A - B1 EXT_SPK CONTROL
UART_SW
L
H
+3.5V_ST
+3.5V_ST
IC1701
NLASB3157DFT2G
C1705
0.1uF
JK1701
CONNECTION
A - B0
NEC DEBUG
A - B1 MSTAR DEBUG
EEPROM_SW
CONNECTION
A - B0 NEC-EEPROM
L
H
A - B1MSTAR-EEPROM
R1709
3.6K
SELECT
PEJ027-04
VCC
3 E_SPRING
6
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
A
6A T_TERMINAL1
1
4
7A B_TERMINAL1
3
B1
EXT_VOL+
R1731
22
GND
EEPROM_SW
C1714
1uF
50V
R1721
100
B0
DBG_TX
UART_DBG_SW
EAN38256201
+3.5V_ST
+3.5V_ST
4 R_SPRING
R1710
3.6K
5 T_SPRING
IC1705
NLASB3157DFT2G
+3.5V_ST
SELECT
7B B_TERMINAL2
6
1
ON SEMICONDUCTOR
VCC ANALOG SWITCH
5
2
6B T_TERMINAL2
A
4
3
IC1709
NLASB3157DFT2G
+3.5V_ST
IC1702
NLASB3157DFT2G
SELECT
R1724
4.7K
B1
EXT_VOLSELECT
GND
C1711
0.1uF
VCC
B0
1
B1
VCC
6
1
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
B1
I2C_SCL
GND
MST_DBG_TX
A
GND
EEPROM_SCL
4
DBG_RX
3
B0
NEC_EEPROM_SCL
EAN38256201
A
DBG_TX
EAN38256201
6
ON SEMICONDUCTOR
ANALOG SWITCH
5
2
C1713
0.1uF
4
3
B0
NEC_DBG_TX
EAN38256201
IC1706
NLASB3157DFT2G
SELECT
EXT_SPK OUT
A
EXT_SPK
DBG_RX
JK1700
PEJ034-01
+3.3V_Normal
3
E_SPRING
4
R_SPRING
5
T_SPRING
6
1
ON SEMICONDUCTOR
VCC ANALOG SWITCH
5
2
4
3
EAN38256201
IC1710
NLASB3157DFT2G
B1
SELECT
MST_DBG_RX
6
1
ON SEMICONDUCTOR
VCC ANALOG SWITCH
5
2
GND
B0
A
NEC_DBG_RX
EEPROM_SDA
4
3
B1
I2C_SDA
GND
B0
NEC_EEPROM_SDA
EAN38256201
EXT_SPK
R1771
100K
EXT_SPK
R1772
100
EXT_SPK_DET
EXT_SPK_R
7B
B_TERMINAL2
6B
T_TERMINAL2
EXT_SPK_L
C1730
1uF
OPT
C1731
1uF
OPT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EMEA INTERACTIVE
LP63xH-ZA
EXT SPK
2012.11.05
17
LGE Internal Use Only
* Option name of this page : CI_SLOT
(because of Hong Kong)
CI Region
CI SLOT
+5V_CI_ON
CI TS INPUT
CI_DATA[0-7]
CI_DATA[0-7]
+5V_Normal
C1906
10uF
10V
R1903
10K
EAG41860102
P1901CI_SLOT
10067972-000LF
/CI_CD1
R1908
100
37
3
38
4
CI_DATA[4]
CI_DATA[5]
CI_TS_DATA[5]
39
5
CI_DATA[6]
CI_TS_DATA[6]
CI_TS_DATA[7]
40
6
41
7
42
8
33
R1905
10K
CI_DATA[7]
R1919
47
9
44
10
CI_ADDR[11]
45
11
CI_ADDR[9]
46
12
CI_ADDR[8]
CI_MDI[0]
47
13
CI_ADDR[13]
CI_MDI[1]
48
14
CI_ADDR[14]
49
15
50
16
51
17
52
18
0.1uF
0
R1910
OPT
R1920
19
54
20
55
21
CI_ADDR[12]
CI_MDI[7]
56
22
CI_ADDR[7]
57
23
CI_ADDR[6]
R1902
47
58
24
CI_ADDR[5]
R1901
47
59
25
CI_ADDR[4]
60
26
CI_ADDR[3]
61
27
CI_ADDR[2]
R1926
33
33
62
28
R1927
33
63
29
64
30
CI_DATA[0]
65
31
CI_DATA[1]
66
32
CI_DATA[2]
67
33
68
34
R1906
REG
R1925
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0]
10K
33
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
G2
2
AR1903
R1907
/CI_CD2
69
FE_TS_DATA[0]
FE_TS_DATA[0-7]
FE_TS_SYNC
FE_TS_VAL_ERR
CI_MIVAL_ERR
/PCM_CE
FE_TS_CLK
CI_MCLKI
CI_OE
CI HOST I/F
CI_ADDR[1]
CI_ADDR[0]
CI_ADDR[0-14]
G1
1
CI_DET
100
IC1902
1OE
+5V_Normal
C1914
12pF
50V
CLOSE TO MSTAR
1A1
PCM_A[0]
R1904
10K
33
/PCM_IRQA
53
PCM_RST
FE_TS_DATA[1]
C1909
0.1uF
CI_MDI[6]
/PCM_WAIT
FE_TS_DATA[2]
CI_MDI[1]
CI_WE
100
CI_MDI[5]
CI_MDI[4]
FE_TS_DATA[3]
CI_MDI[2]
CI_MISTRT
CI_ADDR[10]
43
C1905
AR1906
AR1904
CI_IOWR
CI_MDI[3]
FE_TS_DATA[4]
33
CI_MDI[0]
CI_IORD
CI_MDI[2]
FE_TS_DATA[5]
CI_MDI[4]
1
TOSHIBA
+3.3V_CI
C1913
0.1uF
16V
VCC
2OE
0ITO742440D
C1904
0.1uF
16V
2Y4
CI_ADDR[7]
1A2
PCM_A[1]
CI_MISTRT
CI_MIVAL_ERR
2Y3
CI_ADDR[6]
3
18
4
17
5
CI_MCLKI
1A3
PCM_A[2]
2Y2
CI_ADDR[5]
1A4
PCM_A[3]
2Y1
CI DETECT
CI_ADDR[4]
GND
+3.3V_Normal
20
19
2
TC74LCX244FT
AR1901
CI_TS_DATA[4]
FE_TS_DATA[6]
R1921
10K
CI_DATA[3]
FE_TS_DATA[7]
CI_MDI[5]
35
36
AR1905
CI_MDI[6]
CI_MDI[3]
CI_DATA[0-7]
C1903
0.1uF
16V
33
CI_MDI[7]
+3.3V_CI
+3.3V_CI
6
7
16
15
14
8
13
9
12
10
11
1Y1
CI_ADDR[0]
2A4
PCM_A[7]
1Y2
CI_ADDR[1]
2A3
PCM_A[6]
1Y3
CI_ADDR[2]
2A2
PCM_A[5]
1Y4
CI_ADDR[3]
2A1
PCM_A[4]
+3.3V_CI
CI_SLOT
IC1901
74LVC1G32GW
/CI_CD2
/CI_CD1
B
1
A
2
GND
3
5
VCC
4
Y
R1917
10K
CI_DATA[0]
C1902
0.1uF
R1918
47
CI_DATA[0-7]
CI_DET
/PCM_CD
CI POWER ENABLE CONTROL
AR1907
33
PCM_D[0]
CI_DATA[1]
PCM_D[1]
CI_DATA[2]
PCM_D[2]
CI_DATA[3]
PCM_D[3]
CI_DATA[4]
AR1908
33
PCM_D[4]
CI_DATA[5]
PCM_D[5]
CI_DATA[6]
PCM_D[6]
CI_DATA[7]
PCM_D[7]
PCM_D[0-7]
L1901
BLM18PG121SN1D
PCM_D[0-7]
CI_DATA[0-7]
+5V_CI_ON
S
D
Q1902
AO3407A
+5V_Normal
L1902
BLM18PG121SN1D
CI_ADDR[8]
33
AR1912
PCM_A[8]
CI_ADDR[9]
G
C1907
0.1uF
16V
R1914
22K
C1911
4.7uF
16V
C1910
0.1uF
16V
PCM_A[10]
CI_ADDR[11]
PCM_A[11]
CI_ADDR[12]
R1922
PCM_A[9]
CI_ADDR[10]
33
AR1913
PCM_A[12]
CI_ADDR[13]
PCM_A[13]
CI_ADDR[14]
PCM_A[14]
/PCM_REG
REG
2.2K
R1913
10K
PCM_5V_CTL
C
B
R1924
10K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Q1901
MMBT3904(NXP)
E
CI_OE
CI_WE
AR1909
33
/PCM_OE
/PCM_WE
CI_IORD
/PCM_IORD
CI_IOWR
/PCM_IOWR
EMEA INTERACTIVE
LP63xH-ZA
PCMCI
2012.11.05
19
LGE Internal Use Only
ETHERNET
* H/W option : ETHERNET
+2.5V_Normal
ETHERNET
JK2100-*1
2
3
4
XRJV-01V-0-D12-080
1
2
3
4
ETHERNET_XMULTIPLE
ETHERNET_XML_EMI
1
L2101
BLM18PG121SN1D
JK2100
RJ45VT-01SN002
1
EPHY_TP
ETHERNET
ETHERNET
7
8
4
5
EPHY_RP
R2103
49.9
5
6
6
7
R2104
49.9
C2102
0.1uF
ETHERNET
EPHY_RN
7
8
9
0.1uF
ETHERNET
EPHY_TN
ETHERNET
6
R2102
49.9
C2101
3
ETHERNET
5
R2101
49.9
2
8
9
9
9
ETHERNET
C2104
0.01uF
50V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LP63xH-ZA
LAN
2012/11/05
21
LGE Internal Use Only
13pF
22
R349
P47/INTP2
P46/INTP1/TI05/TO05
P120/INTP0/EXLVI
81
82
83
84
P43/SCK01
P42/TI04/TO04
87
85
86
P44/SI01
TOOL1
TOOL0
P40/TOOL0
RESET
P41/TOOL1
88
89
90
91
P124/XT2
P123/XT1
92
P45/SO01
C307
R345
1M
FLMD0
P122/X2/EXCLK
P121/X1
FLMD0
93
94
95
VSS
REGC C306
96
EVSS0
75
P145/TI07/TO07
74
P00/TI00
P66/WR1
8
73
P01/TO00
72
P02/SO10/TXD1
IC301
71
P03/SI10/RXD1/SDA10
69
P131/TI06/TO06
68
P130
67
P20/ANI0
UPD78F1164GF(S)70
NEC_MICOM
15
66
P21/ANI1
P71/EX17/KR1
16
65
P22/ANI2
17
64
P23/ANI3
18
63
P24/ANI4
19
62
P25/ANI5
P06/WAIT
UART_SW1
UART_DBG_SW
EVSS1
20
61
P26/ANI6
P80/EX0
21
60
P27/ANI7
56
P153/ANI11
26
55
P154/ANI12
P86/EX6
27
54
P155/ANI13
P87/EX7
28
53
P156/ANI14
P30/INTP3/RTC1HZ
29
52
P157/ANI15
30
51
AVSS
B
B
C
C
C
CLK_COM1
CLK_COM2
CLK_COM3
NEC_DBG_TX
CLK_COM4
SUB_AMP_MUTE
CLK_COM5
NEC_EEPROM_SDA
NEC_EEPROM_SCL
CLOCK_DET
CLK_DATA1
CLOCK
IC303
AMP_MUTE
KID65003AF
CLK_DATA2
I1
I2
+5V_ST
CLOCK
R378
10K
I3
I4
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
O1
CLK_DATA3
O2
CLK_DATA4
O3
CLK_DATA5
O4
CLK_DATA6
C
Q301
MMBT3904(NXP)
CLOCK
+5V_ST
CLOCK B
4.7K
R371
E
CLOCK
R379
10K
I5
I6
I7
O5
CLK_DATA7
O6
O7
+3.5V_ST
C
AVREF0
P111/ANO1
P110/ANO0
P13/EX27/TXD3
P14/EX28/RXD3
CLOCK B
4.7K
R372
Q302
MMBT3904(NXP)
CLOCK
+5V_ST
E
GND
COMMON
CLOCK
R380
10K
C
CLOCK
22
P50/EX8
31
EVDD1
B
C
NEC_DBG_RX
50
25
P85/EX5
SOC_RESET
49
P84/EX4
PANEL_CTL
48
P152/ANI10
P10/EX24/SCK00 46
AVREF1
47
P151/ANI9
57
P12/EX26/SO00/TXD0 44
P11/EX25/SI00/RXD0 45
58
24
43
23
P83/EX3
42
59
P82/EX2
DBG_SW
P17/EX31/TI02/TO02 39
P16/EX30/TI01/TO01/INTP540
P15/EX29/RTCDIV/RTCCL 41
22
P150/ANI8
38
P81/EX1
INV_CTL
1
MODEL1_OPT_2
P04/SCK10/SCL10
P72/EX18/KR2
P05/CLKOUT
POWER_DET
VDD
6
7
P70/EX16/KR0
POWER_ON/OFF_1
97
EVDD0
P64/RD
P65/WR0
37
OPT
76
P144/SO20/TXD2
36
CLOCK
UART_SW2
RL_ON
98
P143/SI20/RXD2/SDA20
P57/EX15
69
CLOCK
99
P142/SCK20/SCL20
P56/EX14
CLOCK_DET
NON_CLOCK
1Y
B
C
77
14
4
B
78
P73/EX19/KR3
LED_R/BUZZ
3
CLOCK
BU300
PKLCS1212E4001-R1
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
Q306
Q307
Q310
Q308
Q309
E 2SA1504S E 2SA1504S
E 2SA1504S
E 2SA1504S
E 2SA1504S
3
P55/EX13
78
NEC_IR
OPT
CLOCK
C309
0.1uF
16V
2
CLOCK
L302
BLM18PG121SN1D
P62
35
MODEL1_OPT_2
OPT
VCC
+5V_ST
P63 4
P31/TI03/TO03/INTP45
P75/EX21/KR5/INTP9 12
P74/EX20/KR4/INTP8 13
5
2
P141/PCLBUZ1/INTP7
P54/EX12
79
OPT
1
SIGN190368
P140/PCLBUZ0/INTP6
34
MODEL1_OPT_1
OPT
GND
79
P67/ASTB 9
P77/EX23/KR7/INTP11 10
P76/EX22/KR6/INTP10 11
CEC_ON/OFF
80
1
3
80
P53/EX11
5V_ON/OFF
LOW
2
4
2
33
HIGH
C308
2.2uF
10V
1
32
PIN NO.
1A
P60/SCL0
P51/EX9
CEC_REMOTE_NEC
NC
P61/SDA0
Can’t use GPIO - P62, P63
MODEL OPTION
100
R312
4.7K
P52/EX10
CLOCK
R303
10K
R310
4.7K
CLOCK_SDA
MODEL1_OPT_0
R348
100K
+3.5V_ST
CLOCK_SCL
PIN NAME
MICOM_RESET
Closed to Crystal
0.1uF
16V
MODEL1_OPT_2
C304
0.1uF
16V
CLOCK_DET
CLOCK
IC302
74LX1G14CTR
SW300
JTP-1127WEM
X300
10MHz
L301
BLM18PG600SN1D
NON_CLOCK
R302
10K
CLOCK
R377
10K
+3.5V_ST
+3.5V_ST
+3.5V_ST
R352
47K
13pF
+3.5V_ST
C305
MICOM MODEL OPTION
4.7K
R373
Q303
MMBT3904(NXP)
CLOCK
+5V_ST
E
R357
R358
10K
B
CLOCK
R381
10K
+3.5V_ST
C
IR_OUT_CTRL
EEPROM_SW
MST_NEC_TX
MST_NEC_RX
NEC_TX
NEC_RX
AMP_RESET
SCART1_MUTE
SIDE_HP_MUTE
CLOCK
B
4.7K
R374
E
P300
Q304
MMBT3904(NXP)
CLOCK
+5V_ST
12507WS-06L
CLOCK
R382
10K
C
CLOCK B
4.7K
R376
R383
4.7K
MICOM_RESET
Q305
MMBT3904(NXP)
CLOCK
E
TOOL0
R384
4.7K
1
2
3
4
KEY1
KEY2
Step Up regulator from 3.5V to 5V
+5V_ST
Boost_5V
Boost_5V
C333
22uF
16V
NF_1
+3.5V_ST
C302
1uF
10V
IN
FREQ
SS
Boost_5V
C303
0.1uF
[EP]AGND
16V
4
8
3
9
10
TPS61087DRC
IC300
2
1
PGND
R1
AGND
EN
RST
DU
SQW
R2
Boost_5V
R300
16K
C330
2700pF
50V
Boost_5V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
NF_2
NC_2
Boost_5V
R330
OPT
51K
C331
1%
100pF
50V
R331
3.3K
1%
Boost_5V
FB
COMP
CLOCK
R390
1K
Boost_5V
R332
18K
1%
5V_ON/OFF
7
VBAT
1
18
2
17
3
16
4
15
5
14
6
13
7
12
8
11
9
10
NC_4
+3.5V_ST
NV_4
NF_3
C320
0.1uF
16V
CLOCK
VCC
IRQ2
NC_3
IRQ1/FT/OUT
SCL
CLOCK_SCL
1
C301
10uF
10V
Boost_5V
7
THERMAL
C300
0.1uF
16V
Boost_5V
5
6
CLOCK
BA300
BATTERY
VSS
SDA
CLOCK_SDA
2
SW_2
Boost_5V
6
11
SW_1
+3.5V_ST
FLMD0
CLOCK
IC304
M41T83RMY6F
NC_1
Boost_5V
C332
0.1uF
16V
5
REAL TIME CLOCK(RTC)
Boost_5V
D301
SMAB34
40V
Boost_5V
L300
3.6uH
TOOL1
R333
10K
Boost_5V
EMEA INTERACTIVE
LP63xH-ZA
SUB MICOM
2012.11.05
3
LGE Internal Use Only
CONTROL
IR & LED
+3.5V_ST
R622
10K
1%
R620
10K
1%
L601
BLM18PG121SN1D
KEY1
IR_8PIN
C608
0.1uF
16V
L602
BLM18PG121SN1D
P600
12507WR-08L
IR_10PIN
P601
12507WR-10L
KEY2
C609
0.1uF
16V
1
1
2
2
3
+3.5V_ST
L600
BLM18PG121SN1D
3
4
C602
0.1uF
16V
C603
1000pF
50V
4
R629
1.8K
LED_R/BUZZ
5
5
6
6
7
NEC_IR
7
C606
100pF
50V
+5V_ST
8
ZD600
8
5.48VTO5.76V
9
+3.5V_ST
R607
10K
9
R623
47K
IR_OUT_RS232C
Q603
2SC3052
10
R616
10K
C
B
E
11
R624
47K
C
B
+5V_ST
E
Q608
2SC3052
+3.3V_Normal
R609
10K
IR_OUT_HDMI1
R612
1K
Q604
2SC3052
R600
30K
C
B
E
R617
10K
C
B
R613
1K
R614
100
OPT
C607
18pF
50V
SENSOR_SCL
E
R630
100
Q600
2SC3052
SENSOR_SDA
OPT
C612
18pF
50V
+5V_ST
R610
10K
IR_OUT_HDMI2
Q605
2SC3052
R601
30K
C
B
IR_OUT_CTRL
E
R618
10K
C
B
E
Q601
2SC3052
+5V_ST
R611
10K
IR_OUT_SIDE_HDMI
Q606
2SC3052
R602
30K
C
B
E
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R619
10K
C
B
E
Q602
2SC3052
EMEA INTERACTIVE
LP63xH-ZA
IR/CONTROL
2012.11.05
6
LGE Internal Use Only
A1
A2
5V_HDMI_1 +5V_Normal
HDMI_1
1K
R801
HDMI_1
R855
100
HDMI_CEC
VA805
ESD_HDMI
CEC_REMOTE_S7
10K
R808
C
SHIELD
C
5V_HDMI_1
5V_DET_HDMI_1
5V_HDMI_1
MMBD6100
D821
For CEC
5V_HDMI_1
Q801
MMBT3904(NXP)
R884
R888
2.7K
2.7K
R811
B
DDC_SDA_1
HPD1
10K
E
DDC_SCL_1
20
100
ESD_HDMI_VARISTOR
16
VA806
ESD_HDMI
15
DDC_SCL_1
NON_HDMI1_ARC
14
R841
0
R812
68K
CEC_ON/OFF
HDMI_ARC
+3.5V_ST
5V_HDMI_2 +5V_Normal
IR_OUT_HDMI1
HDMI_CEC
EAG59023302
D851
11
10
D804
RCLAMP0524PA
10
CK-_HDMI1
9
2
9
CK+_HDMI1
D0-
3
8
4
7
8
D0-_HDMI1
5
6
D0+_HDMI1
7
6
5
4
3
2
1
D0_GND
D0+
CEC_REMOTE_NEC
Q805
BSS83
ESD_HDMI_SEMTECH
C804
0.1uF
16V
D1D805
RCLAMP0524PA
1
10
D1+
D1-_HDMI1
2
9
D1+_HDMI1
D2-
3
8
4
7
D2-_HDMI1
5
6
D2+_HDMI1
D1_GND
D2_GND
D2+
MMBD6100
D822
S
B
D
1
CK+
12
R816
68K
R850
10K
13
G
HDMI_1
DDC_SDA_1
ESD_HDMI
VA807 HDMI1_ARC
R840
0
A2
100
R822
R885
R889
2.7K
2.7K
DDC_SDA_2
DDC_SCL_2
ESD_HDMI_SEMTECH
D804-*1
IP4283CZ10-TBA
TMDS_CH1-
VA801
ESD_HDMI_VARISTOR
JK802
TMDS_CH1+
VA804-*1
1uF
10V
ESD_HDMI_CAP
VA801-*1
1uF
10V
ESD_HDMI_CAP
GND_1
TMDS_CH2-
TMDS_CH2+
1
10
2
9
3
8
4
7
5
6
D805-*1
IP4283CZ10-TBA
NC_4 TMDS_CH1-
NC_3 TMDS_CH1+
GND_1
GND_2
NC_2 TMDS_CH2-
NC_1 TMDS_CH2+
10
2
9
3
8
4
7
5
6
NC_4
TMDS_CH1-
NC_3
TMDS_CH1+
GND_2
GND_1
NC_2
TMDS_CH2-
NC_1
TMDS_CH2+
ESD_HDMI_NXP
1
10
2
9
3
8
4
7
5
6
ESD_HDMI_NXP
D807-*1
IP4283CZ10-TBA
NC_4 TMDS_CH1-
NC_3 TMDS_CH1+
GND_2
GND_1
NC_2 TMDS_CH2-
NC_1 TMDS_CH2+
1
10
2
9
3
8
4
7
5
6
D808-*1
IP4283CZ10-TBA
NC_4
TMDS_CH1-
NC_3
TMDS_CH1+
GND_2
NC_2
NC_1
GND_1
TMDS_CH2-
TMDS_CH2+
ESD_HDMI_NXP
1
10
2
9
3
8
4
7
5
6
D809-*1
IP4283CZ10-TBA
NC_4 TMDS_CH1-
NC_3 TMDS_CH1+
GND_1
GND_2
NC_2 TMDS_CH2-
NC_1 TMDS_CH2+
ESD_HDMI_NXP
1
10
2
9
3
8
4
7
5
6
NC_4
NC_3
GND_2
NC_2
NC_1
5V_HDMI_4 +5V_Normal
ESD_HDMI_NXP
A1
ESD_HDMI_NXP
1
D806-*1
IP4283CZ10-TBA
A2
17
R818
A1
VA804
3.3K
R805
R802 1.8K
18
C
19
C
MMBD6100
D824
5V_HDMI_2
R814
1K
R803
1K
5V_HDMI_4
5V_HDMI_2
B
20
R810
10K
HPD2
E
R824
3.3K
R806
VA808
17
R825
VA810
ESD_HDMI
ESD_HDMI_VARISTOR
16
100
100
19
DDC_SCL_2
18
16
4
3
2
1
JK801
100
R829
100
DDC_SDA_4
DDC_SCL_4
VA815
ESD_HDMI
CK-_HDMI2
CK+
2
9
D0-
3
8
4
7
D0-_HDMI2
5
6
D0+_HDMI2
D0_GND
D0+
CK+_HDMI2
EAG62611204
D806
RCLAMP0524PA
1
10
11
10
9
8
7
1
D807
RCLAMP0524PA
10
D1+
2
9
D1+_HDMI2
3
8
4
D2-
4
7
D2-_HDMI2
3
5
6
D2+_HDMI2
2
D2+
6
5
D1-_HDMI2
ESD_HDMI_SEMTECH
1
VA802
ESD_HDMI_VARISTOR
JK803
VA808-*1
1uF
10V
ESD_HDMI_CAP
VA802-*1
1uF
10V
ESD_HDMI_CAP
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
D808
RCLAMP0524PA
1
10
CK+
CK-_HDMI4
2
9
CK+_HDMI4
D0-
3
8
4
7
D0-_HDMI4
5
6
D0+_HDMI4
12
D1-
D2_GND
HDMI_CEC
13
ESD_HDMI_SEMTECH
D1_GND
IR_OUT_SIDE_HDMI
14
HDMI_SIDE
HDMI_2
EAG59023302
6
DDC_SDA_4
15
12
5
R826
IR_OUT_HDMI2
13
7
HPD4
10K
VA814
ESD_HDMI
ESD_HDMI_VARISTOR
HDMI_CEC
8
R823
E
R815 1.8K
VA812
17
15
9
B
2.7K
DDC_SCL_4
DDC_SDA_2
VA811
ESD_HDMI
14
11
10
Q804
MMBT3904(NXP)
R891
2.7K
20
R804 1.8K
18
VA813
ESD_HDMI
BODY_SHIELD
R887
R821
10K
C
R809
10K
C
Q802
VA809
MMBT3904(NXP)
ESD_HDMI
SHIELD
5V_HDMI_4
5V_DET_HDMI_4
3.3K
5V_DET_HDMI_2
R817
5V_HDMI_2
19
5V_HDMI_4
SIDE_HDMI
HDMI_2
D0_GND
D0+
ESD_HDMI_SEMTECH
D1-
1
D809
RCLAMP0524PA
10
D1+
D1-_HDMI4
2
9
D1+_HDMI4
D2-
3
8
4
7
D2-_HDMI4
5
6
D2+_HDMI4
D1_GND
D2_GND
D2+
ESD_HDMI_SEMTECH
VA803
ESD_HDMI_VARISTOR
VA812-*1
1uF
10V
ESD_HDMI_CAP
VA803-*1
1uF
10V
ESD_HDMI_CAP
EMEA INTERACTIVE
LP63xH-ZA
HDMI
2012.11.05
8
LGE Internal Use Only
A11
A-MA0
A6
A7
B2
D9
G7
K2
K8
N1
N9
R1
R9
A8
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
VDD_6
VDD_7
NC_5
VDD_8
VDD_9
BA0
BA1
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A-MA14
BA2
VDDQ_1
VDDQ_2
CK
VDDQ_3
CK
VDDQ_4
CKE
VDDQ_5
VDDQ_6
CS
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
WE
NC_1
NC_2
RESET
NC_6
DQSL
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS_1
DQSU
VSS_2
DQSU
VSS_3
VSS_4
DML
VSS_5
DMU
VSS_6
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
DQL5
DQL6
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQL7
VSSQ_1
VSSQ_2
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
EAN61836301
EAN61836301
DDR_1G_1600_SS
DDR_1G_1600_SS
IC1201-*2
K4B1G1646G-BCK0
IC1202-*2
K4B1G1646G-BCK0
A_DDR3_A[3]
B_DDR3_A[3]
A_DDR3_A[4]
B_DDR3_A[4]
A_DDR3_A[5]
B_DDR3_A[5]
A_DDR3_A[6]
B_DDR3_A[6]
A_DDR3_A[7]
B_DDR3_A[7]
B_DDR3_A[8]
A_DDR3_A[8]
B_DDR3_A[9]
A_DDR3_A[9]
A_DDR3_A[10]
B_DDR3_A[10]
A_DDR3_A[11]
B_DDR3_A[11]
A_DDR3_A[12]
B_DDR3_A[12]
A_DDR3_A[13]
B_DDR3_A[13]
A_DDR3_A[14]
B_DDR3_A[14]
M7
F13
A-MBA0
B15
A-MBA1
M2
A-MBA0
N8
A-MBA1
M3
A-MBA2
J7
K7
K9
A-MCK
C1209
A-MCASB
A-MWEB
T2
E14
A-MODT
B12
A-MRASB
A12
A-MCASB
A-MRASB
C12
A-MWEB
+1.5V_DDR
R1231
10K
F11
A-MRESETB
A-MRESETB
F3
B19
A-MDQSL
A-MDQSL
G3
C18
A3
D16
A-MDQU6
C20
A-MDQU7
A-MDQU5
B8
A20
A-MDQU5
A-MDQU4
A2
E16
A-MDQU4
A-MDQU3
A7
C21
A-MDQU3
A-MDQU2
C2
F16
A-MDQU2
A-MDQU1
C8
B20
A-MDQU1
A-MDQU0
C3
G16
A-MDQU0
A-MDQL7
D7
D15
A-MDQL7
A-MDQL6
H7
A22
A-MDQL6
A-MDQL5
G2
F14
A-MDQL5
A-MDQL4
H8
B22
A-MDQL4
A-MDQL3
H3
F15
A-MDQL3
A-MDQL2
F8
B21
A-MDQL2
A-MDQL1
F2
G15
A-MDQL1
A-MDQL0
F7
D17
A-MDQL0
A-MDMU
E3
A21
A-MDMU
A-MDML
D3
E15
A-MDML
A-MDQSUB
E7
A18
A-MDQSUB
A-MDQSU
B7
B18
A-MDQSU
A-MDQSLB
C7
B_DDR3_BA[0]
A_DDR3_BA[1]
B_DDR3_BA[1]
A_DDR3_BA[2]
B_DDR3_BA[2]
B_DDR3_MCLK
A_DDR3_MCLK
A_DDR3_MCLKZ
B_DDR3_MCLKZ
A_DDR3_MCLKE
B_DDR3_MCLKE
B_DDR3_ODT
A_DDR3_ODT
A_DDR3_RASZ
B_DDR3_RASZ
A_DDR3_CASZ
B_DDR3_CASZ
B_DDR3_WEZ
A_DDR3_WEZ
B_DDR3_RESET
A_DDR3_RESET
B_DDR3_DQSL
A_DDR3_DQSL
B_DDR3_DQSLB
A_DDR3_DQSLB
B_DDR3_DQSU
A_DDR3_DQSU
B_DDR3_DQSUB
A_DDR3_DQSUB
A_DDR3_DQML
B_DDR3_DQML
A_DDR3_DQMU
B_DDR3_DQMU
A_DDR3_DQL[0]
B_DDR3_DQL[0]
A_DDR3_DQL[1]
B_DDR3_DQL[1]
A_DDR3_DQL[2]
B_DDR3_DQL[2]
A_DDR3_DQL[3]
B_DDR3_DQL[3]
A_DDR3_DQL[4]
B_DDR3_DQL[4]
A_DDR3_DQL[5]
B_DDR3_DQL[5]
A_DDR3_DQL[6]
B_DDR3_DQL[6]
A_DDR3_DQL[7]
B_DDR3_DQL[7]
A_DDR3_DQU[0]
B_DDR3_DQU[0]
A_DDR3_DQU[1]
B_DDR3_DQU[1]
A_DDR3_DQU[2]
B_DDR3_DQU[2]
A_DDR3_DQU[3]
B_DDR3_DQU[3]
A_DDR3_DQU[4]
B_DDR3_DQU[4]
A_DDR3_DQU[5]
B_DDR3_DQU[5]
A_DDR3_DQU[6]
B_DDR3_DQU[6]
A_DDR3_DQU[7]
B_DDR3_DQU[7]
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2
A0
VREFCA
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
N3
H1
N2
P7
P3
A2
A3
VREFDQ
P8
A4
P2
A5
A6
ZQ
L8
T8
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
NC_5
VDD_7
VDD_8
BA0
VDD_9
B2
L7
R7
K2
N7
K8
T3
N1
N9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R9
DQSU
NC_6
VSS_1
VSS_2
VSS_3
DML
DMU
VSS_4
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
M2
N8
A1
A8
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
A9
B3
C7
B7
E1
G8
E7
J2
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
H7
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
VREFDQ
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
N3
H1
N2
P7
P8
A4
P2
A5
A6
ZQ
L8
T8
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
NC_5
VDD_7
VDD_8
BA0
VDD_9
B2
L7
R7
K2
N7
K8
T3
N1
N9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R9
DQSU
NC_6
VSS_1
VSS_2
VSS_3
DML
DMU
VSS_4
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
M2
N8
A1
A8
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
EAN61829201
DDR_2G_1600_HYNIX
EAN61848801
EAN61848801
DDR_2G_1600_SS
DDR_2G_1600_SS
IC1201-*1
K4B2G1646C-HCK0
IC1202-*1
K4B2G1646C-HCK0
IC1202-*3
H5TQ2G63BFR-PBC
B3
C7
B7
E1
G8
E7
J2
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
DQL6
H7
DQL7
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
N3
H1
N2
P7
P3
A2
A3
VREFDQ
P8
A4
P2
A5
A6
ZQ
L8
T8
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
A15
VDD_7
VDD_8
BA0
VDD_9
B2
L7
R7
K2
N7
K8
T3
N1
N9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R9
DQSU
NC_6
VSS_1
VSS_2
VSS_3
DML
DMU
VSS_4
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
A1
A8
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
A9
B3
C7
B7
E1
G8
E7
J2
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
H7
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
N3
H1
N2
P7
A1
P3
A2
A3
VREFDQ
P8
A4
P2
A5
A6
ZQ
L8
T8
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
A15
VDD_7
VDD_8
BA0
VDD_9
B2
L7
R7
K2
N7
K8
T3
N1
N9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R9
DQSU
NC_6
VSS_1
VSS_2
VSS_3
DML
DMU
VSS_4
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
M2
N8
A1
A8
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
A9
B3
C7
B7
E1
G8
E7
J2
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
H7
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
N3
H1
N2
P7
A1
P3
A2
A3
VREFDQ
P8
A4
P2
A5
A6
ZQ
L8
T8
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
NC_5
VDD_7
VDD_8
BA0
VDD_9
B2
L7
R7
K2
N7
K8
T3
N1
N9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R9
DQSU
NC_6
VSS_1
VSS_2
VSS_3
DML
DMU
VSS_4
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
M2
N8
A1
A8
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
A9
B3
C7
B7
E1
G8
E7
J2
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
H7
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
EAN61829003
G20
N7
B-MA12
T3
M7
B-MBA0
F24
B-MBA1
F20
B-MBA2
B-MCK
G23
B-MCKB
F25
C1240
B-MCKE
D20
B-MODT
B25
B24
A24
B-MBA2
VREFDQ
H1
R8
ZQ
L8
R3
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
VDD_5
VDD_6
NC_5
VDD_7
VDD_8
BA0
R2
T8
A7
A13
P8
P2
A4
A5
A6
P7
N2
A2
A3
VDD_9
B2
L7
D9
R7
G7
N7
K2
T3
J21
B-MCASB
K1
B-MODT
+1.5V_DDR
N1
M7
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
RESET
NC_2
NC_4
DQSL
NC_6
R9
M2
N8
M3
A1
DQSU
K7
C1
K9
D2
L2
E9
K1
F1
J3
H2
K3
H9
L3
J1
DMU
VSS_1
VSS_2
VSS_4
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
T2
VSS_12
F3
A9
B7
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
E7
G8
D3
J8
E3
F7
M9
F2
P1
F8
P9
H3
T1
H8
T9
G2
H7
B1
D7
B9
C3
D1
C8
D8
C2
E2
A7
E8
A2
F9
B8
G1
A3
L8
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
RESET
DQSL
D9
NC_2
NC_6
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
L7
G7
R7
N7
K8
T3
N1
N9
M7
R1
R9
M2
N8
A1
A8
DQL5
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
T7
F3
G3
A9
C7
B3
B7
E1
G8
J2
E7
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
VSSQ_1
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
J20
H24
B-MDQL2
J23
H8
G2
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
N3
H1
N2
P7
P8
P2
A6
ZQ
L8
T8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
NC_7
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
B2
D9
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R7
N7
K8
T3
N1
N9
NC_6
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
R9
M2
N8
A1
A8
DQL5
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
EAN61859501
T7
F3
A9
C7
B3
B7
E1
J2
E7
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
H7
DQL7
VSSQ_1
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
N3
H1
N2
P7
P3
P8
P2
A6
ZQ
L8
T8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12
VDD_4
NC_6
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
B2
D9
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R7
N7
K8
T3
N1
N9
NC_7
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
R9
M2
N8
A1
A8
DQL5
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
T7
F3
G3
A9
C7
B3
B7
E1
G8
E7
J2
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
VSSQ_1
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
H8
G2
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
N3
H1
N2
P7
P3
A2
A3
VREFDQ
P8
A4
P2
A5
A6
ZQ
L8
T8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12
VDD_4
NC_6
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
B2
D9
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
R7
N7
K8
T3
N1
N9
NC_7
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
R9
M2
N8
A1
A8
DQL5
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
R1227
1K 1%
1K
1%
0.1uF
C1250
1000pF
C1249
R1228
R1224
1K 1%
1%
1K
R1225
0.1uF
C1248
1000pF
10uF
C1246
0.1uF
C1245
0.1uF
C1244
0.1uF
C1243
A2
H1
VREFDQ
A3
A5
ZQ
A6
T7
F3
G3
A9
C7
B3
B7
E1
G8
E7
J2
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
VSSQ_1
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
H8
G2
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
N3
H1
N2
P7
P3
VREFDQ
P8
A4
P2
A5
A6
ZQ
L8
T8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
B2
D9
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R7
N7
K8
T3
N1
N9
NC_6
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
R9
M2
N8
A1
A8
DQL5
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
VDD_7
NC_5
VDD_8
VDD_9
BA0
BA2
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
T7
F3
A9
C7
B3
B7
E1
G8
J2
E7
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
H7
DQL7
VSSQ_1
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
+1.5V_DDR
H2
H9
NC_6
VSS_1
DQSU
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
J1
J9
L1
L9
T7
B-MA14
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL7
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B1
B9
D1
D8
E2
E8
F9
G1
G9
EAN61848802
EAN61848802
DDR_2G_1600_SS_NEW
VREFCA
M8
N3
H1
N2
P7
P8
P2
ZQ
L8
R8
R2
T8
VDD_1
VDD_2
A11
VDD_3
VDD_4
A13
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
B2
D9
R3
L7
G7
R7
K2
N7
K8
T3
N1
N9
M7
R1
R9
M2
N8
BA1
M3
BA2
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
NC_6
A1
A8
DQSU
VSS_1
VSS_2
DML
VSS_4
VSS_3
VSS_5
VSS_6
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
T7
F3
A9
C7
B3
B7
E1
G8
J2
E7
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
H7
VSSQ_1
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
N3
H1
N2
P7
P3
A2
A3
VREFDQ
P8
A4
P2
A5
A6
ZQ
L8
T8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
B2
D9
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
NC_2
NC_4
DQSL
R7
N7
K8
T3
N1
N9
NC_6
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
R9
M2
N8
A1
A8
DQL5
VSS_12
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
J1
J9
T2
L1
T7
F3
G3
A9
C7
B3
B7
E1
G8
J2
E7
D3
J8
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
VSSQ_1
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VREFCA
A2
A3
VREFDQ
H8
G2
B1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
M8
H1
A4
A5
A6
ZQ
L8
A7
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
B2
D9
G7
K2
K8
N1
N9
R1
R9
BA1
BA2
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
RESET
NC_2
NC_3
H7
DQL7
A0
A1
L9
DQL6
DQU0
M7
R1
DQSL
DMU
L7
G7
M3
VDDQ_1
RESET
R3
K2
BA1
BA2
CKE
R8
R2
A7
A8
NC_3
G3
DQL6
DQL7
A0
IC1202-*7
K4B2G1646E-BCK0
A1
L9
DQSL
DQSU
DDR_2G_1600_SS_NEW
IC1201-*7
K4B2G1646E-BCK0
P3
VREFDQ
A12/BC
DQU0
R9
F1
DQSU
A9
DQL0
R1
DQSL
A10/AP
DMU
N9
E9
NC_4
A7
DQSL
N1
D2
NC_2
DQSL
NC_3
G3
K8
C9
NC_1
RESET
A8
RESET
K2
C1
WE
A4
CKE
G7
A8
VDDQ_5
CS
A5
A6
D9
A1
VDDQ_1
CK
A2
A3
B2
BA1
A1
L9
DQL6
DQU0
M7
R1
DQSL
DMU
L7
G7
M3
VDDQ_1
RESET
R3
K2
BA1
BA2
CKE
R8
R2
A7
A8
A0
L8
240
1%
A8
EAN61829203
A2
A3
R1226
A7
DDR_2G_1600_HYNIX_NEW
NC_3
H7
DQL7
A0
B-MVREFDQ
A4
IC1202-*6
H5TQ2G63DFR-PBC
A1
L9
DQL6
DQU0
M7
R1
DQSL
DMU
L7
G7
M3
VDDQ_1
DQSL
R3
K2
BA1
BA2
RESET
R8
R2
A7
A8
CKE
A3
DDR_2G_1600_HYNIX_NEW
NC_3
H7
DQL7
A0
B8
IC1201-*6
H5TQ2G63DFR-PBC
A1
L9
DQL6
DQU0
M7
R1
DQSL
DMU
L7
G7
M3
VDDQ_1
RESET
R3
K2
BA1
BA2
CKE
R8
R2
A7
A8
NC_3
G3
G8
VREFCA
VREFDQ
A4
A5
A2
EAN61829203
DDR_1600_NANYA_NEW
A2
A3
L9
DQL6
DQU0
M7
R1
DQSL
DMU
L7
G7
M3
VDDQ_1
RESET
R3
K2
BA1
BA2
CKE
R8
R2
A7
A8
A0
A7
B-MDQU5
IC1202-*5
NT5CB64M16DP-DH
A1
C2
B-MDQU4
B-MDQU7
M8
C8
B-MDQU3
B-MDQU6
K21
C3
B-MDQU2
B-MDQU5
H21
D7
B-MDQU1
B-MDQU4
L21
H7
B-MDQU0
B-MDQU3
H20
G2
B-MDQL7
B-MDQU2
K20
H8
B-MDQL6
B-MDQU1
H22
H3
B-MDQL5
B-MDQU0
L22
F8
B-MDQL4
B-MDQL7
G21
F2
B-MDQL3
B-MDQL6
K23
F7
B-MDQL2
B-MDQL5
M23
E3
B-MDQL1
B-MDQL4
H23
D3
B-MDQL0
B-MDQL3
M24
E7
B-MDMU
B-MDQL1
L24
B7
B-MDML
B-MDQL0
J24
C7
B-MDQSU
B-MDQSUB
B-MDMU
L23
G3
B-MDQSLB
B-MDML
L20
F3
B-MDQSL
B-MDQSUB
P3
VREFDQ
A4
A5
T2
B-MVREFCA
A1
NC_3
EAN61859501
A2
A3
L3
B-MRESETB
DDR_1600_NANYA_NEW
NC_3
H7
DQL7
A0
K3
B-MWEB
R1232
10K
IC1201-*5
NT5CB64M16DP-DH
A1
L9
DQL6
DQU0
R3
K2
DQSL
DMU
R8
R2
B2
M3
VDDQ_1
J2
M1
P8
BA1
BA2
B3
E1
P7
T8
NC_3
DQL6
DQL7
ZQ
NC_4
G3
N2
A7
J9
L9
N3
H1
P2
L1
T7
M8
P3
A8
C9
C7
VSS_3
DML
J7
A8
DQSL
DQSU
A6
N9
R1
VREFCA
VREFDQ
A4
A5
J3
B-MRASB
B-MCASB
B-MDQSU
EAN61829003
A2
A3
K8
BA1
BA2
A0
K9
M8
VREFCA
A0
B-MDQSLB
IC1202-*4
H5TQ1G63EFR-PBC
A1
J7
K7
L2
B-MDQSL
K25
M3
B-MCKE
B-MCKB
B-MRESETB
K24
N8
B-MBA1
B-MRASB
B-MWEB
E20
M2
B-MBA0
B-MCK
G25
DDR_1600_HYNIX_NEW
IC1201-*4
H5TQ1G63EFR-PBC
P3
A1
NC_3
F3
G3
DQL6
DQL7
A0
L9
T7
DQSL
DQSU
M7
R1
M3
VDDQ_1
RESET
R3
D9
G7
BA1
BA2
CK
R8
R2
A7
NC_3
F3
G3
DQL6
DQL7
A0
L9
T7
DQSL
DQSU
M7
R1
M3
VDDQ_1
RESET
R3
D9
G7
BA1
BA2
CK
R8
R2
A7
NC_3
F3
G3
DQL6
DQL7
A0
L9
T7
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
M2
N8
DQSL
DQSU
M7
R1
M3
VDDQ_1
RESET
R3
D9
G7
BA1
BA2
CK
R8
R2
A7
NC_3
F3
G3
A9
VREFCA
A1
L9
T7
DQSL
DQSU
M7
R1
M3
VDDQ_1
RESET
R3
D9
G7
BA1
BA2
CK
R8
R2
A7
A0
R7
B-MA11
B-MA14
B-MDQU7
EAN61829201
M8
L7
B-MA10
B-MA13
D23
R3
B-MA9
B-MA12
E21
T8
B-MA8
B-MA11
F23
R2
B-MA7
B-MA10
C25
R8
B-MA6
B-MA9
C24
P2
B-MA5
B-MA8
D21
P8
B-MA4
B-MA7
D24
N2
B-MA3
B-MA6
D22
P3
B-MA2
B-MA5
E23
P7
B-MA1
B-MA4
F21
N3
B-MA0
B-MA3
E24
A-MDQU7
DDR_2G_1600_HYNIX
P3
A2
A3
DDR_1333_HYNIX
B-MA2
G22
B-MDQU6
IC1201-*3
H5TQ2G63BFR-PBC
A1
NC_3
F3
G3
DQL6
DQL7
A0
L9
T7
DQSL
DQSU
M7
R1
M3
VDDQ_1
RESET
R3
D9
G7
BA1
BA2
CK
R8
R2
A7
NC_3
F3
M8
A1
B-MA1
F22
A-MDQU6
N3
P7
P3
N2
B-MA0
D25
0.01uF
50V
A-MODT
L3
B16
A-MCKE
A-MCKB
K3
A17
A-MCKB
0.01uF
50V
L2
J3
C17
A-MCK
A-MCKE
K1
E13
A-MBA2
A_DDR3_BA[0]
DDR_1600_HYNIX_NEW
N3
B23
B-MA13
A-MDQSLB
NC_4
B_DDR3_A[2]
A-MA13
NC_3
DQSL
A9
B13
A-MA14
A-MA12
T3
E11
A-MA13
A-MA11
N7
A15
A-MA12
A-MA10
R7
C13
A-MA11
A-MA9
L7
C16
A-MA10
A-MA8
R3
D12
A-MA9
A-MA7
T8
B14
A-MA8
A-MA6
R2
D11
A-MA7
A-MA5
R8
A14
A-MA6
A-MA4
P2
B_DDR3_A[1]
A_DDR3_A[2]
56
R1237
ZQ
240
1%
A-MA3
P8
B_DDR3_A[0]
A_DDR3_A[1]
56
R1238
L8
A5
A_DDR3_A[0]
IC1202
H5TQ1G63DFR-H9C
1%
A4
E12
A-MA5
CLose to DDR3
EAN61828901
S7LR_DIVX_MS10
1%
A3
A-MA2
N2
C15
A-MA4
1%
VREFDQ
P3
F12
A-MA3
A-MA1
R1235
56
A2
A-MA0
P7
B11
A-MA2
1%
A0
N3
R1236
56
VREFCA
H1
C14
A-MA1
A1
+1.5V_DDR
0.1uF
IC101
LGE2112-T8
DDR_1333_HYNIX
R1203
C1242
0.1uF
C1241
0.1uF
C1239
0.1uF
C1238
0.1uF
C1237
C1235
0.1uF
C1236
0.1uF
C1234
0.1uF
0.1uF
C1233
0.1uF
C1232
0.1uF
C1231
0.1uF
C1230
0.1uF
C1229
0.1uF
C1228
0.1uF
C1227
0.1uF
0.1uF
C1224
0.1uF
C1223
0.1uF
C1222
0.1uF
C1221
0.1uF
C1220
0.1uF
C1219
0.1uF
C1218
0.1uF
C1217
0.1uF
C1216
0.1uF
C1215
0.1uF
C1214
0.1uF
C1213
0.1uF
C1212
0.1uF
C1211
0.1uF
C1210
0.1uF
C1208
0.1uF
C1207
C1206
10uF
C1205
CLose to Saturn7M IC
IC1201
H5TQ1G63DFR-H9C
M8
B-MVREFDQ
Close to DDR Power Pin
CLose to Saturn7M IC
EAN61828901
A-MVREFDQ
+1.5V_DDR
B-MVREFCA
Close to DDR Power Pin
A-MVREFCA
+1.5V_DDR
DDR3 1.5V By CAP - Place these Caps near Memory
C1247
DDR3 1.5V By CAP - Place these Caps near Memory
+1.5V_DDR
A-MVREFCA
1000pF
0.1uF
C1204
1%
R1205
1K
C1203
1000pF
0.1uF
C1202
C1201
+1.5V_DDR
A-MVREFDQ
CLose to DDR3
+1.5V_DDR
+1.5V_DDR
1K 1%
R1204
+1.5V_DDR
1K 1%
1%
R1202
1K
R1201
+1.5V_DDR
NC_4
DQSL
NC_6
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
DQSL
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL7
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B1
B9
D1
D8
E2
E8
F9
G1
G9
G9
EMEA INTERACTIVE
LP63xH-ZA
DDR
2012.11.05
12
LGE Internal Use Only
IC102
NAND01GW3B2CN6E
<CHIP Config1)>
Boot from SPI CS1N(EXT_FLASH)
Boot from SPI_CS0N(INT_FLASH)
+3.3V_Normal
/PF_OE
E
/PF_CE0
NC_7
NC_8
C101
0.1uF
VDD_1
VSS_1
NC_9
NC_10
CL
/PF_CE1
AL
PF_ALE
W
/PF_WE
WP
/PF_WP
R106
1K
NC_11
NC_12
NC_13
R102
3.3K
NC_14
NC_15
6
43
7
42
8
41
40
9
39
10
11
38
12
37
13
36
14
35
34
15
33
16
32
17
18
31
19
30
20
29
21
28
22
27
23
26
24
25
NC_26
PCM_A[6]
I/O6
B51_no_EJ
SB51_WOS
SB51_WS
MIPS_SPE_NO_EJ
MIPS_SPI_EJ_1
MIPS_SPI_EJ_2
MIPS_WOS
MIPS_WS
PCM_A[5]
I/O5
PCM_A[4]
I/O4
NC_25
NC_24
NC_23
VDD_2
VSS_2
CAP_10uF_X7R
C102
10uF 10V
CAP_10uF_X5R
C102-*1
10uF
10V
C103
85C
0.1uF
: 4’b0000 Boot from 8051 with SPI flash
: 4’b0001 Secure B51 without scramble
: 4’b0010 Secure B51 with scramble
: 4’b0100 Boot from MIPS with SPI flash
: 4’b0101 Boot from MIPS with SPI flash
: 4’b0110 Boot from MIPS with SPI flash
: 4’b1001 Secure MIPS without scramble
: 4’b1010 Scerur MIPS with SCRAMBLE
NC_21
NC_20
AUD_MASTER_CLK
AR102
R148
56
PCM_A[3]
PCM_A[2]
I/O2
AA18
AE20
PCM_D[4]
PCM_D[5]
AA15
PCM_D[6]
AB21
PCM_D[7]
Y15
PCM_A[0]
W20
PCM_A[1]
V20
PCM_A[2]
W22
PCM_A[3]
AB18
PCM_A[4]
AA20
PCM_A[5]
AA21
PCM_A[6]
Y19
PCM_A[7]
AB17
Y16
AB19
PCM_A[10]
AB20
PCM_A[11]
AA16
AUD_SCK
PCM_A[12]
AA19
AUD_MASTER_CLK_0
PCM_A[13]
AC21
PCM_A[14]
AA17
PWM2
Y20
/PCM_REG
22
NC_18
AB15
/PCM_OE
NC_16
AA22
/PCM_WE
/PCM_IORD
+5V_Normal
NC_17
AD22
AD20
/PCM_IOWR
R132
10K
AD21
/PCM_CE
/PCM_IRQA
AC20
Y18
/PCM_CD
Y21
/PCM_WAIT
Y22
PCM_RST
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
1
2
3
NAND_FLASH_1G_SS
48
47
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
14
15
16
17
18
19
20
21
22
23
24
NAND_FLASH_1G_TOSHIBA
EAN61857001
IC102-*2
K9F1G08U0D-SCB0
36
35
34
33
32
31
30
29
28
27
26
25
NC_29
NC_1
NC_28
NC_2
NC_27
NC_3
NC_26
NC_4
I/O7
I/O6
NC_6
I/O5
R/B
I/O4
RE
NC_25
CE
NC_24
NC_7
NC_23
NC_8
VCC_2
VCC_1
VSS_2
VSS_1
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
48
2
47
46
3
NC_5
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
36
13
NC_9
35
14
NC_10
34
15
CLE
33
16
ALE
32
17
WE
18
WP
31
19
NC_11
30
20
NC_12
29
28
21
NC_13
27
22
NC_14
26
23
NC_15
NAND_FLASH_2G_HYNIX
USB1_OCD
EAN60708701
IC102-*4
HY27UF082G2B-TPCB
USB1_CTL
EAN61508001
IC102-*3
TC58NVG0S3ETA0BBBH
1
24
25
NC_29
NC_1
NC_28
NC_2
NC_27
NC_3
NC_26
NC_4
I/O7
NC_5
I/O6
NC_6
I/O5
RY/BY
I/O4
RE
NC_25
CE
NC_24
NC_7
NC_23
NC_8
VCC_2
VCC_1
VSS_2
VSS_1
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
1
2
3
48
47
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
14
15
16
17
18
19
20
21
22
23
24
36
35
34
33
32
31
30
29
28
27
26
25
NC_29
NC_1
NC_28
NC_2
NC_27
NC_3
NC_26
NC_4
I/O8
NC_5
I/O7
NC_6
I/O6
R/B
I/O5
RE
NC_25
CE
NC_24
NC_7
NC_23
NC_8
VCC_2
VCC_1
VSS_2
VSS_1
NC_22
NC_21
NC_20
I/O4
I/O3
I/O2
I/O1
NC_19
NC_18
NC_17
NC_16
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
AE21
PCM_A[9]
R133
10K
NAND_FLASH_1G_HYNIX
EAN35669102
IC102-*1
H27U1G8F2BTR-BC
AB22
PCM_D[3]
PWM0
PCM_A[0]
I/O0
NC_19
W21
PCM_D[1]
PCM_A[8]
PWM1
PCM_A[1]
I/O1
PCM_A[0-14]
+3.3V_Normal
NC_22
I/O3
PCM_D[0]
PCM_D[2]
<CHIP Config>
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
PCM_A[7]
I/O7
R165
1K
R
44
R124
RB
/F_RB
45
5
S7LR_DIVX_MS10
22
AR101
1K
NC_6
4
PCM_D[0-7]
PCM_A[0-7]
NC_27
R117
OPT 1K
NC_5
IC101
LGE2112-T8
1’b0
1’b1
NC_28
R115
OPT 1K
R109
3.9K
46
47
R118
NC_4
R107
1K
3
NC_29
1K
NC_3
48
R125
OPT 1K
NC_2
1
NAND_FLASH_1G_NUMONYX
EAN60762401
2
R126
1K OPT
NC_1
1K
+3.3V_Normal
R116
NAND FLASH MEMORY
1
47
46
3
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
36
13
35
14
34
15
33
16
32
17
18
31
19
30
20
29
28
21
27
22
26
23
24
V21
R20
T20
25
U22
NC_29
D4
MST_NEC_TX
NC_28
E4
MST_NEC_RX
NC_27
MST_TX
NC_26
MST_RX
MODEL_OPT_6
N25
N24
B8
A8
MODEL_OPT_7
I/O7
S7LR2_UO4_Divx/MS10
IC101-*2
LGE2111A-T8
I/O6
S7LR2_UO4_Divx/MS10/RM/AVS
IC101-*3
for
LGE2111A-VD
SYSTEM/HDCP
EEPROM&URSA3
I/O5
C7
I/O4
E6
F5
NC_25
B6
NC_24
D5
E5
B7
NC_23
E7
VCC_2
AB5
F7
AB3
A9
VSS_2
F4
AB1
NC_22
N6
AB2
NC_21
AC2
GPIO36
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50
GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N
NC_20
LVB3P
LVB3N
LVB4P
I/O3
LVB4N
I/O2
LVACKP
LVACKN
I/O1
LVBCKP
LVBCKN
I/O0
GPIO196
NC_19
GPIO193
GPIO194
NC_18
GPIO195
AB25
C7
AB23
E6
AC25
F5
AB24
B6
AD25
E5
AC24
D5
AE23
B7
AC23
E7
AC22
F7
AD23
AB5
AB3
V23
A9
U24
F4
V25
AB1
V24
N6
W25
AB2
W23
AC2
AA23
GPIO36
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50
GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N
LVB3P
Y24
LVB3N
AA25
LVB4P
AA24
LVB4N
AE24
LVACKP
AD24
LVACKN
Y23
LVBCKP
W24
LVBCKN
T25
GPIO196
U23
GPIO193
T24
GPIO194
T23
GPIO195
P23
I2C_SCL
P24
I2C_SDA
AB25
AB23
RGB_DDC_SDA
AC25
RGB_DDC_SCL
AB24
PCMDATA[1]/GPIO127
PCMDATA[2]/GPIO128
PCMDATA[3]/GPIO120
PCMDATA[4]/GPIO119
PCMDATA[5]/GPIO118
PCMDATA[6]/GPIO117
NF_CE1Z/GPIO138
PCMDATA[7]/GPIO116
NF_WPZ/GPIO198
NF_CEZ/GPIO137
PCMADR[0]/GPIO125
NF_CLE/GPIO136
PCMADR[1]/GPIO124
NF_REZ/GPIO139
PCMADR[2]/GPIO122
NF_WEZ/GPIO140
PCMADR[3]/GPIO121
NF_ALE/GPIO141
PCMADR[4]/GPIO99
NF_RBZ/GPIO142
D2
D1
N23
PWM1
AC22
AD23
P22
PWM2
R21
EXT_SPK_DET
V23
P20
U24
R119
V25
/PF_CE0
AC18
/PF_CE1
AC19
/PF_OE
AD17
/PF_WE
AE17
PF_ALE
AD19
/F_RB
PCMADR[7]/GPIO103
PCMADR[8]/GPIO108
GPIO_PM[0]/GPIO6
PCMADR[9]/GPIO110
PM_UART_TX/GPIO_PM[1]/GPIO7
PCMADR[10]/GPIO114
GPIO_PM[2]/GPIO8
PCMADR[11]/GPIO112
PCMADR[12]/GPIO104
GPIO_PM[3]/GPIO9
PCMADR[13]/GPIO107
GPIO_PM[4]/GPIO10
PM_UART_RX/GPIO_PM[5]/GPIO11
PCMADR[14]/GPIO106
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
GPIO_PM[7]/GPIO13
PCMREG_N/GPIO123
GPIO_PM[8]/GPIO14
GPIO_PM[9]/GPIO15
PCMOE_N/GPIO113
PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
PCMWE_N/GPIO197
GPIO_PM[11]/GPIO17
PCMIORD_N/GPIO111
PCMIOWR_N/GPIO109
PM_SPI_SCK/GPIO1
PM_SPI_CZ0/GPIO_PM[12]/GPIO0
PCMCE_N/GPIO115
PM_SPI_SDI/GPIO2
PCMIRQA_N/GPIO105
PM_SPI_SDO/GPIO3
PCMCD_N/GPIO130
H5
K6
K5
J6
K4
L6
C2
L5
/FLASH_WP
M6
SIDE_HP_MUTE(GP4)
M5
PANEL_CTL(GP4)
C1
PM_MODEL_OPT_0
M4
AMP_MUTE(GP4)
A2
SPI_SCK
D3
/SPI_CS
B2
SPI_SDI
B1
SPI_SDO
for SERIAL FLASH
PCMWAIT_N/GPIO100
PCM_RESET/GPIO129
TS0CLK/GPIO87
TS0VALID/GPIO85
PCM2_CE_N/GPIO131
TS0SYNC/GPIO86
PCM2_IRQA_N/GPIO132
PCM2_CD_N/GPIO135
PCM2_WAIT_N/GPIO133
TS0DATA_[0]/GPIO77
PCM2_RESET/GPIO134
TS0DATA_[1]/GPIO78
TS0DATA_[2]/GPIO79
UART1_TX/GPIO43
TS0DATA_[3]/GPIO80
UART1_RX/GPIO44
TS0DATA_[4]/GPIO81
UART2_TX/GPIO65
TS0DATA_[5]/GPIO82
UART2_RX/GPIO64
TS0DATA_[6]/GPIO83
UART3_TX/GPIO47
TS0DATA_[7]/GPIO84
UART3_RX/GPIO48
TS1CLK/GPIO98
I2C_SCKM2/DDCR_CK/GPIO72
I2C_SDAM2/DDCR_DA/GPIO71
TS1VALID/GPI96
TS1SYNC/GPIO97
DDCA_DA/UART0_TX
TS1DATA_[0]/GPIO88
DDCA_CK/UART0_RX
TS1DATA_[1]/GPIO89
TS1DATA_[2]/GPIO90
P21
PWM0
/PF_WP
AD18
PCMADR[6]/GPIO102
AC24
AC23
AC17
PCMADR[5]/GPIO101
AD25
AE23
AE18
CI_TS_CLK
U21
PCM_5V_CTL
48
2
C109
0.1uF
PCMDATA[0]/GPIO126
1K
F6
V24
TS1DATA_[3]/GPIO91
PWM0/GPIO66
TS1DATA_[4]/GPIO92
PWM1/GPIO67
TS1DATA_[5]/GPIO93
PWM2/GPIO68
TS1DATA_[6]/GPIO94
PWM3/GPIO69
TS1DATA_[7]/GPIO95
Y14
CI_TS_VAL
AA10
CI_TS_SYNC
Y12
CI_TS_DATA[0-7]
Y13
CI_TS_DATA[0]
Y11
CI_TS_DATA[1]
AA12
CI_TS_DATA[2]
AB12
CI_TS_DATA[3]
AA14
CI_TS_DATA[4]
AB14
CI_TS_DATA[5]
AA13
CI_TS_DATA[6]
AB11
CI_TS_DATA[7]
from CI SLOT
FE_TS_CLK
AC15
FE_TS_VAL_ERR
AD15
FE_TS_SYNC
FE_TS_DATA[0-7]
AC16
AD16
FE_TS_DATA[0]
AE15
FE_TS_DATA[1]
AE14
FE_TS_DATA[2]
AC13
FE_TS_DATA[3]
AC14
FE_TS_DATA[4]
AD12
FE_TS_DATA[5]
AD13
FE_TS_DATA[6]
AD14
FE_TS_DATA[7]
Internal demod out
S7LR_DIVX
IC101-*1
LGE2111-TE
C7
E6
F5
B6
PWM4/GPIO70
E5
PWM_PM/GPIO199
D5
GPIO199 --> 1K pull-down
W25
B7
E7
W23
AA23
H6
USB2_OCD
Y24
AA25
G5
USB2_CTL
AA24
G4
EXT_VOL+
AE24
J5
EXT_VOL-
AD24
J4
SCART1_MUTE(GP4)
Y23
F7
AB5
SAR0/GPIO31
AB3
SAR1/GPIO32
A9
SAR2/GPIO33
F4
AB1
SAR3/GPIO34
N6
SAR4/GPIO35
AB2
AC2
W24
GPIO36
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50
GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N
LVB3P
T25
R23
U23
LVB3N
VSYNC_LIKE/GPIO145
LVB4P
T24
T23
R24
R25
NC_17
T21
SENSOR_SCL
NC_16
T22
SENSOR_SDA
LVB4N
SPI1_CK/GPIO201
LVACKP
SPI1_DI/GPIO202
LVACKN
LVBCKP
SPI2_CK/GPIO203
LVBCKN
SPI2_DI/GPIO204
GPIO196
GPIO193
GPIO194
GPIO195
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
2
47
3
46
4
45
5
44
6
43
7
8
9
10
42
41
40
39
11
38
12
37
13
14
15
16
17
18
36
35
34
33
32
31
19
30
20
29
21
28
22
27
23
26
24
25
NC_29
NC_1
NC_28
NC_2
NC_27
NC_3
NC_26
NC_4
I/O7
NC_5
I/O6
I/O5
NC_6
R/B
I/O4
RE
NC_25
CE
NC_24
NC_7
NC_23
NC_8
VCC_2
VCC_1
VSS_2
VSS_1
NC_22
NC_9
NC_21
NC_10
NC_20
CLE
I/O3
ALE
I/O2
WE
I/O1
WP
I/O0
NC_11
NC_19
NC_12
NC_18
NC_13
NC_17
NC_14
NC_16
NC_15
1
48
2
47
3
46
4
45
5
44
6
43
7
8
9
10
42
41
40
39
11
38
12
37
13
14
15
16
17
18
36
35
34
33
32
31
19
30
20
29
21
22
28
27
23
26
24
25
NC_29
NC_1
NC_28
NC_2
NC_27
NC_3
NC_26
NC_4
I/O7
NC_5
I/O6
I/O5
NC_6
RY/BY
I/O4
RE
NC_25
CE
NC_24
NC_7
NC_23
NC_8
VCC_2
VCC_1
VSS_2
VSS_1
NC_22
NC_9
NC_21
NC_10
NC_20
CLE
I/O3
ALE
I/O2
WE
I/O1
WP
I/O0
NC_11
NC_19
NC_12
NC_18
NC_13
NC_17
NC_14
NC_16
NC_15
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
14
15
36
35
34
16
33
17
32
18
31
19
30
20
29
21
22
28
27
23
26
24
25
NC_29
+3.3V_Normal
I2C
DIMMING
AC25
AB24
AD25
AC24
AE23
AC23
AC22
AD23
V23
U24
V25
V24
W25
W23
AA23
Y24
AA25
AA24
AE24
AD24
Y23
W24
T25
U23
T24
T23
S7LR_DIVX_MS10
IC101
LGE2112-T8
+3.5V_ST
NC_28
NC_27
NC_26
I/O8
R157
PWM_DIM
0
PWM2
C7
R145
2.2K
NC_3
48
R144
2.2K
NC_2
1
AB23
NAND_FLASH_2G_TOSHIBA
EAN60991001
IC102-*7
TC58NVG1S3ETA00
R141
1K
NC_1
NAND_FLASH_2G_HYNIX_NEW
EAN60708702
IC102-*6
H27U2G8F2CTR
R140
1K
NAND_FLASH_1G_HYNIX_NEW
EAN35669103
IC102-*5
H27U1G8F2CTR-BC
AB25
E6
5V_DET_HDMI_1
F5
5V_DET_HDMI_2
I/O7
EEPROM_SDA
B6
5V_DET_HDMI_4
E5
EEPROM_SCL
I/O6
D5
DSUB_DET
I/O5
B7
SC1/COMP1_DET
NC_25
AMP_SDA
HP_DET
AMP_SCL
OLP
NC_24
TUNER_RESET
NC_23
MODEL_OPT_0
VCC_2
E7
F7
applied on only SMALL PCB
AB5
AB3
A9
F4
MODEL_OPT_1
AB1
VSS_2
N6
NC_22
AB2
NC_21
NC_20
MODEL_OPT_2
EEPROM
+3.5V_ST
IC104-*1
AT24C1024BN-SH-T
IC104
AT24C256C-SSHL-T
I/O2
A0
A1
1
NC_19
NC_17
8
256K
2
7
VCC
A1
WP
1
GND
8
2
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50
GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N
GP4: DEMOD_RESET
7
VCC
LVB3P
3
6
4
5
$0.16
SCL
EEPROM_SCL
A2
3
LVACKP
WP
LVACKN
PM_MODEL_OPT_0
6
SCL
SDA
EEPROM_SDA
GND
4
LVB4N
R177
10K
1M
A0’h
A2
NC_16
DEMOD_RESET
LVA0N
GPIO38
LVB4P
NC
I/O1
NC_18
+3.5V_ST
LVA0P
GPIO37
LVB3N
I/O4
I/O3
PM MODEL OPTION
AC2
GPIO36
5
SDA
LVBCKP
LVBCKN
PM_MODEL_OPT_1
R175
10K
TACK_KEY(GP4)
GPIO196
GPIO193
GPIO194
$0.44
GPIO195
AB25
RXA0+
AB23
RXA0-
AC25
RXA1+
AB24
RXA1-
AD25
RXA2+
AC24
RXA2-
AE23
RXA3+
AC23
RXA3-
AC22
RXA4+
AD23
RXA4-
V23
RXB0+
U24
RXB0-
V25
RXB1+
V24
RXB1-
W25
RXB2+
W23
RXB2-
AA23
RXB3+
Y24
RXB3-
AA25
RXB4+
AA24
RXB4-
AE24
RXACK+
AD24
RXACK-
Y23
RXBCK+
W24
T25
U23
T24
T23
RXBCKMODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
S2_RESET
EMEA INTERACTIVE
LP63xH-ZA
FLASH/EEPROM/GPIO
2012.11.05
1
LGE Internal Use Only
DVB-S2 LNB Part Allegro
(Option:LNB)
LNB
D2702
40V
SX34
LNB
ZD1
40V
3A
LNB
C2713
1uF
50V
LNB
C2705
68uF
35V
LNB
C2707
68uF
35V
+12V_LNB
LNB
L2700
33UH
SP-7850_33
2.4A
close to Boost pin(#1)
DCDC_GND
LNB
D2703
MBR230LSFT1G
LNB
C2711
10uF
25V
Input trace widths should be sized to conduct at least 3A
BOOST
1
VCP
2
TCAP
3
NC_1
4
TDO
5
EXTM
6
BFO
NC_9
22
23
BFI
VIN
GNDLX
LX
25
21
NC_8
20
NC_7
19
BFC
18
NC_6
17
NC_5
16
NC_4
15
NC_3
A_GND
R2705
0
+3.3V_Normal
DCDC_GND
A_GND
A_GND
Max 1.3A
+12V/+15V
LNB
+12V_LNB
LNB
C2710
L2701
BLM18PG121SN1D
OPT
27pF
R2702 33
LNB
27pF
C2709
OPT
R2701 33
LNB
0.22uF
LNB
R2704
4.7K
C2708
R2706
0
14
IRQ
13
NC_2
SCL
11
ADD
GND
A_GND
10
7
8
TDI
LNB
9
LNB_TX
IC2700
A8290SETTR-T
SDA
A_GND
THERMAL
29
VREG
LNB
C2706
22000pF
26
A_GND
27
28
A_GND
[EP]
Ouput trace widths should be sized to conduct at least 2A
A_GND
LNB
C2702
0.1uF
PCB_GND and A_GND are connected
A_GND
LNB
D2700
SX34
40V
LNB
LNB
C2703
0.1uF
50V
30V
LNB
C2700
0.22uF
25V
DCDC_GND and A_GND are connected
DCDC_GND and A_GND are connected in pin#27
close to VIN pin(#25)
DCDC_GND
LNB_OUT
LNB
C2712
0.1uF
50V
DCDC_GND
24
LNB
C2701
0.01uF
50V
12
2A
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
DEMOD_SCL
DEMOD_SDA
A_GND
LP63xH-ZA
DVB_S
2012/11/05
27
LGE Internal Use Only