Download Clevo LP200C Service manual
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PREFACE P R E F A C E Service Manual LCD PC LP200C/LP200T I PREFACE NOTICE R E F A C E The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. P Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. First Edition ©November, 2000 TRADEMARKS Intel® and Pentium® are registered trademarks of Intel Corporation. Windows®, Windows® 95 and Windows NT™ are registered trademarks of Microsoft Corporation. Other brand and product names are trademarks and/or registered trademarks of their respective companies. II Notice PREFACE ABOUT THIS MANUAL P This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the LCD PC. The following information is included: R E F A C E Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Appendix A, Part Lists Appendix B, Switches & Jumpers Appendix C, Circuit Diagrams RELATED DOCUMENTS You may also need to consult the following manuals for additional information: User’s Manual on CD This describes the LCD PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the LCD PC. Concise User’s Manual This gives a quick guide to the LCD PC and a brief introduction to its features. This Manual III PREFACE Table of Contents PREFACE R E F A C E Notice ............................................................................................................................................................................................. II Trademarks ............................................................................................................................................................................... II About This Manual ...................................................................................................................................................................... III Related Documents ................................................................................................................................................................. III Table of Contents ........................................................................................................................................................................ IV 1. INTRODUCTION P Overview ..................................................................................................................................................................................... 1-1 Systm Specifications .................................................................................................................................................................. 1-2 CPU ........................................................................................................................................................................................ 1-2 Intel Celeron ..................................................................................................................................................................... 1-2 Intel Pentium III ................................................................................................................................................................. 1-2 System Memory .................................................................................................................................................................... 1-2 Core Logic ............................................................................................................................................................................. 1-2 BIOS........................................................................................................................................................................................ 1-3 Video ..................................................................................................................................................................................... 1-3 Storage Devices .................................................................................................................................................................... 1-3 Audio ..................................................................................................................................................................................... 1-4 PCMCIA .................................................................................................................................................................................. 1-4 I/O .......................................................................................................................................................................................... 1-4 Input ...................................................................................................................................................................................... 1-5 Communications .................................................................................................................................................................. 1-5 Security .................................................................................................................................................................................. 1-5 Power System ....................................................................................................................................................................... 1-5 Physical Specifications .............................................................................................................................................................. 1-6 IV Table of Contents PREFACE P Environmental Specifications.................................................................................................................................................... 1-6 Temperature.......................................................................................................................................................................... 1-6 Humidity (non-condensing) ................................................................................................................................................ 1-6 External Locator ......................................................................................................................................................................... 1-7 System Board Overview ........................................................................................................................................................... 1-11 Key Parts .............................................................................................................................................................................. 1-11 Cable Connectors, Switches & Jumpers .......................................................................................................................... 1-12 R E F A C E 2. DISASSEMBLY Overview .................................................................................................................................................................................... 2-1 Maintenance Tools .............................................................................................................................................................. 2-2 Connections ......................................................................................................................................................................... 2-2 Maintenance Precautions .................................................................................................................................................. 2-3 Cleaning .......................................................................................................................................................................... 2-3 Back Cover Removal ................................................................................................................................................................ 2-4 CPU Removal ............................................................................................................................................................................ 2-5 CPU Upgrade Notes ........................................................................................................................................................... 2-6 Switch Settings for All Supported CPUs ........................................................................................................................ 2-6 Locating Switch SW1 ....................................................................................................................................................... 2-6 Memory Module Removal ........................................................................................................................................................2-7 Removing DIMMs .................................................................................................................................................................2-7 Installing DIMMs ...................................................................................................................................................................2-7 FDD Module Removal .............................................................................................................................................................. 2-8 CD Device Module Removal .................................................................................................................................................... 2-9 Inverter Board Removal .......................................................................................................................................................... 2-10 I/O Bracket Removal ............................................................................................................................................................... 2-11 System Board Removal ........................................................................................................................................................... 2-12 LCD Module Removal .............................................................................................................................................................. 2-14 Inverter + LED Board Removal ............................................................................................................................................... 2-17 Converter Board Removal ...................................................................................................................................................... 2-18 Table of Contents V PREFACE R E F A C E Speaker Removal ..................................................................................................................................................................... 2-19 Base Assembly Removal ........................................................................................................................................................ 2-21 Power Supply Removal .......................................................................................................................................................... 2-23 USB Board Removal ............................................................................................................................................................... 2-26 Hard Disk Drive Removal ....................................................................................................................................................... 2-27 Fax/Modem Module & IEEE 1394 Module (Optional) ......................................................................................................... 2-29 P APPENDIX A. PART LISTS APPENDIX B. SWITCHES & JUMPERS APPENDIX C. CIRCUIT DIAGRAMS VI Table of Contents 1. INTRODUCTION INTRODUCTION 1 INTRODUCTION OVERVIEW This manual covers the information you need to service or upgrade both the LP200C and LP200T LCD PCs. The two models mainly differ in appearance. All the description in this manual applies to both models unless otherwise specified. Information about operating the computer (e.g. getting started, and the System Configuration Utility) is in the User’s Manual. Information about drivers (e.g. VGA & audio) is also found in the User’s Manual. That manual is shipped with the computer. Operating systems (e.g. Windows 98 Second Edition, Windows 2000 Professional, etc.) have their own manuals as do application software (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. The LCD PC comes with a built-in 15” LCD display and is upgradeable in the areas of CPU, system memory and hard disk. See Chapter 3, “Disassembly,” for a detailed description of the upgrade procedure for each specific component. This chapter briefly introduces the computer’s technical specifications, external features and system board features. 1–1 1. INTRODUCTION SYSTM SPECIFICATIONS INTRODUCTION CPU INTEL CELERON Socket Type Speed L1 cache (in CPU) L2 cache (on die) Socket 370 (PPGA) 500/533/600/633MHz 16KB code + 16KB data 128KB INTEL PENTIUM III Socket Type Speed L1 cache (in CPU) L2 cache (on die) Socket 370 (FCPGA) 600/650/700/750/800MHz 16KB code + 16KB data 256KB SYSTEM MEMORY Type Base Expansion SDRAM, 3.3V, 100/133MHz (PC100/133) 0MB (onboard) up to 512MB using one or both 168-pin DIMM sockets (DIMM sizes: 64MB, 128MB, 256MB) CORE LOGIC SiS630 digital I/F 1–2 System Specifications 1. INTRODUCTION BIOS Insyde 2Mb Flash ROM, APM 1.2, ACPI INTRODUCTION VIDEO Controller Memory* Interface Display built-in SiS630 SSMA digital I/F built-in 15” LCD color TFT XGA (1024 x 768), 256K colors Port analog 15-pin VGA port for CRT *The system allocates or “shares” a portion of system memory for video use. “Shared memory size is user-configurable via the SCU. STORAGE DEVICES HDD FDD CD Device (factory option) CD-ROM DVD CD-RW fixed, 3.5”, 25.4mm, PCI local bus IDE interface 3.5”, 1.44MB (3-mode) 24X, full size (5.25”) ATAPI interface tray-loading mechanism, access time below 100ms 8X, full size (5.25”) ATAPI interface tray-loading mechanism, access time below 100ms (with software MPEG support) 4X, full size (5.25”) ATAPI interface tray-loading mechanism, access time below 100ms System Specifications 1–3 1. INTRODUCTION AUDIO INTRODUCTION Controller Compatibility Compliance Output Ports built-in SiS630 Sound Blaster, MS Windows Sound System AC’97 specs 2 built-in speakers line-in phones-out microphone-in PCMCIA Controller Socket TI 1420 (x 2) Type II or (x 1) Type III Controller Ports USB SMSC37N869 I/O (x 4) LP200C (x 2) LP200T Serial (x 1) 9-pin, 16550A compatible (x 1) infrared (modes: IrDA, ASK, FIR) Parallel (x 1) 25-pin (modes: Standard AT, Bidirectional, ECP, EPP) PS/2 (x 2) 6-pin, for mouse and keyboard IEEE1394* (x1) 6-pin, unpowered (*The IEEE1394 module is a dealer option.) 1–4 System Specifications 1. INTRODUCTION INPUT Keyboard (dealer option) 104-key, AT-compatible, with special function keys INTRODUCTION COMMUNICATIONS MODEM* Type MDC, V.90, 56K (software-based) Output RJ-11 jack (on-board) (* The modem module is a dealer option.) LAN Type Output built-in SiS630 RJ-45 jack (on-board) SECURITY BIOS Password Kensington Lock Port POWER SYSTEM Adapter Power Management internal AC, 90W, 90-264V (full range, auto-sensing) ACPI-compliant (S1, S4 & S5) System Specifications 1–5 1. INTRODUCTION PHYSICAL SPECIFICATIONS INTRODUCTION Dimensions W: 369mm (14.5”) L: 384mm (15.1”) D: 175mm (6.9”) 7.9Kg/17.4lbs 0o to 15o 270o Weight Panel Tilt Stand Swivel ENVIRONMENTAL SPECIFICATIONS TEMPERATURE Operating Storage 5oC to 35oC (41oF to 95oF) -10oC to 65oC (14oF to 149oF) HUMIDITY (NON-CONDENSING) Operating Storage 1–6 20% to 80% 10% to 90% Physical & Environmental Specifications 1. INTRODUCTION EXTERNAL LOCATOR The following figures show the external locations of the main features of the LCD PC. LP200T FRONT VIEW FIG. 1 – 1 1 1. 2. 3. 4. 1 2 2 2 2 5. 6. 7. 8. 9. 3~6 3~6 8 7 LCD Speakers FDD activity LED CD-device activity LED HDD activity LED Power LED IrDA port ON/OFF & Standby/ Resume button Reset button* (*LP200T only) 7 9 8 Front View 1–7 INTRODUCTION LP200C INTRODUCTION 1. INTRODUCTION 1. 2. 3. 4. 5. 6. 7. 8. LEFT VIEW FIG. 1 - 2 PC Card (PCMCIA) socket PC Card eject button LCD brightness control Microphone input jack Line-in jack Phones out jack Volume control knob HDD bay 1 2 4 5 6 7 8 1–8 Left View 3 1. INTRODUCTION LP200C LP200T 1 1 3 3 4. 5. 4 4 6. 7. 2 2 6 6 7 5 5 Right View 1–9 INTRODUCTION 1. 2. 3. RIGHT VIEW FIG. 1 - 3 FDD bay CD-Device bay Emergency eject button - Use a probe (e.g. a straightened paper clip). Eject button Kensington lock port AC-in port two USB ports (* LP200C only) INTRODUCTION 1. INTRODUCTION 1. 2. 3. 4. 5. 6. 7. 8. 9. REAR VIEW FIG. 1 - 4 Serial port (COM A) Printer/Parallel port VGA port PS/2 mouse port PS/2 keyboard port USB ports (x2)) IEEE1394 port RJ-45 LAN port RJ-11 Modem port 8 9 6 7 1 1 – 10 Rear View 2 3 4 5 1. INTRODUCTION SYSTEM BOARD OVERVIEW KEY PARTS Bottom View 1. 6 2. 3. 4. 5. 6. 7. 1 4 7 5 3 KEY PARTS FIG. 1 - 5 CPU (Intel Pentium III or Celeron) with Fan SMSC37N869 Super I/O Controller Flash ROM two DIMM Sockets CMOS Battery PCMCIA Socket SiS630 Integrated Chip (Core Logic, Video, Audio & LAN) 2 System Board Overview - Key Parts 1 – 11 INTRODUCTION Top View INTRODUCTION 1. INTRODUCTION CONNECTORS, SWITCHES & JUMPERS FIG. 1 - 6 1. CN1 (Inverter Cable) 2. CN2 (Power Cable) 3. CN4 (Power Cable) 4. CN6 (FDD Cable) 5. CN22 (CD Device Cable) 6. CN35 (USB Cable) 7. CN33 (Left Speaker Cable) 8 CN30 (HDD Cable) 9. CN21 (Modem Module) 10. CN16 (IEEE1394 Cable) 11. CN11 (Modem Cable) 12. CN31 (LED Cable) 13. CN32 (Inverter Cable) 14. CN34 (Right Speaker Cable) 15. CN8 (LCD Cable) 16. CN9 (IEEE1394 Module) 17. CN5 (Fan Cable) 18. SW1 (CPU Frequency Switch) 19. SW3 (LCD Type Switch) 20. SW4 (System Board ID Switch) 21. J1 (CMOS Clear Jumper) 22. J2 (Panel VCC Jumper) CABLE CONNECTORS, SWITCHES & JUMPERS 1 – 12 1 2 3 17 22 4 16 15 11 18 19 21 20 5 9 6 7 10 8 System Board Overview - Connectors, Switches & Jumpers 12 13 14 2. DISASSEMBLY D I S A S S E M B LY 2 DISASSEMBLY OVERVIEW This chapter provides step-by-step instructions for disassembling parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). All the procedures apply to both the LP200C and LP200T unless otherwise specified. We suggest you completely review any procedure before you take the computer apart. CPU and Memory Upgrades: The upgrade procedures for CPU and system memory involve more than the component-specific removal and replacement procedure. Please pay attention to the component-specific upgrade notes. 2–1 2. DISASSEMBLY MAINTENANCE TOOLS D I S A S S E M B LY The following tools are recommended when working on the LCD PC: • M3 Philips-head screwdriver • M2.5 Philips-head screwdriver (magnetized)* • M2 Philips-head screwdriver • Small flat-head screwdriver • Pair of needle-nose pliers • Anti-static wrist-strap * note Maintenance Precaution #3. CONNECTIONS Connections within the computer are one of four types: 2–2 Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start the separation. Maintenance Tools, Connections 2. DISASSEMBLY MAINTENANCE PRECAUTIONS The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions: 2. 3. 4. 5. 6. 7. 8. 9. 10. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. Be careful with power. Avoid accidental shocks, discharges or explosions. •Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. •When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. Peripherals – Turn off and detach any peripherals. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer. D I S A S S E M B LY 1. CLEANING Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer. Maintenance Precautions 2–3 BACK COVER REMOVAL 1. Place the system with its LCD display facing down. 2. Remove 5 screws (A, , B, C, D & E) which secure the Back Cover to the rest of the system. A B C REMOVING 5 SCREWS FROM THE BACK OF THE SYSTEM FIG. 2-1 D E 3. Gently remove the cover from the rest of the system. BACK COVER AND THE REST OF THE SYSTEM FIG. 2-2 2-4 Back Cover Removal Back Cover CPU REMOVAL Part A Remove the Back Cover. (page 2-4) Part B FNote: If you want to upgrade the CPU, replace the old CPU with the upgraded one and also see the CPU Upgrade Notes on the next page. 1. 2. 3. 4. Unplug the Fan Cable from Connector CN5. Disengage both caches at the sides of the Fan from the CPU socket. A thermal pad is attached to the Fan. Remove the Fan with the Thermal Pad from the CPU. Disengage the CPU lever and remove the CPU. CN5 Fan REMOVING THE FAN AND THE CPU FIG. 2-3 CPU FNote for Replacing the CPU: : Reverse the removal procedure. Please also note the following: When inserting the CPU, put the CPU in the CPU socket with the notched corner of the CPU aligning with the notched corner of the CPU socket and then engage the lever. CPU Removal 2-5 D I S A S S E M B LY 2. DISASSEMBLY CPU UPGRADE NOTES After you install the upgraded CPU, check against the following table to see if you need to adjust switch settings. SWITCH SETTINGS FOR ALL SUPPORTED CPUS CPU Type CPU SWITCH SETTINGS TABLE 2-1 Celeron 466/Celeron 500 Celeron 533/Celeron 566 Celeron 600 Pentium III 600/Pentium III 650 Pentium III 700/Pentium III 750 Pentium III 800 Pentium III 667/Pentium III 733 Pentium III 866 LOCATING SWITCH SW1 Fig. 2-4 shows the location of Switch SW1. SWITCH SW1 LOCATION FIG. 2-4 2–6 CPU Upgrade Notes Switch SW1 (CPU Frequency Switch) FSB Speed SW1-1 SW1-2 SW1-3 SW1-4 66.7MHz OFF OFF OFF OFF 100MHz ON OFF OFF OFF 133MHz ON ON ON OFF 2. DISASSEMBLY MEMORY MODULE REMOVAL REMOVING DIMMS Remove the Back Cover. (page 2-4) REMOVING THE DIMMS FIG. 2-5 Part B Release the levers on the two ends of the DIMM slot. As you do so, the module will rise slightly and remove the seated DIMM, one at a time. INSTALLING DIMMS 1. Insert a DIMM in either slot at about a 20o angle. Grooves on the sides of the module allow you to insert it only one way. Make sure it is seated as far into the slot as it will go. DO NOT FORCE IT. The module should fit in without much pressure. If there is a lot of resistance, check to make sure the DIMM is properly seated. 2. Click in the slot levers to secure the module. 3. Reinstall the back cover. INSTALLING THE DIMMS FIG. 2-6 FMemory Upgrade Note: • If you have changed the memory configuration, run SCU so the new total can be registered in the CMOS. • If you have increased memory, check to see if you need to recreate the Hibernate-specific file if the system runs Windows 98 SE with Hibernate support enabled. (Refer to Chapter 3, Advanced Controls & Chapter 5, Drivers & Utilities of the CD-based complete User’s Manual for details.) DIMM Removal & Installation 2–7 D I S A S S E M B LY Part A 2. DISASSEMBLY FDD MODULE REMOVAL Part A D I S A S S E M B LY Remove the Back Cover. (page 2-4) Part B 1. Remove 4 screws (A, B, C & D). 2. Separate the FDD module from the rest of the system by disconnecting the FDD Cable from the System Board at Connector CN6. A REMOVING THE FDD MODULE (1) FIG. 2-7 B C D CN6 FDD Module REMOVING THE FDD MODULE (2) FIG. 2-8 2–8 FDD Module Removal 2. DISASSEMBLY CD DEVICE MODULE REMOVAL The CD device module can be the CD-ROM module, DVD module or CD-RW module. D I S A S S E M B LY Part A Remove the Back Cover. (Page 2-4) Part B 1. Remove 4 screws (A, B, C & D). 2. Separate the CD Device Module from the rest of the system by disconnecting the device cable from Connector CN22 on the System Board. REMOVING THE CD DEVICE MODULE (1) FIG. 2-9 A B CN22 C D CD Device Module REMOVING THE CD DEVICE MODULE (2) FIG. 2-10 CD Device Module Removal 2–9 2. DISASSEMBLY INVERTER BOARD REMOVAL Part A D I S A S S E M B LY Remove the Back Cover. (Page 2-4) Part B 1. Remove the Inverter Shielding Plate by removing 3 screws (A, B & C) which secure it to the rest of the system. (If you have already removed the FDD module, Screws A & B have already been removed during the process.) 2. Remove 2 screws (D & E) which secure the Inverter Board and the Inverter Mylar to the rest of the system. 3. Disconnect the following 3 cables: (C1 & C2) The LCD to Inverter Board (2 cables from Connectors CN2). (C3) The Inverter Board to System Board (from Connector CN1). 4. Separate the Inverter Board and the Inverter Mylar. E CN2 C REMOVING THE INVERTER BOARD FIG. 2-11 A Inverter Shielding Plate B FDD Module Inverter Board Inverter Mylar Inverter Shielding Plate 2 – 10 Inverter Board Removal D CN1 2. DISASSEMBLY I/O BRACKET REMOVAL Part A Part B Remove the I/O Bracket by removing 10 screws (A ~ J) which secure it to the rest of the system. (If you have already removed the CD Device Module, Screw A has already been removed during the process.) REMOVING THE I/O BRACKET FIG. 2-12 J CD Device Module A B C&D E&F H G I I/O Bracket I/O Bracket Removal 2 – 11 D I S A S S E M B LY Remove the Back Cover. (page 2-4) 2. DISASSEMBLY SYSTEM BOARD REMOVAL Part A D I S A S S E M B LY Remove the Back Cover. (page 2-4) Remove the I/O Bracket. (page 2-11) Part B 1. Remove Screw A. 2. Disconnect the following 12 cables and 2 ground wires from the System Board: 12 Cables (C1) The Inverter Board to System Board (from Connector CN1). (C2) The FDD Module to System Board (from Connector CN6). (If you have already removed the FDD Module, the FDD Cable has already been removed during the process.) (C3) The CD Device Module to System Board (from Connector CN22). (If you have already removed the CD Device Module, the device cable has already been removed during the process.) (C4 & C5) The Power Supply to System Board (2 cables from Connector CN2, upper, and Connector CN4, lower). (Remove the clip which holds the above two cables together and put it aside.) (C6) The Right Speaker to System Board (from Connector CN34). (C7) The Left Speaker to System Board (from Connector CN33). (C8) The LED + Inverter Board to System Board (LED cable from Connector CN31). (C9) The LED + Inverter Board to System Board (Inverter cable from Connector CN32). (C10) The HDD to System Board (from Connector CN30). (C11) The LCD to System Board (from Connector CN8). (C12) The USB Board to System Board (from Connector CN35). 2 Ground Wires (W1) A ground wire with the USB Cable fixed to the System Board with a screw. (W2) A ground wire fixed to the System Board with a screw. 3. Remove the System Board by removing 7 screws (B ~ H). 2 – 12 System Board Removal 2. DISASSEMBLY B C CN1 CN4 D FDD Module A CN6 CN8 H E G CD Device Module CN22 REMOVING THE SYSTEM BOARD FIG. 2-13 CN35 W1 CN32 W2 CN34 CN31 F CN33 CN30 System Board System Board Removal 2 – 13 D I S A S S E M B LY CN2 2. DISASSEMBLY LCD MODULE REMOVAL Part A D I S A S S E M B LY Remove the Back Cover. (page 2-4) Remove the I/O Bracket. (page 2-11) Part B 1. Remove 6 screws (A, B, C, D, E & F). 2. Disconnect the following 8 cables and 3 ground wires. 8 Cables (C1 & C2) The LCD to Inverter Board (two cables from Connectors CN2). (C3) The LED + Inverter Board to System Board (LED cable from Connector CN31). (C4) The LED + Inverter Board to System Board (Inverter cable from Connector CN32). (C5) The LCD to LED + Inverter Board (from Connector CN1). (C6) The Left Speaker to System Board (from Connector CN33) (C7) The Right Speaker to System Board (from Connector CN34) (C8) The LCD to System Board (from Connector CN8) 3 Ground Wires (W1) A ground wire fixed to the Left Speaker with a screw. (W2) A ground wire fixed to the Right Speaker with a screw. (W3) A ground wire fixed to the System Board with a screw. 2 – 14 LCD Module Removal 2. DISASSEMBLY B C A CN8 D E F CN1 W2 CN34 W3 REMOVING 6 SCREWS, 8 CABLES & 3 GROUND WIRES FIG. 2-14 CN32 CN33 CN31 W1 LCD Module Removal 2 – 15 D I S A S S E M B LY CN2 D I S A S S E M B LY 2. DISASSEMBLY 3. Remove the LCD Module. A. Remove 4 screws (A, B, C & D) to separate the Front Panel from the rest of the system. B. Disconnect the Converter Cable from the LCD Module. B A Front Panel D C REMOVING THE LCD MODULE FIG. 2-15 Converter Cable 2 – 16 LCD Module Removal 2. DISASSEMBLY INVERTER + LED BOARD REMOVAL Part A D I S A S S E M B LY Remove the Back Cover. (page 2-4) Remove the I/O Bracket. (page 2-11) Remove the Front Panel with the LCD Module. (Steps 1 & 2 of Part B of the LCD Module Removal Procedure, pages 2-14 & 2-15) Part B 1. Separate the Front Panel from the rest of the system by removing 4 screws (A, B, C & D). 2. Separate the Inverter + LED Board from the Front Panel by removing 3 screws (E, F & G). B A REMOVING THE INVERTER + LED BOARD FIG. 2-16 Front Panel F E G D C Inverter + LED Board Inverter + LED Board Removal 2 – 17 D I S A S S E M B LY 2. DISASSEMBLY CONVERTER BOARD REMOVAL Part A Remove the LCD Module. (pages 2-14 ~ 2-16 ) Part B Separate the Converter Board from the rest of the system by removing Screw A. REMOVING THE CONVERTER BOARD FIG. 2-17 A Converter Board 2 – 18 Converter Board Removal 2. DISASSEMBLY SPEAKER REMOVAL Part A D I S A S S E M B LY Remove the Back Cover. (page 2-4) Remove the I/O Bracket. (page 2-11) Part B 1. Disconnect the following 4 cables. (C1) The Right Speaker to System Board (from Connector CN34). (C2) The Left Speaker to System Board (from Connector CN33). (C3) The LED + Inverter Board to System Board (LED cable from Connector CN31). (C4) The LED + Inverter Board to System Board (Inverter cable from Connector CN32). 2. Remove 4 screws (A, , B, C & D). A B D C DISCONNECTING 4 CABLES & REMOVING 4 SCREWS (FOR SPEAKER REMOVAL) FIG. 2-18 CN32 CN33 CN34 CN31 Speaker Removal 2 – 19 D I S A S S E M B LY 2. DISASSEMBLY 3. Separate the Front Panel from the rest of the system by removing 4 screws (A, B, C & D). 4. Separate the Speakers from the Front Panel by removing 8 screws (E ~ L). A B Front Panel D C SEPARATING THE SPEAKERS FROM THE FRONT PANEL FIG. 2-19 2 – 20 Speaker Removal E F I J G H K L 2. DISASSEMBLY BASE ASSEMBLY REMOVAL Part A D I S A S S E M B LY Remove the Back Cover. (page 2-4) Remove the I/O Bracket. (page 2-11) Part B Separate the Base Assembly from the rest of the system. A. Disconnect the following 4 cables and 3 ground wires from the System Board. 4 Cables (C1 & C2) The Power Supply to System Board (two cables from Connector CN2,upper, and Connector CN4, lower). (Remove the clip which holds the above two cables together and put it aside.) (C3) The HDD to System Board (from Connector CN30) (C4) The USB Board to System Board (from Connector CN35) 3 Ground Wires (W1) A ground wire with the USB Cable fixed to the System Board with a screw. (W2) A ground wire fixed to the Right Speaker with a screw. (W3) A ground wire fixed to the Left Speaker with a screw. B. Remove 4 screws (A, B, C & D). Base Assembly Removal 2 – 21 D I S A S S E M B LY 2. DISASSEMBLY CN2 CN4 SEPARATING THE BASE ASSEMBLY FROM THE SYSTEM FIG. 2-20 CN35 W1 W2 CN30 2 – 22 Base Assembly Removal W3 A C B D 2. DISASSEMBLY POWER SUPPLY REMOVAL The Power Supply is in the Base Assembly. Part A D I S A S S E M B LY Remove the Base Assembly. (pages 2-21 & 2-22) Part B 1. Remove the HDD Cartridge. A. Turn the Base Assembly upside down and remove Screw A. (Only the LP200T has this screw.) B. Remove Screw B and pull the HDD Cartridge out from its bay until the HDD’s connectors are exposed. C. Disconnect the following cables. (C1) The Power Supply to HDD (power cable). (C2) The System Board to HDD (HDD signal cable). A REMOVING THE HDD CARTRIDGE FIG. 2-21 C2 C1 HDD Cartridge B Power Supply Removal 2 – 23 D I S A S S E M B LY 2. DISASSEMBLY 2. Remove the Swivel Stand. A. Turn the Base Assembly upside down. B. Remove 4 screws (A, B, C & D). B REMOVING THE SWIVEL STAND FIG. 2-22 A Swivel Stand D C 3. Separate the Top Cover of the Base Assembly from the rest of the Base Assembly by removing 6 screws (A, B, C, D, E & F). Top Cover (Base Assembly) C B REMOVING THE TOP COVER OF THE BASE ASSEMBLY FIG. 2-23 F E 2 – 24 Power Supply Removal A D Power Supply 2. DISASSEMBLY 4. Separate the Power Supply from the rest of the Base Assembly by removing 4 screws (A, B, C & D). B D C REMOVING THE POWER SUPPLY FIG. 2-24 Power Supply Power Supply Removal 2 – 25 D I S A S S E M B LY A 2. DISASSEMBLY USB BOARD REMOVAL The USB Board is in the Base Assembly. Only the LP200C has this feature. D I S A S S E M B LY Part A Remove Remove Remove Remove the the the the Base Assembly. (pages 2-21 & 2-22) HDD Cartridge. (Step 1 of Part B of the Power Supply Removal Procedure, page 2-23) Swivel Stand. (Step 2 of Part B of the Power Supply Removal Procedure, page 2-24) Top Cover of the Base Assembly (Step 3 of Part B of the Power Supply Removal Procedure, page 2-24) Part B Separate the USB Board from the rest of the Base Assembly. A. Disconnect the USB Cable from Connector CN1 on the USB Board. B. Remove Screw A which secures the board to the Bottom Cover of the Base Assembly. REMOVING THE USB BOARD FIG. 2-25 A CN1 2 – 26 USB Board Removal USB Board 2. DISASSEMBLY HARD DISK DRIVE REMOVAL The HDD is housed in the Base Assembly. REMOVING SCREWS A & B FIG. 2-26 A B 3. Pull the HDD Cartridge out from its bay until the HDD’s connectors are exposed. 4. Separate the HDD cartridge from the rest of the system by disconnecting the HDD’s IDE Cable (A) and Power Cable (B). (Both of these cables are a tight fit.) A ð PULLING THE HDD CARTRIDGE OUT AND DISCONNECTING THE IDE & POWER CABLES FIG. 2-27 B HDD Removal 2 – 27 D I S A S S E M B LY 1. Place the LCD PC with its LCD panel facing up and remove Screw A. (Only the LP200T has this screw.) 2. Remove Screw B. D I S A S S E M B LY 2. DISASSEMBLY 5. Turn the cartridge upside down. 6. Remove Screws A & B to separate the HDD Frame from the Cartridge Casing. A SEPARATING THE HDD FRAME FROM THE CARTRIDGE CASING FIG. 2-28 B 7. Remove Screws A, B, C & D to separate the HDD from its frame. A B SEPARATING THE HDD FROM ITS FRAME FIG. 2-29 C D 2 – 28 HDD Removal 2. DISASSEMBLY FAX/MODEM MODULE & IEEE1394 MODULE (OPTIONAL) The Fax/Modem and IEEE1394 Modules are optional. D I S A S S E M B LY Part A Remove the Back Cover. (page 2-4) Remove the I/O Bracket. (page 2-11) Part B IEEE1394 Module Removal 1. Disconnect the IEEE1394 cable from Connector CN16. 2. Disconnect the module with the cable from Connector CN9 on the System Board. Fax/Modem Module Removal 1. Disconnect the Fax/Modem cable from Connector CN11. 2. Remove 2 screws (A & B). 2. Disconnect the module with the cable from Connector CN21 on the System Board. REMOVING THE FAX/MODEM & IEEE1394 MODULES FIG. 2-30 CN9 B A CN11 CN16 Fax/Modem & IEEE1394 Module Removal 2 – 29 2. DISASSEMBLY D I S A S S E M B LY NOTES: 2 – 30 Notes A. PART LISTS PART LISTS A PART LISTS This appendix breaks down the LCD PC’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. It includes two sets of part lists for the LP200C and the LP200T respectively. Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers. A–1 PART LISTS A. PART LISTS LP200C LP200C FRONT ASSEMBLY (PART I) FIG. A–1 A–2 Front Assembly (LP200C) A. PART LISTS Front Assembly (LP200C) A–3 PART LISTS LP200C FRONT ASSEMBLY (PART II) FIG. A–2 PART LISTS A. PART LISTS LP200C FRONT ASSEMBLY (PART III) FIG. A–3 A–4 Front Assembly (LP200C) A. PART LISTS Front Assembly (LP200C) A–5 PART LISTS LP200C FRONT ASSEMBLY (PART IV) FIG. A–4 PART LISTS A. PART LISTS LP200C BACK ASSEMBLY (PART I) FIG. A–5 A–6 Back Assembly (LP200C) A. PART LISTS Back Assembly (LP200C) A–7 PART LISTS LP200C BACK ASSEMBLY (PART II) FIG. A–6 PART LISTS A. PART LISTS LP200C BACK ASSEMBLY (PART III) FIG. A–7 A–8 Back Assem- A. PART LISTS FDD Module (LP200C) A–9 PART LISTS LP200C FDD MODULE FIG. A–8 PART LISTS A. PART LISTS LP200C CD DEVICE MODULE FIG. A–9 A – 10 CD Device Module (LP200C) A. PART LISTS Base Assembly (LP200C) A – 11 PART LISTS LP200C BASE ASSEMBLY (PART I) FIG. A–10 PART LISTS A. PART LISTS LP200C BASE ASSEMBLY (PART II) FIG. A–11 A – 12 Base Assembly (LP200C) A. PART LISTS HDD Module (LP200C) A – 13 PART LISTS LP200C HDD MODULE FIG. A–12 PART LISTS A. PART LISTS LP200T LP200T FRONT ASSEMBLY (PART I) FIG. A–13 A – 14 Front Assembly (LP200T) A. PART LISTS Front Assembly (LP200T) A – 15 PART LISTS LP200T FRONT ASSEMBLY (PART II) FIG. A–14 PART LISTS A. PART LISTS LP200T FRONT ASSEMBLY (PART III) FIG. A–15 A – 16 Front Assembly (LP200T) A. PART LISTS Front Assembly (LP200T) A – 17 PART LISTS LP200T FRONT ASSEMBLY (PART IV) FIG. A–16 PART LISTS A. PART LISTS LP200T BACK ASSEMBLY (PART I) FIG. A–17 A – 18 Back Assembly (LP200T) A. PART LISTS Back Assembly (LP200T) A – 19 PART LISTS LP200T BACK ASSEMBLY (PART II) FIG. A–18 PART LISTS A. PART LISTS LP200T BACK ASSEMBLY (PART III) FIG. A–19 A – 20 Back Assembly (LP200T) A. PART LISTS FDD Module (LP200T) A – 21 PART LISTS LP200T FDD MODULE FIG. A–20 PART LISTS A. PART LISTS LP200T CD DEVICE MODULE FIG. A–21 A – 22 CD Device Module (LP200T) A. PART LISTS Base Assembly (LP200T) A – 23 PART LISTS LP200T BASE ASSEMBLY (PART I) FIG. A–22 PART LISTS A. PART LISTS LP200T BASE ASSEMBLY (PART II) FIG. A–23 A – 24 Base Assembly (LP200T) A. PART LISTS HDD Module (LP200T) A – 25 PART LISTS LP200T HDD MODULE FIG. A–24 A. PART LISTS PART LISTS NOTES: A – 26 Notes B. SWITCHES & JUMPERS SWITCHES & JUMPERS B SWITCHES & JUMPERS This appendix is about the system’s switches and jumpers. B–1 B. SWITCHES & JUMPERS SWITCHES AND JUMPERS SWITCHES & JUMPERS LOCATIONS B–2 Switch & Jumper Locations B. SWITCHES & JUMPERS SETTINGS CPU Type Celeron 466/Celeron 500 Celeron 533/Celeron 566 Celeron 600 Pentium III 600/Pentium III 650 Pentium III 700/Pentium III 750 Pentium III 800 Pentium III 667/Pentium III 733 Pentium III 866 SW1-1 SW1-2 SW1-3 SW1-4 66.7MHz OFF OFF OFF OFF 100MHz ON OFF OFF OFF 133MHz ON ON ON OFF FSB Speed SWITCHES & JUMPERS Switch SW1 CPU Frequency Switch Switch SW3 LCD Type Switch LCD Type SW3-1 SW3-2 SW3-3 SW3-4 Hyundai 15.1" (8bit) OFF OFF OFF OFF Sharp 15.1" ON OFF OFF OFF Hyundai 15.1" (6bit) ON ON OFF OFF Switch & Jumper Settings B–3 B. SWITCHES & JUMPERS Switch SW4 System Board ID Switch SWITCHES & JUMPERS Type Default SW4-1 SW4-2 SW4-3 SW4-4 OFF OFF OFF OFF Jumper J1 CMOS Clear Jumper Type J1 1 & 2 Normal ON J1 2 & 3 CMOS Clear ON Jumper J2 Panel VCC Jumper Type Hyundai, Sharp Reserved B–4 Switch & Jumper Settings J2 1 & 2 J1 2 & 3 ON ON C. CIRCUIT DIAGRAMS CIRCUIT DIAGRAMS C CIRCUIT DIAGRAMS This appendix has circuit diagrams of the system’s PCBs. Printed Circuit Board System Board Inverter Board Inverter + LED Board Converter Board IEEE1394 Extension Card External USB Board Part No. of the Latest Version 71-P2200-006 71-P2202-006 71-P2203-007A 71-P2204-004 71-P2205-001 (This is an optional feature.) 71-P2206-001 (Only the LP200C has this feature.) We have included the latest versions at the press time. If any board you want to service is newer than listed, please consult the nearest service cneter. C–1 C. CIRCUIT DIAGRAMS SYSTEM BOARD T 78 2 2 DXP DXN 2,3 CPURST # 6 2,3 2,3 2,3 2,3 2,3 2,3 2,3 2,3 CPUCLK HLOCK# RS#2 RS#1 RS#0 BPRI# DEFER# HT RDY# BREQ0# 2,3 2,3 2,3 2,3 3 2,3 HITM# HIT # DBSY# DRDY# ADS# BNR# Y33 C37 AH28 AL31 AL29 AH4 X4 W37 AK20 AK28 AH22 AH26 AN17 AN19 AN25 AN29 AL23 AL25 AL27 AN27 AN31 AH14 HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0 T 54 T 55 T 56 T 57 AF4 W3 AC1 X6 AD4 AA3 Z4 AK6 AA1 Y3 AF6 AB4 AB6 AE3 AJ1 AC3 AG3 Z6 AE1 AN7 AL5 AK14 AL7 AN5 AK10 AH6 AL9 AH10 AL15 AN9 AH8 AH12 AK8 SLEWCT RL R243 110 1% RTT CT RL R239 110 1% T Z 0139 T Z 0138 Z 0126 Z 0127 Z 0128 Z 0129 Z 0130 Z 0131 Z 0132 Z 0133 Z 0134 Z 0135 Z 0136 Z 0137 T T T T T T T T T T T T For Future Compatibilit y Upgrate AK30 F 10 G 37 L33 N33 N35 N37 Q 33 Q 35 Q 37 Y1 E21 E27 R2 S35 X2 T Z 0120 T Z 0121 T Z 0122 T Z 0123 T Z 0124 T Z 0125 T Z 0118 T Z 0119 CA134 CA133 CA132 CA131 CA14 CA23 CA154 CA172 CA17 CA15 CA145 CA138 CA150 AK16 AA33 AA35 AH20 AL13 AL21 AN11 AN15 AN21 E23 G 35 S33 S37 U35 U37 Z0110 Z0111 Z0112 Z0113 Z0114 Z0115 Z0116 Z0117 T Z0108 T Z0109 T T T T T T T T C33 C31 A33 A31 E31 C29 E29 A29 T 63 T 64 T 68 T 69 T 73 T 72 T 74 T 75 T 62 T 65 T 66 T 67 T 71 T 70 T 76 T 77 T 79 U3A T HERMT RIP# T HERMDP T HERMDN VCC_1.5V VCC_2.5V VCC_CMOS BPM#[0] BPM#[1] BP#[2] BP#[3] RESET # RESET 2# BCLK LOCK# RS#[2] RS#[1] RS#[0] BPRI# DEFER# T RDY# BR0# PICD[0] PICD[1] PICCLK BSEL0 BSEL1 SMI# INIT # SLP# A20M# IERR# FERR# IGNNE# FLUSH# STPCLK# LINT [1]/NMI LINT[0]/INT R SOCKET 370 HITM# HIT # DBSY# DRDY# ADS# BNR# REQ#[4] REQ#[3] REQ#[2] REQ#[1] REQ#[0] A#[35] A#[34] A#[33] A#[32] A#[31] A#[30] A#[29] A#[28] A#[27] A#[26] A#[25] A#[24] A#[23] A#[22] A#[21] A#[20] A#[19] A#[18] A#[17] A#[16] A#[15] A#[14] A#[13] A#[12] A#[11] A#[10] A#[9] A#[8] A#[7] A#[6] A#[5] A#[4] A#[3] VID3 VID2 VID1 VID0 VCC_CORE 0 0 0 0 1.30 0 0 0 1 1.35 0 0 1 0 1.40 0 0 1 1 1.45 0 1 0 0 1.50 0 1 0 1 1.55 0 1 1 PWRGOOD TCK T DI TDO TMS T RST # PREQ# PRDY# 1.60 0 0 1 1 1 1.65 1 0 0 0 1.70 1 0 0 1 1.75 1 0 1 0 1.80 1 0 1 1 1.85 1 1 0 0 1.90 1 1 0 1 1.95 1 1 1 0 2.00 1 1 1 1 2.05 0.1u VTT +2.5V C35 E35 G33 E37 VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7 EDGCT RL/VRSEL PLL1 PLL2 F 16 E25 A27 A25 C17 C23 A19 C27 C19 C21 A23 D16 A13 C25 C13 A17 A15 A21 C11 A11 A7 D12 D14 C15 D10 D8 A9 C9 B2 C7 C1 F6 C5 J3 A3 A5 F 12 E1 E3 K6 G3 F8 G1 L3 H6 P4 R4 H4 U3 N3 L1 Q1 M4 Q3 P6 S1 J1 T6 S3 U1 M6 N1 T4 W1 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u +2.5V T Z0140 T Z0141 T Z0142 T Z0143 T 47 T 48 T 50 T 49 J35 L35 PICD0 PICD1 J33 PICCLK AJ33 AJ31 AJ35 AG33 AH30 AE33 AE35 AC35 AG37 AE37 AG35 L37 M36 BSEL0# BSEL1# SMI# INIT # CPUSLP# A20M# T Z0152 FERR# IGNNE# FLUSH# STPCLK# NMI INT R AK26 PWRGOOD AL33 AN35 AN37 AK32 AN33 J37 A35 HTCK HT DI HTDO HTMS HT RST # PREQ# Z0107 R232 AL35 AM36 AL37 AJ37 VID0 VID1 VID2 VID3 PICCLK 13 BSEL0# BSEL1# SMI# INIT # CPUSLP# A20M# 6 6 3 3 3 3 FERR# IGNNE# 3 3 CA130 CA182 CA176 CA174 CA180 CB28 CB10 CB9 CT 6 CT 35 0.1u 1000p 1000p 1000p 10u/16V 10u/16V 0.1u 0.1u 0.1u 0.1u VTT CA26 CA173 CA48 CA171 CA22 CA175 CA44 CA16 CA135 CA136 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u STPCLK# 3 NMI 3 INT R 3 PWRGOOD 12 V_CMOS CPUCLK R255 Z0105 15 C346 C347 C348 C349 0.1u 0.1u 0.1u 4.7u_1206 C198 10p 56 VTT VID[0..3] VID[0] VID[1] VID[2] VID[3] 0.1u V_CMOS AD36 Z36 AB36 18 PICCLK E33 F18 K4 R6 V6 AD6 AK12 AK22 CPUVREF R242 Z0106 15 C194 10p V_CORE AG1 Z0101 W33 U33 Z0102 Z0103 R205 51 1 L33 V_CORE 2,18 2 33uH + C195 22u/10V_1206 D#63 D#62 D#61 D#60 D#59 D#58 D#57 D#56 D#55 D#54 D#53 D#52 D#51 D#50 D#49 D#48 D#47 D#46 D#45 D#44 D#43 D#42 D#41 D#40 D#39 D#38 D#37 D#36 D#35 D#34 D#33 D#32 D#31 D#30 D#29 D#28 D#27 D#26 D#25 D#24 D#23 D#22 D#21 D#20 D#19 D#18 D#17 D#16 D#15 D#14 D#13 D#12 D#11 D#10 D#9 D#8 D#7 D#6 D#5 D#4 D#3 D#2 D#1 D#0 T Z0148 T Z0149 T Z0150 T Z0151 HA#31 HA#30 HA#29 HA#28 HA#27 HA#26 HA#25 HA#24 HA#23 HA#22 HA#21 HA#20 HA#19 HA#18 HA#17 HA#16 HA#15 HA#14 HA#13 HA#12 HA#11 HA#10 HA#9 HA#8 HA#7 HA#6 HA#5 HA#4 HA#3 AL17 AL19 AH18 AH16 AK18 GND/CLKREF CPUPRES# T 61 T 60 RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D RES ERVE D T Z0147 T 58 VTT T 59 VT T VT T VT T VT T VT T VT T VT T VT T VT T VT T VT T VT T VT T VT T VT T 4.7u/16V T 80 RS P# GN D R P# AER R# BI NIT # BER R# T EST HI C86 AP0# AP1# CIRCUIT DIAGRAMS CLKREF D EP0# D EP1# D EP2# D EP3# D EP4# D EP5# D EP6# D EP7# Z0101 Z0102 Z0103 Z0104 Z0105 Z0106 Z0107 V_CMOS AL11 AN13 T 31 T 33 T 35 T 42 T 46 T 41 T 36 T 40 6,9,12,18 T 30 T 32 T 34 T 44 T 43 T 39 T 37 T 38 T 45 T T T T T T T 2,3,18 +2.5V R49 150 R47 150 VTT VTT AC37 AM 2 AN23 AK24 B36 V4 W35 +2.5V INT EL_PIII VTT CPUVREF HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0 R218 75 1% Z0104 1 L31 PLACE NEAR T HE MENDOCINO (FOR VREF0 T O VREF7) 2 0 HD#[0..63] HA#[3..31] HREQ#[0..4] HD#[0..63] 2,3 HA#[3..31] 2,3 HREQ#[0..4] R44 150 1% V_CMOS RN8 1 2 3 4 8 7 6 5 HT DI CPUSLP# PREQ# FERR# RP17 RN49 1 2 3 4 8 7 6 5 PICD0 PICD1 HTDO T Z0145 T 53 T 52 8P4R x 330 CA18 CB3 CB7 0.1u 1000p 1000p 1000p 1000p 1000p 1000p 1000p 1000p A20M# INT R INIT # IGNNE# T Z0146 8P4R x 150 1 2 3 4 5 CB5 CB6 CB20 CB19 CB8 9 8 7 6 10P8R x 470 V_CMOS 10 SMI# STPCLK# NMI T Z0144 T 51 FLUSH# R259 510 HTCK HTMS R244 R240 1K 1K HT RST # R256 680 T it le Size A3 Date: C–2 CB4 2,3 V_CMOS V_CMOS CT 45 10u/16V System Board (71-P2200-006) - Sheet 1 of 19 ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. Socket-370 PIII CPU Document Number Rev LP-200 71-P2200-006 Tuesday, June 20, 2000 Sheet 1 of 6 19 C. CIRCUIT DIAGRAMS V_CORE 1,3 HD#[0..63] 1,3 RP12 U3B GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A37 AB32 AC33 AC5 AD2 AD34 AF32 AF36 AG5 AH2 AH34 AJ11 AJ15 AJ19 AJ23 AJ27 AJ3 AJ7 AK36 AK4 AL1 AL3 AM10 AM14 AM18 AM22 AM26 AM30 AM34 AM6 AN3 B12 B16 B20 B24 B28 B32 B4 B8 D18 D2 D22 D26 D30 D34 D4 E11 E15 E19 E7 F20 F24 F28 F32 F36 G5 H2 H34 K36 L5 M2 M34 P32 P36 Q5 R34 T 32 T 36 U5 V2 V34 X32 X36 Y37 Y5 Z2 Z34 T 81 1 2 3 4 5 10 HA#[3..31] V_CORE RP16 VTT HD#5 HD#7 HD#2 HD#3 9 8 7 6 T 89 HA#3 HA#4 HA#5 HA#6 T Z0207 10P8R x 56 RP11 T 82 HD#14 HD#10 HD#12 HD#9 T Z0202 1 2 3 4 5 10 T 83 1 2 3 4 5 T 85 HD#24 HD#25 HD#26 HD#27 T Z0213 1 2 3 4 5 T 91 HA#11 HA#12 HA#13 HA#14 T Z0208 10 HD#21 HD#22 HD#19 HD#23 T 90 HA#23 HA#22 HA#19 HA#21 T Z0209 1 2 3 4 5 T 92 HA#29 HA#27 HA#30 HA#31 T Z0210 1 2 3 4 5 T 84 10 T 86 T 87 HD#50 HD#49 HD#53 HD#54 T Z0205 1 2 3 4 5 10 V_CORE 10 T 88 0.1u 0.1u V_CORE CA177 CA13 CA162 CA156 CA126 CA127 CA128 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 10 V_CORE VTT HA#28 9 8 7 6 RS#0 RS#2 RS#1 1,3 1,3 1,3 CT 41 CT 7 CT 47 CT 5 CT 42 10u/16V 10u/16V 10u/16V 10u/16V 10u/16V HREQ#0 HREQ#3 HITM# HIT # T 94 10 1 2 3 4 5 T Z0211 VTT 9 8 7 6 HREQ#2 HREQ#4 HREQ#1 CPURST # 1,3 1,3 1,3 1,3 HT RDY# DEFER# HLOCK# BPRI# 1,3 1,3 1,3 1,3 V_CORE 10P8R x 56 RP5 1,3 1,3 1,3 1,3 DRDY# BREQ0# DBSY# BNR# T 96 10 1 2 3 4 5 T Z0212 VTT CT 4 VTT 9 8 7 6 CT 43 CT 40 CT 44 CT 39 10u/16V 10u/16V 10u/16V 10u/16V 10u/16V 10P8R x 56 HD#48 HD#51 HD#52 HD#55 9 8 7 6 1 2 3 4 5 0.1u HA#20 HA#24 HA#26 HA#25 +3V 10P8R x 56 HD#56 HD#61 HD#60 HD#62 T Z0206 0.1u VTT 10P8R x 56 RP6 0.1u VTT 9 8 7 6 RP3 1,3 1,3 1,3 1,3 HD#46 HD#45 HD#47 HD#44 9 8 7 6 RP4 0.1u 0.1u VTT HD#37 HD#33 HD#35 HD#34 9 8 7 6 RP2 1 2 3 4 5 CA152 CA148 CA147 CA143 0.1u 10P8R x 56 10P8R x 56 HD#40 HD#41 HD#42 HD#43 T Z0204 10 RP13 VTT HD#28 HD#29 HD#30 HD#31 9 8 7 6 1 2 3 4 5 CA19 CA24 CA12 CA34 10P8R x 56 10 10P8R x 56 HD#32 HD#39 HD#36 HD#38 T Z0203 VTT HA#15 HA#16 HA#17 HA#18 9 8 7 6 RP14 VTT 10P8R x 56 RP1 10 1 2 3 4 5 10P8R x 56 9 8 7 6 RP9 HA#7 HA#8 HA#9 HA#10 9 8 7 6 RP15 VTT HD#11 HD#13 HD#15 HD#8 10P8R x 56 HD#16 HD#20 HD#18 HD#17 T Z0214 V_CORE VTT 10P8R x 56 9 8 7 6 RP10 10 1 2 3 4 5 CIRCUIT DIAGRAMS GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE SO C KE T 3 70 AA37 AA5 AB2 AB34 AD32 AE5 AF2 AF34 AH24 AH32 AH36 AJ13 AJ17 AJ21 AJ25 AJ29 AJ5 AJ9 AK2 AK34 AM12 AM16 AM20 AM24 AM28 AM32 AM4 AM8 B10 B14 B18 B22 B26 B30 B34 B6 C3 D20 D24 D28 D32 D36 D6 E13 E17 E5 E9 F14 F2 F22 F26 F30 F34 F4 H32 H36 J5 K2 K32 K34 M32 N5 P2 P34 R32 R36 S5 T2 T 34 V32 V36 W5 X34 Y35 Z32 HD#0 HD#1 HD#6 HD#4 T Z0201 RN53 10 1 2 3 4 VTT HD#57 HD#63 HD#59 HD#58 9 8 7 6 8 7 6 5 8P4R x 220 CKE[0..3] CKE[0..3] RN51 10P8R x 56 Z0201 Z0202 Z0203 Z0204 1 2 3 4 8 7 6 5 7 CKE2 CKE0 CKE1 CKE3 8P4R x 22 INTEL_PIII JP4 +5V 1 U29 15 V_CORE CA144 CA141 CA142 CA25 CA29 CA21 CA28 CA153 CA151 CB18 CB16 CB17 CB21 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 1000p 1000p 1000p 1000p FAN-IN T 93 15 FAN-PWM T 99 T 95 R350 +5V 5 THERM# T 98 5,6,7 630SMCLK 5,6,7 630SMBDAT 1 2 3 4 T Z0223 5 T Z0221 10K Z0205 6 7 8 T Z0220 9 10 T Z0222 2 DXN TOPOPEN FANIN1/GPO1 VCC FANIN1/GPO2 VREF PWMOUT 1 CPUT 1/PII1 PWMOUT 2 RESET # FANFAULT #/GPO3 VIN1 PWR_DN# (+3.3VIN)VIN2 SMI# (VBAT )VIN3 OVT # CPUT 2/PII2 SCL BAT FAULT #/GPO4 SDA GND 20 17 19 15 16 14 13 18 11 12 Z0206 R348 V_CORE +3V Z0207 DXP C266 T 97 1 D19 C +5V R353 50K_0603(1%) A POWEROK R352 8.2K +5V 5,6,8,10,11,12,13,14,15,16,17,18,19 SB3V 5,12,15,16,18,19 +3V 3,4,5,6,7,8,9,10,11,12,13,14,15,16,18,19 VTT 1,3,18 V_CORE 1,18 12 IN4148 R351 34K_0603(1%) 3300p W83L784R 30K(1%) Z0209 Z0208 T Z0219 1 C265 3300p +5V ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. T it le Size CPU & GTL+ Termination Resistors Document Number A3 71-P2200-006 Date: Tuesday, June 20, 2000 Rev LP-200 Sheet 2 of 6 19 System Board (71-P2200-006) - Sheet 2 of 19 C–3 C. CIRCUIT DIAGRAMS VTT 630CCLK R72 Z0301 2,4,5,6,7,8,9,10,11,12,13,14,15,16,18,19 VTT 1,2,18 MD[0..63] MD[0..63] CSA#[0..3] CA237 0.1u R65 75 1% 15_R +3V C114 GT LREFA HIT # HITM# ADS# BNR# DRDY# DBSY# HT RDY# 1 1 1 1 1 1 1 1 1 NMI SMI# INIT # INT R A20M# FERR# IGNNE# STPCLK# CPUSLP# NMI SMI# INIT # INT R A20M# FERR# IGNNE# STPCLK# CPUSLP# F18 D18 B19 C20 E18 A20 B20 C19 D19 HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0 T 28 U25 U29 T 29 R27 HA#31 HA#30 HA#29 HA#28 HA#27 HA#26 HA#25 HA#24 HA#23 HA#22 HA#21 HA#20 HA#19 HA#18 HA#17 HA#16 HA#15 HA#14 HA#13 HA#12 HA#11 HA#10 HA#9 HA#8 HA#7 HA#6 HA#5 HA#4 HA#3 K25 J28 J27 K27 K26 J29 L26 M25 K29 N25 P24 K28 L27 L29 M26 P25 L28 R25 M28 M29 M27 R24 P26 N26 N27 P27 N28 P28 T 25 RS#[2] RS#[1] RS#[0] CSB#[5] CSB#[4] CSB#[3] CSB#[2] CSB#[1] CSB#[0] HIT # HITM# ADS# BNR# DRDY# DBSY# HT RDY# MA[14] MA[13] MA[12] MA[11] MA[10] MA[9] MA[8] MA[7] MA[6] MA[5] MA[4] MA[3] MA[2] MA[1] MA[0] NMI SMI# INIT# INTR A20M# FERR# IGNNE# STPCLK# CPUSLP# HREQ#[4] HREQ#[3] HREQ#[2] HREQ#[1] HREQ#[0] HA#[31] HA#[30] HA#[29] HA#[28] HA#[27] HA#[26] HA#[25] HA#[24] HA#[23] HA#[22] HA#[21] HA#[20] HA#[19] HA#[18] HA#[17] HA#[16] HA#[15] HA#[14] HA#[13] HA#[12] HA#[11] HA#[10] HA#[9] HA#[8] HA#[7] HA#[6] HA#[5] HA#[4] HA#[3] 7 M D63 M D62 M D61 M D60 M D59 M D58 M D57 M D56 M D55 M D54 M D53 M D52 M D51 M D50 M D49 M D48 M D47 M D46 M D45 M D44 M D43 M D42 M D41 M D40 M D39 M D38 M D37 M D36 M D35 M D34 M D33 M D32 M D31 M D30 M D29 M D28 M D27 M D26 M D25 M D24 M D23 M D22 M D21 M D20 M D19 M D18 M D17 M D16 M D15 M D14 M D13 M D12 M D11 M D10 M D9 M D8 M D7 M D6 M D5 M D4 M D3 M D2 M D1 M D0 V25 U26 V28 R28 U28 V29 T 24 VSSQ GT LREF A VTT A HIT # HITM# ADS# BNR# DRDY# DBSY# HT RDY# DRAM Controller Interface SiS-630 DQM[7] DQM[6] DQM[5] DQM[4] DQM[3] DQM[2] DQM[1] DQM[0] SDCLK CKE WE# SRAS# SCAS# SDVADD AE23 AD22 AJ24 Z0302 AH24 Z0303 AG24 Z0304 AF24 Z0305 AF27 AF28 AC25 AF29 AE25 AE26 RN60 8 7 6 5 Host Bus Interface CPUAVDD 8P4R X 10 1 2 3 4 CSA#3 CSA#2 CSA#1 CSB#1 CSA#3 CSA#2 CSA#1 CSA#0 AF26 Z0310 AG29 Z0311 AG28 Z0312 AG27 Z0313 AH28 Z0314 AH27 Z0315 AJ27 Z0316 AG26 Z0317 AH26 Z0318 AJ26 Z0319 AF25 Z0320 AG25 Z0321 AH25 Z0322 AJ25 Z0323 AE24 Z0324 RN56 8 7 6 5 RN55 8 7 6 5 RN57 8 7 6 5 RN58 8 7 6 5 RN59 8 7 6 5 8P4RX 10 1 MA11 2 MA4 3 MA12 4 MA14 8P4R X 10 1 2 MA13 3 CSB#2 CSB#0 4 18P4R X 10 MA8 MA9 2 3 MA7 MA10 4 18P4R X 10 MA3 MA5 2 MA6 3 CSA#0 4 18P4R X 10 MA1 MA2 2 CSB#3 3 MA0 4 AE29 Z0325 AE27 Z0326 AH23 Z0327 AE22 Z0328 AD24 Z0329 AE28 Z0330 AG23 Z0331 AJ23 Z0332 RN12 1 2 3 4 RN15 1 2 3 4 8 8P4R X 10 7 6 5 8 8P4R X 10 7 6 5 Z0306 Z0307 Z0308 Z0309 630SDCLK AJ15 F6 AF22 Z0333 R64 AF23 Z0334 R63 AE21 Z0335 R68 10 10 10 CSB#3 CSB#2 CSB#1 CSB#0 MA14 MA13 MA12 MA11 MA10 MA9 MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0 DQM7 DQM6 DQM5 DQM4 DQM3 DQM2 DQM1 DQM0 630SDCLK RAMW# SRAS# SCAS# RAMW# SRAS# SCAS# 6 7 7 7 R74 AJ16 Z0336 +3V 0_0805 CB14 1000p CA58 0.1u R71 A19 Z0337 +3V 0_0805 E19 D20 A21 F20 C22 E20 B22 C21 B21 E21 A22 F22 C23 D21 B23 E22 C24 D22 D24 E24 C25 E23 D23 B25 F24 A26 E25 A25 D26 D25 B26 C26 B27 B28 C27 A27 C29 C28 D27 D28 E26 D29 E28 H24 E27 E29 F27 F25 F29 G 26 F26 J25 F28 G 25 G 28 H25 G 27 G 29 H26 K24 L25 H27 H29 H28 1,2 1,2 1 1,2 1,2 1,2 1,2 V27 V26 U27 CSA#[5] CSA#[4] CSA#[3] CSA#[2] CSA#[1] CSA#[0] VSSQ GT LREF B VTT B RS#2 RS#1 RS#0 RS#2 RS#1 RS#0 CPUCLK HLOCK# BPRI# DEFER# BREQ0# CPURST # DQM[0..7] U14A B24 A24 A23 1,2 1,2 1,2 630CCLK HLOCK# BPRI# DEFER# BREQ0# CPURST # A18 T 26 R26 T 27 J26 M24 7 M D63 M D62 M D61 M D60 M D59 M D58 M D57 M D56 M D55 M D54 M D53 M D52 M D51 M D50 M D49 M D48 M D47 M D46 M D45 M D44 M D43 M D42 M D41 M D40 M D39 M D38 M D37 M D36 M D35 M D34 M D33 M D32 M D31 M D30 M D29 M D28 M D27 M D26 M D25 M D24 M D23 M D22 M D21 M D20 M D19 M D18 M D17 M D16 M D15 M D14 M D13 M D12 M D11 M D10 M D9 M D8 M D7 M D6 M D5 M D4 M D3 M D2 M D1 M D0 4.7u_1206_R HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0 6 1,2 1,2 1,2 1,2 1,2 630CCLK HLOCK# BPRI# DEFER# BREQ0# CPURST # 7 MA[0..14] C350 R29 P29 N29 CB11 1000p W28 V24 Y 29 Y 27 Y 25 W25 AA27 Y 24 AB28 AA25 AB25 AC28 AC26 AD28 AD26 AB24 AH22 AD20 AG 21 AJ21 AF20 AE19 AJ20 AD18 AH19 AE18 AG 18 AJ18 AG 17 AE17 AF16 AH16 W29 W27 W26 Y 28 Y 26 AA29 AA28 AA26 AB29 AB27 AB26 AC29 AC27 AD29 AD27 AD25 AG 22 AJ22 AF21 AH21 AE20 AG 20 AH20 AF19 AG 19 AJ19 AF18 AH18 AF17 AH17 AJ17 AG 16 CIRCUIT DIAGRAMS DQM[0..7] R69 150 1% 7 CSB#[0..3] MA[0..14] 10p 4,7,10 CSA#[0..3] CSB#[0..3] CB13 1000p CA53 0.1u + CT 12 10u/16V SIS-630 R75 630SDCLK Z0339 15_R VTT HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0 C116 10p R70 75 1% Z0338 CLOSE TO SiS-630 C351 HD#[0..63] HA#[3..31] HREQ#[0..4] HD#[0..63] 1,2 HA#[0..31] 1,2 HREQ#[0..4] 1 ADS# ADS# 1,2 R67 56 VTT CE2 1u 4.7u_1206_R CB12 1000p R66 150 1% Tit le Size ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. 630-1 (HOST/MEMORY) Document Number C–4 System Board (71-P2200-006) - Sheet 3 of 19 Tuesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: Sheet 3 of 6 19 C. CIRCUIT DIAGRAMS 11,19 (FOR INT ERNAL PLL) Z0403 AD[0..31] AD[0..31] R81 +1.8V +1.8V 12,18 +3V 2,3,5,6,7,8,9,10,11,12,13,14,15,16,18,19 BEAD_0805 Z0402 15 C118 INT #A INT #B INT #C INT #D PAR IRDY# T RDY# ST OP# SERR# FRAME# DEVSEL# PLOCK# 630PCLK U17C 74HC32 PCIRST #2 C/BE#3 C/BE#2 C/BE#1 C/BE#0 D15 D14 E13 A10 INT #A INT #B INT #C INT #D K5 J5 J4 J3 PAR IRDY# T RDY# ST OP# SERR# FRAME# DEVSEL# PLOCK# B12 F14 B13 A12 L5 A13 C13 D13 630PCLK AJ14 E6 9 Z0412 8 9,10,19 PCIRST #1 A H15 I DE AVD D PCI Interface ICHRDYA IDREQ[A] IIRQA CBLIDA PGNT #[2] PGNT #[1] PGNT #[0] IIOR#[A] IIOW#[A] IDACK#[A] IDSAA[2] IDSAA[1] IDSAA[0] U17D 74HC32 11 IDECSA#[1] IDECSA#[0] SiS-630 INT A# INT B# INT C# INT D# PAR IRDY# T RDY# ST OP# SERR# FRAME# DEVSEL# PLOCK# IIOR#[B] IIOW#[B] IDACK#[B] IDSAB[2] IDSAB[1] IDSAB[0] IDE Interface PCICLK PCIRST # Z0401 0 12 IDECSB#[1] IDECSB#[0] 0.1u AG9 AJ8 AF9 IDESAA2 IDESAA1 IDESAA0 AJ9 AH9 IDECSA#1 IDECSA#0 AG13 AE15 AF15 AD16 ICHRDYB IDEREQB IDE-IRQ15 CBLIDB AF13 AJ12 AH13 IDEIOR#B IDEIOW#B IDACK#B RP18 IDEIOR#A 10 IDEIOW#A 10 IDACK#A 10 T 105 T 106 IDESAA2 IDESAA1 IDESAA0 10 10 10 IDECSA#1 IDECSA#0 10 10 ICHRDYB IDEREQB IDE-IRQ15 CBLIDB 10 10 10 10 AE16 AJ13 AF14 IDESAB2 IDESAB1 IDESAB0 AH14 AG14 IDECSB#1 IDECSB#0 PERR# 11,19 10P8R x 2.7K 10 10 10 10 1 2 3 4 5 INT #C INT #B INT #A T Z0402 T Z0403 10 +3V 9 8 7 6 INT #D PREQ#2 PREQ#0 PREQ#1 10P8R x 2.7K R225 10 10 10 IDECSB#1 IDECSB#0 10 10 +3V +3V IDEIOR#B 10 IDEIOW#B 10 IDACK#B 10 IDESAB2 IDESAB1 IDESAB0 300 RN77 8P4R x 2.7K PGNT #2 PGNT #1 PGNT #0 T 107 T Z0404 1 2 3 4 8 7 6 5 MD62: PCI PLL Enable 0:Enable 1:Disable MD61: SDRAM DLL Enable 0:Enable 1:Disable MD60: CPU DLL Enable 0:Enable 1:Disable IDEDA[0..15] 0.1u IDEIOR#A IDEIOW#A IDACK#A +3V PERR# PLOCK# IRDY# 13 IDEDB[0..15] 7 + 0.1u AG8 AE8 AH8 ICHRDYA IDEREQA IDE-IRQ14 CBLIDA 9 8 7 6 SIS-630 CA221 CA222 CA223 CA224 CA225 CT 61 10u/16V 0.1u +3V IDEDA[0..15] 10 IDEDB[0..15] 10 MD[59..58]: SDRAM DLL DRC[1..0] (Default 00) MD[57..56]: CPU DLL DRC[1..0] (Default 00) +1.8V CA52 CA47 CA70 CA56 CA65 CA46 CA51 CA66 CT 10 + 4.7u/10V_1206 0.1u 10u/16V 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u MD[55..54]: PCI PLL DRC[1..0] (Default 00) MD38: VGA Interrupt Function 0:Disable 1:Enable Y9 A A21 A A20 A A19 A A11 A A10 A A9 L21 K21 J21 J20 J19 W21 W9 Y 21 SiS-630 POWER MD[0..63] MD[0..63] U14C I VD D I VD D I VD D I VD D I VD D I VD D I VD D I VD D I VD D I VD D I VD D I VD D I VD D I VD D I VD D OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD 3,7,10 +3V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS V18 V17 V16 V15 V14 V13 V12 U18 U17 U16 U15 U14 U13 U12 T 18 T 17 T 16 T 15 T 14 T 13 T 12 R18 R17 R16 RN61 SW2 1 2 3 4 MD44 MD43 MD42 MD41 8 7 6 5 Z0404 Z0405 Z0406 Z0407 8P4R x 4.7K_R CPU Frequency Ratio Select VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S J13 J14 J15 J16 J17 J18 M9 M21 N9 N21 P9 P21 R9 R21 T9 T 21 U9 U21 V9 V21 AA12 AA13 AA14 AA15 AA16 AA17 AA18 PVD D PVD D PVD D PVD D PVD D PVD D PVD D PVD D PVD D PVD D PVD D PVD D PVD D A B16 A B15 A B14 T 22 T8 R22 R8 P22 P8 N8 H16 H15 H14 +3V M 12 M 13 M 14 M 15 M 16 M 17 M 18 N12 N13 N14 N15 N16 N17 N18 P12 P13 P14 P15 P16 P17 P18 R12 R13 R14 R15 0.1u ICHRDYA IDEREQA IDE-IRQ14 CBLIDA FRAME# ICHRDYB IDREQ[B] IIRQB CBLIDB 14 7 10 R313 C/BE#[3] C/BE#[2] C/BE#[1] C/BE#[0] AF8 AE11 AD12 AE12 10 1 2 3 4 5 I DED A0 I DED A1 I DED A2 I DED A3 I DED A4 I DED A5 I DED A6 I DED A7 I DED A8 I DED A9 I DED A10 I DED A11 I DED A12 I DED A13 I DED A14 I DED A15 6 F16 C17 D17 14 11,19 11,19 11,19 11,19 11,19 11,19 11,19 11 PGNT #2 PGNT #1 PGNT #0 PREQ#[2] PREQ#[1] PREQ#[0] C/BE#[0..3] 11,19 C/BE#[0..3] 11 11 19 9 B18 E17 C18 A D31 A D30 A D29 A D28 A D27 A D26 A D25 A D24 A D23 A D22 A D21 A D20 A D19 A D18 A D17 A D16 A D15 A D14 A D13 A D12 A D11 A D10 A D9 A D8 A D7 A D6 A D5 A D4 A D3 A D2 A D1 A D0 B17 A17 D16 E16 C16 B16 A16 F 15 C15 B15 E15 A15 A14 B14 E14 C14 C12 D12 A11 E12 B11 C11 D11 F 12 B10 C10 E11 D10 E10 A9 B9 C9 11 PGNT #2 PGNT #1 PGNT #0 PREQ#2 PREQ#1 PREQ#0 SERR# ST OP# DEVSEL# T RDY# T 104 T Z0401 U14B AG 12 ID B0 A F 12 ID B1 A H11 B2 AG 11 ID B3 AJ10 ID ID B4 A H10 ID A F 10 B5 B6 A E10 ID B7 A E13 ID ID B8 AG 10 ID A D14 B9 B10 A F 11 ID B11 A E14 ID ID B12 AJ11 ID A D15 B13 B14 A H12 ID ID B15 A H7 ID A0 AG 7 A1 AJ6 ID ID A2 AG 6 ID A E6 ID A3 A4 A D6 A5 A F 5 ID ID A6 A E5 ID A E7 ID A7 A8 AG 5 A9 A F 7 ID ID A10 A F 6 ID A D8 ID A11 A12 A E9 A13 A D10 ID ID A14 AJ7 ID A15 19 PREQ#2 PREQ#1 PREQ#0 I DED B0 I DED B1 I DED B2 I DED B3 I DED B4 I DED B5 I DED B6 I DED B7 I DED B8 I DED B9 I DED B10 I DED B11 I DED B12 I DED B13 I DED B14 I DED B15 11 10u/16V CIRCUIT DIAGRAMS 19 + CT 15 RP19 10p 11,12,13 CA63 0.1u CB15 1000p A D31 A D30 A D29 A D28 A D27 A D26 A D25 A D24 A D23 A D22 A D21 A D20 A D19 A D18 A D17 A D16 A D15 A D14 A D13 A D12 A D11 A D10 A D9 A D8 A D7 A D6 A D5 A D4 A D3 A D2 A D1 A D0 R76 630PCLK SIS-630 CT 11 CA64 CA61 CA59 CA62 CA60 CA73 CA78 CA74 CA75 CA54 CA55 + 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 1/2 (200 MHz) 1/3 (300 MHz) 1/4 (400 MHz) 1/5 (500 MHz) 2/5 (250 MHz) 2/7 (350 MHz) 2/9 (450 MHz) 2/11 (550MHz) 1/6 (600 MHz) 1/7 (700 MHz) 1/8 (800 MHz) Reserved 2/13 (650 MHz) 2/15 (750 MHz) 2/3 (150 MHz) 1/2 (200 MHz) 1 2 3 4 8 7 6 5 4X2 DIPSWIT CH_R MD44 (NMI) MD43 (INT R) MD42 (A20M#) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 MD41 (IGNNE#) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 MD62 R30 4.7K_R MD61 R32 4.7K_R MD60 R33 4.7K_R MD59 R34 4.7K_R MD58 R35 4.7K_R MD57 R36 4.7K_R MD56 R38 4.7K_R MD55 R39 4.7K_R MD54 R41 4.7K_R MD38 R78 4.7K_R TheseH/Wtraps haveinternal pull-downresistors. T itle 10u/16V Size ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. 630-2, 630-3 (PCI/IDE/PWR) Docum ent Number Tuesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: Sheet 4 of 6 19 System Board (71-P2200-006) - Sheet 4 of 19 C–5 C. CIRCUIT DIAGRAMS 9 9 ENVDD Z 0526 Z 0527 Z 0543 Z 0542 T T T T T T T T T T T T T T T T T T T T T T T T T T T T J1 USB-48M 8 8 8 8 8 8 8 8 UV0UV0+ UV1UV1+ UV2UV2+ UV3UV3+ T152 T406 4 3 2 1 T Z0509 T Z0510 SB3V L62 5 Z0505 6 Z0506 7 TZ0511 8 TZ0512 RN73 8P4R x 15K BEAD_0805 H5 G3 H6 G4 G5 F3 E2 F1 F4 F5 T 153 T 154 USB Interface CLK48M UV0UV0+ UV1UV1+ UV2UV2+ UV3UV3+ UV4UV4+ OSC25MHI/CLK25M BIT _CLK U14D Z0545 SIS-630_6 RTC Interface CT 22 + CA79 10u/16V 0.1u L63 CA186 BEAD_0805 USB-48M BEAD 0.1u CA185 0.1u SB3V Z0508 CT 19 + C124 10p 22u/10V_1206 Z0510 630-14M AG2 AF3 AB6 R90 CA72 0.1u 630-14M 6 HSYNC VSYNC SSYNC 8 8 CT 14 + L11 Z0521 1 + CT18 10u/16V 0 +3V R107 ECLKAVDD BOUT GOUT ROUT 2 BEAD_0805 Z0522 R98 8 8 8 CA83 0.1u COMP 630VREF REST L12 Z0523 1 2 BEAD_0805 + CT21 10u/16V R102 Z0524 0 VCS# T7 T 10 VBHCLK VGCLK VBCLK SB3V 9 R357 4.7K U15 Z0513 Z0514 Z0515 Z0516 D6 C6 F8 E7 1 2 CS 3 SK 4 DI DO R358 0 R359 0_R SB3V R91 Z0517 Z0537 12 12 12 12 100_R 4.7K 8 RP20 T PITPI+ T POT PO+ R214 PME# NM93C46T CM8 PLED OC2# 8 7 6 5 VCC NC NC GND T 151 10 1 2 3 4 5 LAD2 LAD3 LAD1 LAD0 TZ0513 +3V 9 8 7 6 TZ0514 LIGHT -ON LDRQ# SIRQ T150 LIGHT -ON 17 10P8R x 4.7K B5 Z0519 Y3 25M A5 Z0520 R100 10K 1% 1 3 OC1# OC0# 2 4 Z0547 CT16 + CA67 10u/16V 0.1u PWRGD BAT OK BEAD_0805 C132 10P CA81 0.1u 0.1u 630SMCLK 2,6,7 630SMBDAT 2,6,7 SB3V System Board (71-P2200-006) - Sheet 5 of 19 8 7 6 5 +3V 8P4R x 4.7K 4.7K RN11 R77 SDATIN0 SDATIN1 4.7K R360 0_R R361 0 OC1# OC0# 8 8 PWRGD BATOK 12 15 SPDIF 8 7 6 5 8P4R x 100K PCMUSE 11 SB3V SB3V SB3V R362 R292 51K 0_R R363 0 OC3# 8 15 1 POWERSW# 2 C215 1K 1 2 3 4 1U SB1.8V Z0541 3 4 U19A 74HC14 PWRBTN# U19B 74HC14 C214 RT CVDD + 22u/10V_1206 CA84 BEAD Z0538 R80 1 2 3 4 Place near to AC'97 CODEC R295 Z0511 C216 10P 3.3V_RX J2 K4 B2 630SMCLK 630SMBDAT SYST EM-ON# T HERM# 2,6,7 630SMCLK 2,6,7 630SMBDAT R297 100K SB3V 12,15,16,18,19 SB1.8V 18 +3V 2,3,4,6,7,8,9,10,11,12,13,14,15,16,18,19 +1.8V 4,12,18 RT CVDD 15 ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. Title Size 630-4 ( VGA / SOUTH BRIDGE ) Document Number Tuesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: C–6 10u/16V 10u/16V 10 AJ4 AJ5 AH5 SYST EM-ON# 15 DRAMENB DRAMENA Z0539 Y4 32.768K L13 15 SMCLK SMBDAT GP15/SMBALT # Z0540 Z0509 L64 22u/10V_1206 CT17 + 0.1u 10 SMBus CA68 SB1.8V 10p R104 R112 10M L42 CT 50 + C120 REXT Z0512 3.3V_TX Z0507 GPIO SB3V Z0546 SB3V 15 CA69 RN62 Other 0.1u R89 R356 0 DCLKAVDD DDCCLK 8,9 DDCDATA 8,9 AF4 AH4 AG4 P6 2 0_0805 ECLKAVDD A6 B6 HRT XRXN HRT XRXP L10 1 +3V J9 T PI- J10 TPI+ J11 T PO- J12 TPO+ LAN Interface AC_BIT _CLK AG 15 ENT E ST 6 DCLKAVDD D5 Z0544 C5 OC2#/PLED0/GP8 OC4#/PLED1/GP9 G P 0/ PRE Q #3/ OC 0# G P1/ P G N T #3/ O C 1# G P2/ LDR Q 1#/ O C 3# GP 4 GP 5 GP 6 G P 7/S PD I F B8 12,16,19 BIT _CLK AC'97 Interface AC_SDIN[0] AC_SDIN[1] AC_SDOUT AC_SYNC AC_RESET# D8 E8 A7 D7 C7 B7 E9 A3 B3 D9 A8 C4 AU XO K BA T O K PWR O K SDAT IN0 SDAT IN1 SDAT O SYNC AC_RESET# 12,16,19 SDAT IN0 12,19 SDAT IN1 12,16,19 SDAT O 12,16,19 SYNC 12,16,19 AC_RESET # SPK RT C VD D 630SPK G2 K6 H3 K3 DACAVDD AH3 T8 EECS EESK EEDI GP3/EEDO RT C VS S 10K 1u R86 140 1% W2 W3 W4 VMA10/VBHCLK VMA11/VGCLK VBA1/VBCLK G1 16 R109 SiS-630 Keyboard Controller Interface KBDAT /GP10 KBCLK/GP11 PMDAT /GP12 PMCLK/GP13 KLOCK#/GP14 O S C32K HO D3 D4 C1 C2 Z0536 C3 KBDAT KBCLK PMDAT PMCLK +5V H1 PME# T HERM# O S C32K HI RING PME# T HERM# PSON# COMP VREF RSET VCS# H2 PWRBTN# +3V C119 630VREF AH6 AG1 BOUT GOUT ROUT Power Management Interface ACPILED EXT SMI# PWRBTN# RING PME# THERM# PSON# O VD DAU X 10K 15 15 15 15 D2 F10 E3 E4 E5 C8 D1 Z0531 COMP T 11 I VD DAU X 16 11,19 2 12 M5 L3 LDRQ# L2 LFRAME# SIRQ 10p REST AH2 AG3 OSCI DACAVDD T110 T146 T148 T147 AJ3 HSYNC VSYNC SSYNC K9 R79 LPC Interface RXA VD D +3V ACPILED DCLKAVDD DDCCLK DDCDAT A L9 15 PLACE THESE CIRCUIT S CLOSE T O SiS 630 C123 19 TZ0515 TZ0516 TZ0517 TZ0518 AF 2 AF 1 AE 4 AE 3 AE 2 AE 1 AD 5 AA 5 AD 4 AD 3 AD 2 AD 1 AC 5 AC 4 AC 3 Y6 AC 2 AC 1 AB 5 AB 4 AB 3 AB 2 AB 1 W5 AA 1 Y5 Y4 V5 Y3 Y2 Y1 U5 T6 W1 V4 V3 V2 V1 U4 U3 T5 U2 U1 T4 R5 T3 T2 T1 R6 R1 R2 R3 R4 P1 P5 P2 N3 N4 M1 N5 M2 M3 M4 L1 LDRQ# LFRAME# SIRQ 13 LDRQ# 13 LFRAME# 11,13 SIRQ 19 ECLKAVDD M6 K1 LAD0 L4 LAD1 K2 LAD2 LAD3 LAD0 LAD1 LAD2 LAD3 R[0..7] DACAVDD VGA Interface T XA VD D LAD[0..3] VDQM0 VDQM1 VDQM2 VDQM3 VDQM4 VDQM5 VDQM6 VDQM7 B4 13 AA4 AA3 AA2 V6 P3 P4 N1 N2 T Z0501 T Z0502 T Z0503 T Z0504 T Z0505 T Z0506 T Z0507 T Z0508 A4 7 T142 T138 T139 T140 T144 T143 T145 T141 19 V MD 0 V MD 1 V MD 2 V MD 3 V MD 4 V MD 5 V MD 6 V MD 7 V MD 8 V MD 9 V MD 10 V MD 11 V MD 12 V MD 13 V MD 14 V MD 15 V MD 16 V MD 17 V MD 18 V MD 19 V MD 20 V MD 21 V MD 22 V MD 23 V MD 24 V MD 25 V MD 26 V MD 27 DD C2D AT A/ V MD 28 DD C2C LK/ V MD 29 VB VS Y N C/ V MD 30 VB HS Y N C/ V MD 31 V BCA D/ V MD 32 V BCT L1/ V MD 33 V BCT L0/ V MD 34 V BB LANK N/ V MD 35 G 7/ V MD 36 G 6/ V MD 37 G 4/ V MD 38 G 5/ V MD 39 G 0/ V MD 40 G 1/ V MD 41 G 3/ V MD 42 G 2/ V MD 43 R7/ V MD 44 R6/ V MD 45 R5/ V MD 46 R4/ V MD 47 R3/ V MD 48 R0/ V MD 49 R1/ V MD 50 R2/ V MD 51 B0/ V MD 52 B1/ V MD 53 B2/ V MD 54 B3/ V MD 55 B4/ V MD 56 B5/ V MD 57 B6/ V MD 58 B7/ V MD 59 V MD 60 V MD 61 V MD 62 V MD 63 U30B 74HCT 14 DDC2DAT A U SB VD D 3 U SB VD D 4 LIGHT F2 17 E1 CIRCUIT DIAGRAMS 2.2K H4 14 R355 G7 G6 G4 G5 G0 G1 G3 G2 R7 R6 R5 R4 R3 R0 R1 R2 B0 B1 B2 B3 B4 B5 B6 B7 Z 0519 Z 0520 Z 0521 Z 0522 Z 0523 Z 0524 Z 0525 Z 0526 Z 0527 Z 0528 Z 0529 Z 0530 Z 0531 Z 0532 Z 0533 Z 0534 Z 0535 Z 0536 Z 0537 Z 0538 Z 0539 Z 0540 Z 0541 Z 0542 Z 0543 Z 0544 Z 0545 Z 0546 +5V G[0..7] B[0..7] 7 U30A 74HCT 14 Z0525 15 DDC2CLK DDC2DATA T 109T112T 116T 114T117T 120T 123T122T 132T 126T129T 128T 137T134 T111T 113T 115T118T 121T 119T124T 125T 130T131T 127T 135T136T 133 14 10 R103 630-14M T 25 T26T1 T 2 IAHSYNC IAVSYNC DDC2CLK 7 2.2K 1 14 14 R354 2 7 +5V Sheet 5 of 6 19 C. CIRCUIT DIAGRAMS SIS-630 CLOCK SETUP TABLE (FS2) (FS1) (FS0) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 SDRAM (MHz) 100 100 100 100 133 133 150 133 66.7 83.3 90 95 126 112 111 166 CPU (MHz) 66.7 100 150 133 66 100 100 133 66.7 83.3 90 95 95 112 166 166 +3V PCI (MHz) 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 REF (MHz) 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 Frequency Selection R266 10K R264 10K SW1 R268 R270 R272 R274 2.7K 2.7K 2.7K 2.7K Z0603 Z0604 Z0605 Z0606 1 2 3 4 BSEL0# 1 BSEL1# 1 +3V SW4 FS0 FS1 FS2 FS3 8 7 6 5 4X2 DIPSWITCH R267 R269 R271 R273 10K 10K 10K 10K Board ID. R364 R365 R366 R367 10K 10K 10K 10K 1 2 3 4 Z0625 Z0626 Z0627 Z0628 8 7 6 5 ID0 ID1 ID2 ID3 4X2 DIPSWITCH R368 R369 R370 R371 47K 47K 47K 47K 13 13 13 13 CIRCUIT DIAGRAMS 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 1 1 1 1 1 1 1 NOT E: PCICLK<37.5MHz PLACE T HESE CAPACIT ORS NEAR CLOCK GENERAT OR (By-Pass) +3V +3V L32 HB-1H2012-90 C341 PLACE THESE RESISTORS NEAR CLOCK GENERATOR C344 33p_R 33p_R Z0601 + 22u/10V_1206 CA169 CA170 CA166 CA168 CB25 CB24 CB22 CB23 0.1u 0.1u 0.1u 0.1u 1000p 1000p 1000p 1000p 1 15 19 27 30 36 42 6 3 16 22 33 39 +2.5V 10 L34 BK1608LL121-120 VDDREF CPUCLK0 CPUCLK1 CPUCLK2 VDDSDR VDDSDR VDDSDR VDDSDR VDDSDR VDDSDR FS1/PCICLK0 FS2/PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 VDDPCI 46 45 43 C190 C199 C103 C93 C205 C98 C200 C203 C196 C202 10p 10p 10p 10p 10p 10p 10p 10p 10p 10p_R 7 8 9 11 12 13 14 FS1 FS2 2 48 FS3 25 26 CPUV FS0 TZ0601 T 155 Z0608 R252 R260 Z0607 10 10 CPUCLK 630CCLK 1 3 R261 R258 R249 R262 R52 R372 22 22 22 22 22 22 630PCLK 1420PCLK MINI-PCLK 626PCLK 869PCLK ZV-PCLK 4 11 19 13 13 9 R56 R253 R257 22 22 22 XI 630-14M 626F14M 9 5 13 R236 22 USB-48M 5 Z0609 Z0610 Z0624 Z0629 TZ0602 T 156 GNDREF GNDSDR GNDSDR GNDSDR GNDSDR FS3/REF0 REF1 Z0611 R48 24_48/CPU2V_3V# FS0/48MHZ GNDPCI 10K +3V DIMCLK[0..7] + CT 48 10u/16V 47 CA179 CA178 CB27 CB26 0.1u 0.1u 1000p 1000p 44 24 23 GNDL 17 18 20 21 28 29 31 32 34 35 37 38 40 41 Z0612 Z0613 Z0614 Z0615 Z0616 Z0617 Z0618 Z0619 Z0620 TZ0603 TZ0604 TZ0605 TZ0606 TZ0607 R247 R245 R237 R235 R230 R234 R46 R231 R246 7 DIMCLK0 DIMCLK1 DIMCLK2 DIMCLK3 DIMCLK4 DIMCLK5 DIMCLK6 DIMCLK7 10 10 10 10 10 10 10 10 10 630SDCLK T 158 T 157 T 160 T 161 T 159 SCLK SDATA X1 2,5,7 630SMCLK 2,5,7 630SMBDAT SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9 SDRAM10 SDRAM11 SDRAM12 SDRAM13 VDDLCPU X2 Z0602 C92 C89 C83 C80 C191 C193 C75 C188 10p 10p 10p 10p 10p 10p 10p 10p 3 ICS9248-126 5 C185 C192 10p U11 4 (FS3) Y1 PLACE THESE CAPACIT ORS NEAR CLOCK GENERAT OR (By-Pass) Z0621 Z0622 14.318MHz C201 10p +5V C342 33p C204 10p C343 33p CLOCK GENERAT OR DECOUPLING +3V +2.5V +3V C362 10UF/10V C65 0.1u + C206 22u/10V_1206 C179 470p +2.5V 1,9,12,18 +3V 2,3,4,5,7,8,9,10,11,12,13,14,15,16,18,19 C180 0.1u T it le Size ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. CLOCK GENERATOR Document Number T uesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: Sheet 6 of 6 19 System Board (71-P2200-006) - Sheet 6 of 19 C–7 C. CIRCUIT DIAGRAMS 3,4,10 MD[0..63] 3 MA[0..14] 3 DQM[0..7] SB3V 5,12,15,16,18,19 +3V 2,3,4,5,6,8,9,10,11,12,13,14,15,16,18,19 MD[0..63] MA[0..14] +3V DQM[0..7] R200 0_1206 +3V Z0701 15 6 18 26 40 41 49 59 73 84 90 102 110 124 133 143 157 168 CIRCUIT DIAGRAMS DIMCLK0 0_1206 Z0733 R43 8.2K DIMCLK4 10p +3V Z0717 15 Z0735 C94 CN15 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 C101 R53 6 18 26 40 41 49 59 73 84 90 102 110 124 133 143 157 168 R54 R198 + CT 9 10p R42 8.2K CN14 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 VC C3 +3V 10u/16V 10p R29 DIMCLK2 Z0703 15 R50 0 MA11 MA12 Z0705 122 39 132 C43 BA[0] BA[1] A[13] 10p 47K x 4 Z0706 8 Z0707 7 Z0708 6 Z0709 5 Z0710 5 Z0711 6 Z0712 7 Z0713 8 47K x 4 SRAS# SCAS# RN9 3 3 SRAS# SCAS# 3 CT 20 10u/16V RAMW# + CT 24 10u/16V T 196 + CT 3 + 10u/16V 2,5,6 630SMCLK 2,5,6 630SMBDAT C186 470p + CT 13 10u/16V CA45 CA57 CA76 CA33 CA27 CA11 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u T 193 T 191 T 194 T 192 21 22 52 53 105 106 136 137 115 111 CSA#0 CSA#1 CSB#0 CSB#1 30 114 45 129 RAMW# T Z0728 27 48 DIMCLK0 DIMCLK1 DIMCLK2 DIMCLK3 CKE0 CKE1 42 125 79 163 128 63 630SMCLK 630SMBDAT 83 82 165 166 167 T Z0727 T Z0726 T Z0725 T Z0724 R62 0 81 24 25 50 Z0714 31 Z0715 44 R51 0 CB[0] CB[1] CB[2] CB[3] CB[4] CB[5] CB[6] CB[7] SRAS# SCAS# S#[0] S#[1] S#[2] S#[3] WE0# WE2# CK[0] CK[1] CK[2] CK[3] CKE[0] CKE[1] SCL SDA SA[0] SA[1] SA[2] WP/NC NC NC NC NC/OE#0 NC/OE#2 addr = 1010000b VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S RN14 1 2 3 4 4 3 2 1 10p 1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162 C45 DQM[0] DQM[1] DQM[2] DQM[3] DQM[4] DQM[5] DQM[6] DQM[7] NC NC NC NC Z0704 15 28 29 46 47 112 113 130 131 61 62 80 108 R31 DIMCLK3 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 T 182 3 CSA#[0..3] 3 CSB#[0..3] 6 DIMCLK[0..7] 2 CKE[0..3] CSA#[0..3] T Z0720 T Z0723 T Z0722 T 185 T Z0721 T 183 T 184 CSB#[0..3] DIMCLK[0..7] DIMM 168 DIMCLK5 R254 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 33 117 34 118 35 119 36 120 37 121 38 123 126 MA11 MA12 Z0722 122 39 132 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 28 29 46 47 112 113 130 131 Z0719 15 C197 10p T 165 DIMCLK6 R28 Z0718 15 R250 0 C40 A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10]/AP A[11] A[12] BA[0] BA[1] A[13] T 164 10p DIMCLK7 R27 Z0720 15 T 166 C42 RN13 4 3 2 1 4 3 2 1 RN10 10p T 168 3 3 47K x 4 Z0723 5 Z0724 6 Z0725 7 Z0726 8 Z0727 5 Z0728 6 Z0729 7 Z0730 8 47K x 4 SRAS# SCAS# SRAS# SCAS# T 167 3 RAMW# T 195 T 169 115 111 CSA#2 CSA#3 CSB#2 CSB#3 30 114 45 129 RAMW# T Z0708 27 48 DIMCLK4 DIMCLK5 DIMCLK6 DIMCLK7 CKE2 CKE3 42 125 79 163 128 63 630SMCLK 630SMBDAT 2,5,6 630SMCLK 2,5,6 630SMBDAT 21 22 52 53 105 106 136 137 +3V R26 8.2K 83 82 Z0734 165 166 167 T 170 T 187 T 190 T 188 T 186 CA10 CA20 CA35 CA8 CA50 CA165 0.1u 0.1u 0.1u 0.1u 0.1u T Z0732 T Z0731 T Z0730 T Z0729 81 24 25 50 Z0731 31 Z0732 44 DQM[0] DQM[1] DQM[2] DQM[3] DQM[4] DQM[5] DQM[6] DQM[7] CB[0] CB[1] CB[2] CB[3] CB[4] CB[5] CB[6] CB[7] SRAS# SCAS# S#[0] S#[1] S#[2] S#[3] WE0# WE2# CK[0] CK[1] CK[2] CK[3] CKE[0] CKE[1] SCL SDA SA[0] SA[1] SA[2] addr = 1010001b WP/NC NC NC NC NC/OE#0 NC/OE#2 0.1u R60 0 R251 0 REOE/NC DQ[0] DQ[1] DQ[2] DQ[3] DQ[4] DQ[5] DQ[6] DQ[7] NC DQ[8] DQ[9] DQ[10] DQ[11] DQ[12] DQ[13] DQ[14] DQ[15] NC DQ[16] DQ[17] DQ[18] DQ[19] DQ[20] DQ[21] DQ[22] DQ[23] NC DQ[24] DQ[25] DQ[26] DQ[27] DQ[28] DQ[29] DQ[30] DQ[31] NC DQ[32] DQ[33] DQ[34] DQ[35] DQ[36] DQ[37] DQ[38] DQ[39] NC DQ[40] DQ[41] DQ[42] DQ[43] DQ[44] DQ[45] DQ[46] DQ[47] NC DQ[48] DQ[49] DQ[50] DQ[51] DQ[52] DQ[53] DQ[54] DQ[55] NC DQ[56] DQ[57] DQ[58] DQ[59] DQ[60] DQ[61] DQ[62] DQ[63] T 178T 181 T 179T 180 T itle CKE[0..3] T 171 T 172 T 175 T 173 T 174 T 176 T 177 DIMM 168 Size ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. SDRAM DIMM1 & DIMM2 Document Number Tuesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 System Board (71-P2200-006) - Sheet 7 of 19 Z0721 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 T Z0709 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 T Z0710 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 T Z0711 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 T Z0712 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 T Z0713 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 T Z0714 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 T Z0715 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 T Z0716 T Z0717 T Z0718 T Z0719 Date: C–8 147 2 3 4 5 7 8 9 10 164 11 13 14 15 16 17 19 20 51 55 56 57 58 60 65 66 67 146 69 70 71 72 74 75 76 77 145 86 87 88 89 91 92 93 94 135 95 97 98 99 100 101 103 104 134 139 140 141 142 144 149 150 151 109 153 154 155 156 158 159 160 161 VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S C104 REOE/NC DQ[0] DQ[1] DQ[2] DQ[3] DQ[4] DQ[5] DQ[6] DQ[7] NC DQ[8] DQ[9] DQ[10] DQ[11] DQ[12] DQ[13] DQ[14] DQ[15] NC DQ[16] DQ[17] DQ[18] DQ[19] DQ[20] DQ[21] DQ[22] DQ[23] NC DQ[24] DQ[25] DQ[26] DQ[27] DQ[28] DQ[29] DQ[30] DQ[31] NC DQ[32] DQ[33] DQ[34] DQ[35] DQ[36] DQ[37] DQ[38] DQ[39] NC DQ[40] DQ[41] DQ[42] DQ[43] DQ[44] DQ[45] DQ[46] DQ[47] NC DQ[48] DQ[49] DQ[50] DQ[51] DQ[52] DQ[53] DQ[54] DQ[55] NC DQ[56] DQ[57] DQ[58] DQ[59] DQ[60] DQ[61] DQ[62] DQ[63] Z0716 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 T Z0701 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 T Z0702 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 T Z0703 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 T Z0704 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 T Z0705 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 T Z0706 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 T Z0707 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 NC NC NC NC 15 A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10]/AP A[11] A[12] 147 2 3 4 5 7 8 9 10 164 11 13 14 15 16 17 19 20 51 55 56 57 58 60 65 66 67 146 69 70 71 72 74 75 76 77 145 86 87 88 89 91 92 93 94 135 95 97 98 99 100 101 103 104 134 139 140 141 142 144 149 150 151 109 153 154 155 156 158 159 160 161 1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162 Z0702 33 117 34 118 35 119 36 120 37 121 38 123 126 61 62 80 108 R55 DIMCLK1 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 Sheet 7 of 6 19 C. CIRCUIT DIAGRAMS L23 BK1608LL121-120 L20 BK1608LL121-120 DDCDAT A 5,9 G +5V Q14 2N7002 C156 5 R156 VSYNC 47 S Z0813 D L21 Z0814 1 2 BK1608HS601-600 220p_R G +5V Q13 2N7002 Z0819 Z0821 HSYNC 47 Z0815 S D L22 Z0816 1 2 BK1608HS601-600 Z0822 L50 1 2 BK1608LL121-120 Z0820 T Z0801 T Z0802 Z0809 L49 1 2 BK1608LL121-120 Z0810 L48 1 2 BK1608LL121-120 Z0811 D17 D6 DA204U DA204U DA204U A 5,9 R158 1K D20 +5V A C Z0824 1N4148 CRT CON. D16 C A 220p_R 8 15 7 14 6 13 5 12 4 11 3 10 2 9 1 AC ROUT R330 75 R331 75 R332 75 C 5 A GOUT C BOUT 5 AC 5 AC T198 T197 R155 1K CIRCUIT DIAGRAMS 5 R157 DDCCLK C157 CN26 C151 C149 C146 C150 C148 C147 22p 22p 22p 22p 22p 22p Z0835 PIN16.17=GND +3V R373 L40 HB-1H3216-70_1206 F6 Z0802 R284 CA183 POLY SW1.1A +5V L55 HB-1H3216-70_1206 470K OC0# CB29 + C126 10u/16V 0.1u R374 5 CA210 R285 560K 1000p R95 Z0836 VCC 1DAT A1DATA+ GND VCC 2DAT A2DATA+ GND Z0801 2 Z0803 L123 BEAD_0603 3 Z0804 L124 BEAD_0603 R96 22 R94 15K UV0- 5 CB35 R376 560K UV0+ 5 C211 C212 47p 47p 2 3 1000p R377 BK1608LL121-120 UV2- 5 R378 BK1608LL121-120 UV2+ 5 Z0832 Z0830 R379 15K Z0831 R380 15K C270 C271 47p 47p Z0807 L125 Z0808 L126 5 OC1# 5 OC2# 5 OC3# 5 0 R382 Z0805 7 OC2# R381 4 C358 C359 33P 33P 6 5 0_R CN35 4 5 OC1# 0 R375 PLACE THESE COMPONENT NEAR SiS630 22 1 R97 15K +5V Z0833 470K 0.1u CN19 1 POLY SW 1.1A + C269 10u/16V PLACE THESE COMPONENT NEAR SiS630 Z0839 F10 Z0834 BEAD_0603 L41 HB-1H3216-70_1206 F5 Z0806 R286 OC0# POLY SW1.1A +5V CA184 C360 C361 33P 33P CB30 + C125 10u/16V 0.1u R287 560K 1000p 5 6 OC1# BEAD_0603 8 5 0 R384 Z0825 470K R383 5 7 Z0827 Z0828 L56 HB-1H3216-70_1206 Z0826 0_R R385 CA211 8 + C272 10u/16V 0.1u USB-CON F11 Z0806 POLY SW 1.1A +5V 0_R R386 Z0829 470K CB36 R387 560K 1000p 0_R EXT-USB GND1~4=GND PLACE THESE COMPONENT NEAR SiS630 Z0837 Z0838 R114 15K R113 15K PLACE THESE COMPONENT NEAR SiS630 R110 22 UV1- 5 R111 22 UV1+ 5 C130 C129 47p 47p R390 15K R391 15K R388 BK1608LL121-120 UV3- 5 R389 BK1608LL121-120 UV3+ 5 C273 C274 47p 47p ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. SB3V 5,12,15,16,18,19 +5V 2,5,6,10,11,12,13,14,15,16,17,18,19 +3V 2,3,4,5,6,7,9,10,11,12,13,14,15,16,18,19 T it le CRT,USB,Mini-PCI CONNECTORS Size Document Number Tuesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: Sheet 8 of 6 19 System Board (71-P2200-006) - Sheet 8 of 19 C–9 C. CIRCUIT DIAGRAMS 0 SDAI R226 0 SDAO 19 ZB[0..7] ZG[0..7] 95 96 97 98 99 101 102 103 ZB[0..7] ZG7 ZG6 ZG5 ZG4 ZG3 ZG2 ZG1 ZG0 104 105 106 107 109 110 111 112 ZB7 ZB6 ZB5 ZB4 ZB3 ZB2 ZB1 ZB0 114 115 116 117 118 119 122 123 T 213 T 211 T 212 T 210 T 215 T 214 T 216 T 217 T Z0912 T Z0913 T Z0914 T Z0915 T Z0916 T Z0917 T Z0918 T Z0919 133 134 135 136 137 138 139 140 T 221 T 220 T 218 T 219 T 224 T 225 T 223 T 222 T Z0920 T Z0921 T Z0922 T Z0923 T Z0924 T Z0925 T Z0926 T Z0927 142 143 144 145 146 147 148 149 T 228 T 226 T 229 T 227 T 231 T 230 T 234 T 232 T Z0928 T Z0929 T Z0930 T Z0931 T Z0932 T Z0933 T Z0934 T Z0935 151 152 153 154 156 157 158 159 IARED7 IARED6 IARED5 IARED4 IARED3 IARED2 IARED1 IARED0 IAGRN7 IAGRN6 IAGRN5 IAGRN4 IAGRN3 IAGRN2 IAGRN1 IAGRN0 IABLU7 IABLU6 IABLU5 IABLU4 IABLU3 IABLU2 IABLU1 IABLU0 Overlay Interface Port T Z 0903 Panel Input Interface Port A Port A C54 C52 C49 C47 10p 10p 10p 10p U12 PAGRN7 PAGRN6 PAGRN5 PAGRN4 PAGRN3 PAGRN2 PAGRN1 PAGRN0 PABLU7 PABLU6 PABLU5 PABLU4 PABLU3 PABLU2 PABLU1 PABLU0 PBGRN7 PBGRN6 PBGRN5 PBGRN4 PBGRN3 PBGRN2 PBGRN1 PBGRN0 Panel Interface Port B Graphics PBBLU7 PBBLU6 PBBLU5 PBBLU4 PBBLU3 PBBLU2 PBBLU1 PBBLU0 Input Port B Testing PVSYNC PHSYNC PDE Power and Ground PCLK CT 49 0.1u 0.1u 0.1u 0.1u 0_1206 CA159 CA39 0.1u 0.1u 0.1u 0.1u 0.1u V SSP P V SSA P BA7 BA6 BA5 BA4 BA3 BA2 BA1 BA0 59 58 57 56 46 45 44 43 RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 42 39 38 37 36 35 34 33 GB7 GB6 GB5 GB4 GB3 GB2 GB1 GB0 31 30 29 28 27 26 25 24 BB7 BB6 BB5 BB4 BB3 BB2 BB1 BB0 61 64 62 LCD-VS LCD-HS LCD-ON 54 LCDPCLK RN40 1 2 3 4 1 2 3 4 RN37 GB7 GB6 GB5 GB4 GB3 GB2 GB1 GB0 RN48 1 2 3 4 1 2 3 4 RN42 BB7 BB6 BB5 BB4 BB3 BB2 BB1 BB0 LCD-VS LCD-HS LCD-ON R474 22 LCD-CLK XI R58 1 2 3 4 RN45 1 2 3 4 RN46 C79 C77 C74 C72 C69 C67 C64 10p 10p 10p 10p 10p 10p 10p 1 2 3 4 8P4R x BEAD 1 2 3 4 8P4R x BEAD C102 C100 C99 C97 C96 C91 C88 C85 10p 10p 10p 10p 10p 10p 10p 8 7 6 5 8 8P4R x BEAD 7 6 5 8P4R x BEAD C59 C57 C55 C53 C182 C51 C48 C46 10p 10p 10p 10p 10p 10p 10p 10p 8 7 6 5 8 8P4R x BEAD 7 6 5 8P4R x BEAD C73 C71 C68 C184 C66 C63 C61 C183 10p 10p 10p 10p 10p 10p 10p 10p 8 7 6 5 8 8P4R x BEAD 7 6 5 8P4R x BEAD C95 C90 C87 C84 C81 C78 C76 C189 10p 10p 10p 10p 10p 10p 10p 10p PBA7 PBA6 PBA5 PBA4 PBA3 PBA2 PBA1 PBA0 10 10 10 10 10 10 10 10 PRB7 PRB6 PRB5 PRB4 PRB3 PRB2 PRB1 PRB0 10 10 10 10 10 10 10 10 PGB7 PGB6 PGB5 PGB4 PGB3 PGB2 PGB1 PGB0 10 10 10 10 10 10 10 10 PBB7 PBB6 PBB5 PBB4 PBB3 PBB2 PBB1 PBB0 10 10 10 10 10 10 10 10 10 6 1M_R Z0904 T_0901 C107 R227 CA30 CA40 0.1u 0.1u C105 22P_R CA158 CA42 CA161 0 SCSN CA228 CA229 CA32 0.1u 0.1u 0.1u 0.1u 0.1u 0_0805 0_0805 +2.5V 1,6,12,18 +3V 2,3,4,5,6,7,8,10,11,12,13,14,15,16,18,19 +5V 2,5,6,8,10,11,12,13,14,15,16,17,18,19 T itle Size System Board (71-P2200-006) - Sheet 9 of 19 ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. LCD SCALING CONTROLLER Document Number T uesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: C – 10 10p 10 10 10 10 10 10 10 10 10 10 10 LCD-CLK 48 49 RN52 8 7 6 5 8 7 6 5 C82 10p PGA7 PGA6 PGA5 PGA4 PGA3 PGA2 PGA1 PGA0 0.1u 0.1u 10u/16V 73 72 71 70 69 68 67 66 RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 22P_R Z0902 CT 8 GA7 GA6 GA5 GA4 GA3 GA2 GA1 GA0 RN54 5 6 7 8 8P4R x BEAD 5 6 7 8 8P4R x BEAD Y2 L105 L106 L9 +3V 84 83 82 79 78 77 76 75 4 3 2 1 4 3 2 1 14.318MHz_R CA31 CA41 CA226 CA227 CA160 CA38 CA181 CA36 CA37 10u/16V 0.1u 50 51 VS S3 VS S3 VS S3 VS S3 VS S3 VS S3 VS S3 VS S3 VS S3 VS S3 VS S3 VS S3 4 14 40 55 65 80 94 108 120 126 130 160 VS S2 VS S2 VS S2 VS S2 1 41 81 121 VD D3 VD D3 VD D3 VD D3 VD D3 VD D3 VD D3 VD D3 7 23 32 47 63 87 113 155 VD D2 VD D2 VD D2 VD D2 VD D2 VD D2 VDDAP VDDPP Z0901 0_0805 0_0805 0_1206 XO RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 Z0912 Z0913 +2.5V L100 L101 L35 20 60 74 100 128 141 52 53 V DDA P V DDP P XI 93 92 91 90 89 88 86 85 RN50 RN44 BA7 BA6 BA5 BA4 BA3 BA2 BA1 BA0 PBRED7 PBRED6 PBRED5 PBRED4 PBRED3 PBRED2 PBRED1 PBRED0 IBGRN7/YUVPLLC2 IBGRN6/YUVVS IBGRN5/YUVHS IBGRN4 IBGRN3 IBGRN2/VREF IBGRN1/HREF IBGRN0/CREF 2 3 AP SP C56 10p PARED7 PARED6 PARED5 PARED4 PARED3 PARED2 PARED1 PARED0 ZURAC IBBLU7/UV7 IBBLU6/UV6 IBBLU5/UV5 IBBLU4/UV4 IBBLU3/UV3 IBBLU2/UV2 IBBLU1/UV1 IBBLU0/UV0 C58 10p GA7 GA6 GA5 GA4 GA3 GA2 GA1 GA0 10 10 10 10 10 10 10 10 Z 0904 Z 0905 Z 0906 Z 0907 Z 0908 Z 0909 Z 0910 Z 0911 Host Graphics IBRED7/Y7 IBRED6/Y6 IBRED5/Y5 IBRED4/Y4 IBRED3/Y3 IBRED2/Y2 IBRED1/Y1 IBRED0/Y0 C60 10p PRA7 PRA6 PRA5 PRA4 PRA3 PRA2 PRA1 PRA0 T T T T T T T T T Z 0901 T Z 0902 150 5 6 8 9 10 11 12 OH S OV S O VF B O VI OV B O VG OV R O VC LK ZG[0..7] ZR7 ZR6 ZR5 ZR4 ZR3 ZR2 ZR1 ZR0 127 129 ZR[0..7] ZR[0..7] 19 ZV-PCLK I NT N R ST N SCS N S DAI S DAO S CL PO WERD N 19 10p SCSN SDAI SDAO SCL T 207 T 209 T 208 T 204 T 206 T 205 T 203 T 202 T 199 T 200T 201 IAHSYNC IAVSYNC ZV-PCLK VGCLK 124 125 6 5 I AC LK Y U VLLC/ I BC LK CIRCUIT DIAGRAMS 4,10,19 PCIRST #1 4 INT #D 5 IAHSYNC 5 IAVSYNC 5 6 7 8 8P4R x BEAD 5 6 7 8 C62 8P4R x BEAD 22 21 19 18 17 16 15 13 R223 4 3 2 RN41 1 4 3 2 1 RN38 RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 SCL C LAM P DDCDAT A 0 131 132 5,8 R220 ADC CLK P ADC CLK N DDCCLK IA VS Y N C IA HS Y N C 5,8 Sheet 9 of 6 19 C. CIRCUIT DIAGRAMS 4 IDEDA[0..15] 4,9,19 ON=1=H R175 10K SW-2 SW-3 SW-4 15" X-TF T HYUNDAI HT 15X11-100 OFF=0=L OFF OFF OFF OFF 1K R173 R172 R171 R169 R168 R167 Z1001 Z1002 Z1003 Z1004 Z1005 Z1006 R165 R164 R162 82 33 33 82 33 82 R166 4.7K 8P4R x 33 Z1026 1 Z1034 2 Z1025 3 Z1033 4 Z1030 1 Z1038 2 Z1029 3 Z1037 4 8P4R x 33 R174 5.6K 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 33 Z1008 33 Z1007 33 Z1009 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 Z1028 Z1036 Z1027 Z1035 Z1032 Z1040 Z1031 Z1039 RN29 RN31 1 2 3 4 1 2 3 4 8P4R x 33 IDEDA4 8 IDEDA11 7 IDEDA5 6 IDEDA10 5 IDEDA0 8 IDEDA15 7 6 IDEDA1 IDEDA14 5 8P4R x 33 ID2 15.1" X- TFT SHARP LQ 150X1DG51 ON OFF OFF OFF ID3 15.1" X-TFT LG LM151X2-C2TH OFF ON OFF OFF OFF OFF ON OFF ID4 CIRCUIT DIAGRAMS R170 IDEREQA IDEIOW#A IDEIOR#A ICHRDYA IDACK#A IDE-IRQ14 CN30 RN32 8 7 6 5 8 7 6 5 RN30 IDEDA6 IDEDA9 IDEDA7 IDEDA8 IDEDA2 IDEDA13 IDEDA3 IDEDA12 +3V 4 4 4 4 4 4 SW-1 ID1 PCIRST#1 PCIRST#1 +3V RN63 TZ1001 T256 TZ1002 T258 Z1041 R163 Z1042 R161 R159 10K +5V 3,7 3,7 3,7 3,7 CBLIDA 4 IDESAA2 4 IDECSA#1 4 33 33 SW3 5 6 7 8 MD32 MD33 MD36 MD39 Z1059 Z1060 Z1061 Z1062 4 3 2 1 1 2 3 4 8P4R x 10K 8 7 6 5 4X2 DIPSWITCH HDD CON. IDESAA1 IDESAA0 IDECSA#0 HDD-LED# J2 1 2 3 LCDVCC CON. R160 +5V +5V AUDIO-L CD-GND PCIRST#1 AUDIO-R 16 R133 R127 4 3 2 1 RN16 RN19 4 3 2 1 4 3 2 1 RN17 33 82 5 6 7 8 8P4R x 33 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 8P4R x 33 5 Z1010 6 Z1011 7 Z1012 8 Z1013 5 Z1014 6 Z1015 7 Z1016 8 Z1017 8P4R x 33 Z1018 Z1019 Z1020 Z1021 Z1022 Z1023 R122 10K CD-LED# R121 10K FB18 +5V 0_1206 R116 470 Z1092 CA87 CA88 CT52 0.1u 10u/10V 0.1u T Z1006 Z1024 +5V 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 RN20 8P4R x 33 5 Z1043 4 IDEDB8 6 Z1044 3 IDEDB9 7 Z1045 2 IDEDB10 8 Z1046 1 IDEDB11 5 IDEDB12 Z1047 4 6 IDEDB13 Z1048 3 7 IDEDB14 Z1049 2 8 IDEDB15 Z1050 1 RN18 8P4R x 33 82 Z1051 R134 33 Z1052 R131 Z1053 R126 33 T257 T Z1004 CBLIDB 33 Z1054 R125 33 Z1055 R124 C Z1056 5 G ENVDD Q11 2N7002 CN7 +3V R213 R241 5 6 7 8 RN39 IDEIOW#B ICHRDYB IDE-IRQ15 IDESAB1 IDESAB0 IDECSB#0 33 82 4 3 2 1 8P4R x 33 R212 10K RN47 5 6 7 8 5 6 7 8 RN43 IDEDB7 IDEDB6 IDEDB5 IDEDB4 IDEDB3 IDEDB2 IDEDB1 IDEDB0 R238 1K TZ1007 TZ1008 8P4R x 33 4 Z1076 3 Z1077 2 Z1078 1 Z1079 4 Z1080 3 Z1081 2 Z1082 1 Z1083 8P4R x 33 Z1084 Z1085 Z1086 Z1087 Z1088 Z1089 +5V FB19 0_1206 Z1093 CA238 CA239 CT63 Z1091 +5V R208 10K 0.1u 10u/10V R206 470_R T Z1012 0.1u CD-LED# 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 10K LS-120 CON. T261 9 9 9 9 9 9 +5V R472 Z263 Z264 RN7 8P4R x 33 5 Z1063 4 6 Z1064 3 7 Z1065 2 8 Z1066 1 5 Z1067 4 6 Z1068 3 7 Z1069 2 8 Z1070 1 RN6 8P4R x 33 82 Z1071 R228 33 Z1072 R222 33 Z1073 R215 T253 T Z1015 LCD-HS IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15 R473 15 IDEREQB 4 IDEIOR#B 4 IDACK#B 4 9 Z1094 9 9 9 C363 9 9 10p PRA6 PRA7 PGA0 PGA1 PGA2 PGA3 9 9 9 9 Z1095 9 9 PGA4 PGA5 PGA6 PGA7 PBA0 PBA1 9 9 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 T Z1013 PRA0 PRA1 PRA2 PRA3 PRA4 PRA5 C364 9 9 10p 9 9 9 9 CBLIDB Z1074 R211 Z1075 R209 PBA2 PBA3 PBA4 PBA5 PBA6 PBA7 LCD-VS LCD-CLK LCD-VS LCD-CLK S LCDVCC 5 4 C44 C181 3.3u/16V 3.3u/16V 33 33 R45 5.6K 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 T Z1014 T252 PRB0 PRB1 PRB2 PRB3 PRB4 PRB5 9 9 9 9 9 9 PRB6 PRB7 PGB0 PGB1 PGB2 PGB3 9 9 9 9 9 9 PGB4 PGB5 PGB6 PGB7 PBB0 PBB1 9 9 9 9 9 9 PBB2 PBB3 PBB4 PBB5 PBB6 PBB7 9 9 9 9 9 9 LCD-HS LCD-ON 9 9 LCD CON. CBLIDB 4 IDESAB2 4 IDECSB#1 4 +5V LCD-CLK R57 Z1058 ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. 15 T Z1011 G 6 CN8 T265 R128 CBLIDB T Z1009 T Z1010 10K D Q10 DTD114EK CBLIDB 4 IDESAB2 4 IDECSB#1 4 15 PCIRST#1 D D 0.1u IDEREQB 4 IDEIOR#B 4 IDACK#B 4 T254 CD-ROM CON. 3 Z1057 B D SI3456DV R136 5.6K T Z1005 1 CA137 T259 T262 T260 15 47K 2 IDEDB[0..15] R229 4 4 4 4 4 4 R204 47K T R1 LCD-VS 4,9,19 Z1090 R202 E CN22 IDEDB7 IDEDB6 IDEDB5 IDEDB4 IDEDB3 IDEDB2 IDEDB1 IDEDB0 R130 1K IDEIOW#B ICHRDYB IDE-IRQ15 IDESAB1 IDESAB0 IDECSB#0 10K D +3V 4 +3V T255 R142 15 +5V IDEDB[0..15] 16 16 4,9,19 4 4 4 4 4 4 +12V S 4 1-2 Pin : LCDVCC = +5V 2-3 Pin : LCDVCC = +3V 10K T Z1003 4 4 4 15 C106 T251 +5V 2,5,6,8,11,12,13,14,15,16,17,18,19 +3V 2,3,4,5,6,7,8,9,11,12,13,14,15,16,18,19 T it le 10p Size IDE & LCD CONNECTORS Document Number Date: T uesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Sheet 10 of 6 19 System Board (71-P2200-006) - Sheet 10 of 19 C – 11 C. CIRCUIT DIAGRAMS Titl e 320 S i ze D ocument N umber C us tom{D oc} D ate: Tuesday , June 20, 2000 R ev 0.0 S heet 11 of 19 +3V +V CC _A +V PP _A +V CC _B +V P P _B A S C LOS E TO PC I1420 A S P OS S IB LE CLOSE TOTPS_2206 CIRCUIT DIAGRAMS +3V C A 121 C A 124 C A 123 C A 115 C A 116 C A 122 C A 125 C T34 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u C T33 C T32 C A 117 C T29 10u/16V 10u/16V 10u/16V 10u/16V 0.1u C A 118 0.1u C T30 10u/16V C A 119 0.1u C A 120 0.1u C T27 C A 212 10u/25V _1206 C A 213 0.1u 0.1u C T31 C A 214 10u/16V C A 215 0.1u 0.1u +5V +12V C T28 C A 112 C T26 10u/25V _1206 0.1u C A 114 C 165 10u/25V _12060.1u C A 113 C 166 10u/25V _12060.1u 10u/25V _1206 U 28 B -C A D 31 B -C A D 30 B -C A D 29 B -C A D 28 B -C A D 27 B -C A D 26 B -C A D 25 B -C A D 24 B -C A D 23 B -C A D 22 B -C A D 21 B -C A D 20 B -C A D 19 B -C A D 18 B -C A D 17 B -C A D 16 B -C A D 15 B -C A D 14 B -C A D 13 B -C A D 12 B -C A D 11 B -C A D 10 B -C A D 9 B -C A D 8 B -C A D 7 B -C A D 6 B -C A D 5 B -C A D 4 B -C A D 3 B -C A D 2 B -C A D 1 B -C A D 0 W 11 R 10 U 10 V 10 W 10 R8 W7 V7 W6 V6 U6 V5 R6 U5 W4 M6 M2 M3 L5 M1 L6 L2 L1 K5 K3 J6 K1 J2 J3 H1 J1 H2 C 277 33P Z1104 P 18 19 19 19 19 A_CC LK SLOTA INTERFACE +3V DA TA C LOCK LA TCH R 394 U 31 B -CC LK 47 19 C 278 33P Z1106 4,12,13 P CIR S T#2 T407 T267 T268 T269 P6 K6 B _C C /B E 0# N 1 B _C C /B E 1# T1 B _C C /B E 2# P 8 B _C C /B E 3# SLOTB INTERFACE +5V 0.1u B _CC LK P 13 W 16 A _C C /B E 0# N 18 A _C C /B E 1# K 17 A _C C /B E 2# A _C C /B E 3# A -C C /B E 0# A -C C /B E 1# A -C C /B E 2# A -C C /B E 3# C A 240 B _C A D 31 B _C A D 30 B _C A D 29 B _C A D 28 B _C A D 27 B _C A D 26 B _C A D 25 B _C A D 24 B _C A D 23 B _C A D 22 B _C A D 21 B _C A D 20 B _C A D 19 B _C A D 18 B _C A D 17 B _C A D 16 B _C A D 15 B _C A D 14 B _C A D 13 B _C A D 12 B _C A D 11 B _C A D 10 B _ CA D 9 B _ CA D 8 B _ CA D 7 B _ CA D 6 B _ CA D 5 B _ CA D 4 B _ CA D 3 B _ CA D 2 B _ CA D 1 B _ CA D 0 A -CC LK A _ CA D 0 A _ CA D 1 A _ CA D 2 A _ CA D 3 A _ CA D 4 A _ CA D 5 A _ CA D 6 A _ CA D 7 A _ CA D 8 A _ CA D 9 A _C A D 10 A _C A D 11 A _C A D 12 A _C A D 13 A _C A D 14 A _C A D 15 A _C A D 16 A _C A D 17 A _C A D 18 A _C A D 19 A _C A D 20 A _C A D 21 A _C A D 22 A _C A D 23 A _C A D 24 A _C A D 25 A _C A D 26 A _C A D 27 A _C A D 28 A _C A D 29 A _C A D 30 A _C A D 31 19 A -C A D 0 A -C A D 1 A -C A D 2 A -C A D 3 A -C A D 4 A -C A D 5 A -C A D 6 A -C A D 7 A -C A D 8 A -C A D 9 A -C A D 10 A -C A D 11 A -C A D 12 A -C A D 13 A -C A D 14 A -C A D 15 A -C A D 16 A -C A D 17 A -C A D 18 A -C A D 19 A -C A D 20 A -C A D 21 A -C A D 22 A -C A D 23 A -C A D 24 A -C A D 25 A -C A D 26 A -C A D 27 A -C A D 28 A -C A D 29 A -C A D 30 A -C A D 31 R 393 47 7 24 1 2 30 15 16 17 +12V B-C AD [0..31] 19 A-C AD [0..31] U 11 R 11 P 11 U 12 V 12 R 12 P 12 V 13 U 13 W 14 R 13 U 14 P 14 W 15 R 14 V 15 U 15 N 19 M 15 M 18 L19 L17 L15 K 19 K 15 K 14 J 19 H 14 H 15 G 18 G 17 F19 19 B -C C /B E 0#19 B -C C /B E 1#19 B -C C /B E 2#19 B -C C /B E 3#19 TZ1101 TZ1102 TZ1103 TZ1104 3 4 5 14 6 13 19 18 12 12V 12V 5V 5V 5V 3V 3V 3V V DD A V PP +5V 8 +V PP _A 9 A V CC 10 A V CC 11 A V CC +V CC _A 23 +V PP _B 20 B V CC 21 B V CC 22 B V CC +V CC _B B V PP DA TA C LO CK LATCH 25 +5V /R E S E T R ES E T MO DE /A P W R _GO OD /B P W R _GO OD /OC G ND Z1109 R 471 29 10K _R TP S _2206 J15 P 15 P 17 N 17 R 19 J17 M14 A -C C LK RU N # H 18 R 17 N 14 L14 L18 J14 R 18 H 19 P 19 TERMINALS W9 B _CA U D IO N 6 B _C BLOC K # R 1 B _C D E V S E L# R 3 B _C FR AME # P 3 B_C G N T# V 8 B _CIN T# P 5 B _C IRD Y # U 9 B _C LK RU N # N 3 B _C P AR P 1 B _C P ER R # R 7 B _C RE Q # W 5 B_C R S T# W 8 B _C S ER R # N 5 B _CS TO P # V 9 B_C S TS C HG R 2 B _CTRD Y # M17 F15 E 17 A 16 C 15 E 14 F13 Z1108 B 15 G2 J5 P2 P9 V 14 K 18 E 18 F12 B 10 E8 C5 G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND R 395 G R S T# POWER PCI BUS INTERFACE D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D 10 D 11 D 12 D 13 D 14 D 15 D 16 D 17 D 18 D 19 D 20 D 21 D 22 D 23 D 24 D 25 D 26 D 27 D 28 D 29 D 30 D 31 A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A +3V 4,19 PC LK A D [0..31] 4,19 C /BE #[0..3] 47K R 178 47K +V CC _A +V CC _B C LO CK DA TA LATCH R 461 A 11 G R S T# R 462 S P KR O U T#16 SU S P EN D # PME # 5,19 B 13 C 13 F7 A7 B7 B6 A6 F8 C7 1 2 3 4 8P 4R x 43K _R R N 86 8 7 6 5 A -C R S T# A -C S ER R # A -CA U D IO A-C RE Q # 8P 4R x 43K _R R N 87 1 2 3 4 P CIR S T#24,12,13 10K +3V A 10 A D 23 A D 23 P AR 4,19 P CIR S T#24,12,13 4,19 B-C BLOC K # B -C P ER R # B -CS TO P # B -C D EV S E L# 1 2 3 4 8P 4R x 43K _R R N 90 8 7 6 5 B -CIN T# B -C S ER R # B -CA U D IO B-C RE Q # 8P 4R x 43K _R +3V R N 91 Z1107 1 2 3 4 C 175 10p B -CTRD Y # B -C IRD Y # B -C R S T# B -C S TS C HG 8P 4R x 43K _R R N 89 8 7 6 5 15 100 8 7 6 5 1 2 3 4 10u/16V _R 1420P C LK 6 B -C C D 2# A -C C D 2# B -CV S 2 A -CV S 2 R N 88 1 2 3 4 C A 230 C T62 0.1u_R 8 7 6 5 8P 4R x 43K _R +V CC _B R 192 R 196 A -C D EV S E L# A -CS TO P # A -C P ER R # A-C BLOC K # GR S T# PR E Q #0 4 P G N T#0 4 S TO P # 4,19 IRD Y # 4,19 TRD Y # 4,19 S ER R # 4,19 P ER R # 4,19 FR A ME # 4,19 D EV S E L#4,19 +V CC _B A -CTRD Y # A -CIN T# A -C IRD Y # A -C S TS C HG 8P 4R x 43K _R R N 85 8 7 6 5 +3V R 419 8 7 6 5 1 2 3 4 +3V 0_R 0 +V CC _A R N 84 1 2 3 4 PC I 1420 Z1103 Z1105 0_0805 M5 G 15 S P KR O U T# D 19 SU S P E N D # C 14 R I_O U T#/PME # RE Q # G N T# S TO P # IRD Y # TRD Y # S ER R # P ER R # FR AME # D EV S E L# R 181 B -C C LK RU N # B -C C D 1# 19 B -C C D 2# 19 B -CV S 1 19 B -CV S 2 19 E 19 C LOCK F14 DA TA F17 LATCH POWER SWITCH IN TA #/G P IO0/IRQ 0/MFUN C 0 IN TB #/G P IO1/IRQ 1/MFUN C 1 P C RE Q /GP IO2/IRQ 2/MFUN C 2 S E RIR Q/IRQ 3/MFUN C 3 LOC K #/G P IO3/IRQ 4/MFUN C 4 P C GN T/GP IO 4/IR Q5//MFUN C 5 C LK R U N#/IRQ6/MFUN C 6 F18 R 420 10K V C CB V C CA A -C C LK RU N # B -RS V D /D 219 B -R S V D/A 1819 B -R S V D/D 1419 H3 B_C C D 1# R 9 B_C C D 2# U 8 B_CV S 1 P 7 B_CV S 2 A 14 P R S T# C6 P AR C 10 ID S E L +V CC _A 4 IN T#A 4 IN T#B 16 P C MC IA -RI# 5,13 S IRQ 4 PLOC K # 5 PC MU SE B -CA U D IO19 B-C B LOC K #19 B -C D EV S E L#19 B-C FR A ME #19 B -C G N T# 19 B -CIN T# 19 B -C IRD Y # 19 B -C C LK RU N #19 B-C P AR 19 B -C P ER R #19 B-C RE Q # 19 B -C R S T# 19 B -C S ER R #19 B -CS TO P #19 B -C S TS C HG19 B -CTRD Y #19 B -C C LK RU N # P 10 B_RS V D /D 2 N 2 B_R S V D/A 18 K 2 B _R S V D/D 14 V 11 H 17 A_C C D 1# J18 A_C C D 2# M19 A_CV S 1 A_CV S 2 E2 A 5 C /B E 0# C /B E 1# C8 C /B E 2# A 15 C /B E 3# A -C C D 1# A -C C D 2# A -CV S 1 A -CV S 2 CONTROL TERMINALS C /B E #0 C /B E #1 C /B E #2 C /B E #3 19 19 19 19 G 14 T19 A_RS V D /D 2 W 13 A_R S V D/A 18 A_R S V D/D 14 CARDB CONTROL AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 A D 10 A D 11 A D 12 A D 13 A D 14 A D 15 A D 16 A D 17 A D 18 A D 19 A D 20 A D 21 A D 22 A D 23 A D 24 A D 25 A D 26 A D 27 A D 28 A D 29 A D 30 A D 31 A -RS V D /D 2 A -R S V D/A 18 A -R S V D/D 14 CARDA H5 G1 G3 H6 F1 G5 F2 E1 G6 F5 E3 C 12 A4 E6 B5 F6 B8 A8 E9 F9 B9 A9 F10 E 10 F11 E 13 C 11 B 11 A 12 B 12 E 12 A 13 19 19 19 A _CA U D IO A _C BLOC K # A _C D EV S E L# A _C FR A ME # A_C G N T# A_CIN T# A _C IRD Y # A _C LK RU N # A _C P AR A _C P ER R # A _C RE Q # A_C R S T# A _C S ER R # A _CS TO P # A_C S TS C HG A _CTRD Y # V C CI D 1 V C CP E 11 V C C P E7 CC C9 V V CC B 14 V C C G 19 N 15 V C C V CC W 12 V CC U 7 V CC L3 F3 V C C V CC 19 A -CA U D IO 19 A-C B LOC K # 19 A -C D E V S E L# 19 A-C FR A ME # 19 A -C G N T# 19 A -CIN T# 19 A -C IRD Y # 19 A -C C LK RU N # 19 A -C P AR 19 A -C P ER R # 19 A -C RE Q # 19 A -C R S T# 19 A -C S ER R # 19 A -CS TO P # 19 A -C S TS C HG 19 A -CTRD Y # 8 7 6 5 A -C C D 1# B -C C D 1# B -CV S 1 A -CV S 1 A D [0..31] 8P 4R x 43K _R C /BE #[0..3] ÂÅ ¤Ñ ¹q ¸£ C LEVO C O . Ti tle CA RD BUS BRID G E [T I PCI 1420] S ize D ocument N umber LP- 20 0 A 3 71-P2200-006 D ate: C – 12 System Board (71-P2200-006) - Sheet 11 of 19 Tuesday , June 20, 2000 S heet 11 of 19 R ev 6 C. CIRCUIT DIAGRAMS 3.3V_RX C210 0.01u Z1231 R278 LAN T PI+ TPI- U13 R279 27_0805 Z1228 1 R277 27_0805 Z1229 2 T 270 T 271 3.3V_T X T Z1201 T Z1202 Z1230 C209 C207 C208 R275 0.01u R276 56_0805 56_0805 10p 3 4 5 RD+ 16 RX+ RD- RX- RD_CT NC NC RX- 14 RX_CT NC RX+ 15 NC Z1208 CN12 13 T Z1203 T 272 12 T Z1204 T 273 T X+ 1 TX- 2 T PO+ T D_CT 11 T X_CT TD+ 8 TPOC111 NC RO- 7 Pulse-H0009 C112 C113 C115 C117 47p 47p 47p 47p R83 75_0805 R84 75_0805 R87 75_0805 RJ-45 CONNECTOR TOP VIEW NC 8 0.01u GND2 NC 6 9 TX- GND1 RO+ 5 T X+ T D- GND2 Z1209 10 Z1225 ox NC R88 75_0805 RJ-45 H2 H1 xo Z1226 H3 H4 xo ox C121 1000p/2KV_1210 IEEE-1394 RT 1 Z1247 2 L66 0 R2010 Z1204 XN Z1239 Z1240 Z1241 Z1242 1 2 3 4 8 7 6 5 Z1237 Z1238 Z1235 Z1236 R-PACK8_1 RJ-11 CONNECT TO CONNECTOR GR OUND GND1~21=GND 1 2 3 4 5 6 7 8 11 T Z1215 10 T 399 SB5V CA192 U35E 74HCT 14 R342 0.1u C279 0.01u 5 6 T Z1220 T 401 U35C 74HCT 14 1 PSON# 2 POWER-ON 18 SB5V Z1234 U35A 74HCT 14 14 7 R397 T Z1217 SMD-1394 CON. CA216 SB5V 5 IEEE-1394 CONNECTOR TOP VIEW T 405 1K 0.1u IEEE-1394 CON. Z1233 SB5V 14 T Z1221 T 402 14 1 2 3 4 5 6 XP 7 1 Z1203 1M T Z1214 T 403 13 T Z1216 12 +1.8V MDC ( SOFEWARE MODEM ) T 398 T 404 T Z1218 9 U35F 74HCT 14 8 7 Z1246 CN16 Z1243 RN74 1 2 3 4 5 6 14 MODEM CON. 0 7 1 2 3 L8 L6 L4 L2 CN17 CN13 L65 14 MODEM CN11 L7 L5 L3 L1 oooo oooo SB5V 7 5 GND1 T D- 4 Z1223 7 TD+ 3 10p 6 5 2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19 V_CMOS 1 CIRCUIT DIAGRAMS 5 2,5,6,8,10,11,13,14,15,16,17,18,19 +3V R280 27_0805 27_0805 5 +5V +2.5V R301 1K T Z1219 T 400 U35D 74HCT 14 +5V R300 330 R309 10K R299 10K U18 1 +5V +3V 2 PWRGOOD CN21 16 MONO-OUT T 275 T 274 T Z1205 T Z1206 T 276 T 277 T Z1207 T Z1208 SB3V 5,16,19 SDATO 5,16,19 AC_RESET # 4,11,13 PCIRST #2 R317 R314 0 0_R Z1205 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 MONO_OUT GND AUXR AUXL CDGND CD_R CD_L GND 3.3V GND 3.3V SDAT A_O RESET # GND MCLK AUDIO_PD MONO_PHONE R_D GND VCC R_D R_D P_DN VCC GND SYNC SDATA_INB SDATA_INA GND BCLK 4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 T Z1209 T Z1210 T Z1213 T 278 6 PHONE T 279 Z1232 Z1245 R399 Z1244 R398 R316 T Z1211 T Z1212 R310 10K_R T 280 T 281 0 0_R 0 A1 Y2 A2 Y3 A3 Y4 A4 Y5 A5 Y6 A6 1 POWEROK 2 3 VRMPWRGD 5 18 RESET-SW# 15 16 5 8 PWRGD +3V 10 12 R303 51K SYNC 5,16,19 SDAT IN1 5,19 SDAT IN0 5,16,19 BIT_CLK Y1 +5V 14 VCC GND 9 11 13 7 7407 5,16,19 MDC CON. ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. T itle LAN & MODEM CONNECTORS Size Document Number Tuesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: Sheet 12 of 6 19 System Board (71-P2200-006) - Sheet 12 of 19 C – 13 C. CIRCUIT DIAGRAMS +5V 15 15 17 DREQ0 DREQ1 DREQ2 DREQ3 DREQ5 DREQ6 DREQ7 3 90 79 88 1 127 124 R308 R434 15 10K Z1342 C218 10p DACK0# DACK1# DACK2# DACK3# DACK5# DACK6# DACK7# 4 89 99 87 2 128 126 T Z1301 37 39 40 62 63 64 65 66 36 BIOSCS# FLASH-ON# MUT E 17 LIGHT SW 6 ID0 6 ID1 6 ID2 6 ID3 T 282 +5V L90 +3V DACK0# DACK1# DACK2# DACK3# DACK5# DACK6# DACK7# ROMCS# GPIO1/KBCS# GPIO2/MCCS# GPIO3/IRQIN1 GPIO4/PLED GPIO5/KBEN GPIO6/RT CCS# GPIO7/IOHCS# 80PCS#/KBEN# VCC5 VCC5 VCC5 VCC5 VCC5 VCC5 VCC5 LA17 LA18 LA19 LA20 LA21 LA22 LA23 AVCC3 14.318M 25M/24.576M CLOCK 14MOUT 1 14MOUT 2 31 32 33 34 35 41 42 43 44 46 47 48 49 51 52 53 54 56 57 58 SA[0..18] SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 T Z1315 T 283SD[0..7] 67 68 69 71 72 73 74 75 114 115 116 117 118 119 121 122 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 T Z1302 T Z1303 T Z1304 T Z1305 T Z1306 T Z1307 T Z1308 T Z1309 11 12 59 61 76 77 81 82 83 84 86 91 92 100 101 102 112 113 123 IOCS16# MEMCS16# AEN IOCHRDY IOCHCK# RST DRV OWS# SMEMW# SMEMR# IOW# IOR# REFRESH# Z1332 TC Z1331 SBHE# MEMR# MEMW# MAST ER# 111 109 108 107 106 104 103 LA17 LA18 LA19 LA20 LA21 LA22 LA23 26 29 T Z1310 15 15 15 SD[0..7] SA[0..18] SA[0..18] U24 6 869PCLK IOR# IOW# 15 15 15 IOW# IOR# 26 27 28 29 30 31 32 39 40 41 95 35 36 1 3 25 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 46 47 48 49 51 52 53 54 SD[0..7] SD[0..7] 15 T 285 T 284 T 286 T 287 T 289 T 288 T 291 T 290 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 TC SIRQ 869PCLK IOR# IOW# AEN RST DRV IOCHRDY 33 37 38 42 43 44 55 98 DREQ0 DREQ1 DREQ2 DREQ3 DACK0# DACK1# DACK2# DACK3# 19 50 97 17 20 34 94 22 869-14M 18 21 23 24 IRMODE IRRX IRT X L91 T 22 0_0805 T 23 MEMR# MEMW# 13 70 Z1347 +3V 15 15 C257 C222 CT 59 0.01u 0.01u 10u/16V A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 FDC ISA RI2# DCD2# RXD2/IRRX T XD2/IRT X DSR2# RTS2# CTS2# DTR2# LPT CLK14 IRMODE/IRR3 IRRX2 IRT X2 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 IR VCC VCC 4 45 VSS 65 VSS 93 VSS VSS POWER 56 96 92 Z1330 Z1345 RN68 CTS2# C Z1329 A 14 14 14 14 LPD0 LPD1 LPD2 LPD3 LPD0 LPD1 LPD2 LPD3 RN71 1 2 3 4 14 14 14 14 14 14 14 14 14 14 14 14 14 LPD4 LPD5 LPD6 LPD7 LPD4 LPD5 LPD6 LPD7 RN72 1 2 3 4 T 14 T 15 PD[0..7] 8 7 6 5 8P4R x 1K 8 7 6 5 8P4R x 1K +5V 14 NOT E: R139 Use 47K pull-up selecting 370 HEX 47K_R RTS2# R140 Use 820 pull-up 820 selecting 3F0 HEX PWRGD/GAMECS# IRQIN ADRX#/CLKRUN# GAMECS# T 24 R400 +3V 10K +5V +5V 626F14M T 292 6 +5V Z1334 R307 18 869-14M PICCLK T Z1317 8 9 T Z1319 +5V T 388 T 385 +5V 12 13 T Z1323 C365 0.1u T 386 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 INDEX# 1 T 391 R306 15 U30D 74HCT 14 T Z1316 6 5 T Z1318 T 384 T 389 T Z1320 U30C 74HCT 14 U30F 74HCT 14 FDD-LED# 10 11 T Z1322 T 387 T 296 T 295 T 294 7 U30E 74HCT 14 T 293 +5V Z1348 0_1206 L130 CN6 T Z1321 +5V +5V DSKCHG# T Z1311 T Z1312 T Z1313 MTR0# T Z1314 DIR# DRVDEN0 ST EP# +5V SD[0..15] WDATA# RN22 SD0 SD1 SD2 SD3 1 2 3 4 RN28 8 7 6 5 8P4R x 4.7K SBHE# REFRESH# IOCS16# MEMCS16# 5 6 7 8 8P4R x 10K 4 3 2 1 8 7 6 5 8P4R x 10K 1 2 3 4 SD4 SD5 SD6 SD7 8 7 6 5 8P4R x 4.7K OWS# IOCHCK# SMEMR# SMEMW# 8 7 6 5 1 2 3 4 8P4R x 10K PWRDN# LA17 LA18 LA19 1 2 3 4 8 7 6 5 8P4R x 10K LA20 LA21 LA22 LA23 1 2 3 4 RN27 DREQ1 DREQ3 DREQ0 DREQ2 RN25 DREQ5 DREQ6 DREQ7 RN65 IRQ1 IRQ3 IRQ4 IRQ5 1 2 3 4 8 7 6 5 8P4R x 10K 1 2 3 4 8 7 6 5 8P4R x 10K 1 2 3 4 8 7 6 5 8P4R x 10K RN23 RN26 IRQ6 IRQ7 IRQ9 IRQ10 RN24 1 2 3 4 8 7 6 5 8P4R x 10K 1 2 3 4 8 7 6 5 8P4R x 10K RN67 RN69 IRQ11 IRQ12 IRQ14 IRQ15 RN75 IOCHRDY 15 BIOSCS# R343 10K R344 10K IOW# IOR# MEMR# MEMW# IOW# IOR# 8 7 6 5 RN21 WGATE# 1 2 3 4 8P4R x 4.7K T RK0# WRPRT # RDATA# HDSEL# GAMECS# R401 10K FDD CON. +5V 2,5,6,8,10,11,12,14,15,16,17,18,19 +3V 2,3,4,5,6,7,8,9,10,11,12,14,15,16,18,19 Title Size System Board (71-P2200-006) - Sheet 13 of 19 ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. LPC Bridge & Super I/O Document Number A3 71-P2200-006 Date: C – 14 47K CLOSE TO 37N869 Z1343 SD[0..15] 8P4R x 47K R138 1N4148 C217 10p 15 8 7 6 5 D5 7 W83626F 8P4R x 10K 37N869 T 390 27 28 8 7 6 5 1 2 3 4 +5V LPT SLCT LPT PE LPT BUSY LPT ACK# LPT SLIN# LPT INIT # LPT ERR# LPT AFD# LPT STB# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 8P4R x 10K RN64 14 14 14 14 14 14 14 14 8 7 6 5 1 2 3 4 RING2# DCD2# RXD2 DSR2# T 13 RING2# DCD2# RXD2 Z1327 DSR2# RTS2# CTS2# Z1328 69 68 67 66 64 63 62 61 1 2 3 4 RN66 57 SLCT 58 PE 59 BUSY 60 ACK# 71 SLCT IN# 72 INIT # 73 ERROR# 74 AUT OFD# 75 ST ROBE# DRQ_A DRQ_B DRQ_C DRQ_D DACK_A# DACK_B# DACK_C# DACK_D# INDEX# DRVDEN0 MAST ER# 15 T RK0# WRPRT # RDATA# DSKCHG# RXD1 TXD1 DSR1# RTS1# CTS1# DTR1# RING1# DCD1# 84 85 86 87 88 89 90 91 SERIAL PORT TC SIRQ CLK33 IOR# IOW# AEN RESET IOCHRDY FDD-LED# 76 77 78 79 80 81 82 83 RXD1 TXD1 DSR1# RTS1# CTS1# DTR1# RI1# DCD1# D0 D1 D2 D3 D4 D5 D6 D7 FDD-LED# MTR0# DIR# ST EP# WDATA# WGATE# HDSEL# INDEX# T RK0# WRPRT # RDATA# DSKCHG# Z1326 DRVDEN0 2 100 5 6 7 8 9 10 11 12 14 15 16 99 DS0# MTR0# DIR# ST EP# WDATA# WGATE# HDSEL# INDEX# T RK0# WRT PRT # RDATA# DSKCHG# DRVDEN1 DRVDEN0 7 AGND GND GND GND POWER GND GND GND GND SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 IOCS16# MEMCS16# AEN IOCHRDY IOCHCK# RST DRV OWS# SMEMW# SMEMR# IOW# IOR# REFRESH# SYSCLK TC BALE SBHE# MEMR# MEMW# MAST ER#/RT CEN# VCC3 30 15 50 60 80 95 110 125 R315 0_0805 ISA DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7 Z1346 20 0_0805 R304 0_0805 Z1335 25 626AGND LPC IRQ1/GPIO0 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 70 5 45 55 85 105 120 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 14 626PCLK R439 10K 38 98 97 96 94 93 78 10 9 8 6 7 LAD0 LAD1 LAD2 LAD3 LFRAM# PCICLK SERIRQ LDRQ# PCIRST # PWRDN# 7 +5V R438 10K IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 626PCLK IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 +3V PWRDN# 19 18 17 16 13 21 23 22 14 24 14 CIRCUIT DIAGRAMS 5 LFRAME# 6 626PCLK 5,11 SIRQ 5 LDRQ# 4,11,12 PCIRST #2 SA[0..18] U22 LAD0 LAD1 LAD2 LAD3 14 LAD[0..3] LAD[0..3] 14 5 T uesday, June 20, 2000 Rev LP-200 Sheet 13 of 6 19 C. CIRCUIT DIAGRAMS U25 CN27 DCDA# DSRA# RXDA RTSA# TXDA CTSA# DTRA# RINGA# R143 R144 R145 R146 R147 R148 R149 R150 BEAD BEAD BEAD BEAD BEAD BEAD BEAD BEAD DT R# SOUT RT S# DCD# DSR# SIN RT S# SOUT CT S# DT R# RING# L92 +5V COM1 RING# C249 C250 C251 C252 C253 C254 C255 C256 220p 220p 220p 220p 220p 220p 220p 220p DSR# RING# SIN CT S# DCD# 4 5 6 7 8 Z1422 26 14 TI1 13 TI2 12 TI3 TO1 TO2 TO3 RI1 RI2 RI3 RI4 RI5 RO1 RO2 RO3 RO4 RO5 VCC FON FOFF# GND INV# RO2B C2+ C1+ C2- C1- V- V+ CA102 25 C Z1421 A 9 10 11 0_0805 D25 GND10~11=GND DSR# RING# SIN CT S# DCD# DT R# SOUT RT S# 1N4148 0.1u R421 560K Z1409 1 Z1410 2 Z1413 3 19 18 17 16 15 23 22 Z1423 21 20 T Z1411 T Z1412 28 Z1411 24 Z1412 27 Z1415 L93 R422 C302 220K 100p 16 0.1u 13 13 13 DSR1# RING1# RXD1 CT S1# DCD1# 13 13 13 13 13 0_0805 +3V T 299 T 300 CA98 CA99 RIA# DT R1# T XD1 RT S1# CIRCUIT DIAGRAMS 1 6 2 7 3 8 4 9 5 0.1u CA100 MAX3243 CA101 0.1u 0.1u CN28 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 PRINT PORT GND26=GND PIN27=GND LPST B# LPAFD# LPD0 LPERR# LPD1 LPINIT # LPD2 LPSLIN# LPD3 FB16 FB15 FB14 FB13 FB12 FB11 FB17 FB10 FB9 LPD4 FB8 PD4 LPD5 FB7 PD5 LPD6 FB6 PD6 LPD7 FB5 LPACK# FB4 LPBUSY FB3 LPPE FB2 LPSLCT FB1 BK1608LL121-120 * 17 LPT ST B# 13 LPT AFD# 13 PD7 PD[0..7] 13 LPD0 LPD1 LPD3 LPD2 LPD4 LPD6 LPD5 LPD7 LPTBUSY 13 LPTPE 13 LPT SLCT 13 C245 C244 C243 C152 C242 C241 C240 C239 C238 C237 C153 C236 C235 C234 R153 4.7K 47p 47p 47p 47p 47p 47p 47p 47p 47p 47p 47p 47p 47p 47p 47p 47p 47p R333 4.7K R152 4.7K R151 4.7K 2,5,6,8,10,11,12,13,15,16,17,18,19 PD3 LPT ACK# 13 C246 +5V PD2 LPT SLIN# 13 C247 2,3,4,5,6,7,8,9,10,11,12,13,15,16,18,19 PD1 LPT INIT # 13 C248 +3V PD0 LPT ERR# 13 Z1414 C D15 A 1N4148 13 13 13 13 13 13 13 13 +5V ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. T it le PARALLEL & SERIAL PORTS Size Document Number Date: T uesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Sheet 14 of 6 19 System Board (71-P2200-006) - Sheet 14 of 19 C – 15 C. CIRCUIT DIAGRAMS PS/2 CONNECTOR TOP VIEW ISA INTERFACE ROM 13 SA[0..17] SA[0..17] +5V 2,5,6,8,10,11,12,13,14,16,17,18,19 +3V 2,3,4,5,6,7,8,9,10,11,12,13,14,16,18,19 SYS5V SD[0..7] SD[0..7] 13 6 5 RTCVDD 5 U6 4 13 14 15 17 18 19 20 21 31 /WE /CE /OE VPP +3V SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 MEMW# 2 Z1501 13 FLASH-ON# 13 D10 1 0_R SA18 13 BAT MUST CLOSE TO CHIP RTCVDD PIN The RTCVDD is 1.8V RTCVDD 1N4148 D12 D11 C D21 C Z1532 A C A 1N4148 R118 D18 C Z1530 A C Z1521 1N4148 1N4148 1N4148 BAT OK C D14 A 1N4148 +5V 5 1N4148 BAT 1 0.1u A Z1529 120K 1K CA106 3V/210mah J1 CE5 C136 C135 + 1u 0.01u 22u/10V_1206 1 2 3 2 M29F002BT C 1N4148 Z1522 A For 4Mb flash ROM +5V C Z1531 A D27 R298 R324 Z1505 D26 A SB3V BIOSCS# 13 MEMR# 13 32 16 VCC GND 74HC32 1 3 22 24 1 2 U17A 1 QD0 QD1 QD2 QD3 QD4 QD5 QD6 QD7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 14 12 11 10 9 8 7 6 5 27 26 23 25 4 28 29 3 2 30 7 CIRCUIT DIAGRAMS SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 3 SB5V +3V 5 SYST EM-ON# 10 HDD-LED# 10 CD-LED# 13 FDD-LED# 13 IRT X 13 IRRX 12 RESET -SW# 5 POWERSW# 13 IRMODE CMOS CON. CN31 1 2 3 4 5 6 7 8 9 10 11 12 10K +5V 5 3 ACPILED 4 +12V R24 R25 TZ1505 11 10 L43 KBCLK KBCLK Z1514 TZ1501 BK1608LL121-120 C230 C229 C366 C367 C228 CE24 47p 47p 33P 33P 220p 1u T 363 TZ1507 13 12 SB3V PINGND1~2=GN D T 362 T 361 TZ1511 9 8 H17 1 MT H354D111 BK1608LL121-120 L45 PMCLK H18 2 3 4 5 L46 T 311 PMCLK 9 8 7 6 2 3 4 5 MT H354D111 9 8 7 6 2 3 4 5 Z1517 TZ1504 TZ1512 BK1608LL121-120 C231 C368 C369 C233 CE23 47p 47p 33P 33P 220p 1u H22 1 MT H354D111 9 8 7 6 2 3 4 5 H21 1 MT H354D111 9 8 7 6 2 3 4 5 H5 C178D100 H4 C178D100 H7 C178D100 H6 C178D100 H10 C178D100 H15 C178D100 H11 C178D100 H14 C178D100 H13 C178D100 H9 C178D100 H8 C178D100 H12 C178D100 H1 C158D158 H27 C158D158 M6 M-MARK1 M2 M-MARK1 M14 M-MARK1 M17 M-MARK1 M12 M-MARK1 M11 M-MARK1 M15 M-MARK1 M13 M-MARK1 M16 M-MARK1 M18 M-MARK1 M10 M-MARK1 M9 M-MARK1 M8 M-MARK1 M7 M-MARK1 M5 M-MARK1 M19 M-MARK1 M20 M-MARK1 M4 M-MARK1 M3 M-MARK1 M1 M-MARK1 TZ1509 T 366 T 377 MT H354D111 9 8 7 6 2 3 4 5 H19 2 3 4 5 PS2-MOUSE CON. PINGND1~2=GND H24 1 7 1 2 3 4 5 6 Z1518 Z1519 T 312 TZ1503 C232 H20 1 H3 C178D100 U19D 74HC14 CN24 5 6 U19C 74HC14 R328 10K PMDAT PMDAT 5 HB-1H3216-70_1206 POLY SW 1.1A 5 TZ1510 14 Z1504 R329 10K H2 C178D100 PS2-KEYBOARD CON. SB3V L47 TZ1508 T 365 U19F 74HC14 F9 +5V S 14 7 1 2 3 4 5 6 Z1515 Z1516 T 310 TZ1502 MT H237D110 9 8 7 6 2 3 4 5 H30 1 MT H354D111 1 9 8 7 6 R665X276D189A H28 1 H23 9 8 7 6 2 3 4 5 2 3 4 5 H25 1 R665X276D189A 9 8 7 6 2 3 4 5 H29 1 9 8 7 6 R665X276D189A 2 3 4 5 1 9 8 7 6 MT H354D111 H16 1 MT H354D111 9 8 7 6 2 3 4 5 1 9 8 7 6 MT H276D118 ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. T it le Size BIOS,RTC,PS/2 CON. & LED CON. Document Number System Board (71-P2200-006) - Sheet 15 of 19 T uesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: C – 16 3 2 1 C177 100u/25V_5X7 7 T 309 2 Z1528 14 BK1608LL121-120 600_0805 FAN CON. 7 5 L44 L80 SB3V T 364 TZ1506 U19E 74HC14 KBDAT KBDAT Z1525 CN5 HB-1H3216-70_1206 T 360 FAN-IN Q7 2N3906 2K_1206 Q8 2N7002 Z1526 G 510 R326 10K CN25 5 FAN-PWM 14 Z1503 POLY SW 1.1A R21 4.7K C D R23 2 E Z1524 B Z1523 F7 L51 4.7K R22 4.7K SB3V R327 10K +5V SUSPEND-LED# U35B 74HCT 14 INDICATOR CON. +5V PLACE C234 & C232 NEAR T O SiS 630 2- 3 : CLEAR CMOS R423 14 0_0805 FIRVCC3 7 L94 SUSPEND-LED# SYST EM-ON# HDD-LED# CD-LED# FDD-LED# IRT X IRRX RESET -SW# POWERSW# Sheet 15 of 6 19 C. CIRCUIT DIAGRAMS 0_0805_R U21 V_in V_out ENABLE GND GND GND 2 3 GND GND CE10 3.9K +A5V 7 6 5 CT 55 CA195 CA90 10u/16V 0.1u 0.1u 3 AMC7630 3.9K +A5V U16A T DA1308 HEADOUT -L Z1643 R99 1u_0805 CE25 3.9K R283 AGND 2 5 + 1 SOUND-L 17 17 - HEADOUT -R CE26 R108 Z1644 1u_0805 6 U16B T DA1308 + 7 SOUND-R 17 - 3.9K 4 17 Z1627 R106 +A5V CIRCUIT DIAGRAMS 1u Z1606 R105 8 8 4 8 +5V 4 R347 1 Z1608 +A5V 100K +A3V CA93 10u/16V 0.1u 0.1u 0.1u AGND CE3 1u_0805 AGND +A5V Z1609 +5V C140 22p LINE_IN-L LINE_IN-R +A3V Y6 24.576MHz L127 BEAD_0805 R428 0_0805 R433 0_0805_R C138 Z1651 22p T 314 T 315 T 316 T 317 T 318 Z1640 R465 0 Z1647 R468 R469 0 0 Z1648 Z1649 Z1642 48 C R466 R467 0 0 0 5 6 8 10 11 Z1645 Z1646 CHAIN_IN AUX_L AUX_R VIDEO_L SDATA_OUT BIT _CLK SDATA_IN SYNC RESET VIDEO_R CD_L CD_GND 12 C PC_BEEP PHONE PHONE R117 C357 CA85 CA188 Z1602 0.1u Z1637 13 0.1u Z1601 12 Z1638 45 CD_R PHONE PC_BEEP MIC1 1.37K C R302 4.99K CA187 R463 Z1639 46 10K 0.1u MIC2 CS0 LINE_IN_L CS1 LINE_IN_R 28 AGND 27 VREFOUT LINE_OUT _L VREF LINE_OUT_R R430 CA89 14 0.1u 6 PCMSPK D VSS 2 D VSS 1 A VSS 1 A VSS 2 26 42 7 4 CX3 D 34 1u 15 Z1612 CE15 1u 16 Z1613 CE6 1u 17 Z1614 CE19 1u 18 Z1615 CE17 1u 19 Z1616 CE20 1u 20 Z1617 CE16 1u 21 Z1618 CE8 1u 22 Z1619 CE7 1u Z1630 1u CE21 1000p CE11 1000p 10 CD-GND 10 AUDIO-R 10 Z1631 MIC-IN AGND LINE_IN-L 17 24 LINE_IN-R 35 17 SB3V AGND LINEOUT -R 17 Z1620 CE14 C223 C224 C143 680p 680p 680p 1u SB3V MONO-OUT 12 T 392 T Z1607 10K R405 4.7K LINEOUT -L 17 36 37 17 R346 23 U33C T 395 74HC08 T 394 T Z1610 12 T Z1611 13 U33D 74HC08 11 T Z1612 T 397 9 8 T Z1608 T Z1609 T 396 10 SB3V AGND SB3V SB3V AGND CE22 AUDIO-L R404 0 AGND 0.1u 10K R402 4.7K AGND Z 1622 F I LT _ R F I LT _L RX3 D 33 A F I LT 2 32 CE18 R407 R408 R409 330K 330K 330K CE13 4 630SPK Z1611 T 393 C141 4700p Z1605 +3V 19 11 MINIPCI-RI# PCMCIA-RI# C281 1u/10V_0805 Z1633 1 C282 1u/10V_0805 Z1634 2 U33A 74HC08 3 SB3V R410 100K Z1636 4 6 RING 5 CT 54 U33B 74HC08 5 10u/16V 14 RIA# C283 1u/10V_0805 R411 1M Z1635 PC_BEEP 5 AGND R454 AGND 7 5 CA94 0.1u Z1621 AKM4543 R345 14 1K_R 0.1u U17B 74HC32 MONO_OUT R432 1K_R PCMSPK SPKROUT # 0.047u 7 11 C308 0.047u 14 CA236 Z 1626 1K_R 31 1K_R 30 R431 29 A GN D R429 Z 1625 4.7u_1206_R Z 1624 +5V Z 1623 +5V A F I LT 1 +2.25VREF C352 C307 0.047u AGND 39 40 41 43 44 3 2 25 38 CLOCK_OUT C355 C356 C C306 0.047u U20 NC NC NC NC NC XT A L_O UT 47 XT A L_I N 9 1 C R459 5,12,19 SDAT O 5,12,19 BIT _CLK 5,12,19 SDAT IN0 5,12,19 SYNC 5,12,19 AC_RESET # T Z1606 A VDD 1 A VDD 2 D VDD 2 D VDD 1 T 313 C305 0.047u T T T T T 0.1u NEAR U20 C353 C354 C304 0.047u Z 1601 Z 1602 Z 1603 Z 1604 Z 1605 CA235 NEAR U14 C303 Z1650 14 CA91 7 CA96 14 CT 57 7 BK1608LL121-120 14 R323 7 +3V R92 100K 10K +5V 2,5,6,8,10,11,12,13,14,15,17,18,19 +3V 2,3,4,5,6,7,8,9,10,11,12,13,14,15,18,19 Title Size A3 Date: ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. AC'97 CODEC (AKM4543) Document Number Rev LP-200 71-P2200-006 T uesday, June 20, 2000 Sheet 16 of 6 19 System Board (71-P2200-006) - Sheet 16 of 19 C – 17 C. CIRCUIT DIAGRAMS CN34 +A12V L_SPEAKER L19 +12V L107 0_0805 Z1762 Z1763 0_0805 C284 C160 CA109 L108 10u/25V_1206 10u/25V_1206 0.1u R464 1 2 +2.25VREF 0_R L-SPEAKER 0_0805 TZ1708 T 326 R296 Z1732 +A5V 7.5K C154 C264 SOUND-L SOUND-L HEAD_L AGND 16 16 U26 R412 AMP_L Z1748 C285 4.7K 1u_0805 Z1751 2 Z1739 5 R413 3K SOUND-R SOUND-R NC NC NC NC HEAD_R 2.2u/25V_1206 AGND 1u_0805 R414 Z1749 4.7K C286 R415 3K 17 SGND C134 0.01u MUT E R176 Z1756 10K AGND CN20 16 LINE_IN-R 16 LINE_IN-L CE12 1u CE9 1u Z1723 R424 Z1733 L16 HB-1H160-600_0603 22K R425 Z1724 Z1759 Z1734 L15 HB-1H160-600_0603 22K C159 4.7u_1206 R129 22K AGND B 3 11 C142 R123 22K LINE_IN C139 680p 10 2 1 Z1760 C144 C137 680p 680p PIN1A~1F=GND PIN2A~2F=Z1760 PIN3A~3F=Z1759 PIN10A~10F=GND PIN11A~11F=GND 680p E AGND Q15 2N3904 PIN1A~1F=GND PIN2A~2F=Z1731 PIN10A~10F=GND PIN11A~11F=TZ1708 C131 680p T PA1517(SOP20) Z1755 C 13 C133 680p 0_0805 R416 0 MIC_IN R-SPEAKER M/SS Z1754 47K L110 10 2 1 Z1731 BK2125HS601-600_0805 0.1u R_OUT 13 OUT 2 14 OUT 2 1 9 10 11 12 20 R154 T 319 T 320 T 322 T 321 3 11 L14 MIC-IN 1 2 AGND -INV2 AGND +A12V TZ1701 TZ1702 TZ1703 TZ1704 0_0805 Z1764 Z1765 L109 G ND PG N D G ND G ND PG N D G ND AMP_R 4 AGND Z1750 19 1u_0805 3 6 15 18 16 CN33 R_SPEAKER SVRR CN18 10U/16V Z1730 R115 1K CA86 L_OUT 7 OUT 1 8 OUT 1 -INV1 C161 C155 16 R293 7.5K MODEM-MIC VP CIRCUIT DIAGRAMS 1u_0805 AGND VOLUME CONTROL AGND AGND AGND VR2 +5V U36 5 13 1 LIGHT 2 LIGHT SW 3 INB VCC 5 INA GND OUT 16 HEADOUT -L 16 LINEOUT -L 16 LINEOUT -R 16 HEADOUT -R HEADOUT -L 3 1 2 AMP_R HEADOUT -R 5 PIN4.7=AGND10K_VR-5P LIGHT -ON 4 6 AMP_L AGND TC7S08F R435 C145 LIGHT +5V R427 0_R R_SPEAKER HEAD_R L18 BEAD_0805 L_OUT 100U/16V_6.3X5 C226 L_SPEAKER HEAD_L L17 BEAD_0805 LIGHT -ON +12V VR PIERCE PLAN CN1 Z1713 5 LIGHT -ON BRIGHTNESS L1 HB-1H2012-151T 03 L2 L5 L3 HB-1H160-600 HB-1H160-600 HB-1H160-600 T 324 C314 47U/16V_5X7 CN23 R_OUT Z1735 10K CA3 0.1u CA2 CA5 0.1u TZ1706 CA1 4 5 6 7 8 9 10 10 2 1 Z1737 100U/16V_6.3X5 4 o 1 R135 1K 7 o 6 5 2 3 R325 1K R141 1K_R SPEAKER_OUT R137 1K_R Z1744 Z1745 Z1746 Z1747 CA97 CA203 CA200 CA197 0.1u 0.1u 0.1u_R 0.1u_R C227 C225 680p_R 680p_R PIN1A~1F=GND PIN2A~2F=Z1737 PIN3A~3F=Z1735 PIN11A~11F=AMP_R PIN10A~10F=AMP_L ooooo INVERTER-A CON. 0.1u/50V_0805 0.1u 1 2 Z1714 Z1715 Z1716 3 11 AGND AGND AGND L30 AGND 07-10494-7C0 HB-1H2012-151T 03_1206 AGND L129 +5V BRIGHTNESS CONTROL +12V HB-1H2012-90_0805 CN32 AGND L25 5 L26 L27 L28 LIGHT -ON BRIGHTNESS CA207 CA110 CA111 0.1u 0.1u 0.1u CA209 HB-1H2012-151T 03 HB-1H160-600 HB-1H160-600 HB-1H160-600 Z1719 Z1720 Z1721 1 2 3 4 5 6 7 8 INVERTER-B CON. 2 BRIGHTNESS Z1718 VR1 10,11,15,18 +5V 2,5,6,8,10,11,12,13,14,15,16,18,19 D28 +5V A C 1N4148 Z1758 1 3 Z1728 2K_VR R85 51_0805 ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. 0.1u/50V_0805 07-10494-7C0 +12V T itle AMPLIFIERS & INVERTER CON. Size Document Number C – 18 System Board - Sheet 17 of 19 Tuesday, June 20, 2000 Rev LP-200 A3 71-P2200-006 Date: Sheet 17 of 6 19 C. CIRCUIT DIAGRAMS +5V +12V R5 1K +3V R7 10(BEAD_0805) VRMPWRGD Z1801 0.1u_1206 Z1856 1u_0805 +12V 1000uF/6.3V(8*14) + C20 CB1 1000p Z1814 L7 CIRCUIT DIAGRAMS JP1 JUMPER OPEN 1000uF/6.3V(8*14) 1 2 +5V 0_0805 CE1 CA129 VRMPWRGD 12 R440 1uH + VSEN2 LGAT E 11 R4 1K 330u/10V(6.3*11) D 1 Q5 HUF76121D3S DRIVE4 VSEN4 Q9 HUF76121D3S 13 Z1834 D 1 +3V JP3 JUMPER OPEN VID0 VID1 VID2 VID3 VID4 SS G ND 14 10K 1% 17 R11 + C12 CA6 + C11 + C10 CT 64 10u/25V_1206 CT 65 10u/25V_1206 V_CORE C SOD-1206 D3 D4 Q2 G CB2 1000p 22_0805 1000uF/6.3V(8*14) 2uH C L8 Z1832 R13 EC2QS04 R14 10K EC2QS04 22 21 Z1818 20 Z1819 R17 C8 C187 Z1826 0.22u 1.5K 10p Z1820 R16 2700p_0805 150K C9 + + C14 Q1 HUF76129S3S G 24 VSEN3 Z180515 C34 330U/10V(6.3*11) + C312 + C13 22_0805 Z1817 25 806 1% S 2 COMP 19 G R15 2A VT T Z1833 FB VAUX DRIVE3 FA UL T /R T JP2 JUMPER OPEN 16 18 Z1804 R8 HUF76129S3S PGND +3V Z1831 Z1815 Z1816 SELECT VSEN1 VID[0..3] VID[0..3] 1 VID0 VID1 VID2 VID3 7 6 5 4 3 12 HIP6021 Z1841 Z1840 CA4 R6 0.1u 0_0805 R18 510K +12V 10,11,15,17 +5V 2,5,6,8,10,11,12,13,14,15,16,17,19 +3V 2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,19 +2.5V 1,6,9,12 +1.8V 4,12 +1.5V V_CORE V_CORE 1,2 G Z1812 S 2 +1.8V C 2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,19 3K A +2.5V C33 10 Z1823 27 UGAT E 26 PHASE SD Z1822 T 328 R3 680 R12 A 9 1A 8 FIX R 23 DS 2 R470 + C313 0.1u_1206 OCSET D DRIVE2 S 1 U1 PG O O D E Z1821 V CC PINC1=+3V 28 Z1813 Q6 NZT 651 B SOT-223 T327 T Z1801 C 2A D9 + C32 R2 680 1% R1 330U/10V(6.3*11) + C23 + C29 + C31 + C24 + C16 + C30 + C21 + C15 + C28 + C22 R450 0_0805 C178 + C309 + C310 + C311 1u_1206 A 10K 1% SHUT DOWN +5V ZD2.2V/1W SOD-1206 CA231 0.1u_0603 CA80 CA9 CA82 CA105 CA190 CA95 CA108 CA202 CA208 CA167 CA140 CT37 0.1u 0.1u 22u/10V CT 60 CT 36 10u/16V 10u/16V L57 +5V F3 Z1835 D2 10A C287 7.5V/1W C289 1 10U/16V 2 C290 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u R10 10U/16V 470_1206 A 1uF/50V_1206 +12V Z1845 D1 3A CA157 CA146 CA139 CA103 CA43 CA189 CA193 CA164 CA163 CA155 + CT53 + CT46 + CT 38 + CT 1 0.1u 0.1u 10u/16V 10u/16V 10u/16V 10u/16V 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u L58 C292 15V/1W CA149 CA7 EMI CHOCK SMD F1 Z1836 CA232 0.1u 3 C288 1uF/50V_1206 POWER1 CON 0.1u +3V 4 C 1 2 3 4 5 6 7 8 0.1u Z1844 C CN2 2 1 4 3 C293 10U/25V_1206 C1 C294 10U/25V_1206 R9 +5V 2K_1206 0.1u_0603 1uF/50V_1206 +3V C L59 2 CT 2 10u/16V 10u/16V 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 10u/16V SB5V 3 C298 10U/16V R177 150_1206 Z1837 1uF/50V_1206 100 U9 3 SB1.8V VIN POWER-ON 12 A DJ R182 C168 10uF/25V_1206 POEWR2 CON 2 VOUT C316 10UF/16V_1206 Z1842 Z1849 2 C CA234 1A L60 SB5V 1 C301 D8 0.1u_0603 4 3 10U/16V C167 1uF/50V_0805 12,15 +5V SB5V R191 A CLEVO.CO T itle D24 1K C176 10UF/16V_1206 R195 44 C 5.6V/1W A EC2QS04 JBT 0385-100805-4 10UF/16V_1206 R20 164 PIN4=SB1.8V R194 100 C173 10uF/16V_1206 Z1839 F2 C35 10UF/16V_1206 L1087-ADJ(SOT -223) SB5V 7A R179 10K C315 Z1843 JBT 0385-100805-4 Z1848 2 VOUT PIN4=SB3V R19 100 C163 10uF/16V_1206 1uF/50V_1206 SB3V L1087-ADJ(SOT-223) U2 3 1 C297 4 1 1 2 3 4 5 6 C295 10U/16V F4 CT 58 10u/16V 0.1u VIN A 0.1u_0603 CT 51 0.1u 1 C296 D7 5.6V/1W CA233 CN4 CA194 CA191 CA107 CA196 CA204 CA104 CA198 CA201 CA199 CA92 CT 56 A DJ A 1uF/50V_1206 JBT 0385-100805-4 Z1846 Size A3 Date: Docum ent Num ber 71-P2200-006 Tuesday, June 20, 2000 POWER LP200 Sheet Rev 6 18 of 19 System Board (71-P2200-006) - Sheet 18 of 19 C – 19 C. CIRCUIT DIAGRAMS itle 3 20 iz e Doc um e nt Nu m be r Cu s to m {Do c } a te : Tue s d a y , J u ne 2 0, 20 00 Rev 0 .0 Sh ee t 19 of 19 11 11 A-CAD[ 0..31 ] B-CAD[ 0..31 ] CN3A CIRCUIT DIAGRAMS A -CAD0 A -CAD1 A -CAD3 A -CAD5 A -CAD7 11 11 11 11 11 11 11 11 11 A-CC/BE0# A -CAD9 A-CAD11 A-CAD12 A-CAD14 A-CC/BE1# A -CPAR A-CPERR# A-CGNT# A-CINT# A-CCLK A-CIRDY# A-CC/BE2# A-CAD18 A-CAD20 A-CAD21 A-CAD22 A-CAD23 A-CAD24 A-CAD25 A-CAD26 A-CAD27 A-CAD29 11 A-RSVD/D2 11 A-CCL KRUN# 11 A-CCD1# 11 A-RSVD/D1 4 A -CAD8 A-CAD10 11 A-CVS1 A-CAD13 A-CAD15 A-CAD16 A -CAD2 A -CAD4 A -CAD6 11 A-RSVD/A18 11 A-CBL OCK# 11 A-CSTOP# 11 A-CDEV SEL# 11 11 A-CT RDY# A-CFRAM E# 11 11 11 11 11 11 11 A-CVS2 A-CRST# A-CSERR# A-CREQ# A-CC/BE3# A-CAUDIO A-CST SCHG 11 5 A-CAD17 A-CAD19 A-CAD28 A-CAD30 A-CAD31 A-CCD2# G[0..7] A4 A6 A8 A10 A13 A15 A17 A19 A21 A23 A26 A28 A30 A32 A34 CA D0 -D3 CA D1 -D4 CA D3 -D5 CA D5 -D6 CA D7 -D7 CC/BE# 0 -CE1# CAD9 -A10 CAD1 1 -OE# CAD1 2 -A1 1 CAD1 4 -A9 CC/BE# 1-A8 CPAR-A10 CPERR#-A14 CGNT# -WE# CINT# -REQ# A39 A41 A44 A46 A48 A50 A52 A54 A57 A59 A61 A63 A65 A67 A69 +V CC_A 11 11 11 11 11 0 _ 0 8 05 VCC VCC A35 Z 1 90 5 A36 B-CC/BE1# B -CPAR B-CPERR# B-CGNT# B-CINT# B -CCL K B-CIRDY# B-CC/BE2# 0_ 08 05 VPP1 VPP2 B39 B41 B43 B45 B47 B50 B52 B54 B56 B58 B60 B63 B65 B67 B69 B-CAD18 B-CAD20 B-CAD21 B-CAD22 B-CAD23 B-CAD24 B-CAD25 B-CAD26 B-CAD27 B-CAD29 L 96 A38 Z 1 90 6 A37 B4 B6 B8 B10 B12 B14 B16 B19 B21 B23 B25 B27 B29 B32 B34 B -CAD9 B-CAD11 B-CAD12 B-CAD14 +V PP_A CTRDY #-A22 CFRAM E# -A23 CAD1 7 -A2 4 CAD1 9 -25 CVS2 -VS2 CRST#-RESET CSERR# -W AIT# CREQ#-INPACK# CC/BE# 3 -REG# CAUDIO# -BVD2 CSTSCHG-STS CHG# CAD2 8 -D8 CAD3 0 -D9 CAD3 1 -D1 0 CCD2 # -CD2# G[0..7] B-CC/BE0# L 95 CCD1 # -CD1# CAD2 -D11 CAD4 -D12 CAD6 -D13 RSVD-D14 CAD8 -D15 CAD1 0 -CE2# CVS1 -VS1 CAD1 3- IORD# CAD1 5-I OWR# CAD1 6 -A1 7 RSVD-A18 CBLOCK # -A1 9 CSTOP #-A20 CDEVSEL #-A21 A40 A43 A45 A47 A49 A51 A53 A56 A58 A60 A62 A64 A66 A68 A70 11 11 11 11 CCL K-A16 CIRDY# -A15 CC/BE# 2-A1 2 CAD1 8 -A7 CAD2 0 -A6 CAD2 1 -A5 CAD2 2 -A4 CAD2 3 -A3 CAD2 4 -A2 CAD2 5 -A1 CAD2 6 -A0 CAD2 7 -D0 CAD2 9 -D1 RS VD-D2 CL KRUN# -WP A3 A5 A7 A9 A11 A14 A16 A18 A20 A22 A24 A27 A29 A31 A33 CN3B B -CAD0 B -CAD1 B -CAD3 B -CAD5 B -CAD7 11 B-RS VD/D2 11 B-CCL KRUN# 11 B-CCD1 # 11 B-RSV D/D1 4 B -CAD8 B-CAD10 11 B -CVS1 B-CAD13 B-CAD15 B-CAD16 B3 B5 B7 B9 B11 B13 B15 B17 B20 B22 B24 B26 B28 B30 B33 B -CAD2 B -CAD4 B -CAD6 11 B-RSVD/A1 8 11 B-CBL OCK# 11 B-CSTOP# 11 B-CDEVSEL # GND GND GND GND GND GND GND GND A1 A2 A12 A25 A42 A55 A71 A72 11 11 B-CT RDY# B-CFRAM E# 11 11 11 11 11 11 11 B -CVS2 B-CRST# B-CSERR# B-CREQ# B-CC/BE3# B-CAUDIO B-CST SCHG 11 B40 B42 B44 B46 B49 B51 B53 B55 B57 B59 B62 B64 B66 B68 B70 B-CAD17 B-CAD19 B-CAD28 B-CAD30 B-CAD31 B-CCD2 # BERG TA -1 11 6 PI N5 ~8 =G ND 4 3 2 1 G7 G6 G5 G4 RN80 CA D0 -D3 CA D1 -D4 CA D3 -D5 CA D5 -D6 CA D7 -D7 CC/BE# 0 -CE1# CAD9 -A10 CAD1 1-OE# CAD1 2-A1 1 CAD1 4-A9 CC/BE # 1-A8 CPAR-A10 CPERR# -A14 CGNT# -WE# CINT# -REQ# CCL K-A16 CIRDY # -A1 5 CC/BE# 2-A1 2 CAD1 8-A7 CAD2 0-A6 CAD2 1-A5 CAD2 2-A4 CAD2 3-A3 CAD2 4-A2 CAD2 5-A1 CAD2 6-A0 CAD2 7-D0 CAD2 9-D1 RS VD-D2 CL KRUN#-WP +3 V L 97 0_ 08 05 B35 Z 19 07 B36 VCC VCC +VPP_B L 98 0 _ 0 80 5 B38 Z 19 08 B37 VPP1 VPP2 CCD1 # -CD1# CAD2 -D11 CAD4 -D12 CAD6 -D13 RSVD-D14 CAD8 -D15 CAD1 0 -CE2# CVS1 -VS1 CAD1 3- IORD# CAD1 5-I OWR# CAD1 6-A1 7 RSVD-A18 CBLOCK #-A1 9 CSTOP# -A20 CDEVSEL # -A21 CTRDY# -A22 CFRAM E# -A23 CAD1 7-A2 4 CAD1 9-25 CVS2 -VS2 CRST#-RESET CSERR# -W AIT# CREQ#-INP ACK# CC/BE# 3 -REG# CAUDIO# -BVD2 CSTSCHG-STSCHG# CAD2 8-D8 CAD3 0-D9 CAD3 1-D1 0 CCD2 # -CD2# +5 V +3V CN9 +VCC_ B R42 6 1 0K B1 B2 B18 B31 B48 B61 B71 B72 GND GND GND GND GND GND GND GND 6 M INI -PCLK 4 PREQ# 2 4 ,1 1 4 ,1 1 AD3 1 AD2 9 4 ,1 1 4 ,1 1 AD2 7 AD2 5 4 ,1 1 4 ,1 1 C/BE# 3 AD2 3 4 ,1 1 4 ,1 1 AD2 1 AD1 9 4 ,1 1 4 ,1 1 4 ,1 1 AD1 7 C/BE# 2 IRDY# 4 ,1 1 S ERR# 4 ,1 1 4 ,1 1 4 ,1 1 P ERR# C/BE# 1 AD1 4 4 ,1 1 4 ,1 1 AD1 2 AD1 0 4 ,1 1 4 ,1 1 AD8 AD7 4 ,1 1 AD5 4 ,1 1 AD3 4 ,1 1 T3 34 T3 35 T3 37 T3 36 T3 38 T3 39 T3 33 T3 40 T3 41 TZ 1 90 1 TZ 1 90 2 TZ 1 90 3 TZ 1 90 4 TZ 1 90 5 TZ 1 90 6 TZ 1 90 7 TZ 1 90 8 TZ 1 90 9 T3 42 TZ 1 91 0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 1 01 1 03 1 05 1 07 1 09 1 11 1 13 1 15 1 17 1 19 1 21 1 23 M INI -PCL K PREQ# 2 AD3 1 AD2 9 AD2 7 AD2 5 T35 1 TZ 1 91 1 C/BE# 3 AD2 3 AD2 1 AD1 9 AD1 7 C/BE# 2 IRDY# Z 19 01 S ERR# P ERR# C/BE# 1 AD1 4 AD1 2 AD1 0 AD8 AD7 AD5 T32 9 TZ 1 91 2 AD3 AD1 AD1 +5V SYNC SDATIN0 BIT _ CLK T33 0 TZ 19 13 T33 1 TZ 19 14 5 , 1 2,16 SYNC 5 , 1 2,16 SDATIN0 5 , 1 2,16 BIT _CLK M DM -P HONE M DM -PHONE T33 2 TZ 19 15 +5 V 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 1 00 1 02 1 04 1 06 1 08 1 10 1 12 1 14 1 16 1 18 1 20 1 22 1 24 TZ 1 92 0 TZ 1 92 1 TZ 1 92 2 TZ 1 92 3 TZ 1 92 4 TZ 1 92 5 TZ 1 92 6 Z 1 90 2 M INIPCI-RI# 1 6 T34 5 T34 3 T34 6 T34 7 T34 8 T34 9 T35 0 INT# C INT# C 4 T35 2 TZ 1 92 7 R21 0 0 SB3 V PCIRST#1 PCIRST#1 4 ,9 ,1 0 PGNT# 2 PM E# TZ 1 92 8 AD30 T35 3 AD28 AD26 AD24 IDSEL R2 17 FRAM E# T RDY# STOP# AD9 C/BE#0 AD6 AD4 AD2 AD0 T3 55 T3 58 T3 54 SDATO SDATIN1 AC_RE SET# T3 56 T3 57 R6 1 4 ,1 1 4 ,1 1 AD2 2 AD2 0 PAR AD1 8 AD1 6 4 ,1 1 4 ,1 1 4 ,1 1 4 ,1 1 4 ,1 1 AD2 4 4 ,1 1 AD1 5 AD1 3 AD1 1 4 ,1 1 4 ,1 1 4 ,1 1 AD9 C/BE#0 4 ,1 1 4 ,1 1 AD6 AD4 AD2 AD0 4 ,1 1 4 ,1 1 4 ,1 1 4 ,1 1 S DATO 5 , 1 2,1 6 SDATIN1 5 ,1 2 AC_ RE SET# 5 , 1 2,1 6 M ODEM SPK TZ 19 16 Z 1 90 3 4 ,1 1 AD2 8 AD2 6 DEV SEL# 4 ,1 1 AD15 AD13 AD11 TZ 19 29 5 ,1 1 AD3 0 FRAM E# 4 ,1 1 T RDY# 4 ,1 1 S TOP# 4 ,1 1 DEV SEL# TZ 19 17 4 PM E# 1 00 AD22 AD20 PAR AD18 AD16 TZ 19 19 TZ 19 18 PGNT# 2 M ODEM SPK 0 SB3 V Mini-PCI CON. BERG TA -1 11 6 P I N5 ~8 =G ND 5 6 7 8 8P4R x 22 ZG7 ZG6 ZG5 ZG4 9 5 9 9 9 R[0 ..7 ] R[0 ..7] 10 p 10 p 1 0p FOR LG PANEL ONLY 4 3 2 1 R7 R6 R5 R4 C3 17 C3 18 C31 9 C3 20 5 6 7 8 RN78 10 p 8 P4 R x 22 ZR7 ZR6 ZR5 ZR4 9 9 9 9 ZR3 ZR2 ZR1 ZR0 9 9 9 9 C3 21 C3 22 C32 3 C3 24 4 3 2 1 G3 G2 G1 G0 RN81 5 6 7 8 8P4R x 22 ZG3 ZG2 ZG1 ZG0 9 9 9 9 10 p 10 p 10 p 1 0p 4 3 2 1 R3 R2 R1 R0 C3 25 C3 26 C32 7 C3 28 RN79 10 p 10 p 1 0p 10 p 5 6 7 8 8 P4 R x 22 C3 29 C3 30 C33 1 C3 32 5 B[0..7] 10 p B [0..7] 4 3 2 1 B7 B6 B5 B4 RN82 5 6 7 8 8P4R x 22 ZB7 ZB6 ZB5 ZB4 9 9 9 9 ZB3 ZB2 ZB1 ZB0 9 9 9 9 10 p 1 0p 10 p M INI -PCL K R37 Z 19 0 4 15 C50 C3 33 C3 34 C33 5 C3 36 1 0p 10 p 4 3 2 1 B3 B2 B1 B0 RN83 10 p 1 0p 10 p 5 6 7 8 8P4R x 22 A-CCD1 # ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. B-CCD2 # B-CCD1# A-CCD2# CA2 17 CA2 18 CA2 19 CA22 0 0 .1 u 0 .1u 0.1u 0.1 u Title C3 37 C3 38 C33 9 C3 40 10 p 10 p 1 0p 10 p Siz e A3 Date : CARDBUS SLO T LP-200 Do c u m en t Nu m b er Re v 71-P2200-006 Tu es da y , J u ne 2 0, 20 0 0 She et 19 of 6 19 A3 C – 20 System Board (71-P2200-006) - Sheet 19 of 19 C. CIRCUIT DIAGRAMS INVERTER BOARD Q1 1.5A Z0103 2 4 6 8 10 + C20 0.1u C2 0.1u C1 R1 2.2K_1206 4431 L1 Z0108 1 PIN1A=Z01 08 PIN2A=Z01 16 D4 EC2QS04 Z0106 B E Q3 DTB114 Z0104 B Z0116 2 100uH_SDS1208 C E 1000u/16V(6.3*11) HEADER 5X2 8 7 6 5 3 2 1 4 C A Q4 4672 Z0107 PIN 1,2,3:12V 0.1u_0805 CN2 4 HV HV 3 LV C4 E PINC1 =Z0120 0.15u/100V 1 2 3 4 Z0125 * * * * 5 Z0119 Q5 4672 L7 PINC1 =Z01 21 E B 600_0805 C C5 18p/3KV Z0123 7 Z0122 C3 2 C B 1N4148 Z0105 T1 Z0120 D2 C R3 1K_0805 A Q2 SD1782 R2 1K_0805 CIRCUIT DIAGRAMS 1 3 5 7 9 C F1 JP? S-4P L6 18p/3KV Z0124 C6 1 600_0805 R4 6 10 Z0118 PIN 4: PANEL ON 1K 1%_0805 Z0121 R5 33K 4 Z0109 11 GND E1 E2 DEAD 9 10 A AC Z0117 D7 DAN217 C 13 16 V1 + I N1 CT RT -I N1 -I N2 CO MP EN 1 5 6 2 C7 10u/16V_1206 3 R6 1K 7 T L494_0 15 C B 14 V2 VR EF OUT +IN2 Q6 DT D114EK Z0126 CDT 1524-165 U1 C2 C1 V CC PIN 7,8,9 : GND 8 12 PIN 6: BRIGHT Z0136 Z0111 Z0112 Z0137 Z0115 Z0110 C8 V2 E C9 0.1u Z0138 R7 2.2K C10 C11 R8 2.2K 1000p C R24 R9 6.8K E 1M 0.1u R25 1M 4.7K 1% R11 2.2K R14 649 1% R17 1K 1% C14 Z0113 2K 1% C12 C18 4.7u/10V_1206 4.7u/25V_1206 C13 R15 NC 1% R18 B Z0127 LIGHT -ON R10 10u/10V_1206 V1 Q7 2SD1782 0.01u Z0114 R19 0 0.1u T itle ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. INVERTER Size A3 Date: Document Number Rev 71-P2202-006 0921 Monday, November 06, 2000 Sheet 6.0 LP200 1 of 1 Inverter Board (71-P2202-006) C – 21 C. CIRCUIT DIAGRAMS INVERTER + LED BOARD Q1 F1 1.5A Z0101 1 2 3 4 5 6 7 8 Z0103 Z0102 + C20 0.1u LIGHT -ON +5V C2 0.1u C1 1000u/16V(6.3*11) 8 7 6 5 3 2 1 4 R1 2.2K_1206 L1 Z0108 1 4431 E R2 1K_0805 Q2 SD1782 C C C5 0.1u_0805 CN2 HV HV 1 2 3 LV 4 Z0125 C4 3 Q4 4672 Z0119 Q5 4672 PINC1=Z0121 E L7 B 600_0805 C L10 BEAD 18p/3KV Z0123 4 E PINC1=Z0120 Z0107 A 7 Z0122 C3 2 C B 1N4148 Z0105 T1 Z0120 D2 PIN9=GND_EARTH R3 1K_0805 A INVERTER PIN1A=Z0108 PIN2A=Z0116 D4 EC2QS04 Z0106 B Q3 DTB114 Z0104 B Z0116 2 100uH_SDS1208 C E CIRCUIT DIAGRAMS 1 2 3 4 5 6 7 8 C CN1 0.15u/100V * * * * 5 S-4P L6 18p/3KV Z0124 C6 1 600_0805 R4 6 10 Z0118 R5 33K Z0109 4 11 GND E1 E2 DEAD 9 10 A AC Z0117 D7 DAN217 C 13 16 V1 +I N1 CT RT -IN1 CO MP EN -IN2 H2 2 3 4 5 1 5 6 3 2 VR EF C7 10u/16V_1206 7 T L494_0 15 V2 R6 1K 14 C B Z0126 CDT1524-165 OUT +IN2 Q6 DT D114EK 1K 1%_0805 U1 C2 V CC C1 8 12 Z0121 1 9 8 7 6 Z0136 Z0111 Z0112 Z0137 Z0115 Z0110 MTH315D111 C8 V2 E C9 0.1u Z0138 R7 2.2K C10 C11 R8 2.2K 1000p C Z0127 LIGHT -ON C12 R11 2.2K Z0113 H4 C60D60 H5 C60D60 4.7u/10V_1206 4.7u/25V_1206 +3V 0.01u R18 1K 1% H1 C111D111 C13 R15 NC 1% 9 8 7 6 MTH315D111 E C18 R25 1M 4.7K 1% 1 B 1M R10 0.1u R14 649 1% H3 2 3 4 5 Q7 2SD1782 R24 R9 6.8K 10u/10V_1206 R17 V1 R19 Z0114 Z0128 R12 3.6_0805 U2 2K 1% 0 C14 IRTX 3 IRRX 4 T XD 1 IRED ANODE R13 3.6_0805 0.1u +5V RXD MODE 7 R16 47_0805 TZ0102 +3V SW1 1 C19 10u/10V_1206 C17 C21 0.1U R20 R26 0.1u 220 220 4 2 Z0130 Z0131 INDICAT OR R22 470 Z0132 470 Z0133 VCC SW3 2 5 4 R23 3 CN3 1 2 5 4 3 470 2 IRMODE 5 POWER-ON POWER-ON Z0134 TZ0101 SD/MODE 0.1u_0805 D10 D11 GREEN C GREEN C GREEN FGND A A A D9 C HDD-LED# 8 C15 GND C16 10u/10V_1206 TFDU6101E 3 SYSTEM-ON# GREEN/ORANGE SUSPEND-LED# Z0135 IRED CAT HODE D8 SUSPEND-LED# SYSTEM-ON# HDD-LED# CD-LED# FDD-LED# IRTX IRRX RESET -SW# PWRBT N# IRMODE 1 1 2 3 4 5 6 7 8 9 10 11 12 13 R21 6 CD-LED# FDD-LED# SW2 1 SW4 2 5 4 3 RESET 1 2 5 4 3 600_0805 RESET FGND ÂÅ ¤Ñ ¹q ¸£ CLEVO CO. PWRBT N# RESET -SW# FGND L3 T itle INDICATOR & INVERTER BOARD Size A3 Date: C – 22 Inverter + LED Board (71-P2203-007A) Document Number 71-P2203-007A LP-200 Sheet 1 of 1 0921 Friday, October 06, 2000 Rev 7.0 C. CIRCUIT DIAGRAMS CONVERTER BOARD CIRCUIT DIAGRAMS CN2A1 1 2 * * HV1 HV2 CN2A2 1 2 * * LV FOR SHARP CN2A1 1 2 * 3 * 4 * * HV1 HV2 LV HV1+HV2+LV Hyundai HV2+LV LG Converter Board (71-P2204-004) CLEVO C – 23 C. CIRCUIT DIAGRAMS IEEE1394 EXTENSION CARD (OPTIONAL) +5V +3V U1 AD31 AD29 2 AD31 2 AD29 AD27 AD25 2 AD27 2 AD25 C/BE#3 AD23 2 C/BE#3 2 AD23 AD21 AD19 2 AD21 2 AD19 AD17 C/BE#2 IRDY# 2 AD17 2 C/BE#2 2 IRDY# SERR# 2 SERR# PERR# C/BE#1 AD14 2 PERR# 2 C/BE#1 2 AD14 AD12 AD10 2 AD12 2 AD10 AD8 AD7 2 AD8 2 AD7 AD5 2 AD5 AD3 2 AD3 +5V AD1 2 AD1 +5V 40 R9 10K INT#B PGNT#1 PME# AD30 AD28 AD26 AD24 IDSEL AD22 AD20 PAR AD18 AD16 FRAME# TRDY# STOP# DEVSEL# AD15 AD13 AD11 AD9 C/BE#0 AD6 AD4 AD2 AD0 PCIRST# PGNT#1 Z0103 Z0104 16PF 2 PLLVDD R0 DVDD1 DVDD2 DVDD3 DVDD4 TSB41LV01 R7 6.34K 1% INT#B 2 C20 PCIRST# R6 1M CPS 41 60 AVDD1 AVDD2 AVDD3 AVDD4 AVDD5 R1 XO Y1 2 24.576M PME# 2 AD30 C21 16PF 2 AD28 2 AD26 2 AD24 2 IDSEL 2 RESET# PD SYSCLK .1UF Z0107 54 3 28 29 Z0108 R8 1K 57 58 2 17 18 63 64 2 2 2 32 33 39 48 49 50 2 2 2 2 Mini-PCI CON. C/LKON LREQ AD9 2 C/BE#0 2 AD6 AD4 AD2 AD0 TSTM ISO# XI TPB0TPB0+ TPA0TPA0+ TPBIAS0 FILTER1 C10 FRAME# 2 TRDY# 2 STOP# 2 AD15 AD13 AD11 59 34 35 36 37 38 55 Z0106 AD22 2 AD20 2 PAR 2 AD18 2 AD16 2 DEVSEL# Z0105 TPB0TPB0+ TPA0TPA0+ TPBIAS0 FILTER2 CNA SE SM LPS PC0 PC1 PC2 PLLGND1 PLLGND2 CTL0 CTL1 DGND1 DGND2 DGND3 DGND4 AGND1 AGND2 AGND3 AGND4 AGND5 AGND6 TSB41LV01 56 +3V PLEASE CLOSE IC 25 26 61 62 30 31 42 51 52 C7 C13 C12 C11 .1UF .1UF .1UF .1UF C8 C5 C6 C9 .1UF .1UF .1UF .1UF C4 22UF/16V_B3528 27 23 R12 19 Z0110 53 Z0111 1K BMC/LINKON 2 R11 14 C15 1 2 LREQ Z0112 R17 0 .1UF 2 PHY_SCLK 20 21 22 10K 2 15 LPS 2 Z0113 R10 0 R13 4.7K 4 5 CTL0 2 CTL1 2 D[0:7] D0 D1 D2 D3 D4 D5 D6 D7 C3 .1UF 2 Z0102 1 24 NC NC NC NC NC NC 2 PREQ#1 Z0101 6 7 8 9 10 11 12 13 D0 D1 D2 D3 D4 D5 D6 D7 D[0:7] 16 43 44 45 46 47 PREQ#1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 2 MINI-PCLK 2 MINI-PCLK 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 1 CIRCUIT DIAGRAMS CN1 + +3V 2 M7 M-MARK1 M1 M-MARK1 M2 M-MARK1 M8 M-MARK1 M10 M-MARK1 M4 M-MARK1 M6 M-MARK1 M9 M-MARK1 M5 M-MARK1 M3 M-MARK1 PLEASE CLOSE IC TPBIAS0 R5 56.2 R4 56.2 C1 1UF TPA0+ TPA0TPB0+ TPB0- PLEASE CLOSE IC R3 56.2 R2 56.2 CON1 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 53261-0890 Z0109 C2 R1 5.11K 220PF Title Size Document Number Custom 0722 Thursday, February 03, 2000 Date: 1394 71-P2205-001 C – 24 IEEE1394 Extension Card (71-P2205-001) Sheet 1 Rev 1.0 of 2 C. CIRCUIT DIAGRAMS EXTERNAL USB BOARD Only the LP200C has this feature. CIRCUIT DIAGRAMS CN1 1 2 3 CN2 UV2- R1 0(0603) UV2+ R2 0(0603) USB-PLUG V+_OUT1 DATA_L1 DATA_H1 4 V+_OUT2 DATA_L2 6 7 UV3- R3 0(0603) UV3+ R4 0(0603) V+_OUT1 DATA_L1 DATA_H1 GND V+_OUT2 DATA_L2 DATA_H2 GND GND GND GND GND 5 1 2 3 4 5 6 7 8 DATA_H2 EXT-USB 9 10 11 12 8 C1 C2 C3 C4 R(0.1U) R(0.1U) R(0.1U) R(0.1U) LAYOUT ¶¶§Ç©Mª`·N¨Æ¶µ 1:UV2+/- trace width 8 mil ,¦Ówidth :space¬°1:1¨Ã¥]GND © ©Mµ¥ªø 2:UV3+/- trace width 8 mil ,¦Ówidth :space ¬°1:1¨Ã¥]GND ©Mµ¥ªø 3:¨C±øPower Line trace width 50 mil ¥H¤W 4:GND ¾Q¦a®É¬°¥þ³¡,¤£¥i¥Îºôª¬ CLEVO COMPUTER CO. 5:LAYOUT ¥Î¨â¼hªO Title LP200 EXT. USB BOARD Size B Document Number 71-P2206-001 Date: Wednesday, April 12, 2000 Rev A Sheet 1 of 1 External USB Board (71-P2206-001) C – 25 C. CIRCUIT DIAGRAMS CIRCUIT DIAGRAMS NOTES: C – 26