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Preface Notebook Computer W860CU/W870CU Service Manual Preface I Preface Notice The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Preface Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version 1.0 November 2009 Trademarks Intel and Intel Core are trademarks of Intel Corporation. Windows® is a registered trademark of Microsoft Corporation. Other brand and product names are trademarks and/or registered trademarks of their respective companies. II Preface About this Manual This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the W860CU/ W870CU series notebook PC. The following information is included: Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Preface Appendix A, Part Lists Appendix B, Schematic Diagrams III Preface IMPORTANT SAFETY INSTRUCTIONS Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment: Preface 1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool. 2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning. 3. Do not use the telephone to report a gas leak in the vicinity of the leak. 4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. Check with local codes for possible special disposal instructions. 5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output of 20V, 6A OR 19V, 6.3A OR 18.5V, 6.5A (120 Watts) minimum AC/DC Adapter. CAUTION Always disconnect all telephone lines from the wall outlet before servicing or disassembling this equipment. TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER, TELECOMMUNICATION LINE CORD This Computer’s Optical Device is a Laser Class 1 Product IV Preface Instructions for Care and Operation The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions: 1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged. Do not expose the computer to any shock or vibration. 2. Do not place anything heavy on the computer. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. Do not leave it in a place where foreign matter or moisture may affect the system. Don’t use or store the computer in a humid environment. Do not place the computer on any surface which will block the vents. Preface Do not expose it to excessive heat or direct sunlight. 3. Do not place it on an unstable surface. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted. Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer. V Preface 4. 5. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data. Take care when using peripheral devices. Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices. Preface Power Safety The computer has specific power requirements: VI • • Power Safety Warning • Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. • • • Only use a power adapter approved for use with this computer. Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies. Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord. Preface Battery Precautions • Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. • Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. • Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode. • Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. • Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. • Keep the battery away from metal appliances. • Affix tape to the battery contacts before disposing of the battery. • Do not touch the battery contacts with your hands or metal objects. Battery Guidelines Preface The following can also apply to any backup batteries you may have. • If you do not use the battery for an extended period, then remove the battery from the computer for storage. • Before removing the battery for storage charge it to 60% - 70%. • Check stored batteries at least every 3 months and charge them to 60% - 70%. Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste officials for details in your area for recycling options or proper disposal. Caution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions. Battery Level Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10% will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week. VII Preface Related Documents You may also need to consult the following manual for additional information: Preface User’s Manual on Disc This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC. VIII Preface Contents Introduction ..............................................1-1 Overview .........................................................................................1-1 System Specifications .....................................................................1-2 External Locator - Top View with LCD Panel Open ......................1-4 External Locator - Front & Right side Views .................................1-5 External Locator - Left Side & Rear View .....................................1-6 External Locator - Bottom View .....................................................1-7 Mainboard Overview - Top (Key Parts) .........................................1-8 Mainboard Overview - Bottom (Key Parts) ....................................1-9 Mainboard Overview - Top (Connectors) .....................................1-10 Mainboard Overview - Bottom (Connectors) ...............................1-11 Overview .........................................................................................2-1 Maintenance Tools ..........................................................................2-2 Connections .....................................................................................2-2 Maintenance Precautions .................................................................2-3 Disassembly Steps ...........................................................................2-4 Removing the Battery ......................................................................2-5 Removing the Hard Disk Drive .......................................................2-6 Removing the Optical (CD/DVD) Device ......................................2-9 Removing the System Memory (RAM) ........................................2-10 Removing and Installing the Processor .........................................2-12 Removing the Wireless LAN Module ...........................................2-15 Removing the Bluetooth Module ..................................................2-16 Removing the 3G Module .............................................................2-17 Removing the Keyboard (W860CU) .............................................2-18 Part Lists ..................................................A-1 Part List Illustration Location ........................................................ A-2 Top with Fingerprint (W860CU) ................................................... A-3 Schematic Diagrams................................. B-1 System Block Diagram ...................................................................B-2 Processor 1/7 ...................................................................................B-3 Processor 2/7 ...................................................................................B-4 Processor 3/7 ...................................................................................B-5 Processor 4/7 ...................................................................................B-6 Processor 5/7 ...................................................................................B-7 Processor 6/7 ...................................................................................B-8 Processor 7/7 ...................................................................................B-9 DDRIII SO-DIMM_0 ...................................................................B-10 DDRIII SO-DIMM_1 ...................................................................B-11 IBEXPEAK - M 1/9 ......................................................................B-12 IBEXPEAK - M 2/9 ......................................................................B-13 IBEXPEAK - M 3/9 ......................................................................B-14 IBEXPEAK - M 4/9 ......................................................................B-15 IBEXPEAK - M 5/9 ......................................................................B-16 IBEXPEAK - M 6/9 ......................................................................B-17 IBEXPEAK - M 7/9 ......................................................................B-18 IX Preface Disassembly ...............................................2-1 Top without Fingerprint (W860CU) .............................................. A-4 Bottom (W860CU) ........................................................................ A-5 LCD (W860CU) ............................................................................ A-6 COMBO (W860CU) ...................................................................... A-7 DVD-Dual Drive (W860CU) ......................................................... A-8 Top with Fingerprint (W870CU) ................................................... A-9 Top without Fingerprint (W870CU) ............................................ A-10 Bottom (W870CU) ...................................................................... A-11 LCD (W870CU) .......................................................................... A-12 2nd HDD (W870CU) ................................................................... A-13 COMBO (W870CU) .................................................................... A-14 DVD-Dual Drive (W870CU) ....................................................... A-15 Preface Preface IBEXPEAK - M 8/9 ..................................................................... B-19 IBEXPEAK - M 9/9 ..................................................................... B-20 Clock Generator ........................................................................... B-21 Panel, Inverter .............................................................................. B-22 DVI ............................................................................................... B-23 HDMI ........................................................................................... B-24 MXM PCI-E ................................................................................. B-25 EC-IT8502E ................................................................................. B-26 USB, eSATA, New Card .............................................................. B-27 Mini Card ..................................................................................... B-28 BT, TPM, MDC, LID ................................................................... B-29 LAN, RTL8111L, RJ45 ............................................................... B-30 Fan, CCD, LED, Screw Hole ....................................................... B-31 Azalia Codec ALC888 ................................................................. B-32 SRS-AP8202, SATA ODD & HDD ............................................ B-33 AMP-TPA6017, Subwoofer ......................................................... B-34 5V, 3.3V, 3.3VS, 5VS, 1.5VS ...................................................... B-35 VDD3, VDD5 ............................................................................... B-36 Power 1.8VS, 1.1VS .................................................................... B-37 Power 1.5V/0.75V ........................................................................ B-38 Power 1.1VS_VTT ....................................................................... B-39 Power VCore ................................................................................ B-40 AC_In, Charger ............................................................................ B-41 USB 3.0 ........................................................................................ B-42 Power Button Board ..................................................................... B-43 LED Board ................................................................................... B-44 Multi I/O Board ............................................................................ B-45 Touch Sensor Board ..................................................................... B-46 Left-LED Board ........................................................................... B-47 Fingerprint Board ......................................................................... B-48 Click Board .................................................................................. B-49 W870CU Second HDD Board ..................................................... B-50 X W870CU Multi I/O Board ............................................................B-51 W870CU CIR Board .....................................................................B-52 W870CU LED Board ...................................................................B-53 W870CU RJ11 & TV Board .........................................................B-54 W870CU Power Button Board .....................................................B-55 W870CU Right-Logo Board .........................................................B-56 W870CU Left-Logo Board ...........................................................B-57 W870CU Touch Sensor Board .....................................................B-58 Introduction Chapter 1: Introduction Overview This manual covers the information you need to service or upgrade the W860CU/W870CU series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer. Operating systems (e.g. Windows Vista, Windows 7, etc.) have their own manuals as do application software (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. 1.Introduction The W860CU/W870CU series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the “” symbol. The balance of this chapter reviews the computer’s technical specifications and features. Overview 1 - 1 Introduction 1.Introduction System Specifications Processor Memory Storage Intel® Core i7-820QM Processor: 1.73GHz 45nm (45 Nanometer) Process Technology, 8M L3 Cache & FSB 1333MHz - TDP 45W rPGA988A Package Two 64-bit Wide DDRIII (DDR3) Data Channels Two 204 Pin SO-DIMM Sockets Supporting DDRIII (DDR3) 1333MHz Memory Expandable up to 4GB Using 2GB DDRIII Modules Intel® Core i7-720QM Processor: 1.6GHz 45nm (45 Nanometer) Process Technology, 6M L3 Cache & FSB 1333MHz - TDP 45W rPGA988A Package Video Adapter One Changeable 12.7mm(h) Optical Device (CD/DVD) Type Drive (see Factory Options for All Models on page 1-3) For W860CU Easy Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD For W870CU Easy Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD (RAID 0/1 Support) For W870CU Only: Intel® Core i7-920XM Processor: 2.00GHz 45nm (45 Nanometer) Process Technology, 8M L3 Cache & FSB 1333MHz - TDP 55W rPGA988A Package For W860CU & W870CU Computers: nVIDIA® GeForce GTX 280M PCIe * 16 Video Card 1GB GDDR3 Video RAM on board Supports Microsoft DirectX® 10 Supports HDCP Core Logic For W860CU only: nVIDIA® GeForce GTX 260M PCIe * 16 Video Card 1GB GDDR3 Video RAM on board Supports Microsoft DirectX® 10 Supports HDCP Intel® PM55 Chipset BIOS Display One 32Mb SPI Flash ROM Phoenix™ BIOS W860CU 15.6” HD (1366 * 768) / HD+(1600 * 900) / FHD (1920 * 1080) 16:9 Wide Screen LED Panel W870CU 17.3” HD+(1600 * 900) / FHD (1920 * 1080) 16:9 Wide Screen LED Backlit Panel 1 - 2 System Specifications Keyboard & Pointing Device Full Size WinKey Keyboard Built-in TouchPad with Multi Gesture Function Three Instant Keys (WWW, E-Mail, Silent Mode) Card Reader Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/ MMC/ RS MMC/ MS Duo) Note: MS Duo/ Mini SD/ RS MMC Cards require a PC adapter Slots One ExpressCard/34/54 Slot Two Mini-Card Slots (USB/PCIe): Slot 1 for Half Mini-Card WLAN Module with PCIe Interface (Factory Option) For W860CU Slot 2 for UMTS/HSPA 3.75G Module with USB Interface (Factory Option) For W870CU Slot 2 for TV Tuner Card with USB Interface (Factory Option) Security Security (Kensington® Type) Lock Slot BIOS Password Fingerprint Reader Module (Factory Option) Introduction Audio Communication Environmental Spec High Definition Audio Compliant Interface 3D Stereo Enhanced Sound System S/PDIF Digital Output Built-In Microphone For W860CU 2 * Built-In Speakers For W870CU 5 * Built-In Speakers (Supporting 2 Channel Stereo) Built-In 56K Fax Modem V.90 & V.92 Compliant Temperature Operating: Non-Operating: Relative Humidity Operating: Non-Operating: Interface For W870CU Note: External 5.1CH Audio Output Supported by Headphone, Microphone and Line-In Jacks Operating System Windows® Vista (with Service Pack 2) Windows® 7 Intel® WiFi Link Wireless LAN Module 5300 3*3 802.11 a/g/n Half Mini-Card with PCIe Interface (Factory Option) 3rd Party 802.11b/g/n Half Mini-Card Wireless LAN Module with PCIe Interface (Factory Option) Bluetooth 2.1 + EDR (Enhanced Data Rate) Module with USB Interface (Factory Option) 2.0M Pixel USB PC Camera Module with USB Interface (Factory Option) For W860CU Only: UMTS/HSPDA-based 3.75G Module with USB Mini-Card Interface (Factory Option) Quad-band GSM/GPRS (850 MHz, 900 MHz, 1800 MHz, 1900 MHz) UMTS WCDMA FDD (2100 MHz) Note that UMTS modes CAN NOT be used in North America. Power Management Supports Wake on LAN Supports Wake on USB Supports Resume From Modem Ring 5°C - 35°C -20°C - 60°C 20% - 80% 10% - 90% Dimensions & Weight W860CU 374mm (w) * 263.5mm (d) * 42mm (h) 3.3kg +/- 0.1kg With ODD & Battery W870CU 412mm (w) * 279mm (d) * 39-48mm (h) 4kg With ODD & Battery Factory Options As Per Model For W860CU Only: UMTS/HSPDA-based 3.75G Module with USB Mini-Card Interface For W870CU Only: Hybrid TV Tuner Card with USB Interface Factory Options for All Models Super Multi Drive ODD Module Blu-Ray ODD Module Power Intel® WiFi Link Wireless LAN Module 5300 3*3 802.11 a/g/n Half Mini-Card with PCIe Interface Full Range AC/DC Adapter AC input 100 - 240V, 50 - 60Hz, DC Output 20V, 6.0A OR 19V, 6.3A OR 18.5V, 6.5A Removable Polymer Smart Lithium-Ion Battery Pack, 42.18WH 3rd Party 802.11b/g/n Half Mini-Card Wireless LAN Module with PCIe Interface Bluetooth 2.1 + EDR (Enhanced Data Rate) Module Fingerprint Reader Module 2.0M Pixel USB PC Camera Module System Specifications 1 - 3 1.Introduction Four USB 2.0 Ports One eSATA Port One IEEE1394a Port One DVI-I Out Port One HDMI Out Port One Headphone-Out Jack One Microphone-In Jack One S/PDIF-Out Jack One Line-In Jack One RJ-11 Jack One RJ-45 LAN Jack One DC-In Jack Built-In 10/100/1000Mb Base-TX Ethernet LAN Introduction Figure 1 External Locator - Top View with LCD Panel Open 1.Introduction Top View 1. Optional Built-In PC Camera 2. LCD 3. Power Button 4. Speakers 5. LED Hot Key Buttons 6. LED Status Indicators 7. Keyboard 8. Built-In Microphone 9. Touchpad & Buttons 1 1 2 2 3 4 5 6 4 4 6 5 7 4 7 8 9 W860CU 1 - 4 External Locator - Top View with LCD Panel Open 8 9 W870CU 3 4 4 Introduction External Locator - Front & Right side Views Figure 2 Front Views W860CU 1. LED Power Indicators 2. Consumer Infrared Transceiver (for Optional TV Tuner) 1 W870CU 2 1 10 W860CU 1 2 3 4 5 7 6 8 W870CU 1 2 3 4 5 6 7 8 9 1. Headphone-Out Jack 2. Microphone-In Jack 3. Line-In Jack 4. S/PDIF-Out Jack 5. USB 2.0 Port 6. ExpressCard Slot 7. e-SATA Port 8. DVI-Out Port 9. Security (Kensington) Lock Slot (W870CU Only) 10. Power Button (W860CU Only) External Locator - Front & Right side Views 1 - 5 1.Introduction Figure 3 Right Side Views Introduction External Locator - Left Side & Rear View Figure 4 1.Introduction Left Side View 1. RJ-11 Modem Jack 2. USB 2.0 Port 3. Mini-IEEE 1394 Port 4. 7-in-1 Card Reader 5. Optical Device Drive Bay (for DVD Device) 6. Cable (CATV) Antenna Jack* W860CU 2 1 3 4 5 W870CU 4 1 6 3 5 2 *Enabled with Optional TV Tuner Only Figure 5 Rear View 1. Vent/Fan Intake/ Outlet 2. Security Lock Slot (W860CU Only) 3. HDMI-Out Port 4. DC-In Jack 5. 2 * USB Ports 6. RJ-45 LAN Jack 7. Rear Cover (W870CU Only) 1 - 6 External Locator - Left Side & Rear View W860CU 1 2 3 4 5 6 1 W870CU 1 3 4 7 5 5 1 Introduction External Locator - Bottom View Figure 6 Bottom View 1. Battery 2. Component Bay Cover 3. Vent/Fan Intake/ Outlet 4. Speaker 3 3 3 3 3 3 3 3 4 2 2 3 1.Introduction 3 3 1 3 1 W860CU W870CU Overheating To prevent your computer from overheating make sure nothing blocks the vent/fan intakes while the computer is in use. External Locator - Bottom View 1 - 7 Introduction Figure 7 Mainboard Overview - Top (Key Parts) Mainboard Top Key Parts 1. South Bridge 2. KBC ITE IT8502E 1 1.Introduction 2 W860CU 1 2 W870CU 1 - 8 Mainboard Overview - Top (Key Parts) Introduction Mainboard Overview - Bottom (Key Parts) Figure 8 Mainboard Bottom Key Parts 7 2 6 5 3 4 Mainboard Overview - Bottom (Key Parts) 1 - 9 1.Introduction 1 1. CPU Socket (no CPU installed) 2. Card Reader Socket 3. Memory Slots DDR3 SO-DIMM 4. Mini-Card Connector (3G Module for W860CU and TV Module for W870CU) 5. Mini-Card Connector (WLAN Module) 6. ExpressCard Connector 7. VGA-Card Connector Introduction Figure 9 Mainboard Overview - Top (Connectors) 1.Introduction Mainboard Top Connectors 1. USB Port 2. LCD Cable Connector 3. CCD Connector 4. Hotkey & LED Connector 5. Keyboard Cable Connector 6. TouchPad Cable Connector 7. Speaker Connector 1 2 3 4 7 5 6 W860CU 1 2 3 4 7 5 W870CU 1 - 10 Mainboard Overview - Top (Connectors) 6 Introduction Mainboard Overview - Bottom (Connectors) Figure 10 Mainboard Bottom Connectors 1 3 5 2 4 7 Mainboard Overview - Bottom (Connectors) 1 - 11 1.Introduction 6 1. USB Port 2. CPU Fan Cable Connector 3. BT Cable Connector 4. CD-ROM Connector 5. System Fan Cable Connector 6. VGA Fan Cable Connector 7. HDD Connector 1.Introduction Introduction 1 - 12 Disassembly Chapter 2: Disassembly Overview This chapter provides step-by-step instructions for disassembling the W860CU/W870CU series notebook’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. Information A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar. Warning Overview 2 - 1 2.Disassembly Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are repeated here for your convenience. Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too). Maintenance Tools The following tools are recommended when working on the notebook PC: 2.Disassembly • • • • • • M3 Philips-head screwdriver M2.5 Philips-head screwdriver (magnetized) M2 Philips-head screwdriver Small flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap Connections Connections within the computer are one of four types: 2 - 2 Overview Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start. Disassembly Maintenance Precautions The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions: Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. Cleaning Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer. Overview 2 - 3 2.Disassembly 1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. 2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. 3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). 4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. 5. Be careful with power. Avoid accidental shocks, discharges or explosions. •Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. •When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. 6. Peripherals – Turn off and detach any peripherals. 7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. 8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. 9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer. Disassembly Disassembly Steps The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM THE DISASSEMBLY STEPS IN THE ORDER INDICATED. To remove the Battery: 1. Remove the battery To remove the Bluetooth Module: page 2 - 5 To remove the HDD: 2.Disassembly 1. Remove the battery 2. Remove the HDD page 2 - 5 page 2 - 6 To remove the Optical Device: 1. Remove the battery 2. Remove the Optical device page 2 - 5 page 2 - 9 To remove the System Memory: 1. Remove the battery 2. Remove the system memory page 2 - 5 page 2 - 10 To remove and install a Processor: 1. 2. 3. 4. Remove the battery Remove the system memory Remove the processor Install the processor page 2 - 5 page 2 - 10 page 2 - 12 page 2 - 14 To remove the WLAN Module: 1. Remove the battery 2. Remove the system memory 3. Remove the wireless LAN 2 - 4 Disassembly Steps page 2 - 5 page 2 - 10 page 2 - 15 1. Remove the battery 2. Remove the system memory 3. Remove the Bluetooth page 2 - 5 page 2 - 10 page 2 - 16 To remove the 3G: 1. Remove the battery 2. Remove the HDD 3. Remove the 3G page 2 - 5 page 2 - 6 page 2 - 17 To remove the Keyboard: 1. Remove the battery 2. Remove the system memory 3. Remove the keyboard page 2 - 5 page 2 - 10 page 2 - 18 Disassembly Removing the Battery 1. 2. 3. 4. Turn the computer off, and turn it over. Slide the latch 1 in the direction of the arrow. Slide the latch 2 in the direction of the arrow, and hold it in place. Lift the battery 63 out in the direction of the arrow 4 . Figure 1 Battery Removal a. Slide the latch and hold in place. b. Lift the battery out in the direction of the arrow. a. W860CU W870CU 2.Disassembly 2 2 1 1 b. 3 4 3 4 4 3 3. Battery Removing the Battery 2 - 5 Disassembly Removing the Hard Disk Drive Figure 2 HDD Assembly Removal a. Locate the HDD bay cover and remove the screw(s). b. Slide the HDD assembly in the direction of the arrow. The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk. Hard Disk Upgrade Process 1. 2. 3. 4. Turn off the computer, and remove the battery (page 2 - 5). The first hard disk bay is located under the battery compartment. Remove screws 1 - 2 from the hard disk cover. Slide the hard disk assembly in the direction of arrow 3 . b. 2.Disassembly a. 1 3 2 HDD System Warning New HDD’s are blank. Before you begin make sure: You have backed up any data you want to keep from your old HDD. • 2 Screws You have all the CD-ROMs and FDDs required to install your operating system and programs. If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan to install. Copy these to a removable medium. 2 - 6 Removing the Hard Disk Drive Disassembly 5. Lift the hard disk assembly out of the computer in the direction of arrow 4 . 6. Remove the screws 5 - 8 and the cover bracket 69 from the harddisk 10 . 7. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers). c. d. 6 7 5 Figure 3 HDD Assembly Removal (cont’d.) c. Lift the HDD assembly in the direction of the arrow. d. Remove the screws and cover bracket from the HDD. 9 4 8 2.Disassembly 10 Hard Disk Screws & Cover The hard disks and covers pictured here may appear slightly different from your model design (these designs are subject to change and upgrade without notice). Pay careful attention to the screws and cover bracket orientation. 9. HDD Cover Bracket 10. HDD • 4 Screws Removing the Hard Disk Drive 2 - 7 Disassembly Removing the Hard Disk(s) in the Secondary HDD Bay (W870CU only) Figure 4 Secondary HDD Assembly Removal Turn off the computer, and turn it over and remove the battery. Locate the component bay cover and remove screws 1 - 11 . Carefully remove the cover 12 . Slide the hard disk assembly in the direction of the arrow 13 . Lift the hard disk assembly 14 out of the compartment. Remove the screws 15 - 20 to separate the hard disk 21 from the brackets. Reverse the process to install a new hard disk drive (do not forget to replace all screws and covers). a. 2 11 10 2 Model 15 12 3 1 W870CU c. 5 4 1 2.Disassembly a. Remove the screws and cover. b. Slide the hard disk assembly out off the computer. c. Remove the screws to separate the hard disk from the brackets. 1. 2. 3. 4. 5. 6. 7. 17 16 21 B6 18 20 9 8 7 19 b. 21. Hard Disk 13 • 17 Screws 2 - 8 Removing the Hard Disk Drive Disassembly Removing the Optical (CD/DVD) Device Figure 5 1. 2. 3. 4. 5. Turn off the computer, and remove the battery (page 2 - 5). Locate the component bay cover 1 and remove screws 2 - 10 (W860CU) or 2 - 13 (W870CU). Carefully remove the component bay cover 1 . Remove the screw at point 14 , and use a screwdriver to carefully push out the optical device 16 at point 15 . Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The screw holes should line up). 6. Restart the computer to allow it to automatically detect the new device. a. 3 2 5 6 4 10 W860CU 8 1 4 W870CU 7 13 6 5 2 a. Remove the screws. b. Remove the cover. c. Remove the screw. d. Push the optical device out off the computer at point 14. 1 12 11 10 9 2.Disassembly 9 3 Optical Device Removal 7 8 b. 1 1 d. 16 15 c. 15 14 15 14 1. Component Bay Cover 15. Optical Device • 10 Screws (W860CU) / 13 Screws (W870CU) Removing the Optical (CD/DVD) Device 2 - 9 Disassembly Figure 6 RAM Module Removal a. Remove the screws. b. Remove the cover. 2.Disassembly Contact Warning Removing the System Memory (RAM) The computer has two memory sockets for 204 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting DDR3 1333MHz. The main memory can be expanded up to 4GB. The SO-DIMM modules supported are DDRIII 1GB, and 2GB Modules. The total memory size is automatically detected by the POST routine once you turn on your computer. Memory Upgrade Process 1. 2. 3. 4. Turn off the computer, remove the battery (page 2 - 5). Locate the component bay cover 1 and remove screws 2 - 10 (W860CU) or 2 - 13 (W870CU). Carefully remove the component bay cover 1 . The RAM is located at point 14 . a. Be careful not to touch the metal pins on the module’s connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the module’s performance. 3 2 10 5 6 4 9 W860CU 8 1 3 4 W870CU 7 13 1 12 10 9 11 b. • 9 Screws (W860CU) / 12 Screws (W870CU) 2 - 10 Removing the System Memory (RAM) 1 1 1. Component Bay Cover RAM Location 14 6 5 2 14 7 8 Disassembly 5. Gently pull the two release latches ( 15 & 16 ) on the sides of the memory socket in the direction indicated by the arrows (Figure 7c). d. c. 15 16 Figure 7 RAM Module Removal (cont’d.) c. Pull the release latch(es). d. Remove the module(s). 17 2.Disassembly 6. 7. 8. 9. The RAM module(s) 17 will pop-up (Figure 7d), and you can then remove it. Pull the latches to release the second module if necessary. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE the module; it should fit without much pressure. 10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 11. Replace the bay cover and screws. 12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. 17. RAM Module(s) Removing the System Memory (RAM) 2 - 11 Disassembly Figure 8 Processor Removal 2.Disassembly a. Remove the screws. b. Remove the heatsink fan. c. Remove the screws in the order indicated. d. Remove the heat sink. Removing and Installing the Processor Processor Removal Procedure 1. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 10). 2. Remove the CPU heat sink screws in the order 4 , 3 , 2 & 1 (the reverse order as indicated on the label). 3. Carefully lift up the heat sink 5 (Figure 8c) off the computer. a. Note: Loosen the screws in the reverse order 4, 3, 2, 1 as indicated on the label. CPU Warning In order to prevent damaging the contact pins when removing the CPU, it is necessary to first remove the WLAN module from the computer. b. d. c. 4 5 1 5. Heat Sink • 4 Screws 2 - 12 Removing and Installing the Processor 3 2 Disassembly 4. 5. 6. 7. Turn the release latch 6 towards the unlock symbol , to release the CPU (Figure 9a). Carefully (it may be hot) lift the CPU 7 up out of the socket (Figure 9b). See page 2 - 14 for information on inserting a new CPU. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!). Figure 9 Processor Removal (cont’d) e. Turn the release latch to unlock the CPU. f. Lift the CPU out of the socket. e. Unlock 2.Disassembly 6 6 Lock f. 7 Caution The heat sink, and CPU area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts. 7. CPU Removing and Installing the Processor 2 - 13 Disassembly Figure 10 Processor Installation a. Insert the CPU. b. Turn the release latch towards the lock symbol. c. Remove the sticker from the heat sink and insert the heat sink. d. Tighten the screws. Processor Installation Procedure 1. Insert the CPU A , pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!), and turn the release latch B towards the lock symbol (Figure 10b). 2. Remove the sticker C (Figure 10c) from the heat sink. 3. Insert the heat sink D as indicated in Figure 10c. 4. Tighten the CPU heat sink screws in the order 1 , 2 , 3 & 4 (the order as indicated on the label and Figure 10d). 5. Replace the CPU fan, component bay cover and tighten the screws (page 2 - 12). d. c. a. 2.Disassembly A C 4 1 D 3 2 b. Note: Tighten the screws in the order 1, 2, 3, 4 as indicated on the label. A. CPU D. Heat Sink • 4 Screws B 2 - 14 Removing and Installing the Processor Disassembly Removing the Wireless LAN Module 1. 2. 3. 4. 5. Figure 11 Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 10). The Wireless LAN module will be visible at point 1 on the mainboard. Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket. The Wireless LAN module 5 will pop-up. Lift the Wireless LAN module (Figure 11d) up and off the computer. a. W860CU W870CU a. Remove the cover. b. Disconnect the cables and remove the screw. c. The WLAN module will pop up. d. Lift the WLAN module out. 2.Disassembly 1 1 Wireless LAN Module Removal d. c. b. 5 4 3 5. WLAN Module. 2 5 • 1 Screw Removing the Wireless LAN Module 2 - 15 Disassembly Figure 12 Bluetooth Module Removal Removing the Bluetooth Module 1. 2. 3. a. Remove the screw and dis4. connect the cable and the connector. b. Lift the Bluetooth module up off the socket. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 10). Locate the Bluetooth module, and remove the screw 1 . Carefully separate the Bluetooth module from the connector 2 and disconnect the cable 3 . Lift the Bluetooth module 4 (Figure 12b) up and off the computer. a. W860CU 2 a. W870CU 2.Disassembly 2 3 3 1 1 b. b. 4 4. Bluetooth Module • 1 Screw 2 - 16 Removing the Bluetooth Module 4 Disassembly Removing the 3G Module Figure 13 1. Turn off the computer, remove the battery (page 2 - 5). 2. Locate the 3G module cover, and remove the screw 1 . 3. Remove the 3G module cover 2 and carefully disconnect the cable 3 and remove the screw 4 from the 3G module. 4. Lift the 3G module 5 (Figure 13b) up and off the computer. c. a. W860CU 3G Module Removal a. Remove the screw. b. Remove the 3G module cover. Disconnect the cable and remove the screw. c. Lift the 3G module up off the socket. W870CU 2.Disassembly 5 1 1 b. 4 4 3 3 2 2. 3G Module Cover 5. 3G Module 2 5 • 1 Screw Removing the 3G Module 2 - 17 Disassembly Figure 14 Keyboard Removal 2.Disassembly a. Press at point 1 to unsnap the LED cover module. b. Lift the LED cover module and disconnect the cable. c. Remove the screws. d. Disconnect the cable from the locking collar. e. Remove the keyboard. Removing the Keyboard 1. Turn off the computer, and remove the battery (page 2 - 5), component bay cover (page 2 - 10), and processor (page 2 - 12). 2. W860CU: (see over for W870CU) Press at point 1 to unsnap the LED cover module 2 (you may need to use a small screwdriver to do this). 3. Turn the computer over, open the Lid/LCD and carefully lift the LED cover module 2 and disconnect the cable 3 . 4. Remove screws 4 - 8 from the keyboard. 5. Carefully lift the keyboard 9 up, being careful not to bend the keyboard ribbon cable (Figure 14d). 6. Disconnect the keyboard ribbon cable 10 from the locking collar socket 11 . 7. Remove the keyboard. d. a. 10 9 1 11 b. e. 2 3 c. 2. LED Cover Module 9. Keyboard 9 4 • 5 Screws 2 - 18 Removing the Keyboard 5 6 7 8 Disassembly 8. W870CU: Remove the screw 1 and press at point 2 to unsnap the the hinge cover module. 9. Turn the computer over, open the Lid/LCD and lift the hinge cover module 3 and disconnect the cables 4 & 5 . 10. Turn the computer over again, press at point 6 to unsnap the LED cover module 7 (you may need to use a small screwdriver to do this). 11. Turn the computer over, open the Lid/LCD and carefully lift the LED cover module 7 and disconnect the cable 8 . 12. Remove screws 9 - 13 from the keyboard 13. Carefully lift the keyboard 14 up, being careful not to bend the keyboard ribbon cable (Figure 14d). 14. Disconnect the keyboard ribbon cable 15 from the locking collar socket 16 . 15. Remove the keyboard 14 . 2 2 2 e. a. 10 9 11 1 4 3 15 5 13 a. Remove the screw and press at point 2 tounsnap the hinge cover module. b. Lift the hinge cover module and disconnect the cables. c. Press at point 6 to unsnap the LED cover module. d. Lift the LED cover module and disconnect the cable. e. Remove the screws. f. Disconnect the cable from the locking collar. g. Remove the keyboard. 14 16 c. g. 6 3. Hinge Cover Module 7. LED Cover Module 14. Keyboard d. 7 8 14 • 6 Screws Removing the Keyboard 2 - 19 2.Disassembly f. b. 12 Figure 15 Keyboard Removal (cont’d.) 2.Disassembly Disassembly 2 - 20 Part Lists Appendix A: Part Lists This appendix breaks down the W860CU/W870CU series notebook’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used. A.Part Lists Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers. A - 1 Part Lists Part List Illustration Location The following table indicates where to find the appropriate part list illustration. Table A- 1 A.Part Lists Part List Illustration Location Parts W860CU W870CU Top with Fingerprint page A - 3 page A - 9 Top without Fingerprint page A - 4 page A - 10 Bottom page A - 5 page A - 11 LCD page A - 6 page A - 12 2nd HDD A - 2 Part List Illustration Location page A - 13 COMBO page A - 7 page A - 14 DVD-Dual Drive page A - 8 page A - 15 Part Lists Top with Fingerprint (W860CU) Figure A - 1 壓克力 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 頭徑 頭厚 號 無鉛 無鉛 無鉛 黑色 無鉛 無鉛 無鉛 無鉛 頭厚 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 ~ 點膠 無鉛 無鉛)(PVT修改厚度) Top with Fingerprint (W860CU) A - 3 A.Part Lists Top with Fingerprint (W860CU) Part Lists Top without Fingerprint (W860CU) A.Part Lists Figure A - 2 Top without Fingerprint (W860CU) 壓克力 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 頭徑 頭厚 號 無鉛 無鉛 無鉛 (黑色) 無鉛 無鉛 無鉛 無鉛 頭厚 無鉛 無鉛 無鉛 無鉛 Ω 無鉛 無鉛 無鉛 無鉛 ~ 點膠 無鉛 無鉛)(PVT修改厚度) A - 4 Top without Fingerprint (W860CU) Part Lists Bottom (W860CU) 支鐵柱改為有"止滑溝"設計 無鉛 無鉛 凱碩 無鉛 亞旭 無鉛 無鉛 無鉛 無鉛)(增加GASKET) 相變化導熱片 無鉛 華力 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛)(PVT後設變修改) 無鉛 海華 無鉛 海華 Figure A - 3 Bottom (W860CU) 無鉛 無鉛 惠貿 無鉛 無鉛 (加一缺口,不遮蔽 無鉛 無鉛 無鉛 度,黑色 無鉛 無鉛 無鉛 無鉛 無鉛 華力 無鉛 (左旋) 無鉛 藍天7互億 (無鉛) 凱碩 (無鉛) 黑色 無鉛 無鉛 透明 帝人 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛)(DVT後設變修改) 無鉛 無鉛 硬度 黑色 無鉛 無鉛 無鉛 無鉛 無鉛 Bottom (W860CU) A - 5 A.Part Lists 惠貿 Part Lists LCD (W860CU) A.Part Lists Figure A - 4 LCD (W860CU) 無鉛 無鉛 無鉛 銘板 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 非耐落 無鉛 惠貿 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 (改善品) 無鉛 無鉛 惠貿 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 (華力) 無鉛 無鉛 無鉛 中性 電鑄薄膜鍍亮鉻(字體連結) 無鉛 無鉛 A - 6 LCD (W860CU) Part Lists COMBO (W860CU) Figure A - 5 無鉛 無鉛 已內縮 無鉛 無鉛 *(非耐落) 無鉛 COMBO (W860CU) A - 7 A.Part Lists COMBO (W860CU) Part Lists DVD-Dual Drive (W860CU) A.Part Lists Figure A - 6 DVD-Dual Drive (W860CU) 無鉛 無鉛 內縮 無鉛 無鉛 無鉛 *(非耐落) A - 8 DVD-Dual Drive (W860CU) 無鉛 Part Lists Top with Fingerprint (W870CU) 無鉛 黑色 (無鉛) 無鉛 無鉛 無鉛 導光 無鉛 無鉛 (無印刷) 無鉛 無鉛 無鉛 Figure A - 7 Top with Fingerprint (W870CU) 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 Ω 無鉛 無鉛 無鉛 Ω 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 Top with Fingerprint (W870CU) A - 9 A.Part Lists 無鉛 Part Lists Top without Fingerprint (W870CU) A.Part Lists Figure A - 8 Top without Fingerprint (W870CU) 無鉛 黑色 (無鉛) 無鉛 無鉛 無鉛 無鉛 導光 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 Ω 無鉛 無鉛 無鉛 Ω 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 A - 10 Top without Fingerprint (W870CU) Part Lists Bottom (W870CU) 無鉛 無鉛 無鉛 無鉛 凱碩 無鉛 亞旭 無鉛 無鉛 非耐落 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 海華 無鉛 無鉛 無鉛 無鉛 無鉛 相變化導熱片 無鉛 無鉛 (左旋) 無鉛 無鉛 Figure A - 9 Bottom (W870CU) 無鉛 無鉛 惠貿 無鉛 惠貿 無鉛 無鉛 非耐落 無鉛 無鉛 惠貿(無鉛) 無鉛 無鉛 度,黑色 無鉛 無鉛 無鉛 無鉛 無鉛 華力 無鉛 凱碩 無鉛 藍天7 互億 無鉛 無鉛 改善不易放入問題 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 Bottom (W870CU) A - 11 A.Part Lists (加一缺口,不遮蔽 Part Lists LCD (W870CU) A.Part Lists Figure A - 10 LCD (W870CU) 無鉛 無鉛 無鉛 無鉛 壓克力 無鉛 壓克力 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 惠貿 非耐落 無鉛 無鉛 無鉛 無鉛 無鉛 惠貿 無鉛 無鉛 中性 電鑄薄膜鍍亮鉻(字體連結) 無鉛 無鉛 A - 12 LCD (W870CU) Part Lists 2nd HDD (W870CU) Figure A - 11 無鉛 無鉛 無鉛 2nd HDD (W870CU) A - 13 A.Part Lists 2nd HDD (W870CU) Part Lists COMBO (W870CU) A.Part Lists Figure A - 12 COMBO (W870CU) 無鉛 無鉛 已內縮 已內縮 已內縮 無鉛 無鉛 無鉛 無鉛 無鉛 無鉛 A - 14 COMBO (W870CU) Part Lists DVD-Dual Drive (W870CU) Figure A - 13 無鉛 無鉛 內縮 無鉛 無鉛 無鉛 DVD-Dual Drive (W870CU) A - 15 A.Part Lists DVD-Dual Drive (W870CU) A.Part Lists Part Lists A - 16 Schematic Diagrams Appendix B: Schematic Diagrams This appendix has circuit diagrams of the W860CU/W870CU notebook’s PCB’s. The following table indicates where to find the appropriate schematic diagram. Diagram - Page Diagram - Page Diagram - Page Clock Generator - Page B - 21 Power VCore - Page B - 40 Processor 1/7 - Page B - 3 Panel, Inverter - Page B - 22 AC_In, Charger - Page B - 41 Processor 2/7 - Page B - 4 DVI - Page B - 23 USB 3.0 - Page B - 42 Processor 3/7 - Page B - 5 HDMI - Page B - 24 Power Button Board - Page B - 43 Processor 4/7 - Page B - 6 MXM PCI-E - Page B - 25 LED Board - Page B - 44 Processor 5/7 - Page B - 7 EC-IT8502E - Page B - 26 Multi I/O Board - Page B - 45 Processor 6/7 - Page B - 8 USB, eSATA, New Card - Page B - 27 Touch Sensor Board - Page B - 46 Processor 7/7 - Page B - 9 Mini Card - Page B - 28 Left-LED Board - Page B - 47 DDRIII SO-DIMM_0 - Page B - 10 BT, TPM, MDC, LID - Page B - 29 Fingerprint Board - Page B - 48 DDRIII SO-DIMM_1 - Page B - 11 LAN, RTL8111L, RJ45 - Page B - 30 Click Board - Page B - 49 IBEXPEAK - M 1/9 - Page B - 12 Fan, CCD, LED, Screw Hole - Page B - 31 W870CU Second HDD Board - Page B - 50 IBEXPEAK - M 2/9 - Page B - 13 Azalia Codec ALC888 - Page B - 32 W870CU Multi I/O Board - Page B - 51 IBEXPEAK - M 3/9 - Page B - 14 SRS-AP8202, SATA ODD & HDD - Page B - 33 W870CU CIR Board - Page B - 52 IBEXPEAK - M 4/9 - Page B - 15 AMP-TPA6017, Subwoofer - Page B - 34 W870CU LED Board - Page B - 53 IBEXPEAK - M 5/9 - Page B - 16 5V, 3.3V, 3.3VS, 5VS, 1.5VS - Page B - 35 W870CU RJ11 & TV Board - Page B - 54 IBEXPEAK - M 6/9 - Page B - 17 VDD3, VDD5 - Page B - 36 W870CU Power Button Board - Page B - 55 IBEXPEAK - M 7/9 - Page B - 18 Power 1.8VS, 1.1VS - Page B - 37 W870CU Right-Logo Board - Page B - 56 IBEXPEAK - M 8/9 - Page B - 19 Power 1.5V/0.75V - Page B - 38 W870CU Left-Logo Board - Page B - 57 IBEXPEAK - M 9/9 - Page B - 20 Power 1.1VS_VTT - Page B - 39 W870CU Touch Sensor Board - Page B - 58 Schematic Diagrams B.Schematic Diagrams System Block Diagram - Page B - 2 Table B - 1 Version Note The schematic diagrams in this chapter are based upon version 6-7P-W860H007. If your mainboard (or other boards) are a later version, please check with the Service Center for updated diagrams (if required). B - 1 Schematic Diagrams System Block Diagram W870CU TOUCH SENSOR BOARD W86/870CU System Block Diagram 14 .31 8 M Hz W860CU LED BOARD VDD3,VDD5 B.Schematic Diagrams Clock Generator SLG8SP585V Clarksfield PROCESSOR MXM-III VGA DAUGHTER CARD rPG A989/988 Me mory Termi natio n 1.1VS_VTT 80 0/106 7/133 3 MHz DD R3 / 1.5V W860CU MULTI I/O BOARD DDRIII SO-DIMM0 5V,3.3V,1.8VS,1.5VS DDRIII SO-DIMM1 1.1VS,1.8VS SYSTEM SMBUS 0.1"~13 PCI-E x16 Sheet 1 of 57 System Block Diagram W860CU POWER BUTTON BOARD W860CU TOUCH SENSOR BOARD W860CU LEFT-LED BOARD HDM I DMI*4 1.5V,0.75VS(VTT_MEM) <=8" FINGERPRINT BOARD VCORE DVI /RGB C LIC K B OAR D TOUCH PAD Ibex Peak-M Platform Controller Hub (PCH) LVD S/INV Synaptic 8 106 02- 170 3 TPM 32. 768 KH z SPI 128 pins LQ FP 14*14* 1.6mm HP OUT CLICK BOARD AC_IN, CHARGER AZALIA MDC MODULE W870CU SECOND HDD BOARD MDC CON INT SP K R AZALIA CODEC A LC6 62 FOR W8 60C U A LC8 88 FOR W8 70C U AUDIO AMP. W870CU MULTI I/O BOARD INT SP K L APA2057 W870CU CIR BOARD INT MI C 33 MHz BIOS SPI 24 MH z AZALIA LINK W870CU LED BOARD EC SMBUS PCIE THERMAL SENSOR ADM1032 SMART FAN SMART BATTERY SATA I/II 3.0Gb/s SATA ODD M IC IN SRS BRAIDWOOD 25x 27mm 107 1 Ball FCBGA LPC 0.5"~11" SPD IF OUT 5.1 CHANNEL OUT SLB9635TT EC ITE 8512E INT. K/B L INE IN R J-1 1 100 M Hz <12" W870CU RJ11 & TV BOARD 3 2.7 68K Hz New Card SOCKET (USB5) <12" Mini PCIE SOCKET (USB6) 3G & TV CARD Mini PCIE SOCKET (USB7) WLAN LAN 25 MHz e-SATA SIM Ca rd USB2.0 1"~16" 480 Mbps 25 MHz JMB380 RE ALT EK 24 .576 MH z RT L81 11D L RJ- 45 CARD READE R 7 IN 1 I EEE 1 394 W870CU POWER BUTTON BOARD W870CU RIGHT-LOGO BOARD W870CU LEFT-LOGO BOARD FIN GER PR INT ER BOA RD SATA HDD USB3.0 OPTION USB1 USB0 US B_C onn . USB2 US B_C onn . USB3 CCD (USB9) Bluetooth (USB4) FingerPrint (USB8) (O pti ona l) B - 2 System Block Diagram 12 MHz MMC/SD/MS/MS Pro Schematic Diagrams Processor 1/7 PROCESSOR 1/7 ( DMI,PEG,FDI ) P E G _R X N [ 0 . . 1 5] P E G _R X P [ 0. . 15 ] P E G _T X N [ 0 . . 1 5 ] P E G _T X P [ 0 . . 1 5] P E G _ RX N[0 .. 1 5 ] 2 4 P E G_ R X P [ 0 . . 1 5 ] 2 4 P E G_ T XN [ 0 . . 15 ] 2 4 P E G_ T XP [ 0 . . 1 5 ] 2 4 V DD 3 U3 4 A 1 CP U_ T HE R M 2 5 V D D3 R T3 NEAR EC 2 D03 BOM DEL D02 BOM DEL R 47 5 R4 7 6 * 4. 7 K _ 0 4 *4 . 7 K _ 04 C 64 3 * 0. 1 u _ 16 V _ Y 5V _ 0 4 Thermal Sensor D M I _ TX N 0 D M I _ TX N 1 D M I _ TX N 2 D M I _ TX N 3 13 13 13 13 D M I _ TX P 0 D M I _ TX P 1 D M I _ TX P 2 D M I _ TX P 3 13 13 13 13 D MI _ R XN 0 D MI _ R XN 1 D MI _ R XN 2 D MI _ R XN 3 D 24 G 24 F23 H 23 D MI _ R XP 0 D MI _ R XP 1 D MI _ R XP 2 D MI _ R XP 3 D 25 F24 E2 3 G 23 13 13 13 13 3 .3 V 3 . 3V B2 4 D 23 B2 3 A2 2 P E G_ I C OM P I P E G _ I C O MP O P E G_ R C O MP O P E G_ R B I A S D MI _R X #[ 0 ] D MI _R X #[ 1 ] D MI _R X #[ 2 ] D MI _R X #[ 3 ] D MI _R X [ 0] D MI _R X [ 1] D MI _R X [ 2] D MI _R X [ 3] P E G_ R X # [ 0 ] P E G_ R X # [ 1 ] P E G_ R X # [ 2 ] P E G_ R X # [ 3 ] P E G_ R X # [ 4 ] P E G_ R X # [ 5 ] P E G_ R X # [ 6 ] P E G_ R X # [ 7 ] P E G_ R X # [ 8 ] P E G_ R X # [ 9 ] P E G_ R X# [ 1 0 ] P E G_ R X# [ 1 1 ] P E G_ R X# [ 1 2 ] P E G_ R X# [ 1 3 ] P E G_ R X# [ 1 4 ] P E G_ R X# [ 1 5 ] DMI *1 0 0K _ N TC _ 06 _ B A2 4 C 23 B2 2 A2 1 13 13 13 13 D MI _T X # [ 0] D MI _T X # [ 1] D MI _T X # [ 2] D MI _T X # [ 3] D MI _T X [ 0 ] D MI _T X [ 1 ] D MI _T X [ 2 ] D MI _T X [ 3 ] R4 8 8 C 1 2 VD D D + T H E RM A LE R T D G ND SD ATA SC L K 4 6 E B Q3 2 2N 3 90 4 3 5 7 8 R1 9 1 R4 7 7 * 0 _0 4 R1 9 0 1 0 K_ 0 4 1 2 4 3 *2 0 mi l _ sh o rt RN2 0 33 _ 4 P 2R _ 04 T H E R M _A L E R T # 2 5 V DD 3 S MD _C P U _ T H E R M S MC _C P U _ T H E R M 12 , 2 5 12 , 2 5 A D M1 0 3 2A R M It applies to Auburndale and Clarksfield discrete graphic designs. If discrete graphic chip is used for Auburndale, VAXG (GFX core) rail can be connected to GND if motherboard only supports discrete graphics and also in a common motherboard design if GFX VR is not stuffed. On the other hand, if the VR is stuffed, VAXG can be left floating in a common motherboard design (Gfx VR keeps VAXG from floating). In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left floating on the PCH. FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Auburndale. The GFX_IMON, FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and D 22 C 21 D 20 C 18 G 22 E2 0 F20 G 19 R1 4 0 1 K_ 0 4 F17 E1 7 RN 9 4 3 2 1 5 6 7 8 C 17 F18 D 17 F D I _ T X# [ 0 ] F D I _ T X# [ 1 ] F D I _ T X# [ 2 ] F D I _ T X# [ 3 ] F D I _ T X# [ 4 ] F D I _ T X# [ 5 ] F D I _ T X# [ 6 ] F D I _ T X# [ 7 ] F D I _ T X[ F D I _ T X[ F D I _ T X[ F D I _ T X[ F D I _ T X[ F D I _ T X[ F D I _ T X[ F D I _ T X[ 0] 1] 2] 3] 4] 5] 6] 7] F D I _ F S Y N C [ 0] F D I _ F S Y N C [ 1] Intel(R) FDI E2 2 D 21 D 19 D 18 G 21 E1 9 F21 G 18 F DI_ INT F DI_ L S Y N C[0 ] F DI_ L S Y N C[1 ] 1 K _ 8 P 4 R_ 0 4 FDI_INT signals should be tied to GND (through 1K ? % resistors) in the common motherboard design case. Please not that if these signals are left floating, there are no functional impacts but a small amount of power (~15 mW) maybe wasted. VAXG_SENSE and VSSAXG_SENSE on Auburndale can be left as no connect. PCI EXPRESS -- GRAPHICS *1 0 K _ 04 U 36 PEG _ RX[0 ] PEG _ RX[1 ] PEG _ RX[2 ] PEG _ RX[3 ] PEG _ RX[4 ] PEG _ RX[5 ] PEG _ RX[6 ] PEG _ RX[7 ] PEG _ RX[8 ] PEG _ RX[9 ] P E G_ R X [ 1 0 ] P E G_ R X [ 1 1 ] P E G_ R X [ 1 2 ] P E G_ R X [ 1 3 ] P E G_ R X [ 1 4 ] P E G_ R X [ 1 5 ] P E G _ TX # [ 0 ] P E G _ TX # [ 1 ] P E G _ TX # [ 2 ] P E G _ TX # [ 3 ] P E G _ TX # [ 4 ] P E G _ TX # [ 5 ] P E G _ TX # [ 6 ] P E G _ TX # [ 7 ] P E G _ TX # [ 8 ] P E G _ TX # [ 9 ] P E G_ T X# [ 1 0 ] P E G_ T X# [ 1 1 ] P E G_ T X# [ 1 2 ] P E G_ T X# [ 1 3 ] P E G_ T X# [ 1 4 ] P E G_ T X# [ 1 5 ] P E G _T X [ 0 ] P E G _T X [ 1 ] P E G _T X [ 2 ] P E G _T X [ 3 ] P E G _T X [ 4 ] P E G _T X [ 5 ] P E G _T X [ 6 ] P E G _T X [ 7 ] P E G _T X [ 8 ] P E G _T X [ 9 ] P E G _ TX [ 1 0 ] P E G _ TX [ 1 1 ] P E G _ TX [ 1 2 ] P E G _ TX [ 1 3 ] P E G _ TX [ 1 4 ] P E G _ TX [ 1 5 ] DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on Auburndale directly if motherboard only supports discrete graphics. In a common motherboard design, these pins are driven via PCH (even if Graphics is disabled by BIOS) thus no external termination is required. B2 6 A2 6 B2 7 A2 5 20 mil P E G _I R C O MP _R R 40 9 EXP _ RBIA S 4 9. 9 _ 1 % _0 4 R 41 2 7 50 _ 1 % _0 4 K3 5 J 34 J 33 G3 5 G3 2 F34 F31 D3 5 E3 3 C3 3 D3 2 B3 2 C3 1 B2 8 B3 0 A3 1 P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R X# _ 0 X# _ 1 X# _ 2 X# _ 3 X# _ 4 X# _ 5 X# _ 6 X# _ 7 X# _ 8 X# _ 9 X# _ 1 0 X# _ 1 1 X# _ 1 2 X# _ 1 3 X# _ 1 4 X# _ 1 5 C5 6 6 C5 6 3 C5 4 2 C5 6 8 C5 4 4 C5 5 6 C5 4 8 C5 4 6 C5 5 0 C5 5 2 C5 5 4 C5 3 6 C5 6 0 C5 3 3 C5 5 8 C5 3 9 . . . . . . . . . . . . . . . . 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _R _R _R _R _R _R _R _R _R _R _R _R _R _R _R _R X N0 X N1 X N2 X N3 X N4 X N5 X N6 X N7 X N8 X N9 X N1 0 X N1 1 X N1 2 X N1 3 X N1 4 X N1 5 J 35 H3 4 H3 3 F35 G3 3 E3 4 F32 D3 4 F33 B3 3 D3 1 A3 2 C3 0 A2 8 B2 9 A3 0 P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R P E G_ R X_ 0 X_ 1 X_ 2 X_ 3 X_ 4 X_ 5 X_ 6 X_ 7 X_ 8 X_ 9 X_ 1 0 X_ 1 1 X_ 1 2 X_ 1 3 X_ 1 4 X_ 1 5 C5 6 5 C5 6 2 C5 4 1 C5 6 7 C5 4 3 C5 5 5 C5 4 7 C5 4 5 C5 4 9 C5 5 1 C5 5 3 C5 3 5 C5 5 9 C5 3 2 C5 5 7 C5 3 8 . . . . . . . . . . . . . . . . 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _R _R _R _R _R _R _R _R _R _R _R _R _R _R _R _R XP0 XP1 XP2 XP3 XP4 XP5 XP6 XP7 XP8 XP9 XP1 0 XP1 1 XP1 2 XP1 3 XP1 4 XP1 5 L 33 M3 5 M3 3 M3 0 L 31 K3 2 M2 9 J 31 K2 9 H3 0 H2 9 F29 E2 8 D2 9 D2 7 C2 6 P E G_ T X # _0 P E G_ T X # _1 P E G_ T X # _2 P E G_ T X # _3 P E G_ T X # _4 P E G_ T X # _5 P E G_ T X # _6 P E G_ T X # _7 P E G_ T X # _8 P E G_ T X # _9 P E G_ T X # _1 0 P E G_ T X # _1 1 P E G_ T X # _1 2 P E G_ T X # _1 3 P E G_ T X # _1 4 P E G_ T X # _1 5 C1 5 C3 4 C1 7 C1 9 C3 6 C2 1 C3 8 C2 3 C4 0 C2 5 C4 2 C2 7 C4 4 C2 9 C4 6 C3 1 . . . . . . . . . . . . . . . . 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _T X N 0 _T X N 1 _T X N 2 _T X N 3 _T X N 4 _T X N 5 _T X N 6 _T X N 7 _T X N 8 _T X N 9 _T X N 1 0 _T X N 1 1 _T X N 1 2 _T X N 1 3 _T X N 1 4 _T X N 1 5 L 34 M3 4 M3 2 L 30 M3 1 K3 1 M2 8 H3 1 K2 8 G3 0 G2 9 F28 E2 7 D2 8 C2 7 C2 5 P E G_ T X _ 0 P E G_ T X _ 1 P E G_ T X _ 2 P E G_ T X _ 3 P E G_ T X _ 4 P E G_ T X _ 5 P E G_ T X _ 6 P E G_ T X _ 7 P E G_ T X _ 8 P E G_ T X _ 9 P E G_ T X _ 10 P E G_ T X _ 11 P E G_ T X _ 12 P E G_ T X _ 13 P E G_ T X _ 14 P E G_ T X _ 15 C1 4 C3 3 C1 6 C1 8 C3 5 C2 0 C3 7 C2 2 C3 9 C2 4 C4 1 C2 6 C4 3 C2 8 C4 5 C3 0 . . . . . . . . . . . . . . . . 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 10 V _ X 7R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _T X P 0 _T X P 1 _T X P 2 _T X P 3 _T X P 4 _T X P 5 _T X P 6 _T X P 7 _T X P 8 _T X P 9 _T X P 1 0 _T X P 1 1 _T X P 1 2 _T X P 1 3 _T X P 1 4 _T X P 1 5 Sheet 2 of 57 Processor 1/7 MO LE X 4 7 9 89 0 1 4 2 6-86-27989-001 3 , 1 1 , 12 , 1 3 , 1 5, 1 6 , 1 8 , 21 , 2 4 , 2 6, 2 7 , 2 8, 29 , 3 4 , 36 , 3 7 , 3 8, 4 1 3 . 3 V 1 1, 2 5 , 2 7, 28 , 2 9 , 30 , 3 4 , 3 5, 4 0 V D D 3 Processor 1/7 B - 3 B.Schematic Diagrams R 4 92 *1 0 K _1 % _ 0 4 Schematic Diagrams Processor 2/7 PROCESSOR 2/7 Processor Compensation Signals H _ C OM P 0 H _ C O MP 2 A T 24 4 9. 9_ 1 % _0 4 H _ C OM P 1 H _ C O MP 1 G 16 R 4 11 2 0_ 1 % _ 04 H _ C OM P 2 A T 26 C OM P 2 C OM P 1 C OM P 0 A H 24 S K TO C C # 2 0_ 1 % _ 04 H _ C OM P 3 A K 14 H_ CA T E R R# Sheet 3 of 57 Processor 2/7 R5 3 7 H_ P E C I R 11 0 3 9 H _ P R OC H O T# A T 15 0_04 D03 ADD R537 0 _0 4 A N 26 H _ P R O C H OT # _ D THERMAL 1 6 , 25 Processor Pullups C A T E RR # P E CI P R OC H O T # If PROCHOT# is not used, then it must be terminated with a 50-O pull-up resistor to VTT_1.1 rail. 1 6 H _T H R MT R I P # 1 .1 V S_ V T T R 4 25 4 9. 9_ 1 % _0 4 H _ C A TE R R # R 1 09 6 8_ 0 4 H _ P R OC H OT # _ D R 4 08 *6 8 _ 04 H _ C P U R S T# A K 15 T H E R M TR I P # B C L K _ I TP B CL K _ IT P # P E G_ C LK P E G _C L K # D P L L _ R E F _ S S C LK DP L L _ RE F _ S S C L K # S M_ D R A MR S T # S M _ R C OM P [ 0] S M _ R C OM P [ 1] S M _ R C OM P [ 2] P M _ E X T_ T S # [ 0] P M _ E X T_ T S # [ 1] P R DY # PREQ # R 40 7 *1 K _ 0 4 FOR XDP H _C P U R S T # A P 26 A L 15 1 3 H _ P M_ S Y N C 1 3 , 39 D E L A Y _ P W R GD R1 3 5 * 0_ 0 4 R4 4 9 0 _ 04 S Y S _ A G E N T _ P W R O K A N 14 A N 27 16 H _ C P U P W R G D C 6 85 13 P M _ D R A M_ P W R GD C 6 86 0 . 1u _ 1 0V _X 7 R _ 0 4 R4 3 2 0 _ 04 V D D P W R G OO D _ R A K 13 R E S E T _ OB S # PWR MANAGEMENT 1 5 , 2 4 , 28 , 4 1 P L T_ R S T # P M_ S Y N C V C C P W R G OO D _ 1 V C C P W R G OO D _ 0 S M_ D R A MP W R OK 0 . 1u _ 1 0V _X 7 R _ 0 4 A M 15 1 3 H_ V T T P W RG D Connect to the Processor (VTTPWRGOOD) VTT_1.1 VR power good signal to processor. Signal voltage level is 1.1 V. C 6 87 0 . 1u _ 1 0V _X 7 R _ 0 4 R1 3 1 1 2 , 15 , 2 5 , 2 6, 2 7 , 2 9 B U F _ P L T _R S T # H _ P W R GD _ X D P 1 . 5 K _ 1% _ 0 4 Signal from PCH to Processor Connect to PCH (PLT_RST#) (needs to be level translated from 3.3 V to 1.1 V). D03 ADD C685,C686,C687 A M 26 P LT _ R S T# _ R A L 14 R1 2 5 7 50 _ 1 %_ 0 4 V TT P W R GO OD T A P P W R G OO D JTAG & BPM R 4 13 B C LK BC L K# CLOCKS 4 9. 9_ 1 % _0 4 R 1 32 MISC R 4 04 C OM P 3 DDR3 MISC A T 23 H _ C O MP 0 R S T IN# T CK T MS TR S T # T DI T DO T DI_ M TD O_ M DBR # BPM BPM BPM BPM BPM BPM BPM BPM # [ 0] # [ 1] # [ 2] # [ 3] # [ 4] # [ 5] # [ 6] # [ 7] A1 6 B1 6 A R3 0 A T 30 E1 6 D1 6 A1 8 A1 7 DDR3 Compensation Signals B C L K _C P U _ P 1 6 B C L K _C P U _ N 1 6 B C LK _I T P _ P B C LK _I T P _ N C LK _E X P _ P 1 2 C LK _E X P _ N 12 R 5 48 R 5 49 S M_ R C OM P _ 0 R 49 3 1 00 _ 1 %_ 0 4 S M_ R C OM P _ 1 R 49 0 2 4. 9 _ 1 % _0 4 S M_ R C OM P _ 2 R 48 7 1 30 _ 1 %_ 0 4 0 _ 04 0 _ 04 D03 ADD R548,R549 & DEL F 6 CLK_DP_N/PC P U _ D R A M R S T # AL 1 A M1 A N1 S M _R C O MP _ 0 S M _R C O MP _ 1 S M _R C O MP _ 2 A N1 5 AP1 5 P M _E XT T S # [ 0 ] P M _E XT T S # [ 1 ] A T 28 AP2 7 X DP _ P R DY # X D P _ P R E Q# A N2 8 AP2 8 A T 27 X DP _ T CL K X D P _ T MS X D P _ T R S T# A T 29 A R2 7 A R2 9 AP2 9 X DP _ T DI _ R X DP _ T DO _ R X DP _ T DI _ M X DP _ T DO _ M A N2 5 H _D B R # _ R A J 22 AK2 2 AK2 4 A J 24 A J 25 A H2 2 AK2 3 A H2 3 XDP_ O XDP_ O XDP_ O XDP_ O XDP_ O XDP_ O XDP_ O XDP_ O 1 .1 V S_ VT T D03C R1 4 6 R4 3 9 R4 4 3 R1 4 1 R4 5 3 10 K _ 0 4 10 K _ 0 4 0 _ 04 0 _ 04 *1 2 . 4K _ 1 % _ 04 P M_ E X T T S #_ E C 2 5 T S #_ D I MM 0_ 1 9 , 1 0 1 .1 VS_ VT T X D P _T M S X D P _T D O_ M X D P _T D I _R X D P _P R E Q # R 39 9 R 39 8 R 39 7 R 40 3 * 51 _ 0 4 5 1 _ 04 * 51 _ 0 4 * 51 _ 0 4 X D P _T C LK X D P _T R S T# R 40 0 R 40 2 * 51 _ 0 4 5 1 _ 04 3 .3 V S R4 1 0 * 1K _ 0 4 B S 0 _R B S 1 _R B S 2 _R B S 3 _R B S 4 _R B S 5 _R B S 6 _R B S 7 _R X DP _ T DO _ M R5 1 4 * 10 m i _l s h or t X DP _ T DI_ M MO LE X 4 7 9 89 0 1 42 3 .3 V C 69 0 0. 1u _ 1 0V _ X 7 R _ 0 4 5 1 .5 V D03C 1. 5V + 1 .5 S _ CP U R5 5 5 D03C add R554 U3 8 74 A H C 1 G0 8 GW 1 1 3 , 36 1 . 1 V S _ P W R GD 4 D RAM PW RG D_ CP U 2 D R A MP W R G D _ C P U 3 .3 V 3 1 K _ 04 R 5 56 R1 1 5 R5 5 4 *1 . 1 K _ 1% _ 0 4 *1 . 1 K _ 1 %_ 0 4 1. 5 K _ 1 % _0 4 3 .3 V R5 5 3 V D D P W R G OO D _ R 9, 1 0 D D R 3 _ D R A M R S T # Q3 4 D D D R 3 _D R A M R S T# MT N 70 0 2 Z H S 3 S 1 0K _ 0 4 C P U _ D R A MR S T # R 55 8 + 1 . 5 S _ C P U _P W R G D 3 7 D R5 6 6 * 0 _0 4 1 0 K _ 04 D04 add R566 G R1 2 1 Q3 8 + 1. 5S _ C P U R 5 59 G 1 6 D R A M R S T _ C N TR L _P C H 1 0 0 K _ 04 0 _ 04 B Q 39 8 D R A M R S T _ C N TR L D03C R121 change 750 ohm, R115 NC S R5 6 0 C MT N 70 0 2 Z H S 3 7 50 _ 1 % _0 4 2 N3 9 0 4 E B.Schematic Diagrams ( CLK,MISC,JTAG ) U3 4 B H _ C O MP 3 C6 9 1 4 7 n_ 1 0 V _ X7 R _0 4 3 . 3V 3 . 3V S 1 . 1V S _V 1 . 5V + 1. 5 S _ C B - 4 Processor 2/7 2 , 1 1, 1 2 , 1 3, 15 , 1 6 , 18 , 2 1 , 2 4, 2 6 , 2 7 , 28 , 2 9 , 34 , 3 6 , 3 7, 3 8 , 4 1 9 , 1 0, 1 1 , 1 2, 13 , 1 5 , 16 , 1 7 , 1 8, 2 0 , 2 1 , 22 , 2 3 , 24 , 2 5 , 2 6, 2 7 , 2 8 , 29 , 3 0 , 3 1, 3 2 , 3 3, 34 , 3 9 TT 5 , 6 , 1 6, 1 7 , 1 8 , 38 9 , 1 0, 1 8 , 2 8, 34 , 3 7 , 41 PU 6 ,3 4 D03C Schematic Diagrams Processor 3/7 PROCESSOR 3/7 ( DDR3 ) U34C U34D 9 9 9 M_A_BS0 M_A_BS1 M_A_BS2 9 9 9 M_A_CAS# M_A_RAS# M_A_WE# A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14 AC3 AB2 U7 AE1 AB3 AE9 SA_DQ [0] SA_DQ [1] SA_DQ [2] SA_DQ [3] SA_DQ [4] SA_DQ [5] SA_DQ [6] SA_DQ [7] SA_DQ [8] SA_DQ [9] SA_DQ [10] SA_DQ [11] SA_DQ [12] SA_DQ [13] SA_DQ [14] SA_DQ [15] SA_DQ [16] SA_DQ [17] SA_DQ [18] SA_DQ [19] SA_DQ [20] SA_DQ [21] SA_DQ [22] SA_DQ [23] SA_DQ [24] SA_DQ [25] SA_DQ [26] SA_DQ [27] SA_DQ [28] SA_DQ [29] SA_DQ [30] SA_DQ [31] SA_DQ [32] SA_DQ [33] SA_DQ [34] SA_DQ [35] SA_DQ [36] SA_DQ [37] SA_DQ [38] SA_DQ [39] SA_DQ [40] SA_DQ [41] SA_DQ [42] SA_DQ [43] SA_DQ [44] SA_DQ [45] SA_DQ [46] SA_DQ [47] SA_DQ [48] SA_DQ [49] SA_DQ [50] SA_DQ [51] SA_DQ [52] SA_DQ [53] SA_DQ [54] SA_DQ [55] SA_DQ [56] SA_DQ [57] SA_DQ [58] SA_DQ [59] SA_DQ [60] SA_DQ [61] SA_DQ [62] SA_DQ [63] SA_BS[0] SA_BS[1] SA_BS[2] SA_CAS# SA_RAS# SA_WE# SA_CK[1] SA_CK#[1] SA_CKE[1] SA_CS#[0] SA_CS#[1] SA_ODT[0] SA_ODT[1] SA_DM [0] SA_DM [1] SA_DM [2] SA_DM [3] SA_DM [4] SA_DM [5] SA_DM [6] SA_DM [7] SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] Y6 Y5 P6 10 M_B_DQ [ 63:0] M_B_DQ 0 M_B_DQ 1 M_B_DQ 2 M_B_DQ 3 M_B_DQ 4 M_B_DQ 5 M_B_DQ 6 M_B_DQ 7 M_B_DQ 8 M_B_DQ 9 M_B_DQ 10 M_B_DQ 11 M_B_DQ 12 M_B_DQ 13 M_B_DQ 14 M_B_DQ 15 M_B_DQ 16 M_B_DQ 17 M_B_DQ 18 M_B_DQ 19 M_B_DQ 20 M_B_DQ 21 M_B_DQ 22 M_B_DQ 23 M_B_DQ 24 M_B_DQ 25 M_B_DQ 26 M_B_DQ 27 M_B_DQ 28 M_B_DQ 29 M_B_DQ 30 M_B_DQ 31 M_B_DQ 32 M_B_DQ 33 M_B_DQ 34 M_B_DQ 35 M_B_DQ 36 M_B_DQ 37 M_B_DQ 38 M_B_DQ 39 M_B_DQ 40 M_B_DQ 41 M_B_DQ 42 M_B_DQ 43 M_B_DQ 44 M_B_DQ 45 M_B_DQ 46 M_B_DQ 47 M_B_DQ 48 M_B_DQ 49 M_B_DQ 50 M_B_DQ 51 M_B_DQ 52 M_B_DQ 53 M_B_DQ 54 M_B_DQ 55 M_B_DQ 56 M_B_DQ 57 M_B_DQ 58 M_B_DQ 59 M_B_DQ 60 M_B_DQ 61 M_B_DQ 62 M_B_DQ 63 M_CLK_DDR1 9 M_CLK_DDR#1 9 M_CKE1 9 AE2 AE8 M_CS#0 9 M_CS#1 9 AD8 AF9 M_ODT0 9 M_ODT1 9 B9 D7 H7 M7 AG6 AM7 AN10 AN13 M _A_ DM0 M _A_ DM1 M _A_ DM2 M _A_ DM3 M _A_ DM4 M _A_ DM5 M _A_ DM6 M _A_ DM7 C9 F8 J9 N9 AH7 AK9 AP11 AT13 M _A_ DQS#0 M _A_ DQS#1 M _A_ DQS#2 M _A_ DQS#3 M _A_ DQS#4 M _A_ DQS#5 M _A_ DQS#6 M _A_ DQS#7 C8 F9 H9 M9 AH8 AK10 AN11 AR13 M _A_ DQS0 M _A_ DQS1 M _A_ DQS2 M _A_ DQS3 M _A_ DQS4 M _A_ DQS5 M _A_ DQS6 M _A_ DQS7 Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9 M _A_ A0 M _A_ A1 M _A_ A2 M _A_ A3 M _A_ A4 M _A_ A5 M _A_ A6 M _A_ A7 M _A_ A8 M _A_ A9 M _A_ A10 M _A_ A11 M _A_ A12 M _A_ A13 M _A_ A14 M _A_ A15 M_A_DM [7: 0] 9 M_A_DQS# [ 7:0] 9 M_A_DQS[7:0] 9 M_A_A[15:0] 9 10 10 10 M_B_BS0 M_B_BS1 M_B_BS2 10 10 10 M_B_CAS# M_B_RAS# M_B_WE# B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G 4 H6 G 2 J6 J3 G 1 G 5 J2 J1 J5 K2 L 3 M 1 K5 K4 M 4 N5 AF3 AG 1 AJ3 AK1 AG 4 AG 3 AJ4 AH4 AK3 AK4 AM 6 AN2 AK5 AK2 AM 4 AM 3 AP3 AN5 AT 4 AN6 AN4 AN3 AT 5 AT 6 AN7 AP6 AP8 AT 9 AT 7 AP9 AR1 0 AT1 0 AB1 W5 R7 AC5 Y7 AC6 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] SB_BS[0] SB_BS[1] SB_BS[2] SB_CAS# SB_RAS# SB_WE# SB_CK[0] SB_CK#[0] SB_CKE[0] SB_CK[1] SB_CK#[1] SB_CKE[1] SB_CS#[0] SB_CS#[1] SB_O DT[0] SB_O DT[1] SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] W8 W9 M3 V7 V6 M2 M_CLK_DDR2 10 M_CLK_DDR#2 10 M_CKE2 10 M_CLK_DDR3 10 M_CLK_DDR#3 10 M_CKE3 10 AB8 AD6 M_CS#2 10 M_CS#3 10 AC7 AD1 M_O DT2 10 M_O DT3 10 M _B_DM[7:0] 10 D4 E1 H3 K1 AH1 AL2 AR4 AT8 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 D5 F4 J4 L4 AH2 AL4 AR5 AR8 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M _B_ DQS#[7:0] 10 C5 E3 H4 M5 AG2 AL5 AP5 AR7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M _B_ DQS[7:0] 10 U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 Sheet 4 of 57 Processor 3/7 M _B_A[15:0] 1 0 MOLEX479890142 MOL EX479890142 Processor 3/7 B - 5 B.Schematic Diagrams M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_CLK_DDR0 9 M_CLK_DDR#0 9 M_CKE0 9 DDR SYS TEM MEMO RY - B SA_CK[0] SA_CK#[0] SA_CKE[0] M_A_DQ[63:0] DDR SY STEM MEM ORY A 9 AA6 AA7 P7 Schematic Diagrams Processor 4/7 PROCESSOR 4/7 ( POWER ) U34F PR OCE SSOR CO RE P OWER PR OCES SOR UNC ORE POW ER 1.1VS_VTT 1.1V RAIL POWER VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32 AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 C175 C602 C187 C188 C630 C631 C633 C607 10u_6. 3V_X5R_06 10u_6. 3V_X5R_06 10u_6. 3V_X5R_06 *10U_6.3V_06 *10U_6.3V_06 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6. 3V_X5R_08 C178 C185 C182 C183 10u_6. 3V_X5R_06 10u_6. 3V_X5R_06 10u_6. 3V_X5R_06 10u_6.3V_X5R_06 VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44 AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15 R515 *32mil_short Aubur ndale VTT =1.05V Clark sfield VT T=1.1V C181 C172 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 +VTT_43 +VTT_44 R433 R447 0_04 0_04 1.1VS_VTT 1K PU to VTT and 1K PD to GND for POC POWER VCORE R387 *1K_04 PSI# PSI# AN33 VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 G15 H_VTTVID1 38 PSI# 39 1.1VS_VTT 39 39 39 39 39 39 39 R388 1K_04 R105 1K_04 PM_DPRSLPVR 39 VTT_SELECT R516 *1K_04 TO VCORE POWER CONTROL ISENSE AN35 AJ34 VCC_SENSE AJ35 VSS_SENSE IMON 39 VCC_SENSE 39 VSS_SENSE 39 VTT_SENSE B15 VSS_SENSE_VTT A15 VCORE 39 1.1VS_VTT 3,6,16,17,18,38 TP_VSS_SENSE_VTT B - 6 Processor 4/7 Pleas e note th at the VTT R ail Value s are 1.1VS_VTT C180 VTT_SENSE_R MOLEX479890142 The decouplin g capacit ors, filt er reco mmendatio ns and se nse resis tors on t he CPU/ PCH Rails are spec ific to t he CRB Impl ementatio n. Custom ers need to follow the reco mmendatio ns in the Calpella Platform Desi gn Guide 1.1VS_VTT 1.1VS_VCCTTA_QPI CPU VIDS VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 SENSE L INES Sheet 5 of 57 Processor 4/7 AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 CPU CORE SUPP LY B.Schematic Diagrams VCORE R448 0_04 VTT_SENSE 38 Schematic Diagrams Processor 5/7 PROCESSOR 5/7 ( GRAPHICS POWER ) 1.1VS_VCC_FDI R42 0 0_0 6 1.1VS R11 6 *0_06 C161 C610 22 u_6.3V_X5R_08 22u_6.3V_ X5R_08 J24 J23 H25 VTT1_45 VTT1_46 VTT1_47 FDI 1.1VS_VTT GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] GFX_VR_EN GFX_DPRSLPVR GFX_IMON C157 22 u_6.3V_X5R_08 22u_6.3V_ X5R_08 C595 C598 22 u_6.3V_X5R_08 22u_6.3V_ X5R_08 K26 J27 J26 J25 H27 G 28 G 27 G 26 F26 E26 E25 VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58 PEG & DMI C591 1.1V *3 2mil_short 1.1VS_VTT *0_06 AM 22 AP22 AN22 AP23 AM 23 AP24 AN24 AR25 AT25 AM 24 Sheet 6 of 57 Processor 5/7 TP_GFX_IM ON R414 1K_04 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 D03B +1.5S_CPU + C2 62 C200 C263 C264 1u_6.3V_X5R_04 22u_6.3V_X5R_ 08 2 2u_6.3V_X5R_08 330u_2.5V_V_A C193 C203 C192 C1 86 1u_6.3V_X5R_04 1u_6.3V_X5R_0 4 1 u_6.3V_ X5R_04 1u_6. 3V_X5R_04 1.1VS_VTT P10 N10 L10 K10 C636 C634 10u_6 . 3V_X5R_06 10u_6.3V_X5R_ 06 1.1VS_VCC_PEG_ DMI VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68 J22 J20 J18 H21 H20 H19 C171 C168 22u_6 . 3V_X5R_08 22u_6.3V_X5R_ 08 R435 0_06 R430 *0_06 1.1VS_VTT 1.1VS 1.8VS 1.8V R401 *0_04 *0_04 1.1VS_VCCTT A_DDR D02 CHANGE TO SHORT R40 5 R415 R418 FOR DISABLE VTT0_59 VTT0_60 VTT0_61 VTT0_62 1.1VS VAXG_SENSE VSSAXG_ SENSE D03 BOM DEL R415,R418 - 1.5V RAILS GRAPHICS VIDs AR22 VAXG _SENSE AT22 VSSAXG _SENSE DDR3 Auburndale VTT=1.05 V Clarksfield VTT=1.1 V GRAPHICS Please note that th e VTT Rail Values are VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 POWER *20mli_short VCCPLL1 VCCPLL2 VCCPLL3 L26 L27 M26 C151 C150 C582 C154 C584 1u_6.3V_X5R_04 1u_6.3V_X5R_ 04 2 .2 u_6.3V_ X5R_04 4.7u_6.3V_X 5R_06 22u_6.3V_X 5R_08 MOLEX479890142 +1.5S_CPU 3,34 1.8VS 15,17,36 1.1VS 11,12,13,17,18,20,36,38,39 1.1VS_ VTT 3,5,16,17,18,38 1.5V 3,9,10,18,28,34,37,41 Processor 5/7 B - 7 B.Schematic Diagrams D03 CHANGE TO SHORT AT 21 AT 19 AT 18 AT 16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM 21 AM 19 AM 18 AM 16 AL 21 AL 19 AL 18 AL 16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16 SENSE LINES U3 4G R112 Schematic Diagrams Processor 6/7 PROCESSOR 6/7 ( GND ) Sheet 7 of 57 Processor 6/7 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5 VSS1 6 VSS1 7 VSS1 8 VSS1 9 VSS2 0 VSS2 1 VSS2 2 VSS2 3 VSS2 4 VSS2 5 VSS2 6 VSS2 7 VSS2 8 VSS2 9 VSS3 0 VSS3 1 VSS3 2 VSS3 3 VSS3 4 VSS3 5 VSS3 6 VSS3 7 VSS3 8 VSS3 9 VSS4 0 VSS4 1 VSS4 2 VSS4 3 VSS4 4 VSS4 5 VSS4 6 VSS4 7 VSS4 8 VSS4 9 VSS5 0 VSS5 1 VSS5 2 VSS5 3 VSS5 4 VSS5 5 VSS5 6 VSS5 7 VSS5 8 VSS5 9 VSS6 0 VSS6 1 VSS6 2 VSS6 3 VSS6 4 VSS6 5 VSS6 6 VSS6 7 VSS6 8 VSS6 9 VSS7 0 VSS7 1 VSS7 2 VSS7 3 VSS7 4 VSS7 5 VSS7 6 VSS7 7 VSS7 8 VSS7 9 VSS8 0 MOLEX 4 798 90 142 B - 8 Processor 6/7 U3 4I VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS1 00 VSS1 01 VSS1 02 VSS1 03 VSS1 04 VSS1 05 VSS1 06 VSS1 07 VSS1 08 VSS1 09 VSS1 10 VSS1 11 VSS1 12 VSS1 13 VSS1 14 VSS1 15 VSS1 16 VSS1 17 VSS1 18 VSS1 19 VSS1 20 VSS1 21 VSS1 22 VSS1 23 VSS1 24 VSS1 25 VSS1 26 VSS1 27 VSS1 28 VSS1 29 VSS1 30 VSS1 31 VSS1 32 VSS1 33 VSS1 34 VSS1 35 VSS1 36 VSS1 37 VSS1 38 VSS1 39 VSS1 40 VSS1 41 VSS1 42 VSS1 43 VSS1 44 VSS1 45 VSS1 46 VSS1 47 VSS1 48 VSS1 49 VSS1 50 VSS1 51 VSS1 52 VSS1 53 VSS1 54 VSS1 55 VSS1 56 VSS1 57 VSS1 58 VSS1 59 VSS1 60 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD1 0 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W3 5 W3 4 W3 3 W3 2 W3 1 W3 0 W2 9 W2 8 W2 7 W2 6 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R 10 P8 P4 P2 N 35 N 34 N 33 N 32 N 31 N 30 N 29 N 28 N 27 N 26 N6 M10 L 35 L 32 L 29 L8 L5 L2 K34 K33 K30 K27 K9 K6 K3 J 32 J 30 J 21 J 19 H 35 H 32 H 28 H 26 H 24 H 22 H 18 H 15 H 13 H 11 H8 H5 H2 G 34 G 31 G 20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D 33 D 30 D 26 D9 D6 D3 C 34 C 32 C 29 C 28 C 24 C 22 C 20 C 19 C 16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9 VSS16 1 VSS16 2 VSS16 3 VSS16 4 VSS16 5 VSS16 6 VSS16 7 VSS16 8 VSS16 9 VSS17 0 VSS17 1 VSS17 2 VSS17 3 VSS17 4 VSS17 5 VSS17 6 VSS17 7 VSS17 8 VSS17 9 VSS18 0 VSS18 1 VSS18 2 VSS18 3 VSS18 4 VSS18 5 VSS18 6 VSS18 7 VSS18 8 VSS18 9 VSS19 0 VSS19 1 VSS19 2 VSS19 3 VSS19 4 VSS19 5 VSS19 6 VSS19 7 VSS19 8 VSS19 9 VSS20 0 VSS20 1 VSS20 2 VSS20 3 VSS20 4 VSS20 5 VSS20 6 VSS20 7 VSS20 8 VSS20 9 VSS21 0 VSS21 1 VSS21 2 VSS21 3 VSS21 4 VSS21 5 VSS21 6 VSS21 7 VSS21 8 VSS21 9 VSS22 0 VSS22 1 VSS22 2 VSS22 3 VSS22 4 VSS22 5 VSS22 6 VSS22 7 VSS22 8 VSS22 9 VSS23 0 VSS23 1 VSS23 2 VSS23 3 MOL EX 479 89 014 2 VSS A ll NC TF p ins s hou ld be T est P oi nts a nd sh ou ld be ro ut ed as t ra ce. NCTF B.Schematic Diagrams U 34H AT2 0 AT1 7 AR3 1 AR2 8 AR2 6 AR2 4 AR2 3 AR2 0 AR1 7 AR1 5 AR1 2 AR 9 AR 6 AR 3 AP2 0 AP1 7 AP1 3 AP1 0 AP7 AP4 AP2 AN3 4 AN3 1 AN2 3 AN2 0 AN1 7 AM2 9 AM2 7 AM2 5 AM2 0 AM1 7 AM1 4 AM1 1 AM8 AM5 AM2 AL3 4 AL3 1 AL2 3 AL2 0 AL1 7 AL1 2 AL 9 AL 6 AL 3 AK2 9 AK2 7 AK2 5 AK2 0 AK1 7 AJ3 1 AJ2 3 AJ2 0 AJ1 7 AJ1 4 AJ1 1 AJ 8 AJ 5 AJ 2 AH3 5 AH3 4 AH3 3 AH3 2 AH3 1 AH3 0 AH2 9 AH2 8 AH2 7 AH2 6 AH2 0 AH1 7 AH1 3 AH 9 AH 6 AH 3 AG1 0 AF8 AF4 AF2 AE3 5 VSS_N CTF1 VSS_N CTF2 VSS_N CTF3 VSS_N CTF4 VSS_N CTF5 VSS_N CTF6 VSS_N CTF7 AT35 AT1 AR34 B34 B2 B1 A35 TP_MC P_VSS_N CTF1 TP_MC P_VSS_N CTF2 TP_MC P_VSS_N CTF6 TP_MC P_VSS_N CTF7 Schematic Diagrams Processor 7/7 PROCESSOR U3 4E AO3402L S AP25 AL 25 AL 24 AL 22 AJ33 AG 9 M 27 L 28 J17 H17 G 25 G 17 E31 E30 R563 10 0K_04 3 DRAMRST_CNTRL C694 47n_10V_ X7R_04 CFG0 R394 *3.01 K_1 %_04 D04 add C694,C695 R326 *0_ 04 Q37 10 M VREF_DQ_DIM1 D AO3402L S CFG3 R389 *3.01 K_1 %_04 3 DRAMRST_CNTRL CFG0 CFG3 CFG4 CFG4 - Display Port Presence CFG7 1 : Disablled; No physical Display Port attached to Embedded Display Port 0 : Enabled; An external Display Port device is connected to the Embedded isplay Port R393 *3.01 K_1 %_04 R130 *0_04 RSVD86 CFG7 Note: Only temporary for early CFD samples (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common motherboard design (for AUB and CFD), the pull-down resistor should be used. Does not impact AUB functionality. CFG7 R390 *3.01K_1%_04 CF G7 Cl ar ksf iel d (on ly fo r e ar ly sa mpl es pr e- ES1 ) - C onn ec t t o G ND wi th 3. 01K O hm/ 5% re si sto r RSVD38 RSVD39 RSVD_ NCTF_40 RSVD_ NCTF_41 RSVD_ NCTF_42 RSVD_ NCTF_43 AM 30 AM 28 AP31 AL 32 AL 30 AM 31 AN29 AM 32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16 CFG [0] CFG [1] CFG [2] CFG [3] CFG [4] CFG [5] CFG [6] CFG [7] CFG [8] CFG [9] CFG [10] CFG [11] CFG [12] CFG [13] CFG [14] CFG [15] CFG [16] CFG [17] RSVD_ TP_ 86 RSVD86 Connect to GND B19 A19 CFG7 - Reserved - Temporarily used for early Clarksfield samples. Clarksfield (only for early samples pre-ES1) - Connect to GND with 3.01K Ohm/5% resistor RSVD36 RSVD_ NCTF_37 10 0K_04 C695 CFG4 RSVD34 RSVD35 R42 8 R42 7 AJ13 AJ12 AH25 AK26 Sheet 8 of 57 Processor 7/7 AL26 AR2 AJ26 AJ27 AP1 AT2 AT3 AR1 R564 47n_10V_ X7R_04 CFG4 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD1 0 RSVD1 1 RSVD1 2 RSVD1 3 RSVD1 4 VREF_CH_B_DIMM G CFG3 - PCI-Express Static Lane Reversal 1 : Normal Operation CFG3 0 : Lane Numbers Reversed 15 -> 0, 14 -> 1, ... RSVD32 RSVD33 VREF_CH_A_DIMM *0_04 *0_04 H_RSVD17_R H_RSVD18_R D03 A20 B20 U9 T9 AC9 AB9 C1 A3 J29 J28 A34 A33 C35 B35 R ESERVED CFG0 *0_04 Q36 D G 1 : Single PEG 0 : Bifurcation enable 9 M VREF_DQ_DIM0 ( RESERVED ) RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD_ NCTF_54 RSVD_ NCTF_55 RSVD_ NCTF_56 RSVD_ NCTF_57 RSVD58 RSVD_TP_59 RSVD_TP_60 KEY RSVD62 RSVD63 RSVD64 RSVD65 AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 E15 F15 A2 D15 C15 AJ15 AH15 RSVD64 _R RSVD65 _R R127 R138 *0_04 *0_04 RSVD1 5 RSVD1 6 RSVD1 7 RSVD1 8 RSVD1 9 RSVD2 0 RSVD2 1 RSVD2 2 RSVD_ NCTF_23 RSVD_ NCTF_24 RSVD2 6 RSVD2 7 RSVD_ NCTF_28 RSVD_ NCTF_29 RSVD_ NCTF_30 RSVD_ NCTF_31 RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85 VSS AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 AP34 TP_RSVD86 VSS (AP34) can be left NC is CRB implementation ; EDS/DG recommendation to GND MO LEX4798901 42 Processor 7/7 B - 9 B.Schematic Diagrams R319 D03C PCI-Express Configuration Sele ct 7/7 Schematic Diagrams DDRIII SO-DIMM_0 SO-DIMM A B.Schematic Diagrams 4 CHANGE TO STANDARD JD I M M1 A M _ A _A [ 15 : 0 ] M_ A _ A 0 M_ A _ A 1 M_ A _ A 2 M_ A _ A 3 M_ A _ A 4 M_ A _ A 5 M_ A _ A 6 M_ A _ A 7 M_ A _ A 8 M_ A _ A 9 M_ A _ A 1 0 M_ A _ A 1 1 M_ A _ A 1 2 M_ A _ A 1 3 M_ A _ A 1 4 M_ A _ A 1 5 Lay out Note : signa l/ spa ce /s igna l: 8 / 4/ 8 Sheet 9 of 57 DDRIII SO-DIMM _0 4 M_ A _ B S 0 4 M_ A _ B S 1 4 M_ A _ B S 2 4 M_ C S # 0 4 M_ C S # 1 4 M_ C L K _D D R 0 4 M_ C L K _D D R # 0 4 M_ C L K _D D R 1 4 M_ C L K _D D R # 1 4 M_ C K E 0 4 M_ C K E 1 4 M_ A _ C A S # 4 M_ A _ R A S # 4 M_ A _ W E # S A 0 _D I M 0 S A 1 _D I M 0 1 0 , 1 2, 2 0 S M B _ C L K 1 0 , 1 2, 2 0 S M B _ D A T A R3 2 3 R3 1 8 1 0K _0 4 1 0K _ 0 4 4 4 4 4 98 97 96 95 92 91 90 86 89 85 1 07 84 83 1 19 80 78 A A A A A A A A A A A A A A A A 1 09 1 08 79 1 14 1 21 1 01 1 03 1 02 1 04 73 74 1 15 1 10 1 13 1 97 2 01 2 02 2 00 B A0 B A1 B A2 S 0# S 1# C K0 C K0 # C K1 C K1 # C KE0 C KE1 C AS# R AS# W E# S A0 S A1 S CL S DA 1 16 1 20 M_ OD T 0 M_ OD T 1 M _ A _ D M [ 7: 0] M _ A _ D Q S [ 7 : 0] 4 M_ A _ D Q S # [ 7 : 0] V T T _ ME M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M 0 1 2 3 4 5 6 7 11 28 46 63 1 36 1 53 1 70 1 87 M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q S0 S1 S2 S3 S4 S5 S6 S7 12 29 47 64 1 37 1 54 1 71 1 88 M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q S# 0 S# 1 S# 2 S# 3 S# 4 S# 5 S# 6 S# 7 0 1 2 3 4 5 6 7 8 9 10 / A P 11 12 / B C # 13 14 15 O DT 0 O DT 1 10 27 45 62 1 35 1 52 1 69 1 86 D D D D D D D D M0 M1 M2 M3 M4 M5 M6 M7 D D D D D D D D QS QS QS QS QS QS QS QS 0 1 2 3 4 5 6 7 D D D D D D D D QS QS QS QS QS QS QS QS 0# 1# 2# 3# 4# 5# 6# 7# D Q0 D Q1 D Q2 D Q3 D Q4 D Q5 D Q6 D Q7 D Q8 D Q9 D Q 10 D Q 11 D Q 12 D Q 13 D Q 14 D Q 15 D Q 16 D Q 17 D Q 18 D Q 19 D Q 20 D Q 21 D Q 22 D Q 23 D Q 24 D Q 25 D Q 26 D Q 27 D Q 28 D Q 29 D Q 30 D Q 31 D Q 32 D Q 33 D Q 34 D Q 35 D Q 36 D Q 37 D Q 38 D Q 39 D Q 40 D Q 41 D Q 42 D Q 43 D Q 44 D Q 45 D Q 46 D Q 47 D Q 48 D Q 49 D Q 50 D Q 51 D Q 52 D Q 53 D Q 54 D Q 55 D Q 56 D Q 57 D Q 58 D Q 59 D Q 60 D Q 61 D Q 62 D Q 63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M _A _ D Q[ 6 3 : 0 ] 4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 J D I M M1 B 1 .5 V 75 76 81 82 87 88 93 94 99 1 00 1 05 1 06 1 11 1 12 1 17 1 18 1 23 1 24 3. 3 V S 20mils C4 1 5 C 421 2. 2u _ 6 . 3 V _ Y 5 V _ 0 6 0 . 1 u _ 10 V _ X 7 R _ 0 4 1005 1 99 3. 3 V S 77 1 22 1 25 R3 0 5 *1 0 K _ 04 1 98 30 3 , 1 0 T S # _ D I M M0 _ 1 3 , 1 0 DD R3 _ DR A M RS T # 20mils C 4 20 C 4 19 2 . 2 u _6 . 3 V _ Y 5V _ 0 6 0 . 1 u _1 0 V _ X 7 R _ 0 4 D03C R3 2 0 8 MV R E F _ D Q_ D I M0 Move to page 8 MV R E F _ D I M0 C 6 56 C 4 24 V DD S P D NC 1 NC 2 N C TE S T E V E NT # RE S E T # 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 V RE F _ D Q V RE F _ C A 2 . 2 u _6 . 3 V _ Y 5V _ 0 6 0 . 1 u _1 0 V _ X 7 R _ 0 4 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5 VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS S 16 S 17 S 18 S 19 S 20 S 21 S 22 S 23 S 24 S 25 S 26 S 27 S 28 S 29 S 30 S 31 S 32 S 33 S 34 S 35 S 36 S 37 S 38 S 39 S 40 S 41 S 42 S 43 S 44 S 45 S 46 S 47 S 48 S 49 S 50 S 51 S 52 44 48 49 54 55 60 61 65 66 71 72 12 7 12 8 13 3 13 4 13 8 13 9 14 4 14 5 15 0 15 1 15 5 15 6 16 1 16 2 16 7 16 8 17 2 17 3 17 8 17 9 18 4 18 5 18 9 19 0 19 5 19 6 V T T _M E M V T T1 V T T2 G1 G2 20 3 20 4 GN D 1 GN D 2 A S 0 A 6 2 1-U 2 S N -7 F 6-86-24204-010 CLO SE TO SO -DI MM _0 6-86-24204-010 C 4 42 C 440 C4 2 8 C4 2 5 1 0 u_ 6 . 3 V _ X 5R _ 0 6 1 u _ 6. 3V _ Y 5 V _0 4 1 u _ 6 . 3V _Y 5 V _ 04 1u _ 6 . 3 V _ Y 5 V _ 0 4 1 u_ 6 . 3 V _ Y 5 V _ 0 4 1 .5 V 1 .5 V C 42 3 C 4 11 C4 1 8 C3 8 1 C 375 C 3 79 C 380 C4 2 9 1 0 u _6 . 3 V _ X 5R _ 0 6 1 0 u _ 6. 3 V _ X 5 R _ 0 6 10 u _ 6. 3V _ X 5 R _ 0 6 4 . 7u _ 6 . 3 V _ Y 5 V _ 0 6 4 . 7 u _ 6. 3V _Y 5 V _ 06 1 u _ 6. 3 V _ Y 5V _0 4 1 u _ 6 . 3V _Y 5 V _ 04 1u _ 6 . 3 V _ Y 5 V _ 0 4 R3 2 1 1K _1 % _ 0 4 MV R E F _ D I M 0 R 3 22 C4 2 6 1 K _ 1 % _0 4 0 . 1 u_ 1 0 V _ X7 R _ 04 1 0, 3 7 V T T _ ME M 3 , 1 0 , 1 8, 28 , 3 4 , 3 7, 4 1 1 . 5 V 3, 10 , 1 1 , 1 2, 1 3 , 1 5 , 1 6, 1 7 , 1 8 , 2 0, 2 1 , 2 2 , 23 , 2 4 , 2 5 , 26 , 2 7 , 2 8 , 29 , 3 0 , 3 1, 32 , 3 3 , 3 4, 3 9 3 . 3 V S 1 .5 V D03 BOM DEL B - 10 DDRIII SO-DIMM_0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 0_ 0 4 A S 0 A 6 21 -U 2 S N -7 F C 42 2 C 4 51 C 43 4 + + 2 2 0u _ 4 V _ V _ A 2 2 0 u_ 4 V _ V _ A 1 1 26 V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD C 37 8 C3 9 8 C3 8 4 C4 1 7 C 41 6 C 41 4 C 3 83 C 38 2 C3 9 7 C4 1 3 0 . 2 2 u_ 1 0 V _ Y 5 V _ 0 4 0 . 2 2u _ 1 0V _Y 5 V _ 04 *0 . 1 u_ 1 0 V _ X 7R _ 04 0 . 1u _ 1 0 V _ X7 R _0 4 0 . 1 u_ 1 0 V _ X 7R _ 04 0 . 1 u _1 0 V _ X 7R _ 0 4 0 . 0 1 u _5 0 V _ X 7R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 04 0 . 0 1u _ 5 0V _X 7 R _ 0 4 0. 01 u _ 50 V _ X 7 R _ 0 4 Schematic Diagrams DDRIII SO-DIMM_1 SO-DIMM B CHANGE TO STANDARD JD I MM 2 B 4 J D I MM 2A M _ B _ A [ 1 5: 0 ] Lay out Note : signa l/ spa ce /s igna l: 8 / 4/ 8 4 4 4 4 4 4 4 4 4 4 4 4 4 4 M _B _B S 0 M _B _B S 1 M _B _B S 2 M _C S # 2 M _C S # 3 M_ C L K _ D D R 2 M_ C L K _ D D R #2 M_ C L K _ D D R 3 M_ C L K _ D D R #3 M _C K E 2 M _C K E 3 M _ B_ CAS# M _ B_ RAS# M _ B_ W E# _B _B _B _B _B _B _B _B _B _B _B _B _B _B _B _B 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 _A 0 _A 1 _A 2 _A 3 _A 4 _A 5 _A 6 _A 7 _A 8 _A 9 _A 1 0 _A 1 1 _A 1 2 _A 1 3 _A 1 4 _A 1 5 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 S A 0 _ D I M1 S A 1 _ D I M1 9 , 1 2 , 2 0 S MB _ C L K 9 , 1 2 , 2 0 S MB _ D A T A R 3 25 R3 2 4 1 0 K_ 0 4 1 0K _ 0 4 4 4 4 116 120 M _O D T 2 M _O D T 3 M_ B _ D M[ 7 : 0 ] 3. 3 V S 4 M_ B _ D QS [ 7 : 0 ] 4 M _B _D QS #[ 7 : 0 ] M M M M M M M M _B _B _B _B _B _B _B _B _D _D _D _D _D _D _D _D M0 M1 M2 M3 M4 M5 M6 M7 11 28 46 63 136 153 170 187 M M M M M M M M _B _B _B _B _B _B _B _B _D _D _D _D _D _D _D _D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 12 29 47 64 137 154 171 188 M M M M M M M M _B _B _B _B _B _B _B _B _D _D _D _D _D _D _D _D QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 /AP A1 1 A1 2 /BC# A1 3 A1 4 A1 5 BA0 BA1 BA2 S0 # S1 # CK 0 C K 0# CK 1 C K 1# CK E 0 CK E 1 CA S # RA S # W E# SA0 SA1 SC L SD A OD T 0 OD T 1 DM DM DM DM DM DM DM DM 0 1 2 3 4 5 6 7 DQ DQ DQ DQ DQ DQ DQ DQ S0 S1 S2 S3 S4 S5 S6 S7 DQ DQ DQ DQ DQ DQ DQ DQ S0 # S1 # S2 # S3 # S4 # S5 # S6 # S7 # DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 D Q1 0 D Q1 1 D Q1 2 D Q1 3 D Q1 4 D Q1 5 D Q1 6 D Q1 7 D Q1 8 D Q1 9 D Q2 0 D Q2 1 D Q2 2 D Q2 3 D Q2 4 D Q2 5 D Q2 6 D Q2 7 D Q2 8 D Q2 9 D Q3 0 D Q3 1 D Q3 2 D Q3 3 D Q3 4 D Q3 5 D Q3 6 D Q3 7 D Q3 8 D Q3 9 D Q4 0 D Q4 1 D Q4 2 D Q4 3 D Q4 4 D Q4 5 D Q4 6 D Q4 7 D Q4 8 D Q4 9 D Q5 0 D Q5 1 D Q5 2 D Q5 3 D Q5 4 D Q5 5 D Q5 6 D Q5 7 D Q5 8 D Q5 9 D Q6 0 D Q6 1 D Q6 2 D Q6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D M _ B _ D Q [ 63 : 0 ] 4 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q1 0 Q1 1 Q1 2 Q1 3 Q1 4 Q1 5 Q1 6 Q1 7 Q1 8 Q1 9 Q2 0 Q2 1 Q2 2 Q2 3 Q2 4 Q2 5 Q2 6 Q2 7 Q2 8 Q2 9 Q3 0 Q3 1 Q3 2 Q3 3 Q3 4 Q3 5 Q3 6 Q3 7 Q3 8 Q3 9 Q4 0 Q4 1 Q4 2 Q4 3 Q4 4 Q4 5 Q4 6 Q4 7 Q4 8 Q4 9 Q5 0 Q5 1 Q5 2 Q5 3 Q5 4 Q5 5 Q5 6 Q5 7 Q5 8 Q5 9 Q6 0 Q6 1 Q6 2 Q6 3 1 .5 V 75 76 81 82 87 88 93 94 99 1 00 1 05 1 06 1 11 1 12 1 17 1 18 1 23 1 24 3 . 3V S 20mils C4 5 6 1 99 77 1 22 1 25 C 459 2 . 2 u_ 6 . 3 V _ Y 5 V _ 0 6 0 . 1 u _ 10 V _ X 7 R _ 0 4 1 98 30 3 , 9 TS #_ D I MM 0_ 1 3, 9 D D R 3 _ D R A MR S T # C4 5 4 C4 5 3 D03C R3 2 7 8 M V R E F _D Q_ D I M1 Move to page 8 2. 2u _ 6 . 3 V _ Y 5 V _ 0 6 0. 1u _ 1 0 V _X 7 R _0 4 MV R E F _ D I M1 C 4 38 C 4 58 1 1 26 V V V V V V V V V V V V V V V V V V DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 V DD S P D N C1 N C2 N CT E S T E VENT # R ESET# V RE F _ D Q V RE F _ C A 0 _0 4 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 2 . 2 u _ 6. 3 V _ Y 5V _0 6 0 . 1 u _ 10 V _ X 7 R _ 0 4 V V V V V V V V V V V V V V V SS1 SS2 SS3 SS4 SS5 SS6 SS7 SS8 SS9 SS1 0 SS1 1 SS1 2 SS1 3 SS1 4 SS1 5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 Sheet 10 of 57 DDRIII SO-DIMM _1 V T T _ ME M V T T1 V T T2 G1 G2 203 204 G ND 1 G ND 2 A S 0 A 6 21 - U A S N -7F 6-86-24204-016 A S 0 A 6 2 1 -U A S N -7 F 6-86-24204-016 CLOS E TO SO -DI M M_ 1 V T T _ ME M La y out Not e: S O- DIMM _ 1 i s pl a ce d f a rt he r from the G M CH t ha n SO -DI M M _0 C3 7 1 C 41 2 C 3 91 C 3 96 1 0u _ 6 . 3 V _ X5 R _0 6 1 u _6 . 3 V _ Y 5V _ 0 4 1 u _ 6. 3 V _ Y 5V _0 4 1 u _ 6 . 3V _Y 5 V _ 04 1 .5 V R 329 1 K _ 1 % _ 04 M V R E F _D I M 1 R 32 8 C4 5 7 1 K _ 1 %_ 0 4 0. 1u _ 1 0V _X 7 R _ 0 4 1 .5 V C 42 7 + 2 20 u _ 4V _V _A C4 5 2 D03 DEL C393 1 0u _ 6 . 3 V _X 5 R _0 6 C4 3 7 C 45 0 C 4 39 C 443 C4 4 4 C4 4 5 1 0 u_ 6 . 3 V _ X5 R _ 06 4 . 7 u _6 . 3 V _ Y 5 V _ 0 6 4 . 7 u _ 6. 3 V _ Y 5V _0 6 1 u _ 6 . 3V _Y 5 V _ 04 1u _ 6 . 3 V _ Y 5 V _ 0 4 1 u_ 6 . 3 V _ Y 5 V _ 0 4 9 ,3 7 V T T _M E M 3 , 9, 18 , 2 8 , 3 4, 3 7 , 4 1 1 . 5V 3 , 9 , 1 1, 12 , 1 3 , 1 5, 1 6 , 1 7 , 1 8, 2 0 , 2 1 , 22 , 2 3 , 2 4 , 25 , 2 6 , 2 7, 28 , 2 9 , 3 0, 31 , 3 2 , 3 3, 3 4 , 3 9 3 . 3V S 1. 5 V C4 4 6 C 447 C 4 48 C 4 49 C4 3 0 C4 3 3 C4 3 5 C4 3 6 C 4 32 C 43 1 0 . 22 u _ 1 0V _ Y 5 V _0 4 0 . 2 2 u _1 0 V _ Y 5V _ 0 4 0 . 1 u _1 0 V _ X 7 R _ 0 4 0 . 1 u _ 10 V _ X 7 R _ 0 4 0. 1 u _ 1 0V _ X 7 R _ 0 4 0 . 1u _ 1 0 V _X 7 R _0 4 0 . 0 1u _ 5 0V _X 7 R _ 0 4 0. 0 1 u _ 50 V _ X 7 R _ 0 4 0 . 0 1 u _5 0 V _ X 7R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _0 4 DDRIII SO-DIMM_1 B - 11 B.Schematic Diagrams M M M M M M M M M M M M M M M M Schematic Diagrams IBEXPEAK - M 1/9 IBEXPEAK - M (HDA,JTAG,SATA) RT C V CC C C2 1 2 D1 9 S C S 7 5 1V - 4 0 RT C_ X1 RT C_ X2 1 2 R 1 80 C2 0 4 T PM CL EA R J OP E N 2 * OP E N _1 0 m li -1 MM A A A - B A T -0 22 -K 0 1 1 M _0 4 6-20-41Q00-102 1 u_ 6 . 3 V _X 5 R _ 0 4 R 2 01 RT CV C C 3 30 K _ 0 4 R T C _ R S T# C 14 S R T C _ R S T# D 17 S M_ I N T R U D E R # A1 6 P C H _I N T V R M E N A1 4 A3 0 2 4 , 28 , 3 1 H D A _B I TC LK 3 . 3V S D 29 2 4 , 28 , 3 1 H D A _S Y N C R 4 26 R 4 52 1 0K _0 4 *1 K _ 0 4 S E R IRQ H DA _ S P K R 31 R9 5 *1 K _ 0 4 H D A _S P K R H D A _S P K R S PI_ SI 31 HD A _ SDIN 0 28 HD A _ SDIN 1 24 P 1 C 30 2 4 , 2 8 , 31 , 3 3 H D A _R S T # NO REBOOT STRAP: HDA_SPKR High Enable iT PM EN AB LE /D IS AB LE 3 . 3V S G 30 F30 H D A _S D I N 2 HD A _ SDIN 2 E3 2 F32 TPM FUNCTION:SPI_SI High Enable B2 9 2 4 , 28 , 3 1 H D A _S D OU T 3 .3 V P C H _ J TA G _ R S T # R 1 67 1 0K _ 0 4 R1 5 6 2 0 0 _1 % _ 04 P C H _ J TA G _ TM S R 1 53 1 00 _ 04 R1 6 3 2 0 0 _1 % _ 04 P C H _ J TA G _ TD O R 1 60 1 00 _ 04 R1 6 1 2 0 0 _1 % _ 04 P C H _ J TA G _ TD I R 1 59 1 00 _ 04 P C H _ J TA G _ TC K _ B U F R 1 55 M E _D E B U G 1 2 0 K_ 0 4 R5 5 0 1 K_ 0 4 H 32 J30 ME CL EA R JO P E N 3 *OP E N _ 10 m i -l 1 M M 2 R1 7 0 RT CX 1 RT CX 2 F W H 0 / L A D0 F W H 1 / L A D1 F W H 2 / L A D2 F W H 3 / L A D3 R T C R S T# D3 3 B3 3 C3 2 A3 2 L P C_ A D0 2 5 ,2 8 L P C_ A D1 2 5 ,2 8 L P C_ A D2 2 5 ,2 8 L P C_ A D3 2 5 ,2 8 C3 4 L P C _ F R A ME # 2 5, 2 8 F W H 4 / L F R A ME # S RT CR S T # I NT RU DE R # I NT V RM E N L D R Q0 # LD R Q 1# / G P I O2 3 S E R IRQ D03 ADD R550,JOPEN3P C H _J T A G_ T C K _ B U F 4 . 7K _ 0 4 M3 P C H _J T A G_ T MS K 3 P C H _J T A G_ T D I K 1 P C H _J T A G_ T D O J2 P C H _J T A G_ R S T# J4 H D A _B C L K S A TA 0 R XN S A T A 0 RX P S A T A 0 T XN S A TA 0 T X P H D A _S Y N C SPKR H D A _R S T # S A TA 1 R XN S A T A 1 RX P S A T A 1 T XN S A TA 1 T X P H D A _S D I N 0 H D A _S D I N 1 H D A _S D I N 2 H D A _S D I N 3 S A TA 2 R XN S A T A 2 RX P S A T A 2 T XN S A TA 2 T X P IHDA 1u _ 6 . 3V _ X 5 R _ 0 4 2 B1 3 D 13 Zo= 50O ? 5% 1 C 36 2 1 U 12 A 1 0M _ 04 15 p _5 0 V _ N P O _ 04 R1 8 5 2 0K _ 1 % _0 4 J C BAT1 J_RTC1 C 19 8 RTC 1 u_ 6 . 3 V _X 5 R _ 0 4 J OP E N 1 * OP E N _1 0 m li -1 MM LPC 1 C2 0 9 1 K _ 04 Sheet 11 of 57 IBEXPEAK - M 1/9 R1 7 3 R TC CL EA R H D A _S D O H D A _D OC K _E N # / GP I O 3 3 H D A _D OC K _R S T # / GP I O 13 JT A G _T C K SATA R1 8 X5 Z M2 0 0S _ 3 2 . 76 8 K H Z C D2 0 S C S 7 5 1V - 4 0 S A TA 3 R XN S A T A 3 RX P S A T A 3 T XN S A TA 3 T X P S A TA 4 R XN S A T A 4 RX P S A T A 4 T XN S A TA 4 T X P S A TA 5 R XN S A T A 5 RX P S A T A 5 T XN S A TA 5 T X P JT A G _T MS A3 4 F34 AB9 SE R IRQ AK7 AK6 AK1 1 AK9 S A T A R XN 0 S A T A R XP 0 SA T AT XN0 SATAT XP0 C6 6 4 C6 6 5 C6 6 3 C6 6 2 AH 6 AH 5 AH 9 AH 8 S A T A R XN 1 S A T A R XP 1 SA T AT XN1 SATAT XP1 C2 8 7 C2 9 1 C2 8 1 C2 7 8 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 S A TA _R XN 1 S A TA _R XP 1 S A TA _T X N 1 S A TA _T X P 1 AF1 1 AF9 AF7 AF6 S A T A R XN 2 S A T A R XP 2 SA T AT XN2 SATAT XP2 C1 5 8 C1 5 5 C1 6 2 C1 6 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 S A TA _R XN 2 S A TA _R XP 2 S A TA _T X N 2 S A TA _T X P 2 S A T A _R X N 2 2 6 S A T A _R X P 2 26 S A T A _T X N 2 2 6 S A T A _T X P 2 2 6 AH 3 AH 1 AF3 AF1 S A T A R XN 3 S A T A R XP 3 SA T AT XN3 SATAT XP3 C4 6 3 C4 6 5 C4 6 2 C4 6 1 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 S A TA _R XN 3 S A TA _R XP 3 S A TA _T X N 3 S A TA _T X P 3 S A T A _R X N 3 3 2 S A T A _R X P 3 32 S A T A _T X N 3 3 2 S A T A _T X P 3 3 2 AD 9 AD 8 AD 6 AD 5 S A T A R XN 4 S A T A R XP 4 SA T AT XN4 SATAT XP4 C4 7 1 C4 7 4 C4 6 9 C4 6 6 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 S A TA _R XN 4 S A TA _R XP 4 S A TA _T X N 4 S A TA _T X P 4 S A T A I C OM P R4 2 1 S E R IRQ 25 , 2 8 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 D03 W87 NC 0 . 0 1 u_ 5 0 V _ X7 R _ 0 4 JT A G _T D O JT A G _R S T # S A TA _R XN 0 S A TA _R XP 0 S A TA _T X N 0 S A TA _T X P 0 AD 3 AD 1 AB3 AB1 JT A G _T D I 1 .1 VS JT AG A 15 p _5 0 V _ N P O _ 04 3 4 R TC _ V B A T _1 C 19 7 R1 8 6 2 0K _ 1 % _0 4 2 10m ils 1 u _ 6. 3 V _ Y 5 V _ 0 4 2 1 A 2 S A T A I C O MP O S A T A I C OM P I AF1 6 3 7 . 4 _1 % _ 04 AF1 5 3 .3 V S S P I_ S CL K BA 2 N C1 S P I_ C S 0 # R7 7 0_04 S P I _ C S 0 # _R AV 3 * NC_ 0 4 S P I_ C S 1 # R7 6 * 0 _0 4 S P I _ C S 1 # _R AY 3 SP I_ S I AY 1 SPI_ SO 3 3 _ 04 S P I _ S O_ R AV 1 C1 3 1 . 1 U _ 1 6 V _0 4 U1 0 Z2310 8 V DD SI W P# C E# SO R 91 3. 3 K _ 1 %_ 0 4 S PI_ W P # 3 SC K R 79 3. 3 K _ 1 %_ 0 4 S P I _ H OL D # 7 H O LD # VS S 5 SPI_ SI 2 SPI_ SO 1 S P I _ C S 0# 6 S P I _ S C LK R8 5 3 .3 VS S P I_ CL K R1 3 3 S P I_ CS 0 # S P I_ CS 1 # S A T A L E D# S P I _ MOS I S A T A 0 GP / G P I O2 1 S P I _ MI S O I b ex P e a k- M _ R e v 0 _9 SP I B.Schematic Diagrams 20m ils 20m ils V D D3 S A T A 1 GP / G P I O1 9 T3 S A T A _ L E D# Y9 O D D _D E T E C T # 1 0 K _ 04 S A T A _ L E D# 2 5 3 .3 VS O D D _ D E TE C T # 32 R 4 45 V1 S A T A _ D E T# 1 R1 2 4 1 0K _ 0 4 1 0 K _ 04 4 MX 2 5 L3 2 0 5D M2 I - 1 2 G SPI_* = 1.5"~6.5" U9 8 V DD SI SO R 81 *3 . 3 K _1 % _ 04 S P I _ W P # 3 W P# C E# SC K R 83 *3 . 3 K _1 % _ 04 S P I _ H OL D # 7 H O LD # VS S 5 SPI_ SI 2 SPI_ SO 1 S P I _ C S 1# 6 S P I _ S C LK 1 S P I _S O 2 S P I _W P # 3 4 4 *M X 25 L 3 20 5 D M 2I -1 2 G B - 12 IBEXPEAK - M 1/9 JS P I 1 S P I _C S 0 # C E# SO WP # VS S VD D H OL D # S CK SI 8 Z2 310 7 S P I _ H OL D # 6 S P I _ S C LK 5 SP I_ S I *A C A -S P I -0 04 -T 0 3 18 6, 12 , 1 3 , 17 , 1 8 , 20 , 3 6 , 38 , 3 9 2, 25 , 2 7 , 28 , 2 9 , 30 , 3 4 , 35 , 4 0 3 , 9, 1 0 , 1 2, 13 , 1 5 , 16 , 1 7 , 18 , 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 2 6 , 2 7, 28 , 2 9 , 30 , 3 1 , 32 , 3 3 , 34 , 3 9 2, 3 , 1 2 , 1 3, 1 5 , 1 6, 1 8 , 2 1, 2 4 , 2 6, 27 , 2 8 , 29 , 3 4 , 36 , 3 7 , 38 , 4 1 RT C V CC 1 . 1V S VDD 3 3 . 3V S 3 . 3V S AT A _ RXN 0 3 2 S AT A _ RXP0 3 2 S A T A _ T XN 0 3 2 S A T A _ T XP 0 3 2 S AT A _ RXN 1 3 2 S AT A _ RXP1 3 2 S A T A _ T XN 1 3 2 S A T A _ T XP 1 3 2 S A T A _R X N 4 3 2 S A T A _R X P 4 32 S A T A _T X N 4 3 2 S A T A _T X P 4 3 2 Schematic Diagrams IBEXPEAK - M 2/9 3 .3 V IBEXPEAK - M (PCI-E,SMBUS,CLK) U 12 B . 1 U _ 1 0 V _X 7 R _0 4 . 1 U _ 1 0 V _X 7 R _0 4 BA3 4 AW 3 4 B C3 4 B D3 4 AT3 4 A U3 4 A U3 6 AV3 6 D03 CHANGE FROM PORT6 TO PORT8 C 30 0 0 . 1 u_ 1 0 V _ X7 R _0 4 41 P C I E _ R X N 6_ U S B 41 P C I E _ R X P 6 _ U S B 4 1 P C I E _ TX N 6_ U S B 4 1 P C I E _ TX P 6 _ U S B C 29 9 C 58 5 C 58 6 0 . 1 u_ 1 0 V _ X7 R _0 4 0 . 1 u_ 1 0 V _ X7 R _0 4 0 . 1 u_ 1 0 V _ X7 R _0 4 2 1 4 1 C L K _ P C I E _U S B # 41 C L K _P C I E _ U S B 3 4 B G3 4 BJ 3 4 B G3 6 BJ 3 6 P C I E _T X N 6 _ C P C I E _T X P 6 _ C R N1 4 *4 P 2 R X 0 _ 04 _ S H O R T AK4 8 AK4 7 P9 4 1 U S B _ C LK R E Q # 47-O to 30-O (depends on no. Of loads) 2 7 C L K _ P C I E _M I N I # 27 C L K _P C I E _ M I N I 1 2 4 3 R N 16 C LK _P C H _ S R C 1 _ N A M4 3 *4 P 2 R X 0 _ 04 _ S H OC RLK T _P C H _ S R C 1 _ P A M4 5 1 2 4 3 C LK _P C H _ S R C 2 _ N A M4 7 R N 17 *4 P 2 R X 0 _ 04 _ S H OC RLK T _P C H _ S R C 2 _ P A M4 8 U 4 2 7 W L A N _ C L K R E Q# 2 6 C L K _ PCIE_ N EW _ CAR D# 26 C LK _P C I E _ N E W _ C A R D C LK _S L O T 2_ O E # 2 6 N E W C A R D _ C L K R E Q# 2 7 C L K _ P C I E _ M I N I _ 3 G# 27 C L K _P C I E _ M I N I _ 3 G N 4 1 2 4 3 R N 15 C LK _P C H _ S R C 3 _ N A H 4 2 *4 P 2 R X 0 _ 04 _ S H OC RLK T _P C H _ S R C 3 _ P A H 4 1 2 1 3 4 RN 7 C LK _P C H _ S R C 4 _ N A M5 1 *4 P 2 R X 0 _ 04 _ S H OC RLK T _P C H _ S R C 4 _ P A M5 3 A8 2 7 3 G_ C LK R E Q # 2 9 C L K _ P C I E _ GL A N # 2 9 C L K _ P C I E _G L A N L A N _C L K R E Q # 2 9 L A N _ C LK R E Q # C L K _ P CIE _ C R# C L K _ P CIE _ C R 1 2 4 3 M9 C LK _P C H _ S R C 5 _ N A J 5 0 RN 8 *4 P 2 R X 0 _ 04 _ S H OC RLK T _P C H _ S R C 5 _ P A J 5 2 D03C RN7,8,14,15,16,17 change to SHORT P C I E C LK R Q 5# H 6 AK5 3 AK5 1 P E G_ B _ C L K R Q# 3 .3 VS 5V 15 15 PCH _ UPEK _ IN IT # S ML 0 _ C L K G8 S ML 0 _ D A T A M 14 L P D _ S P I _ I N TR # E1 0 S ML 1 _ C L K S M L 0 _C L K 2 6 S M L 0 _D A T A 2 6 S M L 0D A T A S ML 1 A L E R T# / G P I O7 4 S ML 1 C L K / G P I O5 8 P E R N6 PER P6 PET N6 PETP6 C 6 S ML 1 D A T A / G P I O7 5 CL _ CL K 1 CL _ DAT A1 C L_ R S T1 # G 12 D02 SML0CLK,DATA & SML1CLK,DATA change S ML 1 _ D A T A R 1 88 0_04 R 1 87 0_04 T13 P E R N8 PER P8 PET N8 PETP8 C LK OU T_ P E G _ A _ N C L K OU T _P E G_ A _ P CL K O UT _ DM I_ N C LK OU T_ D MI _ P C L K OU T _D P _ N / C L K OU T _B C L K 1 _ N C LK OU T_ D P _ P / C L K O U T _ B C L K 1 _ P C L K O U T _ P C I E 0N C L K O U T _ P C I E 0P P C I E C L K R Q0 # / GP I O7 3 C L K O U T _ P C I E 1N C L K O U T _ P C I E 1P P C I E C L K R Q1 # / GP I O1 8 C L K O U T _ P C I E 2N C L K O U T _ P C I E 2P C L K O U T _ P C I E 3N C L K O U T _ P C I E 3P R E F C L K 1 4I N P C I E C L K R Q3 # / GP I O2 5 C L K I N _ P C I L O OP B A C K C L K O U T _ P C I E 4N C L K O U T _ P C I E 4P XT A L 2 5 _I N X T A L 2 5_ O U T P C I E C L K R Q4 # / GP I O2 6 X C L K _ R C OM P C L K O U T _ P C I E 5N C L K O U T _ P C I E 5P C L K O U T _ P E G _B _N C L K O U T _ P E G _B _P P E G _B _C L K R Q # / GP I O 5 6 C L K I N _D OT _ 9 6 N C LK I N _ D O T _9 6 P C L K I N _ S A TA _ N / C K S S C D _ N C LK I N _ S A T A _ P / C K S S C D _ P P C I E C L K R Q2 # / GP I O2 0 P C I E C L K R Q5 # / GP I O4 4 CL KIN _ DM I_ N C L K I N _ D MI _ P C L K IN_ B C L K _ N CL K IN _ B CL K _ P C L K OU TF LE X0 / G P I O6 4 C L K OU TF LE X1 / G P I O6 5 C L K OU TF LE X2 / G P I O6 6 C L K OU TF LE X3 / G P I O6 7 2 ,2 5 S MD _ C P U _ TH E R M 2 ,2 5 T11 2 . 2 K _ 04 P CH _ UP E K _ IN IT # R4 7 1 1 0 K _0 4 S ML 0 _ C L K R4 8 3 2 . 2 K _ 04 S ML 0 _ D A T A R4 8 2 2 . 2 K _ 04 LP D _ S P I _ I N TR # R4 7 9 1 0 K _0 4 S ML 1 _ C L K R4 8 6 2 . 2 K _ 04 S ML 1 _ D A T A R4 8 5 2 . 2 K _ 04 MX M_ C L K R E Q # R1 6 5 1 0 K _0 4 Sheet 12 of 57 IBEXPEAK - M 2/9 C L_ D A T A 1 27 T9 C L_ R S T #1 2 7 H 1 MX M_ C L K R E Q # AD 4 3 AD 4 5 C L K _ P C H _ P E G A _N C L K _ P C H _ P E G A _P M XM _ C L K R E Q# 2 4 2 1 100-MHz Gen2 differential clock to PCIe Graphics device. 3 RN 1 8 4 *4 P 2 R X 3 3 _ 04 _ S H OR T C LK _P C I E _ MX M # 24 C LK _P C I E _ MX M 2 4 AN 4 AN 2 AT1 AT3 R1 6 8 C L_ C L K 1 27 P E G_ A _ C L K R Q# / G P I O4 7 P E R N7 PER P7 PET N7 PETP7 S MC _ C P U _ TH E R M 2 . 2 K _ 04 S MB _ D A T A C LK _E X P _ N 3 C LK _E X P _ P 3 D03 DEL RN6 & CLK_DP_N/P A W 24 B A 24 C LK _P C I E _ I C H # 2 0 C LK _P C I E _ I C H 2 0 AP 3 AP 1 C LK _B U F _ B C LK _ N C LK _B U F _ B C LK _ P 100-MHz differential clock from PCH to Processor. Connect to PEG_CLK#/PEG_CLK pins of the processo 20 20 F18 E1 8 C LK _B U F _ D O T 96 _ N 20 C LK _B U F _ D O T 96 _ P 2 0 AH 1 3 AH 1 2 C LK _S A TA # 2 0 C LK _S A TA 20 P4 1 C LK _B U F _ R E F 14 2 0 C 1 59 R 1 08 J42 C LK _P C I _ F B 1 5 AH 5 1 AH 5 3 X TA L 2 5 _ I N X TA L 2 5 _ OU T A F 38 X C L K _ R C OM P 51-O series Resisto Connect to any one of the CLKOUT_PCI[4:0] pins 1 M _1 % _ 0 4 C 1 53 R 41 7 9 0 . 9_ 1 % _ 04 1 .1 V S 2 2 p_ 5 0 V _ N P O _ 04 X3 H S X5 3 1 S _ 25 M H Z 90.9-O ? % pullup to +VccIO (1.05V, S0 rail) 2 2 p_ 5 0 V _ N P O _ 04 D02 T45 P4 3 T42 N 50 I b e x P ea k - M _R e v 0 _9 J _ C R B OA R D 1 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4 U SB_ PN3 U SB_ PP3 J14 S M B _ DA T A 9 ,1 0 ,2 0 1 0 K _0 4 R1 7 2 3 .3 V D02 EMI ADD C 67 7 C 67 6 3 , 1 5 , 25 , 2 6 , 2 7, 2 9 B U F _ P L T_ R S T # P1 3 P E R N5 PER P5 PET N5 PETP5 S ML 0 C L K SMBus P C I E _T X N 5 _ C P C I E _T X P 5 _ C BF3 3 B H3 3 B G3 2 BJ 3 2 P E R N3 PER P3 PET N3 PETP3 P E R N4 PER P4 PET N4 PETP4 S MB _ D A T A 1 0 K _0 4 R4 6 5 S MB _ C L K 4 C 13 5 C 13 9 P C I E _T X N 4 _ C P C I E _T X P 4 _ C C 8 S M B _ CL K 9 ,1 0 ,2 0 R4 6 4 P C H _ B T _E N # 1 P C I E _R X N 5 _ C R P C I E _R X P 5 _C R P C I E _T X N 5 _ C R P C I E _T X P 5 _ C R . 1 U _ 1 0 V _X 7 R _0 4 . 1 U _ 1 0 V _X 7 R _0 4 BA3 2 BB3 2 B D3 2 BE3 2 S MB _ C L K P E G_ B _ C LK R Q # 3 C 58 8 C 58 7 P C I E _T X N 3 _ C P C I E _T X P 3 _ C H 14 PC H_ BT _ EN# 2 8 1 0 K _0 4 2 2 9 P C I E _R X N 4 _ GL A N 2 9 P C I E _R X P 4 _G L A N 2 9 P C I E _ T X N 4 _ GL A N 2 9 P C I E _ T X P 4 _G L A N . 1 U _ 1 0 V _X 7 R _0 4 . 1 U _ 1 0 V _X 7 R _0 4 S ML 0 A L E R T# / G P I O6 0 Link C 59 2 C 59 3 A U3 0 AT3 0 A U3 2 AV3 2 P E R N2 PER P2 PET N2 PETP2 PCI-E* WLAN NEW CARD 3G GLAN CARD READER X X USB3.0 AW 3 0 BA3 0 B C3 0 B D3 0 P C I E _T X N 2 _ C P C I E _T X P 2 _ C S MB D A T A C on tr ol le r 1 2 3 4 5 6 7 8 27 P C I E _ R X N 3_ 3 G 27 P C I E _ R X P 3 _ 3 G 2 7 P C I E _ TX N 3_ 3 G 2 7 P C I E _ TX P 3 _ 3 G . 1 U _ 1 0 V _X 7 R _0 4 . 1 U _ 1 0 V _X 7 R _0 4 P C H _ B T _E N # S MB C L K PEG Usage C 59 0 C 58 9 P C I E _T X N 1 _ C P C I E _T X P 1 _ C B9 S M B A L E R T# / G P I O1 1 From CLK BUFFER Lane Lane Lane Lane Lane Lane Lane Lane 2 6 P C IE _ RX N2 _ NE W _ CA R D 2 6 P C IE _ RX P 2 _ NE W _ C A RD 2 6 P C I E _T X N 2 _ N E W _ C A R D 2 6 P C I E _T X P 2 _ N E W _ C A R D . 1 U _ 1 0 V _X 7 R _0 4 . 1 U _ 1 0 V _X 7 R _0 4 P E R N1 PER P1 PET N1 PETP1 R4 7 0 B U F _ P L T _R S T # US B _ P N 3 US B _ P P 3 C L K _P C I E _ C R # C L K _P C I E _ C R 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 13 15 17 19 P C I E _ R X N 5_ C R P C IE _ RX P 5 _ CR R5 2 6 P C I E _ T XN 5 _C R P C I E _ T XP 5_ C R S D_ CD # D02 PULL UP 1 0 K _0 4 US B _ O C# 3 5V 3 .3 VS 1 .1 VS 3 .3 V 1 8 , 26 , 2 8 , 3 0, 3 4 , 3 6 , 3 7, 3 8 , 4 1 3 , 9 , 10 , 1 1 , 1 3, 15 , 1 6 , 1 7, 1 8 , 2 0 , 21 , 2 2 , 2 3, 24 , 2 5 , 2 6, 2 7 , 2 8 , 29 , 3 0 , 3 1, 32 , 3 3 , 3 4, 3 9 6 , 1 1, 1 3 , 1 7 , 18 , 2 0 , 3 6 , 38 , 3 9 2 , 3 , 11 , 1 3 , 1 5, 16 , 1 8 , 2 1, 2 4 , 2 6 , 27 , 2 8 , 2 9, 34 , 3 6 , 3 7, 3 8 , 4 1 U S B _ O C # 3 15 S D _ CD # 16 F 1 -2 3 3A 5-A 20 0 0 - 2 10 6-21-C4700-210 IBEXPEAK - M 2/9 B - 13 B.Schematic Diagrams PCI-E x1 C 13 4 C 13 3 B G3 0 BJ 3 0 BF2 9 B H2 9 Clock Flex 27 P C I E _ R X N 1_ W L A N 27 P C I E _ R X P 1 _ W L A N 2 7 P C I E _ TX N 1_ W L A N 2 7 P C I E _ TX P 1 _ W L A N P CI E CL K RQ 5 # Schematic Diagrams IBEXPEAK - M 3/9 IBEXPEAK - M (DMI,FDI,GPIO) A ub ur nda le G ra ph ic s Dis ab le G ui de li ne I n ad dit io n, F DI _R XN _[7 :0 ] an d FD I_ RXP _[ 7: 0] c an b e l ef t f lo at ing o n th e PC H. F DI _T X[7 :0 ] an d FD I_ TX# [7 :0 ] ca n be le ft f lo at in g on th e A ub ur nda le T he G FX_ IM ON , FD I_ FS YNC [0 ], F DI _F SY NC[ 1] , FD I_ LS YN C[0 ], F DI _L SYN C[ 1] , an d F DI _I NT si gn al s sh ou ld be t ie d to G ND (t hr ou gh 1 K ? % r es is tor s) i n th e co mmo n m ot he rbo ar d de si gn c ase . Pl ea se n ot th at i f th es e sig na ls a re l eft f lo at in g, t her e ar e no f un ct ion al i mp ac ts b ut a sm al l am ou nt of p ow er ( ~1 5 m W) m ay be wa st ed . VA XG _S ENS E a nd V SSA XG _S EN SE o n Aub ur nd al e ca n be le ft a s no c onn ec t. D M I _R X P 0 D M I _R X P 1 D M I _R X P 2 D M I _R X P 3 2 2 2 2 2 2 2 2 Sheet 13 of 57 IBEXPEAK - M 3/9 R 92 1. 1 V S _ V C C _ E X P B D2 4 B G2 2 BA2 0 B G2 0 BE2 2 BF 2 1 B D2 0 BE1 8 D MI _ T X N 0 D MI _ T X N 1 D MI _ T X N 2 D MI _ T X N 3 B D2 2 B H2 1 B C2 0 B D1 8 D MI _ T X P 0 D MI _ T X P 1 D MI _ T X P 2 D MI _ T X P 3 D M I _ C O MP _ R 4 9 . 9_ 1 % _ 04 B H2 5 BF 2 5 D M I 0R X N D M I 1R X N D M I 2R X N D M I 3R X N D M I 0R X P D M I 1R X P D M I 2R X P D M I 3R X P D M I 0T X N D M I 1T X N D M I 2T X N D M I 3T X N D M I 0T X P D M I 1T X P D M I 2T X P D M I 3T X P D M I _Z C O MP FDI 2 2 2 2 B C2 4 BJ 2 2 AW 2 0 BJ 2 0 DMI D M I _R X N 0 D M I _R X N 1 D M I _R X N 2 D M I _R X N 3 FD FD FD FD FD FD FD FD I _R I _R I _R I _R I _R I _R I _R I _R XN0 XN1 XN2 XN3 XN4 XN5 XN6 XN7 FD FD FD FD FD FD FD FD I_ RX P 0 I_ RX P 1 I_ RX P 2 I_ RX P 3 I_ RX P 4 I_ RX P 5 I_ RX P 6 I_ RX P 7 F D I_ INT F D I _F S Y N C 0 F D I _F S Y N C 1 D M I _I R C O MP F D I_ L SY N C0 F D I_ L SY N C1 BA1 8 B H 17 B D 16 BJ 1 6 BA1 6 BE1 4 BA1 4 B C 12 BB1 8 BF1 7 B C 16 B G 16 AW 1 6 B D 14 BB1 4 B D 12 BJ 1 4 F D I _I N T _R BF1 3 F D I _F S Y N C 0 _R B H 13 F D I _F S Y N C 1 _R BJ 1 2 F D I _L S Y N C 0_ R 4 3 2 1 B G 14 F D I _L S Y N C 1_ R 1 K _ 8 P 4R _ 04 R8 4 1 K _0 4 RN 5 5 6 7 8 3 .3 V FOR RESET SWITCH (? ? ? ) R 4 46 P M _ MP W R OK 10 K _ 0 4 S Y S _R E S E T # T6 S Y S _P W R O K M6 S B _ P W R OK B1 7 K5 R 1 78 R 1 77 0 _ 04 *0 _ 0 4 MP W R O K _R R 1 76 1 0 K _0 4 A U X P P W R O K _R A1 0 EXT-LAN D 9 3 P M _ D R A M_ P W R GD 25 RS M RS T # 2 5 S US _ P W R _ A CK R 2 14 R S MR S T # 1 0 K _0 4 R 1 45 0 _ 04 C1 6 S U S _P W R _ A C K _R SYS_ R ESET# W AKE# S Y S _ P W R OK C L K R U N # / G P I O3 2 P W RO K ME P W R O K L A N_ RS T # D R A MP W R OK RSM RST # M1 S U S _ P W R _ A C K / GP I O 30 2 5 P W R_ B T N# 3 .3 V P W R _B TN # P5 A C _ P R E S E N T_ R P7 P M _B A TL O W # A6 P W R B TN # System Power Management 3 .3 V S A C P R E S E N T / GP I O 3 1 P C I E _W A K E # Y 1 P M_ C LK R U N # P C I E _W A K E # 2 6, 2 7 , 2 9 , 41 P M_ C L K R U N # 25 , 2 8 P C I E _W A K E # R4 8 0 1 K _ 04 P M_ S L P _ L A N # R4 8 4 *1 0 K _ 0 4 SW I# R4 7 2 1 0K _0 4 S US _ P W R_ A CK _ R R1 5 0 1 0K _0 4 P W R _B T N # R4 4 2 *1 0 K _ 0 4 P M_ B A T L OW # R1 7 9 1 0K _0 4 FOR TPM S U S _S TA T # / G P I O6 1 S U S C L K / G P I O6 2 S LP _S 5 # / G P I O6 3 P8 S 4 _ S TA TE # S 4 _S T A T E # 2 8 F3 E4 3 .3 V S S LP _ S 4 # H 7 S U S C# 2 5 , 37 SU SB# 2 5 , 26 , 2 8 , 3 6, 4 1 P M_ C LK R U N # P1 2 S US B # S LP _ S 3 # S L P _ M# TP2 3 B A T LO W # / G P I O7 2 J12 P M S Y N CH R 1 17 8 .2 K_ 0 4 K8 N 2 BJ 1 0 H_ P M _ S Y N C 3 R4 5 0 S W I# 25 10 K _ 0 4 F14 S W I# RI# S L P _ LA N # F6 P M_ S L P _ L A N # 3. 3V I b e xP e a k -M_ R e v 0 _ 9 D03 CHANGE TO SHORT D A C _P R E S E N T_ R A C _ IN# G Q3 1 *2 N 7 0 0 2W 14 2 5 ,4 0 S A L L _S Y S _ P W R G D U6 D 74 L V C 0 8 P W 3 .3 V 3 , 3 9 D E L A Y _P W R G D 3 .3 V 14 0 . 1 u _1 6 V _ Y 5 V _ 0 4 3 6 1 . 8V S _P W R G D U 6B 7 4 LV C 0 8 P W 4 14 C 91 3 8 1. 1 V S _ V T T _ P W R G D 6 U6 C 7 4L V C 08 P W * 2 0m i _l s h o r t P M_ MP W R O K R 52 * 2 0m i _l s h o r t S B _ P W R O K R 50 * 2 0m i _l s h o r t S Y S _ P W R OK 13 7 3 .3 V R 55 12 11 R 46 1 0 K _ 04 9 A L L_ S Y S _ P W R G D 8 10 A L L _ S Y S _ P W R GD 2 1, 2 4 , 2 5 3 7 D D R 1 . 5 V _P W R G D 3, 3 6 1 . 1 V S _ P W R G D B - 14 IBEXPEAK - M 3/9 7 U6 A 7 4 LV C 0 8P W 1 3 R3 8 2 K_ 0 4 H _V T T P W R GD 7 14 5 1 . 1 V S _ 1 . 5 V _P W R O K 2 7 B.Schematic Diagrams U1 2 C 2 2 2 2 R 74 C1 1 6 1 0 K _ 04 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 . 1 V S _ V T T _E N 3 8 R3 7 1 K _0 4 3 3 .3 VS 3 , 9 , 10 , 1 1 , 1 2, 1 5 , 1 6, 1 7 , 1 8 , 20 , 2 1 , 2 2, 2 3 , 2 4 , 25 , 2 6 , 27 , 2 8 , 2 9, 3 0 , 3 1 , 32 , 3 3 , 3 4, 3 9 3 .3 V 2 , 3 , 11 , 1 2 , 1 5, 1 6 , 1 8, 2 1 , 2 4 , 26 , 2 7 , 2 8, 2 9 , 3 4 , 36 , 3 7 , 38 , 4 1 1 . 1 V S _ V C C _E XP 6, 1 1 , 1 2, 1 7 , 1 8 , 20 , 3 6 , 3 8, 3 9 Schematic Diagrams IBEXPEAK - M 4/9 IBEXPEAK - M (LVDS,DDI) BB4 7 BA5 2 A Y4 8 AV4 7 No Connect BB4 8 BA5 0 A Y4 9 AV4 8 AP4 8 AP4 7 A Y5 3 AT4 9 A U5 2 AT5 3 A Y5 1 AT4 8 A U5 0 AT5 1 AA5 2 AB5 3 A D5 3 V5 1 V5 3 Y5 3 Y5 1 R 4 16 1 K _ 1 % _ 04 DA C_ IR E F _ R A D4 8 AB5 1 1 Port B detected 0 Port B not detected Sheet 14 of 57 IBEXPEAK - M 4/9 BF4 5 B H 45 L _ C TR L _ C L K L _ C TR L _ D A TA S DV O _ CT R L CL K S D V O _ CT R L DA T A L VD _ VR EFH L VD _ VR EFL L VD SA_ C L K# L VD SA_ C L K L VD SA_ D ATA# 0 L VD SA_ D ATA# 1 L VD SA_ D ATA# 2 L VD SA_ D ATA# 3 L VD SA_ D ATA0 L VD SA_ D ATA1 L VD SA_ D ATA2 L VD SA_ D ATA3 L VD SB_ C L K# L VD SB_ C L K L VD SB_ D ATA# 0 L VD SB_ D ATA# 1 L VD SB_ D ATA# 2 L VD SB_ D ATA# 3 L VD SB_ D ATA0 L VD SB_ D ATA1 L VD SB_ D ATA2 L VD SB_ D ATA3 C R T_ B L U E C R T_ G R E E N C R T_ R E D D D DD D D DD D D DD D D DD PB_ 0 N PB_ 0 P PB_ 1 N PB_ 1 P PB_ 2 N PB_ 2 P PB_ 3 N PB_ 3 P D DP C _ CT R L CL K DD P C _ CT R L DA T A D DP C_ AU XN DD P C _ A UX P D DP C_ H P D D D D D D D D D DP C_ 0 N D PC_ 0 P DP C_ 1 N D PC_ 1 P DP C_ 2 N D PC_ 2 P DP C_ 3 N D PC_ 3 P D DP D _ CT R L CL K DD P D _ CT R L DA T A C R T_ D D C _ C L K C R T_ D D C _ D A TA C R T_ H S Y N C C R T_ V S Y N C D A C _ I RE F C R T_ I R T N DD P B _ A U X N D DP B _ A UX P DD P B_ H PD D DP D_ AU XN DD P D _ A UX P D DP D_ H P D D D D D D D D D DP D_ 0 N D PD_ 0 P DP D_ 1 N D PD_ 1 P DP D_ 2 N D PD_ 2 P DP D_ 3 N D PD_ 3 P B G 44 BJ 4 4 A U 38 B D 42 B C 42 BJ 4 2 B G 42 BB4 0 BA4 0 AW 3 8 BA3 8 SDVO L VD _ IB G L VD _ VBG T51 T53 Display Port B AV5 3 AV5 1 S D V O_ I N T N S D V O _ I NT P SDVO_CTRL_DATA Y4 9 AB4 9 Display Port C AT4 3 AT4 2 L _ D DC _ CL K L _ D DC _ DA T A DDI Port B Detect BJ 4 6 B G 46 BJ 4 8 B G 48 BE4 4 B D 44 AV4 0 BE4 0 B D 40 BF4 1 B H 41 B D 38 B C 38 BB3 6 BA3 6 U5 0 U5 2 Display Port D AP3 9 AP4 1 S DV O _ S T A L L N S D V O_ S T A L L P LVDS AB4 6 V4 8 S D V O _T V C L K I N N S DV O _ T V CL K I NP L _ BKL T C T L Digital Display Interface AB4 8 Y4 5 L _ BKL T EN L _ V D D_ E N CRT Y4 8 B C 46 B D 46 AT3 8 BJ 4 0 B G 40 BJ 3 8 B G 38 BF3 7 B H 37 BE3 6 B D 36 I be x P e a k -M _R e v 0 _ 9 Connect to GND No Connect External Graphics (PCH Integrated Graphics Disable) External Graphics (PCH Integrated Graphics Disable) IBEXPEAK - M 4/9 B - 15 B.Schematic Diagrams U1 2 D T48 T47 Schematic Diagrams IBEXPEAK - M 5/9 IBEXPEAK - M (PCI,USB,NVRAM) DMI Termination Voltage U 12 E LP C Re se rv ed PC I SP I R4 5 9 *1 K _ 0 4 P CI_ G NT # 0 R4 5 6 *1 K _ 0 4 P CI_ G NT # 1 (N AN D) Understand the RED FONT define R 46 1 * 1 K _0 4 P C I _ GN T# 3 J50 G4 2 H4 7 G3 4 3 .3 VS 4 RN 1 9 3 8 . 2K _8 P 4 R _0 4 2 1 1 RN 1 2 2 8 . 2K _8 P 4 R _0 4 3 4 1 RN 1 1 2 8 . 2K _8 P 4 R _0 4 3 4 5 6 7 8 8 7 6 5 8 7 6 5 1 RN 1 3 2 8 . 2K _8 P 4 R _0 4 3 4 1 RN 1 0 2 8 . 2K _8 P 4 R _0 4 3 4 8 7 6 5 8 7 6 5 P CI_ P E R R# P C I _L O C K # P C I _ D E V S E L# P CI_ S E R R# P C I _ F R A ME # I N T _P I R Q D # P C I_ I RD Y # I N T _P I R Q E # INT _ P IRQ H# P C I _ TR D Y # PC I_ REQ # 1 PC I_ REQ # 2 P C I _ S T OP # INT _ P IRQ C# I N T _ P I R Q G# I N T _ P I R QA # P C I _ R E Q# 3 INT _ PIRQ F # INT _ PIRQ B# P C I _ R E Q# 0 INT _ P IRQ A # INT _ P IRQ B # INT _ P IRQ C# INT _ P IRQ D# G3 8 H5 1 B3 7 A4 4 P C I _ R E Q# 0 P C I _ R E Q# 1 P C I _ R E Q# 2 P C I _ R E Q# 3 F51 A4 6 B4 5 M5 3 P CI_ G NT # 0 P CI_ G NT # 1 P CI_ G NT # 3 F48 K4 5 F36 H5 3 INT _ P IRQ E # INT _ P IRQ F # I N T _ P I R Q G# INT _ P IRQ H# B4 1 K5 3 A3 6 A4 8 P CI_ S E R R# P CI_ P E R R# E4 4 E5 0 PCI_ IR DY # PCI_ D EV SEL # P C I _ F R A ME # A4 2 H4 4 F46 C4 6 P C I _ L OC K # D4 9 PCI_ S T O P# P CI_ T RD Y # D4 1 C4 8 K6 M7 PIN PLT_R ST# t o Buf fer P L T_ R S T # 3 , 2 4, 2 8 , 4 1 P L T_ R S T # R 139 R 474 1 2 C LK _ P C I _ F B 2 5 P C LK _K B C R 460 2 8 P C LK _T P M 2 2_ 0 4 2 2_ 0 4 2 2_ 0 4 C L K _ P C I _F B _R C L K _ P C I _K B C _ R C L K _ P C I _T P M _ R D 5 N5 2 P5 3 P4 6 P5 1 P4 8 N V _C E # 0 N V _C E # 1 N V _C E # 2 N V _C E # 3 N V _ DQ S0 N V _ DQ S1 NVRAM Sheet 15 of 57 IBEXPEAK - M 5/9 B oo t BI OS L oc at io n 0 1 0 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 N N N N N N C/ B E 0 # C/ B E 1 # C/ B E 2 # C/ B E 3 # P L T _ RS T # N V _ W R # 0_ R E # N V _ W R # 1_ R E # N V _W E #_ C K 0 N V _W E #_ C K 1 P I R QA # P I R QB # P I R QC # P I R QD # R E Q0 # R E Q1 # / GP I O 5 0 R E Q2 # / GP I O 5 2 R E Q3 # / GP I O 5 4 GN T 0# GN T 1# / G P I O 51 GN T 2# / G P I O 53 GN T 3# / G P I O 55 P I R QE # / G P I O2 P I R QF # / G P I O3 P I R QG # / GP I O 4 P I R QH # / GP I O 5 PC IRST # SE R R# PE R R# IR DY # PAR DE V S E L # F R A ME # USB P0 N USB P0 P USB P1 N USB P1 P USB P2 N USB P2 P USB P3 N USB P3 P USB P4 N USB P4 P USB P5 N USB P5 P USB P6 N USB P6 P USB P7 N USB P7 P USB P8 N USB P8 P USB P9 N USB P9 P U S B P 10 N U SBP1 0 P U S B P 11 N U SBP1 1 P U S B P 12 N U SBP1 2 P U S B P 13 N U SBP1 3 P P L OC K # U S B RB IA S # S T OP # T RD Y # US B RB IA S PM E# PL T RST # CL K O CL K O CL K O CL K O CL K O UT _ P CI UT _ P CI UT _ P CI UT _ P CI UT _ P CI 0 1 2 3 4 O C0 # / O C1 # / O C2 # / O C3 # / O C4 # / OC 5 # O C6 # / O C7 # / GP I O5 9 GP I O4 0 GP I O4 1 GP I O4 2 GP I O4 3 / GP I O 9 GP I O1 0 GP I O1 4 N V _C E [ 0 ] # N V _C E [ 1 ] # N V _C E [ 2 ] # N V _C E [ 3 ] # AV9 BG 8 N V _D QS [ 0 ] N V _D QS [ 1 ] AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD 6 BB7 BC 8 BJ 8 BJ 6 BG 6 NV NV NV NV NV NV NV NV NV NV NV NV NV NV NV NV BD 3 AY 6 N V _A L E N V _C L E AU 2 N V _R C O MP AV7 N V _R _ B # _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D 4 B U F _ P L T _R S T # 3, 12 , 2 5 , 2 6, 2 7 , 2 9 R 4 58 * 1 00 K _ 0 4 N V _ C LE AV1 1 BF5 NV_ A L E Intel recommends routing from the pad of the NV_RCOMP pin using that microstrip layer to one end of a 32.4 O ? % precision resistor to ground. Route signal using 50-O single-ended impedance and 500 mils (12.7 mm) max trace length. Avoid routing next to clock pins or under stitching capacitors V _ N V R A M _V C C Q R1 0 2 * 10 0 U _6 . 3 V _ B 2 N V _D Q[ 0] N V _D Q[ 1] T P _ N V _ D QS _ 0 # N V _D QS [ 0] N V _W E #_ C K 0 N V _W E #_ C K 1 U U U U U U U U U U U U U U U U U U S B _ P N0 SB_ PP0 S B _ P N1 SB_ PP1 S B _ P N2 SB_ PP2 S B _ P N3 SB_ PP3 S B _ P N4 SB_ PP4 S B _ P N5 SB_ PP5 S B _ P N6 SB_ PP6 S B _ P N7 SB_ PP7 S B _ P N8 SB_ PP8 26 26 26 26 26 26 12 12 28 28 26 26 27 27 27 27 30 30 U S B _ P N1 0 2 8 U S B _ P P 1 0 28 USB PORT 0 T P _ NV _ R F U_ 1 T P _ NV _ R F U_ 2 USB PORT 1 USB PORT 2 USB PORT 3 N V _C L E N V _A LE N V _R E # _ W R # 0 N V _C E [ 1 ] # BLUETOOTH N V _C E [ 0 ] # NEW CARD VCC _ 4 VCC _ 5 VCC _ 6 C E_ 6 # VSS_ 1 3 DQ 2 DQ 3 VSS_ 1 4 C K_ 0 # CK_ 0 /W E _ 0 # VSS_ 1 5 DQ 6 DQ 7 VSS_ 1 6 R/ B # W P# VSS_ 1 7 C L E_ 1 AL E_ 1 VSS_ 1 8 W / R _ 1/ R E _ 1 # C E_ 3 # VSS_ 1 9 RF U _ 3 RF U _ 4 VSS_ 2 0 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 N V_ CE[2 ]# N V _ D Q[ 2] N V _ D Q[ 3] T P _ N V _ C K _ 0# N V _ W E # _C K 0 N V _ D Q[ 6] N V _ D Q[ 7] N V_ R_ B # T P _ N V _ W P 0# N V_ CL E N V _ A LE N V _ RE # _ W R# 1 N V_ CE[1 ]# T P _ NV_ R F U_ 3 T P _ NV_ R F U_ 4 KE Y CCD N V _D Q[ 8] N V _D Q[ 9] T P _ N V _ D QS _ 1 # N V _D QS [ 1] N V _C E [ 3 ] # R1 7 4 V CC _ 1 V CC _ 2 V CC _ 3 CE_ 4 # VSS_ 1 DQ 0 DQ 1 VSS_ 2 D Q S _ 0# DQ S _ 0 VSS_ 3 DQ 4 DQ 5 VSS_ 4 RF U _ 1 RF U _ 2 VSS_ 5 CL E _ 0 AL E_ 0 VSS_ 6 W /R_ 0 # /RE _ 0 # CE_ 1 # VSS_ 7 CE_ 0 # CE_ 2 # VSS_ 8 WLAN N V _D Q[ 12 ] N V _D Q[ 13 ] U S B _B I A S D03 BOM DEL CO N1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 3G & TV FINGERPRINT * 1K _ 0 4 +C 2 71 3 2. 4_ 1 % _0 4 N V _R E # _W R # 0 N V _R E # _W R # 1 R 39 6 3 .3 V S N V _D Q[ 4] N V _D Q[ 5] 2 2. 6_ 1 % _0 4 27 28 29 30 31 32 33 34 35 36 37 38 39 VSS_ 9 DQ 8 DQ 9 VSS_ 1 0 D Q S _ 1# DQ S _ 1 VSS_ 1 1 D Q _1 2 D Q _1 3 VSS_ 1 2 CE_ 5 # V C C Q_ 1 V C C Q_ 2 VSS_ 2 1 DQ 1 0 DQ 1 1 VSS_ 2 2 C K_ 1 # CK_ 1 /W E _ 1 # VSS_ 2 3 DQ 1 4 DQ 1 5 VSS_ 2 4 C E_ 7 # V RE F V C CQ _ 3 66 67 68 69 70 71 72 73 74 75 76 77 78 N V _ D Q[ 10 ] N V _ D Q[ 11 ] T P _ N V _ C K _ 1# N V _ W E # _C K 1 N V _ D Q[ 14 ] N V _ D Q[ 15 ] N V_ CE[3 ]# T P _ NV_ V R E F * A C E S 5 1 7 7 1-0 7 8 0 M-0 0 2(1 . 8 V ) D2 5 N1 6 J 16 F16 L 16 E1 4 G1 6 F12 T 15 * 1K _ 0 4 Da nb ur y T ec hn ol og y Di sa bl ed wh en L ow En ab le d wh en H ig h H1 8 J 18 A1 8 C1 8 N2 0 P2 0 J 20 L 20 F20 G2 0 A2 0 C2 0 M2 2 N2 2 B2 1 D2 1 H2 2 J 22 E2 2 F22 A2 2 C2 2 G2 4 H2 4 L 24 M2 4 A2 4 C2 4 B2 5 R 39 5 NV_ALE N V _C E [ 2 ] # AY 8 AY 5 Se t to Vs s wh en L OW Se t to Vc c wh en HI GH NV_CLE Q[ 0 ] Q[ 1 ] Q[ 2 ] Q[ 3 ] Q[ 4 ] Q[ 5 ] Q[ 6 ] Q[ 7 ] Q[ 8 ] Q[ 9 ] Q[ 1 0 ] Q[ 1 1 ] Q[ 1 2 ] Q[ 1 3 ] Q[ 1 4 ] Q[ 1 5 ] 6-86-26078-001 D03 ADD U S B _ OC # 1R R 5 3 8 U S B _ OC # 2R R 5 0 8 U S B _ OC # 3R R 5 3 9 U S B _ OC # 5R R 5 4 0 R4 7 8 R4 6 3 R4 8 1 R4 5 1 * 0_ 0 4 * 0_ 0 4 * 0_ 0 4 * 0_ 0 4 1 0 K _ 04 1 0 K _ 04 1 0 K _ 04 1 0 K _ 04 US B _ O C# 1 2 6 U S B _ O C # 2 2 6, 4 1 US B _ O C# 3 1 2 US B _ O C# 5 2 6 3 . 3V 3 .3 V S 1 .8 VS V _ N V RA M _ V CC Q R 2 70 0_ 0 8 R 2 57 *0 _ 08 C 2 98 *2 2 u_ 6 . 3 V _ X 5R _ 08 U S B _ OC # 1R R 5 4 1 U S B _ OC # 2R R 5 4 2 U S B _ OC # 3R R 5 4 3 U S B _ OC # 5R R 5 4 4 D03 ADD U3 5 74 A H C 1 G 08 G W 1 2 B - 16 IBEXPEAK - M 5/9 NV_ R B # AY 9 BD 1 AP1 5 BD 8 * 0 . 1u _ 1 6 V _Y 5 V _ 04 5 C6 3 9 / N V _I O 0 / N V _I O 1 / N V _I O 2 / N V _I O 3 / N V _I O 4 / N V _I O 5 / N V _I O 6 / N V _I O 7 / N V _I O 8 / N V _I O 9 N V _ I O1 0 N V _ I O1 1 N V _ I O1 2 N V _ I O1 3 N V _ I O1 4 N V _ I O1 5 N V _ R C OM P I b e x P ea k - M _R e v 0 _9 3. 3 V S NV _ DQ 0 NV _ DQ 1 NV _ DQ 2 NV _ DQ 3 NV _ DQ 4 NV _ DQ 5 NV _ DQ 6 NV _ DQ 7 NV _ DQ 8 NV _ DQ 9 V _D Q1 0 / V _D Q1 1 / V _D Q1 2 / V _D Q1 3 / V _D Q1 4 / V _D Q1 5 / N V_ AL E NV_ C L E PCI PC I_ GN T# 1 0 0 1 1 3 B.Schematic Diagrams P CI _G NT #0 AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD USB H4 0 N3 4 C4 4 A3 8 C3 6 J34 A4 0 D4 5 E3 6 H4 8 E4 0 C4 0 M4 8 M4 5 F53 M4 0 M4 3 J36 K4 8 F40 C4 2 K4 6 M5 1 J52 K5 1 L34 F42 J40 G4 6 F44 M4 7 H3 6 Boot BIOS Strap 1 0 K _ 04 1 0 K _ 04 1 0 K _ 04 1 0 K _ 04 6, 1 7 , 3 6 1 . 8V S 3 , 9, 1 0 , 1 1 , 12 , 1 3 , 1 6, 17 , 1 8 , 2 0, 2 1 , 2 2 , 23 , 2 4 , 2 5, 26 , 2 7 , 2 8, 2 9 , 3 0 , 31 , 3 2 , 3 3, 3 4 , 3 9 3 . 3V S 2 , 3 , 1 1, 1 2 , 1 3 , 16 , 1 8 , 2 1, 24 , 2 6 , 2 7, 2 8 , 2 9 , 34 , 3 6 , 3 7, 3 8 , 4 1 3 . 3V 1 7 V _ N V R A M _V C C Q Schematic Diagrams IBEXPEAK - M 6/9 IBEXPEAK - M (GPIO,VSS_NCTF,RSVD) 1 0K_ 04 BMBUSY# U12F BMBUSY# 25 1 0K_ 04 A D2 9 SD_CD# 25 R44 0 3.3VS C38 C CR_WAKE# *SCS751 V-40 SCI# D37 HOST_ALERT#2 F10 CLKOUT_PCIE6N CLKOUT_PCI E6P J32 AH45 AH46 TACH1 / GPIO1 TACH2 / GPIO6 SCI# BIOS_REC BMBUSY# / G PIO 0 TACH3 / GPIO7 CLKOUT_PCIE7N CLKOUT_PCI E7P AF48 AF47 R12 8 10K_04 3.3VS G PIO 8 HOST_ALERT#1 T7 *0_0 4 AA2 SB_BLON F38 SB_BLON SATA4GP/ GPI O16 TACH0 / GPIO17 R422 3.3VS DGPU_PWRO K AB12 SB_ISOLATEB# V13 ST P_PCI# M 11 100K_04 29 SB_ISO LATEB# 10K_04 D03A change R437 net n ame SV_ SET_UP MXM _PRESNT# AB13 24,25 MXM _PRESNT# MFG_M ODE V3 CRB_SV_DET P3 DO3C 1 0K_ 04 DRAM RST_CNTRL_PCH 1 K_0 4 HO ST _ALERT#1 R46 6 1 0K_ 04 HO ST _ALERT#2 R14 3 1 0K_ 04 SB_ I SOLATEB# DO3C 33 SB_MUTE# DRAMRST_CNTRL_PCH SV_SET_UP R46 9 1 0K_ 04 R46 7 *10K_04 R46 8 1 0K_ 04 D03A c hange net na me PCH_ GPI O 57 D 02 BOM ADD R 468 3.3VS R12 0 1 0K_ 04 SAT A5G P R45 5 1 0K_ 04 SCI# R18 1 1 0K_ 04 SMI# R12 2 1 0K_ 04 MFG_ MODE R45 7 1 0K_ 04 STP_PCI# R43 6 1 0K_ 04 DG PU_PWR_EN# R18 4 1 0K_ 04 CR_WAKE# R11 4 1 0K_ 04 DG PU_HO LD_RST# R429 *10K_04 R424 *10K_04 D02 BOM DEL R429 DGPU_ PWROK T 1 SATA5GP PCH_G PIO 57 F1 AA4 F8 G PIO 28 PROCPWRGD THRM TRIP# 0 _04 D03 ADD R545 R1 29 10K_04 H_PECI 3,25 3.3VS BE10 BD10 H_CPUPWRG D 3 R90 5 4.9_1%_04 R86 5 6_04 1 .1 VS_VTT H_THRM TRIP# 3 STP_PCI# / GPIO34 C68 9 SATA2GP/ GPI O36 TP1 SATA3GP/ GPI O37 TP2 SLOAD / G PIO 38 TP3 SDATAOUT0 / GPI O39 TP4 BA22 0.1u_10V_X7R_04 Routing guidelines available in 0.1u_10V_X7R_04 Calpella Design Guide. NOTE: CRB uses a 54.9 O ? % AW22 series resistor and 56-O pull-up. BB22 AY45 C688 Connected to PCH (THRMTRIP#) D03 ADD C688, C689 AY46 PCIECLKRQ6# / GPIO45 TP5 PCIECLKRQ7# / GPIO46 TP6 SDATAOUT1 / GPI O48 TP7 SATA5GP/ GPI O49 TP8 AV43 AV45 G PIO 57 TP9 TP10 A4 A49 A5 A50 A52 A53 B2 B4 B52 B53 BE1 BE53 BF1 BF53 BH1 BH2 BH52 BH53 BJ1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 BJ53 D1 D2 D53 E1 E53 Sheet 16 of 57 IBEXPEAK - M 6/9 BCLK_CPU_P 3 R545 KBC_RST# 25 G PIO 27 AB6 LAN_PHY_PWR_ CTRL D02 BOM DEL R467 AM 1 PECI RCIN# H3 3 DRAMRST_CNTRL_PCH 25 BCLK_CPU_N 3 SATACLKREQ# / GPIO35 AB7 3.3V R44 1 CLKOUT_BCLK0_P/ CLKOUT_PCI E8P V6 10K_04 DGPU_PWR_EN# R56 5 M EM _LED / GPIO24 GPIO R134 H10 SRS_EN G A2 0 AM 3 BG 10 SCL OCK/ GPIO22 CRB/SV DETECT NO STUFF [DETECT] CLKOUT _BCLK0_N / CLKOUT_PCIE8N Y7 BIO S_ REC 32 U2 G PIO 15 CPU CRB_ SV_DET A20GATE VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 TP11 RSVD *10K_04 DGPU_HOLD_RST# LAN_PHY_PWR_CTRL / G PI O 12 NCTF 24 DGPU_HOLD_RST# 21 R14 4 K9 R434 BIOS RECOVERY DISABLE----NO STUFF (DEFAULT) ENABLE-----STUFF 3.3VS LAN_PHY_ PWR_CTRL AF13 M 18 N18 AJ24 AK41 TP12 TP13 TP14 TP15 TP16 AK42 M 32 N32 M 30 N30 TP17 TP18 TP19 NC_1 NC_2 H12 AA23 AB45 AB38 AB42 NC_3 NC_4 AB41 T 39 NC_5 I NIT3_3V# P6 C10 TP24 IbexPeak-M _Rev0_9 R42 3 1 0K_ 04 R43 1 *10K_04 MXM _PRESNT# LOW: DGPU PRESENT 3,5,6,17,18, 38 1.1VS_VTT 2,3,11,12,13,15,18,21,24 , 26 ,2 7,28,29,34,36,37,38,41 3.3V 3,9,10 , 11 ,1 2,13,15,17,18,20,21,22,23,24,25,26 , 27 ,2 8,29,30,31,32,33,34,39 3.3VS IBEXPEAK - M 6/9 B - 17 B.Schematic Diagrams 12 Y3 SM I# SMI# MISC R11 8 3.3VS Schematic Diagrams IBEXPEAK - M 7/9 IBEXPEAK - M (POWER) VCCA_DAC_1.2 C596 1u_6.3V_Y5V_04 1. 1VS Sheet 17 of 57 IBEXPEAK - M 7/9 1.1VS_ VCCAPLL_EXP L 15 *BKP1005HS1 21_04 AK2 4 4 0mA . BJ2 4 VCCCORE[ 1] VCCCORE[ 2] VCCCORE[ 3] VCCCORE[ 4] VCCCORE[ 5] VCCCORE[ 6] VCCCORE[ 7] VCCCORE[ 8] VCCCORE[ 9] VCCCORE[ 10] VCCCORE[ 11] VCCCORE[ 12] VCCCORE[ 13] VCCCORE[ 14] VCCCORE[ 15] VCCADAC[1 ] VCCADAC[2 ] VCCIO[2 4] C599 C604 C606 C6 13 10u_6. 3V_X5 R_ 06 1u_6.3V_Y5V_ 04 1u_6 .3V_ Y5 V_04 1u_6.3 V_Y5V_04 1 u_6.3V_Y5V_0 4 1. 1VS_1.5VS_1. 8VS 3. 3VS 1.1VS AN3 0 AN3 1 AN3 5 1.1VS_VCCAPLL_FDI AT2 2 L14 *HCB16 08KF-121T25 _06 37mA . BJ1 8 AM2 3 C1 30 AE52 R113 C166 C167 C165 *0_04 0. 01u_16V_X7R_04 0.1u _16V_Y5V_04 2.2u_6. 3V_X5R_ 04 AF51 HVCMO S AH38 AH39 VCCTX_LVDS[1 ] VCCTX_LVDS[2 ] VCCTX_LVDS[3 ] VCCTX_LVDS[4 ] AP43 AP45 AT4 6 AT4 5 VCC3_3[2 ] AB34 1 mA R419 1. 8VS_VCCTX_ LVD 1. 8VS 0_04 L47 *HCB1608KF-1 21T25 59 mA . R406 VCC3_3[3 ] VCC3_3[4 ] 0_04 AB35 AD35 3.3 VS C615 1.1VS_1. 5VS_1.8VS VCCVRM[2 ] VCCIO[5 4] VCCIO[5 5] VCC3_3[ 1] VCCVRM[ 1] VCCFDI PLL VCCIO[1 ] 1 0u_6.3V_X5R_06 VCCDMI[1 ] VCCDMI[2 ] AT2 4 AT1 6 19 6mA 1.1VS_ VCC_DMI 1.1VS_VTT 61 mA AU16 C603 VCCME3_3[1 ] VCCME3_3[2 ] VCCME3_3[3 ] VCCME3_3[4 ] AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15 1.1VS 1.8VS AM8 AM9 AP11 AP9 0. 1u_16V_Y5V_04 3.3VS 85mA 1 .1VS_1.5VS_ 1.8VS R382 R384 R383 B - 18 IBEXPEAK - M 7/9 0.1u_1 6V_Y5V_04 0_08 1. 5VS *0_08 0_0 8 *0_08 0_08 R87 *0_08 V_NVRAM_VCCQ 156m A C612 1.1VS_FDI_VCCIO R82 R88 1.1VS 1 u_6.3V_Y5V_04 VCCPNAND[1 ] VCCPNAND[2 ] VCCPNAND[3 ] VCCPNAND[4 ] VCCPNAND[5 ] VCCPNAND[6 ] VCCPNAND[7 ] VCCPNAND[8 ] VCCPNAND[9 ] C621 IbexPeak-M_Rev 0_9 1 .1VS 3.3VS . 0. 1u_16V_Y5V_04 DMI 1.1VS_ VCC_EXP 3.062 A C623 VCCIO[2 5] VCCIO[2 6] VCCIO[2 7] VCCIO[2 8] VCCIO[2 9] VCCIO[3 0] VCCIO[3 1] VCCIO[3 2] VCCIO[3 3] VCCIO[3 4] VCCIO[3 5] VCCIO[3 6] VCCIO[3 7] VCCIO[3 8] VCCIO[3 9] VCCIO[4 0] VCCIO[4 1] VCCIO[4 2] VCCIO[4 3] VCCIO[4 4] VCCIO[4 5] VCCIO[4 6] VCCIO[4 7] VCCIO[4 8] VCCIO[4 9] VCCIO[5 0] VCCIO[5 1] VCCIO[5 2] VCCIO[5 3] . AF53 VSSA_LVDS VCCAPLLEXP PCI E* 1.1 VS AN2 0 AN2 2 AN2 3 AN2 4 AN2 6 AN2 8 BJ2 6 BJ2 8 AT2 6 AT2 8 AU2 6 AU2 8 AV2 6 AV2 8 AW2 6 AW2 8 BA2 6 BA2 8 BB2 6 BB2 8 BC2 6 BC2 8 BD2 6 BD2 8 BE2 6 BE2 8 BG2 6 BG2 8 BH2 7 VSSA_DAC[2 ] 3.3 VS L17 HCB1608 KF-121T25 69m A AE50 3.3VS_VCCA_LVD L4 9 *HCB1 608KF-121T2 5_06 C1 37 *10u_ 6.3V_ 06 VSSA_DAC[1 ] VCCALVDS FD I NAND / SPI B.Schematic Diagrams 2.2u_6.3 V_X5R_04 POWER CRT C6 18 U12G AB2 4 AB2 6 AB2 8 AD2 6 AD2 8 AF2 6 AF2 8 AF3 0 AF3 1 AH2 6 AH2 8 AH3 0 AH3 1 AJ3 0 AJ3 1 LVDS 1. 432A VCC CORE 1.1VS 18 1.1VS_ 1.5VS_1.8 VS 6,11,1 2,13,18, 20,36, 38,39 1.1VS 6, 15,36 1.8VS 26, 27,34 1.5VS 6,1 1,12,13 ,18,20, 36,38, 39 1. 1VS_VCC_EXP 3,9,1 0,11,12 ,13,15, 16,18, 20,21,22 ,23,24, 25,26, 27,28,2 9,30,31, 32,33, 34,39 3.3VS 3,5,6, 16,18, 38 1. 1VS_VTT 15 V_NVRAM_ VCCQ 1.8 VS R391 0_08 R392 *0_08 3.3VS Schematic Diagrams IBEXPEAK - M 8/9 IBEXPEAK - M (POWER) M L4 * H C B 10 0 5 K F -1 21 T 2 0 1 .1 V S _ V CC A _ CL K U 1 2J 52mA 1 .1 V S AP5 1 AP5 3 C1 4 9 C1 4 8 *1 0 u_ 6 . 3 V _ 06 *. 1 u _ 10 V _ 0 4 AF2 3 AF2 4 V C C L A N [ 1] V C C L A N [ 2] C6 0 0 A D4 1 C6 1 9 AF4 3 1 u_ 6 . 3 V _ Y 5 V _ 04 AF4 1 AF4 2 1.849A 1 .1 V S V3 9 C 65 0 C6 5 2 2 2 U _ 6 . 3V _ X 5 R _ 0 8 22 U _6 . 3 V _ X 5R _ 08 C6 1 4 V4 1 1 u_ 6 . 3 V _ Y 5 V _ 04 V4 2 V C CM E [ 1 ] V C CM E [ 2 ] V C CM E [ 3 ] V C CM E [ 4 ] V C CM E [ 5 ] V C CM E [ 6 ] V C CM E [ 7 ] V C CM E [ 8 ] V C CM E [ 9 ] Y3 9 V C C M E [ 1 0] V C C R T C E XT Y4 1 V C C M E [ 1 1] Y4 2 C6 2 5 1. 1 V S V C C M E [ 1 2] ML 3 H C B 1 00 5 K F -1 2 1T 2 0 0 . 1u _ 1 0V _ X 7 R _ 0 4 68mA V9 D C P R TC 1 . 1 V S _ 1. 5 V S _ 1 . 8 V S C1 3 2 C1 2 4 C5 9 7 2 2U _ 6. 3 V _ X 5 R _ 0 8 22 U _6 . 3 V _ X5 R _0 8 1u _ 6 . 3V _Y 5 V _0 4 R 98 1 . 1 V S _ V C C A _A _D P L A U2 4 * 0_ 0 4 ML 2 H C B 1 00 5 K F -1 2 1T 2 0 69mA 1 . 1 V S _ V C C A _B _D P L BB5 1 BB5 3 USB A D3 9 0 . 1 u _1 6 V _ Y 5 V _ 0 4 D CP S U S B Y P V C C V R M[ 3 ] V C C A D P L LA [ 1] V C C A D P L LA [ 2] Clock and Miscellaneous Y2 0 A D3 8 C 62 6 C1 4 0 C1 2 7 C1 3 8 2 2U _ 6. 3 V _ X 5 R _ 0 8 22 U _6 . 3 V _ X5 R _0 8 B D5 1 B D5 3 1u _ 6 . 3V _Y 5 V _0 4 A H2 3 A J3 5 A H3 5 1 . 1V S AF3 4 C6 1 1 C 61 7 1u _ 6 . 3V _Y 5 V _0 4 1 u _6 . 3 V _ Y 5 V _ 0 4 A H3 4 C6 2 2 1 u_ 6 . 3 V _ Y 5 V _ 04 AF3 2 V1 2 C 62 0 0 . 1u _ 1 6V _ 0 4 C 62 4 0 . 1u _ 1 6V _ 0 4 V C C A D P L LB [ 1] V C C A D P L LB [ 2] V C C I O [ 2 1] V C C I O [ 2 2] V C C I O [ 2 3] V C C S U S 3 _3 [ 1 ] V C C S U S 3 _3 [ 2 ] V C C S U S 3 _3 [ 3 ] V C C S U S 3 _3 [ 4 ] V C C S U S 3 _3 [ 5 ] V C C S U S 3 _3 [ 6 ] V C C S U S 3 _3 [ 7 ] V C C S U S 3 _3 [ 8 ] V C C S U S 3 _3 [ 9 ] V C C S U S 3 _ 3[ 1 0 ] V C C S U S 3 _ 3[ 1 1 ] V C C S U S 3 _ 3[ 1 2 ] V C C S U S 3 _ 3[ 1 3 ] V C C S U S 3 _ 3[ 1 4 ] V C C S U S 3 _ 3[ 1 5 ] V C C S U S 3 _ 3[ 1 6 ] V C C S U S 3 _ 3[ 1 7 ] V C C S U S 3 _ 3[ 1 8 ] V C C S U S 3 _ 3[ 1 9 ] V C C S U S 3 _ 3[ 2 0 ] V C C S U S 3 _ 3[ 2 1 ] V C C S U S 3 _ 3[ 2 2 ] V C C S U S 3 _ 3[ 2 3 ] V C C S U S 3 _ 3[ 2 4 ] V C C S U S 3 _ 3[ 2 5 ] V C C S U S 3 _ 3[ 2 6 ] V C C S U S 3 _ 3[ 2 7 ] V2 4 V2 6 Y 24 Y 26 C6 1 6 1 u_ 6 . 3 V _ Y 5 V _ 04 V2 8 U 28 U 26 U 24 P2 8 P2 6 N 28 N 26 M 28 M 26 L28 L26 J28 J26 H 28 H 26 G 28 G 26 F28 F26 E2 8 E2 6 C 28 C 26 B2 7 A2 8 A2 6 3 .3 V 163mA C 6 38 0 . 1 u _1 6 V _ Y 5 V _ 0 4 R 4 44 * 2 0m i l _s h o rt C6 2 7 0 . 1u _ 1 6V _Y 5 V _0 4 1 .1 VS 5 V _ P C H _ V C C 5R E F S U S D2 8 C U 23 S C S 5 5 1V -30 A 3 .3 V V2 3 V C C I O[ 5 6 ] V 5 R E F _S U S F24 R 4 6 2 1 0 _ 06 300mA V C C 3 _3 [ 8 ] V C C 3 _3 [ 9 ] V C C 3 _ 3[ 1 0 ] V C C 3 _ 3[ 1 1 ] V C C 3 _ 3[ 1 2 ] V C C 3 _ 3[ 1 3 ] K4 9 D04 change to 0603 5V C6 3 7 D2 7 C 1 u_ 1 6 V _ X5 R _ 0 6 V C C5 RE F V 5R E F Sheet 18 of 57 IBEXPEAK - M 8/9 3 .3 V _ V CC P US B V C C S U S 3 _ 3[ 2 8 ] PCI/GPIO/LPC T P _ P C H _V C C D S W 1u _ 6 . 3V _Y 5 V _0 4 1 .1 V S V C C I O[ 5 ] V C C I O[ 6 ] V C C I O[ 7 ] V C C I O[ 8 ] V C C A C L K [ 2] S C S 5 51 V -3 0 A 3 .3 VS 1mA R 4 5 4 1 0 _0 6 J38 5 VS C 6 32 357mA 3 . 3V S L38 C6 2 8 M 36 0 . 1u _ 1 6V _Y 5 V _0 4 1u _ 1 6V _ X 5 R _ 0 6 D04 change to 0603 N 36 P3 6 3 . 3V S U 35 C6 2 9 0 . 1u _ 1 6V _Y 5 V _0 4 V C CI O [2 ] A D 13 V C C 3 _ 3[ 1 4 ] V C CI O [3 ] 1 .1 VS_ VCC A PL L V C CI O [4 ] V C C S A TA P LL [ 1 ] V C C S A TA P LL [ 2 ] D CP S S T L 48 *H C B 1 0 0 5K F -12 1 T 20 31mA AK3 AK1 1 .1 VS C 6 08 C6 0 9 * 1u _ 6 . 3 V _0 4 *1 0 u _6 . 3 V _ 06 VCC S ST 1 . 1 V _I N T _V C C S U S Y2 2 D CP S U S V C C I O[ 9 ] U1 9 0 . 1u _ 1 6V _Y 5V _0 4 U2 0 U2 2 V1 5 C6 0 1 V1 6 0 . 1u _ 1 6V _Y 5V _0 4 Y1 6 V C C S U S 3 _3 [ 3 0 ] V C C S U S 3 _3 [ 3 1 ] V C C S U S 3 _3 [ 3 2 ] V C C 3 _ 3[ 5] V C C 3 _ 3[ 6] V C C 3 _ 3[ 7] C6 0 5 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1u _ 1 6V _Y 5V _0 4 A U1 8 2mA R T CV C C C6 4 0 C6 4 2 0. 1u _ 1 6V _ Y 5V _ 0 4 0 . 1u _ 1 6V _Y 5V _0 4 V _ C P U _ I O[ 2 ] V C C I O[ 1 1 ] V C C I O[ 1 3 ] V C C I O[ 1 4 ] V C C I O[ 1 5 ] V C C I O[ 1 6 ] V C C I O[ 1 7 ] V C C I O[ 1 8 ] V C C I O[ 1 9 ] V C C I O[ 2 0 ] CPU C 12 5 4. 7 u _ 6. 3V _ Y 5V _ 0 6 V C C I O[ 1 0 ] V C C I O[ 1 2 ] A T1 8 V _ C P U _ I O[ 1 ] C1 2 2 V C C ME [ 1 3 ] V C C ME [ 1 4 ] V C C ME [ 1 5 ] V C C ME [ 1 6 ] A H 22 AT2 0 1 . 1 V S _ 1 . 5V S _1 . 8 V S A H 19 A D 20 1 .1 V S AF2 2 A D 19 AF2 0 AF1 9 A H 20 C5 9 4 1 u_ 6 . 3 V _ Y 5 V _ 04 AB1 9 AB2 0 AB2 2 A D 22 AA3 4 Y 34 Y 35 AA3 5 P C H _ V C C _ 1 _1 _ 2 0 P C H _ V C C _ 1 _1 _ 2 1 P C H _ V C C _ 1 _1 _ 2 2 P C H _ V C C _ 1 _1 _ 2 3 3 . 3 V _1 . 5 V _ V C C P A Z S U S A1 2 V C C R TC I be x P e ak - M _R e v 0_ 9 RTC 1mA 1 .1 V S_ VT T V C C V R M[ 4 ] HDA 3 .3 VS V C C S U S 3 _3 [ 2 9 ] SATA C6 3 5 PCI/GPIO/LPC P1 8 3 .3 V V C CS U S HD A L30 C6 4 4 R4 3 8 6mA *2 0 m li _ s ho rt 11 RT CV CC 17 1 . 1 V S _ 1 . 5V S _1 . 8 V S 3 , 5 , 6, 16 , 1 7 , 38 1 . 1 V S _ V T T 12 , 2 6 , 2 8, 3 0 , 3 4, 3 6 , 3 7 , 38 , 4 1 5 V 2 0, 22 , 2 3 , 24 , 2 5 , 2 8, 3 0 , 3 1, 3 2 , 3 3 , 34 , 3 9 5 V S 3 , 9 , 1 0, 2 8 , 3 4 , 37 , 4 1 1 . 5V 6 , 1 1 , 1 2, 1 3 , 1 7, 2 0 , 3 6 , 38 , 3 9 1 . 1V S 1 .1 V S 2 , 3 , 11 , 1 2 , 1 3, 1 5 , 1 6, 21 , 2 4 , 26 , 2 7 , 2 8, 2 9 , 3 4, 3 6 , 3 7 , 38 , 4 1 3 . 3V 3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 5 , 16 , 1 7 , 20 , 2 1 , 2 2, 2 3 , 2 4, 25 , 2 6 , 27 , 2 8 , 2 9, 3 0 , 3 1, 3 2 , 3 3 , 34 , 3 9 3 . 3V S R 4 94 0 _0 4 R 4 91 *0 _ 0 4 3 .3 V 1 .5 V 1 u_ 6 . 3 V _Y 5 V _ 04 IBEXPEAK - M 8/9 B - 19 B.Schematic Diagrams 320mA 1 .1 V S PO WE R V C C A C L K [ 1] Schematic Diagrams IBEXPEAK - M 9/9 IBEXPEAK - M (GND) U 12 H B.Schematic Diagrams AB 1 6 Sheet 19 of 57 IBEXPEAK - M 9/9 AA 1 9 AA 2 0 AA 2 2 A M1 9 AA 2 4 AA 2 6 AA 2 8 AA 3 0 AA 3 1 AA 3 2 AB 1 1 AB 1 5 AB 2 3 AB 3 0 AB 3 1 AB 3 2 AB 3 9 AB 4 3 AB 4 7 AB 5 AB 8 A C2 A C52 A D11 A D12 A D16 A D23 A D30 A D31 A D32 A D34 A U22 A D42 A D46 A D49 A D7 AE 2 AE 4 AF 1 2 Y 13 A H49 A U4 AF 3 5 AP 1 3 A N34 AF 4 5 AF 4 6 AF 4 9 AF 5 AF 8 A G2 A G5 2 A H11 A H15 A H16 A H24 A H32 AV 1 8 A H43 A H47 A H7 A J19 AJ2 A J20 A J22 A J23 A J26 A J28 A J32 A J34 A T5 AJ4 AK 1 2 A M4 1 A N19 AK 2 6 AK 2 2 AK 2 3 AK 2 8 VS S [0 ] VS S [1 ] VS S [2 ] VS S [3 ] VS S [4 ] VS S [5 ] VS S [6 ] VS S [7 ] VS S [8 ] VS S [9 ] VS S [1 0] VS S [1 1] VS S [1 2] VS S [1 3] VS S [1 4] VS S [1 5] VS S [1 6] VS S [1 7] VS S [1 8] VS S [1 9] VS S [2 0] VS S [2 1] VS S [2 2] VS S [2 3] VS S [2 4] VS S [2 5] VS S [2 6] VS S [2 7] VS S [2 8] VS S [2 9] VS S [3 0] VS S [3 1] VS S [3 2] VS S [3 3] VS S [3 4] VS S [3 5] VS S [3 6] VS S [3 7] VS S [3 8] VS S [3 9] VS S [4 0] VS S [4 1] VS S [4 2] VS S [4 3] VS S [4 4] VS S [4 5] VS S [4 6] VS S [4 7] VS S [4 8] VS S [4 9] VS S [5 0] VS S [5 1] VS S [5 2] VS S [5 3] VS S [5 4] VS S [5 5] VS S [5 6] VS S [5 7] VS S [5 8] VS S [5 9] VS S [6 0] VS S [6 1] VS S [6 2] VS S [6 3] VS S [6 4] VS S [6 5] VS S [6 6] VS S [6 7] VS S [6 8] VS S [6 9] VS S [7 0] VS S [7 1] VS S [7 2] VS S [7 3] VS S [7 4] VS S [7 5] VS S [7 6] VS S [7 7] VS S [7 8] VS S [7 9] I b ex Pea k -M_R e v 0_ 9 VS S[ 80 ] VS S[ 81 ] VS S[ 82 ] VS S[ 83 ] VS S[ 84 ] VS S[ 85 ] VS S[ 86 ] VS S[ 87 ] VS S[ 88 ] VS S[ 89 ] VS S[ 90 ] VS S[ 91 ] VS S[ 92 ] VS S[ 93 ] VS S[ 94 ] VS S[ 95 ] VS S[ 96 ] VS S[ 97 ] VS S[ 98 ] VS S[ 99 ] VS S[ 100 ] VS S[ 101 ] VS S[ 102 ] VS S[ 103 ] VS S[ 104 ] VS S[ 105 ] VS S[ 106 ] VS S[ 107 ] VS S[ 108 ] VS S[ 109 ] VS S[ 110 ] VS S[ 111 ] VS S[ 112 ] VS S[ 113 ] VS S[ 114 ] VS S[ 115 ] VS S[ 116 ] VS S[ 117 ] VS S[ 118 ] VS S[ 119 ] VS S[ 120 ] VS S[ 121 ] VS S[ 122 ] VS S[ 123 ] VS S[ 124 ] VS S[ 125 ] VS S[ 126 ] VS S[ 127 ] VS S[ 128 ] VS S[ 129 ] VS S[ 130 ] VS S[ 131 ] VS S[ 132 ] VS S[ 133 ] VS S[ 134 ] VS S[ 135 ] VS S[ 136 ] VS S[ 137 ] VS S[ 138 ] VS S[ 139 ] VS S[ 140 ] VS S[ 141 ] VS S[ 142 ] VS S[ 143 ] VS S[ 144 ] VS S[ 145 ] VS S[ 146 ] VS S[ 147 ] VS S[ 148 ] VS S[ 149 ] VS S[ 150 ] VS S[ 151 ] VS S[ 152 ] VS S[ 153 ] VS S[ 154 ] VS S[ 155 ] VS S[ 156 ] VS S[ 157 ] VS S[ 158 ] AK 3 0 AK 3 1 AK 3 2 AK 3 4 AK 3 5 AK 3 8 AK 4 3 AK 4 6 AK 4 9 AK 5 AK 8 AL2 AL52 AM1 1 BB 4 4 AD 2 4 AM2 0 AM2 2 AM2 4 AM2 6 AM2 8 BA 4 2 AM3 0 AM3 1 AM3 2 AM3 4 AM3 5 AM3 8 AM3 9 AM4 2 AU 2 0 AM4 6 AV 2 2 AM4 9 AM7 AA 5 0 BB 1 0 AN 3 2 AN 5 0 AN 5 2 AP 1 2 AP 4 2 AP 4 6 AP 4 9 AP 5 AP 8 AR 2 AR 5 2 AT11 BA 1 2 AH 4 8 AT32 AT36 AT41 AT47 AT7 AV 1 2 AV 1 6 AV 2 0 AV 2 4 AV 3 0 AV 3 4 AV 3 8 AV 4 2 AV 4 6 AV 4 9 AV 5 AV 8 AW 1 4 AW 1 8 AW 2 BF 9 AW 3 2 AW 3 6 AW 4 0 AW 5 2 AY 1 1 AY 4 3 AY 4 7 U 12 I AY 7 B 11 B 15 B 19 B 23 B 31 B 35 B 39 B 43 B 47 B7 BG 12 B B 12 B B 16 B B 20 B B 24 B B 30 B B 34 B B 38 B B 42 B B 49 BB5 BC 10 BC 14 BC 18 BC 2 BC 22 BC 32 BC 36 BC 40 BC 44 BC 52 BH 9 BD 48 BD 49 BD 5 B E 12 B E 16 B E 20 B E 24 B E 30 B E 34 B E 38 B E 42 B E 46 B E 48 B E 50 BE6 BE8 BF3 B F 49 B F 51 BG 18 BG 24 BG 4 BG 50 BH 11 BH 15 BH 19 BH 23 BH 31 BH 35 BH 39 BH 43 BH 47 BH 7 C 12 C 50 D 51 E 12 E 16 E 20 E 24 E 30 E 34 E 38 E 42 E 46 E 48 E6 E8 F 49 F5 G 10 G 14 G 18 G2 G 22 G 32 G 36 G 40 G 44 G 52 A F 39 H 16 H 20 H 30 H 34 H 38 H 42 VS S[ 15 9] VS S[ 16 0] VS S[ 16 1] VS S[ 16 2] VS S[ 16 3] VS S[ 16 4] VS S[ 16 5] VS S[ 16 6] VS S[ 16 7] VS S[ 16 8] VS S[ 16 9] VS S[ 17 0] VS S[ 17 1] VS S[ 17 2] VS S[ 17 3] VS S[ 17 4] VS S[ 17 5] VS S[ 17 6] VS S[ 17 7] VS S[ 17 8] VS S[ 17 9] VS S[ 18 0] VS S[ 18 1] VS S[ 18 2] VS S[ 18 3] VS S[ 18 4] VS S[ 18 5] VS S[ 18 6] VS S[ 18 7] VS S[ 18 8] VS S[ 18 9] VS S[ 19 0] VS S[ 19 1] VS S[ 19 2] VS S[ 19 3] VS S[ 19 4] VS S[ 19 5] VS S[ 19 6] VS S[ 19 7] VS S[ 19 8] VS S[ 19 9] VS S[ 20 0] VS S[ 20 1] VS S[ 20 2] VS S[ 20 3] VS S[ 20 4] VS S[ 20 5] VS S[ 20 6] VS S[ 20 7] VS S[ 20 8] VS S[ 20 9] VS S[ 21 0] VS S[ 21 1] VS S[ 21 2] VS S[ 21 3] VS S[ 21 4] VS S[ 21 5] VS S[ 21 6] VS S[ 21 7] VS S[ 21 8] VS S[ 21 9] VS S[ 22 0] VS S[ 22 1] VS S[ 22 2] VS S[ 22 3] VS S[ 22 4] VS S[ 22 5] VS S[ 22 6] VS S[ 22 7] VS S[ 22 8] VS S[ 22 9] VS S[ 23 0] VS S[ 23 1] VS S[ 23 2] VS S[ 23 3] VS S[ 23 4] VS S[ 23 5] VS S[ 23 6] VS S[ 23 7] VS S[ 23 8] VS S[ 23 9] VS S[ 24 0] VS S[ 24 1] VS S[ 24 2] VS S[ 24 3] VS S[ 24 4] VS S[ 24 5] VS S[ 24 6] VS S[ 24 7] VS S[ 24 8] VS S[ 24 9] VS S[ 25 0] VS S[ 25 1] VS S[ 25 2] VS S[ 25 3] VS S[ 25 4] VS S[ 25 5] VS S[ 25 6] VS S[ 25 7] VS S[ 25 8] Ib ex P e ak -M _R ev 0_9 B - 20 IBEXPEAK - M 9/9 V SS [ 2 59] V SS [ 2 60] V SS [ 2 61] V SS [ 2 62] V SS [ 2 63] V SS [ 2 64] V SS [ 2 65] V SS [ 2 66] V SS [ 2 67] V SS [ 2 68] V SS [ 2 69] V SS [ 2 70] V SS [ 2 71] V SS [ 2 72] V SS [ 2 73] V SS [ 2 74] V SS [ 2 75] V SS [ 2 76] V SS [ 2 77] V SS [ 2 78] V SS [ 2 79] V SS [ 2 80] V SS [ 2 81] V SS [ 2 82] V SS [ 2 83] V SS [ 2 84] V SS [ 2 85] V SS [ 2 86] V SS [ 2 87] V SS [ 2 88] V SS [ 2 89] V SS [ 2 90] V SS [ 2 91] V SS [ 2 92] V SS [ 2 93] V SS [ 2 94] V SS [ 2 95] V SS [ 2 96] V SS [ 2 97] V SS [ 2 98] V SS [ 2 99] V SS [ 3 00] V SS [ 3 01] V SS [ 3 02] V SS [ 3 03] V SS [ 3 04] V SS [ 3 05] V SS [ 3 06] V SS [ 3 07] V SS [ 3 08] V SS [ 3 09] V SS [ 3 10] V SS [ 3 11] V SS [ 3 12] V SS [ 3 13] V SS [ 3 14] V SS [ 3 15] V SS [ 3 16] V SS [ 3 17] V SS [ 3 18] V SS [ 3 19] V SS [ 3 20] V SS [ 3 21] V SS [ 3 22] V SS [ 3 23] V SS [ 3 24] V SS [ 3 25] V SS [ 3 26] V SS [ 3 27] V SS [ 3 28] V SS [ 3 29] V SS [ 3 30] V SS [ 3 31] V SS [ 3 32] V SS [ 3 33] V SS [ 3 34] V SS [ 3 35] V SS [ 3 36] V SS [ 3 37] V SS [ 3 38] V SS [ 3 39] V SS [ 3 40] V SS [ 3 41] V SS [ 3 42] V SS [ 3 43] V SS [ 3 44] V SS [ 3 45] V SS [ 3 46] V SS [ 3 47] V SS [ 3 48] V SS [ 3 49] V SS [ 3 50] V SS [ 3 51] V SS [ 3 52] V SS [ 3 53] V SS [ 3 54] V SS [ 3 55] V SS [ 3 56] V SS [ 3 66] H 49 H5 J 24 K 11 K 43 K 47 K7 L 14 L 18 L2 L 22 L 32 L 36 L 40 L 52 M 12 M 16 M 20 N 38 M 34 M 38 M 42 M 46 M 49 M5 M8 N 24 P 11 A D 15 P 22 P 30 P 32 P 34 P 42 P 45 P 47 R2 R 52 T12 T41 T46 T49 T5 T8 U 30 U 31 U 32 U 34 P 38 V 11 P 16 V 19 V 20 V 22 V 30 V 31 V 32 V 34 V 35 V 38 V 43 V 45 V 46 V 47 V 49 V5 V7 V8 W2 W 52 Y 11 Y 12 Y 15 Y 19 Y 23 Y 28 Y 30 Y 31 Y 32 Y 38 Y 43 Y 46 P 49 Y 5 Y 6 Y 8 P 24 T43 A D 51 A T8 A D 47 Y 47 A T12 A M6 A T13 A M5 A K45 A K39 A V14 Schematic Diagrams Clock Generator CLKGEN POWER CLOCK GENERATOR CL K_ VCC 1 CL K _ V CC 2 CL K _ V CC1 3 . 3V S U 7 1 5 17 24 29 V D D _ D OT V DD_ 2 7 V DD_ S R C V DD_ C P U V DD_ R E F V D D _ S R C _I / O V D D _ C P U _I / O D O T _9 6 D OT _ 96 # . H C B 1 60 8 K F -1 2 1T 2 5 15 18 2 1 3 4 3 R N1 4 0 _ 4 P 2R _ 04 C L K _ B U F _D OT 9 6_ P 1 2 C L K _ B U F _D OT 9 6_ N 12 C6 0 C 99 C 58 C 59 C 1 01 L1 1 C7 6 0 . 1u _ 1 0V _ X 7 R _ 0 4 0 . 1 u_ 1 0 V _X 7 R _ 0 4 0 . 1 u _1 0 V _X 7 R _ 0 4 0 . 1 u _1 0 V _ X7 R _0 4 0. 1 u _ 10 V _ X 7R _0 4 10 u _ 6. 3 V _ X 5R _ 06 Sheet 20 of 57 Clock Generator 2 V S S _ D OT R 41 3 3 _0 4 27 28 R E F _0 / C P U _ S E L 30 C L K _S D A T A C L K _S C L K 31 32 XT A L _ OU T XT A L _ I N S RC_ 1 /S A T A S R C _ 1# / S A T A # S RC_ 2 S R C _2 # R E F _ 0 / C P U _S E L 6 7 0.1uF near the every power pin 10 11 13 14 2 1 3 R N2 4 0 _ 4 P 2R _ 04 2 1 3 R N3 4 0 _ 4 P 2R _ 04 R 58 33 8 9 12 21 26 SDA SCL 16 C L K _ P C I E _I C H 1 2 C L K _ P C I E _I C H # 1 2 CL K _ S A T A 1 2 CL K _ S A T A # 1 2 2 . 2K _0 4 3 .3 V S C P U_ 1 C P U _1 # C P U_ 0 C P U _0 # C K P W R GD / P D # C L K _C P U 1 C L K _C P U 1 # 20 19 23 22 25 R5 9 *0 _ 04 C P U _S T O P # C P U _ S T OP # VSS V S S _ 27 V S S _ S A TA V S S _ S RC V S S _ CP U V S S _ RE F CL K _ V CC 1 CL K _ V CC2 L10 1 2 4 R N4 3 0 _ 4 P 2R _ 04 C L K _ B U F _B C L K _P C L K _ B U F _B C L K _N 12 12 . C9 2 C 10 0 C 86 0 . 1u _ 1 0V _ X 7 R _ 0 4 0 . 1 u_ 1 0 V _X 7 R _ 0 4 1 0 u_ 6 . 3 V _X 5 R _ 0 6 H C B 1 6 0 8K F -1 2 1 T2 5 1 . 1V S CL K _ P W RG D VDD_I/O can be ranging from 1.05V to 3.3V 3 .3 VS S LG 8 S P 58 5 B.Schematic Diagrams XO U T XI N 1 2 CL K_ BUF _ REF 1 4 2 7M 2 7 M_ S S R 56 39 C LK E N # 0.1uF near the every power pin D 1 0 K _0 4 Q 10 M TN 70 0 2 Z H S 3 C8 7 R 53 *. 1 U _ 1 0V _ X 7 R _ 0 4 1 M_ 0 4 G S SMBus EMI D G 9, 1 0 , 12 S M B _ C L K Q3 MT N 70 0 2Z H S 3 S C LK _S C LK R 33 2 . 2K _ 0 4 R 34 2 . 2K _ 0 4 D 9, 1 0 , 12 S M B _ D A T A X1 XI N 3 .3 VS G 5V S S 2 X8 A 0 1 43 1 A F K 1 H _ 1 4. 3 1 8 18 MH z 1 X OU T C6 1 *1 0 p_ 5 0 V _0 4 R E F _0 / C P U _ S E L C LK _S D A T A C8 3 C 90 3 3p _ 50 V _ N P O _ 04 3 3 p _5 0 V _ N P O_ 0 4 EMI Capactior Q4 MT N 70 0 2Z H S 3 3 , 9, 1 0 , 1 1, 1 2 , 1 3, 1 5 , 1 6, 1 7 , 1 8, 2 1 , 2 2, 2 3 , 2 4, 2 5 , 2 6, 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 9 3 . 3V S 1 8, 2 2 , 2 3, 2 4 , 2 5, 2 8 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 9 5 V S 6 , 1 1, 1 2 , 1 3, 1 7 , 1 8, 3 6 , 3 8, 3 9 1 . 1V S CPU_SEL_During CK_PEWGD Latch Pinl 1. 1 V S R 29 *4 . 7 K _ 04 R 28 1 0K _ 0 4 R E F _ 0/ C P U _ S E L PIN_30 CPU_0 CPU_1 0(default) 133MHz 133MHz 1(0.7V-1.5V) 100MHz 100MHz Clock Generator B - 21 Schematic Diagrams Panel, Inverter LED PANEL L V DS _ D DC_ D A T 2 4 L V D S _ D D C _ C LK 2 4 J _L C D 1 B R I GH T N E S S 2 5 B RIG HT NE S S L E D P L _ GN D N V _ L V D S - U 0N N V _ L V D S - U 0P 24 24 S Y S 15 V R 2 R5 1 M_ 0 4 1 M_ 0 4 2 NV _ L V DS -L 2 N 2 4 NV _ L V DS -L 2 P 2 4 B 2 4 V GA _ E N A V D D Z 14 0 4 3 Q2 C6 D D D D G 6 0 . 1 u_ 1 6V _Y 5V _ 0 4 R3 4 S S I 34 5 6 B D V -T 1 -E 3 G *N C _ 04 R 35 2 C 50 0 33 0 _0 4 * 20 0 _ 04 C5 0 3 0. 1 u _ 16 V _ Y 5 V _ 0 4 R3 5 0 1 0u _ 10 V _ Y 5 V _ 0 8 *1 0 0 K _0 4 * . 22 U _ 1 6 V _0 4 Z1405 LE D P L _V I N Q2 8 G S 8 72 1 6 -40 0 6 N C6 R 3 48 C 5 M T N 7 00 2 Z H S 3 10 0 K _ 04 80 mil PL VD D 5 Q1 DT C1 1 4 E UA P LV D D I N V _ B L ON U1 1 Z 14 0 3 3. 3 V S 2A 3 .3 VS S Y S 15 V D N V _L V D S -L2 N N V _L V D S -L2 P 24 24 D N V _ LV D S -L 0 N N V _ LV D S -L 0 P 24 N V _L V D S -L 0N 24 N V _L V D S -L 0P N V _L V D S -U 0 N N V _L V D S -U 0 P N V _ L V D S - U 2N N V _ L V D S - U 2P S N V _ LV D S -L 1 N N V _ LV D S -L 1 P 24 N V _L V D S -L 1N 24 N V _L V D S -L 1P N V _L V D S -U 2 N N V _L V D S -U 2 P C 6-20-41A10-220 MT N 7 0 02 Z H S 3 D02 L45 change to NC P LV D D D02 DEL C502 3 .3 VS C 50 1 C4 9 8 0 . 1 u_ 5 0 V _Y 5 V _0 6 0 . 1u _ 16 V _ Y 5 V _ 0 4 INVERTER CONNECTOR 3. 3 V 3 .3 V N V _ L V D S -L 2 P N V _ L V D S -L 2 N N V _L V D S -L C L K N N V _L V D S -L C L K P C P2 * 10 P _ 1 2_ 8 P 4 C 5 6 7 8 4 3 2 1 N V _L V D S -U C LK N N V _L V D S -U C LK P N V _ L V D S -U 1N N V _ L V D S -U 1P C P1 * 10 P _ 1 2_ 8 P 4 C 5 6 7 8 4 3 2 1 . C5 3 4 C6 5 C 3 B K L_ E N 3. 3 V C1 1 8 3 Z 1 4 2 02 2 4 V GA _ B K L T E N U8 B 7 4L V C 08 P W *. 1 U _ 1 6 V _0 4 Z 1 4 0 64 C1 0 . 1 u_ 5 0 V _Y 5 V _0 6 U8 A 7 4L V C 08 P W 6 5 0 . 1u _ 50 V _ Y 5 V _ 0 6 7 1 0 u _2 5 V _ Y 5 V _ 12 1 0 u_ 2 5V _Y 5V _ 1 2 25 1 14 4 3 2 1 VIN L 1 LE D P L _ V I N H C B 1 6 08 K F -1 2 1T 2 5 * 10 0 K _ 04 N V _ L V D S -U 0P N V _ L V D S -U 0N N V _ L V D S -U 2P N V _ L V D S -U 2N 16 R7 5 1 00 K _ 0 4 R6 7 *1 0 0K _ 0 4 Z1407 2 5, 2 8 L ID_ S W # Z 1 40 9 D02 R 6 4 I N V _ B L ON 0_04 Z1408 10 U8 D 7 4L V C 08 P W C6 6 R 66 0 . 1u _ 1 6V _ Y 5V _ 0 4 12 11 * 1M _0 4 13 7 1 3, 24 , 2 5 A LL _ S Y S _ P W R GD 9 8 3. 3 V S B _B L O N U 8C 7 4 L VC0 8 P W 7 5 6 7 8 R 78 14 4 3 2 1 14 C P3 * 10 P _ 1 2_ 8 P 4 C 5 6 7 8 14 C P4 * 10 P _ 1 2_ 8 P 4 C N V _ L V D S -L 1 N N V _ L V D S -L 1 P N V _ L V D S -L 0 N N V _ L V D S -L 0 P 7 B.Schematic Diagrams N V _ LV D S -L C L K N N V _ LV D S -L C L K P 2 4 N V _ L V D S -L C LK N 2 4 N V _ L V D S -L C LK P 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 E N V _ LV D S -U 1 N N V _ LV D S -U 1 P 24 N V _L V D S -U 1 N 24 N V _L V D S -U 1 P Sheet 21 of 57 Panel, Inverter 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 N V _ LV D S -U C L K N N V _ LV D S -U C L K P 2 4 N V _ L V D S -U C L K N 2 4 N V _ L V D S -U C L K P V IN C 57 7 C8 0 C1 4 1 C2 0 5 0 . 0 1 u_ 5 0V _X 7 R _ 0 4 0 . 0 1 u_ 5 0 V _X 7 R _ 0 4 C 53 0. 0 1 u _5 0 V _ X7 R _ 0 4 0 . 01 u _5 0 V _ X7 R _0 4 0 . 01 u _ 50 V _ X 7R _ 04 C 65 5 C6 5 9 C5 8 0 C5 2 0 0 . 0 1 u_ 5 0V _X 7 R _ 0 4 0 . 0 1 u_ 5 0 V _X 7 R _ 0 4 0. 0 1 u _5 0 V _ X7 R _ 0 4 0 . 01 u _5 0 V _ X7 R _0 4 0 . 01 u _ 50 V _ X 7R _ 04 C 20 2 C5 5 C1 1 2 C2 0 1 0. 0 1 u _5 0 V _ X7 R _ 0 4 0 . 01 u _5 0 V _ X7 R _0 4 0 . 01 u _ 50 V _ X 7R _ 04 C 5 81 C 48 0 . 0 1 u_ 5 0V _X 7 R _ 0 4 0 . 0 1 u_ 5 0 V _X 7 R _ 0 4 S Y S 1 5V 3 .3 VS 5V 3 .3 V VIN B - 22 Panel, Inverter 3 4, 3 5 3 , 9, 1 0 , 1 1, 1 2 , 1 3, 1 5 , 1 6, 1 7 , 1 8, 2 0 , 2 2, 2 3 , 2 4, 2 5 , 2 6, 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 9 1 2, 1 8 , 2 6, 2 8 , 3 0, 3 4 , 3 6, 3 7 , 3 8, 4 1 2 , 3, 1 1 , 1 2, 1 3 , 1 5, 1 6 , 1 8, 2 4 , 2 6, 2 7 , 2 8, 2 9 , 3 4, 3 6 , 3 7, 3 8 , 4 1 2 4, 3 4 , 3 5, 3 6 , 3 7, 3 8 , 3 9, 4 0 Schematic Diagrams DVI 3 .3 VS 5 VS A C L1 6 L1 8 L1 9 FR ED B K 1 0 0 5H S 1 21 B K 1 0 0 5H S 1 21 F G RN B K 1 0 0 5H S 1 21 F B LU E C 15 6 C1 6 3 C1 7 0 C 17 3 S 1 C 1 06 C 1 02 C9 5 5p _ 5 0V _N P O_ 0 4 C7 3 5p _ 5 0V _N P O_ 0 4 E X _ D V I _D A T A 1# _ R E X _ D V I _D A T A 1_ R C6 8 5p _ 5 0V _N P O_ 0 4 C1 0 7 5p _ 5 0V _N P O_ 0 4 E X _ D V I _D A T A 3# _ R E X _ D V I _D A T A 3_ R C1 0 3 5p _ 5 0V _N P O_ 0 4 C6 3 5p _ 5 0V _N P O_ 0 4 E X _ D V I _D A T A 0# _ R E X _ D V I _D A T A 0_ R C5 7 5p _ 5 0V _N P O_ 0 4 C8 9 5p _ 5 0V _N P O_ 0 4 E X _ D V I _D A T A 5# _ R E X _ D V I _D A T A 5_ R 0 . 1 u _1 0 V _ X7 R _0 4 0 . 1 u _1 0 V _ X7 R _0 4 HS Y NC_ R 4 3 2 1 D DC DA T A 5 6 7 8 V S Y N C_ R C 1 52 22 0 p_ 5 0 V _ N P O _0 4 DD CL K C 1 47 H SYN C C 1 42 22 0 p_ 5 0 V _ N P O _0 4 V S Y NC C 1 29 22 0 p_ 5 0 V _ N P O _0 4 Sheet 22 of 57 DVI 22 0 p_ 5 0 V _ N P O _0 4 MT N 70 0 2 Z H S 3 D 5 BAV9 9 5V S AC F C A 3 2 1 6K F 4-1 2 1 T0 3 D7 B A V 99 5 VS D 9 *B A V 99 AC MT N 70 0 2 Z H S 3 AC D Q1 2 D Q 13 C 5 VS S A E X _ D A C _ V S Y N SC 4. 7 K _ 0 4 L P8 D D C _C L K C 5p _ 5 0V _N P O_ 0 4 E X _ D V I _D A T A 4# _ R E X _ D V I _D A T A 4_ R 0 . 1 u _1 0 V _ X7 R _0 4 0 . 1 u _1 0 V _ X7 R _0 4 3 2 *W C M3 2 1 6F 2S -1 6 1 T0 3 C9 8 R9 4 4. 7K _ 0 4 5 VS D1 1 * BAV9 9 5 VS 5 VS A 1 C 72 C 67 E X _ DA C _ HS Y NC 0 . 1 u _1 0 V _ X7 R _0 4 0 . 1 u _1 0 V _ X7 R _0 4 3 2 *W C M3 2 1 6F 2S -1 6 1 T0 3 4 L P6 2 4 E X _D V I _ D A T A 3 # 2 4 E X _D V I _ D A T A 3 C 97 C 94 D D C _D A T A 5p _ 5 0V _N P O_ 0 4 R8 9 4. 7 K _ 0 4 A 4 L P2 2 4 E X _D V I _ D A T A 1 # 2 4 E X _D V I _ D A T A 1 3 2 *W C M3 2 1 6F 2S -1 6 1 T0 3 5p _ 5 0V _N P O_ 0 4 E X _ D V I _D A T A 2# _ R E X _ D V I _D A T A 2_ R C7 5 G 1 C7 9 0 . 1 u _1 0 V _ X7 R _0 4 0 . 1 u _1 0 V _ X7 R _0 4 G 4 L P5 2 4 E X _D V I _ D A T A 4 # 2 4 E X _D V I _ D A T A 4 C 78 C 74 R1 0 7 4 .7 K _ 0 4 Close to DVI PORT 3 C S C S 7 5 1 V -40 C R 1 04 2 *W C M3 2 1 6F 2S -1 6 1 T0 3 DDC _ DA T A D6 S C S 7 51 V -4 0 1 Q 15 D M TN 70 0 2 Z H S 3 5V S A 5 VS D8 4 L P3 D D C _C LK 2 2 p_ 5 0 V _N P O_ 0 4 2 2p _ 5 0V _N P O_ 0 4 2 2 p_ 5 0 V _N P O_ 0 4 PLEA SE CL OSE TO CONN ECTOR 2 4 E X _D V I _ D A T A 2 # 2 4 E X _D V I _ D A T A 2 Q 14 D M TN 70 0 2 Z H S 3 C C 16 9 AC 1 50 _ 1 %_ 0 4 2 2 p _5 0 V _ N P O _0 4 2 2 p_ 5 0 V _ N P O _0 4 2 2 p_ 5 0 V _ N P O _0 4 A R1 4 2 1 50 _ 1 %_ 0 4 C R1 2 3 1 50 _ 1 %_ 0 4 24 E X _ D D C _ D A T A 2 *W C M3 2 1 6F 2S -1 6 1 T0 3 1 L P7 2 4 E X _D V I _ C L K 2 4 E X _D V I _ C L K # C 88 C 84 0 . 1 u _1 0 V _ X7 R _0 4 0 . 1 u _1 0 V _ X7 R _0 4 2 4 3 *W C M 3 21 6 F 2 S -1 61 T 0 3 D03C LP1~7 change to E X _ DV I_ DA T A 4 # _ R E X _ DV I_ DA T A 4 _ R E X _ DV I_ DA T A 1 # _ R E X _ DV I_ DA T A 1 _ R 3 .3 VS C 1 10 C 1 13 C8 5 5p _ 5 0V _N P O_ 0 4 C1 1 1 5p _ 5 0V _N P O_ 0 4 E X _ D V I _C LK _R E X _ D V I _C LK #_ R C1 1 4 5p _ 5 0V _N P O_ 0 4 0 . 1 u _1 0 V _ X7 R _0 4 0 . 1 u _1 0 V _ X7 R _0 4 A 1 D4 E X _ DV I_ DA T A 3 # _ R E X _ DV I_ DA T A 3 _ R D 3 BAV9 9 SHORT 24 R 80 E X _D V I _ H P D L 13 F C M 1 60 8 K -1 21 T 0 6 E X _ DV I_ DA T A 0 # _ R E X _ DV I_ DA T A 0 _ R 1 0 K _ 04 C 1 23 Close to DVI PORT 2 2 0 p_ 5 0 V _N P O_ 0 4 D04 ADD R569 R5 6 9 R4 5 R4 3 R5 7 R5 4 R4 2 R3 9 R6 1 R6 0 R3 5 R3 2 R5 1 R4 9 R6 5 R6 8 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% 49 9 _ 1% Q1 1 MT N 7 0 0 2Z H S 3 _04 _04 _04 _04 _04 _04 _04 _04 _04 _04 _04 _04 _04 _04 E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ D E X_ DVI_ C E X_ DVI_ C A TA 2# _ R A TA 2_ R A TA 4# _ R A TA 4_ R A TA 1# _ R A TA 1_ R A TA 3# _ R A TA 3_ R A TA 0# _ R A TA 0_ R A TA 5# _ R A TA 5_ R LK _ R LK # _ R E X _ DV I_ DA T A 5 # _ R E X _ DV I_ DA T A 5 _ R E X _ DV I_ CL K _ R E X _ DV I_ CL K # _ R F RE D F GR N F B L UE HS Y NC VS Y NC DD CD A T A DD CL K DVI 1 2 3 4 5 9 10 11 12 13 15 16 17 18 19 20 21 22 23 24 C1 C2 C3 C4 8 7 6 TM TM TM TM TM TM TM TM TM TM DS DS DS DS DS DS DS DS DS DS + 5V P OW E R D A TA 2D A TA 2+ 2 / 4 S h ie l d D A TA 4D A TA 4+ D A TA 1D A TA 1+ D A TA 1/ 3 S h i el d D A TA 3D A TA 3+ 14 C JD V I 1 E X _ DV I_ DA T A 2 # _ R E X _ DV I_ DA T A 2 _ R C 2 4 E X _D V I _ D A T A 5 # 2 4 E X _D V I _ D A T A 5 3 AC 2 *W C M3 2 1 6F 2S -1 6 1 T0 3 4 L P4 0 . 1 u _1 0 V _ X7 R _0 4 0 . 1 u _1 0 V _ X7 R _0 4 D 1 C 62 C 56 S C S 7 5 1V - 40 C1 1 9 0 . 1 u_ 1 6 V _Y 5 V _0 4 G N D ( A N A L O G) H OT P L U G D E T E C T T M D S D A TA 0T M D S D A TA 0+ T M D S D A TA 0/ 5 S h i el d T M D S D A TA 5T M D S D A TA 5+ T M D S C LK S hi e l d T M D S C LK + T M D S C lk R ED G REEN B LU E H SYN C V SYN C D DC Da ta D DC Clk QH 11 1 2 1-D J T0 -4 F D SUB C ASE C ASE G ND G ND M1 M2 C5 C6 6-21-41N00-030 3 . 3V S *0 _ 04 G S 2 4 E X _D V I _ D A T A 0 # 2 4 E X _D V I _ D A T A 0 3 . 4 L P1 1 8 , 2 0, 23 , 2 4 , 25 , 2 8 , 30 , 3 1 , 3 2, 3 3 , 3 4, 3 9 5 V S 3 , 9, 10 , 1 1 , 12 , 1 3 , 15 , 1 6 , 1 7, 1 8 , 2 0, 2 1 , 2 3, 2 4 , 2 5, 26 , 2 7 , 28 , 2 9 , 30 , 3 1 , 3 2, 3 3 , 3 4, 3 9 3 . 3 V S DVI B - 23 B.Schematic Diagrams R1 1 1 S 24 E X _ D D C _ C L K A C 1 60 R 10 6 3 . 9 K _ 04 D02 ? ? G D 14 B A V 9 9 AC AC D 13 B A V 99 AC _R _G _B _ HS Y NC _ VSYN C . . . E X _ DA C E X _ DA C E X _ DA C E X _ DA C E X _ DA C G R 10 3 3 . 9K _ 0 4 D 12 B A V 99 24 E X _ DA C _ R 24 E X _ DA C _ G 24 E X _ DA C _ B 2 4 E X _D A C _ H S Y N C 2 4 E X _D A C _ V S Y N C A A C A C 3 .3 V S Schematic Diagrams HDMI 3. 3V S 5 V S _ H D MI HDMI CONNECTOR D04 ADD R567,R568 5 VS R5 6 7 *0 _ 04 R 56 8 0 _ 04 A D03 BOM ADD D1,DEL R6 R 6 5 V S _ H D MI 4 . 7K _0 4 H D MI _ S C L R 5 47 4 . 7K _0 4 H D MI _ S D A D03C 3.3VS_HDMI change to 5VS S C S 75 1 V - 4 0 C 2 C 7 J _ H D MI 1 C 9 A C 4 H D M I _C C L K # _ C C5 2 4 0. 1 u _ 10 V _ X 7R _ 04 H D MI _ C C L K # 24 H D M I _C C L K _ C C5 2 3 0. 1 u _ 10 V _ X 7R _ 04 H D MI _ C C L K 2 4 H D M I _C # 1_ C C5 2 8 0. 1 u _ 10 V _ X 7R _ 04 H D MI _ C 1# 2 4 H D M I _C 1 _C C5 2 7 0. 1 u _ 10 V _ X 7R _ 04 H D MI _ C 1 2 4 H D M I _C # 0_ C C5 2 6 0. 1 u _ 10 V _ X 7R _ 04 H D M I _C 0 _C C5 2 5 0. 1 u _ 10 V _ X 7R _ 04 H D M I _C # 2_ C C5 3 0 0. 1 u _ 10 V _ X 7R _ 04 H D M I _C 2 _C C5 2 9 0. 1 u _ 10 V _ X 7R _ 04 5 VS D03 ADD R546,R547 C C * 0 _0 8 R 5 46 D2 H D MI _ S D A 16 14 D03C T MD S _C LO C K # -R 3 L6 T MD S _C LO C K -R 2 4 1 * W C M 32 1 6 F 2 S - 16 1 T 03 Z 4 30 8 12 Z 4 30 9 10 8 T MD S _D A T A 1# -R 3 L4 T MD S _D A T A 1- R 2 4 1 * W C M 32 1 6 F 2 S - 16 1 T 03 Z 4 31 0 6 Z 4 31 1 4 2 H O T P LU G D E T E C T +5 V D D C / C E C GN D S DA SCL RESE R V ED CE C TM D S C L OC K C L K S H I E LD TM D S C L OC K + T MD S D A T A 0 S HIE L D0 T M D S D A TA 0 + TM D S D A T A 1S H IE L D1 TM D S D A T A 1+ 19 H D M I _H P D -C L2 0 _ 04 R7 HDM I_ HP D R2 4 R2 3 R1 6 R1 9 0_04 17 15 H D M I _S C L 13 H D M I _C E C C 11 * 22 0 p _5 0 V _ N P O _0 4 11 D03B D2,C11 DEL, L2,R7 SHORT 9 Z 4 31 2 2 L5 7 Z 4 31 3 3 T MD S _ D A T A 0 #-R 1 R 57 0 T MD S _ D A T A 0 -R 4 *W C M3 2 16 F 2 S -1 6 1T 0 3 Z 4 31 4 2 L3 1 Z 4 31 5 3 1 3 . 3 V S _ H D MI H D MI _ C 0 2 4 H D MI _ C 2# 2 4 H D MI _ C 2 2 4 R3 0 * 2 . 2K _ 0 4 R3 1 4 .7 K_ 0 4 HDM I_ E Q I2C_SEL: GPIO / local I2C control select I2C_SEL = High ? Device is configured by GPIO logic. I2C_SEL= Low ? Device is configured by I2C logic. 3. 3 V S _ H D MI G T MD S _ D A TA 2# - R H D MI _ C 0# 2 4 D03B BOM ADD R31 4 9 9 _1 % _ 04 4 9 9 _1 % _ 04 4 9 9 _1 % _ 04 4 9 9 _1 % _ 04 Q 5 M TN 70 0 2 Z H S 3 * 0_ 0 4 5 3 49 9 _1 % _ 04 49 9 _1 % _ 04 49 9 _1 % _ 04 49 9 _1 % _ 04 R2 6 R2 5 R1 3 R1 5 D03C D 18 S Sheet 23 of 57 HDMI * BAV9 9 0 . 1 u_ 1 6 V _Y 5 V _0 4 AC 1 0 u_ 1 0 V _Y 5 V _0 8 1 0u _ 1 0V _ Y 5V _ 0 8 0 . 1u _ 1 6V _ Y 5V _ 0 4 . D04 ADD R570 T MD S D A T A 2 S HIE L D2 T M D S D A TA 2 + 4 T MD S _ D A TA 2-R * W C M 32 1 6 F 2S -16 1 T 03 3. 3 V S _ H D MI U5 6 12 19 25 40 46 55 61 C -1 7 5 95 4 8- 1 6-21-14K00-119 D03 ADD D34 3. 3 V S D 34 A S C S 5 51 V -3 0 C 24 H D MI _ S 1 H D MI _ S 2 H D MI _ E Q H D MI _ S 1 3 . 3V S _H D M I D03 DEL C69,R48,C77,C64,R44,Q9,Q6 32 33 34 T MD S _C L OC K -R T MD S _C L OC K #-R 17 18 T MD S _D A T A 0 -R T MD S _D A T A 0 #-R 20 21 T MD S _D A T A 1 -R T MD S _D A T A 1 #-R 23 24 T MD S _D A T A 2 -R T MD S _D A T A 2 #-R 26 27 H D MI _ S C L H D MI _ S D A H D MI _ H P D 29 30 31 VC VC VC VC VC VC VC VC C C C C C C C C ( P )A 1 4 (N )B 1 4 ( P )A 1 3 (N )B 1 3 HDMI ( P )A 1 2 (N )B 1 2 PORT1 S1 S2 EQ ( P )A 1 1 (N )B 1 1 Y 4 (P ) Z 4 (N ) SC L 1 SD A1 HP D 1 Y 2 (P ) Z 2 (N ) ( P )A 2 4 (N )B 2 4 Y 1 (P ) Z 1 (N ) HDMI S C L _S I N K S D A _ S I NK H PD_ SIN K PORT2 ( P )A 2 3 (N )B 2 3 ( P )A 2 2 (N )B 2 2 ( P )A 2 1 (N )B 2 1 D2 4 49 16 S C S 7 5 1V -4 0 C5 7 1 0 . 1 U _ 1 6 V _0 4 VD D V S A DJ R9 4. 02 K _ 1 %_ 0 4 G ND GN D G ND GN D G ND GN D G ND C H D MI _ C C LK _ C H D MI _ C C LK # _ C 45 44 H D MI _ C 0 _ C H D MI _ C # 0 _C 42 41 H D MI _ C 1 _ C H D MI _ C # 1 _C 39 38 H D MI _ C 2 _ C H D MI _ C # 2 _C 37 36 35 H D MI _ C _ S C L H D MI _ C _ S D A H D MI _ C H P D 63 62 H D MI _ D C LK H D MI _ D C LK # 60 59 H D MI _ D 0 H D MI _ D # 0 57 56 H D MI _ D 1 H D MI _ D # 1 54 53 H D MI _ D 2 H D MI _ D # 2 52 51 50 H D MI _ D _ S C L H D MI _ D _ S D A H D MI _ D H P D H D MI _ C _ S C L 24 H D MI _ C _ S D A 2 4 H D MI _ C H P D 24 SC L 2 SD A2 HP D 2 H D MI _ D C L K 2 4 H D MI _ D C L K # 24 H D MI _ D 0 24 H D MI _ D # 0 2 4 H D MI _ D 1 24 H D MI _ D # 1 2 4 H D MI _ D 2 24 H D MI _ D # 2 2 4 H D MI _ D _ S C L 24 H D MI _ D _ S D A 2 4 H D MI _ D H P D 24 TM D S 2 5 1 3 9 15 22 28 43 58 A N C NC N C NC N C NC NC NC NC N C NC 5V S 48 47 Y 3 (P ) Z 3 (N ) 1 2 4 5 7 8 10 11 13 14 64 B.Schematic Diagrams D 1 D03B BOM CHANGE TO 251 HDMI SWITCH 3 . 3 V S _ H D MI 3 . 3 V S _ H D MI C4 7 C 49 C 5 70 0 . 1u _ 1 6V _ Y 5V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 R2 7 R2 0 4 . 7 K _0 4 4 . 7 K _0 4 H D MI _S 1 H D MI _S 2 R1 1 R1 2 R2 2 R2 1 2 . 2 K _0 4 2 . 2 K _0 4 2 . 2 K _0 4 2 . 2 K _0 4 H D MI _D _S C L H D MI _D _S D A H D MI _C _S C L H D MI _C _S D A 3 , 9 , 1 0 , 11 , 1 2 , 13 , 1 5 , 16 , 1 7 , 18 , 2 0 , 21 , 2 2 , 2 4, 2 5 , 2 6, 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 2, 3 3 , 3 4 , 39 3 . 3 V S 1 8, 2 0 , 2 2, 2 4 , 2 5, 2 8 , 3 0, 3 1 , 3 2, 3 3 , 3 4 , 39 5 V S B - 24 HDMI Schematic Diagrams MXM PCI-E * 4. 3K _ 1 %_ 0 4 * 4. 3K _ 1 %_ 0 4 2 1 L V DS _ DD C_ DA T 2 1 L V DS _ DD C_ CL K R 37 7 1 1 , 28 , 3 1 , 33 H D A _ R S T # Max: 0.5inch 11 H DA _ S DIN 2 R3 7 6 3 3_ 0 4 33 _ 04 31 S P D I F O-M XM 2 P E G_ R X N [ 0 . . 1 5] 2 P E G_ R X P [ 0 . . 15 ] PEG _R XN 1 5 PEG _R XP 15 PEG _R XN 1 4 PEG _R XP 14 PEG _R XN 1 3 PEG _R XP 13 PEG _R XN 1 2 PEG _R XP 12 PEG _R XN 1 1 PEG _R XP 11 PEG _R XN 1 0 PEG _R XP 10 PEG _R XN 9 PEG _R XP 9 PEG _R XN 8 PEG _R XP 8 PEG _R XN 7 PEG _R XP 7 PEG _R XN 6 PEG _R XP 6 PEG _R XN 5 PEG _R XP 5 PEG _R XN 4 P E G _R XP 4 PEG _R XN 3 PEG _R XP 3 PEG _R XN 2 PEG _R XP 2 PEG _R XN 1 PEG _R XP 1 PEG _R XN 0 PEG _R XP 0 5V R U N 5 V RU N 3A J_ MX M 1B 12 C L K _ P C I E _ M XM # 12 C L K _ P C I E _ M XM 3 V RU N 2A VIN P W R _S R C P J 1 71 4 mm 1 4A 1 2 2 1 N V _ L V D S -U C L K N 2 1 N V _ L V D S -U C L K P 14 A D02 BOM DEL R 36 2 *1 0 K _ 04 2 1 N V _ LV D S -U 2 N 2 1 N V _ LV D S -U 2 P 3 . 3V S MX M_ P R E S N T # 16 , 2 5 2 1 N V _ LV D S -U 1 N 2 1 N V _ LV D S -U 1 P A L L _S Y S _ P W R G D 1 3, 2 1 , 2 5 2 1 N V _ LV D S -U 0 N 2 1 N V _ LV D S -U 0 P V GA _ P W R GD 1 R 36 4 1 0K _ 0 4 3. 3 V S A C / B A T L# 2 5 T H _ OV E R T# 1 T H _ A LE R T #1 R3 6 3 R3 6 1 S MD _V G A _ TH E R M _R S MC _V G A _ TH E R M _R R 36 0 R 35 9 R 35 8 2. 2 K _ 0 4 2. 2 K _ 0 4 R3 5 6 R3 5 5 33 _ 0 4 33 _ 0 4 33 _ 0 4 3 . 3V S 4. 7 K _ 0 4 4. 7 K _ 0 4 23 23 H D MI _ C 2 # H D M I _C 2 23 23 H D MI _ C 1 # H D M I _C 1 23 23 H D MI _ C 0 # H D M I _C 0 2 3 H D MI _ C C L K # 23 H D MI _C C L K 3 .3 VS 2 3 H D MI _ C _S D A 2 3 H D MI _ C _S C L H D A _ B I T C L K 1 1, 2 8 , 3 1 H D A _ S D O U T 1 1, 2 8 , 3 1 H D A _ S Y N C 1 1 , 28 , 3 1 H D MI _ S 1 2 3 P E G_ T XN [ 0 . . 15 ] 2 P E G _T X P [ 0 . . 15 ] 2 P E G_ T X N 1 5 P E G_ T X P 15 P E G_ T X N 1 4 P E G_ T X P 14 P E G_ T X N 1 3 P E G_ T X P 13 P E G_ T X N 1 2 P E G_ T X P 12 2 2 E X_ D V I _ D A TA 2 # 2 2 E X _D V I _ D A T A 2 P E G_ T X N 1 1 P E G_ T X P 11 2 2 E X_ D V I _ D A TA 1 # 2 2 E X _D V I _ D A T A 1 P E G_ T X N 1 0 P E G_ T X P 10 2 2 E X_ D V I _ D A TA 0 # 2 2 E X _D V I _ D A T A 0 P E G_ T X N 9 P E G_ T X P 9 2 2 E X _D V I _ C L K # 2 2 E X _ DV I _ CL K P E G_ T X N 8 P E G_ T X P 8 R5 2 9 R5 3 0 2 2 E X_ D D C _ D A TA 22 E X _ D D C _ C L K P E G_ T X N 7 P E G_ T X P 7 0_ 0 4 0_ 0 4 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205 207 209 211 213 215 217 219 221 223 225 227 229 231 233 235 237 239 241 243 245 247 249 251 253 255 257 259 261 263 265 267 269 271 273 275 277 279 281 D02 ADD R529,R530 & NET P E X _ RE F C L K # P E X _ RE F C L K G ND R SVD R SVD R SVD R SVD R SVD L V D S _U C L K # L V D S _U C L K G ND L V D S _U TX 3 # L V D S _U TX 3 G ND L V D S _U TX 2 # L V D S _U TX 2 G ND L V D S _U TX 1 # L V D S _U TX 1 G ND L V D S _U TX 0 # L V D S _U TX 0 G ND D P _ C _ L0 # D P _ C _ L0 G ND D P _ C _ L1 # D P _ C _ L1 G ND D P _ C _ L2 # D P _ C _ L2 G ND D P _ C _ L3 # D P _ C _ L3 G ND D P _ C_ A UX # D P _ C_ A UX R SVD R SVD R SVD R SVD R SVD R SVD R SVD R SVD R SVD R SVD R SVD R SVD G ND D P _ A _L 0 # D P _ A _L 0 G ND D P _ A _L 1 # D P _ A _L 1 G ND D P _ A _L 2 # D P _ A _L 2 G ND D P _ A _L 3 # D P _ A _L 3 G ND D P _ A _A U X # D P _ A _A U X P R S N T _ L# D 0 2 A D D R 5 2 7, R 5 28 CL K _ RE Q # P E X _R S T # V GA _ D D C _ D A T V GA _ D D C _ C L K V GA _ V S Y N C V G A _ HS Y N C GN D V G A _R E D V GA _ GR E E N V GA _ B L U E GN D LV D S _ LC LK # L V D S _L C L K GN D LV D S _ LT X 3 # L V D S _L T X 3 GN D LV D S _ LT X 2 # L V D S _L T X 2 GN D LV D S _ LT X 1 # L V D S _L T X 1 GN D LV D S _ LT X 0 # L V D S _L T X 0 GN D DP_ D_ L 0 # D P _ D_ L 0 GN D DP_ D_ L 1 # D P _ D_ L 1 GN D DP_ D_ L 2 # D P _ D_ L 2 GN D DP_ D_ L 3 # D P _ D_ L 3 GN D D P _ D _A U X # DP _ D_ A U X D P _C _H P D D P _D _H P D R SVD R SVD R SVD GN D D P _B _ L 0 # DP _ B _ L 0 GN D D P _B _ L 1 # DP _ B _ L 1 GN D D P _B _ L 2 # DP _ B _ L 2 GN D D P _B _ L 3 # DP _ B _ L 3 GN D D P _ B _A U X # D P _B _ A U X D P _ B _H P D D P _ A _H P D 3V 3 3V 3 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254 256 258 260 262 264 266 268 270 272 274 276 278 280 MX M_ R S T# R5 2 7 * 0_ 0 4 R5 2 8 * 0_ 0 4 E X_ D D C _ D A TA 2 2 E X_ D D C _ C L K 2 2 E X _D A C _ V S Y N C 2 2 E X _D A C _ H S Y N C 22 E X _D A C _ R 2 2 E X _D A C _ G 2 2 E X _D A C _ B 2 2 N V _ L V D S -L C L K N 21 N V _ L V D S -L C L K P 2 1 N V _ L V D S -L 2 N 2 1 N V _ L V D S -L 2 P 2 1 N V _ L V D S -L 1 N 2 1 N V _ L V D S -L 1 P 2 1 Sheet 24 of 57 MXM PCI-E N V _ L V D S -L 0 N 2 1 N V _ L V D S -L 0 P 2 1 H D MI _ D # 2 23 H D MI _ D 2 2 3 H D MI _ D # 1 23 H D MI _ D 1 2 3 H D MI _ D # 0 23 H D MI _ D 0 2 3 H D MI _ D C LK # 2 3 H D MI _ D C LK 2 3 H D MI _ D _ S D A 2 3 H D MI _ D _ S C L 2 3 H D MI _ C H P D 2 3 H D MI _ D H P D 2 3 E X _D V I _D A T A 5# 2 2 E X _D V I _D A T A 5 22 E X _D V I _D A T A 4# 2 2 E X _D V I _D A T A 4 22 E X _D V I _D A T A 3# 2 2 E X _D V I _D A T A 3 22 E X _D V I _H P D 2 2 3V R U N P E G_ T X N 5 P E G_ T X P 5 5V S P E G_ T X N 4 P E G_ T X P 4 1 6 D GP U _ H OL D _R S T# P E G_ T X N 3 P E G_ T X P 3 3 .3 V R 1 Q3 0 S MD _ V GA _ T H E R M _ R MT N 7 00 2 Z H S 3 S P E G_ T X N 2 P E G_ T X P 2 P E G_ T X N 1 P E G_ T X P 1 P E G_ T X N 0 P E G_ T X P 0 MX M_ C L K R E Q# 1 2 91 7 8 2-3 1 40 M -N V -0 1 P E G_ T X N 6 P E G_ T X P 6 D S MD _V G A _ TH E R M 25 S MC _V G A _ TH E R M 25 Q2 9 S MC _ V GA _ T H E R M _ R S D0 2 DE L C8 * 1 00 K _ 04 1 4 M TN 7 00 2 Z H S 3 D M XM _R S T # 2 3 , 1 5, 2 8 , 4 1 P L T _ R S T # U 2 * 74 A H C 1 G0 8 GW PW R _ SRC R4 6 - 86 - 2 43 1 4 -0 0 3 P W R_ SRC 2A P J1 5 O P E N -2 m m 1 2 5 R 37 3 R 37 4 P J1 6 O P E N -3 m m 1 2 3 2 1 V G A _ E NA V D D 21 V G A _B K L T E N 3 . 3V S 3A 3. 3V S G P E X_ S T D _ S W # 1 E 2 -1 E 2 -2 E 2 -3 E 2 -4 E 2 -5 E 2 -6 E 2 -7 E 2 -8 E 2 -9 E 2 -10 E 4 -1 E 4 -2 E 4 -3 E 4 -4 E 4 -5 E 4 -6 E 4 -7 E 4 -8 E 4 -9 E 4 -10 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 1 00 1 02 1 04 1 06 1 08 1 10 1 12 1 14 1 16 1 18 1 20 1 22 1 24 1 34 1 36 1 38 1 40 1 42 1 44 1 46 1 48 1 50 1 52 G R 37 5 * 1 0m i _l s h ort P W R_ S RC P W R_ S RC P W R_ S RC P W R_ S RC P W R_ S RC P W R_ S RC P W R_ S RC P W R_ S RC P W R_ S RC P W R_ S RC GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D P R S NT _ R# W AKE# P W R _ G OOD P W R _E N RS V D RS V D RS V D RS V D P W R_ L E V E L TH _O V E R T # T H_ A L E RT # T H _P W M G P I O0 G P I O1 G P I O2 S M B _ DA T S M B _ CL K GN D OE M OE M OE M OE M GN D P E X_ T X 15 # P E X _ T X1 5 GN D P E X_ T X 14 # P E X _ T X1 4 GN D P E X_ T X 13 # P E X _ T X1 3 GN D P E X_ T X 12 # P E X _ T X1 2 GN D P E X_ T X 11 # P E X _ T X1 1 GN D P E X_ T X 10 # P E X _ T X1 0 GN D P E X _ T X9 # P E X _ TX 9 GN D P E X _ T X8 # P E X _ TX 8 GN D P E X _ T X7 # P E X _ TX 7 GN D P E X _ T X6 # P E X _ TX 6 GN D P E X _ T X5 # P E X _ TX 5 GN D P E X _ T X4 # P E X _ TX 4 GN D P E X _ T X3 # P E X _ TX 3 GN D GN D P E X _ T X2 # P E X _ TX 2 GN D P E X _ T X1 # P E X _ TX 1 GN D P E X _ T X0 # P E X _ TX 0 GN D C 5 78 C 53 1 C 56 1 C 50 6 C 51 8 C5 0 7 C5 0 8 C5 0 9 4 . 7 u _2 5 V _ X5 R _ 0 8 4 . 7 u _2 5 V _X 5 R _ 0 8 4 . 7 u_ 2 5 V _X 5 R _ 0 8 0 . 1 u_ 5 0 V _Y 5V _0 6 0 . 1 u_ 5 0V _Y 5V _ 0 6 0 . 1 u_ 5 0V _ Y 5V _ 0 6 0 . 01 u _ 50 V _ X 7R _0 4 0 . 01 u _5 0 V _ X7 R _0 4 * 10 m i l_ s ho rt D03 R4 CHANGE SHORT 3 V RU N D02 10u CHANGE TO 4.7u C 5 79 C 5 76 C 5 69 C5 4 0 C5 2 2 C1 3 C3 2 4. 7 u _2 5 V _ X5 R _ 0 8 4 . 7 u _2 5 V _ X5 R _ 0 8 * 4. 7u _ 25 V _ X 5R _0 8 4. 7u _ 25 V _ X 5R _0 8 *4 . 7 u_ 2 5V _ X 5 R _ 08 4 . 7 u_ 2 5V _ X 5 R _ 08 *4 . 7 u _2 5 V _ X5 R _ 0 8 CLOSE T O MXM PIN E1 CLOSE T OM XM PIN E2 CLOSE T OM XM CONN. CLOSE TO MXM CONN. 18 , 2 0 , 22 , 2 3 , 25 , 2 8, 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 9 5 V S 3 , 9, 10 , 1 1, 1 2 , 1 3, 1 5 , 1 6, 1 7 , 1 8, 2 0 , 21 , 2 2 , 23 , 2 5 , 26 , 2 7 , 28 , 2 9, 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 9 3 . 3 V S 21 , 3 4, 3 5 , 3 6, 3 7 , 3 8, 3 9 , 4 0 V I N 2 , 3 , 1 1, 1 2 , 13 , 1 5 , 16 , 1 8 , 21 , 2 6 , 27 , 2 8, 2 9 , 3 4, 3 6 , 3 7, 3 8 , 4 1 3 . 3 V MXM PCI-E B - 25 B.Schematic Diagrams 5 V RUN 5V S P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D 5V 5V 5V 5V 5V GN D GN D GN D GN D P E X _S TD _S W # V GA _ D I S A B L E # PNL _ P W R_ EN P N L _ B L _E N P N L _ B L _P W M H D MI _ C E C DV I_ H P D L V DS _ DD C_ DA T L V DS _ DD C_ CL K GN D OE M OE M OE M OE M GN D P E X _R X 15 # P E X _R X 15 GN D P E X _R X 14 # P E X _R X 14 GN D P E X _R X 13 # P E X _R X 13 GN D P E X _R X 12 # P E X _R X 12 GN D P E X _R X 11 # P E X _R X 11 GN D P E X _R X 10 # P E X _R X 10 GN D P E X _R X 9# P E X _R X 9 GN D P E X _R X 8# P E X _R X 8 GN D P E X _R X 7# P E X _R X 7 GN D P E X _R X 6# P E X _R X 6 GN D P E X _R X 5# P E X _R X 5 GN D P E X _R X 4# P E X _R X 4 GN D P E X _R X 3# P E X _R X 3 GN D GN D P E X _R X 2# P E X _R X 2 GN D P E X _R X 1# P E X _R X 1 GN D P E X _R X 0# P E X _R X 0 GN D 9 1 78 2 -3 14 0 M-N V -01 M XM 3. 0 M OD ULE BOA R D C ON N EC T OR PWR_SRC(10A)--7-20V 5VRUN(2.5A)--5V 3VRUN(1A)--3.3V D02 BOM DEL P W R_ S R C J _ MX M1 A E 1 -1 E 1 -2 E 1 -3 E 1 -4 E 1 -5 E 1 -6 E 1 -7 E 1 -8 E 1 -9 E 1-1 0 E 3 -1 E 3 -2 E 3 -3 E 3 -4 E 3 -5 E 3 -6 E 3 -7 E 3 -8 E 3 -9 E 3-1 0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 MXM 3.0 MODUL E BOAR D CONN ECTOR P W R _S R C MXM 3.0 Schematic Diagrams EC-IT8502E K B C_ A V DD L26 H C B 1 0 05 K F - 1 2 1T 2 0 V D D3 C1 7 6 0 . 1 u_ 1 6V _ Y 5V _ 0 4 C1 9 0 1 0u _ 1 0V _ Y 5V _ 0 8 C6 4 9 0 . 1u _ 1 6V _ Y 5V _ 0 4 C 1 77 0 . 1u _ 1 6V _ Y 5V _ 0 4 J _L E D 1 V D D3 . C6 4 7 C2 1 0 C2 1 1 C2 0 7 0 . 1u _ 1 6V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _ Y 5 V _ 0 4 *. 1 U _ 1 6 V _0 4 L 24 H C B 1 00 5 K F -1 21 T 2 0 FOR W870CU J _K B T2 8 52 0 1 -24 0 5 1-7 0 . 1u _ 1 6V _ Y 5V _ 0 4 E C_ V CC Sheet 25 of 57 EC-IT8502E C 67 8 16 GA 20 1 3 , 40 AC_ IN # 30 L E D _A C I N # 2 T H E R M _ A LE R T # 0 . 1 u_ 1 6 V _Y 5V _0 4 D02 ADD C 6 78 12 6 4 16 20 L E D_ A C IN# D02 CHANGE 27 3 G _P W R E N 3 P M_ E XT T S # _E C D03 CHANGE 30 C P U _F A N 30 V GA _ F A N 30 C ASE_ FAN 27 W L A N_ E N 16 , 2 4 MX M_ P R E S N T # 33 K B C _ MU TE # 76 77 78 79 80 81 W L A N_ E N R 4 89 0_ 0 4 40 SM C_ B AT 40 SM D_ B AT 24 S M C _ V GA _ T H E R M 24 S M D _ V GA _ T H E R M 2 , 1 2 S MC _C P U _ T H E R M 2 , 1 2 S MD _ C P U _ TH E R M D 0 2 C H A NG E 3 ,1 6 R 52 5 H _ P ECI 31 LOW ACTIVE 66 67 68 69 70 71 72 73 C P U _ TH E R M 3 G_ D E T # C C D _ D E T# M OD E L _ I D SM SM SM SM SM SM C_ BA T D_ BA T C _ V GA _ T H E R M D _ V GA _ T H E R M C _ C P U _T H E R M D _ C P U _T H E R M * 0_ 0 4 K B C _B E E P 30 L E D _ B A T _ C H G # 30 L E D _ B A T _ F U L L # 30 L ED_ P W R # 27 80 C LK 27 3I N 1 27 8 0 DET # 2 9 L A N _P C I E _ W A K E # 28 T P _ CL K 28 T P _ DA T A L C D _B R I GH TN E S S 2 4 25 L E D _ S C R OL L # 28 L E D _ N U M# 29 L E D_ CA P # 30 L E D_ B A T _ CHG # 31 L E D_ B A T _ F UL L # 32 L E D_ P W R # 34 85 8 0 CL K 3 IN1 86 87 8 0 DE T # L A N _ P C I E _W A K E # 8 8 89 90 GLAN_ON change to 12 5 18 21 34 P W R_ SW # 2 1 , 28 L ID_ SW # 29 33 L A N_ DS M # LAN_DSM# B T _E N B K L_ E N BT_ EN 10 8 10 9 DA DA DA DA DA DA C 0 / GP J C 1 / GP J C 2 / GP J C 3 / GP J C 4 / GP J C 5 / GP J AD AD AD AD AD AD AD AD 0 1 2 3 4 5 C L K 0/ G D A T 0/ G C L K 1/ G D A T 1/ G C L K 2/ G D A T 2/ G 0/ G 1/ G 2/ G 3/ G 4/ G 5/ G 6/ G 7/ G 3 74 K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 4 5 6 8 11 12 14 15 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 K B -S O0 K B -S O1 K B -S O2 K B -S O3 K B -S O4 K B -S O5 K B -S O6 K B -S O7 K B -S O8 K B -S O9 K B -S O1 0 K B -S O1 1 K B -S O1 2 K B -S O1 3 K B -S O1 4 K B -S O1 5 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 PU PU PU PU PU PU PU PU P S 2 C L K 0 / GP F 0 ( P S 2 D A T 0 / GP F 1 ( P S 2 C L K 1 / GP F 2 ( P S 2 D A T 1 / GP F 3 ( P S 2 C L K 2 / GP F 4 ( P S 2 D A T 2 / GP F 5 ( ( ( ( ( ( ( ( ) ) ) ) ) ) ) ) PD PD PD PD PD PD PD )I D 0 / GP H )I D 1 / GP H )I D 2 / GP H )I D 3 / GP H )I D 4 / GP H )I D 5 / GP H )I D 6 / GP H 0 1 2 3 4 5 6 ( P D )E G A D / G P E 1 ( P D )E GC S #/ G P E 2 ( P D )E GC L K / G P E 3 GN D C6 4 6 0 _0 4 L CD _ B RIG HT NE S S RX VO LT AGE V1 .0 X 3 .3 V 26 .7 K 2 .4 V MO D E L _ I D PU PU PU PU PU PU ) ) ) ) ) ) R 1 93 1 0 K _0 4 R 1 92 0. 1 u _1 6 V _ Y 5 V _ 04 M ODE L_ ID V DD 3 * 26 . 7 K _ 04 RX GN D V DD3 6 -2 0 - 94 A 8 0- 1 2 4 R 1 37 K B C _A C / B A T L # *0 _0 4 C D1 5 A S C S 75 1 V -4 0 3G _D E T # CCD _ DE T # K B C _ A C / B A TL # A C / B A TL # 2 4 R2 0 0 R1 9 9 R1 4 7 1 0 K _ 04 1 0 K _ 04 1 0 K _ 04 C 6 41 P CL K _ K B C R 4 73 * 10 _ 0 4 P C LK _K B C _ R *1 0P _5 0 V _ 04 K B C_ S P I _ S CL K CC D_ EN B A T_ V O LT 56 57 93 94 95 96 97 98 99 B A T _ V OL T _R R2 0 6 CCD _ E N 30 S US B # S US C # 1 3 , 26 , 2 8, 36 , 4 1 1 3 , 37 P M_ C L K R U N # 1 3, 2 8 CAS E_ F ANSE N 3 0 S U S _ P W R _ A C K 13 D D _ O N _ LA T C H 3 4 W LA N _ D E T # 27 D02 B T_ D E T# 2 8 DD_ O N 34 D D _O N _ L A TC H 3G _E N 82 83 84 1 0 0_ 0 4 C 22 5 1 u _ 10 V _ 0 6 C333,C334,C335,C337,C340,C341,C343, C344,C330,C331,C332,C336,C338,C339, V D D3 R 2 17 R 1 51 R 1 52 C342,C345,C346,C347,C348,C349,C350, C351,C352,C353 ( P D ) W U I 5/ G P E 5 ( P D )LP C P D # / W U I 6/ G P E 6 35 17 CIR ( P D )C R X / GP C 0 ( P D )C T X/ G P B 2 AC D 26 B A V 99 CPU_ F A N S EN 3 0 V GA _ F A N S E N 3 0 12 0 12 4 V C OR E _ ON 39 A LL _ S Y S _ P W R GD A C A C B A T_ D E T AC D 22 B A V 99 A C B A T _ V OL T B A T _ V OL T AC D 21 B A V 99 A VDD 3 13 , 2 1, 2 4 NC 2 *N C _ 04 C I R _I N K B C _ A C / B A TL # C 17 9 KBC_SPI_*_R = 0.1"~0.5" 51 2K bit 0 . 1 u_ 1 6V _ Y 5V _ 0 4 V DD 3 U1 3 LPC/WAKE UP ( P D )L 8 0H LA T/ G P E 0 ( P D )R I N G# / P W R F A I L# / L P C R S T #/ G P B 7 C L OC K C K 3 2K E C K 3 2K 19 SW I# 11 2 S P I _V D D _ 1 8 13 CHG _ E N 40 CK3 2 KE CK3 2 K R 16 4 D0 2 1 K _0 4 K B C _ F LA S H 3 4 . 7K _ 0 4 K B C _ H OL D # 7 Z M2 00 S _ 3 2. 7 6 8 K H Z 1 2 C 18 9 2 4 6 8 10 1 5 p_ 5 0 V _N P O_ 0 4 1 3 5 7 9 S P U F Z -1 0S 3 -V B -0 -B FOR W870CU D 16 C S C S 3 5 5V -7 A C IR_ IN H OL D # VSS 5 K B C _ S P I _ S I _R 2 K B C _ S P I _ S O_ R K B C _S P I _ S I R1 3 6 1 6 R1 2 6 K B C _ S P I _ C E # _R R1 4 9 K B C_ S P I_ S CL K _ R R1 1 9 4 7_ 0 4 K B C _S P I _ S O 1 5_ 1 % _0 4 K B C _S P I _ C E # 1 5_ 1 % _0 4 K B C _S P I _ S C LK 4 7_ 0 4 J _ 80 D E B U G1 1 2 3 4 5 3I N 1 80 C L K 80 D E T# 8 8 26 6 -0 50 0 1 4 E N 2 5 P 05 -5 0 GC P J _H 8 D B G1 3I N 1 C I R _R X CE# S CK N C3 CI R _ RX W P# 1 0M _ 04 K B C _ A GN D SI SO R1 5 7 X4 4 3 V DD ? ? ? R1 5 8 2 12 8 C 18 4 30 S MD _B A T R S MR S T # 1 3 K B C_ RS T # 1 6 47 48 11 9 12 3 AC D 25 B A V 99 B A T_ D E T 40 ( P D ) T MR I 0 / W U I 2 / GP C 4 ( P D ) T MR I 1 / W U I 3 / GP C 6 S MC _B A T 27 PWM/COUNTER ( P D )TA C H 0 / GP D 6 ( P D )TA C H 1 / GP D 7 10 K _ 0 4 4. 7 K _ 0 4 4. 7 K _ 0 4 C CHANGE S MI # 16 S CI# 16 P W R_ B T N# 1 3 1 5 p _5 0 V _N P O_ 0 4 * 0 . 1u _ 16 V _ Y 5 V _ 0 4 VE R. D03B * NC_ 0 4 R2 0 5 C 6 93 87 1 51 - 2 6 07 G 40 WAKE UP G P I N TE R R UP T W/0 C IR) ( W86 ) 3 . 3V S 3 . 3V S 5 VS 5 VS 5 VS V DD 3 V DD 3 K B C_ S P I _ CE # K B C_ S P I _ S I K B C_ S P I _ S O 10 7 GI N T / GP D 5( P U ) * 0 _0 4 E C _ V S S 10 0 10 1 10 2 10 3 10 4 10 5 10 6 ( P D )I D 7 / GP G 1 RI1 # /W UI0 /G P D0 ( P U ) RI2 # /W UI1 /G P D1 ( P U ) R X D / GP B 0 ( P U ) T XD / GP B 1 ( P U ) S M D_ B AT S M C_ B AT EXT GPIO P W R S W / GP E 4 ( P U ) 0 . 1u _ 1 6V _ Y 5V _ 0 4 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 W L A N_ E N B T_ E N D02 Delete ( P D )K S O1 6 / GP C 3 ( P D )K S O1 7 / GP C 5 P S/ 2 C 19 4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 GPIO PB3 PB4 PC1 PC2 PF 6 ( PU ) PF 7 ( PU ) PA0 ( PA1 ( PA2 ( PA3 ( PA4 ( PA5 ( PA6 ( PA7 ( K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O 4 5 6 8 11 12 14 15 S A T A _ LE D # 1 1 6 -2 0 - 9 4A 8 0 -1 2 4 F L F R A ME # / GP G 2 F L A D 0/ S C E # F L A D 1/ S I F L AD2 /S O F L A D 3 / GP G 6 F L CL K /SCK ( P D )F L R S T #/ W U I 7 / TM / GP G 0 PWM PW M PW M PW M PW M PW M PW M PW M PW M 58 59 60 61 62 63 64 65 FLASH SMBUS SM SM SM SM SM SM EC C os t D ow n 2 1 B R I GH TN E S S A V CC IT 85 12 E C 0 / GP I 0 C 1 / GP I 1 C 2 / GP I 2 C 3 / GP I 3 C 4 / GP I 4 C 5 / GP I 5 C 6 / GP I 6 C 7 / GP I 7 R 17 1 0_ 04 F OR IT 851 2C X/E X (W8 7) 0. 1U _0 4 F OR IT E8 512 -J (IT E8 50 2-J VBAT DAC I T 8 5 02 E -J B - 26 EC-IT8502E 26 50 92 11 4 121 12 7 11 E C S C I # / GP D 3( P U ) E C S MI # / GP D 4( P U ) U AR T 28 21 K S O 0/ P D 0 K S O 1/ P D 1 K S O 2/ P D 2 K S O 3/ P D 3 K S O 4/ P D 4 K S O 5/ P D 5 K S O 6/ P D 6 K S O 7/ P D 7 K S O 8/ A C K # K S O 9 /B US Y K S O1 0/ P E K S O1 1 / E R R # K S O1 2 / S LC T K S O1 3 K S O1 4 K S O1 5 GA 20 / GP B 5 K B R S T# / G P B 6( P U ) P W U R E Q# / G P C 7 ( P U ) L 80 L L A T/ G P E 7 ( P U ) WAKE UP S E N S OR _I N T# D03A NET 11 0 11 1 11 5 11 6 11 7 11 8 K/B W R S T# ADC B A T _ DE T B A T _ V OL T _R 2 C PU_ T HER M 27 3 G_ D E T# 30 CC D_ DE T # 23 15 KS I0 /ST B # K S I 1/ A F D # K S I2 / INIT # K S I 3 / S LI N # KSI4 KSI5 MATRIX KSI6 KSI7 AVSS 14 K B C _W R E S E T # L A D0 L A D1 L A D2 L A D3 L P C C LK L F RA M E # LPC SE R IRQ L P C R S T# / W U I 4/ G P D 2 ( P U ) K B -S I0 K B -S I1 K B -S I2 K B -S I3 K B -S I4 K B -S I5 K B -S I6 K B -S I7 J _ KBT 1 8 52 0 1- 24 0 51 75 P C LK _ K B C VST BY VSTBY VSTB Y VSTBY VSTBY VSTBY 10 9 8 7 13 6 5 22 VSS VSS VSS VSS VSS VSS VSS 1 1 , 28 LP C _A D 0 1 1 , 28 LP C _A D 1 1 1 , 28 LP C _A D 2 1 1 , 28 LP C _A D 3 R 18 2 15 PCL K _ KB C 1 1 , 2 8 L P C _F R A ME # 1 0 0K _ 0 4 1 1 , 28 S E RI RQ 3, 12 , 1 5, 2 6 , 2 7, 2 9 B U F _ P L T _R S T # K B C _ A GN D VC C U 16 1 12 27 49 91 11 3 1 22 . B.Schematic Diagrams 3. 3 V S S A T A _L E D # LE D _ P W R # LE D _ B A T_ F U LL # LE D _ B A T_ C H G# LE D _ C A P # LE D _ N U M # LE D _ A C I N # LE D _ S C R O L L# S E NS O R_ I NT # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 0 . 1 u _1 6 V _ Y 5 V _0 4 C1 9 5 R1 4 8 1 0 K _ 04 -7 VDD 3 V DD3 8 0C LK 8 0D E T# 5 VS 3 . 3V S VDD 3 1 8 , 2 0, 2 2 , 2 3, 2 4 , 28 , 3 0 , 31 , 3 2 , 33 , 3 4 , 39 3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 5, 1 6 , 17 , 1 8 , 20 , 2 1 , 22 , 2 3 , 24 , 2 6 , 27 , 2 8, 2 9 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 9 2 , 1 1 , 27 , 2 8 , 29 , 3 0, 34 , 3 5, 4 0 Schematic Diagrams USB, eSATA, New Card U S B V C C 0 1 _0 60 mil H C B 3 2 1 6K F -8 0 0 T3 0 J ESAT A1 1 C5 1 3 *2 2 u_ 6 . 3 V _0 8 0 . 1 u_ 1 6 V _Y 5V _0 4 J _ US B 4 1 Port 0 U S B _P N 0 15 U S B _P P 0 U S B _P N 0 1 L P1 5 U S B _P P 0 4 2 S D A T A 0+ S 4 S A TA _ T X N 2 10 11 S A T A _R X N 2 V CC1 11 S A T A _R X P 2 S 7 S 8 60 mil C5 1 6 C5 1 4 *2 2u _ 6 . 3V _0 8 0 . 1u _ 1 6V _ Y 5V _ 0 4 E S A T A _ TX N 3 S A T A _ RX N2 1 L P9 S A T A _ RX P 2 4 D03C 2 3 * W C M 32 1 6F 2S - 1 6 1 T0 3 ES AT A_ RXN 5 ES AT A_ RXP 6 GN D 1 T XP T XN GN D 2 RXN RXP GN D 3 P S A B T 5 -0 7M N B S 1 N N 2 N 0 11 41 D A T A 1+ U S B _V C C 0 1 _ 1 H C B 32 1 6 K F -8 00 T 3 0 3 * W C M 32 1 6F 2S - 1 6 1 T0 3 2 7 D A T A 1- M L5 4 E S A T A _ TX P USBV C C0 2 6 U SB VCC 0 1 S A T A _ T XN 2 2 G ND 0 5 6-19-31001-162-1 1 L P1 0 9 D A T A 0- 3 3 *W C M3 2 1 6F 2 S - 1 6 1T 0 3 11 S A T A _ T XP 2 12 1 5 , 41 U S B V CC 0 2 U S BVCC 0 2 U S B _ OC #2 U S B _ OC # 2 L 52 1 2 H C B 20 1 2K F -50 0 T 40 D02 DEL R507,R509 6-21-14G00-107 60 mil G ND 1 J_ U S B 3 V C C_ US B 2 1 C 1 07 B 4 - 1 08 0 3 6-21-B4960-104 Po rt 2 15 U SB_ PN2 15 U SB_ PP2 1 L P1 1 4 Port 1 2 3 *W C M3 2 1 6F 2 S - 1 6 1T 0 3 D03C Z 1 7 05 2 Z 1 7 06 3 C 4 55 + C 4 60 4 0 . 1 u _1 6 V _ Y 5 V _ 04 V+ D A T A _L D A T A _H G ND U S B _P N 1 15 U S B _P P 1 1 L P1 4 U S B _ P N 1_ R 3 4 F L G# V OU T 1 VIN 1 V OU T 2 VIN 2 V OU T 3 EN # U S B V C C 02 5V GN D 7 U3 0 US B V CC0 1 5 U S B _O C # 2 100 MIL 2 R5 0 5 C 65 7 8 3 C5 1 5 C 51 7 C 5 19 0 . 1u _ 1 6V _ Y 5V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 1 0 u _1 0 V _ Y 5 V _ 08 + 1 C5 6 4 C5 3 7 10 0 u _6 . 3 V _ B _A *2 2 u_ 6 . 3 V _ 12 1 0 u _1 0 V _ Y 5 V _ 08 *1 0 K _0 4 4 10 u _ 10 V _ Y 5 V _ 0 8 R T 97 1 5 B GS Co-layout F L G# V O U T 1 V IN1 V O UT 2 V IN2 V O UT 3 E N# G ND 6 7 C 4 41 C 65 8 8 0. 1 u _ 16 V _ Y 5 V _ 04 * . 1u _ 1 6V _ 0 4 D02 DEL U37 1 R T 9 7 15 B G S Q 33 R5 0 4 G P P ON S 41 * 2N 70 0 2 W 0 _0 4 D02 BOM ADD 3 .3 VS C 37 2 *. 1 U _ 1 6V _ 0 4 5 NEW CARD B U F _ P L T_ R S T# 1 4 2 3. 3V U2 9 C 36 0 0 . 1 u_ 1 6V _Y 5V _0 4 C 36 7 0 . 1 u_ 1 6V _Y 5V _0 4 17 A V CC _ A UX PER ST # 3. 3 V S A U X OU T 2 A V C C _ 3. 3 V V OU T _ 3 . 3V 1 .5 VS C 38 5 0 . 1 u_ 1 6V _Y 5V _0 4 12 A V C C _ 1. 5 V 8 N C _ R S T# 15 NC_ 3 .3 V U2 8 74 A H C 1 G0 8 GW 3 2 C5 2 1 R5 0 6 1 0 K _ 04 3. 3 V 6 D USB_ O C# 1 5 6-21-B4930-104 100 MIL D02 BOM ADD D02 BOM ADD U 32 5V C 1 0 77 7 -1 04 0 3 -L 3. 3 V D02 DEL U31 6-19-41001-097 R 37 2 1 0 K _0 4 2 4 3 USB_ PP 1 _ R *W C M 3 21 6 F 2 S -16 1 T 03 GN D 1 15 2 1 0 0u _ 1 0V _ D 2_ A 3. 3 V Sheet 26 of 57 USB, eSATA, New Card J _N E W 1 20 mil C 3 70 N C _ P E R S T# 0. 1u _ 16 V _ Y 5 V _ 0 4 40 mil C 3 86 0. 1u _ 16 V _ Y 5 V _ 0 4 40 mil C 3 92 C 4 06 0. 1u _ 16 V _ Y 5 V _ 0 4 0. 1u _ 16 V _ Y 5 V _ 0 4 C 4 05 0. 1u _ 16 V _ Y 5 V _ 0 4 N C_ CP P E # N C _C P U S B # P CI E _ W A K E # 6 -0 1- 741 08 -Q 61 3 11 NC_ 3 .3 V S NC_ 1 .5 V S 12 14 15 9 10 V OU T _ 1 . 5V 3, 1 2 , 1 5, 2 5 , 2 7, 2 9 B U F _P L T _ R S T # 15 U S B _ OC # 5 B U F _ P L T_ R S T# 1 1 3 , 25 , 2 8 , 3 6, 4 1 S U S B # 3 . 3V R2 9 6 6 19 1 0K _ 0 4 4 5 13 14 16 SYSR ST# OC # CP P E# CP U S B # 10 9 STBY# NC NC NC NC NC 1 2 3 4 5 R CL K E N S H DN # G ND 1 G ND 2 18 20 7 21 N C _R C L K E N N C _S H D N # R3 1 6 *1 0 0 K _0 4 R3 1 5 *1 0 0 K _0 4 R2 9 7 R2 9 5 *1 0 K _ 04 1 0K _0 4 D02 BOM add R295 13 , 2 7 , 29 , 4 1 P C I E _ W A K E # 1 2 N E W C A R D _C L K R E Q # 3 .3 V 3. 3 V S 13 R 2 98 1 2 C L K _ P C I E _ N E W _C A R D 1 2 C L K _P C I E _ N E W _ C A R D # 12 P C I E _ R X P 2_ N E W _ C A R D 12 P C I E _ R X N 2 _ N E W _ C A R D 1 2 P C I E _ T XP 2 _ N E W _ C A R D 1 2 P C I E _ T XN 2_ N E W _ C A R D 17 4 11 16 1 0 K _ 04 19 18 22 21 25 24 P E RS T # +3 . 3 V A U X +3 . 3 V +3 . 3 V +1 . 5 V +1 . 5 V CPPE # CPU SB# W AKE# CL KREQ # R E F C LK + R E F C LK P E Rp 0 P E Rn 0 P E T p0 P E T n0 P 2 2 31 N F E 2 ? ? W 77 0C U A dd GN D pi n 15 15 12 12 U S B _P P 5 U S B _P N 5 S ML 0 _ D A T A S ML 0 _ C L K 3 2 8 7 R E SERVE D R E SERVE D US B _ D+ US B _ DS MB _ D A T A S MB _ C L K 1 30 8 3 2-1 GN D GN D GN D GN D 5 6 NE W _ RE S E RV E D 1 NE W _ RE S E RV E D 2 1 20 23 26 6-21-G3A30-126 1. 5 V S 5V S 5V 3. 3 V 3. 3 V S 1 7 , 2 7, 3 4 1 8 , 2 0, 2 2 , 2 3, 2 4 , 2 5, 2 8 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 9 1 2 , 1 8, 2 8 , 3 0, 3 4 , 3 6, 3 7 , 3 8, 4 1 2 , 3 , 1 1, 1 2 , 1 3, 1 5 , 1 6, 1 8 , 2 1, 2 4 , 2 7, 2 8 , 2 9, 3 4 , 3 6, 37 , 3 8, 41 3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 5, 1 6 , 1 7, 1 8 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 25 , 2 7, 28 , 2 9 , 30 , 3 1 , 32 , 3 3 , 34 , 3 9 USB, eSATA, New Card B - 27 B.Schematic Diagrams 15 S A TA _ T X P 2 4 V CC0 2 11 GN D 2 D02 DEL R371,R370 C1 2 G ND1 ML 1 1 U S B _O C # 1 U S B _O C # 1 GN D 2 US B V CC0 1 15 Schematic Diagrams Mini Card MINI-PCIE CARD For WLAN 20 mil J_ W L A N 1 PC IE_ W AKE# R 49 6 1 3 5 1 0 K _0 4 7 11 13 9 15 1 2 W L A N _ C LK R E Q# 1 2 C L K _ P C I E _M I N I # 1 2 C L K _ P C I E _ MI N I 3 .3 V W LA N 1 . 5V S W A KE# C OE X 1 C OE X 2 3 . 3 V A U X_ 0 1. 5 V _ 0 U I M_ P W R U I M _D A T A U I M _C L K U I M _R E S E T U I M _V P P C L KREQ # R EF CL KR EF CL K+ G ND 0 G ND 1 2 6 8 10 12 14 16 D02 BOM DEL 20 mil R 5 03 1 .5 V S 1 . 5V S * 0 _0 6 C 48 6 C4 9 1 0 . 1 u _1 6 V _ Y 5 V _ 04 10 u _ 10 V _ Y 5V _ 0 8 C6 5 4 0 . 1u _ 1 6V _Y 5V _0 4 4 3 .3 V GN D 5 C 65 3 KEY Sheet 27 of 57 Mini Card 35 23 25 31 33 25 W L A N _ D E T# 12 P C I E _ R X N 1 _ W L A N 1 2 P C I E _R XP 1_ W L A N 1 2 P C I E _T X N 1 _ W L A N 1 2 P C I E _ T XP 1_ W L A N 25 25 17 19 37 39 41 43 45 47 49 51 8 0D E T # 3I N 1 3 .3 V 12 12 12 R 50 0 R 49 9 R 49 8 R 49 7 C L_ C LK 1 C L_ D A TA 1 C L_ R S T# 1 V DD 3 * 10 m i _l s h ort * 10 m i _l s h ort * 10 m i _l s h ort * 10 m i _l s h ort M I N I _ C LK 1 M I N I _ D A TA 1 M I N I _ R S T# 1 N MI N I _ 01 For WLAN Device G ND 2 G ND 3 G ND 4 0 . 1 u _1 6 V _ Y 5 V _ 04 GN D 6 GN D 7 GN D 8 GN D 9 GN D 1 0 G N D 11 P E Tn 0 P E Tp 0 P E Rn 0 P E Rp 0 W _D I S A B L E # P ERSET # S M B _C L K S M B _D A T A U S B _D U S B_ D+ R e se r v e d 0 R e se r v e d 1 G N D 12 3 . 3 V A U X_ 3 3 . 3 V A U X_ 1 3 . 3 V A U X_ 4 1. 5 V _ 1 G N D 13 1. 5 V _ 2 R e se r v e d 2 3 . 3 V A U X_ 2 R e se r v e d 3 L E D_ W W A N# R e se r v e d 4 LE D _ W LA N # R e se r v e d 5 L ED_ W P A N# 88 9 0 8-5 2 0 4M -0 1 18 26 34 40 50 3 .3 V S R 5 01 20 22 30 32 36 38 1 0K _ 0 4 W L AN_ EN B U F _ P L T _R S T # 20 mil 24 28 48 52 42 44 46 40 mil 20 mil 25 U S B _P N 7 1 5 U S B _P P 7 1 5 R5 0 2 0_04 3 .3 V W L A N 1. 5V S 3. 3 V 8 0 CL K 3G POWER 25 R 22 1 3. 3 V 6-21-84DA0-226 *0 _0 6 3 G_ 3. 3V Q1 8 A O 34 1 5 S C 65 1 C 25 0 1u _ 6 . 3V _ Y 5V _0 4 D C2 4 1 G 21 27 29 1 0 u_ 1 0 V _ Y 5 V _ 08 0 . 1u _ 1 6V _Y 5 V _0 4 R 2 26 20 K _ 0 4 10 0 K _ 04 D R 23 1 25 3 G_ P W R E N S C 4 81 C 4 93 D02 ADD R522,R520 2 20 u _ 4V _V _ A GN D 0 . 1 u_ 1 6 V _Y 5 V _0 4 SIM CONN JM I N I 1 R5 2 2 1 3 , 2 6, 2 9 , 4 1 P C I E _ W A K E # 3 G_ 3 . 3 V R3 4 1 *0 _ 04 *1 0 K _0 4 R 52 0 1 2 3 G _C L K R E Q # 1 2 C L K _ P C I E _M I N I _ 3 G# 1 2 C LK _ P C I E _ MI N I _3 G * 0_ 0 4 1 3 5 7 11 13 9 15 W AKE# B T _ D A TA B T _ CH CL K C L KREQ # R EF CL KR EF CL K+ G ND 0 G ND 1 G ND GN D 5 2 6 8 10 12 14 16 35 23 25 31 33 25 3G _ D E T # 1 2 P C I E _ R XN 3_ 3 G 1 2 P C I E _ R X P 3 _ 3G 1 2 P C I E _ T XN 3_ 3 G 1 2 P C I E _T X P 3 _ 3G 3 G _3 . 3 V C4 8 3 C 48 8 0 . 1u _ 1 6V _ Y 5V _ 0 4 1 0 u_ 1 0 V _ Y 5 V _ 08 GN D 17 19 37 39 41 43 45 47 49 51 G ND 2 G ND 3 G ND 4 G N D 11 P E Tn 0 P E Tp 0 P E Rn 0 P E Rp 0 N N N N N N N N N N C3 C4 C6 C7 C8 C9 C1 0 C1 1 C1 2 C1 3 UIM UIM UIM UIM UIM _P _D _C _R _V 3G _ 3. 3 V 1. 5 V S WR AT A LK ST PP UIM _ CL K UIM _ RS T W _D I S A B L E # P ERSET # N C (S M B _C L K ) N C (S M B _D A T A ) N C (U S B _D -) N C(U S B _ D+ ) 3 . 3V A U X 1. 5 V _ 1 1. 5 V _ 2 3. 3 V _ 1 N C (L E D _ W W A N # ) LE D _ W L A N # N C (L E D _ W P A N # ) G ND C 66 1 0 . 1 u _1 6 V _ Y 5 V _ 0 4 24 28 48 52 42 44 46 C 6 60 0 . 1u _ 1 6V _ Y 5V _ 0 4 R5 2 1 *0 _ 0 4 3G _ 3. 3 V _ R R 3 38 R 5 23 0 _0 4 1. 5 V S C4 8 4 + C 4 79 22 0 u _4 V _ V _ A D03 DEL R531,R532 & D02 ADD 3.3VS R521,R523,R531,R532 0 . 1u _ 1 6V _ Y 5V _0 4 G ND B - 28 Mini Card 3 G_ 3 . 3V C4 9 0 3 G_ 3 . 3V 88 9 1 0-5 2 0 4M -0 1 UIM _ CL K UIM _ RS T UIM _ P W R U I M_ D A T A U I M_ V P P U I M_ GN D D02 C 7 C 6 C 5 U I M_ D A T A _ R R 3 31 C4 7 8 OP EN *2 2 P _ 50 V _ 0 4 C 17 7 0 66 1 -1 * 1 0m i l _s h o rt C4 7 7 GN D GN D 0 . 1u _ 1 6V _ Y 5V _ 0 4 2, 1 1 , 2 5, 2 8 , 2 9, 30 , 3 4 , 35 , 4 0 V D D 3 1 7 , 2 6 , 34 1 .5 VS 3 , 9 , 10 , 1 1 , 1 2, 1 3 , 1 5, 1 6 , 1 7, 18 , 2 0 , 21 , 2 2 , 23 , 2 4 , 2 5, 2 6 , 2 8, 2 9 , 3 0, 3 1 , 3 2 , 33 , 3 4 , 39 3 . 3 V S 2 , 3, 11 , 1 2 , 13 , 1 5 , 16 , 1 8 , 2 1, 2 4 , 2 6, 2 8 , 2 9, 3 4 , 3 6 , 37 , 3 8 , 41 3 . 3 V U I M _D A T A U I M _V P P C4 7 6 *2 2 P _ 50 V _ 0 4 GN D La you t? 1. SI M? ? ? ? ? ? ? ? ( 10 mi l) 2. ? ? ? ? ? ? ? ? G ND 3. SI M ho ld ? ? ? ? ? G ND ? ? 4. SIM C ON N ? ? MI NI CA RD CO NN 3G _ 3. 3 V 1. 5 V S *4 . 7 K _0 4 GN D 3 G_ E N 25 B U F _ P LT _ R S T # 3 , 1 2, 1 5 , 2 5, 2 6 , 2 9 * 0 _0 4 R3 3 2 *2 2 P _ 50 V _ 0 4 6-86-2B006-001 G ND U S B _ P N6 1 5 U SB_ PP6 1 5 G ND * 22 P _ 5 0V _0 4 6-53-7150A-040 GN D 18 26 34 40 50 20 22 30 32 36 38 U I M_ C LK _ RC 3 C 2 C 1 C 49 5 6-21-84D90-226 GN D *1 0 mi l _ sh o rt U I M_ P W R 0 . 1 u _ 16 V _ Y 5 V _ 0 4 G ND GN D 6 GN D 7 GN D 8 GN D 9 GN D 1 0 R3 4 4 J _ S I M1 L OC K (T OP VI EW ) D02 C 4 89 4 KEY 21 27 29 G ND 3. 3 V _ 0 1. 5 V _ 0 U I M_ P W R U I M _D A T A UIM _ CL K U I M _R E S E T UIM _ V P P Q1 9 MT N 7 0 02 Z H S 3 G MINI-PCIE CARD For 3G + B.Schematic Diagrams 3 .3 VS GN D Schematic Diagrams BT, TPM, MDC, LID 3 .3 VS D02 TPM Function ? ? ? 1 1, 25 1 1, 25 1 1, 25 1 1, 25 L P C_ A D 0 L P C_ A D 1 L P C_ A D 2 L P C_ A D 3 21 1 5 P CL K _ T P M 28 1 3 S 4_ S T A T E # T P M _ B A DD 9 TPM _ PP 7 1 3 12 D03 DEL TEST POINT 8 L CL K 10 19 24 V D D1 V D D2 V D D3 C 2 59 C 6 48 C 2 21 C 2 54 0 . 1 u _ 16 V _ Y 5V _ 0 4 0 . 1 u _ 16 V _ Y 5V _ 0 4 0 . 1 u _ 16 V _ Y 5V _ 0 4 1 u _ 1 0V _ 0 6 5V TP C3 1 9 3 . 3V S TPM L F RA M E # L R E S E T# SE R IRQ CL K R UN # 5 VSB 0 . 1u _ 1 6V _Y 5 V _ 04 R 2 78 R2 7 9 1 0 K_ 0 4 10 K _ 0 4 J TP 1 C2 1 9 L P CP D # D03 DEL TEST POINT 6 2 GP I O G P I O2 T E ST B I/B AD D 25 25 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 C 3 20 13 XTAL I XTAL O NC _ 1 NC _ 2 NC _ 3 14 XTAL O TESTI X6 4 3 C2 3 7 4 11 18 25 G N D _1 G N D _2 G N D _3 G N D _4 Z M2 0 0 S _ 32 . 7 6 8 K H Z 1 2 C 23 0 18 p _ 5 0V _ N P O_ 0 4 C 3 21 C3 2 2 1 u_ 6 . 3 V _ Y 5 V _ 0 4*4 7 p _5 0 V _ 0 4 * 47 p _ 50 V _ 0 4 15 15 XT A L I PP U S B _P N 1 0 U S B _P P 1 0 D03 DEL R280,R281 8 52 0 1 -10 0 5 1 * S L B 96 3 5 T T 5V R 2 68 * 0 _0 6 R 2 69 * 10 m i l_ s h o rt 5 V_ TP S C 29 4 R 2 71 Q2 3 A O3 4 0 9 D 5 VT P 1 M_ 0 4 C 3 03 10 u _ 10 V _ Y 5V _0 8 P C L K _T P M R2 0 4 *3 3 _0 4 C 2 20 1 2 3 4 5 6 7 8 9 10 6-20-94A20-110 1 8 p_ 5 0 V _ N P O _ 04 5 VS As se rt ed be fore enterin g S3 LPC res et t iming : LPCPD# inac tive to LRST# ina ct ive 32~9 6u s 1 2 3 4 5 6 7 8 9 10 TP _C L K TP _D A T A T P _ CL K T P_ DAT A Sheet 28 of 57 BT, TPM, MDC, LID 0 . 1 u _ 16 V _ Y 5V _ 0 4 * 10 p _ 50 V _ 0 4 C 3 04 1u _ 6 . 3V _Y 5 V _ 04 R2 7 2 33 0 K _ 0 4 R2 3 3 *1 0 K _ 04 T P M _ B A DD R2 3 5 10 K _ 0 4 R2 3 4 *1 0 K _ 04 Q2 4 MT N 7 0 0 2 Z H S 3 G 1 3 , 25 , 2 6 , 3 6 , 41 S U S B # S T PM _ PP D 3 .3 VS HI : ACCESS LOW: NORMAL ( In te rn al PD) HI : 4E/ 4F H T PM _BADD LOW: 2E/ 2 F H T PM _PP USB BLUETOOTH JBT LID SWITCH IC D03 DEL R194,R202 R1 8 3 1 2 P C H _ B T_ E N # * 0 _0 4 BT _ EN # 1 0 K _ 04 BT _ EN D D03 DEL R195 D03 3.3V change to VDD3 FOR W870CU V D D3 R 8 U 4 D03 DEL C645 85 2 0 5 -08 0 0 1 D02 ADD R519 V DD 3 1 3. 3 V R5 1 9 D03 3.3V change to VDD3 V CC OU T L I D_ S W # L ID _ SW # 1 21 , 2 5 VC C C 10 M H -2 4 8 0 . 1 u _ 16 V _ Y 5V _ 0 4 PSU1, PSU2 3 D03 W86 ADD R8 1 O UT 2 L I D _S W # 2 LI D _ S W # 2 1, 2 5 PSU1, PSU2 3 MH -24 8 - 7 D03 W86 ADD C10 6-20-41100-108 Q1 6 4. 7 K _ 0 4 U 3 2 GN D Z 2 8 18 Z 2 8 19 US B _ P N 4 US B _ P P 4 B T _ D E T# 1 1 2 3 4 5 6 7 8 G ND 15 15 25 JB L U E T OO TH 1 3 D02 DEL L25, C213, C214, C215 3 8 3 V_ BT 1 2 G S MT N 7 0 0 2Z H S 3 BLUETOOTH POWER ALAZIA MDC DVT ADD POWER CONTROL CIRCUIT 3 .3 V 3 V_ BT 50 mi l 5 0m il R5 1 8 0_06 U 37 4 5 C 67 4 1 0 u _1 0 V _ Y 5 V _ 0 8 25 BT_ EN B T_ E N 3 VIN VIN EN V O UT 1 C6 7 5 R 38 1 1 1 , 2 4 , 31 H D A _ S D OU T 11 , 2 4 , 3 1 H D A _S Y N C 11 HD A _ SDIN 1 11 , 2 4 , 3 1, 33 H D A _ R S T# R 38 0 R 37 9 R 37 8 3 3 _0 4 3 3 _0 4 3 3 _0 4 3 3 _0 4 1 3 5 7 9 11 MD C _ S D O MD C _ S Y N C MD C _ S D I N MD C _ R S T # Max: 0.5inch 2 G ND A z al i a _S G ND A z al i a _S A z al i a _S A z al i a _R RES E RVED RES E RVED 3 . 3V Ma i n/ a u x YN C G ND DI G ND ST # A za l i a_ B C L K DO 8 8 0 18 -1 2 0 G 1 0 u_ 1 0 V _ Y 5 V _ 08 GN D R 17 *0 _ 06 R 14 0_ 0 6 1 .5 V 3 .3 V J M DC 1 6-20-C2D10-206 2 4 6 8 10 12 3 . 3 V _ MD C MD C _ R E S V 1 MD C _ R E S V 2 L7 1 10 mils M DC_ B C L K R1 0 33_04 H C B 1 6 08 K F - 12 1 T 25 10 mils 2 3 .3 V H D A _B I TC L K 1 1 , 24 , 3 1 C5 0 3 3 p_ 5 0 V _ N P O _0 4 3. 3V _ M D C *G 52 4 3 A C 52 C 54 C5 1 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 1 u _6 . 3 V _ Y 5 V _ 0 4 *1 0 u _ 10 V _ 0 8 2 , 1 1 , 2 5, 2 7 , 2 9 , 30 , 3 4 , 3 5, 12 , 1 8 , 2 6, 3 0 , 3 4 , 36 , 3 7 , 3 8, 3 , 9 , 1 0 , 18 , 3 4 , 3 7, 2, 3 , 1 1 , 1 2, 1 3 , 1 5 , 16 , 1 8 , 2 1 , 24 , 2 6 , 2 7, 2 9 , 3 4 , 36 , 3 7 , 3 8, 18 , 2 0 , 2 2 , 23 , 2 4 , 2 5, 3 0 , 3 1 , 32 , 3 3 , 3 4, 3 , 9 , 1 0, 1 1 , 1 2 , 1 3, 1 5 , 1 6 , 17 , 1 8 , 2 0, 2 1 , 2 2 , 23 , 2 4 , 2 5 , 26 , 2 7 , 2 9, 3 0 , 3 1 , 32 , 3 3 , 3 4, 40 41 41 41 39 39 V D D3 5V 1 .5 V 3 .3 V 5 VS 3 .3 VS BT, TPM, MDC, LID B - 29 B.Schematic Diagrams 22 16 27 15 1 1 ,2 5 L P C _ F RAM E# 3, 15 , 2 4 , 4 1 P LT _ R S T# 1 1 ,2 5 S E RI R Q 1 3 , 2 5 P M_ C L K R U N # L A D0 L A D1 L A D2 L A D3 3 .3 V CLICK(M/B side) U 17 26 23 20 17 G TPM 1.2 Schematic Diagrams LAN, RTL8111L, RJ45 RTL8111DL FOR RTL8102EL/8103EL 3 . 3V R7 3 L A N_ V DD 3 40 mi l . must be within 0.5cm 0.5cm (to pin 1) C TR L 12 A C 81 C1 2 0 L 12 D03A L12? ? (? TN120T) F OR R TL PI N1 ,2 9,3 7, 40 Sheet 29 of 57 LAN-RTL8111DL, RJ45 C 10 9 C 1 08 2 2u _ 6. 3V _ Y 5 V _ 0 8 0 . 1 u _1 6 V _Y 5 V _0 4 ? ? ? IN DU CT OR ( 60 0mA ) D03 DEL U33,R386,R385,C583 D 10 A L A N_ V DD 3 >40 MI LSR 69 *0 _ 0 6 R7 2 0_ 0 6 DV D D1 2 L A N_ V DD 3 L A N _V D D 3 >40 MI LSR 71 0 _ 06 R 70 2. 4 9 K _ 1% _ 0 4 1 u _1 6 V _ X5 R _0 6 D V DD 1 2 60 mi l C1 2 6 C1 2 8 C1 2 1 C1 4 3 C1 4 6 0. 1u _ 16 V _ Y 5 V _ 0 4 0. 1u _ 16 V _ Y 5 V _ 0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _ Y 5 V _ 0 4 F OR R TL PI N1 0, 13, 30 ,3 6, 39 R9 6 R9 3 1 K _0 4 1 5K _ 0 4 R S TB R9 7 * 1 0m i _l s h ort D03 NET CHANGE TO LAN_PCIE_WAKE# XT AL 1 B U F _ P L T_ R S T# 3 , 1 2, 1 5 , 2 5, 2 6 , 2 7 R 3 57 L AN_ PCIE_ W A KE# 2 5 LA N _ C L K R E Q # 1 2 3 . 3V * 10 m li _ s ho r t X2 C 5 11 0 . 1 u _1 6 V _Y 5 V _0 4 C 5 12 0 . 0 1 u_ 1 6V _ X 7 R _ 04 R 3 65 2 1 XT AL 2 X 8 A 0 25 0 0 0F G 1 H _ 25 M H z C 1 05 R 10 1 D V D D 1 2_ 3 L ED1 /E ESK LE D 2/ E E D I L E D3 /E E DO E E CS GN D _ 3 D V D D 12 _ 2 V D D 33 _ 1 I S O LA T E B P ERST B L ANW A K EB CL K RE Q B 37 38 39 40 XTAL 1 41 XTAL 2 42 E N S W RE G 4 3 C T R L 12 / V D D 4 4 45 46 R SET 47 48 C T R L 12 A V D D 3 3_ 2 L E D0 A V D D 1 2_ 2 A V D D 3 3_ 2 C K TA L 1 C K TA L 2 E N S W RE G V D DS R_ 1 V D DS R_ 2 RS E T GN D _ 4 S R OU T 1 2 PCI-E LAN R TL 81 11 DL C1 0 4 * 10 m li _ s ho r t 22 p _ 50 V _ N P O _0 4 L AN_ VDD 3 FOR RTL8102EL/8103EL D V D D 12 C 96 1u _ 1 6V _ X 5 R _ 06 S B _ I S O LA TE B # 1 6 3 . 3V S I S OL A T E B DV D D1 2 LA N _ V D D 3 *1 0 K _ 04 3 . 6 K _ 1% _ 0 4 LA N _ V D D 3 C9 3 F OR RT L PI N1 9 D03A ADD NET SB_ISOLATEB# A S D 7 5 1V C 36 35 34 33 32 31 30 29 28 27 26 25 U1 1 FOR RTL8102EL/8103EL ? ? ? E V D D 12 4 0 mil R6 2 0_ 0 6 R5 5 2 R 5 51 D V D D 12 D03A ADD R551 3.6K & R552 R6 3 0_ 0 6 S W F 2 5 20 C F -4 R 7M -M C 13 6 0 . 1 u_ 1 6V _Y 5V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 04 0 . 1 u_ 1 6 V _Y 5 V _0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 1A 2 2p _ 50 V _ N P O _ 04 4 . 7 K _0 4 J _ R J 4 5_ 1 D LM X1 + 1 D LM X1 - 2 D LM X2 + 3 D LM X3 + 4 D LM X3 - 5 D LM X2 - 6 D LM X4 + 7 D LM X4 - 8 D03A ADD NET G NG D N C/S M DA T A N C/S M CL K E GN D H S ON HS O P E V DD1 2 R E F C L K _N R E F CL K _ P HS IN H SIP G ND_ 2 D V D D 1 2_ 1 24 23 22 21 20 19 18 17 16 15 14 13 L A N _ D S M # 25 PCIE_ RXN 2_ GL AN _C 0 . 1 u _1 0 V _ X7 R _ 0 4 PCIE_ RXP2 _ GL AN_ C 0 . 1 u _1 0 V _ X7 R _ 0 4 C1 4 5 C1 4 4 D03 LP12 CHANGE TO RN21 P C I E _ R X N 4_ GL A N 12 P C I E _ R X P 4 _G LA N 1 2 E V D D 12 C LK _P C I E _ GL A N # 1 2 C L K _ P C I E _ GL A N 12 P C I E _ T XN 4 _G LA N 1 2 P C I E _ TX P 4 _ GL A N 1 2 R N2 1 4 3 2 1 5 6 7 8 D A+ D AD B+ D C+ D CD BGN D 1 D D + GN D 1 D D- GN D 2 GN D 2 C 1 15 C 1 17 0. 1 u _ 16 V _ Y 5 V _ 0 4 C 1 0 0A 8 - 1 0 8A 4 - Y M D I O 0+ M D I O 0M D I O 1+ M D I O 1- Q7 S D V DD 3 *A O 3 41 5 G C 71 MD I O3 + M D I O 3- M D I O2 + M D I O2 - M D I O 1+ M D I O1 - M D I O 2+ M D I O 2M D I O 3+ M D I O 3- 12 11 9 8 6 5 3 2 10 7 4 1 DVD D1 2 L A N_ V D D3 DVD D1 2 MD I O0 + M D I O 0LA N _ V D D 3 D0 2 DE L L9 L4 6 DV DD 1 2 1 2 3 4 5 6 7 8 9 10 11 12 2 2 u_ 6 . 3 V _Y 5 V _0 8 A V D D 33 _ 1 M DIP0 MD I N 0 FB1 2 M D IP1 M DIN1 G N D _1 M DIP2 M DIN 2 A V D D 12 _ 1 M DIP3 MD I N 3 *0 _ 8P 4 R _0 4 C7 0 T D4 T D4 + T D3 T D3 + MX 4 M X4 + MX 3 M X3 + T D2 T D2 + T D1 T D1 + MX 2 M X2 + MX 1 M X1 + T CT 4 T CT 3 T CT 2 T CT 1 GS T 5 00 9 LF MC T 4 MC T 3 MC T 2 MC T 1 R4 0 *1 0 0 K _0 4 C5 7 2 C 57 3 C5 7 4 C 57 5 0 . 01 u _1 6 V _ X7 R _0 4 0 . 0 1 u_ 1 6V _ X 7 R _ 0 4 0 . 01 u _1 6 V _ X7 R _0 4 0 . 0 1u _ 1 6V _ X 7 R _ 04 R3 6 * 3 30 K _ 04 D 19 20 22 23 R1 0 0 G NG D LM X3 + LM X3 LM X4 + LM X4 - R N 22 15 18 21 24 4 3 2 1 5 6 7 8 N M C T _4 N M C T _3 N M C T _2 N M C T _1 R3 6 6 R3 6 7 R3 6 8 R3 6 9 D03 LP16 CHANGE TO RN22 7 5 _ 1% _ 04 7 5 _ 1% _ 04 7 5 _ 1% _ 04 7 5 _ 1% _ 04 N M C T _R 1 00 0 p_ 2 K V _ X 7R _1 2 _ H 1 25 0 _ 04 LA N _V D D 3 R9 9 *1 0 K _ 04 *M TN 7 00 2 Z H S 3 1 3 , 26 , 2 7 , 41 P C I E _W A K E # P C I E _W A K E # L A N _P C I E _ W A K E # LA N _ P C I E _ W A K E # 2 5 *1 0 0 K _0 4 D 02 W ak e up o n L A N f u n ct i o n? ? ? D 02 W ak e up o n L A N f u n ct i o n? ? ? LM X1 + LM X1 LM X2 + LM X2 - GN G D D03A DEL NET GLAN_ON R4 7 6 -2 1 - 64 Y 0 0- 1 0 8 C5 1 0 D03 BOM ADD R100 B - 30 LAN, RTL8111L, RJ45 13 14 16 17 *0 . 1 u_ 1 6 V _Y 5 V _0 4 Q 8 G L P 13 S B 0 40 2 T L- 0 4 0 LM X1 + 1 8 D LM X1 - 2 7 D LM X2 + 3 6 D LM X2 - 4 5 D L P 17 S B 0 40 2 T L- 0 4 0 L MX 3 + 1 8 D L MX 3 - 2 7 D L MX 4 + 3 6 D L MX 4 - 4 5 D * 0_ 8 P 4 R _ 04 *0 . 0 1 u_ 5 0V _X 7 R _ 0 4 S B.Schematic Diagrams C8 2 10 0M Hz/ 10 0 FOR RTL8102EL/8103EL ? ? ? *0 _ 06 must be within . L8 H C B 1 6 08 K F -1 2 1 T2 5 2 , 1 1, 2 5 , 2 7, 2 8 , 3 0, 3 4 , 35 , 4 0 V D D 3 3 , 9 , 10 , 1 1 , 12 , 1 3 , 15 , 1 6, 17 , 1 8, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 2 6 , 2 7, 2 8 , 3 0, 3 1 , 3 2, 3 3 , 34 , 3 9 3. 3V S 2 , 3 , 1 1, 1 2 , 1 3, 1 5 , 1 6, 1 8 , 2 1, 2 4 , 2 6, 2 7 , 2 8, 3 4 , 3 6, 3 7 , 38 , 4 1 3. 3V Schematic Diagrams Fan, CCD, LED, Screw Hole CPU FAN CONTROL CASE FAN CONTROL 5 VS U1 8 U 15 1 0 u _1 0 V _ Y 5 V _0 8 * 10 K _ 0 4 F ON 3#1 2 3 4 C2 2 7 C2 2 4 0. 1u _ 16 V _ Y 5 V _ 0 4 1 0u _ 1 0V _ Y 5V _ 0 8 F ON VIN V OU T VSET 8 7 6 5 GN D GN D GN D GN D F OR PO WE R BU TT ON BO AR D C ASE_ FAN 2 5 CPU_FAN 5 V S _ CA S E F A N F ON 3# JF A N 1 C 68 1 1 0u _ 1 0V _ Y 5V _ 0 8 0 . 1 u_ 1 6 V _Y 5 V _0 4 C 2 28 C6 8 0 10 u _1 0 V _ Y 5 V _ 08 0. 1 u _ 16 V _ Y 5 V _ 0 4 * 0_ 0 4 1 0 u _1 0 V _ Y 5 V _0 8 4 . 7K _ 0 4 C D 18 GN D GN D GN D GN D 1 A S C S 5 51 V -3 0 VDD 3 BATT CHARGE FULL R5 1 1 10 0 _0 6 10 0 _ 06 D3 1 4 2 3 1 A P E 88 7 2 25 CCD 5 VS_ VG AF AN F O N2 # VDD 3 R5 1 0 2 1 8 , 2 0, 2 2 , 2 3, 24 , 2 5, 28 , 3 1, 32 , 3 3, 34 , 3 9 5V S 1 2, 18 , 2 6, 28 , 3 4, 36 , 3 7, 38 , 4 1 5V 3 , 9, 10 , 1 1, 12 , 1 3, 15 , 1 6, 17 , 1 8, 20 , 2 1, 22 , 2 3, 24 , 2 5, 26 , 2 7 , 28 , 2 9 , 31 , 3 2 , 33 , 3 4 , 39 3 . 3 V S 3 4, 3 5 V D D5 2 , 1 1 , 25 , 2 7 , 28 , 2 9 , 34 , 3 5 , 40 V D D 3 8 7 6 5 V GA _ F A N J_ V G A F A N 1 1 2 3 R1 6 2 C2 0 6 C 68 2 *0 _ 04 1 0u _ 1 0V _ Y 5V _ 0 8 L E D _ B A T _ C H G# 2 5 L E D _B A T _ C H G# R 3 54 * 0_ 0 6 5V R 3 51 0_06 Q 26 A O 34 0 9 S D K P B -3 02 5 S Y K C GK C L E D_ B A T _ F UL L # 2 5 L E D _B A T _ F U L L # 5 VS 6-20-51130-103 V C C _C C D C 4 99 1 u_ 6 . 3 V _Y 5 V _0 4 R 35 3 C5 0 4 C 50 5 0 . 1u _ 1 6V _ Y 5V _ 0 4 1 0 u_ 1 0 V _Y 5V _0 8 1 0 0K _ 0 4 J_FAN1 3 R3 4 7 R4 9 5 C D 30 4 . 7 K _ 04 V D D3 1 V D D3 6 8K _ 1 % _0 4 A S C S 5 5 1 V -30 R 34 9 ACIN PWR/SUS 3 3 0 K _1 % _ 06 D Z 1 8 41 CCD _ E N C CD_ E N Q2 7 2 N 7 0 02 _ E G R 5 12 R 51 3 1 00 _ 0 6 1 0 0_ 0 6 V C C_ CC D 2 S 25 H3 3 H 6 _ 0 D 3 _7 H1 0 H7 H 6 _ 5D 3 _7 H 6 _ 5 D 3 _ 7 USB _ PN8 1 5 USB _ PP 8 1 5 C C D _ D E T # 25 85 2 0 5-0 5 0 01 6-20-51150-105 H2 4 ? ? ? 2 3 4 5 ? ? ? H1 H2 6 H 28 H2 H2 5 H 27 H9 C 1 5 8D 15 8 C 1 5 8 D 1 5 8 C 15 8 D 1 5 8 C 1 5 8D 15 8 C 1 5 8 D 1 58 C 15 8 D 1 5 8 C 2 76 D 27 6 N 9 8 7 6 2 3 4 5 9 8 7 6 2 3 4 5 MT H 7 _ 0D 2 _8 M6 M-M A R K M8 M -MA R K M4 M-M A R K M7 M-M A R K M3 M -MA R K M5 M-MA R K M1 M-M A R K 2 3 4 5 9 8 7 6 2 3 4 5 9 8 7 6 2 3 4 5 MT H 7_ 0 D 2 _ 8 1 1 MT H 7 _ 0 D 2 _8 9 8 7 6 1 M TH 7_ 0 D 2 _ 8 1 1 1 9 8 7 6 M TH 7 _0 D 2 _ 8 H 8 9 8 7 6 2 3 4 5 2 3 4 5 1 M TH 7 _0 D 2 _ 8 2 3 4 5 25 L E D _P W R # 25 L E D _A C I N # H1 9 9 8 7 6 1 2 3 4 5 M T H 7 _0 D 2_ 8 H 22 9 8 7 6 1 D 32 K P B -3 0 2 5S Y K C G K C L E D_ A C IN# D03 ADD SPT6,SPT7,SPT8 H 13 1 2 3 L E D_ P W R # S P T8 S MD 8 0 X 80 1 2 3 4 5 M TH 7_ 0 D 2 _ 8 2 3 4 5 SPT7 S MD 80 X 8 0 1 1 1 1 1 1 SPT6 S MD 8 0X 8 0 H 12 1 H 6 9 8 7 6 SPT4 S M D 8 0 X8 0 H 14 1 H3 MT H 7 _ 0D 2 _8 S P T5 S M D 8 0 X 80 1 H1 5 1 MT H 7 _ 0 D 2 _8 H1 8 M2 M-M A R K SPT2 S MD 80 X 80 1 H1 1 1 SPT3 S MD 8 0X 8 0 1 1 H 35 H 34 H3 0 H2 9 H 8_ 0 D 4 _ 1 H 8 _0 D 4 _ 1 H 8 _ 0D 4 _1 H 8 _ 0 D 4 _ 1 1 1 SPT1 S M D 8 0X 8 0 H3 2 H3 1 H 36 H 7 _ 0D 4_ 1 H 7 _ 0 D 4 _ 1 H 7_ 0 D 4 _ 1 4 GREEN US B _ P N8 US B _ P P 8 CC D_ DE T # 3 1 2 3 4 5 1 H3 9 H 40 H 4 H1 6 H 7 _ 0D 3 _7 H 7_ 0 D 3 _ 7 H 7 _0 D 2 _ 8 H 7 _ 0D 2 _8 1 5 H3 7 H 38 H 6 _ 5D 3 _7 H 6_ 5 D 3 _ 7 ORANGE J CC D1 JCCD H1 7 H5 C 9 1 D 9 1N C 9 1D 9 1N Sheet 30 of 57 Fan, CCD, LED, Screw Hole 85 2 0 5-0 3 7 01 0 . 1 u_ 1 6 V _Y 5 V _0 4 D02 EMI ADD 2 5 VG A_ F ANSEN 3 .3 V S D02 EMI ADD 1 C 19 6 0 . 1 u_ 1 6 V _Y 5 V _0 4 R2 0 3 G C 17 4 34 0 . 1u _ 16 V _ Y 5 V _ 0 4 6-20-51130-103 3 2 5 C A S E _F A N S E N 3 .3 V S U 14 FO N VIN V O UT VSET M _B T N # C6 8 4 8 5 20 5 - 0 37 0 1 D02 EMI ADD J_FAN1 D02 EMI ADD J_FAN1 A S C S 5 5 1 V -30 * 10 K _ 0 4 F ON 2# 1 2 3 4 R1 5 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 -7 6-20-94A50-104 1 VGA FAN CONTROL1 5V S 1 2 3 3 4 . 7 K _ 04 C D 17 J_ P W R 1 6-20-51130-103 6-20-51130-103 D02 EMI ADD R1 8 9 25 8 5 20 5 -0 37 0 1 85 2 0 5-0 3 7 01 2 5 C P U_ F A N S E N 3 .3 V S C IR_ RX C6 8 3 88287-04001 1 2 3 R 20 7 1 2 3 C2 0 8 *0 _ 04 CIR_ R X H2 0 9 1 MT H 7 _ 0D 2 _8 7 6 2 3 4 5 H2 3 9 1 MT H 7 _ 0 D 2 _8 7 6 2 3 4 5 1 9 8 7 6 MT H 7_ 0 D 2 _ 8 H2 1 1 M TH 7 _0 D 2 _ 8 9 8 7 6 2 3 4 5 1 9 8 7 6 MT H 7 _ 0 D 2 _8 Fan, CCD, LED, Screw Hole B - 31 B.Schematic Diagrams J_ C P U F A N 1 R1 6 6 1 2 3 4 1 2 3 4 C P U _F A N 2 5 5 V S _ CP UF A N 5 VS J _ CIR 1 A P E 88 7 2 F O N1 # VD D5 FOR W870CU A P E 8 8 72 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 8 7 6 5 ORANGE C 19 9 GN D GN D GN D GN D 4 C 19 1 R2 0 8 FO N VIN V O UT VSET GREEN * 10 K _ 0 4 F ON 1# 1 2 3 4 R1 6 9 3 5V S Schematic Diagrams Azalia Codec ALC888 *1 0 mi l _ sh o rt C 3 09 0. 1u _ 10 V _ X 7R _ 04 C 2 23 0. 1u _ 10 V _ X 7R _ 04 C 4 10 0. 1u _ 10 V _ X 7R _ 04 C 4 96 0. 1u _ 10 V _ X 7R _ 04 C 2 22 0. 1u _ 10 V _ X 7R _ 04 C 2 89 0. 1u _ 10 V _ X 7R _ 04 3. 3 V S L 34 2 H C B 1 6 08 K F - 1 2 1T 2 5 1 AUD G 5 V S _A U D Z 2 50 1 10 u _1 0 V _ Y 5 V _ 08 0 . 1 u_ 1 6 V _Y 5V _0 4 C 3 58 C 31 3 0 . 1 u_ 1 6 V _Y 5 V _0 4 *1 0 K _0 4 2 3 C3 5 4 33 11 H DA _ S P K R 25 K B C _B E E P 1 u_ 6 . 3 V _Y 5V _0 4 SPD IF-OU T C 4 09 1 u_ 6 . 3 V _Y 5V _0 4 B E E P R3 0 8 R3 0 9 R3 0 6 10 K _ 1 % _0 4 MIC_ S ENS E HP_ S ENSE R3 0 7 R2 9 2 20 K _ 1 % _0 4 39 . 2 K _ 1 %_ 0 4 Z 2 50 3 Z 2 50 4 Z 2 50 5 Z 2 50 6 Z 2 50 7 5 6 8 10 11 S B S S R 47 L 35 Z 2 5 3 4 C 3 11 0 . 1u _ 16 V _ Y 5 V _ 0 4 F C M1 0 0 5K F -1 0 2 T0 2 1 0K _ 0 4 Z 2 5 1 0 Z 2 50 9 1 K _0 4 C 3 74 1 u _ 6. 3 V _ Y 5 V _ 04 C 39 4 LINE_ S ENS E 3 3 _ 04 3 3 _ 04 3 3 _ 04 3 3 _ 04 3 3 _ 04 Max: 0.5inch E A P D _ MO D E C 4 08 G P I O0 G P I O1 2 2p _ 5 0V _ N P O_ 04 R 29 0 R 29 3 R 29 4 R 30 1 R 30 2 11 , 2 4 , 28 H D A _ S D O U T 1 1 , 2 4, 2 8 H D A _B I TC LK 11 HDA _ S D I N0 11 , 2 4 , 28 H D A _ S Y N C 1 1, 2 4 , 2 8, 3 3 H D A _ R S T # 0 . 1 u _1 6 V _ Y 5 V _ 04 0. 1 u _1 6 V _ Y 5 V _ 04 C 3 07 C3 0 6 10 u _1 0 V _ Y 5 V _ 08 10 u _ 10 V _ Y 5 V _ 08 M I C 1 -V R E F O-L MI C 1- V R E F O-R DIGITAL M I C 2 -V R E F O LI N E 2 -V R E F O F R ON T- O U T -L F R O N T - OU T-R P CBE EP L I N E 2 -L L I N E 2-R S en s e A (JD 1) S en s e B (JD 2) 37 29 J D _S E N S E 1 1 K _ 04 C3 7 6 C3 7 7 1u _ 6. 3 V _ Y 5 V _ 0 4 1u _ 6. 3 V _ Y 5 V _ 0 4 A _ M I C2 L A _ M I C2 R C3 8 7 C3 8 8 4 . 7u _ 6 . 3V _ Y 5V _ 0 6 4 . 7u _ 6 . 3V _ Y 5V _ 0 6 Z 2 51 6 Z 2 51 7 ANALOG J DR E F M I C1 -L M I C1 -R * 33 0 p_ X 7 R _ 0 6 J I NT M IC1 1 1 2 2 88 2 3 1- 0 2 0 01 6 -2 0 - 43 1 6 0- 1 0 2 J _S P D I F 1 R 34 5 S P D I F O- M X M 0 _ 04 S P D I F J -OU T L44 F C M1 0 05 K F -1 0 2T 0 2 R 3 46 * 2 20 _ 04 C4 9 7 18 0 p _5 0 V _ N P O _0 4 A U DG H E A D P H O N E -L H E A D P H O N E -R 30 31 MI C 2 - V R E F Z 25 2 1 35 36 LI N E _ OU T _ L LI N E _ OU T _ R 14 15 L_ H P _O U T _ A R _ H P _ OU T_ A 43 44 R I GH T _O U T LE F _ O U T L I N E _ OU T_ L 3 2 L I N E _ OU T_ R 32 R I G H T _ OU T 3 3 L E F _O U T 3 3 S IDE - L S IDE - R L I N E 1 -L L I N E 1-R 40 JD R E F 23 24 Z 25 2 6 Z 25 2 7 R 27 7 2 0 K _ 1% _ 04 C3 8 9 C3 9 0 4 7 5 _ 04 7 5 _ 04 L I N E -L L I N E -R LI N E _ S E N S E J _ L INE1 F C M 1 00 5 K F -1 21 T 03 LI J -R F C M 1 00 5 K F -1 21 T 03 LI J -L 5 4 3 6 2 1 L4 0 LI N E -L 6-2 0- B2 88 0- 006 2 S J -T 35 1 -0 18 A UD G C4 7 2 C 4 75 AUD G 10 0 p_ 5 0 V _N P O_ 0 4 M I C 1 -V R E F O _ R R3 3 6 2 . 2 K _0 4 M I C 1 -V R E F O _ L R3 3 3 2 . 2 K _0 4 M I C 1 _R R3 3 7 7 5 _0 4 E X T _ MI C 1 _ R L 43 H C B 1 6 0 8K F - 1 2 1 T2 5 M I C 1 _L R3 3 5 7 5 _0 4 E X T _ MI C 1 _ L L 42 H C B 1 6 0 8K F - 1 2 1 T2 5 A U DG M IC_ S E N S E J_ M I C T 1 5 4 3 6 2 1 A _M I C J 1 -R A _M I C J 1 -L C 4 82 1 C 4 80 1 0 0 p_ 5 0V _N P O_ 0 4 1 0 0 p_ 5 0 V _N P O_ 0 4 A UD G 2 6 A U DG MIC IN 2S J -T 3 51 -0 1 8 6- 20 -B 28 80- 00 6 A U DG SOLDER SIDE VIEW L ayo ut N ot e: U 13 pi n 1 ~ p in 11 an d pi n 4 7 and p in 48 a re Di git al s ign al s. T he ot her s ar e A na log s ig nal s. L ayo ut N ot e: ( 1)M IC 1-L (U 13. 21 ) (2 )M IC1 -R ( U1 3.2 2) ( 3)L IN E-L ( U1 3.2 3) (4 )L INE -R (U 13 .2 4) ( 5)C D_ L ( U1 3.1 8) (6 )C D_G (U 13 .1 9) ( 7)C D_ R ( U1 3.2 0) ? ? ? ? ? ? AUD G, ? ? ? ? ? ? ? + 5VS & +V IN p lan e. B - 32 Azalia Codec ALC888 LINE IN (SURR ) 6-2 0- B2 88 0- 006 A UDG J_HP1, J_MIC1 5 R 31 1 R 31 2 L4 1 LI N E -R A UDG 3 Z 25 2 8 Z 25 2 9 please close the Codec. 2 S J-T 3 5 1- 0 1 8 L ayo ut N ot e: C D_R & CD _G & CD _L mu st p ara ll el ro ut ing t o a ud io C ode c. Th e sp ace m ust b e equ al . To A UD IO AU DG C OD EC Signal:Space = 1:1 CD _R Signal:Space = 1:1 F rom CD _G Signal:Space = 1:1 C D-R OM CD _L Signal:Space = 1:1 AU DG A UD G 4 . 7u _ 6 . 3V _ Y 5V _ 0 6 4 . 7u _ 6 . 3V _ Y 5V _ 0 6 1 00 p _5 0 V _ N P O _0 4 A U DG D 0 2 AD D NE T 33 33 A U DG 5 4 3 6 2 1 D02 BOM ADD 24 S P D I F -O U T MI C 1 - V R E F O_ L MI C 1 - V R E F O_ R L38 1 2 H C B 2 01 2 K F -5 0 0T 4 0 1 0u _ 1 0V _ Y 5V _ 0 8 26 42 A L C 8 88 -V C 2-G R C 24 8 28 32 C3 5 5 33 N C3 C D -L C D -G N D C D -R 21 22 Z 25 1 8 45 46 N C5 N C4 M I C2 -L M I C2 -R 18 19 20 MI C 1_ L MI C 1_ R 2 . 2K _ 0 4 CEN L FE N C1 N C2 16 17 27 39 41 S U R R - O U T -L S U R R - OU T-R * 0 . 1u _ N P O _0 4 M 57 0U co nn ec to r MI C 2 VR EF S P DIF O 12 A UDG M I C2 R3 1 0 D A T A -OU T I T-C LK D A T A -I N Y NC ESET# A U DG E APD 48 13 34 D0 3 A R 2 9 2 c o nn e c t t o JD _ S EN C E 1 DVS S1 D VSS2 B.Schematic Diagrams U2 6 R 2 25 C 3 12 1 u _6 . 3 V _ Y 5 V _0 4 R 2 85 AUD G MI C 2-V R E F C 3 65 C3 2 4 A U DG Sheet 31 of 57 Azalia Codec ALC888 5 VS L36 C 3 10 0 . 1 u _1 6 V _ Y 5 V _ 04 H C B 1 60 8 K F -1 2 1T 2 5 *1 0 mi l _ sh o rt 25 38 R 31 7 A V DD 1 A V D D2 *1 0 m il _ sh o rt C 3 08 AVSS1 AVSS2 R 33 4 A U DG 4 7 R 24 2 AUD G 1 9 * 1 0m i _l s h ort D VDD 1 DV D D2 R3 3 0 HP _ S E NS E J _H P 1 33 HP _ P L UG H E A D P H ON E -R C 4 9 2 4 . 7 u_ 6 . 3 V _X 5 R _ 0 6 R3 4 2 7 5_ 0 4 H E A D P H ON E -L C 4 8 5 4 . 7 u_ 6 . 3 V _X 5 R _ 0 6 R3 3 9 7 5_ 0 4 HP _ P L UG 5 4 3 6 2 1 HP -R HP -L C 48 7 1 0 0p _ 5 0V _ N P O_ 04 1 0 0p _ 5 0V _ N P O_ 0 4 R3 4 3 1 K _0 4 R3 4 0 1K _ 0 4 6 -2 0-B 28 80 -0 06 A UDG A UD G HEADPHO NE 2 S J- T3 5 1-0 1 8 C 49 4 A U DG A UDG AU DG 3 , 9 , 10 , 1 1 , 12 , 1 3 , 15 , 1 6 , 17 , 1 8 , 20 , 2 1 , 22 , 2 3 , 24 , 2 5, 26 , 2 7, 28 , 2 9, 3 0 , 3 2, 3 3 , 3 4, 3 9 3 . 3V S 1 8 , 20 , 2 2, 23 , 2 4, 25 , 2 8, 3 0 , 3 2, 3 3 , 3 4, 3 9 5 V S 32 5 VS_ AUD Schematic Diagrams SRS-AP8202, SATA ODD & HDD D0 2 SR S FU N CT I O N D I SA B L E * 10 m li _ s ho rt * 10 m il _ s ho rt 0 _ 04 0 _ 04 U1 9 *1 u _6 . 3 V _Y 5 V _0 4 S R S _ LI N 3 9 *1 u _6 . 3 V _Y 5 V _0 4S R S _ R I N 3 8 L IN RIN LO U T RO UT Z 2 70 5 2 0 Z 2 70 6 2 2 Z 2 70 7 2 4 L F OC U S B UF L BUF R R F OC U S S R S _ LO U T S R S _ R OU T 27 28 2 Z 27 3 0 R 2 3 9 41 Z 27 3 1 40 Z 27 3 2 C 2 7 6 42 Z 27 3 3 44 1 25 23 Z 27 3 8 Z 27 3 9 Z 27 4 0 Z 27 4 1 16 Z 27 4 3 37 35 Z 27 4 4 S R S _ L OU T 3 3 S RS _ RO UT 3 3 *1 0 K _0 4 Z 2 7 34 R 2 40 *4 . 7K _ 0 4 Z 2 7 35 R 2 51 C 2 77 *0 . 1 u _1 6 V _ Y 5 V _0 4 *0 . 1 u_ 1 6V _ Y 5V _ 0 4 Z 2 7 36 R 2 64 R 2 50 *4 . 7K _ 0 4 R 2 45 *1 0 K _ 04 Z 27 3 7 R 2 5 2 *2 K _ 04 R 2 41 *2 . 2 K _0 4 *2 . 2 K _0 4 *2 K _ 04 AP8202Q MOD E R2 4 6 *1 0 K _0 4 R2 5 3 Z 27 4 2 *8 . 6 6K _ 1 % _0 4 C 2 82 R2 4 7 *1 0 K _0 4 C VR EFB VREF 18 Z 2 7 53 1 7 *0 . 0 18 u _ 16 V _ X7 R _0 4 E 5V S _ A U D Q 22 *D TA 1 1 4E U A C 2 60 Z 2 75 5 Q2 1 *2 N 7 0 0 2 G S R S _E N 16 H IGH BYP AS S L OW WOW PIN31 BASSBYPB OPEN - -- >Tr ueBa ss 6 dB C 26 9 *0 . 1u _ 1 6V _ Y 5 V _ 04 *1 0u _ 10 V _ Y 5 V _0 8 *1 0 u_ 1 0V _Y 5V _ 0 8 *1 0 u _1 0 V _Y 5V _ 0 8 C 2 85 C2 1 6 C 28 6 *0 . 1 u_ 1 6V _Y 5 V _ 04 D03 DEL TEST POINT VD A C OM P C 2 C2 7 3 N C1 T B GA I N N C2 BASSBYPB F OC U S B Y P B G A ININ NC 3 N C4 5 V S _A U D VR EFB Sheet 32 of 57 SRS-AP8202, SATA ODD & HDD V RE F B RF O UT LF O U T L W PI R W PI 12 19 21 31 32 33 34 43 V RE F B LWO C 2 35 *0 . 0 82 u _ 10 V _ X5 R _0 4 RW O C 22 6 * 2 2p _ 50 V _ N P O _0 4 RW N I Z 2 7 08 *3 0 . 1K _ 1 % _0 4 Z 27 0 9 R2 0 9 *6 2 K _1 % _ 04 R2 1 8 Z2710 26 R2 1 3 *6 2 K _1 % _ 04 R2 1 0 * 1 5K _ 0 4 C 24 0 * 2 2p _ 50 V _ N P O _0 4 C 22 9 * 10 0 0 p_ 5 0V _ X 7 R _ 04 L W N I Z 2 71 1 3 CB3 Z 2 7 1 7 Z 2 71 2 R 22 7 * 2 2K _ 0 4 C 2 5 6 * 0. 1 u _1 6 V _ Y 5 V _0 4 R 2 2 8 4 CB3 B R 23 2 * 4 . 7K _ 0 4 C 2 5 2 * 0. 1 u _1 6 V _ Y 5 V _0 4 *6 2 K _ 1% _ 04 Z 2 71 3 5 CB2 Z 2 71 4 6 Z 2 71 5 7 CB2 B Z 2 7 1 8 C 2 4 7 * 0. 1 u _1 6 V _ Y 5 V _0 4 R 2 2 3 CB1 8 R 22 4 * 1 8K _ 1 %_ 0 4 C 2 4 2 * 0. 1 u _1 6 V _ Y 5 V _0 4 *3 9 K _ 04 CB1 B 10 R 22 2 * 3 K _1 % _0 4 MI X OU T R 21 2 * 1 5K _ 0 4Z 2 7 1 9 C 2 3 8 * 0. 1 u _1 6 V _ Y 5 V _0 4 R 2 1 9 Z 2 71 6 R 21 5 * 2 . 2K _ 0 4 C 2 3 2 * 0. 1 u _1 6 V _ Y 5 V _0 4 *3 0 K _ 1% _ 04 Z 2 72 0 Z 2 72 1 9 R2 1 1 *8 . 8 7 K _1 % _0 4 F OU T 11 Z 2 72 2 BP2 C 21 8 *0 . 1u _ 1 6V _ Y 5 V _ 0 4 Z 2 72 3 13 BP2 B 14 R1 9 8 *1 5K _ 0 4 Z 2 72 4 BP1 B 15 C 21 7 *0 . 1u _ 1 6V _ Y 5 V _ 0 4 Z 2 72 5 BP1 Z 2 7 26 R 1 9 7 Z 2 75 4 2 9 *1 5K _ 0 4 C 2 46 *0 . 1 u_ 1 6 V _Y 5V _ 0 4 C O MP I R 1 96 *2 0K _ 0 4 Z 2 72 7 3 6 F W RIN R2 4 4 *3 0 K _1 % _ 04 R2 4 3 *3 0 K _1 % _ 04 *AP8 202 47K C 2 74 * 10 u _1 0 V _ Y 5 V _0 8 PIN31 BASSBYPB Lo w --- >ByPa ss . PIN32 Focu sBYPB OPEN - -- >Fo cus . PIN32 Fou sBYPB Lo w--- >ByPa ss A U DG A UD G A U DG V RE F B AUD G 5 VS _ AUD 3 1 5 VS 1 8 , 2 0, 2 2 , 23 , 2 4 , 25 , 2 8 , 30 , 3 1, 3 3 , 3 4, 3 9 3 . 3V S 3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 15 , 1 6 , 17 , 1 8, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 25 , 2 6 , 27 , 2 8, 2 9 , 3 0, 3 1 , 3 3, 3 4 , 39 FOR W870CU SATA ODD J _S A T A 1 SATA HDD 1 1 S A TA _ R X N 3 1 1 S A TA _ R X P 3 J _ HDD 1 S1 S2 S3 S4 S5 S6 S7 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1 1 S A TA _ T XP 3 1 1 S A TA _ T XN 3 S A TA _T X P 0 S A TA _T X N 0 S A T A _ TX P 0 1 1 S A T A _ TX N 0 1 1 S A TA _R XN 0 S A TA _R XP 0 S AT A_ RXN0 1 1 S A T A _ R X P 0 11 5V S 3 . 3V S P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 C 1 6 6Y 7- 1 2 2 05 - L P IN G ND 1 ~ 2 = G ND C6 6 6 C6 6 7 *. 0 1 U _ 1 6V _ 0 4 *1 0 U _ 10 V _ 0 8 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 88 0 1 8-3 0 0G - 7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 J _ OD D 1 S1 S2 S3 S4 S5 S6 S7 S A T A _ TX P 4 1 1 S A T A _ TX N 4 1 1 S A T A _ RX N4 1 1 S A T A _ RX P 4 1 1 S A T A _T X P 1 11 S A T A _T X N 1 1 1 S A T A _ RX N1 S A T A _ RX P 1 S A T A _R X N 1 11 S A T A _R X P 1 1 1 OD D _ D E T E C T # 3. 3 V S P1 P2 P3 P4 P5 P6 6 -20 -C 2D2 0- 20 6 OD D _ D E T E C T # 6- 2 1 -C 4 71 0 - 11 3 HDD _ NC0 5 VS OD D _ D E T E C T# 1 1 N C O D D _0 1 C 1 85 3 5 -11 3 05 -L P I N G N D 1 ~ 4 = GN D 5V S HDD _ NC1 HDD _ NC2 HDD _ NC3 S A T A _ T XP 1 S A T A _ T XN 1 C 32 3 C3 2 6 C3 2 9 C 29 7 0 . 1 u_ 1 6V _ Y 5V _ 0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 1u _ 1 0V _ 0 6 1 0 u_ 1 0V _Y 5V _ 0 8 +C 3 0 5 *1 0 0U _ 6. 3 V _ B 2 D 0 3A W 87 B OM DE L C3 2 3 ,3 2 6 ,3 2 9, 2 9 7, 3 0 5 5V S C6 7 3 C6 7 2 C 6 70 C 6 68 C6 6 9 *. 1 U _ 1 6 V _0 4 0 . 1u _ 16 V _ Y 5 V _ 04 *. 1 U _ 1 6V _ 0 4 1u _ 10 V _ 0 6 1 0u _ 1 0V _ Y 5 V _ 0 8 + C6 7 1 3 .3 V S 1 00 u _6 . 3 V _ B _A C 4 68 C4 7 3 C 47 0 C 4 64 C 4 67 *. 0 1U _ 16 V _ 04 *1 0 U _ 1 0V _ 0 8 * . 1U _ 16 V _ 04 1u _ 1 0V _ 0 6 10 u _1 0 V _ Y 5 V _0 8 6 - 2 1- C 4 7A 0 -1 2 2 SRS-AP8202, SATA ODD & HDD B - 33 B.Schematic Diagrams C 2 75 4 7K * 10 K _ 0 4 A UDG D B * 10 K _ 0 4 R2 4 9 R2 4 8 R2 6 2 S R2 6 1 Z 27 0 1 Z 27 0 2 VSA R2 6 3 R2 6 0 30 3 1 LI N E _ OU T _ L 3 1 L I N E _ OU T_ R Schematic Diagrams AMP-TPA6017, Subwoofer 2W 4ohm 5 VS ? ? : 500~ 1000Hz ( ? ? ? ? ? ) D03B R533,R534 change to 0 ohm C2 4 4 C2 4 5 C 2 36 C 24 9 S R S _ LO U T A U DG 32 S RS _ RO UT A U DG 5V S A U DG Sheet 33 of 57 AMP-TPA6017, Subwoofer A U DG C 23 4 C 25 3 C 23 9 R 23 7 R 23 8 6 8 00 p _ 50 V _ X 7R R 5 33 6 8 00 p _ 50 V _ X 7R 6 8 00 p _ 50 V _ X 7R R 5 34 6 8 00 p _ 50 V _ X 7R _ 04 0_04 _ 04 _ 04 0_04 17 7 _ 04 10 0 K _ 04 *1 00 K _ 0 4 SPK_ EN GA I N 0 GA I N 1 R 22 9 R 23 0 5 9 *1 00 K _ 0 4 10 0 K _ 04 19 2 3 1 11 13 20 21 L I NL I N+ R INR IN+ SD # G AIN0 G AIN1 6 15 16 PVD D PVD D VD D 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 u _1 0 V _ 06 1 0 u _1 0 V _ Y 5 V _ 0 8 L OU T+ LO U T - 4 S P K OU TL + 8 S P K OU TL - 18 S P K OU TR + 14 S P K OU TR - AU DG 31 Fcut(-3db)=1965Hz 2000Hz High Pass Filter D02 ADD R535,R536 RO UT G ND G ND G ND BY PASS G ND E X P OS E D P A D N C C2 8 4 S I D E -L AUD G 31 R OU T+ S I D E -R AUD G 5 VS 10 12 C2 3 1 5V S C2 6 7 C2 8 8 C2 7 2 0 . 4 7u _ 1 0V _0 4 -7 R5 3 5 0 . 4 7u _ 1 0V _0 4 -7 0 . 4 7u _ 1 0V _0 4 -7 R5 3 6 0 . 4 7u _ 1 0V _0 4 -7 FOR W870CU AUD G R 26 6 R 26 5 * 10 0 K _ 04 -7 1 0 0K _0 4 -7 R 25 5 R 25 6 * 10 0 K _ 04 -7 1 0 0K _0 4 -7 L3 3 H C B 10 0 5 K F -1 21 T 2 0-7 C2 8 0 C 27 9 C2 7 0 1 U _ 1 0 V _0 6 -7 10 u _ 10 V _ Y 5 V _ 0 8- 7 U2 3 1 0 K _0 4 -7 Z 2 31 2 5 9 1 0 K _0 4 -7 Z 2 31 13 7 7 GA I N 0 GA I N 1 2 3 1 11 13 20 21 0. 4 7 u _1 0 V _ Y 5 V _ 0 4 A U DG 4ohm 5 V S _ RE A R SPK_ EN 1 9 AUD G T P A 6 0 1 7A 2 P W P R 1.5W ? ? : 2000Hz ? ? (? ? ? ? ) U 20 32 Thermal Pad A U DG L INL IN+ RIN RIN + S D# GA I N 0 GA I N 1 0 . 1 U _ 1 6 V _0 4 -7 6 15 16 P VDD P VDD VDD LO U T + L OU T - RO UT + 4 S I D E _ L O+ 8 S I D E _ L O- 18 S IDE _ RO + S IDE _ RO - 14 R OU T GN D GN D GN D BYPAS S GN D E X P OS E D P A D NC AU DG 10 Z 2 3 17 C2 6 5 12 T P A 6 01 7 A 2 P W P R -7 0 . 47 U _1 0 V _ 04 -7 A U DG A UDG FOR W870CU L5 1 F C M 10 0 5 K F -1 21 T 0 3-7 J _ S U B W OO F 1 2 2 1 1 S U B W OO F E R + S U B W OO F E R - L2 7 F C M 10 0 5 K F - 1 21 T 0 3 L2 8 F C M 10 0 5 K F - 1 21 T 0 3 L2 9 F C M 10 0 5 K F - 1 21 T 0 3 S P K O UT L + S P K O UT L J _ S IDE S U B 1 1 2 3 4 8 5 2 05 - 0 2 70 1 - 7 L5 0 F C M 10 0 5 K F -1 21 T 0 3-7 L2 3 F C M 10 0 5 K F -1 21 T 0 3-7 L2 2 F C M 10 0 5 K F -1 21 T 0 3-7 L2 1 F C M 10 0 5 K F -1 21 T 0 3-7 S IDE _ RO + S IDE _ RO - 6-20-41100-002 8 5 20 4 - 0 40 0 1 S P K O UT R+ S P K O UT R- FOR W870CU J _S I D E S U B 2 6-20-43130-104 L3 0 F C M 10 0 5 K F - 1 21 T 0 3 Low mute! 1 2 3 4 S I D E _ L O+ S I D E _ L O- 3. 3 V S 8 52 0 4 -0 40 0 1- 7 6-20-43130-104 D 33 C 16 S B _ M UT E # 3 .3 V S 3 .3 V S 14 L E F _ OU T L EF _ O UT 7 R 27 3 3 .3 V S 1 0 0K _0 4 R2 7 4 1 00 K _ 0 4 U 2 4B 7 4 L V C0 8 P W 11 13 4 82 0 0 p_ 5 0 V _X 7 R _ 0 6 - 7 31 H P_ PL UG 2 0 K _ 04 -7 FOR W870CU Q2 5 5 HP _ E N 7 3 .3 VS 7 2 0 K _ 04 -7 R2 5 8 U 2 4D 74 L V C 0 8 P W 12 5 VS R2 5 9 G MT N 7 0 0 2Z H S 3 U 21 C2 9 5 A U DG 0. 2 2 U _ 1 0V _0 4 - 7 C 2 90 4 3 0 . 22 U _1 0 V _ 04 - 7 ININ+ 2 BY PASS SPK_ EN 1 SD # VO + V OV DD G ND S U B W OO F E R + 5 L 32 H C B 1 00 5 K F -1 2 1T 2 0 - 7 S U B W OO F E R - 8 6 5 VS_ SUBW 7 C 25 8 T P A 6 2 11 A 1 D G N R -7 0. 1 U _1 6 V _ 04 -7 AUD G A U DG B - 34 AMP-TPA6017, Subwoofer 3 .3 VS 6 Z 22 2 0 C 26 6 C2 9 6 0 . 2 2U _ 10 V _ 0 4-7 31 10 D 0 . 2 2U _ 10 V _ 0 4-7 R I GH T_ O U T 8 3 2 1 1, 2 4 , 2 8, 3 1 H D A _ R S T # S R I G H T _ OU T T H E R N A L _P A D 31 U2 4 C 74 L V C 0 8 P W 9 14 SUBWOOFER 2W The cut-off frequency Fcut Fcut = 1 / (2 * Pi * (CA) ? ? ? : 50 0Hz ? ? * (RA)) Fcut(-3db)=485.4Hz 485.4 Hz Low Pass Filter D02 ADD NET & C679 C6 7 9 C 25 7 82 0 0 p_ 5 0 V _X 7 R _ 0 6 - 7 U 2 4A 7 4 L VC0 8 P W 1 2 5 K B C _ MU T E # 7 3 1 E A P D _ MO D E D03 BOM DEL R517 *S C S 55 1 V -3 0 A 14 D02 BOM DEL D33 D02 SB_MUTE & *1 0RK5_170 4 EAPD CHANGE F C M 10 0 5 K F -1 21 T 0 3-7 14 L2 0 9 B.Schematic Diagrams D03B C249,C253,C234,C239 change 6800P REAR R/L L31 H C B 1 0 0 5K F -12 1 T 20 5 V S _ A MP Thermal Pad FRONT R/L C 2 55 1 0 u _1 0 V _ Y 5 V _ 0 8-7 3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 5, 16 , 1 7 , 18 , 2 0 , 21 , 2 2 , 23 , 2 4 , 2 5, 2 6 , 2 7, 2 8 , 2 9, 3 0 , 3 1 , 32 , 3 4 , 39 3 . 3 V S 18 , 2 0 , 2 2, 2 3 , 2 4, 2 5 , 2 8, 3 0 , 3 1 , 32 , 3 4 , 39 5 V S SPK_ EN Schematic Diagrams 5V, 3.3V, 3.3VS, 5VS, 1.5VS PD16 SCS355V A C VA VDD3 SYS5V VIN1 VIN PM O S PQ50 S PD15 SCS355V A C 150mA D AO3 409 PR8 8 PC156 10 K_0 4 .1U_50V_06 PR152 D G VIN C Z3504 PC157 .1U_50V_06 Z3 505 B E M TN7002ZHS3 G DD_ON PQ1 7 DD_ON_LATCH 2 5 PC154 R524 10 0K_ 04 .1U_ 16V_04 100K_04 D02 ADD R524 ON PQ54 DTA114EUA DDON L TO H FROM EC Sheet 34 of 57 5V, 3.3V, 3.3VS, 5VS, 1.5VS M_BTN# M _BTN# 1.5VS 5VS SYS15 V 3A 5V PR127 Power Plane 4 1M _04 5VS 1M _04 PQ28 P1503 BVG 8 7 3 6 2 5 1 1.5VS_EN PC100 PC123 .1U_16V_04 2200p_50V_X7R_04 D03C BOM ADD PR122,PQ29 FOR DISCHARGE 47K_04 Z3515 PQ29 M TN7002ZHS3 G S PR134 SUSB S PQ32 MTN7002ZHS3 D D G PC115 10u _10V_Y5V_08 PQ34 MT N7002ZHS3 Z35 06 PQ 33 M TN70 02ZHS3 PC10 8 .1U_16V_04 220_ 04 1M_ 04 Z3507 PC109 PR122 4 SYS15V VDD5 5V 1. 5 VS PQ31 P1503BVG 8 7 3 6 2 5 1 D 3A PR1 30 PQ30 P1503 BVG 8 7 3 6 2 5 1 4 SYS15V VDD5 N MOS 1.5V PR133 NM O S D 5V *.1U_16V_04 100K_04 PR158 10K_04 30 PC66 PR83 PR154 PC119 PC125 SUSB PJ13 0 .1 U_16V_04 PJ14 40mil 2 2 3 6,37 1 1 S G 1000p_ 50V_X7R_04 S DD_ON# G 47 0p_50V_X7R_04 1.5V 40mli +1.5S_CPU PJ2 0 ON D03C ON SYS15V R557 PR177 PR160 1M_ 04 Z3509 4 D D G SUSB PC6 0 PC59 .1U_16V_04 10u_1 0V_ Y5V_08 MTN7002ZHS3 C692 PQ64 MTN7002ZHS3 G PC19 2 *470p_50 V_X7 R_04 0.01u _50V_X7R_ 04 PR161 Z35 08 PC159 PQ56 MTN7002ZHS3 D PQ 51 M TN70 02ZHS3 D *100_1 %_04 D PC1 55 Q40 S 3A Power Plane PS_S3CNTRL_1 .5 S 3.3VS PQ 14 P15 03BVG 8 7 3 6 2 5 1 4 1M _04 VDD3 3.3V S 3A PR1 55 100K_04 N MOS SYS15V 4 SYS15V VDD3 220_04 3.3VS PQ13 P1503 BVG 8 7 3 6 2 5 1 2 *OPEN-12mm Q35 8 IR87 07 7 3 6 2 5 1 +1.5S_CPU 3.3V 1 1000p_ 50V_X7R_04 PR1 59 39K_ 04 PC1 58 0.1U_16V_04 ON SUSB G S S G S G 22 00p_50V_X7R_04 DD_O N# Z351 0 PQ 55 *MTN7002ZHS3 VIN1 35 5VS 18,20,22,23,24,25,28,30, 3 1,32,33,39 3.3VS 3,9,10,11,12,13,15,16,17,18 ,2 0,21,22,23,24,25,26,27 ,2 8,29,30,31,32,33,39 3.3V 2,3,11,12,13,15,16,18,21,24 ,2 6,27,28,29,36,37,38,41 1.5VS 17,26,27 5V 12,18,26,28,30,36,37,38, 4 1 SYS5V 35,36,40,41 1.5V 3,9,10,18,28,37,41 SYS15V 21,35 VIN 21,24,35,36,37,38,39,40 VA 40 VDD5 30,35 VDD3 2,11,25,27,28,29,30,35,40 +1.5S_CPU 3,6 5V, 3.3V, 3.3VS, 5VS, 1.5VS B - 35 B.Schematic Diagrams PR15 3 100 K_0 4 2 5 G S PWR-SWA S G PQ53 MTN7002ZHS3 S PQ49 MTN7002ZHS3 D DD_ON# PQ52 MTN7002ZHS3 D PWR_SW# D 25 PR156 33K_1%_04 Z35 01 S 10K_04 G PR157 330K_04 Schematic Diagrams VDD3, VDD5 PC 1 2 2 0 . 0 1 u_ 5 0 V _ X 7 R _ 0 4 Z3613 L GA T E 1 C P D8 A A S YS5 V F M0 5 4 0 -N C S YS1 0 V V IN1 P D7 P R 13 7 F M0 5 4 0 -N P C 1 24 1 0 _0 6 A Z 3 6 04 PC 1 2 0 2 .2 u _ 6 .3 V_ Y 5 V _ 0 6 P C 11 8 1 0 0 0p _ 5 0 V _ X 7 R _ 0 4 2 2 00 p _ 5 0 V _ X 7R _ 0 4 PD 6 PC 1 2 8 0 . 0 1 u_ 5 0 V _ X 7 R _ 0 4 Z3614 P R 1 31 IN T V CC 2 *F M0 5 4 0 - N 4 2 2 K _ 1 % _ 06 S GN D 4 C 1 0 _ 06 6-13-42231-28B PR 1 3 6 C P D9 A A F M0 5 4 0 -N C S YS1 5 V Z 3 6 05 P C 1 27 PR 1 2 9 2 2 00 p _ 5 0 V _ X 7R _ 0 4 VIN S G ND 4 D H S GN D 4 S GN D 4 P GN D D L 2/18 VDD5 SY S5 V V D D5 PL 1 3 4 . 7 U H _ 6 . 8 *7 . 3 * 3 . 5 1 2 5A P J 12 1 2 LX * OP E N -5 m m 11 12 13 V D DP RP S V P G O OD 1 1 3 K _ 1 % _ 04 L G AT E1 P Q2 6 IR8 7 0 7 4 Z36 11 P R 12 0 12 . 4 K _ 1 % _ 0 4 Z36 12 P R 11 9 *1 0 0 K _ 0 4 D03 BOM ADD PR118 P Q2 4 IR 8 7 0 7 4 1 0 Z 36 1 0 11/17 P R 1 18 PC1 7 1 4 . 7U _ 2 5 V _ 08 Z 36 0 9 PC 7 9 4 . 7 U _2 5 V _ 0 8 Z 36 0 8 9 P C 80 0 .1 U_ 5 0 V_ 0 6 8 I N TV C C 2 PC1 1 3 D03 BOM DEL PR119 D03A BOM PR120 CHANGE 1 u_ 1 0 V _ 0 6 P C 11 6 P R1 3 2 PD 1 8 1 0 0 0 p _5 0 V _ X 7 R _ 0 4 9 1 K_ 1 % _ 0 6 2/18 F M 5 8 22 A *0 . 1 U _2 5 V _ 0 6 S GN D 4 15 PR 1 2 4 1 3 7 K _ 1 % _0 4 P C1 1 1 BS T E N/P S V I LI M PR 1 2 6 P C1 1 2 1u _ 2 5 V _ X 7 R _ 0 8 VL D O SC418 A GN D 16 3 K_ 1 % _ 0 4 P C 11 4 PC1 2 1 1 u_ 2 5 V _ 0 8 Z 36 0 7 7 14 17 6 C 4 3 5 V IN R T ON 18 11/17 P C1 1 0 PU8 NC V OU T 1 2 FB E NL 19 Z36 01 1 u _1 0 V _ 0 6 Sheet 35 of 57 VDD3, VDD5 V D DA 21 Z 3 60 3 F BL S GN D 4 20 Z 3 60 2 PAD S GN D 4 5 6 7 8 6 . 0 4 K _ 1 % _ 04 1 2 3 1 0 K_ 0 4 7 5 K_ 0 4 5 6 7 8 PR 1 2 5 1 2 3 P R1 2 3 1 0 0 0 p _5 0 V _ X 7 R _ 0 4 + P C 11 7 P C1 0 7 P C9 3 PC 9 9 P C1 0 6 + 1 5 0 u _ 6 . 3V _ V _ B *1 5 0 U _6 . 3 V _ V 0 . 1 U _ 16 V _0 4 P R1 2 8 * 3 0 P _ 5 0V _0 4 1 0 K_ 1 % _ 0 4 2 /26 1 u _ 1 0 V_ 0 6 S G ND 4 P R 12 1 * 15 m i l _ sh o rt A I N T V C C2 4 16 D H 15 N .C P GD BST V OU T S GN D 6 S GN D 6 R TN G ND 5 0 . 0 1u _ 5 0 V _ X 7 R _ 0 4 6 P C 51 2 . 9 4 K _ 1 %_ 0 4 N.C N .C PR 7 1 0 . 0 1 u _ 5 0V _X 7 R _ 04 S G ND 6 DL 7 Rb P C5 2 1 Z 3 6 19 PAD V D D3 2 Z 3 6 20 3 Z 3 6 21 4 Z 3 6 22 1 P L1 0 4 . 7 U H _ 6 . 8 *7 . 3 * 3 . 5 2 SY S3 V 5A P Q1 2 IR8 7 0 7 4 2/18 PD 1 4 PC 5 7 + F M 5 8 22 1 5 0 u _6 . 3 V _ V _ B 17 P C5 4 P C5 8 + * 1 5 0U _ 6 . 3 V _ V PC 5 6 0 . 1 u _ 1 6V _Y 5 V _ 0 4 2/ 26 1 u _ 1 0 V_ 0 6 S G ND 6 P R6 7 *1 5 m i _l s h o rt S G ND 6 V V S S V V B - 36 VDD3, VDD5 DD 3 DD 5 YS5 V YS1 5 V IN I N1 2 , 1 1 , 2 5 , 27 , 2 8 , 2 9 , 3 0 , 3 4, 40 3 0 ,3 4 3 4 , 3 6 , 4 0, 4 1 2 1 ,3 4 2 1 , 2 4 , 3 4, 3 6 , 3 7 , 3 8 , 3 9 , 40 34 P J6 1 2 *O P E N -5 m m 11/17 V CC F B 2/18 0 . 1 U _ 50 V _ 0 6 5 6 7 8 9 LX P Q1 1 IR8 7 0 7 1 2 3 10 Z 3 61 7 14 13 11 Z 3 61 6 E N N.C 12 IL IM Z 3 61 5 P U5 S C4 1 2 A P C 1 53 4 .7 U_ 2 5 V _ 0 8 Z 3 6 18 P C5 3 30 p _ 5 0 V _ N P O _ 0 4 PC 5 5 4 . 7 U _2 5 V _ 0 8 S G ND 4 P C1 5 2 0 . 1 U _ 5 0V _0 6 *1 5 m i _l s h o rt 5 6 7 8 P R 73 F M 0 5 40 -N C *1 0 m i _l s h o rt PD 4 A 1 0 K _ 1 % _0 4 1 2 . 4K _ 1% _ 0 6 1 2 3 PC4 9 P R 74 Z 3 6 25 1 0 K_ 0 4 P R 76 PR 6 8 V IN C D03A BOM PR76 CHANGE Ra P R7 5 8 B.Schematic Diagrams P D 1 0 F M0 5 4 0 -N Z3 606 VDD3 Schematic Diagrams Power 1.8VS, 1.1VS 5V VIN P R 54 E N _ 1 . 1V M P C2 7 F M 0 54 0 -N P R 56 5. 1 K _ 1 % _ 0 4 5 6 7 8 . 1 U _ 10 V _ X 7 R _ 0 4 P C3 0 2 3 1 V CC GN D 4 Z3 70 8 4 17 PD3 * . 1U _ 1 0V _X 7 R _ 0 4 + P Q1 0 A P 9 4 1 2 GM 5 N .C N.C DL PAD 6 7 8 R TN FB PC 4 6 P R 57 Sheet 36 of 57 Power 1.8VS, 1.1VS + F M 58 2 2 1 u _1 0 V _ 0 6 PR5 5 *1 0 m li _ s h ort 2 P C 25 DH 3 VO U T 1 .1 VS P J3 1 8m m . 1 U _ 1 6 V _ 04 Z3 70 7 *2 2 0 U _ 4 V _ D 2 2 2 0 U_ 4 V _ D2 _ D 2 V1 .1 S 10A PC 2 6 16 15 14 BST P L7 2 . 5 U H _ 6. 8* 7 . 3 *3 . 5 1 2 Z 3 7 06 PC 4 2 9 1.1VS .1 U_ 5 0 V _ 0 6 1 C 10 Z 3 70 3 LX A Z 3 70 2 PG D PC 2 8 ? ? ? ? ? ? ? ? 1.05VS-->1.1VS P Q9 A P 9 4 08 G M 5 6 7 8 2 2 0 K _ 1% _ 0 4 3,13 1.1VS_PWRGD *1 5 U _ 2 5 V _ 4 . 5* 6 PC 4 5 P U3 S C4 1 2 A 2 3 1 11 EN N .C 13 PR 5 1 N .C 12 IL IM 3 . 3V PC 1 4 9 + PC1 5 1 P C 17 2 *2 0 P _ 5 0 V _0 4 1 0 K _ 1 % _0 4 P C 31 P R 60 2 3 . 7K _1 % _ 0 6 P C3 6 20 p _ 5 0V _N P O _0 4 0 . 0 1u _ 1 6 V _X 7 R _0 4 ? ? ? ? PIN6? 5V 3 .3 V 1.8VS P C2 9 3 .3 V 10 K _ 0 4 1. 8V S _P W R G D 13 1.8VS_ PWRGD PR 5 0 P R 43 2A PU 2 5 9 7 6 V IN V IN P OK 1 0 K_ 0 4 E N 1. 8V S 5V 8 V O UT V O UT V S 1 .8 3A V C NT L 1 .8 VS PJ 2 1 4 2 O P E N _3 A 3 EN GN D V FB 2 P R 49 1 . 2 7 K _1 % _ 0 4 D 1 1 u_ 1 0 V _ 0 6 62 K _ 1 % _ 04 PQ 3 2 N 70 0 2 _ E G PC 1 9 PC1 8 1u _ 6 . 3 V _ Y 5 V _ 0 4 OZ80 33 PC 3 8 P C4 0 . 1 U _1 6 V _ 0 4 1 0 u _ 10 V _ Y 5 V _ 08 P C 24 0 . 0 1 5u _ 1 0 V _X 7 R _0 4 P C3 5 P C 34 P C3 3 *1 0 U _ 1 0 V _ 08 1 0 u_ 1 0 V _ Y 5 V _ 0 8 . 1 U _ 16 V _ 0 4 S Y S 5V (15nF~48nF) P R4 4 P R 77 0 . 1 U _ 1 6 V _ 04 1 0K _0 4 1 K _ 1 % _ 04 S US B D PR4 2 1 3 , 25 , 2 6 , 2 8 , 41 S U S B # SU SB 34 , 3 7 P Q 15 G P C6 1 MT N 7 00 2 Z H S 3 S S US B S 3 4 ,3 7 . 1U _ 1 6V _0 4 6,1 1,12,13 ,17,18,2 0,38,39 1.1VS 6,1 5,17 1.8VS 3 4, 3 5 , 4 0 , 4 1 S Y S 5 V 2 1 , 2 4, 34 , 3 5 , 3 7 , 38 , 3 9 , 4 0 V I N 1 2 , 1 8 , 2 6, 28 , 3 0 , 3 4 , 37 , 3 8 , 4 1 5 V 2 , 3 , 1 1 , 1 2, 1 3 , 1 5 , 1 6, 18 , 2 1 , 2 4, 26 , 2 7 , 2 8 , 29 , 3 4 , 3 7 , 38 , 4 1 3 . 3 V Power 1.8VS, 1.1VS B - 37 B.Schematic Diagrams Z 37 0 4 0 . 1U _ 1 6V _ 0 4 Z3 705 4 P C 15 0 4 . 7 U _2 5 V _ 0 8 D PQ 4 MT N 7 00 2 Z H S 3 G C 6 2 K _ 1 % _0 4 S PR 4 6 4 . 7 U _ 2 5 V _0 8 PD 1 1 0 0 K _ 1% _ 0 4 SU SB A 5V Schematic Diagrams Power 1.5V/0.75V 5V 3 . 3V P R 11 4 9 FB RE F 24 Z3 812 BST PJ 1 1 P R 1 17 P C1 0 4 12 13 V DD Q P C 10 2 P C1 0 3 P C 1 01 *1 0 U _ 1 0 V _0 8 *2 0 K _1 % _ 0 6 1 0 u _1 0 V _ Y 5 V _ 0 8 1 0 u_ 1 0 V _ Y 5 V _ 08 P C1 0 5 *1 0 U _ 1 0 V _ 08 1 u _ 2 5V _ 0 8 1 11 1.5V D03A BOM PR113 CHANGE 19 Z3 818 D L Z3 80 9 1 4 15 1.5A 1 O P E N _2 A 7. 1 5 K _ 1 %_ 0 6 22 Z3 817 P L 12 2 . 5 U H _6 . 8 *7 . 3 *3 . 5 1 2 P Q 60 VSSA 4 VTT VTT 20 VDD P 1 5V P Q 61 4 AP9 4 1 2 P D1 9 V DD P 2 V DD P 2 1u _ 1 0 V _0 6 25 18 16 17 P GN D 2 P GN D 1 P GN D 1 P GN D 2 E N/ P S V V T TE N 2/18 + V D DQ 8A 47 K _ 0 4 P R 10 2 10 0 K _ 0 4 PC 9 1 . 1 U _1 6 V _ 0 4 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 F M5 8 2 2 2/18 P R1 1 1 * 1 5m i l _s h o rt VSSA 1 .5 V EN D P R 10 4 P C 88 P Q2 5 S 1 P Q 23 MT N 7 0 0 2Z H S 3 PJ 1 0 G S U S C# M TN 7 00 2 Z H S 3 2 1 3 ,2 5 . 1 U _ 1 6 V _0 4 G D Z 3 8 19 40 m i l V T T _M E M D03C 5V 3 + 1 . 5S _C P U _ P W R GD P R1 1 6 P R1 7 8 * 10 0 K _ 0 4 VTTEN 1 0 0K _0 4 P R1 7 6 22 _ 0 4 D D03C PQ 2 7 PC 9 8 G MT N 7 0 0 2Z H S 3 D S US B S 3 4, 36 . 1 U _1 6 V _ 0 4 PQ 6 3 S USB G S MT N 7 0 0 2Z H S 3 D03C ADD PR176,PQ63 FOR DISCHARGE 9 , 1 0 V T T _M E M 3 , 9 , 1 0, 18 , 2 8 , 34 , 4 1 1 . 5 V 2 1 , 2 4, 3 4 , 3 5 , 36 , 3 8 , 3 9, 4 0 V I N 12 , 1 8 , 2 6, 2 8 , 3 0 , 34 , 3 6 , 3 8, 4 1 5 V 2 , 3, 11 , 1 2 , 13 , 1 5 , 1 6, 18 , 2 1 , 24 , 2 6 , 2 7, 2 8 , 2 9 , 34 , 3 6 , 3 8, 4 1 3 . 3 V B - 38 Power 1.5V/0.75V 2 P C9 2 SC4 8 6 5V PJ 9 1 O P E N_ 8 A + * A P 9 4 12 P C9 7 A * . 0 68 U _5 0 V _ 0 6 4 2 IL IM LX VSSA V TT _ ME M V CC A 1 u_ 1 0 V _ 06 10 0 0 p_ 5 0 V _ X7 R _0 4 *2 2 0U _ 4V _ D 2 5 P C 90 P C8 4 P C8 7 P R 11 5 * 15 m i l_ s h ort 2 2 0 U_ 4 V_ D2 _ D V T TS Z3 80 7 P C9 4 PQ 5 9 A P 9 4 08 4 P C8 5 *3 2 mi l _ sh o rt P R 11 3 21 Z3 816 Z3 80 6 1 0 1 u_ 1 0 V _ 06 Z 3 8 15 DH * . 1U _ 16 V _ 0 4 P C 81 V IN + P C9 5 . 1 U _ 1 0V _X 7 R _ 0 4 P R 16 5 23 Z3 814 Z3808 VTT_MEM Z 3 8 13 *3 2 mi l _ sh o rt C O MP PC 9 6 C PR1 0 5 *1 0 K _1 % _ 0 6 Z3 80 5 P R 10 8 13 1 2 3 1 0_ 0 6 6 8 D D R 1 . 5 V _ P W R GD 5 6 7 8 Rb Z3 80 3 Z3 80 4 D D R 1 . 5V _P W R G D T ON 1 2 3 1 0 _0 4 P R 10 9 2 4. 7U _ 25 V _ 0 8 Z3 80 2 4. 7 U _2 5 V _ 0 8 1 u_ 1 0 V _ 06 *1 5 U _ 2 5 V _4 . 5 * 6 P C 86 1 u _ 10 V _ 0 6 5 6 7 8 P C8 2 PR1 1 0 0_ 0 6 5 6 7 8 Sheet 37 of 57 Power 1.5V/0.75V Ra 1 0 0 K _0 4 C 7 P GD 1 2 3 P C 89 * 1 00 P _ 5 0 V _0 4 P R 1 12 F M0 5 4 0 -N 3 V D D QS S B.Schematic Diagrams P D5 Z3 80 1 PC1 7 0 1 0_ 0 6 1 0 _0 6 P C8 3 P R1 0 6 1 . 5 M_ 0 4 PU7 P R1 0 7 PC1 6 9 P R 10 3 A V IN V DD Q 1 .5 V Schematic Diagrams Power 1.1VS_VTT CONTROL 1.1VS_VTT H_VTTVID1 = LOW, 1.1V H_VTTVID1 = HIGH, 1.05V H_VT TVID1 5V 3 . 3V P R 58 3 .3 V 1 0 K _0 4 5V P R 52 A V IN D P C 39 P D2 PR 5 9 7. 5K _ 1 % _ 04 PQ 4 7 AP9 4 1 2 PQ 4 8 AP9 4 1 2 PC 4 8 1 u _ 10 V _ 0 6 P C 1 83 P J1 8 1 .1 VS 0 . 1u _ 5 0 V _ Y 5V _0 6 0 . 1 u _5 0 V _ Y 5 V _ 06 P J4 *OP E N -1 2 m m PC 1 8 0 5 1 .1 V S_ V T T 2 PC1 8 1 PC1 8 2 P C 14 8 0 . 1u _ 1 6V _Y 5V _ 0 4 17 0. 1 u _ 5 0V _ Y 5 V _ 0 6 4 . 7 U _2 5 V _ 0 8 + F M5 8 22 V T T _ SENSE V T T 1. 1V S 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 1 2 *OP E N _ 3 A Sheet 38 of 57 Power 1.1VS_VTT + 0. 1 u _ 1 6V _ Y 5 V _ 0 4 5 . 1 _ 06 4 1.1VS_VTT 1 0 . 1 u _ 16 V _ Y 5 V _ 0 4 4 2 2 0U _ 4 V _D 2 _D P D1 3 4 5 6 0u _ 2 . 5 V _6 . 6 *6 . 6 * 5. 9 C 5 6 7 8 3 P C 1 7 7 P C 1 78 P C 1 7 9 23A PC 4 1 PAD P R 1 74 2 5 6 7 8 15 14 2/26 PL 8 *0 . 6 U H _1 2 . 9 *1 3 . 8 *3 . 8 A G ND D L 2 3 1 8 P R 70 P Q 45 *A P 94 0 8 1 VC C FB PL 9 0 . 5 6U H _ 1 0 *1 0 *4 . 1 LX B ST V O UT P C 44 0 . 1 u _ 10 V _ X 7 R _ 0 4 ON 16 PG D D0 9 5 FB R TN 10 0 _0 4 D1 PR 6 5 6 11 1 3 1. 1 V S _ V T T _ P W R G D P Q4 6 A P 9 4 08 0 . 1U _ 50 V _ 0 6 PU4 S C 4 75 A D H 13 EN G 1 12 G0 IL IM 1 0K _ 0 4 7 P R6 3 3 .3 V 4. 7 U _2 5 V _ 0 8 4 2 3 1 4 P C4 3 1 . 1 V S _ V T T _E N _ R 5 6 7 8 5 6 7 8 D03A BOM PR59 CHANGE 4 . 7U _ 25 V _ 0 8 P C 2 3 P C 2 1 P C 2 0 P C 2 2 P C 1 46 + 1 5 U _ 2 5 V _6 X 4 . 5 2 3 1 P R4 5 1 0 0 K _ 04 F M0 5 4 0 -N P C 14 7 *1 U _6 . 3 V _ 0 4 MT N 7 0 0 2Z H S 3 4 . 7 U _ 2 5 V _ 08 G P Q5 2 N3 9 0 4 2 3 1 B C 1 0 K_ 0 4 S P R4 8 E H _V T T V I D 1 C * 1 00 K _ 0 4 2/18 2 8 . 7 K _ 1% _ 0 6 P C4 7 PR6 6 PC 5 0 P R 72 3. 2 4 K _ 1 % _0 4 4 7 0p _ 5 0V _X 7 R _ 0 4 2 0p _ 5 0V _N P O_ 0 4 4 0. 2K _ 1 % _ 04 PR6 9 8. 2 K _ 1 % _ 04 P R6 2 5V 1 . 1 V S _ V T T_ E N _ R 1 0 K _ 04 D PR6 1 10 0 K _ 0 4 PQ 6 PR5 3 G 1 3 1 . 1 V S _ V T T_ E N PJ 5 P Q7 MT N 7 0 0 2 Z H S 3 G *1 0 K _ 04 S M T N 7 0 02 Z H S 3 2 5 40 m i l 6 , 1 1, 12 , 1 3 , 1 7, 1 8 , 2 0 , 36 , 3 9 1 . 1 V S 3 , 5 , 6 , 16 , 1 7 , 1 8 1. 1 V S _ V T T 2 , 3 , 1 1 , 12 , 1 3 , 1 5, 1 6 , 1 8 , 21 , 2 4 , 2 6, 27 , 2 8 , 2 9, 3 4 , 3 6 , 37 , 4 1 3 . 3 V 1 2 , 1 8, 26 , 2 8 , 3 0, 3 4 , 3 6 , 37 , 4 1 5 V 2 1, 24 , 3 4 , 3 5, 3 6 , 3 7 , 39 , 4 0 V I N P C3 7 * . 1 U _ 1 6V _0 4 Power 1.1VS_VTT B - 39 B.Schematic Diagrams P Q8 2 2 0 0p _ 5 0V _X 7 R _0 6 1 00 K _ 0 4 P R4 7 1 +1.1V D +1.05V L S H Schematic Diagrams *1 n _ 50 V _ 0 4 Power VCore P R 17 9 1 2 4K _ 0 6 C S _ P H2 P R 18 0 1 2 4K _ 0 6 P R 18 5 2 . 2 1K _ 1 % _0 4 P C 19 6 4 7 0p _ 5 0V _ X 7 R _ 0 4 24 23 C S C OM P P C1 9 4 15 0 0 P _5 0 V _ 04 22 21 20 19 P R 18 2 *4 7 K _ 04 P C 19 3 C SREF 18 P C 1 9 7 1U _6 . 3 V _ 0 4 C S C OM P 17 16 1 5 P R 18 6 5 62 K _ 0 4 P C 19 5 1 00 0 p _5 0 V _ X 7 R _ 0 4 1 6 2 K _ 06 1 4 P R1 8 7 4 7. 5K _ 0 4 1 3 P R 18 8 P R 1 89 8 0 . 6 K _ 04 C S _ P H1 S G ND2 VIN P R 1 8 1 1 K _ 04 P R 1 8 3 1 6 5K _ 0 4 RT1 close to PL6 S GN D 2 H _ P R O C H OT # D D S S 4 . 7U _ 25 V _ 0 8 P C 1 35 P C1 4 5 4 . 7 U _ 2 5V _0 8 4. 7 U _2 5 V _ 08 H DR1 P Q 37 I R F H 7 9 23 VIN P Q3 8 *I R F H 7 92 3 P C2 PC1 4 2 P C 1 44 P C 1 43 P C 1 38 GN D 4 . 7 U _ 2 5 V _0 8 P R1 9 8 H DR 2 L X2 D PR1 4 6 5 _0 6 PC3 0 . 22 u _ 50 V _ 0 8 P Q 44 I R F H 7 9 32G G P Q 41 I R F H 7 9 32 V C C2 1 0 0_ 1 % _0 4 1 0 00 U _ 2 . 5 V _ 12 *1 2 10 _ 0 6 PL 5 *0 . 3 6U H _ 1 2 . 9* 13 . 8 *3 . 8 ? ? CP U? ? 26A PL 1 5 0 . 36 U H _ 10 4 0 P D 11 F M5 82 2 PC1 4 0 A S S 2 C B S T2 S G ND2 10 _ 0 4 D 2 _0 6 D PR 3 PR2 0 1 1 .1 VS 2 20 p F _ 50 V _ 0 6 PC2 0 4 *1 K _ 0 4 * 1 K _0 4 *1 K _ 0 4 * 1 K _0 4 *1 K _ 0 4 * 1 K _0 4 *1 K _ 0 4 1u _ 1 6V _ X 5 R _ 0 6 S GN D 2 RS P VC C_ S EN SE 5 5V S PC1 3 P R 20 3 5 P M_ D P R S L P V R 5 P R 19 9 *R _ 04 P R 2 00 7 . 3 2 K _ 04 T T SNS 1 T RD E T # RT 1 1 00 K _ N T C _0 6 _ B P C2 0 3 0 . 01 u _ 25 V _ X 7R _ 06 0 _ 04 P R3 8 0 _0 4 *1 0 00 P _ 5 0V _ 0 4 P R 20 4 0_ 0 4 PSI# 5 5 5 5 5 5 5 H_ VID H_ VID H_ VID H_ VID H_ VID H_ VID H_ VID RS N 0 1 2 3 4 5 6 V S S _S E N S E 5 P R2 2 1 0 0_ 1 % _0 4 2 P R 20 2 *R _ 04 P R3 9 0 _0 4 P R2 7 P R2 5 P R2 3 PR 2 1 P R1 9 PR 1 8 P R1 5 5 VS 3 .3 V S PR 2 9 1 0 K _ 04 V R_ O N P R4 0 0_04 PR 3 4 S GN D 2 D 1 0 0 K _0 4 P Q1 G PC 1 7 * . 1U _ 16 V _ 0 4 B - 40 Power VCore 4 0 mi l 1 PQ 2 2 N 7 0 0 2W G 2N 7 00 2 W PR2 8 *1 0K _0 4 S 2 D VCO RE_ O N S 25 P J1 3 P C 1 37 4 . 7 U _ 2 5 V _0 8 4 . 7 U _ 2 5 V _0 8 G V C C1 C S RE F P R1 1 . 1 U _ 5 0V _0 6 G PC3 2 1 D C S _P H 2 C S _ P H1 C S 5 VS P R 1 96 1 K_ 0 6 10 _ 0 6 2 20 p F _ 50 V _ 0 6 C S _P H 1 P R1 9 2 P C 1 41 C S _ P H2 P R 1 93 1 K_ 0 6 5 _0 6 P D1 2 F M5 8 2 2 A BST1 P Q 43 I R F H 7 93 2 S 36 35 34 33 32 31 30 29 28 27 26 25 P Q4 2 I R F H 79 3 2 G G 0. 2 2 u _5 0 V _ 0 8 BST1 DRV H 1 SW 1 SW FB1 P V CC D RVL 1 P G ND D RVL 2 SW FB2 SW 2 DRV H 2 BST2 PC 1 P R 1 70 2_06 D D 5V S A DP32 12 G S 26A P R 1 47 P U1 5V S PQ 6 5 M T N 7 00 2 Z H S 3 VCORE V C OR E PL 6 * 0. 3 6 U H _ 12 . 9 *1 3 . 8 *3 . 8 D SW FB3 PW M 3 OD 3# IL IM C S C OM P C S S UM CS R E F L L INE RA M P R T RPM IR EF V RT T T TS N S A GN D A GN D PC1 3 4 4 . 7 U _ 2 5 V _0 8 PL 1 4 0 . 36 U H _ 10 4 0 4 . 7 U _ 2 5 V _ 08 R SP 3 10 T T SNS 1 1 12 49 . 1 U _ 5 0V _0 6 P C 1 36 LX 1 S P R 1 94 5 . 9K _0 4 PC1 3 9 G S S G ND2 P C2 0 1 P C 1 99 3 30 p _ 50 V _ X 7R _ 04 P C 2 0 2 3 9 0p _ 5 0V _ 0 4 P R 1 97 3 9 . 2 K _0 4 P R 1 95 1 . 6 5 K _0 4 EN P W R GD I MO N CL K E N # F BRT N FB C O MP T R D E T# VARF R V CC PH 1 P H0 D PRSL P PSI# VID 6 V ID5 VID 4 V ID3 VID 2 V ID1 VID 0 P C 2 00 0 . 1U _ 10 V _ 0 4 10 0 0p _ 5 0V _X 7 R _ 0 4 V R _ ON 1 2 3 4 5 12 p _ 50 V _ N P O_ 04 6 7 T R D E T# 8 9 5V S S GN D 2 37 38 39 40 41 42 43 44 45 46 47 48 I MO N CL K E N# P Q3 9 *I R F H 7 92 3 G 1 u _2 5 V _ 08 1 2 7 3 . 2K _1 % _ 04 P R 19 1 P R1 9 0 5 20 P C1 9 8 3 K _ 1 %_ 0 4 3K _1 % _ 04 3 , 1 3 D E L A Y _ P W R GD R SN B.Schematic Diagrams P R 18 4 3. 3V S 3 . 3 V S Sheet 39 of 57 Power VCore VIN P Q 40 I R F H 7 9 23 S G ND2 RT 4 1 00 K _ N T C _ 0 6 _B 5 V C OR E 21 , 2 4 , 3 4, 3 5 , 3 6, 3 7 , 3 8, 4 0 V I N 18 , 2 0 , 22 , 2 3 , 24 , 2 5 , 2 8, 3 0 , 3 1, 3 2 , 3 3, 3 4 5 V S 3 , 9 , 10 , 1 1 , 12 , 1 3 , 1 5, 1 6 , 1 7, 1 8 , 2 0, 21 , 2 2 , 23 , 2 4 , 25 , 2 6 , 27 , 2 8 , 2 9, 3 0 , 3 1, 3 2 , 3 3, 3 4 3 . 3 V S 6 , 11 , 1 2 , 1 3, 1 7 , 1 8, 2 0 , 3 6, 3 8 1 . 1 V S Schematic Diagrams AC_In, Charger PR 9 4 0_04 4 V IN 2/18 8 P 2 0 03 E V G 7 3 6 2 5 1 P Q 35 P C1 6 0 4 . 7U _ 25 V _ 08 P R 90 P C 1 62 P R8 1 30 K _ 1 % _0 4 B A T_ V O LT 2 5 A F M0 5 40 -N VA PU 6 P R 1 66 1 2 3 4 5 6 7 8 B D Z 3 42 7 S G P R7 8 P C 62 6 . 0 4 K _1 % _ 04 . 1 U _ 1 6V _0 4 Z 3 4 10 Z 3 41 1 P Q 21 MT N 7 0 02 Z H S 3 Z 3 4 12 P R8 4 PR 8 5 7 . 5K _1 % _0 4 V CC -I N C 1 + INC 1 A CI N A CO K -I N E 3 A DJ 1 C O MP 1 10 K _ 1 %_ 0 4 P R8 2 M B 3 9A 1 3 2 S G ND 5 P R9 9 * 0 _0 4 . 1 U _ 5 0V _0 6 P R9 5 * 0 _0 4 TRERMAL PAD P C 74 Sheet 40 of 57 AC_In, Charger . 1 U _5 0 V _0 6 VA P C 7 0 . 1 U _ 5 0V _ 0 6 VIN CT L 1 GN D V RE F R T CS AD J 3 BAT T S GN D 24 23 22 21 20 19 18 17 33 10 K _ 1 %_ 0 4 CT L P C 75 . 1 U _ 5 0V _ 0 6 Z 3 4 19 Z 3 4 20 P R 9 8 Z 3 4 21 P C 7 1 3 9 . 2 K _1 % _ 04 . 1 U _1 6 V _ 04 P C 16 8 . 1 U _ 5 0V _0 6 S GN D 5 S G ND 5 V DD3 P C 16 4 1 u _ 25 V _ 0 8 9 10 11 12 13 14 15 16 *1 0 0 K _1 % _ 04 SYS5 V P C 16 5 P C 13 2 P R 14 2 0 _ 04 *. 1 U _ 5 0 V _0 6 *. 1 U _ 5 0V _0 6 P Q 19 D TA 1 1 4 E U A C Z 3 4 26 4 . 7 U _ 2 5V _ 0 8 4 . 7U _ 25 V _ 08 4. 7 U _ 2 5 V _0 8 4 . 7 U _ 2 5V _ 0 8 P Q2 0 B A O4 9 32 P C1 6 7 0 . 1 u_ 2 5 V _X 7 R _ 0 6 C P D1 7 P C 13 3 P R 14 4 0 _ 04 P C 1 6 3 P C 17 3 P C 1 74 P C 1 7 5 *1 0 m li _ sh o r t P R 87 * 10 m i _l s ho r t PR1 4 5 10 0 K _ 04 E BAT BAT + Z 3 4 33 3 1 0 K _ 1% _ 0 4 BAT Ch ar ge Vo lt age 1 2.6 V To ta l P ow er 11 0W P R 1 00 2 0 m _3 2 16 5 6 P C1 6 1 P R 1 38 4 . 1 U _ 5 0 V _0 6 Z 3 40 6 Z 3 4 04 Z 34 0 3 Z 3 4 07 Z 34 0 8 P C 1 31 1 0 K _ 08 32 31 30 29 28 27 26 25 P R 1 40 . 1 U _ 5 0 V _0 6 Ch ar ge Cu rr ent 3 .0A 3A Z 3 4 05 CT L 2 C B OU T - 1 LX V B OU T -2 P G ND CE L L S P C 1 30 . 1 U _ 5 0 V _0 6 P L1 1 4 . 7 U H _6 . 8 *7 . 3 *3 . 5 7 -I N E 1 O UT C1 OU T C 2 + INC 2 - INC2 A DJ 2 C OM P 2 C O MP 3 P C 12 9 P R1 4 3 2 00 K _ 1 %_ 0 4 4 1 3 0 K _1 % _ 04 2 0m _ 3 21 6 1 2 3 8 P R 1 39 P R 14 1 P Q2 0 A A O 49 3 2 2 1 *1 5 U _ 2 5V _ 6 X 4 . 5 VA 4. 7 U _2 5 V _ 08 PL 4 H C B 4 53 2 K F -8 0 0T 6 0 P R1 0 1 P R9 7 1K _ 1 % _0 4 49 . 9 K _ 1% _ 04 PC6 4 0. 0 1 u _5 0 V _ X7 R _ 0 4 P R 1 63 S G ND 5 S G ND 5 P R8 6 P R8 9 * 10 m li _ s ho rt * 10 m il _ s ho rt P C6 9 * 22 P _ 5 0V _ 0 4 P C7 2 P R9 3 1 0 K _ 04 P R9 1 10 0 p _5 0 V _ N P O_ 0 4 13 , 2 5 10 K _ 1 %_ 0 4 23 . 7 K _ 1% _ 04 D A C _I N # Z 34 2 9 G P R9 6 22 K _ 1 %_ 0 4 10 0 0 p_ 5 0 V _X 7 R _ 0 4 S GN D 5 P C1 6 6 10 0 0 p_ 5 0V _X 7 R _ 0 4 P R 1 64 2 0 0K _0 4 S G ND 5 B tt er y Vo lt ag e: 9 V~ 12 .6 V 25 25 25 P L3 P L2 P L1 S MC _ B A T S MD _ B A T BA T _ DET H C B 10 0 5 K F -1 21 T 20 H C B 10 0 5 K F -1 21 T 20 H C B 10 0 5 K F -1 21 T 20 J B A T TA 1 Z 34 3 0 Z 34 3 1 Z 34 3 2 1 2 3 4 5 6 7 C 1 0 37 6 - 1 07 A 1 -B S Y S 5V PR9 2 P C7 6 P C7 7 P C7 8 30 p _5 0 V _ N P O _0 4 30 p _5 0 V _ N P O _0 4 30 p _ 50 V _ N P O _0 4 6 - 21 - 2 3P 0 0 -1 0 7 *1 5 m li _ s ho r t P R7 9 10 0 K _ 04 S G ND 5 CT L D 5V SYS5 V V DD 3 V IN VA PQ 1 8 SYS5 V P R8 0 10 0 K _ 04 Z 3 4 28 G G MT N 7 0 0 2Z H S 3 P J8 1m m MT N 7 0 02 Z H S 3 P C6 3 PC6 8 P C6 7 PC6 5 . 1 U _5 0 V _ 06 . 1 U _ 50 V _ 0 6 . 1 U _5 0 V _ 06 . 1U _ 50 V _ 0 6 1 2 , 18 , 2 6 , 28 , 3 0 , 34 , 3 6 , 37 , 3 8 , 41 3 4 , 35 , 3 6 , 41 2 , 1 1, 2 5 , 2 7, 2 8 , 2 9, 3 0 , 3 4, 3 5 2 1 , 24 , 3 4 , 35 , 3 6 , 37 , 3 8 , 39 34 2 C H G _E N 1 P Q1 6 25 VIN S D 1 M_ 0 4 S PR1 6 2 PC7 3 S VA P Q5 8 MT N 7 0 0 2Z H S 3 AC_In, Charger B - 41 B.Schematic Diagrams J_ D C -J A C K 1 JK 0 6 0 45 B A F 1 8 0 Z 34 0 1 1 2 G ND 1 G ND 2 G ND 3 G ND 4 4 6- 2 0 - B3 4 9 0- 1 0 3 P Q5 7 P 20 0 3E V G 1 5 2 6 3 7 P Q 22 8 P 2 0 03 E V G 5 6 7 8 4 V A 8 P 20 0 3 E V G 7 3 6 2 5 1 P Q3 6 Schematic Diagrams USB 3.0 3 . 3V 3 . 3V A 1. 0 V 3. 3 VA L3 7 . H C B 16 08 K F -12 1T 25 C 31 5 C 35 7 C 3 28 0 .1 u _1 0V _ X7 R _ 04 0 . 1u _1 0V _ X7 R _ 04 0 . 1u _ 10 V _X 7R _ 04 0. 1 u_ 10 V _X 7R _0 4 C 3 66 C 3 73 0 .1 u _1 0V _ X7 R _ 04 3 . 3V A C 3 25 0. 0 1u _ 16 V_ X 7R _ 04 C 40 1 0. 0 1u _1 6V _ X7 R _ 04 3 .3 V R 2 82 R 2 83 R 2 91 H2 K1 K2 1 0 0K _ 04 J2 1 0 K_ 0 4 J1 H1 1 0K _ 04 P 13 U 2A V D D 33 H 3 H4 L5 E 11 E1 2 E3 E4 H1 1 K 11 K1 2 L8 V DD1 0 V DD1 0 V DD1 0 V DD1 0 V D D 10 V D D 10 VD D 10 V DD1 0 V DD1 0 VD D 10 V D D 10 C8 C9 D 8 D 9 V DD1 0 V DD1 0 V DD1 0 V D D 10 N4 N5 N6 P3 L1 3 L1 4 L9 L 10 F3 G3 G4 C 4 C5 C6 C7 D5 V D D 10 V D D 10 VD D 10 V D D 10 V DD1 0 V DD3 3 V DD3 3 V DD3 3 V DD3 3 V D D 33 VD D 33 V DD3 3 V DD3 3 V D D 33 V DD3 3 V DD3 3 P ER ST B P EW A K E B P EC R E QB OC I 2 B OC I 1 B A U XD E T P SE L S MI B P P ON 2 P P ON 1 A6 N 8 P8 B8 3 . 3V A8 R 3 14 G 14 H 13 H 14 J14 10 K _0 4 U S B_ OC # 2 1 5, 2 6 P P ON 26 L3 9 U S B VC C 02 . H C B 1 60 8K F -1 21 T2 5 U 3 T XD P 1 C3 2 7 U S B _S P I _S C L K M2 U S B _S P I _C E# N 2 U S B _S P I _S I N1 U S B _S P I _S O M1 1 u_ 25 V _0 8 3. 3 V R2 7 6 R 27 5 S PI S C K S PI C S B S PI S I S PI S O U 3 TX D N 1 U 2 D M1 u PD720200 *1 0K _ 04 0_ 0 4 U 2D P 1 U 3R XD P 1 K 13 K 14 J 13 P4 P E W AK E U3 RX DN1 GN D GN D GN D GN D N 14 M14 P6 R 31 3 GN D U 2P V S S C 40 7 1 2p _5 0 V_ N P O_ 04 1 2p _ 50 V _N P O_ 04 P1 0 B1 2 A1 2 U 3A V S S P 1 2 R 30 4 N 12 1 . 6K _ 1% _0 4 N 11 3. 3 V 3 .3 V D 6 NC 4 *N C _0 4 GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D C3 6 3 P1 4 P1 1 P9 P7 P2 P1 N 13 N 9 N 7 N 3 M 13 M 12 M 11 M 10 M9 M8 M7 M6 M5 M4 M3 L12 L11 L7 L6 K BC _S PI _* _R = 0 .1 "~ 0. 5" 512 Kbit U GN D CS E L GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D S S T X+ V B US S S T XD G ND D + S S RX + G N D _D S S RX - . 1U _1 6V _ 04 R 2 84 1 0K _ 04 U S B _S P I _V D D _1 U2 5 8 V DD SI SO R 3 00 1 K_ 04 R 2 99 4 .7 K _0 4 U S B _ H OLD #7 U S B _ FL A S H 3 W P# CE # SC K H OL D # VSS 5 U S B _S P I _ SI _ R 2 U S B _S P I _ SO _R U S B_ S P I _S I R 2 89 1 6 R 2 87 U S B _S P I _ C E #_ R R 2 88 U S B _S P I _ SC LK _ R R 2 86 47 _0 4 U S B_ S P I _S O 15 _1 %_ 04 U S B_ S P I _C E # 15 _1 %_ 04 U S B_ S P I _S C L K 47 _0 4 4 A T 25 F5 1 2A N P R 1 73 *1 5m li _s h ort UG ND C1 2 C 13 D3 D4 D1 1 D1 2 D1 3 D1 4 E1 E2 E1 3 E1 4 F4 F6 F7 F8 F9 F11 F12 G 1 G2 G6 G7 G8 G9 G1 1 G1 2 G 13 H 6 H7 H8 H9 H1 2 J3 J4 J6 J7 J8 J9 J1 1 J1 2 K3 K4 L1 L2 L3 L4 C3 9 5 A1 A2 A3 A4 A5 A7 A9 A 11 A 13 A 14 B3 B4 B5 B7 B9 B 11 B 13 B 14 C1 C2 C3 C 10 C 11 9 1 8 2 4 3 6 7 5 GN D GN D G ND GN D GN D GN D GN D GN D GN D GN D GN D G ND GN D GN D GN D GN D GN D GN D GN D G ND G ND GN D GN D GN D GN D GN D GN D GN D G ND G ND GN D GN D GN D GN D GN D GN D GN D G ND GN D GN D GN D GN D GN D GN D GN D GN D G ND *2 4MH z 1 C 40 3 0. 1 u_ 10 V _X 7 R _0 4 XT 1 XT 2 1 00 _ 04 X7 2 C 40 4 0. 1 u_ 10 V _X 7 R _0 4 A1 0 N 10 U E A 1 11 23 -4 H K 1-4 H RRE F U 2A V S S C 14 B1 0 S H I E LD P ON R S TB S H I E LD J _U SB 5 P5 1 3, 2 6, 2 7, 2 9 P C I E _ WA K E # B6 GN D 2 D2 3 U 2D P 2 U 3R XD P 2 U3 RX DN2 P E WA K E 1 2 U S B _ C LK R E Q# S C S 7 51 V -40 U 3 TX D N 2 U 2 D M2 P ER XP P ER XN 3 , 15 , 24 , 28 P LT _R S T # 1 0K _ 04 C Sheet 41 of 57 USB 3.0 R 17 5 U 3 T XD P 2 P ET XP P ET XN GN D 1 F2 F1 12 P C IE _ TX P 6_ U S B 12 P C IE _ TX N 6 _U S B 3 . 3V P EC LK P P EC LK N S tandard-A D2 D1 1 2 P C I E _ R XP 6 _U S B 1 2 P C I E _ R XN 6 _ U S B U 3A V D D 3 3 D 7 B2 B1 1 2 C L K _P C I E _ U S B 1 2 C L K _P C I E _ U S B # A ? ? ? ? PIN6? 5V 1 .5 V C 2 61 2A S Y S 5V R2 3 6 8 C 2 51 D 1 0K _ 04 6 2K _ 1% _0 4 D C 24 3 B - 42 USB 3.0 1 V CNT L V OU T V OU T G 2 O PE N _3 A EN G ND OZ8033 C 2 68 C 28 3 VF B 2 R 26 7 . 1U _1 6V _ 04 10 u_ 1 0V _ Y 5V _ 08 C 29 2 7 50 _1 %_ 0 4 0 . 01 5u _1 0V _ X7 R _ 04 ( 15nF~48nF ) 0. 1 U _1 6V _ 04 3 K _1 %_ 0 4 . 1 U _1 6 V_ 0 4 PJ 7 1 3 C 2 33 MT N 7 00 2Z H S 3 1 . 0V 3A 4 R 25 4 Q1 7 13 , 25 , 26 , 28 , 3 6 S U S B # VIN VIN P OK 1u _1 0 V_ 0 6 6 1 u_ 6. 3 V _Y 5 V _0 4 Q 20 2 N 7 00 2_ E G S R 21 6 U2 2 5 9 7 10 K _0 4 5V R 2 20 S B.Schematic Diagrams V DD3 3 V D D 33 V D D 33 U2 7 D1 0 F13 F1 4 C 3 68 0 . 0 1u _1 6V _ X7 R _ 04 C 3 16 C 31 8 C 3 56 C 3 64 0 . 01 u _1 6V _ X7 R _ 04 C 3 69 0. 0 1u _ 16 V _X 7R _ 0 4 0. 0 1u _1 6V _ X7 R _ 04 0. 0 1u _ 16 V _X 7R _ 0 4 C 40 0 C3 6 1 C 3 59 5 p _5 0V _ N P O_0 4 0. 1 u_ 1 0V _ X7 R _0 4 0 . 01 u _1 6V _ X7 R _ 04 0 . 01 u_ 1 6V _ X7 R _0 4 C 31 4 C 3 99 C 31 7 C 4 02 0. 0 1u _1 6V _ X7 R _ 04 0 . 01 u_ 16 V _X 7R _0 4 0 . 01 u _1 6V _ X7 R _0 4 0 . 01 u_ 16 V _X 7R _0 4 C3 0 1 C 3 02 * 10 U _1 0 V_ 08 1 0u _1 0V _ Y 5 V_ 0 8 . 1U _1 6V _ 04 C 2 93 3, 9 , 10 , 1 8, 2 8, 3 4, 3 7 1 . 5V 2 , 3, 1 1 ,1 2 ,1 3 , 15 , 16 , 18 , 21 , 24 , 26 , 27 , 28 , 29 , 3 4, 3 6, 3 7, 3 8 3 . 3V 12 , 18 , 26 , 28 , 30 , 3 4, 3 6, 3 7, 3 8 5 V 3 4, 3 5, 3 6, 4 0 S Y S 5 V Schematic Diagrams Power Button Board FOR POWER SWITCH BOARD B_5VS BJ_PWR1 BJ_PWR1 1 6-20-63130-103 B_BTN# 1 2 POWER BUTTON B_BTN# TJG-533-S-T/ R BDGND PIN5,6=BDGND BDGND Sheet 42 of 57 Power Button Board B_5VS BR2 1K_06 D02 BOM change BR 1 680_06 POWER BUTTON LED A A Z 3901 BD2 Blue LED BD 1 HT-150NB-DT C C HT-SV116NB BDGND BH1 C87D87N Power Button Board B - 43 B.Schematic Diagrams 3 1 2 3 88266-03001 BSW1 4 3 Schematic Diagrams LED Board LS_3 .3VS L SR5 LSR 6 15 0_ 04 A LSD 6 C C LSD 1 L S_LED_ WLAN B LSQ2 E D TC 114EU A L S_LED_ CAP# L S_LED_ SCR OLL # LSL ED_ 11 L SD5 LSL ED_ 05 C LOCK L SD2 LED HT-170 BPZ A A LSLED _04 SCROLL C L S_LED_ NU M# 0. 1 u_ 16 V_Y 5V_04 LOCK LSD 3 LED H T-1 70 BPZ LS C5 NUM LOCK LED 6-52-53311-021 15 0_ 04 L SLED _10 A 1 50 _0 4 C 15 0_ 04 C LSR 1 A L SR2 H T-170BPZ LSR 3 LSL ED_03 CAPS LS_ 3. 3VS LS_ 3. 3VS 87151- 15 05 1 LS_ 3. 3VS 150 _0 4 LS_L ED_ NU M# LS_L ED_ CAP# LS_L ED_ SCR OL L# 6-20-94K0 0-115 L S_3.3 VS HT- 17 0B PZ L S_3.3VS C Sheet 43 of 57 LED Board LS_SATA_L ED# LS_L ED_ WL AN LS_L ED_ BT_EN LS_ 3. 3VS WLAN / BT LED HT-170BP Z L SGN D L S_LED_ BT_EN B L SQ3 DTC114EU A E LSGND LSGND E LS_3. 3VS B C LS_SATA_ LED # LSQ1 L SR 4 2 20 _04 A L SLE D_ 02 C L SD 4 LSH 1 C51D 51 N B - 44 LED Board LSH 2 C51 D5 1N HDD/ CD-ROM LED D TA11 4EU A L SLE D_ 01 H T- 170BPZ B.Schematic Diagrams LED LSJL ED 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 L SGN D Schematic Diagrams Multi I/O Board IEEE1394 S V CC _ CA R D 6-21-B4D00-004 SR 2 1 5 6_ 0 4 SR 1 9 5 6_ 0 4 SR 2 0 Z 2 0 12 SC 2 7 4 . 99 K _ 1 % _0 4 SR 5 1 0 K_ 0 4 SSDW P SR 1 0 1 0 K_ 0 4 S MD I O1 3 S J_ R J 1 H C B 1 6 0 8K F -12 1 T 25 1 H C B 1 6 0 8K F -12 1 T 25 2 T IP R ING 8 8 2 31 -0 2 00 1 SR 2 4 .7 K_ 0 4 SSD_ CD # SR 3 4 .7 K_ 0 4 S MS _ I N S # SR 6 1 0 K_ 0 4 S MD I O7 6-20-43160-102 C 1 0 1 71 -1 0 20 4 -Y MDIO0 SD-DATA0 MS-DATA0 MDIO1 SD-DATA1 MS-DATA1 MDIO2 SD-DATA2 MS-DATA2 MDIO3 SD-DATA3 MS-DATA3 S GN D Hi: on- board Low : on Add-in car d Note: Close to JMB380 2 20 p _ 50 V _ N P O_ 04 SD Card MS Card 6-21-B4P30-102 S JM OD E M1 S TI P 1 SL 5 2 2 S R I N G1 S L 4 1 1 S_ 3 .3 V S M GN D 5 6_ 0 4 30 mil 30 mil MDIO4 SD-CMD MS-BS MDIO5 SD-CLK MS-SCLK S S1 S C A R D _P W R E N # 1 S V C C_ CA RD 2 S GN D S H OR T _1 M M SC R_ T AV3 3 SC 1 8 2 0p _ 5 0V _ N P O_ 0 4 SL 1 1 2 0p _ 5 0V _ N P O_ 0 4 SR 8 Note: Close to JMB380 1 2 K _ 04 S G ND 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _Y 5V _0 4 S GN D S C1 6 0 . 1u _ 1 6V _Y 5 V _0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 S GN D S C1 9 S R1 3 0 . 1 u _1 6 V _ Y 5 V _ 0 4 * 1 00 K _ 0 4 S H4 2 3 4 5 S GN D S GN D S GN D SG ND S _ 3 . 3V S S MD I O3 S MD I O2 S MD I O1 S MD I O0 SC 1 1 0 . 1 u _1 6 V _ Y 5 V _ 0 4 37 38 39 40 41 42 43 44 45 46 47 48 D V 18 T XIN T X OU M DIO M DIO M DIO M DIO D V 33 M DIO M DIO M DIO M DIO S G ND TR EXT T PBIAS_ 1 TPA1 P T PA1 N TPB1 P T PB1 N TAV3 3 M D I O8 M DIO 9 M D I O1 0 M D I O 11 M D I O1 2 S 13 9 4 _X I S 13 9 4 _X O S MD I O7 SSDW P S MD I O5 S MD I O4 9 8 7 6 1 2 3 4 5 TC P S M D I O 13 M D I O 14 C R _L E D N D V 33 R E G_ C T R L D V 18 C R1 _ P CT L N C R 1_ C D 0 N C R 1_ C D 1 N SEECL K SEEDAT T 7 6 5 4 3 2 1 0 JMB380 S B U F _ P L T _R S T # 24 23 22 21 20 19 18 17 16 15 14 13 S T CP S SR1 1 S M D I O 13 S M D I O 14 S C R 1 _ LE D N 9 8 7 6 1 2 4 MT H 7_ 0 D 2 _ 8 3 5 1 M T H 6 _ 0D 2 _3 S GN D S _C J R E A D E R 1 S G ND SSD W P S M DI O 1 S M DI O 0 S C R_ A P V D D S C A R D _P W R E N # S S D _C D # S M S _I N S # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 S C1 2 SC 1 0 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 S G ND S M DIO 5 S R1 4 S GN D S M DI O 4 S M D_ CL K 1 S M DI O 1 S M DI O 0 2 2 _ 04 S V C C _C A R D S MD I O1 4 SR9 2 00 K _ 0 4 S MD I O1 2 SR7 2 00 K _ 0 4 S M DI O 2 S M S _ INS # S M DI O 3 S M DI O 4 S V C C _C A R D S C7 S C3 S GN D S _3 . 3 V S QFN-48 S CL K _ P CIE _ C R# S CL K _ P CIE _ C R S G ND 1 0 K _ 04 J MB 3 8 0- Q GA Z 0B 1 S C R _ T E S T2 3 4 5 6 SAPREXT 7 8 9 10 Z 20 0 9 11 Z 2 0 10 12 SG ND S H1 S U1 XR STN X T EST A P C LK N A P CL K P APVD D A P GN D APR EXT A P RX P APR XN A PV1 8 APTXN A PTXP 0 . 1 u _1 6 V _ Y 5 V _ 0 4 SH 3 M T H 7 _ 0D 2 _8 SC 9 Sheet 44 of 57 Multi I/O Board S V C C _C A R D S C1 5 S GN D 36 35 34 33 32 31 30 29 28 27 26 25 SC R_ APVD D S C1 3 0 . 1 u _1 6 V _ Y 5 V _ 0 4 S P C I E _ R X P 5 _C R 0 . 1 u _1 6 V _ Y 5 V _ 0 4 S P C I E _ R X N 5 _ C R S C R _T E S T SR4 S M DI O 3 0 _0 4 S C R_ A P V D D S M DI O 2 S S D _ CD# S V CC _ CA R D S D -W P -S W S D -D A T A 1 S D -D A T A 0 S D -GN D 1 M S -GN D 1 M S -B S S D -C L K M S -D A T A 1 M S -D A T A 0 S D -V C C M S -D A T A 2 S D -GN D 2 M S -I N S M S -D A T A 3 S D -C M D M S -S C L K M S -V C C S D -D A T A 3 M S -GN D 2 S D -D A T A 2 S D -C D -S W SC R_ APVD D 22 23 S GN D 25mil S C6 S C5 0 . 01 u _ 50 V _ X 7 R _ 04 SC 4 SC2 SC 8 0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 0u _ 1 0V _ Y 5V _0 8 1 0 0 0p _ 5 0V _ X 7 R _ 0 4 S C1 0 . 1u _ 1 6V _Y 5V _0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 MOID14 S P C I E _ TX N 5_ C R S P C I E _ TX P 5 _ C R S G ND MOID12 S GN D S R1 8 . 2K _1 % _ 04 A PREXT:12 mil H:CR1_ LEDN hig h active, L:CR1_LEDNlow active 0 . 1 u _ 16 V _ Y 5 V _ 0 4 S GN D S J_ C R B O A R D 1 S_ 5 V S_ 3 .3 V S S B U F _ P L T_ R S T# 60 mil . H C B 1 6 0 8K F -12 1 T 25 SG ND + SC2 4 D02 DEL SR16,SR17 S U S B _ P N3 SU SB_ PP3 S C2 5 1 00 u _ 6. 3 V _ B _ A S C L K _ P C I E _C R # S C L K _ P C I E _C R 0 . 1u _ 1 6V _Y 5 V _0 4 2 3 1 0 u _1 0 V _ Y 5 V _ 0 8 4 S US B _ P N 3 F L G# V OU T1 V IN 1 V OU T2 V IN 2 V OU T3 EN # GN D S U S B _ P N3 _ R 2 SU SBVCC 0 1 6 S US B _ P P 3 100 MIL 7 8 1 SC 2 6 S C2 1 SC 2 3 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _Y 5V _0 4 * 1 0U _1 0 V _ 0 8 1 2 SL 2 W C M2 01 2 F 2 S -1 61 T 0 3 S R2 2 * 0 _0 4 S U S B _ P P 3 _R 3 4 S G ND S GN D S GN D V+ S P C IE _ RX N5 _ CR S P C IE _ RX P 5 _ CR S P C I E _ TX N 5_ C R S P C I E _ TX P 5 _ C R S U S B _ OC #0 1 S S D _ CD# 6-21-C1700-210 S GN D D A TA _L D A TA _H G ND C 1 07 7 7 -10 4 0 3- L 6-21-B4930-104 R T 97 1 5 B GS S G ND S GN D 1 1 3 5 7 9 11 13 15 17 19 GN D 2 5 S GN D * 0 _0 4 3 GN D 1 SU 2 S U S B _ O C # 01 S R2 3 4 2 4 6 8 10 12 14 16 18 20 5 P 1 . 25 1 A 4 -1 3V 0 0 . 2 10 S J_ U S B 1 SC 2 8 6-21-G4020-123 Near Cardreader CONN S U S B _V C C 0 1 _ 0 SL 3 S _ 5V G ND 1 G ND 2 M D R 0 19 -C 0-1 0 4 2 SG ND H:CR1_ PCTLN high active, L:CR1_PCTLNlow active (MDIO12 is no u se n i MP ver sion IC) S US B V C C0 1 D02 DEL SU3 S C2 0 GN D 2 2 SC 1 7 SC 1 4 SM DIO 8 S MD I O9 SM DIO 1 0 S MD I O1 1 SM DIO 1 2 1 M_ 0 4 S 13 9 4 _X O ST REXT S 1 3 94 _ T P B I A S 0 S 13 9 4 _T P A 0+ S 1 3 94 _ T P A 0 S 13 9 4 _T P B 0+ S 1 3 94 _ T P B 0 - SX1 X 8 A 0 24 5 7 6F G1 H _ 2 4. 5 7 6 MH z 30 mil H C B 2 0 1 2K F -50 0 T 40 . SR 1 2 SH 2 C9 1 D9 1 N S _ 3 . 3V S GN D 1 S 13 9 4 _X I S GN D Multi I/O Board B - 45 B.Schematic Diagrams C 1 31 1 7 - 10 0 C 5 6_ 0 4 SR 1 8 S 13 9 4 _T P A 0 + S 13 9 4 _T P A 0 S 1 3 94 _ T P B 0+ S 13 9 4 _T P B 0 - Note: Close to CON S GN D SR 1 5 4 3 2 1 M GN D TPA+ TPATPB+ TPB- S B 04 0 2 TL -0 4 0 5 6 7 8 S G ND GN D 2 G ND G ND G ND G ND 4 3 2 1 0 . 3 3 u_ 1 6 V _ Y 5 V _ 06 GN D 1 SL P1 S J 1 3 94 P O R T 1 GN D 1 GN D 2 GN D 3 GN D 4 S C2 2 . . S 13 9 4 _T P B I A S 0 Schematic Diagrams Touch Sensor Board S RJ _ L E D 1 S R _L E D _ C A P # S R _L E D _ N U M # S R _L E D _ S C R OL L # S R _S E N S OR _ I N T # S R _L E D _ W L A N S R _L E D _ B T _ E N S R _S MD _ B A T 1 S R _S MC _ B A T 1 S R _ S A T A _L E D # S R_ L E D _ W L A N S R_ L E D _ B T _ E N S R _ L E D _ N U M# S R_ L E D _ CA P # S R _ L E D _ S C R O L L# SR _ VD D3 S R _ 3 .3 VS S R _ 3 .3 VS S R _ V D D3 8 7 1 5 1 -1 5 05 1 6-20-94K00-115 SR SR SR SR SR SR SR S RC 4 SR C5 0 .1 u _ 1 6 V _ Y5 V_ 0 4 0 . 1 u _ 16 V _Y 5 V _ 0 4 S R_ 5 VS SW W W _ R SW W W _ G SW W W _ B SAP_ R SAP_ G SAP_ B S EM AIL _ R S EM AIL _ G S EM AIL _ B 11 10 9 8 7 6 5 4 3 2 1 S R _ S MD _ B A T 1 S R _ S MC _ B A T 1 S R _ S E N S OR _ I N T# 38 39 40 S R _ GP I O9 S R _ GP I O1 0 S R R2 SR R5 2 2 _ 04 *2 2 _ 0 4 S R GN D GP GP GP GP GP GP GP GP GP GP GP I O0 I O1 I O2 I O3 I O4 I O5 I O6 I O7 I O8 I O9 I O1 0 SD A SC L ATTN 35 _3 . 3 V S _3 . 3 V S _5 V S _5 V S _5 V S _V D D 3 _V D D 3 VD D S R C2 SRC 1 1 u _ 6 . 3 V _ Y 5V _ 04 1 u _ 6. 3V _ Y 5 V _ 0 4 25 S S S S S S S S S S 19 18 17 16 15 14 13 12 11 10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 X GN D S RG ND 37 36 41 S RG N D AP KEY L ED SR C3 1 50 p _ 5 0 V _ 0 6 A S R D1 *L T W -0 08 R G B - L 2 6 SR _ 5 VS S RD 3 *L T W -0 0 8 R GB - L A 2 4 6 A SR D6 H T _ SV1 1 6 BP SR D 4 H T _S V 1 1 6 B P 3 1 5 3 1 *1 6 0 _ 1% _ 0 6 7 5 _ 1 % _0 6 * 9 0 . 9 _ 1% _ 0 6 *1 6 0 _ 1 % _ 0 6 75_1% _06 S RR 1 1 S R R9 S RR 7 C 5 * 90 . 9 _ 1 % _ 0 6 SR R 1 SR R 4 SRR 3 1 75_1% _06 D02 ADD SRR13 D 3 *1 6 0 _ 1 % _ 0 6 S RR 6 C 5 *9 0 . 9 _ 1% _ 0 6 S R R8 E M A IL _ KEY G R B G R B G S RR 1 0 H T_ SV1 1 6 BP S RQ 1 * 2 N7 0 0 2 W C 2 4 S R D2 *L T W -0 08 R G B -L SR G ND E MAIL KEY LED S R _ 5V S 4 KEY LE D SR D 5 SR _ SS1 W W W _ KEY SR _ SS2 D02 ADD SRR12 D AP_ KE Y S R Q4 *2 N 7 00 2 W S R R1 2 0 _0 6 S RR 1 3 0_06 D02 ADD SRR14 S R R1 4 0 _0 6 SR _ SS3 D D G S E MA I L _ G G S R GN D D G S R GN D S R Q2 S A P _R G S RQ 7 S EM AIL _ R G SR H 1 C 5 1 D5 1 N S S R G ND * 2 N7 0 0 2 W S * 2N 7 0 0 2 W S * 2 N7 0 0 2 W B - 46 Touch Sensor Board S EM AIL _ B D D S RQ 6 S WWW _R S AP_ G S RG N D S RG N D S R GN D S RG ND S RH 2 C 5 1 D5 1 N S R Q5 *2 N 7 00 2 W S G S G SR Q 9 *2 N 7 00 2 W S S A P _B S R GN D D S R GN D S SW W W _ G S G S G S R Q3 * 2 N7 0 0 2 W D D02 NET CHNAGE S WWW _B SS HL D S O 3 G2 0 1 0 S R GN D SR _ 5 VS S RQ 8 *2 N 7 0 02 W E M A IL _ KE Y AP _ KEY W W W _ KE Y 12 SH L D ND C GN D PAD S R G ND WW W 34 33 32 31 30 29 28 27 26 23 22 21 20 19 18 17 16 15 14 13 X CA P 24 8 7 1 51 -2 6 0 7 G 6-20-94K00-126 6 Sheet 45 of 57 Touch Sensor Board S R U1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 S R _S A T A _ L E D # 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 R B B.Schematic Diagrams S R J _ LE D 2 Schematic Diagrams Left-LED Board K_5V S K_5VS KJ_PW R1 KJ_ PWR1 3 KR1 680_06 88266-03 001 KR 2 68 0_06 KD 2 H T-150NB- DT C KD1 HT-150N B-DT C Sheet 46 of 57 Left- LED Board A A K DGND KDGND KH 1 C5 1D51N Left-LED Board B - 47 B.Schematic Diagrams 1 1 2 3 Schematic Diagrams Fingerprint Board FP J T1 F R EG_ OU T F BD R I VE 1 F BD R I VE 2 FP U 1 U SB _C ON N E CT BD R I VE2 B7 B8 Sheet 47 of 57 Fingerprint Board B9 C2 BEZ EL 1A NC1 BEZ EL 1B NC2 BEZ EL 2A NC3 BEZ EL 2B NC4 R E G_ OUT AVD D ES D _GN D1 ES D _GN D2 D V D D1 D V D D2 ES D _GN D3 PD _ R EG MC S MI SO MOS I MC LK U SB _D N U S B_ D P N R E SET D GN D1 R E F_ OSC ES D _GN D 4 AGN D XTA L IN D GN D2 XTA L OUT A9 B.Schematic Diagrams BD R I VE1 FGN D B - 48 Fingerprint Board B5 F U SB_ C ON N B11 F BD R I VE1 B10 F BD R I VE2 A5 F BEZ EL1 C5 F BEZ EL2 F MOSI F MC LK F MC S F N R ESE T F 3 .3V The pat h be marked in RED F 3 .3 V FGN D F GN D F GN D A1 F 3.3 V A11 C9 F GN D A4 F PD _ R EG B2 F MCS C6 F MIS O B4 F MOS I B3 F MCL K B1 F U SB_ P N C1 F U SB_ P P A2 F N RE SE T FJ1 1 C4 23 23 1 2 24 BOTTON VIEW 24 2 TOP VIEW F GN D F R EF_ OSC A8 F GN D F XI N C8 FGN D A6 F U SB_ P N F U SB_ P P F GN D F AV D D C3 TCS5XF F MIS O F U SB_ C ON N F PD _ R EG 6-21-41710-212 C 10 B6 F BE ZEL1 F BE ZEL2 F R EG_ OU T A3 C 11 F R EF_ OS C 2 4 6 8 10 12 14 16 18 20 22 24 SP N Z-24S 2- V B-017 -1 -R needs t o be design to be short and at low im pedance. C7 A10 F XIN F XOU T The TES D_GND trace has to be w ide ( > 20mil) A7 1 3 5 7 9 11 13 15 17 19 21 23 F XOU T FAV D D Schematic Diagrams Click Board T 3 .3 V T +5 V S TC 1 T+ 5 VS T+ 5 VS T R2 6 * 32 m i _l s ho rt G T P _D A T A TR 1 TR 2 TR 3 * 10 m i l_ s h or t * 10 m i l_ s h or t * 10 m i l_ s h or t G T P _C L K TR 6 * 10 m i l_ s h or t T J_ T P B 2 GT P _ C L K GT P _ D A T A TC 2 7 TU S B _ P N 1 0 T U S B _P P 1 0 G T P _L G T P _R 0. 1u _ 16 V _ Y 5 V _ 0 4 T R1 7 T R1 8 TR 14 TR 19 8 52 0 1 -10 0 5 1 T GN D *3 2m i l _s h o rt TR 27 TE S D _ GN D T G N D *0 _ 04 *0 _ 04 Z4 005 Z4 006 Z 40 0 7 Z4 008 Z4 009 Z4 010 * 1 0m i l_ s h ort * 1 0m i l_ s h ort 1 2 3 4 5 6 7 8 9 10 11 12 TSW 1 4 3 1 2 G T P _L 1 2 G T P _R T J G-5 3 3 -S - T/ R P I N 5, 6= GD GN D T GN D T C 18 *0 . 1 u _1 6 V _ 04 8 7 1 51 -1 2 07 G TG N D T GN D TSW 2 4 3 6-20-94A20-112 6-20-94A20-110 T J G-5 3 3 -S - T/ R P I N 5, 6= GD GN D I t is s tr on gly re co mme nde d t ha t th e T ESD_GND ha s a de dic at ed c on ne ctio n t o t he syst em c has sis or c ab le s hie ld. T GN D D03 CHANGE FOOTPRINT 1 3 5 7 9 11 13 15 17 19 21 23 T XIN T X OU T T MO S I T MC L K T MC S T NR E S E T T 3 .3 V T3 . 3 V 2 4 6 8 10 12 14 16 18 20 22 24 T REF _ O SC T A V DD TBEZEL 1 TBEZEL 2 T R7 *4 . 7 K _ 04 T MI S O T R5 *4 . 7 K _ 04 T MO S I T R4 4 . 7 K _0 4 T M OS I T M IS O T M CS T M CL K T 3. 3V TU 2 5 2 1 6 S Q C S# SC K V DD W P# 8 0 . 1 u _1 6 V _ Y 5 V _ 04 4 T NR E S E T T U S B _ P N _R T USB_ PP_ R T RE F _ O S C T R2 3 4 7K _0 4 T C6 1 u_ 6 . 3 V _ X5 R _ 0 4 T C2 8 2 2p _ 5 0V _N P O_ 0 4 VSS H O LD # 7 M 9 51 2 8 W MN 6 T P T 3. 3V TG N D T GN D 951206 TB E Z E L1 T GN D T U1 TB D R I V E 1 T R2 8 1 0 0 _1 % _ 04 1 TB D R I V E 2 T R2 9 1 0 0 _1 % _ 04 2 T GN D Plac e Bot ton J_FP1 23 1 2 3 T3 . 3 V T P D_ RE G 24 TOP VIEW T C 13 3 Sheet 48 of 57 Click Board T G ND T MI S O T U S B _ C ON N T P D_ R E G * C O N 2 4A TG N D T 3. 3 V D03 TMOSI & TMISO CHANGE T J _F P B 1 T R E G_ OU T T B D RIV E 1 T B D RIV E 2 T C3 0 TC 31 TC 2 1 1 u _6 . 3 V _ X 5R _0 4 1u _ 6. 3 V _ X 5 R _ 04 0. 1u _ 16 V _ Y 5 V _ 0 4 T R2 5 3 30 K _ 0 4 T C7 1 u_ 6 . 3 V _ X5 R _ 0 4 T 3. 3V TB E Z E L2 R C L A MP 0 5 0 2B TC 2 9 TE S D _ GN D 33 p _ 50 V _ N P O _ 04 2 24 BOTTON VIEW TAVD D T G ND T R E G _O U T T R3 0 T C3 2 1 6 TJ_FP1 T GN D T C 17 2. 2 _ 1 %_ 0 6 1 u _ 10 V _ 0 6 T C1 5 1 u _ 10 V _ 0 6 0 . 1 u _1 6 V _ Y 5 V _ 04 T U S B _ P N _R T G ND T R1 3 T US B _ P N1 0 2 7. 4 _ 1 %_ 0 4 T GN D T C3 4 7 p_ 5 0 V _N P O_ 0 4 T GN D T X IN TR 3 1 47 0 _0 4 T X IN_ R T R 21 1 M _0 4 T GN D 2 1 3 4 T X OU T T US B _ CO NN T R1 1 1 . 5K _1 % _ 04 T US B _ P P _ R T R1 6 2 7. 4 _ 1 %_ 0 4 T U S B _P P 10 T C2 HSX531S+-20pp m T GN D TX 1 H S X 5 31 S _ 1 2M H Z 4 7 p_ 5 0 V _N P O_ 0 4 T GN D TC 5 18 p _ 50 V _ N P O _ 04 T G ND T H1 2 4 T H3 3 5 1 2 4 MT H 6 _ 0 D 2 _ 3 T GN D T GN D TH 4 1 3 5 2 4 M TH 6_ 0 D 2 _ 3 1 8 p _5 0 V _ N P O_ 0 4 T GN D TH 6 1 3 5 2 4 M T H 6 _0 D 2_ 3 TG N D T C4 1 3 5 T H2 C5 3 D5 3 N T H5 C 53 D 53 N MT H 6 _ 0D 2 _3 T GN D T GN D Click Board B - 49 B.Schematic Diagrams 10 9 8 7 6 5 4 3 2 1 *0 . 1 u _1 6 V _ 04 T J _ TP B 1 Z4 001 Z4 002 Z4 003 Z4 004 Schematic Diagrams W870CU Second HDD Board OJ_ODD1 OJ _SATA1 S1 S2 S3 S4 S5 S6 S7 OSATA_TXP0 OSATA_TXN0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OSATA_TXP0 OSATA_TXN0 OSATA_RXN0 OSATA_RXP0 OSATA_RXN0 OSATA_RXP0 OGND B.Schematic Diagrams P1 P2 P3 P4 P5 P6 EODD_EDTECT# O_5VS O_5VS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 HSATA_TXP0 HSATA_TXN0 HSATA_RXN0 HSATA_RXP0 EODD_EDTECT# O_3.3VS C18512- 100B 6 -2 1- 13 060 -0 13 Sheet 49 of 57 W870CU Second HDD Board 88028-3010M OGND OGND OJ_HDD1 S1 S2 S3 S4 S5 S6 S7 6-21-C1D50-215 OGND HSATA_TXP0 HSATA_TXN0 HSATA_RXN0 HSATA_RXP0 O_3.3VS P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 OC6 OC1 *0.01u_16V_04 *10u_10V_08 O_5VS OGND OGND OC4 OC3 OC5 OC2 OC8 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_Y5V_04 10u_10V_Y5V_08 + OC9 OC7 100u_6.3V_B_A *22u_6. 3V_12 C16687-12204-L PIN G ND1~ 2=GND OGND OGND 6-21-14700-022 OH1 C142D142N OH2 2 3 4 5 OH4 9 8 7 6 1 2 4 MTH6_0D2_8 OH3 3 5 1 2 4 MTH6_0D2_3 OH5 1 3 5 2 3 4 5 MTH6_0D2_3 9 8 7 6 1 MTH7_0D2_8 04/ 17 OGND B - 50 W870CU Second HDD Board OGND OGND OGND OGND Schematic Diagrams W870CU Multi I/O Board IEEE1394 W V C C _C A R D W 1 39 4 _ TP B I A S 0 W L P1 W J1 3 9 4P OR T 1 GN D 1 GN D 2 GN D 3 GN D 4 G ND G ND G ND G ND TP A + T PATP B + T PB- WC 22 S B 0 40 2 T L- 0 4 0 5 4 6 3 7 2 8 1 4 3 2 1 C 1 31 1 7 - 1 00 C W R1 9 5 6 _ 04 W R1 8 5 6 _ 04 W R1 6 1 0 K _0 4 W S DW P WR 9 1 0 K _0 4 W MD I O 1 3 SD Card MS Card MDIO0 SD-DATA0 MS-DATA0 W _ 3 . 3V S 5 6 _ 04 W R1 7 WR 4 4 . 7 K _ 04 W S D_ CD # WR 3 4 . 7 K _ 04 W MS _ I N S # WR 7 1 0 K _0 4 W MD I O 7 MDIO1 SD-DATA1 MS-DATA1 MDIO2 SD-DATA2 MS-DATA2 5 6 _ 04 W R1 5 4 . 9 9 K _1 % _ 0 4 W C2 1 2 2 0 p_ 5 0 V _N P O_ 0 4 MDIO3 SD-DATA3 MS-DATA3 Hi: on- board Low: on Add-in car d Note: Close to JMB380 30 mil 30 mil W C A R D _P W R E N # W GN D W _ 3 .3 VS WL1 2 0 p_ 5 0 V _N P O_ 0 4 W R1 2 Note: Close to JMB380 12 K _ 0 4 W G ND W C2 0 W C1 7 W C1 9 W C1 5 W R1 4 0 . 1u _ 1 6V _Y 5 V _0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 1 6V _ Y 5V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 * 1 00 K _ 0 4 SD-CLK MS-BS MS-SCLK W H6 C 1 1 8 D 1 18 N WH 4 W G ND W G ND W G ND W GN D 2 3 4 5 W G ND W H1 9 8 7 6 1 2 3 4 5 W H5 9 8 7 6 1 2 4 3 5 1 W GN D 36 35 34 33 32 31 30 29 28 27 26 25 W CR_ A P V DD SD-CMD MDIO5 W V CC _ CA R D H C B 2 0 12 K F -5 0 0 T4 0 W C1 8 W MD I O8 W M DIO 9 W MD I O1 0 W M DIO 1 1 W MD I O1 2 W C1 3 W T R EXT W 13 9 4 _T P B I A S 0 W 1 3 94 _ T P A 0 + W 13 9 4 _T P A 0W 1 3 94 _ T P B 0 + W 13 9 4 _T P B 0- 2 W X1 X 8 A 0 2 45 7 6 F G1 H _ 2 4 . 57 6 MH z W V C C_ C A RD 30 mil 2 0 p_ 5 0 V _N P O_ 0 4 1 W R1 0 1 M_ 0 4 W 13 9 4 _X O 2 . W C1 6 1 S H OR T _1 M M W C R _ TA V 33 W 13 9 4 _X I MDIO4 S 1 W W W W W W 1 39 4 _ X I 1 39 4 _ X O MD I O7 SD W P MD I O5 MD I O4 W MD I O3 W MD I O2 W MD I O1 W MD I O0 W C1 0 0 . 1 u _1 6 V _ Y 5 V _ 0 4 37 38 39 40 41 42 43 44 45 46 47 48 D V1 8 T XIN T X OU T M DIO 7 M DIO 6 M DIO 5 M DIO 4 D V3 3 M DIO 3 M DIO 2 M DIO 1 M DIO 0 W B U F _P LT _ R S T # W G ND T CP S MD I O1 3 MD I O1 4 C R_ L E DN DV 3 3 R E G_ C TR L DV 1 8 C R 1_ P C TL N C R 1 _C D 0 N C R 1 _C D 1 N SEEC L K SEED AT JMB380 W C L K _ P CIE _ CR # W C L K _ P CIE _ CR W T CP S W MD I O1 3 W MD I O1 4 W C R 1_ L E D N 24 23 22 21 20 19 18 17 16 15 14 13 W R 11 W GN D MT H 6_ 0 D 2 _ 3 W G ND W G ND W GN D W _ 3 .3 VS W _ CJ RE A DE R 1 W G ND W SDW P W MD I O1 W MD I O0 W CR_ A P V D D W CA R D_ P W R E N# W S D_ C D# W MS _ I N S # WC 12 WC 9 0 . 1 u _1 6 V _ Y 5 V _ 0 4 W M DIO 5 W R5 0 . 1 u_ 1 6 V _ Y 5 V _ 04 W GN D W GN D 22 _ 0 4 W V C C _C A R D W MD I O1 4 W R8 2 00 K _ 0 4 W MD I O1 2 W R1 3 2 00 K _ 0 4 W MS _ I N S # W MD I O3 W MD I O4 W V C C _C A R D 0 . 1 u _1 6 V _ Y 5 V _ 0 4 W P C I E _ R X P 5 _ C R 0 . 1 u _1 6 V _ Y 5 V _ 0 4 W P C I E _ R X N 5 _ C R W CR_ T E S T W R2 W MD I O4 W MD _ C LK 1 W MD I O1 W MD I O0 W MD I O2 QFN-48 W C3 W C4 MT H 7 _ 0 D 2 _ 8 10 K _ 0 4 J M B 38 0 -QG A Z 0 B 1 W C R _ T E S 2T 3 4 5 6 W APR EXT7 8 9 10 11 12 W GN D TR EXT T PBIA S_ 1 T P A 1P TPA1 N T P B 1P TPB1 N T A V 33 M DIO 8 M D I O9 M D I O 10 M D I O1 1 M D I O 12 0 . 1 u _1 6 V _ Y 5 V _ 0 4 XR STN XTEST A P CL K N A P C LK P A P V DD A P G ND A P RE X T APR XP A P RX N APV1 8 A PTXN APT XP W C1 4 W GN D W _ 3 . 3V S M TH 7 _0 D 2 _ 8 WU 1 Sheet 50 of 57 W870CU Multi I/O Board W MD I O3 0 _0 4 W C R_ A P V D D W MD I O2 W SD_ CD # W V C C_ CA R D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 S D -W P - S W S D -D A TA 1 S D -D A TA 0 S D -G N D 1 MS -G N D 1 MS -B S S D -C LK MS -D A TA 1 MS -D A TA 0 S D -V C C MS -D A TA 2 S D -G N D 2 MS -I N S MS -D A TA 3 S D -C MD MS -S C LK MS -V C C S D -D A TA 3 MS -G N D 2 S D -D A TA 2 S D -C D - S W W C R _A P V D D WC 2 1 0 u_ 1 0 V _0 8 W C7 0 . 0 1 u _5 0 V _ X7 R _0 4 W C5 WC 1 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 0 u_ 1 0 V _ 08 MOID1 4 W P CIE _ T X N5 _ CR W P C I E _ T X P 5 _C R 10 0 0 p_ 5 0 V _ X7 R _0 4 MOID1 2 W GN D W GN D WR 1 8 . 2 K _ 1% _ 0 4 APREXT: 12m il W U S B V C C0 1 6 2 V IN 1 V OU T 2 V IN 2 V OU T 3 3 1 0 u _1 0 V _ 0 8 4 7 100 MIL 8 W C2 7 WC 26 W C2 5 0. 1 u _ 16 V _ Y 5V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 *1 0 U _ 1 0V _0 8 10 0 u _ 6. 3 V _ B _ A 0 . 1u _ 1 6V _Y 5V _0 4 W J_ U S B 1 W U S B _P N 3 1 EN # GN D W U S B _P P 3 U P 7 5 34 D S A 8 D02 DEL WU3 W GN D W GN D W C2 4 W US B V C C0 1 F L G # V OU T 1 W C2 8 W J _ C R B OA R D 1 W_5V 2 1 W _ 3 . 3V S 3 W B U F _P LT _ R S T # 4 6 5 8 7 W U S B _P N 3 10 9 W U S B _P P 3 12 11 14 13 W C L K _ P CIE _ CR # 16 15 W C L K _ P CIE _ CR 18 17 20 19 5P 1. 2 5 1 A 4- 13 V 0 0 . 21 0 W G ND W R2 1 4 W G ND * 0_ 0 4 3 1 2 WL2 W C M 2 01 2 F 2 S -1 61 T 0 3 W R2 0 * 0_ 0 4 1 U S B _P N 3 _ R 2 U S B _P P 3_ R 3 4 W GN D W G ND V+ W P C IE _ RX N5 _ CR W P C I E _ R X P 5 _C R W P C I E _ TX N 5_ C R W P C I E _ TX P 5 _ C R W U S B _ OC #0 1 W S D _ CD# 6-21-C1700-210 W GN D D A T A _L D A T A _H G ND C 1 07 7 7 -10 4 0 3- L 6-21-B4930-104 G ND2 5 W G ND G ND1 W US B _ O C# 0 1 6-21-G4020-123 Near Cardreader CONN 60 mil + W C2 3 D02 DEL WR22,WR23 W U2 W _ 5V W GN D W U S B _V C C 0 1 _ 0 . H C B 1 6 08 K F -1 2 1 T2 5 GN D 1 GN D 2 MD R 0 1 9- C 0 - 10 4 2 0. 1 u _ 16 V _ Y 5 V _ 0 4 H:CR1_PCTLN high active, L:CR1_PCTLNlow active (MDIO12 is no us e in MP vers ion IC) WL3 W G ND W C1 1 H:CR1_L EDN hig h active, L:CR1_LEDNlow active GN D 2 0. 1 u _ 16 V _ Y 5 V _ 0 4 WC 6 GN D 1 W C8 22 23 W GN D 25mil W GN D W870CU Multi I/O Board B - 51 B.Schematic Diagrams 6-21-B4D00-004 WR 6 W G ND W 1 3 9 4_ T P A 0 + W 1 3 9 4_ T P A 0 W 13 9 4 _T P B 0 + W 1 3 9 4_ T P B 0 - Note: Close to CON W GN D 0 . 33 u _ 16 V _ Y 5 V _ 0 6 Schematic Diagrams B.Schematic Diagrams W870CU CIR Board Sheet 51 of 57 W870CU CIR Board 4 3 2 1 4 3 2 1 V_VDD5 CIR V_VDD5 VJ_CIR1 VR1 FOR W87 V_CIR_RX 100_1%_04 VU1 88287-04001 6-21-94A50-104 IR5V V VC1 VC3 VC2 G 0.1u_16V_Y5V_04 *4.7u_25V_08 10u_10V_Y5V_08 VGND O VGND V G O GND1 GND2 GND1 GND2 IRM-V038/TR1-P VGND VGND V_CIR_RX VH1 VH4 VH2 VH3 H6_0D3_0 H6_0D3_0 H6_0D2_2 H6_0D2_2 VGND B - 52 W870CU CIR Board VGND VGND VGND Schematic Diagrams W870CU LED Board LED L _3. 3VS L _3. 3VS WLAN / B T LED NJ L ED1 L _3 .3VS L _3. 3VS L_ 3 .3VS NR 5 NL ED_ 05 HT- 17 0BPZ A C ND 1 C SCROLL LOCK LED HT -170 BPZ A ND2 C A CAPS LOCK LED H T-17 0BPZ 6-20 -94K00-11 5 C L_LED _N UM# NC5 N D3 H T-170BPZ NUM LOCK LED L_ 3 .3VS L_ 3 .3VS N D6 A N LED _ 04 C NL ED _03 N LED _1 0 L_ LED _ WLAN B NQ2 D TC 11 4 EUA 0.1u _1 6V_Y 5V_ 04 E L_LED _C AP# L_LED _SC R OLL# L_ LED _ BT_EN Sheet 52 of 57 W870CU LED Board C 150_0 4 A NR 1 1 50 _ 04 C N R2 15 0_04 1 50 _0 4 N LED _11 LGN D B NQ3 LGN D E D TC 1 14 EUA L GN D E L_3.3 VS N Q1 B C L _SA TA_LED # D TA114EU A NL ED _0 1 N R4 2 20 _0 4 NL ED _0 2 A HD D/ C N H1 C 10 6D 10 6N NH 2 C1 0 6D 10 6N H T-170 BPZ N D4 CD -ROM LE D LGND W870CU LED Board B - 53 B.Schematic Diagrams N R3 ND 5 L _L ED _N UM# L _L ED _C AP# L _L ED _SC ROL L# 87 1 51 -15051 N R6 1 50_04 H T-17 0BPZ L _SA TA_ LED # L _L ED _W LAN L _L ED _BT_EN 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Schematic Diagrams TV ANTENNA M5 70u CON HJMODEM1 HTIP HL2 2 2 HRING HL1 1 1 85205-02701 1 2 3 Z3644 FR-005D 6-20-41100-002 20279-001E-01 6-21-B4010-104 6-20-H1000-103 HJ_RJ1 HCB1608KF-121T25 1 HCB1608KF-121T25 2 TIP RING C10171-10204-Y MGND HJ ANT1 MGND HGND GND2 HJANT2 1 1 2 2 3 3 4 4 GND1 Sheet 53 of 57 W870CU RJ11 & TV Board . . B.Schematic Diagrams W870CU RJ11 & TV Board HGND HH2 C126D126N HH1 2 3 4 5 HH3 1 9 8 7 6 2 3 4 5 MTH7_0D2_8 HGND B - 54 W870CU RJ11 & TV Board 1 9 8 7 6 MTH7_0D2_8 HGND HGND HGND 6-21-B4P30-102 Schematic Diagrams W870CU Power Button Board FOR POWER SWITCH BOARD Y _5VS YJ_ PWR 1 PJ _PWR1 YSW 1 1 1 2 3 4 3 P_BTN # 3 YD G N D 88 266-0 3001 6-20-63130-103 1 2 POWER BOTTOM P_BTN # TJG -533- S-T/ R PIN5,6=BDGND D02A Y DG N D A Y R1 680_ 06 Y LED 1 POWER BUTTON LED C H T-1 70BPZ Y D G ND Y H1 C 106D 106N Y H2 2 4 Y H3 1 3 5 2 4 MTH 6_0D 2_3 YD G N D 1 3 5 MTH6 _0D2 _3 YD G N D Y D GN D D02A W870CU Power Button Board B - 55 B.Schematic Diagrams Sheet 54 of 57 W870CU Power Button Board Y_5 VS Schematic Diagrams R_5 VS R_5VS RJ_P WR1 Sheet 55 of 57 W870CU RightLogo Board 1 2 3 4 1 2 3 4 RLR1 680_06 88266-0 400 R DGND A 6-20-63110-104 RD1 HT-SV1 16BP C B.Schematic Diagrams W870CU Right-Logo Board RDGN D B - 56 W870CU Right-Logo Board White LED Schematic Diagrams W870CU Left-Logo Board L_5V S 1 2 3 4 1 2 3 4 LR1 680_06 88266-0 400 A L DGND LD1 HT-SV1 16BP C 6-20-63110-104 Sheet 56 of 57 W870CU Left-Logo Board White LED LDGN D W870CU Left-Logo Board B - 57 B.Schematic Diagrams L_5VS LJ_P WR1 Schematic Diagrams W870CU Touch Sensor Board H K J_ L E D 2 Sheet 57 of 57 W870CU Touch Sensor Board H KJ _ L ED 1 HK U1 H K _ S A T A _L E D # H K_ L ED _ W L AN H K_ L ED _ BT _ EN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 H K_ L ED _ CA P# H K_ L ED _ NU M # H K_ L ED _ SC RO L L # H K _ S E N S OR _ I N T # H K_ L ED _ W L AN H K_ L ED _ BT_ EN H K_ SM D _ BAT 1 H K_ SM C _ BAT 1 H H H H H H H H K _ L E D _ N U M# H K _ L E D _ CA P # H K _ L E D _ S C R O L L# H K_ VD D3 H K_ 5 VS H K R2 H KR 5 2 2 _ 04 * 2 2 _ 04 H KG ND H KC 4 6-20-94K00-115 11 10 9 8 7 6 5 4 3 2 1 H K _ S MD _ B A T 1 H K _ S MC _ B A T 1 H K _ S E N S OR _ I N T# 38 39 40 H K_ G P IO 9 H K_ G P IO 1 0 H K_ 3 .3 VS H K_ 3 .3 VS 8 7 1 5 1 -1 5 05 1 K_ 3 .3 V S K_ 3 .3 V S K_ 5 VS K_ 5 VS K_ 5 VS K_ VD D 3 K_ VD D 3 W W _R W W _G W W _B AP_ R AP_ G AP_ B EM AIL _ R EM AIL _ G EM AIL _ B HKW HKW HKW HKS HKS HKS HKS HKS HKS GP GP GP GP GP GP GP GP GP GP GP I O0 I O1 I O2 I O3 I O4 I O5 I O6 I O7 I O8 I O9 I O1 0 SD A SC L ATTN 0 .1 u _ 1 6 V _ Y5 V_ 0 4 35 H K C2 H KC 1 1 u _ 6 . 3 V _ Y 5V _ 04 25 1 u _ 6. 3V _ Y 5 V _ 0 4 24 H KG ND 8 71 5 1 - 2 6 0 7 G 6-20-94K00-126 37 36 41 H KG N D H KG N D VD D S S S S S S S S S S 19 18 17 16 15 14 13 12 11 10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 34 33 32 31 30 29 28 27 26 23 22 21 20 19 18 17 16 15 14 13 H KE M A IL _ K E Y H KAP_ KE Y H KW W W _ KE Y 12 H KSH L D X CA P X GN D SH L D ND C GN D PAD HK C3 1 50 p _ 5 0 V _ 0 6 S O 3 G2 0 1 0 H K G ND AP KEY L ED HK D6 H T _S V 1 1 6 B P 3 1 5 3 1 5 3 1 *1 6 0 _ 1 % _ 0 6 75_1% _06 * 90 . 9 _ 1 % _ 0 6 *1 6 0 _ 1% _ 0 6 7 5 _ 1 % _0 6 * 9 0 . 9 _ 1% _ 0 6 *1 6 0 _ 1 % _ 0 6 75_1% _06 C 5 *9 0 . 9 _ 1% _ 0 6 D02A HKR6 change to 75_1%_06 D02A HKR1 change to 75_1%_06 HK E M A IL _ KEY G R B G R B G C H KD 4 H T_ SV1 1 6 BP C H KD 5 H T _ SV1 1 6 BP A 2 6 H K D1 *L T W -0 08 R G B - L A 4 6 H K_ 5 VS HK D 3 *L T W -0 0 8 R GB - L A 2 4 6 H K D2 *L T W -0 08 R G B -L H KG ND E MAIL KEY LED H K _ 5V S 4 KEY LE D H K_ 5 VS 2 WW W R B H K_ SS1 HK W W W _ KEY H K_ SS2 D02A HKR7 change to 75_1%_06 HK R1 3 0_06 H KR 7 D02 ADD HKR13 H K R9 0 _0 6 H KR 1 1 H KR 1 2 H KR 1 D02 ADD HKR12 HK R 3 H KR 4 H KR 6 H K R8 HK R 1 0 HK AP_ KE Y H K_ SS3 D02 ADD HKR14 H KR 1 4 0 _0 6 H K G ND G D D H K Q5 *2 N 7 00 2 W S G H K GN D H KG N D H K Q2 H KSAP_ R H KQ 7 G H K S E MA I L _ R G * 2 N7 0 0 2 W S * 2N 7 0 0 2 W S * 2 N7 0 0 2 W H K G ND H K GN D H K G ND HK H3 C 1 0 6 D 1 06 N B - 58 W870CU Touch Sensor Board H KQ 9 *2 N 7 00 2 W H K S E MA I L _ B G H K G ND H KQ 6 H KW W W _ R H KSA P_ G S D G D H KG N D H KQ 1 * 2 N7 0 0 2 W G D H K GN D D H K Q3 * 2 N7 0 0 2 W H KSAP_ B D HK W W W _ G S S G S H K Q4 *2 N 7 00 2 W H KW W W _ B G S D H KQ 8 *2 N 7 0 02 W D D02 NET CHNAGE S B.Schematic Diagrams H K _ S A T A _ L E D# 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 H KH 4 C 1 0 6 D1 0 6 N H KS EM AIL _ G