Download AD520 and ADA520 MANUAL

ADA52O
UsertsManual
ffi
RearTimeDevices,
Inc.
"AccessingtheAnalog World'*
ISO9001 and AS9100 Certified
ADA52O
UsertsManual
ffi
REALTIMEDEVICES,
tNC.
820NorthUniversity
Drive
PostOfficeBox906
StaleCollege,Pennsylvania
16804USA
Phone:(914)2g4A0A7
FAX:(814)294-SZ1B
Publishedby
RealTime Devices,Inc.
820 N. University Dr.
P.O.Box 906
StateCollege,PA l680t USA
Copyright@ 1992by Real Time Devices,Inc.
All rights reserved
Printedin U.S.A.
TABLE OF CONTENTS
INTRODUCTION
WhatComesWith Your
Application Software
CHAPTERI - BOARDSETTINGS
Factory-Configured
SwirchandJumperSettings
...............1-3
P4- Single-Ended/Differential
AnalogInpus (Factorysening: Single-Ended)
...........................................14
P5- 8254Timer/CounterClock Sources(FacrorySetrings:CLK0-XTAL, CLKI-OLrr0, ClK2-oti'rl)...14
P6- DAC I OurpurVoltageRange(FacorySeuing:+5 o -5 volrs)...........
........1_5
P7- DAC 2 OurpurVolage Range(Facory Sering:+5 to -5 volrs) ...........
........1-6
P8- ExternalTriggerIn (FacorySecing:Disabled)
.......................1_6
P9- IntemrptSourceandChannelSelect(FactorySetting:OUT2;IntemrptChannelsDisabled)...............1-6
Sl - BaseAddress(FacorySetting:300hex(76gdecimal)).................
..............1-7
52 - Differential/Single-Ended
GroundSwitch(FacorySecing:OPEN) ...................
.............1_g
53 - A/D Conversion
Rate(FactorySetting:7.5llz)
.......................
l-9
Pull-up/Pull-down
Resistors
on Diginl I/O Lines.....
.........1-9
IOUTand
CHAPTER 2 - BOARD INSTALLATION
ConnectingtheAnalogInputpins
Connecting
theTriggerIn andTriggerOutpins,Cascading
8oards.........
ConnectingtheAnalog
Connecting
theTimer/Counters
andDigitalVO ...............
Runningthe520DIAGDiagnostics
Program
CHAPTER 3 _ HARDWARE DESCRIPTION
2-7
..............2-6
..................2_6
.....................2_6
3-t
CHAPTER 4 - BOARD OPERATION AND PROGRAMMING
BA + 0: PPIPortA - ReadA/D Dara(ReadOnly)
BA + l: PPIPorrB - Digir.alVO (Read/Wrire)
...............
BA + 2: PPIPortC - ChannelSelecVGain
SelecVA/D
Control/(WriteOnly)...........
BA + 3: 8255PPIConrrolWord(WriteOnly)...........
.........................44
................44
...............44
.......................4_5
BA + 4: ID RegisterlSuffered
Digital VO Direction(Readlilrite)
BA + 5: PortA DigitalVO Lines(ReadAMrite)
BA + 6: PortB DigiralVOLines(Readlfrire)
.........................4-7
............4-7
BA + 7: Port C Digital I/O Lines(ReadAilrite)
BA + 8: 8254Timer/Counrer
0 (Read/lMrite)
BA + 9: 8254Timer/CounrerI (ReadAilrire)
BA + l0: 8254Timer/Counter
2 (Read,tlMrite)
BA+ l1: S254ConrolWord(WriteOnly)...........
BA + 12:UpdateDACS/D/AConverterI LSB @ead,AVrire)
..............
BA + 13: Status/D/A
Converrer
I MSB (Read,AMrite)
BA + 14: D/A Converter
2 LSB (WrileOnly)...........
BA + 15: D/A Converter
2 MSB (WriteOnly)...........
............4-7
...............4-g
...............4_g
.............4-g
.......4_g
..................4_g
.......................4_9
........................4_9
.......................4_9
ClearingandSettingBis in aPort..........
.....................4-10
.Single
.Continuous
ConvertMode...........
......4_14
WhatIs
8259Programmable
IntemrptController
IntemtptMaskRegister(Ilv[R)..........
End-of-Intemrpr
(EOI)Command
WhatExactlyHappens
WhenanIntemrptOccurs?.............
UsingIntemrprsin Your Programs
Writingan InrcmrprServiceRoutine
0SR)
savingthestartupIntemrptMaskRegister(IMR) andIntemrptvecror
Restoringthe StartupIMR andIntemrptVector
CommonIntemrptMistakes
ExampleProgramsandFlow Diagrams
C andPascal
.................4_lg
......................4_lg
......4-lg
........4_19
.....4_lg
..-..........4_lg
..........4-20
.....4-Zl
...............4-Zl
......4_24
CHAPTER 5 _ CALIBRATION
Reference
CurrentandVoltageOut Adjust...
APPENDIX A - ADAs2OSPECIFICATIONS......
APPENDIX B - CONNECTORPIN ASSIGNMENTS..
APPENDIXC - COMPONENT
DATA SHEETS.....
APPENDIX D _ CONFIGIJRINGTHE ADAs2OFOR SIGNALI.MATH..........
APPENDIXE - CONFIGURINGTHE ADAs2OFOR ATLANTIS
APPENDIX F - WARRANTY
.....................5-7
..........8.1
..........c-1
.........D-I
E-l
LIST OF ILLUSTRATIONS
l-l
t-2
l-3
t4
l-5
l-6
t-7
l-8
l-9
l-10
1 - 1I
t-r2
2-l
a.t
2-3
24
2-5
3-r
3-2
4-l
4-2
4-3
AA
4-5
4-6
5-l
BoardLayoutShowingFactory-Configured
Settings...................
Single-Ended/Differential
AnalogInputSignalTypeJumpers,
P4 ..............
8254Timer/Counter
ClockSourceJumpers,
P5................
8254Timer/Counter
Circuit Block Diagram
DAC 2 OutputVoltageRangeJumper,P7 ........................
ExternalTriggerIn, P8 ..........
IntemrptSourceandChannelSelectJumper,P9...............
BaseAddress
Switch,Sl ................
DifferentiaVSingle-Ended
GroundSwitch,52 ...............
A/D Conversion
RateSwitch,S3................
Pull-up/Pull-down
ResisorCircuitry....
P2 andP3 I/O ConnectorPin Assignments
Single-Ended
InputConnections,
No Dedicated
GND............
Single-Ended
InputConnections,
Dedicar€d
GND
DifferentialInputConnections
............
Cascading
Two Boardsfor Simultaneous
Sampling
ADA520BlockDiagram
D/A ConverterConfigurationfor ImprovedSettlingTime ...........
SingleConvertModeTimingDiagram
ContinuousConvertModeTiming Diagram
SingleConvertModeFlow Diagram
ContinuousConvertModeFlow Diagram
Cascaded
Boards,SingleConvertModeFlow Diagram
8254Programmable
IntervalTimer CircuitBlock Diagram
BoardLayoutShowingCalibration
Trimpos......
..................1-3
.......................14
........1-4
..........1-6
........l-7
......................1-7
...........1-8
..........1-9
..............1-10
.........................24
.......................24
...................2-5
.................2-6
.................2-7
.................3-3
.................34
..............4-I4
......4-14
..................4-15
..........4-16
.........4-17
...4-23
......................5-3
INTRODUCTION
The ADA520 differentialintegratinganalogI/O boardturnsyour IBM PC/XT/AT or compatiblecompurerinlo
a high-performance
dataacquisitionandcontrolsystem.Insalled within a singleexpansionslot in thecomputer,the
ADA520 features:
.
.
.
.
.
.
8 differential,8 single-ended
with dedicatedgrounds,or 16single+ndedanaloginput channels,
l2-bit integrating,A'iDconvenerfor high stabilityandexceptionalnoiseimmuniry,
-5 o +5 volt inputrange,
gainsof l, 10, 100,and 1000,
Programmable
Trigger in andtrigger out for cascadingboards,
3?T-ILICMOSdigital I/O lines(24 with bufferedoutpurs);optionalpull-upftull-downresisrors,
Threel6-bit,8 MHz timer/counters,
Two l2-bit digital-to-analog
outputchannelswirh dedicatedgrounds,
15, 110, 0 o +5, or 0 to +10 volt analogoutputnrnge,
IOUT and VOUT referencesat I/O connectorfor exlernalcircuiry,
TurboPascal,TurboC, andBASIC sourcecode;diagnostics
program.
The following paragraphsbriefly describethe major functionsof the board.More detaileddiscussionsof board
functionsareincludedin Chapter3,HardwareDescription,andChapter4,Board Operatbnandprogramming.The
boardsetupis describedin Chapterl, Board Settings.
Analog-to-DigitalConversion
The analog-todigital (A/D) circuitry receives8 differenrial,8 single-endedwith dedicatedgrounds,or 16
single-endedanaloginpurcand convertstheseinputsinto 12-bitdigiat datawordswhich canthen be readand/or
transferredto PC memory.
The analoginput channelscanbe set for single-ended,single-endedwith ground,or differential operarionby
setdnga jumperandswitchon theboard.The inputvoltagerangeis -5 to +5 volts for a gain of I (therangeis -O.So
+0.5 volts for gain= 10;-.05 O +.05 vols for gain= 100;-.005o +.005vols for gain= f OOO).
Theconversionrare
is switch-selectable
for ei*rer7.5or 30 Hz. The7.5 Hz rateprovideshigh rejection(over60 dB) of 60 Hz line noise.
Customerswith 50 Hz line powercanspecify6.ZSp5Hz switch-selectable
iatesfor highrejecrionof 50 Hz line
noise.
A./Dconversionsareperformedby a 12-bit @lussign bit showingpolarity) dual-slopeintegratingconverter,
providingeffectivelyl3'bit conversionresolution.Theprogrammable
gainsof 1, 10, 100,and iOOOf"t you discern
changesin the input voltageassmallas 1.3microvolts.
Theconverteddatais readand/ortransfenedo pC memory,onebyte at a time,throughthepC databus.
Digital-to-Analog
Conversion
The digital-o-analog(D/A) circuitryon theADA520 featurestwo independenr
l2-bir analogourpurchannels
with individuallyjumper-selectable
outputrangesof -5 to +5 volts,-10 to +10 volts,0 !o +5 volts,or 0 to +10 vols.
Datais programmedinto theD/A converteranda conversionis automaticallytriggeredfor borhchannelsthrough
a
singlereadoperation.
Digital VO
The ADA520 has32 TTL/CMOS-comparible
digital I/O lineswhichcanbe directlyinterfacedwith exrernal
devicesor signalsto senseswitchclosures,triggerdigitalevents,or acdvatesolid-sarcrelays.Eight of theselines
arcprovidedby Port B of theon-board8255programmable
peripheralinterface@PI)chip.Theremaining24 lines
canbe programmedin groupsof eightasinputsor outputs.To ensurehigh &iving capacity,CMOSbuffersare
installedon lhese24 lines.
Padsfor insrallingandacrivatingpull-upor pull-downresistorson thedigial I/o linesareincludedon the
procedures
board.Installation
aregivenat theendofchaprerl, BoardSettings.
What ComesWith Your Board
You receivethefollowing itemsin your ADA520package:
. ADA520 interfaceboard
. Softwareand diagnosticsdiskeuewith exampleprolrams in BASIC, Turbo Pascal,andTurbo C; sourcecode
. user's manual
If any item is missingor damaged,
pleasecall RealTime Devices'CustomerServiceDepartmentat
(814)234-8087.If you requireserviceoutsidetheU.S.,contactyour localdistribuor.
Board Accessories
In addition to the itemsincludedin your ADA520 package,RealTime Devicesoffers a full line of softwareand
hardwareaccessories.
Call your local distributoror our main office for moreinformationabouttheseaccessories
and
for help in choosingthe besritemsto supportyour board'sapplication.
Application Softwareand Drivers
Our cuslomapplicationsoftwarepackages
provideexcellentdataacquisitionandanalysissupport.Use
SIGNAL*MATH for integrateddataacquisitionandsophisticateddigital signalprocessingand analysis,or
ATLANTIS for real-timemonioring anddataacquisition.rtdLIl.IX and labLINX driversprovide full-featruedhigh
level interfacesbetweenthe ADA520 andcustomor third parry sofrware,includingLABTECH NOTEBOOK,
NOTEBOOK,DG,and LTICONTROL. rtdLIl.IX sourcecodeis availablefor a one-rimefee. Our pascalandC
Programmer's
Toolkitprovidesroutineswith documented
sourcecodefor customprogramming.
Hardware Accessories
Hardwareaccessories
for the ADA520 includethe lvD(32analoginput expansionboardwhich can expanda
singleinput channelon your ADA520 to 16differentialor 32 single-ended
inputchannels,MR seriesmechanical
relay outputboards,OP seriesoptoisolateddigital input boards,theTS16 temperauresensorboard,ttreTB50
terminalboardandXB50 prootype/terminalboardfor easysignalaccessand prototypedevelopment,the EX-XT
andEX-AT extenderboardsfor simplified testingand debuggingof prorotypecircuitry, anAXiSO and Xp40 flat
ribboncableassemblies
for externalinterfacing.
UsingThis Manual
This manualis intendedto helpyou installyour newboardandget it runningquickly,while alsoproviding
enoughdetailabouttheboardandits functionsso thatyou canenjoymaximumuseof its featuresevenin fte most
complexapplications.We assumethatyou alreadyhavean understanding
of dataacquisitionprinciplesandthatyou
cancustomizetheexamplesoftwareor write yourown applications
progmms.
When You NeedHelp
This manualandtheexampleprogramsin thesoftwarepackageincludedwith your boardprovideenough
informationto properlyuseall of theboard'sfeatures.If you haveanyproblemsinstallingor uring thisboard,
contactour TechnicalSupportDepartment,
(814)234-8087,duringregularbusinesshours,easrcrnstandardtime or
easterndaylighttime,or senda FAX requestingassistance
to (814)234-52l8.Whensendinga FAX request,please
includeyour cornpany'snameandaddress,your name,your telephone
number,anda brief descriptionof m
problem.
CHAPTER1
BOARD SETTINGS
The ADA520 hasjumperandswitchsettingsyou canchangeif
necessary
for your application.The boardis factory-configured
with the mostoftenusedsettings.The factorysettingsarelisted
andshownon a diagramin thebeginningof this chapter.Should
you needto changethesesettings,usetheseeasy-to-followinstructionsbeforeyou installthe boardin your computer.
Also notethatby installingresistorpacksar anyor all of the
four locationson the board,RN2,RN3,RN4, andRN6, andsoldering a jumperbetween+5V andcommonor betweengroundand
commonin the associated
padsfor eachresistornetwork,you can
configureeachof the four groupsof digital VO linesto bepulled
up or pulleddown.This procedureis describedat theendof this
chapter.
Factory-Configured
SwitchandJumperSettings
Tablel-l liss thefactorysettingsof theuser-configruable
jumpersandswircheson rheADA520.Figure l-l
showslhe boardlayoutandthelocationsof thefacory-setjumpers.The followingparagraphs
explaintrow o
changethe factorysettings.
Table1-1- FactorySetilngs
Swltch/
Jumper
FunctlonControlled
FactorySettlng
P4
Sets16single-ended
or 8 single-ended
with
ground/8
ditferential
analoginputtype;usedin
conjunction
with52
P5
Jumpersinstalled
on
Setstheclocksourcesforthe9254timer/counters CLKO.XTAL,
CLK1.OUTO
&
(TCo-TC2)
CLK2OUTl
P6
Sets the D/A outputvoltagerangelor DAC1
+5 lo -5 volts
P7
Setsthe D/A outputvoltagerangelor DAC2
+5 to -5 volts
P8
Connectsan exlernaltriggerfor simultaneous
triggeringof cascadedboards
(notconnected)
Disabled
P9
Connects1 ol 5 interrupt
sourcesto an interrupt
channel
Jumperinstalled
on OUT2:
interrupt
channels
disabled
S1
Setsthe base address
300hex(768decimat)
s2
Connestsnegativeside of differentialinputsto
groundfor 8 single-endedwith groundoperation
Closed(8 single-endedwilh
ground)
s3
Sets the A./Dconversionrale
7.5Hz
8 single-ended
withground
(3 jumpersinstalled
on D
pins)
EA
Eg
Bg
tool
bd
Eg
pq
tool
Eg
Efl
lool
pq
tool
lool
ilililtr9Efr
Fig.1-1- BoardLayoutShowingFactory-Configured
Settings
l-3
Eg
P4- single-Ended/Differentiat
AnatogInputs (Factorysetting: D (g singte-Ended))
This headerconnector,shownin Figure1-2,is usedwith switch52 o configuretheADA520 for 8 differential,
8 single-ended
with dedicatedgrounds,or 16single-ended
analoginputchanneti.Wtrenoperadngin rhe 16input
single-ended
mode,lhreejumpersmustbe insulled acrosstheSEpins.Whenoperatingin the8 single-endeO
with
dedicatedgroundsor 8 differentialmode,threejumpersmustbe installedacrositle D pins.DO NOT install
jumpersacrossbothSE andD pinsat thesarnedme!
J.-.l'
l:l;'
l:l;'
.
r.=
L=.
Fig.1-2- Single-Ended/Diff
erentiatAnatogInputSignalTypeJumpers,P4
P5 - 8254Timer/CounterClockSources(FactorySettings:CLKO.XTAL,CLKI.OUT0,
CLK2-OUT1)
This headerconnector'shownin Figurel-3, letsyou selecttheclock sourcesfor ttre8254
timer/counters,
TCp,
TCl, andTC2. The facrcryserringcascades
all threerimer/counters,
with theclock sourcefor TCObeingtheonboard8 MHz oscillator,theoutputof TCOprovidingtheclock for TC l, andtheoutput
of TCI providingtheclock
for TC2. You canconnectany or all of thesourcesto an erternalclock input through p2
the andp3 I/O connectors,
or you cansetTCI andTCZ to be clockedby the8 MlIz oscillator.Figurel-4 showsa
block diagramof thetimer/
countercircuitry to helpyou with theseconnections.
NoTE: Wheninstallingjumperson tlrisheader,makesurethatonly onejumperis installed
in eachgroupof
two or threeCLK pins.
P5
9l
dl
XTAL
;l
ouT0
EXTCLKO
XTAL
EXTCLKl
H
OUTl
N
Y
()
XTAL
EXTCLK2
Fig.1-3- 8254Timer/Counter
ClockSourceJumpers,p5
520
UO CONNECTOR
F--------
I 8254
TIIIER/
COUNTER
0
CLK
GATE
|
I
I
tl
:P5;
I
lcrraA
r
TTttl
i
-'-I
I
EXT CLK O
+5V
EXT GATEO
I
OUT
TIIIER/
COUNTER
I
I
I
ll
T/C OUT O
I
I
I
ii"-'ffii-J
;+-
CLK
I
GATE
OUT
F8.29
EXT GATE 1
I
I
T/C OUT 1
I
I
I
I
I
! 1"",'fe4
TIMER/
COUNTER
2
EXT CLK 1
+5V
_A
CLK
Ti
EXT CLK 2
JAL-?+S
I
V
EXT GATE 2
GATE
OUT
L
T/C OUT 2
I
---------J
Fig. 1-4 -8254 Timer/CounterCircuitBtockDiagram
P6 - DAC I Output VoltageRange(Factory Setting:+5 to -5 volts)
This headerconnector,shownin Figurel-5, setsrheouput voltagerangefor DAC I at 0 to
+5, +5,0 to +10,or
ilO volts.Two jumpersmustbe installed,oneto selecttherangeanooneo selectthemultiplier.
The two top
jumpersselecttherange,bipolar(15) or unipolar(5). Thet*o bouomjumpers
selectthe*ultipli"r, X2 or Xl. When
a jumperis on theX2 multiplierpins,therangevaluesbecome+10 anOtO.Thetablebelowsh'ows
thefo'r possible
combinations
of jumpersettings,andthediagramshowsthe factorysening.This headerdoesnot haveto
be setthe
sameasP7.
Fig.1-5- DAC1 OutputVottageRangeJumper,p6
Jumpers(Bottomto Top)
Voltage Range
x2
x1
+5
5
-5 to +5 vohs
OFF
ON
ON
OFF
0lo +5 volts
OFF
ON
OFF
ON
-10 to +10 volts
ON
OFF
ON
OFF
0 to +10 volts
ON
OFF
OFF
ON
P7 - DAC 2 Output VottageRange(FactorySetting:+5 to -5 votts)
This headerconnector,shownin Figure1-6,setstheouput voltagerangefor DAC 2 at 0 to +5,15,0 Eo+10,
or
t10 volts' Two jumpersmustbe installed,oneto selecttherangeandonetoselectthemultiplier.The two rightrnost
jumpersselecttherange,bipolar(15) or unipolar(5). Thetwo leftmostjumpers
selectthemultiplier,X2 or il.
Whena jumperis on theX2 multiplierpins,therangevaluesbecome+10 and 10.The tablebelowshows
thefour
possiblecombinations
ofjumper settings,andthediagramshowsthefactorysetting.This headerdoesnot haveto be
setthesameasP6.
P7
:II:
fISs'
Fig.1-6- DAC2 OutputVoltageRangeJumper,p7
Jumpers(Left to Rlght)
VoltageRange
and Polarity
x2
xl
r5
5
-5 to +5 volts
OFF
ON
ON
OFF
0 to +5 vohs
OFF
ON
OFF
ON
-10 to +10 vohs
ON
OFF
ON
OFF
0 to +10 volts
ON
OFF
OFF
ON
P8 - External Trigger In (FactorySetting: Disabled)
P8, shownin Figurel-7, enabtesanddisablestheextemalrigger input when
thejumperis seto rheenabled
position,the externaltrigger in pin (pin 19) at on-board connectorpj
VO
is connected6 n" ep converterso that
two or moreboardscanbe run synchronouslyin a .,master/slave,,
configuration.Note that this headerconnector
enablesanddisablesrtretriggerin only it doesnot affecttherriggerouitin".
EXTTRIG
Drs
EN
Fig. ,t-l -
ExternalTrigger ln, pg
P9 - Interrupt Sourceand ChannelSelect(FactorySetting: OUT2; Interrupt
ChannelsDisabled)
This headerconnector,shownin Figurel-8, les you connectoneof five intemrpt
sourcesto an interrupt
channel,IRQ2 throughIRQ7.To connecttlreintemrptsourceto an intemrptchanneiyou
mustinsall nvojumpers
on this header:oneacross0redesiredsourceanda secondacrossthedesiredIRe channel.
Theavailablesourcesare
theend-of-convert
signal(EOC),rimer/counrer
OUTI, rimerrcounrer
OUT2,pCOfrom the g255ppl, andthe
exrcmalniggeravailableat P3-19(TRIGII'D.Figure1-8ashowsthefacory seuingwith
theIRe jumpersaoredin a
disabledposition,andFigurel-8b showsOUT2connected
to IRe3.
P9
Fig.1.8a- Factory
Selting(lRQdisabled)
o{ooooooo?o
.ooooooool.
!!TITT=
oooooo=
106566{O
z
EgSH
P9
o?ooooo.o?o
oaoooooooao
NF
o
o
Nq)
EErE;xegg
88896u-iro
=
Fig. 1-8-
IntenuptSourceand ChannelselectJumper,p9
S1- BaseAddress(FactorySetting:300hex (268decimal))
Oneof themostcommoncausesof failurewhenyou arefirst trying your boardis addresscontention.Someof
your computer'sI/O spaceis alreadyoccupiedby internalVO andotherperipherals.
WhentheADA520 board
attemptsto useI/O addresslocationsalreadyusedby anotherdevice,contentionresultsand the boarddoe.snot work.
To avoidthisproblem,theADA520 hasaneasilyaccessible
DIP switch,S1,which letsyou selectanyoneof
32 startingaddresses
in thecomputer'sI/O. Shouldurefactorysertingof 300 hex(768decirnal)be unsuitablefor
your system,you canselecta differentbaseaddresssimplyby settingtheswitchesto any oneof the valueslisted
in
Tablel-2. The able showslhe switchsettingsandtheircorresponding
decimalandhexadecimal
(in parenttreses)
values.Makesurethatyou verify theorderof theswitchnumberson theswirch(1 through5) beforesetdngthem.
Whentheswitchesarepulledforward,theyareOPEN,or setto logic l, aslabeledon ttreOlp swirchpackige.When
you setthebaseaddressfor your board,recordthevaluein thetableinsidethebackcover.Figure l-9 shows
theDIp
switchsetfor a baseaddressof 300hex(768decimal).
Fig.1-9- BaseAddressSwitch,Sl
Tabfe 1-2- BaseAddressSwltchSettlngs,S1
BaseAddress
Declmal/(Hex)
SwltchSettlng
54321
srzt(2w)
00000
s28| (2r0)
00001
sM | (220)
00010
s60tQ30)
00011
s76t(2/t0)
00
s92tQso)
BaseAddress
Declmal/(Her)
768/ (300)
784| (310)
SwltchSetting
54321
10000
1000r
800/ (320)
816/ (330)
10011
832 tQ40)
10100
00101
848/ (350)
1010t
608/ (260)
624| (270)
00110
864/ (360)
10110
00lll
880/ (370)
l0lll
&0 t(280)
0 1000
896/ (380)
I1000
6s6| (290)
672| (2A0)
01001
9r2| (390)
ll00l
01010
11010
688/ (2Bo)
01011
928/ (3A0)
944/ (380)
7U t(2C0)
01100
11100
720l(2Do)
0ll0l
960/ (3C0)
976/ (3D0)
736/ (280)
7s2tQF0)
0lll0
992/ (3E0)
1008/ (3F0)
llll0
00
0llll
10010
ll0l1
11101
lllll
0 = c l o s e d , 1= o p e n
s2 - Differentiausingle-Ended
Ground switch (Factorysetting:cLosED )
DIP switch52, shownin Figurel-10, is usedin conjunctionwith headerconnectorp4 to setup theanalog
inputsfor 8 differentiat,8 single-ended
with dedicatedgrounds,or 16single-ended
operation.Whenthe eight
switchesareOPEN(forward),theysupport8 differentialor 16single-endidinpus, dependingon theseuingof p4.
WhentheswitchesareCLOSED(back),theysupport8 single-ended
inpus with dedicatedgrounOs.
Wirh p4 set
to D, switchescanbe individuallysetfor differentialor single-ended
wittr groundoperationlswitch1 ses channell,
switch2 setschannel2,etc.The nble belowshowsthethreeconfigurations
for p4 and52.
Settlngs
InputContiguration P4Jumpers
8 DIFF
D
OPEN
8 SEwithAGND
D
CLOSED
1 6S E
SE
OPEN
Fig.1-10- DifferentiaUSingte-Ended
GroundSwitch,52
l-8
52 Swltches
53 - AJDConversionRate(FactorySetting:7.5Hz)
DIP switch53, shownin Figurel-l l, configurestheboardo performA/D conversions
at a rateof ?.5 conversionsper second(7.5Hz) or 30 conversions
per second(30 Hz). The four swirchesoperateasa group.Whenall of
theswitchesare in the DOWN (closed)position,theconversionrateis 7.5IIz.This settingptouidesmaximum
rejectionof 60 Hz line noise.Whenall of theswitchesarein theUP (open)position,theconversionmt€ is 30 Hz.
It
you have50 Hz line powerandspecified6.25n5 Hz for yourconversionspeedswhenordering,thendown
is 6.25
Hz andup is 25 Hz. Whenchangingthesettings,makesureALL FOURswitchesareserto thJsameposition.
Notethathe boardhasbeenfacory-calibratedfor a7.5Hz rate.If you changetherate,you mayneed
19
recalibratetheboard.chaprer5, calibration,explainstheprocedures.
30HZ
S3
7.sHz
!!tt
Fig.1-11- A/DConversion
Rateswitch.
s3
Pull-up/Pull-down
Resistors
on DigitalVO Lines
The32 programmable
TTL/CMoS compatibledigitalI/o linescanbe interfacedwith a numberof external
devices'Thelinesaredividedinto four groups:eightbufferedPortA lines,eightbufferedport
B lines,eight
bufferedPon C lines'andeightunbuffered8255PPIPortB lines.You caninstfi and
connectpul-up or pull-down
resistorsfor any or all of thesegroups.You may wanrto pull linesup for connection
o switchis.This will pull the
line high whentheswitch-is disconnected.
or, you maywantto pull downlinesconnecedto relayswhichcontrol
turningmotorson andoff. Thesemotorsturnon whenthedigital [nes connollingthem
arehigh.pulling thelines
downprevenmthemfrom floatinghighduringthatbrief periodafterpower-upandbefore
thelinesareinidalized.
To usethepull-up/pull-downfeature,you mustfirst install l0 kilohm, l0-pin resistorpacks
in oneor moreof
theresislorpacklocationsneartheP2 connector,theP3 connecr,or,
andbesidethe8255Ii lttris is rheg255port B
The buffereddigital I/o line packsarelabeledRN2 PA, RN3 pB, andRN4 pc.
91c!).
The g255port B packis
labeledRN6 PB. Figurel-12 showsthepacklocadons.
After theresistorpack areinstalled,you canconnectthemino thecircuit pull-ups
as
or pull-downs.Locatethe
three-holepadson the boardner theresistorpacks.They arelabeledG (for grouni; on
bne enaana v (for vcc) on
theotherend'The middleholeis common.Figurel-12 showsa blowupof thl padsfor ports
A andc. To operateas
pull-ups,soldera jumperwire betweenthecommonpin (middlepin orne
tnrei) anothe V pin. For pull-downs,
soldera jumperwire berweenthecommonpin (middlepin) andtireG pin.
IOUT and VOUT References
A referencecurrentoutputandreferencevoltageoutputareprovidedat thep2 I/o
connectorfor usewith
externalcircuitry.Thereferenceculrent,P?.39,isfacory setat 5 milliamperes.
Thereferencevoltage,p2-41,is
factoryselat 5 volts.on-boardtrimpos areprovidedto ioiost theoutputievels.
Chapter5 rellsyou how !o make
theseadjustmenm.
l-9
oooooooooooo
trooooooooooo
o0
oo
oo
oo
00
oo
oo
oo
oc
oo
o0
o0
oo
co
00
oo
oo
oo
00
oo
nrll!lr
Fig.1-12- Puil-up/Pult-down
Resistor
Circuitry
CHAPTER2
BOARD INSTALLATION
The 520 boardis easyto installin your IBM pCD(T/AT or
compatiblecomputer.It canbeplacedin anyfull-sizeslot.This
chaptertells you step-by-step
how to installandconnectthe board.
2-r
Board Installation
Keepthe boardin is antisuaticbag until you arereadyto install it in your computer.Whenremovingit from the
bag,hold the boardat the edgesand do not touchthecomponentsor connectors.
Beforeinstalling the boardin your computer,checkthejumper and switch settings.ChapterI reviewshe
facory settingsand how to changethem.If you needto changeany settings,refer to the appiopriateinstuctions in
Chapter1. Note that incompatiblejumper seuingscanresultin unpredictableboardope.ationand erraticresponse.
Also notethat the Y}IIO connectormountingbrackethasan oversizedcutoutto allow spacefor running the
cableto 40'pin on'boardconnectorP3 throughthe sameI/O slot. If you want to run both cablesthroughtheiame
slot" you mustmaketheseconnectionsbeforeinstalling theboard.
To install the board:
l . Turn OFF the powerto your computer.
2. Removethe op coverof the computerhousing(refer o your owner's manualif you do not alreadyknow
how !o do this).
selectany unusedfull-sizeexpansionslotandremovetheslotbracket.
Touchthemetalhousingof thecomputerto dischargeanystaticbuildupandthenremove*re boardfrom its
antistaticbag.
5. Holding the boardby is edges,orient it so that its cardedgeOus) connectorlines up with the expansion
slot
connecbr in thebo[om of tre selectedexpansionslol
6. After carefully positioningttreboardin the expansionslot so that the cardedgeconnectoris resting
on the
computer'sbusconnector,gentlyandevenlypressdownon theboarduntil iris securedin rhesloi
NoTE: Do not force the boardino the slot. If theboarddoesnot slide ino place,removeit and
ry again.
wiggling the boardor exeningtoo muchpressurecanresultin damageo ttrl uoaroor 1othe
compub;.
7. After the boardis insalled, securethe slot bracketbackino placeandput the coverback your
on
computer.
The boardis now readyo be connectedvia the externalVO ionnecor at therear panelof your.ornpuLr.
ExternalVO Connections
Figure2-l showstheADA520'sP2 I/O connecror
pinoutandp3 on-boardI/O connectorpinoul Referto these
diagramsasyou makeyour VO connections.
2-3
DtFf.
a[rt. l attr
xx2.l Alll2
AlX3+llll{3
All|,bl
lllla
All{5rl
lllt
Alll6rl
lll|l
a|l{} | alalr^cl{D
/Ul{} | txr,yACNO
AI|ff+I
/U}f?
/ltr7. I ltxrt/aclo
llllbl
lll{l
llra& | lltxtslolD
oI0
?^7
E'
tL
FCa
Pll5
FCr
94
FC{
na3
rc3
?^a
FC2
Pilr
FCr
P0
llt
YOUT
Pt6
PFI B5
pE5
Ppt 8a
Pta
PPI A!
P33
Pn !2
Pa2
Pnm
DrorTAL
O,tO
lntocEn lr
tnlccEi out
otcrTALoilD
lrT clr( o
ETTCATEO
EXTCLX!
Ert olTE t
ETTCLT2
ETTG TE2
il2 volTs
.r2 volTs
FCO
IOUT
LoG ctaD
P8?
t'| ta
PPt t.l
.lt|ttoo ot|D
txlloo c||0
AXILOGOI0
aouTil
lLlloo
PPI 17
ArL2. I lil{roracxo
atl$ | lrilrl/AoLo
illta+ | atNlzAoxo
IOUT'
PBI
P80
DtctTAL CilO
TTGITAL OI{D
DIGI'
L OND
OIGITAL GT{O
DIOIYAL OI{D
T/COUr0
OIGITAL O}'D
T/COUTT
OIGITAL GIID
lrcour2
+t VOLTS
orclral'{o
AI|ILOC G]tD
T,C OUT2
OIGITALGND
P2
50-Pin
3.E
AD{r. I A|xgrAGltD
EXTCLX 2
ETT OATE 2
rl2 VOLTS
.12 VOLTS
+t YOLTS
hA
rJ
4o-pin
DIGITALGilD
Fig.2-1- P2 and P3 l/O Connectorpin Assignments
Connectingthe AnalogInput Pins
16 Single'Ended,No DedicatedGND. Whenoperatingin the 16channelsingle-ended
mode@4-SE,
S2-OPE}9,connec[the high sideof theanaloginputsto theanaloginput channels,AnIl throughAINI6,
and
connectthelow sideto anyof theANALOG GND pinsavailableat theconnecror(pins lB,Z1-rZon p2).
Ground
any unusedinpus. Figure2-2 showshow fteseconnections
aremade.
320
tro cottEcToR
P2
I
I
SIGNAL
,
souncg | *
r our(
Pti
lt r
(*o
a
a
rux
a
a
OUT
SIGNAL r
sounce| *
7 ourl
All{ rs
our
(n*
PIN !6
Att{ t3
Ptx 22
I
I
I
Fig.2-2- Single-Ended
InputConnections,
No Dedicated
GND
a^
8 Single'Ended,DedicatedGND. Whenoperatingup to 8 channelsin rhesingle-ended
modewith a dedicated
groundfor eachchannel(P4-D,S2-CLOSED),connectthehigh sideof eachanaloginput to theselectedanalog
input,channel,AINI throughAIN8, andconnectthelow sideto its corresponding
AGND (AINI- throughenf-A-1.
Groundany unusedinputs.Figure2-3 showshow theseconnections
aremade.Note thatyou canmix single-ended
wittr dedicatedgroundanddifferentialchannelsby settingtheindividuatswitcheson 52 io theproperpoJition.
520
uo cornEcroR
P2
I
I
I
1",*,
a
.
MUX
SIGNAL
7
souRcE I r
z our(
[o",
iv
i"i
iv
Fig. 2-3 - Single-EndedInput Connections,DedicatedGND
8 Differential. when operatingin thedifferentialmode(P4-D,S2-OPEN),twistedpair
cableis recommended
to reducetheeffectsof magneticcouplingat theinput Your signalsourcemay or may not
havea separate
ground
reference.Whenusingthedifferentialmode,you shouldinsratfal0 kilohm resisrorpack
at RN7 on t1eboardto
providea referenceto groundfor signalsourceswithouta separat€
groundreference.
Connectthe high sideof theanaloginput to theselectedanaloginputchannel,AINI+ through
AINS+,and
connectthelow sideto thecorresponding
AIN- pin. Then,for signalsourceswith a separate
groundreference,
connectthegroundfrom the signalsourceo an ANALOG GND (pins l8 and?n-22 onp2).
Figure2-4 showshow
theseconnecdons
aremade.Notethatyou canmix single-ended
win deoicatedgroundanddifierentialchannelsby
settingtheindividualswircheson 52 o theproperposition.
2-5
620
rroco}{rEcton
?2
I
I
I
SIGNAL
f
PIN I
souRc€ l*
1 ourj
\-
AIN l+
RN'
F--!
Ptx2
|
t
AIN I.
a
.
a
a
a
a
IUX
a
OUT r
SIGNAL
,
+
AIN '.
souRcE l*
r ourJ
(.
P r N1 4
GND
OUT .
I
|
AIN '.
| "'I
tl
tl
tl
PtNlS
I
I
PrNrs
I
I
AIX T.
atx t-
I
PIN 22
Fig.2-4- DitterentialInputConnections
Connectingthe Trigger In and Trigger Out pins,CascadingBoards
TheADA520 boardhasan externaltriggerinput (P3-19)andoutput(P3-21)so rlnr rwo or morebards canbe
cascaded
andrun synchronously
in a "masterAlave"configuration.By cascading
two (or more)boardsasshownin
Figue 2-5,they canbe riggeredtiostanan A/D conversionat thesametime.
Connectingthe AnalogOutputs
For eachof thetwo D/A outpus,connectthehigh sideof thedevicereceivingtheouput to theAOUT channel
(Y2-17orP2-l9) andconnectthe low sideof thedeviceo an ANALOG GND (P2-18ory2-20).
Connectingthe Timer/Countersand Digital UO
For all of theseconn@tions,
the highsideof an externalsignalsourceor destinationdeviceis connectedto the
appropriatesignalpin on rheI/O connecror,
andtre low sideis connecbdto any DIGITAL GND.
Running the 520DIAG DiagnosticsProgram
Now thatyour boardis readyto use,you will wantto try it out. An easy-to-use,
menu-drivendiagnostics
program,520DIAG,is includedwith your examplesoftwareto helpyou verify your board'soperation.you canalso
usethis programto makesurethatyourcurrentbaseaddresssettingdoesnot contendwith anotherdevice.
2-6
320
I'O CONNECTOR
to n0 tl
(rAtlEnl
-P3l-<:rn,aeea ou.
.t-.---..----..----'OAFD ,,
I3LAYE'
SIGNAL ,
souFcEI
t ourJ
(
rux
I
n.'l
I
)-n-z
AtNt .
^
eP r
atilt -
I
I pr.re
TRIGGEF Iil
Fig.2-5- Cascading
TwoBoardsfor Simultaneous
Sampling
CHAPTER3
HARDWARE DESCRIPTION
This chapterdescribesthefeaturesof theADA520 hardware.
The majorcircuitsaretheAlD, D/A, digital VO, and 8254tmerl
counter.Boardintemrptsarealsodescribedin this chapter.
3-l
TheADA520 hasfour majorcircuits,theA/D, the D/A, digital VO,andtimer/counten.Figure3-l showsthe
block diagramof the board.This chapterdescribesthe hardwarewhich makesup the major circuits. It also discusses
intemrps.
Fig.3-1- ADA520BtockDiagram
A/D ConversionCircuitry
TheADA520 performsanalog'todigitalconversions
on up to 16analoginput channels.Thefollowing paragraphsdescribehe A/D circuitry.
AnalogInputs
The input typeis jumperandswitchselectable
for single-ended,
single-ended
with dedicatedground,or
differentialoperation.Single'ended
operationis typicallyusedwhenthe-analog
input voltagesourceis closeo the
boardand the voltagelevelsare fairly high (greaterthan+0.5 volts for a gain of t;. fhe difierential modeprovides
noiseimmunitywhenlong cablerunsareunavoidable,
signallevelsarelow, or surroundingelectricalnoiseis high.
-5
Theinput rangeis o +5 volts for a gainof l Gainis usedto matchtheinput voltagelevelsbeingmeasured
ascloselyaspossiblewith the board'sinput voltagerange.For analoginpus rangingbetween+500millivolts, a
gainof l0 canbe used;for analoginputsrangingbetween+50 millivols, a gainof f OOcanbe used,
andfor analog
inputsrangingbetween+5 millivolts,a gainof 1000canbe used.Becauseit reducesthe input voltagerange,
increasingthegainalsoincreases
theresolutionof theconversion.
For example,whenthegainis setto 100,voltage
changesof 13microvoltsarereflectedin thedigitizeddata.Overvoltageprotectionto t35 volts is providedat the
inputs.
J.J
A"/DConverter
The dual slopeintegratingA7Dconverterperformsconversionsat a rate of either 7.5 or 30 timesper second
dependingon thesettingof DIP switch53. Theouput is a 12-bitdaa word plusa signbit which rellsyou wherher
thedigial valuerepresentsa positiveor a negativevolage. This givesyou an effectiveresolutionof 13 bits.
The convertersamplesthe input voltageover a window of time beforeperformingthe conversion.The converter measuresthe time requiredto chargeand dischargea capacitor.A counterand a referencein the AID chip
determinethe integrationperiod. Becausethe input signalis sampledfor a specifiedperiodinsteadof being instantaneouslycapturedby a sample-and-hold
device,spikesandglitcheswhich may be presentat theinputareaveraged
ouL Theresultis a highly accurateconversion.
D/A Converters
Two independent12-bit analogoutputchannelsare includedon the ADA520. The analogoutputsare generated
by two l2-bit D/A convenerswith independent
jumper-selecuble
oueur rangesof +5, tl0, 0 o +5, or 0 o +10
volts.Thet10 volt rangehasa resolutionof 4.88millivolts,thet5 and0 o +10 volt rangeshavea resolutionof
2.44millivolts,andttre0 to +5 volt rangehasa resolutionof l.22millivols.
Digital VO
An 8255programmableperipheralinterface@PI)is usedfor digital connol functions.This high-performance
ITVCMOS compatiblechip has24 digitalVO linesdividedinro rwo grcupsof 12lineseach:
Group A - Port A (8 lines) andport C upper(4 lines);
GroupB - Porr B (8 lines) andport C lower (4 lines).
The ADA520 usesPortsA and C for on-boarddataandcontrol operations.Port B is available1,9the user.
In
addition,24 bufferedTTL/CMOS digiral VO lines areavailableo the userfor ransfening daa beween the computerandexternaldevices.Theselinesaregroupedino three8-bitports,PortA, Port B, -O pott
C. Theseportscan
be independently
programmed
asinpus or outputs.Thebidirectionalbufferson the I/O linesmonitorthedirection
programmedat BA + 4 to automaticallyset their direction.
Timer/Counters
An 8254programmable
intervaltimerprovidesthreel6-bit, 8 MHz timer/counters
to supporta wide rangeof
timing andcountingfunctions.Thesetimer&ounrcrs
canbe cascaded
or usedindividuallyfor manyapplications.
Eachtimer/counrer
hastwo inputs,cLK in andGATE in, andoneoutput,timer/counter
our. The clock
sourcesfor the timer/counterscanbe selectedusingjumperson headerconnectorP5 (seeChapterl). The timer/
counterscanbe programmedasbinary or BCD down countersby writing the appropriat€datato the command
word,
asdescribedin Chapter4. Thecommandword alsoletsyou setup themodeof operation.The six programmable
modesare:
Mode0
Mode I
Mode2
Mode 3
Mode4
Mode 5
EvenrCounrer(Intemrpton TerminalCount)
Hardware-Rerriggerable
One-Shor
RareGenerator
SquareWaveMode
Sofrware-Triggered
Strobe
HardwareTriggeredSrobe @eriggerable)
Thesemodesaredetailedin the8254DataSheet,reprintedfrom Intel in AppendixC.
Intemupts
TheADA520 canuseanyoneof five signalsourcesto generateinFnupts.Thesesourcesare:A/D end-ofpCOfrom the8255ppl, andthetriggerin (TRIGIN).
convert(EOC),OUTI andOUTZfrom ttw8254timer/counter,
jumpers
ChapterI tellsyou how to setthe
on intemrptheaderconnecbrP9, andChapter4 provide-s
sor" progtarminginformation.
34
CHAPTER 4
BOARDOPERATIONAND PROGRAMMING
This chaptershowsyou how to progmmanduseyour ADA520
board.It providesa completedescriptionof the vo map,a detailed.
descriptionof programmingoperations,and a flow diagramto aid
you in programming.The exampleprogramsincludedon the disk
in your boardpackagearelistedat theendof this chapter.These
progftlms,writtenin TurboC, TurboPascal,andBASIC, include
sourcecodeto simplify your applicationsprogamming.
4-1
Definingthe VO Map
Thevo mapfor theADA520 is shownin Table4-l
below.As shown,theboardoccupies16consecutive
port locations'The base.address
Vo
(designatedasBA) canbe
op switch Sl asdescribedin chapter l,
llected
Board settings'This switchcanbe accessed
"riig
withoutremovingtheboardfrom rhecomputer.sl
is facory setat 300
hex (768decimal)'The following sectionsoescriue
rtreregistir conientsor eact addressuseain the I/o
map.
Tabfe4-1- ADAS2O
t/Otrlap
RegisterDescrlptlon
ReadFunctlon
Wrlte Functlon
Addrass'
(Declmat)
PPIPortA (ReadData)
REadA/D converteddata,
MSB & LSB
Reserved
PPlPortB
BA+0
Read 8 digitalinput lines
Program8 digitaloutput
lines
B A +1
Reserved
Programcontrollines
8A+2
Reserved
ProgramPPIconfiguration
ProgramdigitalUOportsA,
B, & C as inputsor outputs
(non-8259
digiratUOlines)
ProgramPortA digitaloutput
BA+3
lfllort
C (Conrrot)
PPlControlWord
lD Register/Buffered
Dioital
l/ODirection
ReadlD number(value= 1)
PortA Butferedl/O
Port B BuffEredl/O
Read Port A digitalinput lines ilnes
Read Port B digitalinput lines
BA+4
BA+5
ProgramPonB digitaloutput
BA+6
ProgramPortC digitaloutput
PortC Butferedl/O
REadPort C digitalinput lines
S2S4TimertCounter
O
ReadTCOcountvalue
LoadTCOcountregister
S2S4Timerl0ounter1
BA+8
Head TCl count value
8254Timer/Counler
2
8254ControlWord
ReadTC2@untvalu6
lgq TCl countregister
BA+9
L:^dJCZ counrregisrer
ReservEd
B A +1 0
Programcontrolregister
B A +1 1
B A +7
UpdareAil DACs/
D/AConverter
1 LSB
Statuy
D/AConverter
1 MSB
Updateoutputsol all DACs
ProgramDACI LSB
B A +1 2
ReadA/Dconverterstatus
D/AConverter
2 LSB
HesErved
B A +1 3
D/AConverter
2 MSB
ProgramDAC1MSB
ProgramDAC2LSB
Reserved
B A +1 4
ProgramDAC2MSB
B A +1 5
'
BA = $35s Address
4-3
BA + 0: PPI Port A - ReadA/D Data (ReadOnly)
This addressis usedto readthe MSB andLSB of the A/D conversion,asdefinedbelow. When bit 7 of the PPI
Port C word (PC7)is 0, theMSB is read;whenPC7is l, theLSB is read"Bit 7 of theMSB tells you whetherthe
convertedvoltageis a positive or negativevalue.Bit 6 goeso I whenthe input voltageexceedsthe input voltage
range.The able below showstheexpectedconverteddaa for maximumpositiveand negativeinput voltagesand for
0 vols.
MSB
PolarltyFlag
0 = negative
1 = positive
LSB
Bit11
Bir10
BitI
Bir8
OverrangeFlag
0 = in range
1 = oul of range
D7
D6
D5
D4
D3
02
D1
DO
Bir7
Bir6
Birs
Blt4
Bit 3
Bit 2
Bit 1
Bit 0
PolarityFlag
ConvertedData(12 blts)
Voltage
1
1 1 1 1 1 ' t 1 11 1 1 1
volls
+4.99878
0
1 1 1 11 1 1 11 1 1 1
.4.99878volts
0
0000 0000 0000
0.0volts
BA + 1: PPI Port B - Digital VO (ReadAilrite)
This port transfersthe 8-bit PPI Port B diginl input and digital outputdatabetrpeenthe boardand an ext€rnal
device.A readtransfen datafrom the externaldevice,throughP3, and ino PPI Port B; a write transfersthe wriuen
datafrom Port B throughP3 tD an externaldevice.
ln7
ln6
In5
ln4
ln3
ln2
In1
In0
D7
D6
D5
D4
D3
D2
D1
DO
OutT
Out6
Out5
Out4
Out3
Out2
Outl
Out0
BA + 2: PPIPort c - channelselect/Gain
select/A/Dcontrov (write only)
BA + 2 pro$amsthechannel
andgain,startsan,{/D conversion,
andselects
ttreMSBor LSBto bereadar
BA + 0. Thebit controlis asshownon thenextpage.
44
AnalogInput
ChannelSelect
0000= channel1
0001= channel2
0010= channel
3
0 0 1 1= c h a n n e l 4
0100= channel
5
0101= channel
6
0110-channelT
0 1 1 1- c h a n n e l S
1000= channel9
1001= channel
10
1 0 1 0 = c h a n n1e1l
1 0 1 1= c h a n n e1l2
1100= channel13
1 1 0 1= c h a n n e1l4
1 1 1 0 = c h a n n1e5l
1111=channel16
GalnSelect
00-x1
0 1= x l 0
1 0- x 1 0 0
1 1= x 1 0 0 0
Start Convert
0 = no @rlVOrt
1 * startconverl
RaadA/D Data
0 = readMSB
1 = readLSB
BA + 3: 8255PPI Control Word (Write Onty)
Whenbit 7 of this word is set!o l, a write programsthePPI configuation.On inirialization,theppl must69
programmedso that Port A is Mode 0 input, Port B is Mode 0 input or output,Port C lower is output,and port
C
upperis input,asshownbelow(X = don't care).
D7
Mode Set
1 = aclive
''"
D6
D5
D4
D3
ll
!t
I
ll
Port A
0 = output
1 = input
I
!crorpa
4-5
|
DO
-l
Port
t C Lower
0 = (output
input
norra
O=output
1=inPut
ltlode Select
il o=modeo
:l
PortC Upper
0 = outpul
1 = input
|
|
l;
l lIl
I
I
iilll=i
modeI
I
I
I
I
I
ll
i3:== mode
tt
D1
I.r--l--T'
i
Seler;t
! 'r,rde
= modet
I
D2
1-mode1
L_
___o3rBJ
The tablebelow showsthe control wordsfor ttre 16possibreMode 0 porr I/o combinarions.
8255Porl l/O Flow Dlrecilonand ControlWords,Mode0
GroupA
GroupB
Contrrl l Word
Port A
Port C
Upper
Port B
Port C
Lower
Blnary
Declmal
Hex
Output
Output
Output
Output
10000000
128
80
Output
Output
Output
Input
10000001
129
81
Output
Output
Input
Output
10000010
130
82
Output
Output
lnpul
Input
10000011
131
83
Output
Input
Output
Output
10001000
136
88
Output
lnput
Output
Input
10001001
137
89
Output
lnput
Input
Output
10001010
138
8A
Output
Input
lnpul
Input
10001011
139
8B
lnput
Output
Output
Output
10010000
144
90
Input
Output
Output
Input
10010001
145
91
Input
Output
lnput
Output
10010010
146
92
'lDUt
Output
lnput
lnput
10010011
147
93
Input
Input
Output
Output
10011000
152
98
Input
Input
Output
Input
10011001
153
99
Input
Input
lnput
Output
10011010
154
9A
lnput
lnput
Input
Input
10011011
155
9B
Whenbit 7 of thePPI connolword is setto 0, a write canbe usedto individuallyprogam theport
C lines.
D7
D6
D5
D4
SeVReset
FunclionBlr
0 = active
D3
D2
BitSelect
000= Pco
001 = PC1
o10= Pc2
0 1 1= P C 3
100= Pc4
101- PCs
110=PC6
1 1 1= P C 7
4-6
D1
DO
Blt SeUFeset
Sel
0=S
s €€ttb i t l o 0
1=S€tbittol
For example,if you wantto setPortC bit 0 to 1,you wouldsetup theconnolword so ttratbit 7 is 0; bits l, 2,
and 3 are0 (this selectsPCO);and bit 0 is I (this setsPCOto 1). The conrrolword is setup like this:
sets PCOto 1:
(wriilenro BA+3)
D7
D6
D5
D4
D3
D2
D1
X = don'lcare
SeUReset
FunctlonBlr
DO
Set PCO
Blt Seleet
000 = Pgg
BA + 4: ID Register/BufferedDigitat VO Direction (ReadAVrite)
A readprovidesthecontentsof theID register.This valueshouldbe l.
A write programsthe directionof the Port A, port B, andport c buffereddigital Vo lines. The botom 3 bits of
this word setup thelinesasinputsor outputs,asshownbelow.Notethaton reset,all 24 linesareautomatically
programmed
asinpus until you write newdatao BA + 5, BA + 6, andBA + 7. If you changetheirdirectionto
outpu8, the lines may be high or low, dependingon their last programmedvalues.To set the lines 19the valuesyou
want,write newdatao BA + 5, BA + 6, andBA + 7.
D7
D6
D5
D4
D3
D2
D1
DO
Port B Direction
0 - input
1 - outpul
Port A Dlrectlon
0 = input
1 = oulput
Porl C Dlrectlon
0 = input
1 = outpul
BA + 5: Port A Digital I/O Lines (Read/Write)
Transfersthe 8-bit Port A buffereddigital input and digiral outputda111
betweent6e boardand an external
device.BA + 4 is usedto set up theport asan input or an output.Whensetup as inputs,a readtransfersdarafrom
theexternaldevice,throughY2,andontotheboardwhereit canbe placedin usermemory;whenserup asoutputs,a
write transfersthe written datafrom the boardttrroughp2 o an externaldevice.
BA + 6: Port B Digital UO Lines (ReadAilrite)
Transfersthe 8-bit Port B buffereddigital input anddigital outputdarabetweenthe boardand an exlernal
device.This is not thesameas the 8255PPIPort B lines;thePPI linesarecontrolledat BA + l. BA + 4 is usedto
set up theport asan input or an output.Whensetup as inpus, a readtransfersdatafrom the externaldevice,through
P3' andonto fte boardwhereit canbeplacedin usermemory;whensetup asoutputs,a write transfersthewritten
datafrom theboardthroughP3 to an externaldevice.
BA + 7: Port C Digital I/O Lines (Read/Write)
Transfersthe 8-bit Port C buffereddigital inputanddigitaloutputdatabetweentheboardandan exrernal
device.BA + 4 is usedto setup theport asan inputor an output.Whensetup asinputs,a readtransfersdatafrom
theexternaldevice,throughP2,andontotheboardwhereit canbe placedin usermemory;whenserup asoutputs,a
write transfersthe written datafrom the boardthroughP2 to an externaldevice.
.+- I
BA + 8: 8254Timer/Counter 0 (ReadAMrite)
A readshowsthecountin thecounter,anda write loadsthecounterwith a newvalue.Countingbeginsassoon
as the count is loaded.
BA + 9: t254 Timer/Counter I (ReadAilrite)
A readshowsthe countin the counter,anda write loadsthe counterwith a new value.Countingbegins
as soon
as the count is loaded.
BA + 10: 8254Timer/Counter 2 (Read/Write)
A readshowsthe countin the counter,anda write loadsthe counterwith a new value.Counting
beginsas soc,n
asthecountis loaded.
BA + 11: 8254ControtWord (Write Onty)
Accessesthe 8254control registero directly conEolthe threetimer/counters.
D7
D5
Counler
nler Selecl
Selec
00 = Qsunlsl
r r g0
01 * Qsunlgt1
10 = Cgunlsy2
11 = 1ss6back setting
D5
D4
D3
D2
D1
DO
BCD/Blnary
0 = binary
1=BCD
Read/Load
00 = latchingoperation
01 - 7ss646rdLSB only
10 = 1s3cl46.dMSB only
11 = 1s6!/e.d LSB,then MSB
CounterModeSelect
Counter
000* Mode0, svent@unt
001- Mode1, programmable
1-shot
x10= Mode2, ralegenerator
x11= fvlsls3, squarewaverategenerator
100- Mode4, software-triggered
strobe
101= Mode5, hardware-triggered
strobe
BA + 12: UpdateDACs/DIA ConverterI LSB (Read/Write)
A readupdatesthe DACI andDAC 2 outputs.A wrireprogramstheDACI LSB (eight
bits).
DACLSB
D7
D6
D5
D4
D3
D2
D1
DO
Bit 7
Bit6
Birs
Bil4
Bit 3
Bit2
Bil1
Biro
4-8
BA + 13: StatudD/A Converter l MSB (Read/Write)
A readprovidesttreA/D convenerstatusbit definedbelow. Whenyou starta conversion,the staursline goes
high.After the line goeshigh,tlen watchfor it to go low, signalingthatthe conversionis complete.
A/D Status
0 - notconverling
1 = converting
A write progmmstheDACI MSB (four bits) into D0 throughD3; Dt throughD7 areinelevant.
DACMSB
D7
D6
D5
D3
D2
D1
DO
Bir11
Bir'10
Bit9
Bit8
D4
BA + 14: D/A Converter2 LSB (Write Only)
hograms theDAC2 LSB (eightbits).
BA + 15: D/A Converter2 MSB (Write Only)
Programsthe DACZ MSB (four bits) into D0 throughD3; Dt throughD7 ue inelevanl
4-9
Programmingthe ADA520
This sectiongivesyou somegeneralinformationaboutprogrammingand the ADA520 board,and then walks
you tfuoughthe major ADA520 programmingfunctions.Thesedescriptionswill help you asyou usethe example
progmmsincludedwith the boardandthe programmingflow diagramsat the endof this chapter.All of the prognm
descriptionsin this sectionusedecimalvaluesunlessotherwisespecified.
The ADA520 is programmedby writing to andreadingfrom the corrert VO port locationson the board.These
I/O portsweredefinedin theprevioussection.Most highJevellanguages
suchasBASIC,pascal,C, andC+r, and
of courseassemblylanguage,makeit very easyto read/writetheseports.The tablebelow showsyou how to read
from and write to VO ports usingsomepopularprogramminglanguages.
Language
Read
Data= INP(Address)
BASIC
Write
OUTAddress,Data
Data- inportb(Address) outportb(Address,
Dala)
TurboC
TurboPascal
Assembly
Data:= Port[Address]
Port[Address]
:= Data
mov dx, Address
in al, dx
movdx, Address
moval, Data
outdx, al
In addition to beingableto read/writethe I/O ports on the ADA520, you mustbe ableto perform a variety of
operationsthatyou might not normallyusein your programming.
The tablebelowshowsyorlsomeof the operaon
discussed
in this section,with an exampleof how eachis usedwith Pascal,C, andBASIC. Notethat the modulus
operatoris usedto retrievetheleastsignificantbyte(LSB) of a two-byteword,andtheintegerdivisionoperatoris
usedto retrieverhemosrsignificantbyre(MSB).
Language
c
Modulus
IntegerDivislon
o/o
a-bo/oC
a=b/c
AND
&
a-b&c
OR
I
a*blc
Pascal
MOD
a : = b M O Dc
DIV
a:=bDlVc
AND
a:=bANDc
OR
a:=bORc
BASIC
MOD
a=bMODc
\ (backslash)
a=b\c
AND
a*bANDc
OR
a=bORc
Many compilershavefuncdonsthat.canread/writeeitherg or 16bis from/toan I/o porr For example,Turbo
PascalusesPort for 8-bit port operationsandPortW for 16bis, TurboC usesinportb for an 8-bit readof a port
andinport for a l6-bit read.Be sureto useonly 8-bit operationswith the ADA520!
Clearingand SettingBits in a Port
Whenyou clearor setoneor morebits in a porq you mustbe carefulthatyou do not changethe statgsof the
otherbits. You canpreservethestatusof all bits you do not wish to changeby properuseof thl AND andOR
binaryoperators.UsingAND andOR, singleor multiplebits canbe easilyclearedinoneoperation.
To clear a singlebit in a port, AND thecurrentvalueof he port with thevalueb, whereb = !55 - 2ur.
Example: Clearbit 5 in a port.Readin thecurrentvalueof theporr,AND it with 223
(223=255 '25), andthenwrite theresultingvalueto theport.In BASIC, this is programmedas:
V : fNP (PortAddress)
V=VAND223
OUT PortAddress, V
4-10
To set a singlebit in a port, OR the curent valueof the port with the value b, whereb = 2b,.
Examnle: Setbit 3 in a port.Readin thecurrenrvalueof theport, OR it with 8 (8 = 23),and
then
write the resultingvalueto the port. In pascal,this is programmedas:
V := port lportAddress],.
V:=VOR8;
Port [PortAddress] := V,.
Seuingor clearingmoretlan onebit at a time is accomplished
just aseasily.To clear multiplebis in a porq
AND thecurent valueof theport with thevalueb, whereb = 255 --1thesumof thevaluesof
ne Uitsto UecieareCy.
Note that the bits do not have!o be consecudve.
Example: Clearbis 2, 4, and6 in a porr Readin thecurrentvalueof theport, AND it with
l7 I
(l7l = 255 '22 - T - 2'), andthenwrite theresultingvalueto theport In i, rhisis programmed
as:
v = inportb (port_address),.
v=v&171.;
outportb (port_address, v) ;
To set multiple bits in a port, oR the currentvalueof theport with the valueb, where =
b the sumof the
individual bits ro be set.Note that the bia to be setdo not havi to be consecutive.
Example: Setbis 3, 5, and7 in a port.Readin thecurrentvalueof theport,OR it wittr
16g
(168= 23+ 2s+ 2\, andthenwrite theresultingvaluebacko theporr
In assemblylanguage,rhis
is programmedas:
mov dx,
in al,
or al,
out dx,
portAddress
dx
168
al_
often, assigninga rangeof bits is a mixture of settingandclearingoperations.you
can setor cleareachbit
individually or usea fastermethodof first clearingall ft;bits in rtrering! rhen
settingonly rtrosebi,, rhatmusrbe
setusingthe metfiodshownabovefor settingmultiplebitsin a pon. rne rouowing
ex-ample
showshow this twostepoperationis done.
Example: Assignbits 3,4, and5 in a port !o 101
Oits 3 and5 set,bit 4 cleared).First,readin the
port andclearbis 3,4, and5 by ANDing themwith l99. Then
serbits 3 and5 by ORingthem
with 40' and finally write theresultingvaluebackto ttrepon In C, this is proffimed
as:
v : inportb(port_address) ;
v = v C 199;
v = v | 40;
outportb(port_address,
vl ;
A final note: Don't be intimidatedby thebinaryoperarors
AND andoR andtry to useoperabrsfor which you
havea betterintuition.For instance,if you aretemptedo useadditionandsubtraction
to set
.1"a, bits in place
of themethodsshownabove,DON'T! Additionandsubracdonmayseemlogical,but
"nonot work if you
theywill
try
to cleara bit thatis alreadyclearor seta bit thatis alreadyset.For ixample,you might
think thatto setbit 5 of a
port, you simplyneedto readin theport, add32(25)to thatvalue,and
thin write ftJresulting valuebackto theport.
This worksfine if bit 5 is not alreadyset.But, whathappenswhenbir 5 rs alreadyset?
Bits o-to+ witt be unaffected
andwe can't sayfor surewhathappensto bits 6 and7, but we cansayfor surethatbit
5 endsup clearedinsteadof
beingset.A similarproblemhappenswhenyou usesubtractionto cliar a bit in placeor trre
menod shownabove.
Now thatyou know how to clearandsetbits, we arereadyto lmk at theprogramming
stepsfor theADA520
boardfunctions.
4-ll
A"/DConversions
Beforeyou arereadyto starttaking A/D conversions,you must initialize the programmableperipheralinterface
@PI)andselectthechannelandgain(whenyou initializethePPI,the channelandgainareauromaticallyseto l).
The softwareprovidedwith your boardcontainsexampleprogramsfor boardinirielization.
You canmonirorrheconversionstatususingthe statusbit at I/O addresslocationBA + 13.Whenbit 0 of this
word goeshigh,it meansa conversionis in progress.Whenit goeslow, theconversionis completed-Whenyou are
monioring the statusline, makestueyou seeit go high andthenlow beforeyou assumethe conversionis completed.This line doesnot go high until slightly after the StartConvertline startsa conversion,which meansthat you
could reada false low when lhe conversionfirst begins.(Rememberthat the slatussignalis invertedto derive thi
end-of-convert
signalwhichcanbe monitoredttuoughan IRQ line. Theend-of-convert
line is low duringa conversionandgoeshigh whentheconversionis completed.)
Initializing the PPI
The Port A andPort C lines ofthe PPI are usedto readdata,control the AID converter,and set the channel
numberandprogrammablegain.Port A's eight lines areusedto cary the converteddata.This daa is output from
theA,tDconverterin two 8-bit words,an MSB andan LSB. ThePortC linesareusedto controlthe channll andgain
selectionandA/D conversion.
D7
D6
D5
D4
D3
D2
D1
DO
GalnSelect
OO=x1
0 1- x 1 o
1 0= x 1 0 0
I
I
I
|
1 ' l= x 1 0 0 0
|
Start Convert
0 = flO COtIV€d
1 = startconvert
ReadA/D Data
0 = readMSB
1 = readLSB
AnalogInput
ChannelSelect
0000- channel1
0001= channel2
0010= channel
3
0 0 1 1- c h a n n E l 4
0100 - channel5
0101= channel
6
0110=channelT
0 1 1 1= c h a n n e l S
1000= channel
9
1001=channel
10
1010= channel
11
'12
- channel
10'11
=
11O0 channel13
't101channel14
1 1 1 0 - c h a n n1e5l
1111=channel'16
To setthe Pon C lines up so that you cancontrol the channeland gain and take A,lD conversions,theppl must
be initializedwheneveryou powerup or resetyour system.This is doneby writing datato theppl controlword at
I/O addresslocationBA + 3. The I/O mapis definedar rhebeginningof thischapier.Theppl musrbe setup like
this:
07
D6
D5
D4
D3
4-t2
D2
D1
DO
. Selectinga Channel
To selecta conversionchannel,you mustassignvaluesto bis 0 through3 in thePPIPort C port at BA + Z.Ttrc
bit structurediagramfor PPI Port C aboveshowsyou the4-bit instructionfor eachof the 16 channels.Channels9
through 16arenot usedin ttredifferential and single-endedwith dedicatedgroundmodes.
Note that when you write to Port C o changetheactivechannel,you mustpresenrethe o0rerfour bits of dataas
you hadthemif you want thosesettingsto be unchanged.
. Settingthe Gain
To setthe gain, you mustassignvalues!o bits 4 and5 in ttrePPI Port C port at BA + 2.Thebit structure
diagramfor PPI Port C aboveshowsyou the 2-bit instructionfor eachof four gain settings,l, 10, 100,and 1000.
Note that when you writc to Port C o changethe gain setting,you mustpreservethe other six bits of dataas
you hadthem if you want thosesettingsto be unchanged.
Thereis a way to individually setandresetthe lines of Port C by writing thecorrectdatato the control word at
addresslocationBA + 3. For example,you canindividuallyset(o logic l) or reset(o logic 0) pC4 andpC5 by
writing two setsof datato thecontrol word (notto PortC!) asshownin Figure4-l below.This exampleshows
how to setthegainto 100.Whenthemostsignificantbit, D7, of thecontrolword is setto 0, it activatesthebit
set/reset
functionwhich les you individuallysetor resetanyoneof pon C's bits:
Sets PC4to 1:
(writtento BA+3)
D7
D6
D5
D4
D3
D2
D1
X - don'tcare
SeURes€t
FunctlonBlr
DO
Set Pet
Blt Select
100- PC4
0
Sets PC5to 0:
(writtento BA+ 3)
D7
SeUResel
FunctionBlr
D6
D5
D4
D3
D2
X = don'tcare
D1
DO
ResetPC5
Blt Select
101= PCS
Fig.4-1- Settingthe Gainto 100UsingBitSeVReset
Function
4-13
A/D ConversionModes
The A/D convertercanperformconvenionsin two modes, SingleConvertandContinuousConvert.
Two lines from PPI port C, PC6andPC7,areusedto control the conversions.Theselines can be setby writing
to PPI port C (BA + 2) or by usingttresinglebit set/resetfunctiondescribedin the previoussection, Settingthe
Gain, andunderBA + 3 in theDefining theIIO Map swtron later in this chapter.PC6 conrols the Sart Convert
function.WheneverPC6is high,conversions
canbe started.PC7determines
which byteof theconvert€ddarr, the
MSB or theLSB, is to be readat PPIPortA. WhenPC7is low, theMSB is read;whenit is high, theLSB is read.
For eachconvenion,theMSB is typicallyreadfirst, followedby theLSB.
. SingleConvertMode
the SingleConvertmodelets you performa singleA/D conversioneachtime you pulsethe StartConvertline,
PC6,high.Figure4-l showsthe timingdiagramfor thismode,andFigure4-3 providesa flow diagram
Start
Convert
I
ll
. I
Status=Convertino
tl
Read Data
LSB
Fig.4-1 - SingteConvertMode Timing Diagram
. ContinuousConvertMode
\\e ContinuousConvertmodeles you performcontinuousA/D conversions
by keepingthe StartConvertline,
PC6,high.Figure4'2 showsthe timingdiagramfor thismode,andFigure44 providesa no* Aiagnm.
Start
Convert
PC7
ReadData
MSB LSB
Fig.4-2 -
ContinuousConvertMode Timing Diagram
4-14
MSB LSB
Program8255PPI:
PorlA in, PortC out
SelectChannel& Gain
StartConversion
PC6-1
CheckStatus
Status= 1?
StopConversion
PC6-0
CheckStatus
Status= 0?
SetPC7= 0
to enableMSB
ReadPPIPortA
lor MSB
Set PC7 = 1
to enable LSB
ReadPPIPortA
for LSB
Fig.4-3- SingleConvertModeFlowDiagram
StopProgram
Program8255PPI:
PortA in, PortG out
SelectChannel& Gain
CheckStalus
Status= 1?
CheckStatus
Stalus- 0?
SetPC7= 0
to enableMSB
ReadPPIPortA
lor MSB
Set PC7 = 1
to enableLSB
ReadPPIPortA
for LSB
StopConversion
PC6=0
StopProgram
Fig.4-4- Continuous
ConvertModeFlowDiagram
. CascadingBoards
Two or moreboardscan be cascadedand riggered so that A/D conversionsareperformedsimultaneouslyon
eachboard.Figure4-5 providesa flow diagramfor cascadedoperation.Chapter2 showshow to connectthe boards
for simultaneous
triggering.
BOARDS1 & 2
Program8255 PPI:
PortA in, Port C out
BOARDS1 & 2
S€t PC7 = 0
to enableMSB
SetPC7- 0
to enableMSB
Read PPI PortA
for MSB
Read PPI PortA
for MSB
Set PC7 = 1
to enableLSB
Sot PC7= 1
to enable LSB
Fig.4-5- CascadedBoards,SingleConvertModeFlowDiagram
4-t7
Interrupts
. What Is an Interrupt?
An intemrpt is an eventthat causesthe processorin your computero temporarilyhalt is currentprocessand
executeanotherroutine.Upon completionof the new routine,control is retumedto the original routine at the point
whereits executionwas intemrpted.
Intemtptsare very handyfor dealingwith asynchronous
events(evens that occurat lessthanregularintervals).
Keyboardactivily is a good example;your computercannotpredict whenyou might pressa key and it would be a
wasteof processortime for it to do nothingwhile waiting for a keystroketo occur.Thus,the intemrpt schemeis
usedand the processorproceedswith othertasks. Then,whena keystrokedoesoccur,the keyboard'intermpts' the
processor,and theprocessorgetsthekeyboarddata,placesit in memory,and thenrenrrnsto what it was doing
beforeit was intemtpted.Other commondevicesthat useintemrptsare modems,disk drives,and mice.
Your ADA520 boardcan intemrpt the processorwhena variety of conditionsare met. By using thaseintemrpts,
you canwrite softwarettrateffectively dealswith real world events.
. Interrupt RequestLines
To allow different peripheraldevicesto generateintemrps on the samecomputer,the PC bus haseight different
intemtpt request(IRQ) lines. A ransition from low to high on oneof theselines generatesan intemrpt request
which is handledby the PC's intemlpt controller.The intemrpt conroller checksto seeif intemrptsare to be
acknowledgedfrom that IRQ and,if anotherintemrpt is alreadyin progress,it decidesif the new requestshould
supersedel}te one in progressor if it haso wait until the onein progressis done.This prioritizing altows an
intemrpt to be intemrptedif the secondrequesthasa higherpnority. The priority level is basedon the numberof the
IRQ; IRQOhasthehighestpriority, IRQI is second-highest,
andsoon throughIRQ7,which hasrhelowest.Many of
theIRQsareusedby thestandardsystemresources.
IRQOis usedby the systemtimer,IRel is usedby thekeyboard' IRQ3 by COM2, IRQ4 by COMI, and IRQ6 by the disk drives.Therefore,it is importantfor you o know
whichIRQ linesareavailablein yoursysr€mfor useby theADA520board.
. E259ProgrammableInterrupt Controller
The chip responsiblefor handlingintemrptrequestsin thePC is the 8259Programmable
IntemrptController.
To useinterrupts,you needto know how to readandsetthe8259'sintemrptmaskregister(IMR) andhow to send
theend-of-interupt@OI) commandto the8259.
. Interrupt Mask RegisterOMR)
Eachbit in theintemrptmaskregister(IMR) containsrhemasksrarusof an IRe line; bit 0 is for IReo, bit I is
for IRQI, andsoon. If a bit is set (equalto l), thenthecorresponding
IRQ is maskedandit will nor generarcan
intemlpt.If a bit is clear (equalto 0), thenthecorresponding
IRQ is unmasked
andcangenerateintenups. The
IMR is programmedtlrroughport 2lH.
IRQT
IRQ6
tR05 rRo4 IRQ3 r R o 2l r R Q l IRQO
l/O Port21H
For all blts:
0 = IRQunmasksd
(enabled)
't = IRQmasked(disabled)
. End-of.Interrupt(EOI) Command
After an intenuptserviceroutineis complete,the8259intemrptcontrollermustbe notified.This is donebv
writing thevalue20H to I/O port 20H.
4-18
. What ExactlyHappensWhenan Interrupt Occurs?
Understandingthe sequenceof eventswhenan intemrpt is triggeredis necessaryto properly write software
intemrpt handlers.Whenan intemrptrequestline is driven high by a peripheraldevice(suchas the ADA520), ttre
intemrpt connoller checksto seeif intemrptsareenabledfor that IRQ, and thencheckso seeif other intemrptsare
activeor requesEdand determineswhich intemrpt haspriority. The intemrpt controller then intemrps fte processor. The curent codesegment(CS),instructionpointer(IP), and flags arepushedon the stackfor storage,and a new
CS and IP are loadedfrom a tablethat existsin the lowest 1024bytesof memory.This tableis referredto as the
intemtpt vector tableandeachentry is calledan intemtpt vector.Oncethe new CS andIP are loadedfrromthe
intemrpt vectortable,the processorbeginsexecutingttrecodelocatedat CS:IP.When the intemrpt routine is
completed,the CS, IP, and flags that werepushedon tle stackwhenthe intemrpt occurredarenow poppedfrom the
stackand execudonresumesfrom the point whereit wasintemrpted.
. UsingInterrupts in Your Programs
Adding intemrptsto your softwareis not asdifficult asit may seem,and what they add in termsof performance
is often worth tte effort. Note, however,ttratalthoughit is not that hard to useintemtpts,the smallestmistakewill
oftenleadto a systemhangthatrequiresa rebooLThis canbe bothfrustratingandtime-consuming.
But, aftera few
tries,you'll get ttrebugsworkedout andenjoythebenefitsof properlyexecutedintemrps. In additionto readingt5e
following paragraphs,study the INTRPTSsourcecodeincludedon your ADA520 programdisk for a betterundlrstandingof intemrptprogam developmenL
. Writing an Interrupt ServiceRoutine(ISR)
The first stepin addingintemrps to your softwareis to write rheintemrpt servicerour.ine(ISR). This is the
routinethatwill automaticallybe executedeachtimean intemtptrequestoccurson thespecifiedIR'e. An ISR is
different thansundardroutinesthat you write. First, on enEance,fte processorregistersshouldbe pushedonto the
stackBEFORE you do anythingelse.Second,just beforeexitingyour ISR, you mustcleartheintemrptsratusof the
ADA520 andwrite an end-of-intemrptcommando the8259controller.Finally,whenexitingthe ISR, in additionto
poppingall theregistenyou pushedon entrance,you mustuserheIRET insrucdonandnot a plain RET. The IRET
automaticallypopstheflags,CS,andIP thatwerepushedwhentheintemrptwascalled.
If you find yourselfintimidatedby intemrpt programming,takeheart.Most Pascaland C compilersallow you
to identify a procedure(function) asan intemrpt type andwill auomatically add theseinstructionsto your ISR, with
oneimportantexception:mostcompilersdo not automaticallyaddtheend-of-intemrptcommandto 0reprocedure;
you mustdo this younelf. Otherthanthis andthefew exceptions
discussed
below,you canwrite your ISRjust like
any otherroutine.It can call other functionsandproceduresin your programand it canaccessglobal daa. if yoo ate
writing your first ISR, we recommend
thatyou stickto thebasics;just somethingtlratwill convinceyou thatit
works,suchas incrementinga globalvariable.
NOTE: If you arewriting an ISR usingassemblylangrrlgs,you arcresponsible
for pushingandpopping
registersandusingIRET insreadof RET.
Therearea few cautionsyou must,considerwhenwriting your ISR.The mostimportantis, do not useany
DOS functions or routinesthat call DOS functionsfrom within an ISR. DOSis not reenrranqthatis, a DOS
functioncannotcall itself. In typicalprogramming,this will not happenbecause
of theway DOS is wriuen.But
whataboutwhenusingintemrps?Then,you couldhavea situationsuchasthis in your program.If DOS functionX
is beingexecutedwhenan interruptoccursandtheintemrptroutinemakesa call o DOSfunctionX, thenfunction
X is essentiallybeingcalledwhile it is alreadyactive.Sucha r@ntrancyattemptspellsdisasterbecauseDOS
functionsarenot written trosupportit. This is a complexconceptandyou do not needto understand
it. Justmake
surethatyou do not call any DOSfunctionsfrom within your ISR.Theonewrinkle is that,unfortunately,it is not
obviouswhich libraryroutinesincludedwith your compileruseDOS functions.A rule of thumbis thatroutines
which write to thescreen,or checkthe statusof or readthekeyboard,andany disk Vo routinesuseDOS andshould
be avoidedin yourISR.
The sameproblemof reentrancyexistsfor manyfloatingpoint emulatorsas*eU, meaningyou may haveto
avoidfloatingpoint (real)mathin your ISR.
4-19
Notethattheproblemof reentrancy
exists,no matterwhatprogramminglanguageyou areusing.Evenif you.
arewriting your ISR in assemblylanguage,DOSandmanyfloatingpoint emulatorsarenot reentrant.Of course,
therearewaysaroundthisproblem,suchasthosewhichinvolvechecking!o s€eif any DOS functionsarecurrently
activewhenyour ISR is calle4 but suchsolutionsarewell beyondthescopeof thisdiscussion.
The secondmajor concernwhenwriting your ISR is to makeit as shortaspossiblein termsof execuriontime.
Spendinglong periodsoj time in your ISR may meanthat otherimportantintemrprsare beingignored.Also, if you
spendtoo long in your ISR, it may be calledagainbeforeyou havecompletedhandlingne f1sirun. This often leads
!o a hangthat requiresa rebool
Your ISR shouldhavethis strucure:
' Pushany processorregistersusedin your ISR. Most C andPascal
intemrpt routinesautomaticallydo this for
you.
. Put tle bodyof yourroutinehere.
' IssuetheEOI commandto the 8259intemrptcontrollerby writing
20H o port 20H.
' Popall registerspushedon entrance.Most C andPascalintemrpt
routinesauomaticallydo this for you.
Thefollowing C andPascalexamplesshowwhattheshellof your ISR shouldbe like:
In C:
void interrupt
ISR(void)
{
/* Your code goes here.
outportb (0x20, 0x201 ;
)
In Pascal:
Procedure fSRt fnterrupt,.
begin
{ Your code goes here.
Port [920] := $20,end,.
Do not
Do not
use any DOS functions
! */
/* Send EOI command to g2|g
*/
use any DOS functions ! )
{ Send EOI comnand to 8259 }
' saving the startup Interrupt Mask Register(IMR)
and rnterrupt vector
The next stepafter writing the ISR is to savethe startupstateof rheintemrpt maskregisterand
the intemrpt
vectorthatyou will be using.TheIMR is locatedat VO port 21H. Theinrenuptu*or yo-uwill
be usingis located
in theintemrptvectorable which is simptyan arrayof 256-bit(4-byte)pornteisandis iocatedin
thefint 1024
bytesof memory(Segment= 0, Offset= 0). You canreadthis valuedirectly,but it is a betterpractice
to useDOS
function35H (getintemtptvector).Most C andPascalcompilersprovidea libraryroutinefor reading
thevalueof a
vector.The vectorsfor the hardwareintemtptsarevectorc8 through 15,whereni,eO usesvector g,
net o.",
vector9, andso on. Thus,if tlreADA520 will be usingIRQ3,you shouldsavethevalueof intemrpt
veclor l l.
Beforeyou installyour ISR,temporarilymaskout theIRQ you will be using.This preventsttreIRe
from
requestingan interruptwhite you areinstallingandinitializingyour ISR.To rast ne Ii.q, readin
thecurrentIMR
at I/O port 2lHand set the bit that correspondsto your IRQ (remember,settinga bit disabiesintemrpts
on that IRe
while clearinga bit enablesthem).The IMR is anangedso thatbit 0 is for IRe0, bit 1 is for IRel,
and soon. See
the paragraphenitJedInterrupt MaskRegister(IMR) earlier in this chapterfor help in determiningyo*.
IRe's bit.
After settingtlrebit, write thenew valueto I/O port 2lH.
with thestartupIMR savedandtheintemrptson yourIRQ temporarilydisabled,you canassign
tlreintemrpt
vectorto point to your ISR. Again' you canoverwritetheappropriate
entryin thevectorrablewith a directmemory
write, but this is a badpractice.Instead,useeitherDOSfunction25H (setintemrptvector)or, if your
compiler
providesit, thelibrary routinefor settingan intemrptvector.Rememberthatvecior8 is for IRe0,
vecor 9is for
IRQI, andsoon.
4-20
If you needto programthesourceof your intemrpts,do thatnexl For example,if you areusingtheprogrammableinterval timer to generateinterrupts,you mustprograrnit to run in the propermodeandat the properrate.
Finally,clearthebit in theIMR for theIRQ you areusing.This enablesintemrps on the IRQ.
. Restoringthe StartupIMR and Interrupt Vector
Beforeexiting your progam, you mustresore the intemrpt maskregisterand intemrpt vectorsto the statethey
werein whenyou programsbrted. To restorettreIMR, write the value that wassavedwhen your programstarted
to I/O port 2lH. Restorethe intemrpt vectorthat wassavedat startupwith eitherDOS function 35H (get intemrpt
vector),or usethe library routine suppliedwith your compiler.Performingthesetwo stepswill guarant€€ttratrhl
intemrpt statusof your computeris the sameafter runningyour prognm asit wasbeforeyour programstarted
running.
. CommonInterrupt Mistakes
' Rememberthat hardwareinternrps arenumbered8 through15,eventhoughthe correspondingIRes
are
numbered0 through7.
' Two of the mostcommonmistakeswhenwriting an ISR areforgettingto clearthe intemrptstatus
of the
ADA520 andforgettingto issuetheEOI commandrc the8259intemrptcontrollerbeforeexitingtheISR.
D/A Conversions
The two D/A converterscanbe individuallyprogrammed
to convert12-bitdigital wordsinto a volr^gein the
rangeof t5, +10,0 !o +5, or 0 to +10 volts.DACI is programmed
by writing theLSB of rhe l2-bit digital daa word
to BA + 12and theMSB to BA + 13.DAC2 is identical,with theLSB writtenro BA + 14andMSB wrinento
BA + 15.A readat BA + 12 updates0reDAC outpub. The following tableslist 0rekey digital codesandcorrespondingoutputvoltagesfor the D/A converters.
D/AConverter
Untpolar
Callbrailon
Table
ldealOutputVottage(ln mlilivotts)
D/A Bit Welght
0to+5V
0to+10V
4095(Max.Output)
4998.8
9997.6
2048
2500.0
5000.0
1024
1250.0
2500.0
512
625.00
256
312.50
625.00
128
156.250
312.s0
1250.0
64
78j25
32
39.063
78.12s
16
19.s313
39.063
8
9.76s6
19.5313
4
4.e828
9.76s6
2
2.4414
4.8828
1
1.2207
21414
0
0.0000
0.0000
4-21
156.2s0
D/AGonverterBlpolarCallbratlonTable
ldealOutputVoltaga(ln mllllvolts)
D/ABlrWelghr
15V
4095(Max.Output)
+4997.6
r10v
+9995.1
2048
0.0
1024
-2500.0
-5000.0
512
-3750.0
-7500.0
2s6
.4375.0
-8750.0
128
.4687.5
-9375.0
64
-482l!].8
-9687.s
32
.492'1.9
-984{}.8
16
*4960.9
-9921.9
I
.4980.5
-9960.9
4
-4990.2
-9980.5
2
*4995.1
-9990.2
I
.4997.6
-9995.1
0
-5000.0
-10000.0
0.0
Timer/Counters
An 8254programmableinterval timer providesthreel6-bit, 8-MI{z timer/countersfor timing andcounting
functionssuchas frequencymeasurement,
event,counr.ing,andinterrupts.All ttyee timer/countersare cascadedat
thefactory.Figure4-6 showsthetimer/counter
circuitry.
Eachtimer/counterhastwo inputs,CLK in andGATE in, andoneoutput,timer/counter
OUT. Theycanbe
progammedas binary or BCD down countersby writing theappropriatedatato the commandword, as described
in
the I/O mapsectionat thebeginningof this chapter.
Oneof two clock souces, the on-board8-MIIZ crystalor an externalclock canbe selectedas the clock input o
eachdmer/counter.
In addition,thetimer/counters
canbe cascaded
by connectingTC0's outputto TCI's ctoci input
andTCI's outputto TC2's clock input.Thediagramshowshow tlreseclock sourcesareconnectedto thetimer/
counters.
An externalgatesourcecanbe connectedto eachtimer/counterthroughthe I/O connector.When a gateis
disconnected,
an on-boardpull-upresistorautomaticallypulls thegatehigh,enablingthetimer/counrer.
The output from eachtimer/counteris availableat the I/O connector,whereit canbe usedfor intemrpt genera_
tion or for countingfunctions.
The timer/counters
canbe programmed
to operatein oneof six modes,dependingon your applicarion.The
followingparagraphs
briefly describeeachmode.
Mode 0, Event Counter (Interrupt on Terminal Count).This modeis typicallyusedfor eventcounting.
while the timerrcounter
countsdown,theoutputis low, andwhenthecountis complete,it goeshigh.Theoutlut
stayshigh unr,ila new Mode0 controlword is writtento ttretimer/counter.
4-22
5?O
Ir'OCONNECTOR
iirlo-------'i
TIMEN/
COU}ITEF
0
XTAL (8 MHr)
EXT CLK O
CLK
EXT GATE O
GATE
rrc ouT 0
OUT
TIMEF/
COUNTEB
2
P2-ttPcl
CLK
EXTCLX2
EXTGATE2
GATE
T/COUT2
OUT
L----_____.;
I
I
I
I
Fig. 4-6 -8254 ProgrammableIntervalTimer CircuitBlock Diagram
Mode I' Hardware'RetriggerableOne-Shot.Theoutputis initially high andgoeslow
on theclock pulse
following a rigger to begin the one-shotpulse.The ouput remainslow until tlre countreaches
0, and thengoeshigh
andremainshigh until theclockpulseafterthenextrigger.
Mode 2' Rate Generator.This modefunctionslike a divide-by-Ncounterandis typically
us€dto generatea
real-timeclock intemtpt.Theoutputis initially high,andwhenthecountdecrcments
to i, oebutput goeslow for
one clock pulse.The outputthengoeshigh again,the timer/counterreloadsthe initial count,and
the piocessis
repeated.
This sequence
continuesindefinitely.
Mode 3, SquareWave Mode. Similaro Mode2 exceptfor theduty cycleoutput,this mode
is typicallyused
for baudrategeneration.
Theoutputis initially high,andwhenthecountdecremenG
o one-halfirs initiat count,the
outputgoeslow for the remainderof the counl The timer/counterreloadsand theoutput goeshigh
agin. This
processrepeatsindefinitely.
Mode 4, Software'TriggeredStrobe.The outputis initially high.Whenttreinitial count
expires,theouput
goeslow for oneclock pulseandthengoeshighagain.Countingis "riggercd" by writing
theiniriet counL
Mode 5' Hardware Triggered Strobe(Retriggerable).Theoutpuris initially high.Counting
is riggeredby
therising edgeof thegateinput.when theinitial counthasexpired,theoutputgoeslow for oneclockpulse
and
thengoeshigh again.
Digital VO
The 8 PPI Porr B and,24bufferedporrsA, B, and C TTVCMOS digiral VO lines can be used
ro transferdata
betweenthecomputerandexternaldevices.All 32 linescanhavepull-up/pull-downresistorsinstalled
asdescribed
in Chapterl.
On reset,all 24 buffereddigilal I/O linesareautomaticallysetup:ls inpus. Usingpull-upor pull-down
resistors
will setthestateof the inputshighor low. After a reset,you cansetup ttredigitattinqsin ..i port
to be inputsor
outputsby writing theappropriatebyteto BA + 4. Bit 0 configuresthe linesof Port A asinpus or ouputs,
bit I
configuresthe linesof Port B, andbit 2 configuresthelinesof PortC. TheremainingUirsin Ureword
areignorcd,so
their statesareirrelevant.After thelinesareconfiguredasinpus or outputs,you canseteachline high or low
by
4-23
writing theconectwordsto BA + 5 (PortA), BA + 6 @ortB), andBA + 7 (PortC). Norethatwhenyou configure
the lines as outputs,they can be in any state(their statesarethe sameas the last dataprogrammed).If you arc not
using thepull-up/pull-downresistorpack feature,both inputsand outputscanbe in any stateat resel Writing to
theseports will set the statesto known values.Oncethe digital VO lines are initialized, you can usethem 0ocontrol
or monitorextemaldevices.
ExampleProgramsand Flow Diagrams
Thesoftwareincludedwith your ADA520boardcontainsexampleprogramsin C, Pascal,andBASIC to help
you getstartedusingtheboard.Also includedis an easy-to-use
progmm,520DIAG,which
menu-drivendiagnostics
is especiallyhelpful whenfirst checkingout the boardafter installationor whencalibratingthe board.
Beforeusingthe softwareincludedwith your board,makea backupcopy of the disk. You may makeas many
backupsasyou need.The exampleprogramsincludedon thedisk arelistedbelow.
C and PascalPrograms
Theseprogramsaresourcecodefiles so that you caneasilydevelopyour own customsoftwarefor your
ADA520board.In theC direcory, ADA520.HandADA520.INCcontainall ttrefunctionsneededo implementthe
mainC progmms.H definestheaddresses
andINC containstheroutinescalledby rhemainprograms.In thepascal
directory,ADA520.PNCcontainsall of theprocedures
neededto implementthemainPascalprogams.
Analog-to-Digital:
SOFTTRIG
Timer/Counters:
Demonsrabs how to usethe sofrwarenigger modefor acquiringdata.
TIMER
A shortprogramdemonstratinghow o programthe&254for useasa timer.
Digital VO:
DIGITAL
Simpleprogmmthatshowshow to readandwria thedigital VO lines.
Digital-to-Analog:
DAC
WAVES
Showshow to usethe DACs.UsesA/D channelI to monitorrheouput of DAcl.
A morecomplexprognm thatshowshow to usethe 8254timerandtheDACs asa
waveformgenerator.
BASIC Programs
Theseprogramsaresourcecodefiles so thatyou caneasilydevelopyour own customsofnvarefor your
ADA520 board.
Analog-to-Digital:
SINGLE
SCAN
Demonstrates
how to usethesingleconvertmodefor acquiringdata.
Demonstrates
how to scanchannelsto acquiredata.
Timer/Counters:
TIMER
A shortprogramdemonstrating
how o prograrnthe 8254for useasa timer.
Digital I/O:
DIGITAL
Simpleprogfim thatshowshow to readandwrite thedigital VO lines.
Digital-to-Analog:
DASCAN
Demonstrates
D/A conversion.
4-24
CHAPTER5
CALIBRATION
This chaptertells you how to calibratethe ADA520 usingthe
ninetrimpotson the board.Thesetrimpotscalibratethe AID input
voltagemngeandgain,theD/A outputs,andthereferencecurrent
andvoltageoutputsavailableat connectorP2. Calibrationmay be
requiredif you changetheA/D conversionratefrom 7.5 to 30H2,
or wheneveryou suspectinaccuratereadings.
5-2
This chaptertellsyou how to calibratetheAID converterinput voltagerangeandgain,theD/A outpus, andthe
referenceculrentandvoltageoutputs.Theoffsetandfull-scaleperformance
of theboard'sAID converteris factorycalibratedfor operationat7.5 Hz.If you changetheconversionrate,you may needto recalibrateyour board.Any
time you suspectinaccurate
readings,you canchecktheaccuracyof your conversions
usingtheprocedurebelow,
andmakeadjustsasnecessary.
Usingthe520DIAGdiagnostics
pro$am is a convenientway to monitorconversions
while you calibratetheboard.
Calibrationis donewith theboardinstalledin your system.You canaccessthetrimpotsat theedgeof the
board.Powerup thesystemandlet theboardcircuitrystabilizefor 15 minutesbeforeyou startcalibrating.
RequiredEquipment
The following equipmentis requiredfor calibration:
. PrecisionVoluge Source:-10to +10volts
. Digir,alVolrmeter:
5-12 digis
. SmallScrewdriver(for rrimpotadjustment)
A voltagesourcecanbe madeusinga 9-volt batteryanda precisionlO-turnrimpot asshownin Figure5-1.
While not required,the520DIAGdiagnostics
program(includedwith examplesoftware)is helpfulwhen
performingcalibrations.Figure5-2 showstheboardlayoutwith therimpos locatedalongrhetop edgeof theboard
9 VOLTS
+
V = 0-6volts
t
Fig.5-1- Adjustable
Vottage
Source
A/D Calibration
Duringthis procedure,you will makeconnections
to theanaloginputat externalVO connectorp2. Thepin
assignments
forY2 aregivenin AppendixB.
Two adjustments
aremadeto calibratetheA/D converter.Oneis theoffsetadjustment,andtheotlreris thefullscaleadjustment.TrimpotsTR6 throughTR9 adjusttheoffset,andTR5 adjuststhefull-scalevoltage.
5-3
Calibration
Trimpots
tfililifqgfr
Fig. 5-2 -
Board LayoutShowingCalibrationTrimpots
OffsetAdjustment
Theoffsetadjustmentcompensates
for theinherentoffsetoutputvolnge of theprogrammable
gainamplifrer,
Four adjustments
must.made,onefor eachgainsetting.
To adjusttheoffseterror,connect0 volts to analoginputchannelI (this canbe doneby simplyconnectingthe
analoginput to groundwhenin the single-ended
mode).Serthegainto I, andstartcontinuousA/D conversions.
AdjusttrimpotTR9 until theconversionoutputis zero.Thenchangethegain to l0 andrepeattheconversion
process,adjustingTR8 until theconversionoutput,is zero.Changethe gain to 100,andrepeattheprocedure,this
time adjustingTR7 until theoutputis zero.Finally,changethegainto 1000andadjustTR6 until theoutputis zero.
The trimpotassignment,
is summarized
below:
Galn
PC4
Setting
PC5
Settlng
x1
0
n
TR9
x10
1
0
TR8
x100
0
1
TR7
x1000
1
1
TR6
Trimpot
Theoffsetvoltageis relatedsolelyo theperformance
gainamplifiec however,theoffset
of theprogrammable
canaffecttherolloverperformance
of the A/D converterif it is not setto zero.Rolloveris the differencein conversionresultsbetweenvolnges havingthesameamplitudebut differentpolarities.Any gainswhich do not havea zero
offsetwill give readingsthatareshiftedfrom an idealzeroreference.
This meansthatthepositiveandnegative
readingsfor thesamevolLagewill be slightlydifferent.This differenceis causedby theoffset.
5-4
Full-ScaleAdjustment
The full-scaleadjustmentcalibratesthereferencevoltageusedby the A/D converterto compensatefor the
analoginputcircuiry.
Setthegainandchannelto l, startcontinuousA/D conversions,
anddisplaytheconversionresults.Apply the
voltagesourceto theanaloginputandadjustit so thatit reads4.9982vo1s(4998.2millivols) (seeTable5-l j.
Adjust rimpot TR5 until theconversiondataflickersbetweenall ls and0 in theleastsignificantbit place(hexadecimalFFFandFFE).
Table5'l providesa referencefor theidealA/D converterinputvoltagefor eachbit weightin eachvoltage
range.The first line is theidealfull-scale(all ones)value,andeachsuccessive
line decreases
by onebit weighr
Betweenthefull-scalevoltageandthenextlowerbit weightis thevolage valuefor full-scaleminus l-l2 bis. Note
thatthevoltagevaluesin thetablearein millivols.
Table5-1- A/D ConverterCailbrailonTabte
ldealInputVoltage(ln mlillvotts)
A/D Blr Weight
t5V(galn=1)
10.5V(gain= 10)
t.05V (galn= 100)
t.005V(gain= 1000)
4095 (FullScale)
4998.8
499.88
49.987
4.9987
FS= 1.12 LSB
4998.2
499.82
49.982
4.9982
2048
2500.0
250.00
2s.000
2.5000
1024
1250.0
125.00
12.500
1.2500
512
625.00
62.500
6.2500
.62500
256
312.50
31.2s0
3.'t250
.312s0
128
156.250
15.6250
1.562s
.15625
64
78.125
7.8125
0.7813
.07813
32
39.063
3.9063
0.3906
.03906
16
19.s313
1.9531
0.1953
.01953
8
9.76s6
0.9766
0.0977
.00977
4
4.8828
0.4883
0.0488
.00488
2
2.4414
o.2441
0.02M
.00244
1
1.2207
o.1221
o.0122
.00122
5-5
D/A Calibration
The D/A converterrequiresno calibrationfor the Xl ranges(0 to +5 and+5 vols). The following paragraph
describesthe calibrationprocedurefor the X2 multiplier ranges.
To calibratefor X2 (0 to +10 or +10 volts),settheDAC ourputvoltagerangero 0 to +10 volts (umperson X2
and5 on P6, AOUTI, or P7, AOUT2).Then,programrhecorresponding
D/A converrer(DACI or DAC2) with the
digitralvalue2048.The idealDAC outputfor 2048at X2 (0 to +10 volt range)is 5.0000vols. AdjusrTRI for
AOUTI andTR2 for AOUT2 until 5.0000vols is readat theoutput.Table5-2 lists theidealoutputvoltrgesperbit
weight for unipolarrangesand Table5-3 lists the ideal outputvoltagesfor bipolar ranges.
Table5-2* D/A ConverterUntpotarCatibrailonTabte
ldealOulputVoltage(in mlillvotts)
D/ABlr Weighr
0to+5V
0to+t0V
4095(Max.Output)
4998.8
9997.6
2048
2500.0
5000.0
1024
1250.0
2500.0
512
625.00
1250.0
2s6
312.50
625.00
128
156.250
312.s0
64
78.125
156.250
32
39.063
78.',t25
16
19.s313
39.063
8
9.76s6
19.5313
4
4.8828
9.7656
2
2.4/.14
4.8828
1
1.2207
2.4414
0
0.0000
0.0000
5-6
Table5-3- D/A ConverterBtpotarCafibrailonTabte
ldealOutputVoltage(ln mllllvolts)
D/A Bir Weight
15V
4095(Max.Output)
+4997.6
r10v
+9995.1
2048
0.0
0.0
1024
-2500.0
-5000.0
512
-3750.0
-7500.0
2s6
.4375.0
-8750.0
128
-4687.s
-9375.0
64
4843.8
-9687.5
32
4921.9
-9843.8
16
-4960.9
-9921.9
8
-4980.5
-9960.9
4
-4990.2
-9980.5
2
-4995.1
-9990.2
1
4997.5
-999s.1
0
-5000.0
-10000.0
ReferenceCurrent and VoltageOut Adjust
The ADA520 hasa referencecurent andreferencevoltageoutputavailablearthey1l/O
connecmrrc support
externalcircuit requirements.
Thereferencecurent is factorysetfor 5 milliamperes.you cancheckthe
cunent
outputor setit to a differentlevel by adjustingTR4 while monioring theoutput aty2-39.The
referencevolnge is
facory setfor 5 volts.You cancheckthevoltageoutputor setit to a differenilevel
by adjustingTR3 while monitoring ttreoutputatP24l.
s-8
APPENDIXA
ADAs2OSPECIFICATIONS
ADA520 Characteristics rypical@25"c
Interface
IBMPC/XT/AT
comparibte
Switch-selectable
baseaddress,l/O mapped
Jumper-selectable
interrupts
Analog lnput
16single-ended/8
single-ended
withdedicated
groundVI differ€ntial
inputs
Inputimpedance...............
........>10
megohms
Gains,software-seleclable...........
1, 10,1OO,
1OO0
Gainerror
....................0.05%,
typ;.21o/o,
mdx
Inputrange
.........rS,
*0.5,10.06;*O.OO5
votts
protection
Overvohage
..*35 Vdc
Commonmodeinputvohage
...110vohs,max
Settling
time.............
psec,max
....................S
A/DConverter.....
Type............
...............0ua1s|ope
integrating
withautozero
Resolution
.........i2bits
plussign
Conversion
rate,60Hz rejection
..................2.5/30
Hz,switch-selectab-le
Conversion
rate,50Hzrejection
................6.25125H2,switch_selectable
Relative
(gain= 1) .................
accuracy
..f 1 bit
Linearity
(gain= 1)..................
...................r1
bir(7.5Hz),13 bits(SOHij
Rollover
error.............
........11
bit
DigitalyO.............
CMOS82C55
Numberof 8255-based
lines
.g inputor output
Logiccompatibility
............
.............TTUCMOS
(Conligurable
wilhoptionall/O pull-up/pull-down
resistors)
High-level
outputvo|tage...................
....................4.2V,
min
Lowieveloutputvoltage..................
...............,..0.45V,
max
High-levelinput
voltage.
.2.2V,min;5.5V,max
Low-level
inputvoltage
._0.3V,miniO.gV,max
Inputloadcurrent
pA
............t10
Inputcapacitance,
C(lN)@F=lMHz
................
..................10
pF
Outputcapacitance,
C(OUT)<@F=1MHZ
.......20pF
BuflereclDigitatt/O
Numberof buffered
lines.............
................24
Logiccompatibiliry
............
.............TTUCMOS
(Configurable
whhoptionall/O pull-up/pull_down
resistors)
.
High-fevel
outputvoltage...................
....................2.5V,
min
Low-level
oulputvo|tage...................
....................0.5V,
max
High-level
inputvollage
..2.2V,min;S.SV,max
Low-level
inputvoltage
._O.gV:
miniO.eV,mai
High-level
.t2mA,max
outputcurrent,lsource
Low-level
oulputcurrent,
1sink..........
.................64
mA,max
D/A Converter...............
AD72g7
Analogoutputs
..........zchannels
Resolution
...12birs
outputranges
.0 to +5,t5, o to +10,t.l0 volts
Guaranteed
linearity
acrossoutputranges
..................
o to +5,t5, 0 to +9.2,t9.2 vohs
Relative
accuracy......
t1 bit,max
F.ull-scale
accuracy
.t5 bits,max
Non-linearily
..............+1
bit,max
Settling
time.............
..................10
p.sec,
max
A-3
Miscellaneous
Outputs
Reference
currentoutput
RelerEnce
vollageoutput
+5 volts
i12 volls
Digitalground
CurrentRequlrements
+5 volts
+12volts
-12 volrs
......270
mA
......40mA
......26mA
Connectors
P2: 50-pinrightangleshrouded
boxheader
P3: 40-pinboxconnector
Slze
3.875'Hx 8.90"W(99mmx 226mm)
A4
APPENDIXB
CONNECTORPIN ASSIGNMENTS
P2 Connector:
otFF. s.E.
DIFF.
3.E.
Afl{l+
Att{t
Allfl- | ttile/AcltD
AlN2+
Arr2
Am3
AINz. I AINTO/AG}ID
AlN3+
Alil/f+
AtNa
A[{.- | At}nzlAcilO
Allts
ar{tt- | Ar{r3/AGl{D
AlN6
All{7+ AtN?
A1116| AlNt'UAGllD
A!NT- | Atilrs/Acl{D
All{8+ a|l{8
AINS- | AlNr6/AcilD
Allt6r
Am3-| AlNrr/acND
louTr
AlIALqi GND
AOUT2
AilALOG GIID
A}IALOGGIID
ANALOGGIIO
PA7
PC7
P6
PO6
PA5
PC5
PA'
?c1
PA3
Pci!
PA2
PC2
PAt
PCt
PAO
touT
vouT
DIGTTAL
G}IO
PC0
A}IALOGG}IO
AI{ALOGGIID
T/COUT2
EXT CLK 2
EXTGATE2
+12 VOLTS
-12 VOLTS
+s VOLIS
DIGITALGXD
P3 Connector:
PPI87
PB?
PPI 86
P86
PPI 85
P85
PPI 8'
PB'
PPI 83
P83
PPI 82
PA2
P P IB I
PBI
PP' 80
P80
DIGTTALGI{D
D]GTTALGTD
TRIGGERIN
DIG]TALCI{D
TRIGGEFOUT
DIG]TALG}ID
DIGITALGNO
DIGTTALGI{D
EXT CLK O
EXT GATEO
EXT CLK 1
EXT GATE I
EXT CLK 2
EXT GATE2
DIG]TALGl{D
T/COUT0
DIGITALGI{D
T / C O U Tr
DIG]TALGI{D
T/COUT2
+t2 VOLTS
+5 VOLTS
-r2 voLTs
DIGITALGI{D
B-3
APPENDIXC
COMPONENTDATA SHEETS
lntel 82c54Programmable
IntervalTimer
DataSheetReprint
intel'
82C54
INTERVAL
TIMER
CHMOSPROGRAMMABLE
Compatlblewlth all Intel and most
other mlcroprocessors
r Hfgh Speed,"Zero Walt State"
Operationwlth 8 MHz8086/88and
80186/188
I Handleslnputs from DC to 8 MHr
- 10 MHz lor 82C54-z
r AvallableIn EXPRESS
- StandardTemperatureRange
- ErtendedTemperatureRange
I
I Three Independent16-bltcounters
I Low PowerCHMOS
- lcc : 10 mA @8 lllHz Count
frequency
I CompletelyTTL Compatlble
r Slx Programmable
GounterModes
r Blnaryor BCDcountlng
I StatusReadBackCommand
I AvallableIn 24-PlnDIPand 28-PtnPLCC
The fnlel 82C54is a high-performanoe,
CHMOSversionof the industrystandard
8254counter/timer
nhichis
designedto solvethe timingcontrolproblemscommonin microcomputer
systamdesign.lt providesthree
independent
16'bitcounters,
eachcapableof handling
clockinputsup to 10 MHz.All modesaresoftware
programmable.
The 82C54is pincompatible
withthe HMOS8254,and is a supersetof the 8253.
Six programmable
timermodesallowthe 82C54to be usedas an eventcounter,elapsedtime indicator.
programmable
one-shot,and in manyotherapplications.
The 82C54is fabricatedon Intef'sedvanced
CHMOSllltechnologywhichprovideslow powerconsumption
with performance
equalto or greaterthan_the
equivalent
HMOSproduct.Th€82C54is avaitable
in 24-pinDlp
and 28-pinplasticleadedchipcanier(PLCC)packages.
Itrt''t
O.
3
O!
a
|', ,
Ot
I
O!
I
crl0
n
F
It
!!rtltl'
?3124-3
?ITSNC IIAD€D CHIPCAFRIER
O,
L
vGC
q
a
a
tt
to
fr
-ro
l!
Ao
ia
ctr I
otrt
0t
&
Or
Ot
Dr
!r
Grl c
otlc
olrc 0
3x0
?3124/-1
Flgurc 1.82C51BlockDlagnm
It
t.
da
Ir
ta
a
gll r
catt r
|l
ottt t
rl
jin rdaranco only.
llgnm3llcfor
Pacfrec .iz.s ara rEt to !c.l€.
z|12l.-2
Flgurc2"t2c5a Plnout
3-83
frcr
&prnt5.rtI9
llunboc Zlt2tl05
82C54
Trblc l. PlnDcrcrlption
Symbol
D7'Do
CLKO
OUTO
GATEO
GND
OUT1
GATE1
CLK1
GATE2
OUT2
CLK2
At, Ao
PlnNumbcr
Typc
DIP
1-8
PLCC
2-9
ato
9
10
12
13
o
10
11
12
13
14
15
16
17
18
20-19
14
16
17
18
19
20
21
23-22
FuncUon
Data:Bidirectionaltri-statE
databus lines,
connectedto systemdatabus.
Clock0: Cfockinputof Counter0.
I
Output0: Outputol Counter0.
Gate0: Gateinputof Gounter0.
I
Ground:Powersupplyclnnection.
o
Out1:Outputof Counter1
Gate1:Gateinputof Counter
t.
Clock1:Clockinputof Counter
1.
Gate2: Gateinputof Counter2.
Out2: Outputof Counter2.
o
I
I
Clock2: Clockinputof Counter2.
Address:Usedto selectone ol the three Counters
or the &ntrol Word Registerforread or write
operations.Normallyconnectedto the system
addressbus.
Ar
Ao
Selectr
0
0
1
o
C.ounter
0
1
Counter1
0
Counter2
1
1
ControlWord
Reoister
ChipS€lectA lowon thisinputenablesthe92C54
to respondto HDandWFsignats.
FD andWFiare
ignoredothenvise.
es
21
24
m
u
26
ReadControl:This inputis low duringCpU read
operations.
WH
23
27
WriteC.ontrol:
Thisinputis lowduringCpUwrite
operations.
Vec
24
28
Power:+ 5V powei supplycunection.
No Connect
NC
I
1,11,15,25
sired clelay.After the desireddetay,the 82C54 will
inlenupt the CPU.Softwareoverheadis minimaland
variablelengthdelayscan easilybe accommodated.
FUNCTIONAL
DESCRIPTIOIII
General
The82C54is a programmable
intervaltimer/counter
designedfor usewith Intelmicrocomputer
systems.
It is a generalpurpose,multi-timing
elementthatcan
be treatedas an arrayof llO portsin the system
software.
The 82C54solvesone ol the mostcommonproblemsin any microcomput€r
syst€m,the generation
of accuratetime delaysundersoftwarecontrol.Insteadof settingup timingloopsin sottware,
theprG
grammerconfigures
the 82C$4to matchhisrequirementsandprogramsone of the counters
for thede3€4
Some ol the other @untet/tmer lunctions common
to microcomputerswhich can be implementedwith
the 82C54 are:
r
o
o
o
o
o
o
o
Realtimeclock
Even counter
Digitalone-shot
Programmablerate generator
Square wav€ gen€rator
Binaryrate multiplier
Complexwaveformgenerator
Complexmotor controller
int€f
82Cs4
Block Dlagram
CONTROL
WORDREGTSTER
DATA BUSBUFFER
This 3-state,bi-directional,
8-bitbutferis usedto interfacethe 82C54!o thesystembus(seeFigure3).
TheControlWordRegister(seeFigure4) is setected
by the Read/Write
LogicwhenAr, Ao = 11.lf tp
CPUthendoesa writeoperationto the 82C54.th€
data is storedin the ControlWord Registerand b
interpreted
as a ControlWordused to definethe
operation
of the Counters.
The ControlWordRegistercan only be writtento;
slatusinformationis availablewith the Read-Back
Gommand.
, ^n-...n
-)car"tal.-o^r.o
,- / t 3Yl I
l+oro
2J1244-1
Flgure3. BlockDtagram
ShowtngDataBug
Bufferantl Read/WrlteLoglcFuncfions
BEAD/TVRITE
LOGIC
The Read/WriteLogicacc€ptsinputsfromttre eystem bus and generates
oontrolsignalsfor the other
functionalblocksol the 82C54.A1 and As select
one of the threecountersor theC,onlrol
WordRegls.
ter to b€ readfrom/writteninto.A "low" on the ffi
inputtells the 82C54thatthe CPUis readinooneof
the counters.A "low" on the WH input Iells the
82C54that the CPUis writingeithera ControlWord
or an initiatcount.BothFD anOW-narequatified
by
6; ffi and WFIare ignoredunlessme SZCSA
nas
been selectedby holding6 bw.
?312{.-5
Flgurcf. BlockDlagramShowlngControlWord
ReglsterandCounterFuncilons
COT'NTER
O,COUNTER1, COUNTER
2
Th€s€threefunctionalblocksare identicalin operallon,so onlya singleCounterwillbe describecl.
The
antemal
blockdiagramof a singlecounteris strown
in Fpure5.
The Countersare fully independent.
EachCounter
mayop€ratein a ditlerentMode.
TheControlWordRegisteris shownin thefigure:it
b not partof the Counteritself,but its contengdeterminehowthe Counteroperates.
82C5{
storedin the CR and faterfansfenEd to th€ CE. Th€
Control Logic allows one register at a tim€ to b€
loaded from the internalbus. Both bytes are fanslened to the CE simultaneously.
GRy and CRL ar€
cleared when the Counter is programmed.In this
way, if the Counter has been programmedfor one
byte counts(eithermostsignilicantbyte only or teast
significantbyte only) the other byte wilt be zero.
Note that the CE cannotbe writteninto; whenevera
counl is written,it is writteninto the CR.
The ControlLogicis alsoshownin the diagram.CLK
n, GATE n, and OUT n are allconnected to the outside world throughthe ControlLogic.
82C54SYSTEMINTERFACE
23121/-6
Flgurc5. IntcrnalBlockDlagramof a Countcr
The status register, shown in the Figure, when
latched,containsthe cunent contentsof the Contol
Word Register and status of the outrut and null
count flag. (See detailed explanationol the REadBack command.)
The actual counteris labelledCE (for..CounUng
Et+
menf'). lt is a 16-bit pr€settabtesyncironousdown
counter.
OLs and OLs 8re two 8-bit latches.OL standsfor
"Output Latch"; the subscripts M and L stand for
"Most significantbyte" and '.Least significantbyte,'
respectively.Both are normally refened to as one
unit and called just OL. These latchesnormally.,follor" th€ CE, but if a suitable Countorlatch Command is sent to the 82Ct4, the latches..latch,'th€
presentcount until read by the CPUand then retum
to "following" the CE. One latch at a time is enabled
by the counter's Control Logic to drive the internal'
bus. This is how the 16-bit Countercrommunicates
o/er th€ 8-bal internal bus. Note that th€ CE itself
cannot be read; whenever you read the count, it is
the OL that is being read.
Similarly,there are two B-bit registerscailed CRy
and CR1 (for "Count Register"). Both are rnrmally
refened to as one unit a;rd calledlust CR. Whena
new counl is written to the Counter,the count is
$86
The82CSais beatedbythesystemssoftwareas an
anayol peripheral
l/O ports;threearecountersand
the fourthis a controlregisterfor MODEprogramming.
Basically,
the selectinputsA9,A1crnn€ctto the A9,
A1 addressbussignalsof the CPU.TheCS can be
deriveddirectlyfromthe addressbususinga linear
salectmethod.Or it canbe connected
to the output
of a dEcoder,suches an Intel8205tor largersystems.
l'
lr
Cl
' eourllt
9t.
b0t
octa
oouilat
Goirrrar
ffiffiffii'
23121{-7
Flgure6.82C54SyrtemIntstacc
intef
82C5{
OPERATIONAL
DESCRIPTION
Programmingthe 82C54
General
Countersare programmedby writinga ConbolWord
and then an initialcount. The control word fonnrt s
shownin Figure7.
After power-up,the state of the 82C54is undefined.
The Mode, count value,and output of eft Counters
are undefined.
How each Counteroperatesis determinedwhen it is
programmed.Each Gountermust be programmed
before it can be used.Unusedcountersneed not be
programmed.
AllControlWordsare writteninto the ControlWord
Register,whichis selectedwhen A1, Ao = 11.Tne
GontrolWorditsetf specifieswhich Counteris trdry
programmed.
By contrast,initialcounts are written into the Canters, not the Control Word Register.The Ar, Ao inputs are used to select the Counter to be wdtten
into.The lormat of the initialcount is determinedby
the ControlWord used.
Control Word Format
A1,Ae=11 F-0
F-D=1 WFI=0
DsDqDaD3D2DlDe
sc1 sc0
RW1 RW0 M2 M1 MO BCD
SC - Selcct Countcn
lt - toDE:
n2
ill
scl
sco
0
0
SelectCounter0
0
0
0
Mode0
0
1
0
0
1
Mode 1
I
0
SelectCounter1
SelectGounter
2
x
1
0
Mode2
x
1
1
Mode 3
1
0
0
Mod€ 4
1
0
1
Mode 5
1
1
Read-BackCommand
(See Read Operatjons)
RW - Fead/Wrlte:
RWl RWo
0
0
(seeRead
Counterlatch Gommand
Operations)
BGD:
I
0
0
1
Read/Writeleastsignificantbyteonly.
1
0
Read/Writemost significantbyte only.
1
1
Read/Wrileleastsignificanlbyte first,
then mosl significantbyte.
BinaryCounter16-bits
BinaryGodedDecimal(BCD)Counrer
(4 Decades)
IIOTE: Don't care bits (X) shoutdbe 0 to ansure
compatibilitywith futureInlel products.
Figurc7. ControlWortlFormet
%7
t0
82C5a
WrlteOperations
procedurefor the 82C54is very
The programming
flexible.Onlytwo @nventionsneedto be remembered:
1) For each Counter,the ControlWord mustbe
writtenbeforethe initialc-ountis written.
2) The initialcount must follow the countformat
specifiedin the ControlWord (leastsignificant
byleonly,mostsignificant
byteonly,or leastsignificantbyteandthenmostsignificant
byte).
Since the ControlWord Registerand the three
Countershaveseparateaddreises(selected
bythe
Ar, Ao inputs),andeachControlWordspecifieime
Gounterit appliesto (SCO,SCl bits),no specialinCounter
0
Counter0
Counter0
Counterl
Countert
Counter1
C;ounter
2
Counter2
CountEr
2
A1
11
00
00
11
01
01
11
10
10
Ao
ControlWordLSBofcountMSBofcountControlWordLSBofcountMSBof countControlWordLSBofcountMSBof countControlWordCounterWordControlWordLSBof countLSBofcountLSBolcountMSBof counlMSBof countMSBof count-
Counter0
Counter1
Counter2
C,ounter
2
Counter
1
Gounter0
Counter
0
Counter1
Counter
2
A1
11
11
11
10
01
00
00
01
10
&
structionsoquenceis required.Any programming
sequence
that followsthe conventions
aboveis acc€Plable.
A newinitialcountmay be writtento a C;ounter
at
any time without atlecting the Counter's pr}
grammed
Modein anyway.Counting
willb€ attected
asdescribed
in the Modedefinitions.
Thenewcount
mustfollowthe programmed
countformat.
lf a Counteris programmed
to read/writetwo-byte
counts,the followingprecaution
applies:A program
mustnot translercontrolbetweenwritingthe first
andsecondbyteto anotherroutinewhichalsowrites
antolhat sameCounter.Otherwise,
the Counterwill
be loadedwithan incorrectcount.
ControlWord
ControlWordControlWord
LSBof countMSBof countLSBof countMSBol countLSBol countMSBof count-
Counter2
Counter1
Counter0
Counter2
Gounter2
CounterI
Counter1
Counter0
Counter0
ControlWord- CounterI
ControlWord- Counter0
LSBof countCounter1
- Counter2
ControlWord
LSBof countCounter0
MSBof count- CounterI
LSBof countCounter2
MSBof count- Counter0
MSBof count- Counter2
A1
11
11
11
10
't0
Ao
01
01
00
00
A1
11
t1
01
11
00
01
10
00
10
Ao
NOTE:
ln all lour examples,all countersare programmedto read/writetwcbyte counts.
These are only four of manypossibleprogramming
saqu€ncss.
programmlng
Figure8. A FewPoeslble
Sequencee
ReadOperations
LatchCommand,and the Read-BackCommand.
Eachis explainedbelow.Thefirstmethodis to perIt is oftendesirableto readth€ valueof a Gountar forma simplereadoperation.
To readth6 Count€r,
withoutdisturbing
thecountin progress.
Thisis easi- whichis selectedwith the A1, A0 inputs,the CLK
ly donein the82C54.
inputof the selectedCountermustbe inhibitedby
usingeitherhe GATEinputor externallogic.
OheiThereare three possiblemethodsfor readingthe
wise,!l? countmaybe in the processoichanging
counters:a simple read operation,the C;ounter whenit is read,givingan undefined
resutl
3€8
intef
82C54
COUNTERLATCH COilMAND
The second method uses the "CounterLatch Command". Like a C,ontrolWord,this commandis written
to the Control Word Register, which is selected
when 41, Ao : 11. Also like a C.ontrolWord.the
SCO,SC1 bits select one of the three Counters,but
two other bits, D5 and Bt, distinguishthis command
from a ControlWord.
A l , A O : 1 1 ;f f i : 6 . R - D : 1W
; F=0
D7
D5
D5 Da D3 D2 D1 Ds
sc1 s c o l o | 0
x
x
xtx
SC1, SCO- specitycounterto be tatched
scl
sco
Gounlcr
0
0
1
1
0
0
't
1
0
1
2
Read-Back
Command
D5,D4 - OOdesignatesCounterLatch Command
X - don't care
NOTE:
Don'tcare bits (X)shouldbe 0 tioinsurecompatibitity
withtutureIntelproducts.
grammingoperationsof other Countersmay be inserted betweenthem.
Another feature of the 82c54 is that reads and
writes of the same Counter may be interleaved;for
example,if the Counteris programmedlor two byte
counls,the lollowingseguenceis valid.
'1.
Readleast significantbyte.
2. Write new leasl signiticantbyte.
3. Readmost significantbyte.
4. Write new most significantbyte.
lf a Counler is programmedto readlwrite twobyte
counts,the followrngprecautionapplies;A program
musl not transfer control between readingthe first
and secondbyte to anotherroutinewhich jlso reads
trom that same Counter. Othenvise, an inconect
countwill be read.
READ-BACKCOIT|MAND
The third method uses the Read-Backcommand.
This commandallows the user to check the count
value, programmedMode, and cunent state of th€
OUT pin and Null Count ttag of the selectedcounte(s).
The commandis written into the ControlWord Register and has the format shown in Figure tO. The
commandapplies to the counlers selected by set_
ting theirconespondingbits D3,D2,D1= 1.
Figure9. Counterl.atchlngCommandFormat
TheselectedCounter'soutputlatch(OL)lalchesthe
counl at the time the GounterLatchGommand
b
received.Thiscountis heldanthelatchuntililis read
by the CPU(or untitthe Counteris reprogrammed).
The counl is then unlatchedautomatically
and the
OL returnsto "following"thecountingelement(CE).
This allows readingthe contentsoi ttre Counters
"on the fly" withoutaffectingcountingin progress.
MultipleCounterLatchCommands
mayUeuseOto
latch more than one Counter.EachlatchedCounter'sOL holdsits countuntilit is read.CounterLatch
Commandsdo not atfectthe programmed
Modeof
the Counterin anyway.
ll a Counteris latchedand then,sometime later,
latchedagainbeforethe countis read,the second
CounterLatchCommand
is ignored.Thecountread
will be the countat the timethe firstCounterLatch
Crcmmand
was issued.
With either method,the countmuslbe readasrording to the programmedformat;specilically,
il the
Counteris programmedfor two byte oounts,two
bytesmustbe read.Thetwobytesdo nothaveto be
read one right afterthe other;reador wrileor po-
A0,At-ft
G5=o
iE:r
FF:O
D5: 0 = Lalch count of sef€cted counler(s)
D4:0 = lrtch statusof selectedcounter(s)
th: t - Selectcounter2
D2: 1 : Selectcounter'l
D1: 1 : Selectcounter0
Dg: Resewedtor future expansion;must be 0
Figure10.Read-BackCommandFormat
Theread-back
commandmaybe usedto latchmultilatches (OL) by seningthe
P!*1er_output
coUNT bit D5=0 and selectingthe desiredcounter(s).This singlecommandis functionally
equiva.
lent to severalcounterlatch commands,one for
eachcounterhtched.Eachcounter'slatchedcount
is held until il is read (or the @unter b repro
grammed).That counteris automaticallyunlatc'hed
n'henread,hrt other oounlersremainhtched until
theyareread.lf multiplecountread-back
commands
are issuedto the samecounterwithoutreadingthe
intef
82C54
count all but the first are ignored;i.e., the count
whichwill be readis the countat the timethe first
read-backcommandwasissued.
The read-back
comrnand
mayalsobe usedto latch
statusinlormationof selectedcounter(s)by setting
STATUSbit Dut=O.Statusmust be tatchedto be
r€ad;statusol a countaris accessedby a readfrom
that counter.
Th€counterstatustormatis shownin Figure11.Bits
D5 throughD0 containthe counter'sprogrammed
Modeexactlyas writtenin the last ModeControt
Word.OUTPUTbit D7 containsthe currentstat6ot
the OUTpin.This alowsthe userto monitorthe
counter'soutputvia sottware,
possiblyeliminating
somehardwarelroma systsm.
NULL
RWl RW0 M2 M1 MO BCC
COUNT
OUTPUT
D1=OutPinbl
0=OutPinisO
D6 1 = Null count
0 = Countavailabletor rsading
Ds-Do CounterProgrammed
UoOe(See Figwe 7)
Flgurc lt. Statu! gyte
NULL COUNTbit D6 indicateswhEnthe tast count
written to the counterregister(CR) has been loaded
into the countingelement(CE).The exact time this
happensdependson the Modeof the counterand is
describedin the ModeDefinitions,
but untilthecount
is loadedinto the countrngelement(CE),it can't be
readfrom the counter.ll the countis latchedor read
beforethis time,the countvalue will nct reflectths
new countjust written.The operationof Null Count
is shownin Figure12.
Ds
1
1
1
0
0
1
0
0
1
1
1
0
1
1
0
0
1
1
0
1
1
0
I
0
0
0
I
0
0
0
1
1
1
1
0
0
0
1
0
CAUSES:
Nullcount= 1
Nullcount- 1
Nullcount= o
tll Onryth€ counterspecifiedby ths control word will
have its null count s€t to 1. Null count bits of other
countersarg unatfected.
t2l il th€ counteris programmedlor two.byte counts
(l€ast significantbyte th€n most significantbyte) nutl
countgoesto 1 when the secondbyte is written.
Flgure12.Nu[ Count Operation
lf multiplestatuslatch operationsof the counter(s)
are perlormedwithoutreadingthe status,all but the
firsl ars ignored;i.e.,the statusthat will be read is
the statusof the counter at the time the tirst status
read-backcommandwas issued.
D1
Command
D7 D6 D5 D; D3 D2 D1
1 1 0 0 0 0 1
THISACTION:
A. Writeto th€ control
*oro register,irt
B.Wril€to th€ count
rogister(cn);t2l
C. Newcountis loaded
intocE tcR '+ cEl
Both count and status of th€ setected counter(s)
may be latcbed simultaneously by setting both
6nTiT ano SiFiG
bits D5,Di=0. tris ii runctionallythe sameas issuingtyyos€parateread-back
commandsat once, and the above discussionsapply here also. Specifically,if muttipl€count and/or
statusread-backcommandsare issuedto the same
count€(s) withoutany interveningreads, all but the
tirst are ignored.This is illustratedin Figure 13.
lf both countand statusof a counterare latched,the
first readop€rationof that counterwill return latched
status, regardlessof which was latched first. The
nent one or i,yo reads (dependingon whetner the
counteris programmedfor one or two type counts)
returnlalchedcount, Subsequentreads return unlatchedcount.
Dcscrlptlon
Rcsultr
Readbackcountand statusof
Counter0
Readbackstatusof Counter1
Countandstatuslatch€d
lor Counter
0
0
Reaobackcountandstatusof
CounterI
CountlatchedtorCounter1,
butnot status
0
Readback statusof Counterl
Commandignored,status
alreadylatchedfor counter 1
Statuslatchedfor Counterl
Readbackstatusof Counters2, 1 status latchedfor counter
2, but not Counter1
Readback countof Counter2
Countlatchedfor Counter2
Figure 13.Read-BackCommandErample
3.90
inbr
82C54
cs
m
WF
Ar
Ao
0
0
1
0
0
0
tVriteinto Counter0
1
1
WriteintoCounter1
o
1
1
0
Writeinto hunter 2
0
1
0
0
0
0
1
1
WriteControlWord
o
1
0
0
1
0
1
Readlrom C,ounter
0
ReadfromCounter1
0
0
0
0
1
1
0
0
0
1
1
1
1
x
x
0
1
1
x x
x x
0
This allowstfe countingsequenceto be synchronized by software.Again,OUT does not go high untit N
+ 1 CLK pulsesafter the new count of N is written.
lf an initial count is written while GATE = 0, it wiil
still be loadedon th€ next CLK pulse. When GATE
goes high, OUT witt go high N CLK pulses tater;no
CLK pulse b neededto load the Countsras this has
alreadybeen done.
ReadfromCounter2
NoOperation(3-State)
(3-State)
No-Operation
(3.State)
NoOperation
Flgure14.Read/WrlteOperailons
Summary
l.l.l.
Mode Definitions
The lollowingare dsfinedfor usein describing
the
operationof the 82C54.
CLKPULSE:
a risingedge,thena failingedge,in
that order,of a Counter's
CLKinput.
TRIGGER:
a risingedgeot a Counter's
GATEinput.
COUNTERLOADING:
thetransferof a countfrom
the CRto the CE (referto
the "FunctionalDescrip
tion")
Clrll
l . I I | 3| ! i : I s I # l f i l
tflrt
l,l.l.l.
| ! | : I ; | : I i l3 ln I
MODEO:INTERRUPT
ONTERIIIINAL
coUilT
Afterthe
lode Qis typicailyusedfor eventcounting.
ControlWordis written,OUTis initiallylow,andwill
remainlowuntiltheCounter
reaches
zero.OUTthen
goes high and remainshighuntila newcountor a
new Mode0 ControlWordis writtenintothe Gounter.
GATE : 1 enablescounting;
GATE: 0 disables
counting.GATEhas no etfecton OUT.
Afterthe C;ontrol
Wordandinitialcountarewrittento
a Counter,
the initialcount
willbeloadedonthenext
CLKpulse.ThisCLKpulsedoesnordecremenl
the
count,so for an initialcountof N, OUTdoesnotgo
highuntilN + 1 GLKputsesattertheinitiatcountis
written.
lf a new count is writtento the Counter,it will be
loadedon the nextGLKpulseandcounting
willcontinuefromthe newcount.lf a two.bytecountis written, the lollowinghappens:
1) Writingthe firstbytedisables
counting.
OUTis set
low immediately
(no clockpulserequired).
2) Writingthe secondbyte altowsthe newcountto
be loadedon the nextCLKpulse.
3-41
l.l'1. l. | ! ltl ili lt l: lrl
2312U-8
}IOTE:
The FollowingCorwentionsApplyTo All Mode Timing
Dlngrams:
1. Counters 8re programmedfor binary (not BCD)
counting.andfor Reading/Writingteastsignificantbyie
(LSB)only.
2. The counteris atwaysselected(eS alwayslow).
3. C-Wstandsfor "C.onlrolWord"; Of : iO rn€ansa
@ntrolword ol 10, hex is wrinento the counter.
4. LSB stendstor "Least SignificantByte.,ot count.
5. Numbersbelowdiagramsare countvalues.
The lowErnumberis the leastsignilicantbyte.
The upper numbaris the most signiticani byte. Siirrca
!.ne coultgr b pogrammed to React/WrireGe only,
lh€ mosl significantqd€ cannot be reacl.
N stands for an undelinedcount.
Vertical lines $rw trsnsitions betweencount values.
Figure 15.Mode 0
intef
82C54
TODE1:HARDWARE
RETRIGGERABLE
ol{E-${oT
TODE 2: RATE GEilERATOR
OUTwillbe initialtyhigh.OUTwillgo lowon theCLK
pulsefollowinga triggerto beginthe one-shotprlse,
and will remainlow untilthe Counterreacheszero.
OUTwillthengo highandremainhighuntilth€CLK
pulseafterthe nexttrigger.
This Mode functionslike a divide-by-Ncounter. lt is
typiciallyused to generatea RealTime Clock interrupt.OUT will initiallybe high.Whenthe initialcount
has decrementedto 1, OUT goes low for one CLK
pulse. OUT th€n go€s high again, the Counter reloads the initial count and the process is repeated.
Mode 2 is periodic;the same sequenc€asrepeated
indefinitely.For an initial count of N. the sequence
repeatsevery N CLK cycles.
Afterwritingthe ControlWordand initialcount the
C,ounteris armed.A triggerresultsin loadingthe
CounterandsettingOUTlowon the nextCLKpulse,
thusstrarting
theone.shotpulse.An initialcountof N
will resultin a one-shotpuls€N CLKcyclesin duration.The one-shotis retriggerable,
henceOUTwilt
remainlow for N CLKpulsesatteranytrigger.The
one-shotpulsecanberepeatedwithoutrewriting
the
samecountIntothecounter.GATEhasno etfecton
OUT.
GATE : 1 enablescounting;GATE : 0 disables
counting.ft GATE goes low dudngan output pulse,
OUT is s€t high immediately.A trigger reloads the
Counterwith the initialcount on the next CLK pulse;
OUT goes low N CLK pulses after the trigger.Thus
the GATE input can be used to synchronizethe
Counter.
lf a nervcountis writtento theCounterduringa one'
shot puls€,the currentone-shotis not atfectedunless the Counteris retriggered.
In that cas€,the
Counteris loadedwiththe newcountand theone,
shotpulsecontinues
untilthenewcountexpires.
After writing a Control Word and initial count. the
Counterwill be loaded on the next CLK pulse.OUT
go€s low N CLK Pulsesafter the initial count is writlen. This allows the Counterto be synchronizedby
softwarealso.
n
ll
CtI
ctr
crrt
otrt
oUt
otl
I0lol0lct
Irlrlrlrl
tl
ctr
o|'t
otjt
'1"1.!!l:
-tl
TI
cLt
Ctr
ortc
out
olta
l.l.l.l*l!
l0 l0 lo l.
I t te | | I i
qrf
l0l0l
l.lrl
z3124-10
NOTE:
A GATE transition should not oocur on€ clock p.ior to
terminalcount.
| . 1 , l " I : | ?I I i : : l f i l : l ! |
zj124/,-9
Figure 16.Mode t
Flgure17.Modc2
,r-42
inbf
82C54
Writinga new countwhilecountingdoesnot affect
the cunent countrngsequ€nce.lf a tigger is receivedafterwritinga newcountbut beforetheend
of the cun€ntperiod,the Counterwillbe loadedwith
the new counton the nextCLKpulseandcounting
will continuefrom the new count.CIherwise,th5
new countwill be loadedat the end of the cunent
countingcycle.In mode2, a COUNTof 1 is ill€gnt.
OUTwill be highfor (N + t)/2 countsand towfor
(N -1)/2 counts.
Gra
aart
IIODE 3: SQUABEWAVEilODE
fvlole _3is typicattyusedlor Baudrategeneration.
Mode3 is similarto Mode2 exceptfor thedutycycle
of OUT.OUTwiilinirialty
be high.Whenhatfihoini_
tial counthasexpired,OUTgoeslowfortheremainder of the count.Mode3 is periodic;the sequerrce
aboveis repeatedindefinitely.
An initialcountof N
resultsin a squarewavewith a periodol N CLK
cycles.
GATE = 1 enablescounting;GATE: 0 disables
couniing.lf GATEgoeslowwhileOUTis low,OUTis
set highimmediately;
no GLKputseis required.
A
triggerreloadsthe Counterwiththe initialcounton
the next CLK pufse.Thusthe GATEinputcan be
usedto synchronize
the Counter.
After writinga ControlWord and initialcoun! the
Counterwill be loadedon the n€rl CLKpulse.This
allowsthe Counterto be synchronized
by softurare
also.
Writinga new countwhilecountingdoesnot atfect
the currentcountingsequence.lf a triggeris receivedafterwritinga newcountbut b€forethe end
of the currenthatf-cycleof the squarewave,tte
Counterwill be loadedwith the new @unton the
nentCLK pulseand countingwill continuefromthe
new count.Otherwise,
the newcountwiltbe loaded
at the end of lhe currenthalf-rycle.
Mode3 is implemented
as follows:
Evencounts:OUTis initiaftyhigh.Theinitialcount
is
loadedon one CLKpulseand thenis decremenled
by two on succeedingCLKpulses.Whenthe count
expiresOUTchangesvalueandthe Counter
is re.
loadedwith the initialcount.The aboveprocessis
rcpedtedindefinitefy.
Odd counts:OUT is initiailyhigh.The initialcount
minusone (an even number)is badedon oneCLK
pulseand then is decremenled
by two on succeeding GLKpulses.One CLK gut* afterthe countoxpires, OUT goes low and the Counteris reloaded
with the initial count minusone. Succeeding
GLK
pulsesdecrementthe countby two.Whenthecount
expires,OUT goes high againand the Counterb
reloadedwiththe anitialcountminusone.Theabore
processis repeatedindefinitely.
So for odd counts,
T
ctt
oda
Ortt
T
cu
aaft
nl
l. l.l.l.l!l:l:l;l;l:l:l
! l:lil
23124-11
I{OTE:
A GATEtansitionshoutdnot occurone dock gb,r to
terminal
count.
Flgurc 18.llode 3
ilODE 4: SOFTTUARE
TRtccEREDSTROBE
OUTwill be initiailyhigh.Whenthe initiatcountexpires,OUTwilt go low for one GLKpulseand then
go highagain.Thecountingsequenc€
is .triggered"
by writingthe initialcount.
GATE= l enablescounting;
GATE= Odisables
counting.GATEhasno etfeclon OUT.
Afterwritinga ControlWordand initialcount,the
Counterwill be toadedon the next CLKpulse.This
CLKpulsedoesnot decrement
ttrecounl so for an
initialcount of N, OUT does not strobelow until
N + I CLKpulsesatterthe initiatcountb written.
lf a new count is wriftencturingcounting,it will be
loadedon the nert CLKpulseandcountrigwillconlinuefromthe newcount.It a twotyte countis wrtt
ten,the followinghappens:
82C5a
1)Writingthe firstbytehasno etfecton counting.
2) Wtitng the secondbyte allowsthe newcountb
be loadedon the nextCLKpulse.
This allowsthe sequenceto be "retiggered"by
sottware.OUTstrobestow N*l CLK pulsesafter
the newcountol N is written.
n
ortt
ortt
Cl r ll
ltl
A triggerresultsin theCounterbeingloadedwiththe
initialcounton the next GLKpulse.The counting
s€quenceis retriggerable.
OUTwill not strobelow
for N + 1 CLKpulsesafteranytrigger.GATEhas
no etfecton OUT.
lf a newcountis writtenduringcounting,
the current
countingsequencewill not be atlected.lf a trigger
occursafterthe newcountis writtenbut beforethe
cunentcount expires,the Counterwill be loaded
with the new count on the next CLK pulse and
counting
willcontinue
fromthere.
CLT
l.l.l.l.l!lllil
Atterwritingthe ControlWordandinitialcount,the
counterwillnotbe loadeduntiltheCLKpulseaftera
tiggar. This CLK pulse does not decremsntthe
count,so for an initialcountof N. OUT does not
strobelow untilN+ 1 CLKpulsesaftera trigger.
0 trrtF;lrfl
o l:rl:rl:ol
rl
tl
il
ctr
Crt
crtt
ortl
ottf
'_1"':::
'r'i l:l:l:lili,l
oul
t
.l
ctr
Ctr
oatt
orta
otf
l. l.l. l. I i | ;lil!
out
li l: lt:l
.7J12U-12
Flgure 19.Mode I
r-i
ctr
IIODE 5: HARDWARETRtccEREO STROBE
(RETRTGGERAELE)
orla
OUT will initiallybe high. Countingis triggeredby a
dsing edge of GATE.When the initialcount has sxpired, OUT will go low for one CLK pulse and then
go high again.
oril
Flgurc20.llode 5
3-94
inbf
E2Cs{
OperationGommonto All Modes
Programmlng
Whena ControlWordis writtento a Counter,all
ControlLogicis immediately
resetandOUTgoesto
a knowninitialstate;no CLKpulsesarerequiredfor
this.
ll Initaat€s
counting
2) Resetsouput
atter next
clock
GATE
fle efJe input is atwayssamptedon the rising
edgeof CLK.In Modes
O,z,g,and4 theGATEinpui
is levelsensitive,andthe logiclevelis sampledon
therisingedgeof CLK.In Modes1,2, g, and5 th6
GATEinputis risingcdgesensitive.
ln theseModes,
g rislp edgeot GATE(trigger)setsan edge-sensilivellip-flopin theCounter.
Thisftip-flopis tf,ensampledon the nexl risingedgeof CLK;the ftip-flopis
resetimmediately
atterit is sampled.In thii uyay,a
triggerwill be detectedno mafierwhenit occurs_a
highlogicleveldoesnothaveto be maintained
until
the nextdsingedgeof CLK.Notethat in Modes2
and3, the GATEinputis bothedge-andlevel-sensitive.In Modes2 and 3, if a CLKsouroeoth€rthan
the syst€mclock is used,GATEshoutdbe pulsed
immediately
lollowingWF of a new@untvalue.
Figurc21.GatcPln OpcraflonrSummery
UODE iltN
COUNTER
rAx
COUNT COUNT
0
1
1
1
2
3
2
2
0
0
0
0
4
1
0
New countsare loadedand Countersare decrementedon the failingedgeol CLK.
Thelargestpossibleinitialcountis 0; this is equiva_
l€nt to 216 lor binarycounungand lon tor BCD
countlng.
}IOTE:
0 is equivalentto zt6 for binary cor,mtingand 16 tor
BCDcounting
Flgure22.llinlmumand f,laxlmum
lnlilalCountr
3-95
TheC;ounter
doesnotstopwhenit reacheszero.ln
Modes0, 1,4, and5 theCounter..wraps
around"to
the highestcount,eitherFFFFhexfor binarycountingor 9999for BCDcounting,
andcontinueicount_
ing.Modes2 and3 areperiodic;the
Counter
reloads
itselfwith the initialcountand continuescounting
fromthere.
intef
E2C5f
'Notice:Slfassasabovethoselisted urder "AbsoluteMaximumRatings"mayceuseparmanentdamage to the device.Thisis a slress ratirg only and
functionaloperationof the deviceat theseor any
othercoditions abovathoseindicatedin the opentionalsectionsof thisspacillcationis notimplied.Etposureto absolutemaximumrating conditionslor
extendedperiodsmayaffectdevicereliability.
ABSIOLUTE
MAXIMUMRATINGS'
Ambient
Temperature
UnderBias... . . . .OCto 7OC
StorageTemperature ..... -65.to +lSOC
-0.5to +8.0V
SupplyVoltage
Operating
Voltage
.... +4Vto *7V
Voltage
on anylnput..
.GND-2V to +6.5V
Voltage
on anyOutput. .GND-0.5Vto V6s + 0.5V
PowErDissipation
....l Watt
D.C.CHARACTERISTTCS
10o/o,
GND=0U ffe = -4OG to +85"C for ExtendedTemperature)
Symbol
Paramctcr
llln
llar
Unltr
Tcst CondlUonr
-0.5
Vt
Input Low Voltaqe
0.8
v
vrx
Input HighVollago
2.0
Vcc + 0.5
v
Vol
Output Low Voltaqe
0.4
v
lor = 2.5mA
vq1
OutputHighVoltage
3.0
v
lox = -2.5 mA
Vrn - 0.4
v
lox : -100 rA
Iu
Inpul Load Cunenl
pA
+2.0
Vrr.r-Vmto 0V
lopr
OutputFloatLeakageCunent
r10
Vour=Vcc to 0.0V
,LA
lsc
V66 SupplyCuneni
20
mA
(fA:0"C to 7fC. V66:5Vt
okFreq=,#HTr11?:1
bcse
V66 SupplyCunent-Standby
10
,.4
lccsar
V66 SupplyCunent-Standby
150
pA
lnput Capacitanc€
l/O Capacitance
10
20
20
pF
Grru
Cvo
(bur
OutputCapacitance
OF
pF
CLKFreq: 96
dSI = Vcc.
All Inputs/DataBusV66
AllOutputs
Floatino
CLKFreq = P6
dS = VcC.All OtherInputs,
l/O Pins= Vcrun.O.rtpulsOoen
fc=1MHz
pins
Unmeasured
returnodto GND(S)
A.C.CHARACTERISTICS
CfA: OoCto 70'C,VCC= 5V + 107o,GND=0V) (Ir : -4OC to +85.C for ExtEnded
Temperature)
(Noret)
BUSPARAMETERS
READCYCLE
Symbol
Paramater
Itlln
hn
tsR
Address Stable Before F- I
45
G staoteBefore
FiDI
0
0
150
tRo
AddressHoldTimeAfterF'Df
RDPutseWidth
DataE\elayfromR-DI
leo
Data Delay from Adclress
tn.a
tnn
82C5{
llar
top
FD T to DataFloatins
tnv
Command
RecoveryTime
I{OTE:
1. AC ttmingsmeasuredat V66 = 2.0V,V4 = 0.8V.
5
n0
3-96
a2c5a-2
llln
llar
30
0
0
95
Unltr
1n
85
220
90
185
ns
ns
ns
ns
ns
ns
65
n8
5
165
ns
inbr
82C54
A.C. CHABACTERISTICS(Gonrinued)
WRITECYCLE
Symbol
tlw
tsw
twn
tin
0
0
0
150
AddressStableBeforeWHJ
eS SubteBeforeWF-J
AddressHoldTimeAtterWFII
tww
WR PulseWidth
tow
two
DataSetupTrmeBetoreWFiI
Dataxold TimeAtrerWFf
lRv
CommandRecoveryTime
42c54.2
Xin
llar
0
0
0
82C54
Parameter
tar
0
200
ns
ns
0
ns
ns
ns
ns
165
ns
95
95
120
Unlte
CLOCKAND GATE
Symbol
tctr
tpwx
Parameter
tcl
ClockPerrod
HighPulseWrdth
Low PulseWrdth
Clock FliseTime
ClockFallTime
Gatewidrh High
Gate Width Low
tcs
GateSetupTimeto CLKt
trsrt
Too
Looe
Gate HoldTimeAtterCLKT
OutputDelayfromCLKJ
OutputDelayfromGateJ
CLK Delayfor Loading(,|)
Gate Delayfor SamplingF)
OUT Delayfrom ModeWrite
CLK Set Up for CountLatch
tpwl
Tq
tp
tcw
lwc
twe
two
br-
82C54
llin
llax
125
DC
60(3)
60(3)
|
E2C54-2
Xin
llar
100
DC
ns
ns
30(3)
50€)
ns
25
25
50
Units
25
25
ns
ns
ns
ns
50
50.
50
40
50(2)
50€)
ns
ns
ns
50
0
-5
150
120
55
50
ns
100
-5
100
55
40
-40
240
40
0
260
-40
45
ns
ns
ns
ns
TOTES:
2. ln Modes 1.and 5 triggersare sampledon sach rbing clockedge.A secondtriggerwithin120 ns
flO ns lor the g2}5/^-2
ol the risingclock edge may not be detected.
3. Low-goingglitch€sthat vaolatetpwx, hm m8ycaus€€nors r€quiringcounterreprogramming.
4. Exceptfor ExtendedTemp.,see Exrendedrernp. A.c. characteristiisbelou
5. Samplednot 100oatested.TA = 25.C.
6. It CLK presenl Twc mrn then count equalsN+2 cLK putses,T1ry6max equalscomr N+ I cLK pulse.
9!
Tyygmin to
Tyygmax, count will be either N + I or N + 2 CLKpulses.
7. In Modes 1 and 5. it GATE is present'ifi€n yt.itinga new Countvalue,et Try6 min C.ornterwill mt be triggered,
at Try6
max Counterwill be triggered.
8. It CLK Presentwhen writing a c,ounterLetchor ReadBackcommand,at Tg1 min ctK will be reflectedin ggunt
value
l€tched' at Tgg max CLK will not be rellectedin the count valuehtched. writind a Count€rlatch or ReadBack
Commino
between T6g min and Tyygmax will resull ana latchedcounl valluenrhichis + one l€ast
*lniticant bit.
-4trC to + 85'Cfor Extended
T
82C5{
Parametcr
llin
tax
EXTEI'IOEDTEMPERATURE
CT
Symbol
iwc
CLK Delaylor Loading
-25
25
twc
Gate Delaylor Sampling
-25
25
3-97
42c54.2
Iin
-25
-25
Ier
25
25
Unlts
ns
ns
intef
WAVEFORMS
23124-11
READ
cl
r!
lAo
Ollr
lUt
e
oo
23124l-15
intef
82C5{
CLOCKAilD GATE
z3124_17
' l|tt by{. of co|.trit
baingwdn n
A.C.TESTINGINPUT,OUTPUTWAVEFORT
AC. TESTINGLOADCIRCUIT
+I q . | r t
J.
=
A.C.Tcrirp:Inpubrrodrivcn
rr 2..vfor. r* f" ff;].h
logig
rre mrdc-l aWfrr
lgj.."
:9l',.Timir[ mcasurcmtmr
"1" .nd 0.8V
tor . bgic ..0.'
Cr,- rSOpF
qhdu(h.ftc.prctr'D
fogh
s99
2t12..-1e
Intel82C55AProgrammable
Peripherallnterface
DataSheetReprint
intel'
82C55A
INTERFACE
PERIPHERAL
CHMOSPROGRAMMABLE
I Control Word Read-BackCapablllty
I Dlrect Blt Set/Reset CaPabllltY
r 2.5 mA DC Drive Capabllltyon all l/O
Port OutPuts
r AvallableIn 4GPln DIP and 44-PlnPLCC
I AvallableIn EXPRESS
- StandardTemperatureRange
- ExtendedTemperatureRange
I Compatlblewlth all Intel and Most
Other lllcroprocessorg
r Hlgh Speed,"Zero Walt State"
Operatlonwlth S llHz 8086/88and
80186/f88
a 24 Programmablel/O Plns
t Low PowerCHMOS
r CompletelyTTL Compatlble
CHMOSversionof the industrystandard8255Ageneralpurpos€
The lntel 82C55Ais a high-performance,
lt provides
programmable
l/O devicewhichis designedfor usewithall lntelandmostothermicroprocessors.
programmed
in 2 groupsof 12andusedin 3 maiormodesof operation.
24llo pinswhichmaybe individually
The 82C55Ais pin compatible
withthe NMOS82554and 8255A.5.
in sets of 4 and I to be inputsor outputs.ln
ln MODE0, each groupof 12ll0 pins maybe programmed
4 pinsareused
to haveI linesof inputor output.3 of the remaining
MODE1, eachgroupmaybe programmed
MODE
is
a
strobed
bLdirectional
bus
configuration.
signals.
2
for handshaking
intenupt
and
control
wltichprovideslowpowerconsumption
The82C55Ais fabricatedon Intel'sadvancedCHMOSllltechnofogry
with performance
equalto or greaterthanthe equivalentNMOSproduct.The 82C55Ais availablein 40'pin
DIPand 44-pinplasticleadedchipcanier(PLCC)packages.
rei i 3 3 r i 3 i 3rr
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r4
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ta
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o
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?31256-1
Flgure 1.82C55ABlock Dlagram
z.31256-2
Figure2.82C55APlnout
Oiagramsar6 torprn r6l€r€nc€only. Psckag€
sizos are not to Bcale.
g-124
lt!?
S.ptfirb.i
Order XuaDrc 23t256-OOa
.
82C55A
Table1.Pln Dercrtpton
Symbol
PAg-o
Pln ilumbcr
Dlp
PLCC
1-4
2-5
HD
65
GND
Ar-o
Type
vo
5
6
I
6
7
I
7
I
8-9
9-10
Nameand Functlon
PORTA, PINS0-3: Lower nibbleof an g-bit data output latch/
buffer and an 8-bit data input latch.
READCONTROLThisinputis lowduringGpUreadoperations.
CHIPSELECT:
A towon thisinputenablesthe82C55Ato
respondto F-DandWFisignats.
FD andWRareignored
otherwise.
Syrtcm Ground
ADDRESS:
Theseinputsignals,in conjunction
HDandWFi,
controlthesel€ctionof oneof thethreeportsor th€control
wordregisters,.
A1
As
m
0
0
0
1
0
0
0
0
1
I
1
0
0
0
t
0
1
1
1
0
1
1
1
1
10-13 11,13-15
vo
PCo-s
14-17
16-19
t/o
PBo-z
18-25
vo
RESET
35
20-22,
24-28
29
30-33,
35-38
39
WR
36
40
I
37-40
41-44
vo
Vec
Dz-o
PAz-c
NC
26
27-94
1,12,
23,U
vo
G
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
InputOpera$on(Read)
PortA-DataBus
PortB-DataBus
PortC-DataBus
- DataBus
ControlWord
Output Operailon(Wrltc)
DataBus- PoitA
DataBus- PortB
DataBus- PortC
DataBus- Control
DisableFunctlon
1
DataBus-3-Strate
1
1
0
DataBus-3-Strate
PORTC, PINS4-T: Upgernibbteof an &bit dataouput tatcnTbutferandan B-bitdata.input
butfer(notatchfor inpuiy.fnts port
canbe dividedintotwo4-bitportsunderthe modecontror.Each
4'bit portcontainsa 4-bitratchandit canbe usedfor the control
signaloutputsandstatussignalinputsin conjunction
withports
A andB.
x
x
PGz-r
1
WR
x
x
x
x
PORTC, PINSO-3: Lower nibbleot porr C
PORTB, P|NS0-7: An 8-bitdatraoutputtatch/bufferandan g]
bit datainputbutfer.
erqTEil POWER:* 5V power Supply.
DATABUS:Bi-directional,
tri-statedatabuslines,connectedto
systemdatabus.
RESET:A highon thisinputclearsthe controlregisteranOatt
portsaresetto th€ inputmode.
WRITECONTROL:
Thisinputis towduringCpUwrite
operations.
PoHT A, PINS4-7: Uppernibbleof an g-bitdataoutputlatch/
4ffer and an 8-bit data input latch.
No Conn€ct
inbf
82C554
Eachof the Controlblocks(GroupA and GroupB)
accepts"commands"fromthe Read/WriteControl
Logic,receives"control words" from the intemal
Gcnenl
to atsasdatabusand issuesthe propercommands
ports.
socaated
peripheralinterface
The 82G55Ais a programmable
sysdevicedesignedfor usein Intelmicrocomputer
ControlGroupA - PortA andPortC upper(C7-C4)
tems.lts functionis that of a generalpurposel/O
ControlGroupB - PortB andPortC lower(C3-C0)
to the
componontto intarfaceperipheralequipment
microcomputer
systembus.The functionalconfigu- The controlword registercan be both writtenand
rationof the 82C55Ais programmed
by the systom readas shownin the addressdecodetable in the
sottwareso that normallyno €xtemallogicis n€ces- pin descriptions.
Figure6 showsthe controlword
saryto interfaceperipheraldevicesor structur€s.
formatfor both Readand Writeoperations.When
is read,bit D7willalwaysbe a logic
th€controlword
implies
"1",
this
controlwordmodeinformation.
as
DataBur Buffer
82C55AFUNCTIONALDESCRIPTION
This3-statebidirectional
8-bitbufferis usedto int€tface the 82C55Ato the syst€mdata bus. Data is
transmitted
or receivedby the bufferuponexecution
of inputor outputinstrus'tions
by the CPU.Control
words 8nd status informationare also transfened
throughthe databusbutfer.
Rcad/Wrltcend Control Loglc
The functionof this block is to manag€all of the
intemal and extemaltransfersof both Data and
Controlor Statuswords.lt acceptsinputsfrom the
GPUAddressandControlbusses
andin tum,issues
commandsto bothof the ControlGroups.
GroupA end Group B Controlt
The lunctionalconfigurationof each port is programmedby the systemssoftware.ln essence,the
CPU"ouputs" a controlword to the 82C55A.The
controlwordcontainsinformationsuchas "mode",
"bit set", "bit res€t", etc., that initializesthe functionalconfiguration
of the 82C55A.
Ports A, B, and C
The82C55Acontainsthree8-bitports(4, B, andC).
All can be configuredin a widevarietyof functional
charastedstics
by the syst€msoftwarebut eachhas
its own specialfeaturesor "p€rsonality"to furthEr
enhancethe powerandflexibilityof the 82C55A.
Port A. One 8-bitdataoutputlatch/butferand one
8-bit input latch buft€r.Both "pulf-gp"and "pufldown"busholddevicesare presenton PortA.
Port 8. One 8.bit data input/outprdlatch/butfer.
Only"pull-up"busholddevicesare pr€s€nton Port
8.
Port C. One 8-bitdataoutputlatch/butferand one
8-bitdatainputbutfer(no latchfor input).This port
can be dMdedinto two 4-bitportsunderthe mode
ctntrol. Each4-bit port conlainsa 4-bit latch and it
canbe usedfor the controlsignaloutputsandstatus
signalinputsin conjunction
withportsA and B. Only
"pull-up"bus holddevicesare presenton PortC.
SeeFigure4 for ths bus-holdcircuitconfigurationfor
PortA, B, andC.
3-126
intef
82C55A
ID
f,
lr
t
attat
F|gurc3.82c55AB|ockD|agramShow|ngDataBurBu||crenoneeorwr|tcGontro|Lm;
rBgr
rTEil'AL
OATAN
il?tralt
a||^orn
lrTltr^L
tlol? !,C
it{
il?cmr L
OITA
'ilOTE:
wi
Port pins loedod urith more than 20 pF capaciiance mry not heve
zJ12ft-4
rheir logic l€ve, guarent€€d tollowir€ a hardware resel.
Flgure4. Port A, B, C, But.hold Gonflguration
g-127
intet
82C55A
DESCRIPTION
82C55AOPERATIONAL
ooaf?tol ioto
q
llode Sclcctlon
0r
q
o.
q
D,
o!
\
I
Thereare threebasicmodesof operationthat can
be selectedby the systemsottware:
Mode0 - Basicinput/output
Mocle1 - Strobedlnput/output
Mode2 - Bi-directional
Bus
Whenthe resetinputgo€s"high"all portswillbe set
to the inputmodewithall 24 portlinesheldat a logic
"one" level by the internalbus hold devices(see
Figure4 Note). Atter the reset is removedth€
82C55Acan remainin the inputmodewith no additionalinitialization
ThiseliminatEs
required.
the need
for pullupor pulldowndevicesin "all CMOS"designs.Duringthe executionof the syst€mprogram,
anyof the othermodesmaybe selectedby usinga
single ouput anstruction.This allows a single
82C55Ato servicea varietyof periphenldevices
with a simplesottwaremaintenanceroutine.
It_
/
crqrr
\
totT c |ldrtit
l.lxrul
0. OUTrut
roit I
l.lttw
0. OUT'UT
roo: tctEgnorl
0. rcOa0
r.IOOal
/
oro'^
\
foir c ttrtEtl
I . IPU?
0. OUTtttT
The modesfor PortA and PortB can be separatoly
defined,whilePortG is dMdedintotwo portionsas
requiredby the PortA and PortB definitions.
All of
the outputregisters,includingthe statusflipflops,
will be resetwheneverthe modeis changed.Modes
may be combinedso that theirfunctionaldelinition
can be "tailor€d"to almostany l/O structur€.For
instance;GroupB can be programmed
in Mode0 to
monitorsimpleswitchclosingsor displaycomputational results,Group A could be programmedin
Mode1 to monitora keyboardor tap€readeron an
intenupt-driven
basis.
ioit a
l.ll|'t
l
0.Ot ?tttl
FE3:Ltcnd
0.rcOt0
Ol.rcO€ |
|I.rotl
mc|Ctitac
l. lgnvl
231256-6
Flgure6. llodc llcllnltlon Format
The modedefinitionsand possiblemodecombinations mayseemconfusingat first but after a cursory
reviewof the completedeviceoperationa simple,
logicall/O approachwill surface.The designof the
82C55Ahastakeninto accountthingssuchas atficientPCboardlayout,controlsignaldefinition
vs PC
layouland completefunctionafflexibilityto support
almostany peripheraldevicewith no extemallogic.
Such designrepresentsthe maximumuse of the
availablepins.
SlnglcBlt Set/ResstFsaturG
Anyof the €ightbits of PortC can be S€t or Reset
usinga singleOUTputinstruction.This leaturereducessoftwarerequirements
anControl-based
applications.
tcr.t$
l^,
!-..-..a-
?A1lr5
2312%-5
Figure5. BaslcModeDefinltionsand Bus
lnterface
WhenPortC is beingusedas stratus/control
for Port
A or B, thesebitscanbe set or resetby usingthe Bit
Set/Resetoperationjust as if theyweredataouput
ports.
3-128
82C55A
InterruptControfFuncilons
oiltDLmiD
When the 82C55Ais programmedto operatein
mode1 or mode2, controlsignalsare providedthat
can be usedas int€nuptrequestinputsto the CpU.
Theintem,rptrequ€stsignals,generatedfromport C,
can be inhibitedor enabledby settingor resetting
the associatedINTEflipflop, usingthe bit set/resei
functionof portC.
Thisfunctionallowsthe programmer
to disalowor
allowa specilicl/O deviceto intemlptthe CpUwithout atlectinganyotherdevicein the intenuptstructure.
INTEflip,flopdefinition:
212fi-7
(BIT-SFIF-|NTEis SET-tnterruprenable
(BIT-RESET)-INTE
is RESET-intem.rpt
disabte
Flgure7. Blt S€t/Rcret Format
Note:
All Mask flipftops are.automaticallyreset during
modeselectio4and deviceReset.
3-129
ifier
82C554
OpcratlngModcg
llode 0 (Barlc Input/Output).Thisfunctionalconfigurationprovidessimpleinput and outputopera.
tionslor eachof the threeports.No "handshaking"
is required,data is simplywrittento or readfroma
specifiedporl
Mode0 BasicFunctionalDefinitions:
o Two 8-bitportsandtwo 4-bitports.
o Anyportcan be inputor output.
o Outputsare latched.
o lnpirtsare not latched.
o 16 ditferentlnput/Outputcontigurations
are pos.
siblein this Mode.
trlODE0 (BASIClilPUr)
t-D
ntu?
E,ar.lo
oroo-
-
231256-8
rroDE0 (BAsrcouTPur)
231256-9
3-130
82C554
IIODE0 Port Deftntilon
A
B
GROUPA
Da
D3
D1
De
PORTA
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
0
0
1
1
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
0
1
1
1
1
1
1
1
1
0
0
0
1
1
1
1
0
1
1
1
0
0
0
0
0
0
0
1
1
0
1
1
1
1
0
0
0
1
1
PORTC
ruPPER)
*
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
0
1
2
3
4
5
6
7
I
I
INPUT
INPUT
INPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
11
12
13
0
INPUT
INPUT
INPUT
INPUT
INPUT
14
1
INPUT
INPUT
15
1
1
1
INPUT
INPUT
INPUT
GROUP
B
PORTC
PORTB
(LOWERI
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
OUTPUT
10
INPUT
INPUT
OUTPUT
OUTPUT
INPUT
INPUT
OUTPUT
OUTPUT
INPUT
INPUT
OUTPUT
OUTPUT
INPUT
INPUT
OUTPUT
IIODE 0 Conftguratone
qororo.ororDrOo
irDr\DrD!otoroo
ooir?iot rciD a
Dt
!L
Df
D!
O.
Dr Dr o.
O,
o,
Az
o,
or
oo
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
82C554
Input ControlSlgnalDcflnltlon
SF (Strolc Input). A "low" on this input loads
dataintoth€ inputlatch.
ooaftlot
tofro
Fi^
IBF (lnput Bullcr Full F/D
|lt^
A "high" on this ouput indicatesthat the data has
beenloadedintothe inputlatch;in ess€nce,an acIBF is set by SfE ing beinglow
knowledgement.
andis resetby the dsingedgeof the RD input.
txttr
l/o
INTR(lntcnupt Rcqucet)
A "high" on this outputcan be usedto intemtptthe
CPU when an input deviceis requestingservice.
INTRis set by the STB is a "on€", IBF is a "one"
andINTEis I "on€". lt is resetby thefallingedgeof
FE. mis procedureallows an input device to re.
quest servicefrom the CPU by simplystrobingits
dataintothe port
INTEA
Confdbd by bit sat/resetof PCa.
INTEB
Controlledby bit set/resetof PC2.
o, Dr Dt Do
fit
Ntr
rYt
.231256-13
Flgurc8. frODEI Input
231256-14
Flgure9. ilODE t (StrobcrlInput)
3-134
intef
82C55A
OutputControlSlgnelDcllnlilon
OlFr_(Outpur
Buftcr Fu[ F/fl. ThedEF ouFut witl
go "low" to indicatethat the,lipu has wrlttEndata
out to the sqgciliedpouh€ 6EF pfp wiil be ser by
m€ nstng€dg€ot the WR inputand reset!y tr-ffi
Inputbeinglow.
oil?mrFtD
f,tr
B^
A .,tow,,on this input
l-F_t|^9*ng!cdgc.Input).
Intormsthe 82C55Athatthe datafromportA or Fort
B hasbeenaccepted.ln ess€nc6,a responsefrom
tne peripheraldeviceindicatingthat it his received
the dataoutputby the cPU.
INTR(lntcrnrpt.Rcqucrt).A ,.high,'.onthis output
can uB usedto intenuptthe CpU when an output
transmittedbv ihe CpU.
9".flg" has acceptegldatra
INTRis s€t wh€nAffi is a ,.on€.',68F'isi ..one,,
and INTEis a "on€',.lt is resetby the fallingldgeof
wR.
txtt^
rDC r t|orttt
$%horDrOrDr%
I litt
tll
I
IIITE A
Controlledby bit set/resetof pC5.
IiITE B
controltedby bit set/r*€t of PC2.
23r256-15
Flguru10.ilODEt Oupur
2312fi-r6
Flgurcll.ltODE I (StrobcdOutput)
3-135
82C55A
Comblnatlongof lrlODEI
PortA andPortB cbnbe indMidually
definedas inputor outputin Mode1 to supporta widevarietyot strob€d
l/O applications.
tA?t\
fi.
|lf^
cilTlor,i'oio
oof{ttol
rG'
ilt^
rq
ffi^
rg
Itrl^
Er.r
lrb
iroto
rrrq
oa-F.
aa
rc-ra
tatr
tijte,
tffiir
iolTA-tt?toaeDnarrt
rot? I - t3?to|:D OU?rt?l
foi?^-tattoaEDoutrun
roiTl-lSTtoaEDrt?u?l
23r256-17
Flgure12.Comblnatlonrof I|ODE 1
Operatlngilodca
Output Operatlons
MODE 2 (Strobcd Bldtrectlonat Bug t/O).This
pro/idesa meansfor comfunctionalcontigurataon
municating
witha pedpheraldeviceor structureon a
single8-bit bus for both transmittingand receiving
data (bidirectional
bus l/O). "Handshaking"
signals
areprovidedto maintainproperbusflowdisciplinein
a similarmannerto MODE1. Intem.rptgeneration
and enable/disable
functionsare alsoavailable.
6'BFlOutput Bulfer Futt).The 6EF outputwiil 9o
"low" to indicatethat the CPUhaswrittendataout
to port A.
MODE2 BasicFunctionalDefinitions:
o Usedin GroupA only.
o One8-bit,bi-directional
busport(PortA) anda 5bit controlport (PortC).
o Bothinputsandoutputsare latched.
o The S-bitcontrolport (PortC) is usedfor control
and status for the 8-bit, bi-directional
bus port
(PortA).
BldirectionalBus l/O GontrolSlgnalDelinltion
INTR(lnterruptRequest).A highon thisoutputcan
be usedto interrupt
theCPUfor inputor outputoperations.
FGR(lctnowledge). A "low" on this inputenables
the ti-state outputbufferof Port A to send out the
data.Otherwise,
the outputbufferwill be in the high
impedance
state.
FIF I (Thc INTE Fttp.Ftop Areoctared wtrh
OBF).Controlledby bit set/resetof PC5.
Input Operatlons
SE lstroOe Input). A "low" on this input loads
dataintothe inputlatch.
IBF(lnputBufferFutlF/F).A "high"on thisoutput
indicatesthat data has been loadedinto the input
latch.
ryTE 2 flhe INTEFltp-FtopAssoctatedwtrh tBfl.
Controlledby bit set/resetof pC4.
3-136
82C554
IIODE0 Conflguretlons(Continued)
GO{?iOL rOrO aa
cil?tot
o,
ol
cor{riol roloa
caxttoL rolD,
roroat
o!
o.
o,
co||tmlroaoarc
o, o. o: o.
o,
I
o,
or
D!
o.
o!
ot
or
Do
Dr
l0
Oa
0
Or
o:
or
ot
I l0l0lr
O.
Ot
Or
oo
lo
Or
Do
82C55A
TODEO
(Continued)
oof,?rortoiotra
1&
q
o. or o, Dr oo
rlol0
llrl0lr
0
oot?rotmtortt
9S%Oeol02OrO!
Opcretlng todor
ilODE 1 (Strobcd Innrrl/Output).This tunctional
configuration
providesa meani for transfeningl/O
d.at?to or lrom a specifiedport in conjunctionwith
strobesor "handsheking"
signals.In m6Oe1, portA
and Port B use the linEson port C to generateor
acceptthese"handshaking,'
signals.
Mode1 BasicfunctionalDefinitions:
o Two Groups(GroupA and GroupB).
.
F?".hgroupcontainsone g-bitclataportand one
4-bit control/dataport.
.
q-bitdeta port can be eitherinputor ouput
Iq
EomInpus end outputsare latched.
.
Ih9 4.bit port is usedfor controland statusof the
8-bit data port.
3-133
82C55A
ooffltol
iroto
'frF^
tcra
l.lrut
O.OUtrur
tr-(^
,rott I
Irllttt
0. OUtrul
&'l^
,aF^
oiottlmE
0. rrOO:0
t. X,OE I
231256-1E
JN
Flgure13.MODEGontrotWord
231256-19
Flgurc14.ilODE2
oltln
carrotGaa
o^tAtH
tlrit|lti^L
roaacta
Gar
oatr rtil
tormHCrar
oatl Ftor
ocl.^ton
231256-20
Figure15.MODE2 (Btdtrecilonat)
NOTE:
til'dYi3F".H^+-TEF#rRf
i1#r-l-h-![t-*TAtff
lHrJ"'"HEispermissibre.
3-137
82C55A
MODE2 ANOMODEO III|PUTI
MOOE2 ANO MODEO IOUTPUTI
nTir
tcr
txtt^
tct
-i^
tcr
E^
t^rt\
ill^
EFe
oo{ttotrolo
D;DrQD.Or%Otllb
ili^
r,T,]rere@l
I
trc.
I
tcta d
I.ltttt
0.Outtt ?
llFa
tro
,cr
tQr
-trq
llr
lro
TD
tfr4q
tt
MOOE2 At{O ft 00E r louTPUTf
tct
MODE2 Ar{O MOOEI ltf{PuTl
.c'
iltl.
e4t\
tt\.tt
I lr
llo
,ca
ff^
rq
o-t
tcr
Fr^
rq
E^
fr.
fc.
-i^
tcr
|lt^
lfe
rqrq
5--r.
,,C,
t?t
lc-tt
io
tcr
lDr
txttr
rn
rc
tfttr
Figure16.llODEtl Combinatlons
82C55A
lrlODE0
IN
OUT
PAo
PAr
PAz
PAs
P&
PAs
PA6
PAt
1N
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
PBo
PBr
PBz
PBe
PBI
PBs
PBe
PBt
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
1N
IN
IN
IN
IN
IN
IN
IN
PQ
PCr
PCz
PCg
PCt
PCs
Pc6
PGz
IN
IN
IN
IN
IN
IN
IN
IN
OUT
ouT
ouT
OUT
OUT
OUT
OUT
OUT
OUT
MODEO
OR MODE1
ONLY
INTRg INTRs
lBFs oEFB
ato
vo
t/o
sfFs Affis
INTRa INTRa
INTRa
STEA vo
lBFl
t/o
vo
sfBl
lto
A'fKA
6'6-14
SpcclalModc ComblnailonConglderailone
Thereare severalcombinations
of modespossible.
Foranycombination,
someor all of the port C lines
are usedfor controlor status.Theremaining
bitsare
eitherinputsor outputsas definedby a .,SJtMode"
command.
Duringa readof Port C, the state of all the port C
lines,exceptthe Affi andSffi tinas,wiil be placed
on the data bus. In ptaceof the AeR and SiE tine
states,tlagstatuswill appearon the databusin the
PCz, PC4,and PC6 bit positionsas illustratedby
Figure18.
Througha "WritePortC" command,onlythe port C
prnsprogrammed
as outputsin a Mode0 groupcan
be written.No otherpinscanbe attectedby a .,Write
PortC" command,
norcantheintenuptenableflags
be accessed.To write to any Port C output programmedas an outputin a Mode 1 groupor to
lBF6
FfKA
6ts-Fa
changean intenuptenableflag,the ,,Set/Resetport
C Bit" commandmustbe used.
Witha "Set/ResetPortC Bit',command,anyportC
line glgg,rammed
as an output(inctuding|NTR,tBF
and OBF)can be written,or an intenupienableflag
can be eitherset or r€€et.port C linesprogrammed
as inputs,inctudingAffi and SiE linei, ajsociated
withPortC are not att€ctedby a ,.Set/Resetport G
Bit" command.Writingto the conesponding
port C
bit positionsof the Affi and SfB'lines iitn me
"Set/Reset Port C Bit" commandwill atfect the
GroupAandGroupB intem.lpt
enableflags,as illustratedin Figure18.
CurrentDrlve Capablllty
Anyoutputon PortA, B or C can sinkor source2.5
mA.Thisfeatureallowsthe g2C55Ato direcilydrive
Darlingtontype driversand high-voltagedisplays
that requiresuchsinkor sourcecunent.
3-139
82C55A
II{PUTCOI{FIGURATION
D5
D2
Da
D3
D1
RcadlngPorl C Status
ln Mode0, PortC transfersdatato or fromthe peripheraldevice.
Whenthe 82C55Ais programmed
to
functionin Modes1 or 2, Port C gen€rat€sor accepts"hand-shaking"
signalswiththe peripheral
device.Readingthe contentsof PortC allowsthe programmerto t€sl or verifyth€ "status"of each pedpheraldeviceand changethe programflow accordingly.
Thereis no specialinstruction
to readthe statusinformationlrom Port C. A normalreadoperationof
PortC is executedto o€rformthis function.
Dz D5
vo vo
lBFl INTEI INTRI INTEslBFs INTRs
GROUPA
D7
Ds
GROUPB
OUTPUTCONFIGURATIONS
D6 D5 Da D3
D2
D1
GROUPA
D6
GROUPB
Flgure17a.MODEI StatusWord Format
Dz
D5
D5
D1
D3
D2
D1
De
GROUPA
GROUPB
(Dofin€dByMode0 or Mod€1 Sotoction)
Flgure17b.MODE2 StatusWord Format
Intcrrupt EnablsFlao
Posltlon
AltcrnatePort C PlnSlsnal(Mode)
INTEB
PC2
Affia (OutrutMode1)orSTBs(lnputMode1)
INTEA2
PU
Si-AAfinputMode1 or Mod€2)
INTEA1
PC6
ffir (Output
Mode1 or Mode2
Flgurc 18.Intcrrupt EnablcFlagsIn llodes 1 and 2
3-140
82C55A
ABSOLUTEMAXIMUMRATINGS'
AmbientTemperature
UnderBias.. . .0.Cto + 7O.C
StorageTemperature ... - 65.Cto + 1SOC
SupplyVoltage
O.Sto + 8.OV
OperatingVoltage
.....+ 4vto + 7V
Voltageon anyInput..
. .GND-2Vto + 6.5V
VoltageonanyOutput. .GND-O.SV
to Vg6 + O.sV
PowerDissipation
1 Watt
'Notice: Stressasabove those listed
under ,Absolute MaximumRatings"may ceusapermanentdamage to the davice. Thisis a stressrating only and
functionaloperetionof the device at theseor any
otherconditionsabovethoseindicatedin the aperationalsectionsof thisspecificationis not implied.Exposure to absolutemascimum
nting conditionsfor
extendedperiodsmayaflect devicereliability.
D.C. CHARACTERISTICS
Ta : OC to 7OC,Vg6 : *5V t1ooh,GND= 0V (In : -40oC to *85'C for ExtendedTemperture)
Symbol
Paramcter
Mln
Mar
Unlts
TeatCondltlons
vr
-0.5
InputLowVoltage
0.8
V
vrx
InputHighVoltage
2.0
Vcc
v
vot
OutputLowVoltage
0.4
V
16g= 2.5 mA
Von
OutrutHighVoltage
It
InputLeakageCunent
t1
pA
lorl
OutputFloatLeakageCunent
r10
pA
V1p: V66 to 0V
(Note 2)
loen
Darlington
DdveCunent
12.5
(Note4)
MA
PortsA, B, C
Rel = 500O
Vs1 - 1.7V
lpxt
PortHoldLowLeakageCunent
+50
+300
pA
Vggrl = 1.0V
Port A only
lpnx
PortHoldHighLeakageCunent
-50
-300
pA
VguI : 3.0V
PortsA, B, C
lpxuo
-350
pA
Vggry: 0.8V
lpxxo
PortHoldLowOverdriveCunent
PortHoldHighOverdrive
Cunent
+350
pA
166
V6gSupplyCunent
10
mA
lccsg
V6gSupplyCunent-standby
10
1rA
Vggry= 3.0V
(Nore3)
VCC= 5.5V
Vtru: VCCor GND
PortConditions
It llP : Open/High
OIP : OpenOnly
WithDataBus :
High/Low
6 : High
Reset= Low
PureInputs:
Low/High
3.0
Vsc - 0.4
NOTES:
1. Pins41, Ao,G, WFi,FlD,Reset
.-.---_*_.Z,ga1q nu$.portF.B.€._._
3. Outputsopen.
4. Limiloutputcun€ntto 4.0mA.
3.141
V
V
196 - -2.5 mA
: -100pA
1911
Vlx - Vg6 to 0V
(Note1)
intef
82C55A
CAPACITANCE
TA = 25oC'Vg6 :GND : 0V
plns
Unmeasured
retumedto GND
fc : 1 MHz(s)
NOTE:
5. Sampladnot 100c6t€st€d.
A.C. CHARACTERISTICS
TA - 0oto 70"C,VCC: +5V t10o/o,GND = 0V
TR : -4eC to +85'G for ExtendedTemperature
BUS PARAMETERS
READ CYCLE
Symbol
82C55A.2
Prrtmctcr
llln
trR
tnl
AddressStableBeforeFE J,
AddressHoldTimeAtterffi t
tRn
FDPutseWiAn
tno
DataDetayfromHDJ
tor
ffi?
tnv
ter
0
0
150
120
to DataFtoating
RecoveryTimebetweenHDTWF
10
75
200
Unltt
Tcrt
Gondltlonr
ns
ns
ns
ns
ns
ns
WBITECYCLE
Symbol
82C55A.2
Peremctcr
tln
ter
Unltr
Tcrt
Condltlont
twe
AddressStableBeforeWR J
AddressHoldTimeAtterWH'1
tunnrt
WFIPulseWidth
100
ns
ns
ns
ns
tow
two
DataSetupTimeBeforeWFif
DataHoldTimeAtterWFT
100
n8
30
ns
PortsA & B
30
ns
PortC
tlw
0
20
20
3-142
PortsA & B
PortC
82Cs5A
Symbol
82C55A-2
Perrmctcr
illn
lwg
WFi= ltoOutput
tn
Peripheral
DataBeforeFiE
PedpheralDataAtterFD
txn
tnx
100
tpx
STEPubewidth
Per.DataBetoreS1Exigrl
Per.DataAtrerSTEHigrr
tlo
Fffi = 0toOuput
txo
RX : 1 to Ouput Float
twog
WFi=ltoOBF:O
ffi = gtoOEF: 1
teoa
tgg
tRrg
tnr
lsr
ter
twr
tRes
ns
ns
ns
ns
ns
ns
ns
175
ns
250
0
200
tps
350
0
ImPuts€Width
lst
llrr
20
50
20
Unlts
Condltlont
SIB - OtoIBF= 1
H.D=ltolBF-0
150
ns
ns
ns
ns
ns
FD:Oto|NTR=0
200
ns
STB=lto|NTR-1
150
Iffi:ltotNTR:l
150
WFI:Oto|NTR:0
200
ns
ns
ns
ns
ResetPulseWidth
150
150
150
500
Teet
seenote1
seenole2
]IOTE:
1. !,lTR1 mayoccuras earfyas WH.t.
of initialResstPulseafter porveron ,nustb€ et l€ast50 psec. subeequent
Res€tputsesmay b€ 500 ns
fi'|#ffi.t'tn
3-143
82C55A
z3l256-?j2
IroDE o (BASTC
OUTPUT)
zt1ffi-23
3-1/14
82C55A
WAVEFORiTS(Continued)
ropE 1 (STROBED
tltPur)
f,D
H:L'.lll--z31256.24
roDE I (STROBEDOU?PUT)
m
C'
ttt
E
q,nil.n
231zfi-25
82C55A
WAVEFORMS(continued)
iloDE 2 (BTDTRECTTONAL)
ot?A ttoll
nrottts
oltattq
rttriattat
?o t|tt
Dl?r Ftox
||ta ?o rtl|'|ratat
DATA
t2t5TOb
llot :
Anlseguence!t9r, wElgcurs betoreAGRAND_STE
occtrs beforeFiDis permissible.
(lNTFl= IBFo FIAIIR. SltTi. HD + OEF. fitASRo flffi o m
WR]TETITING
READTIIIING
z31zfi-28
A.C. TESTINGINPUT,OUTPUTWAVEFORTI
A.C.TESTINGLOADCIRCUIT
231256-29
A.C. Tcrting InputsA?eD?ivenAt 2.1V Fot A Logic I And 0..15V
For A Logic 0 liming lree*nemcnts Are Mad€ At 2.0V For A
Loeic 1 And 0.8 For A Logic 0.
Testing;::tll::""
lvgxl'tsSotAtv.riqrsro,,lt. Dwing
The Specilicetlrn.CL lncludesJig C.pacitance.
3-146
APPENDIX D
CONFIGURINGTHE ADAs2OFOR SIGNAL*MATH
D-2
TO BE COMPETED
D4
APPENDIX E
CONFIGURINGTHE ADAs2OFOR ATLANTIS
If you havepurchased
ATLANTIS dataacquisitionandreal time monitoringapplicarionsoftwarefor your
ADA520,pleasenotethat theATLANTIS driversfor your boardmustbe loadedfrom your ATLANTIS driverdisk
into thesamedirectoryas theATLANTIS.EXEprogram.WhenrunningATLANTIS, you mustchangesomeof tle
ADA520'son-boardjumpersfrom theirfacory-setpositions.You shouldalsobe awareof how ATLANTIS
operat€swith theADA520 andtheTS16thermocouple
board.The specialconsiderations
for usingthe ADA520
with ATLANTIS aregivenat theendof this appendix.
BeforeusingATLANTIS on theADA520board,checkthefollowing switchandjumpers:
. Sl - Baseaddress
. P5- 8254timer/counter
I/O configr:rarion
. P9- Interrups
FigureE-l showstheboardlayout.
EU?r6-E
Tffiffiffi""FH
:ffiBw"Hhffi"ffi---/dL
9:!t9999 Eg
"
PE-g-e-ooooooo
6GP#
'lolYo
!l
|
-
oooooooooooo
al"[1.1il
li8l-"-lL
ffiffi"H;*ffiW#8ffi88H
laoHf**r
Ed
l@([ttd6666d.r6\-
@s**J:
*H---rffi*s
€lE6EE65c6EGjr
ol
ol
oll '{ o
E o_o.o: o
: :o9o ?
o o: o
?o: o: ?
lolollo o
l o lS
q sl l o
Eb@t
ol
ol
lolol e{ooit'E
lo6l ilool*.
rs@Efl
tl
lgH,,h"" rlol-s ' 'D o o o o o o o o o
El
Rg
FI
16[,-0oooooooooog- EU
3l lsEl
1E$*-ffi
-@eEil:183ru
O#@.Ffl
lelffi:B:*
lrj#
Fig.E-1- ADA520
BoardLayout
Sf - BaseAddress
ATLANTIS assumes
thatthe baseaddressof yourADA520 is ttrefactoryserringof 300 hex (seeChapterl). If
you changedthis setting,you must run the ATINST programandresetthebaseaddress.
NOTE: The ATINST prognm requiresthebaseaddressto be enteredin decimalnotation.
P5 - 8254Timer/CounterVO Configuration
The 8254must,be configuredwith thethreejumpersplacedbetweenthepinsasshownin FigureE-2. This
configurationis thesameasthefactorysetting.After settingfte jumpers,verify thateachis in theproperlocation.
Any remainingjumpersmustbe removedfrom theP5 headerconnector.
E-3
P5
o
Y
O
XTAL
EXTCLKO
OUTO
Y
XTAL
a
EXTCLKl
IH
OUTl
6|
Y
o
XTAL
EXTCLK2
Fig.E-2- 8254Timer/Counter
Jumpers,
P5
ClockSource
P9 - Interrupts
To selectan IRQ channelandan interruptsource,you mustinstalltwo jumperson this headerconnector.To
configurethis headerfor ATLANTIS, placeonejumperacrossthepinsof your desiredIRQ channel,andplacethe
secondjumperacrossthepinslabeledOUT2.Makecertainthatthereareno otherjumperson this connector.Also,
makesurethatthe IRQ channelyou haveselectedis not.usedby any otherdevicein your system.FigureE-3 shows
you how to configureP9 for IRQ channel3.
P9
o?aooaooo?o
olooooooolo
TIIIIT=
oooooo=
NO566{O
z
EgqH
JN
Fig.E-3- Interrupts
andInterrupt
P9
ChannelJumpers,
E-4
SpecialConsiderations
for ATLANTIS and the ADA520
WhenusingATLANTIS with theADA520,you mustbe awareof somespecialconsiderations
for successful
operation.
SamplingRate. First, themaximumsamplingrateis about7.5I1z-.SinceATLANTIS samplesfrom alt 8
channelsin succession,
themaximumsamplingrateper channelis just underI IIz.
ForegroundSampling. Foregroundsamplingis not supported
by theADA520.Foregroundsamplingis
omitted becauseir is not neededon this low speedboard.
BackgroundSampling. Thebackgroundsamplingrat€mustbe setto 100tlz.
ATLANTIS, the ADA520,and the T516 ThermocoupleBoard
The TS16 temperaturesensorboardcan be usedwith the ADA520 and ATLAI.ITIS througha specialseriesof
drivers.Thesedriversdirectly control theTS16andconvertthe voltagedevelopedby the thermocoupleto a temperaturebeforepassingthe convertedvalue to ATLANTIS. The driverscarry a precalculatedlookup able that
con[ainsall thetemperatures
for eachpossiblevoltagegenerated
by rheTS16.This precalculation
freestheapplication softwarefrom performinga fifth orderpolynomialcalculationfor eachdatapoint.
Thetemperature
valuespassedto ATLANTIS mustbe scaledby a facor of 10.This is doneby changingthe
defaultcalibrationsettingfor the highvalueto l0 for eachthermocouple
channel.All otherdefaultsettingsremain
unchanged.
Five driversareavailableto providefrom 0 to 8 thermocouple
inputchannelson an ADA520 board.This
allowssupportof boththermocouple
andnon-thermocouple
channelsby a singleboard-Thedriversare:
AD520
AD520J
ADA520J2
ADA520J4
ADA520J8
ADA520 driveronly; no rlermocouplechannels
ADA520 driverwith supportfor I thermocouple
channel(channell)
ADA520 driverwith supportfor 2 thermocouple
channels(channelsI & 2)
ADA520 driverwith supportfor4 thermocouple
channels(channelsI through4)
ADA520 driverwith supportfor 8 thermocouple
channels(channelsI through8)
Oneof thesedriversis includedon your ATLANTIS driver disk. Other driverscanbe purchasedfrom the
facory. Thermocouple
driversassignthethermocouple
channelsto thelowestchannels,while ttrenon-thermocouple
channelsusethe standardassignments.
For example,whenusingtheADA52OI4driver,eventhoughall of the
thermocouple
channelsenterthe ADA520on channell, ATLAIITIS will displaythethermocouple
channelsas
I
channels through4 andthe non-thermocouple
channelsaschannels5 through8.
E-5
E-6
APPENDIX F
WARRANTY
F-l
F-2
LIMITED WARRANTY
Real Time Devices,Inc. warrantsthe hardwareandsoftwareproductsit manufacturesandproducesto be free
from defectsin materialsand workmanshipfor oneyearfollowing the dateof shipmentfrom REAL TIME DEVICES. This wananty is limited to the original purchaserof productand is not ransferable.
During the one yearwarrantyperiod,REAL TIME DEVICES will repair or replace,at its option, any defective
producs or partsat no additionalcharge,providedthat the productis returned,shippingprepaid,to REAL
TIME
DEVICES. All replacedpars and productsbecomethepropertyof REAL nrrc pivideS. nefore returning
any
product for repair, customersare required to contactthe factory for an RMA number.
THIS LIMITED WARRANTY DOESNOT EXTEND TO AI.IY PRODUCTSWHICH HAVE BEEN DAMAGED AS A RESLILTOF ACCIDENT,MISUSE,ABUSE(suchas:useof incorrectinpurvolrages,improper
or
insufficient ventilation,failure to follow the operatinginstructionsthat areprovidedUyneaf nt"C OgVti:gS,
"actsof God" or othercontingencies
beyondrhecontrolof REAL TIME DLVICES),bR As A REsuLT OF
SERVICEOR MODIFICATIONBY AT.IYONEOTFIERTHANREAL TIME DEVICES.EXCEPTAS EX.
PRESSLYSETFORTHABOVE, NO OTHERWARMNTIES ARE E)GRESSEDOR IMPLIED, INCLUDING,
BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESSFOR
A
PARTICULAR PURrcSE, AND REAL TIME DEVICESE)PRESSLY DISCLAIMS ALL WARRANTIES
NOT
STATED HEREIN. ALL IMPLIED WARRANTIES,INCLUDING IMPLIED WARRANTIES FOR
MECHANTABILITY AND FITNESSFOR A PARNCULAR PURPOSE,ARE LIMITED TO TIIE DURATION
OF THIS WARRANTY. IN THE EVENT T}IE PRODUCTIS NOT FREEFROM DEFECTSAS WARRANITED
ABOVE, THE PURCHASER'SSOLEREMEDY SHALL BE REPAIR OR REPLACEMENTAS PROVIDED
ABOVE. UNDER NO CIRCUMSTANCESWILL REAL TIME DEVICES BE LIABLE TO THE PURCHASER
oR Ai'IY USER FOR AiIY DAMAGES,INCLUDING AtIy INCIDENTAL OR CONSEQUENTIAL
DAMAGES,EXPENSES,LOST PROFITS,LOST SAVINGS,OR OTHERDAMAGES ARISINGOUT
OF THE USE
OR INABILITY TO USETHE PRODUCT.
SOME STATESDO NOT ALLOW THE EXCLUSION OR LIMITAfiON OF INCIDENTAL OR
CONSEQI.JEI\TNALDAMAGES FOR CONSUMERPRODUCTS,AND soME sTATEs Do NoT ALLow LIMITA.
TIONS ON HOW LONG AN IMPLIED WARRANTY LASTS, SO THE ABOVE LIMITATIONS
OR EXCLUSIONSMAYNOTAPPLY TO YOU.
THIS WARRANTY GIVES YOU SPECIFICLEGAL RIG}ITS,AND YOU MAY ALSO HAVE
OTHER
RIGIITS WHICH VARY FROM STATETO STATE.
ADA520Board User-SelectedSettings
Basel/OAddress:
(decimal)
(hex)
InterruptSource& Channel:
lnterrupt
Source
IRQChannel#