Download TDA5150 Data Sheet

TDA5150
TDA5150 Functional Description
ADDR 0x06
CLKOUTCFG - Clock Pre- and Post-scaler
Bit 7
Bit 6
CLKSRC
CLKSRC
w/0
w/0
Bit 5
Bit 4
AFTERSCALE AFTERSCALE
w/0
Bit 3
Bit 2
Bit 1
Bit 0
PRESCALE
PRESCALE
PRESCALE
CLKOUTENA
w/1
w/0
w/0
w/1
w/0
Bit <7:6> CLKSRC
Clock source selection bit <1:0>
Bit <5:4> AFTERSCALE
Post scaler selection bit <1:0>
Bit <3:1> PRESCALE
Pre scaler selection bit <2:0>
Bit 0
CLKOUTENA
CLKSRC
Clock output selection (2-bits)
00:
prescaler
clock
AFTERSCALE
01:
BDRDIV
counter
clock
10:
inverted
BDRDIV
counter
clock
11:
afterscaler
clock
Post-scaler clock divider selection (2 bits)
00:
divide by 1
PRESCALE
Enable clock output
01:
divide by 2
10:
divide by 4
11:
divide by 8
Pre-scaler clock divider selection (3-bits)
000:
divide by 1
001:
divide by 2
010:
divide by 4
011:
divide by 8
100:
101:
110:
111:
divide by 16 divide by 32 divide by 64 divide by
128
CLKOUTENA
Clock output enable
0: disable, instead of clock, the Crystal
Oscillator stable signal causes a rising
edge on CLKOUT
1: enabled
Enabled also automatically, when default clocking (fSYS/16) is used, when the SDI
input is low at the rising edge of the EN after power up
Data Sheet
69
V 1.1, June 2012