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Download how to use ddr sdram um - Electrical and Computer Engineering
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CHAPTER 9 DATA STROBE SIGNAL (DQS) CONTROL OPERATION Figure 9-6. Timing of Data Strobe Signal Read Preamble and Read Postamble 1 BL = 4 T0 T1 T2 T3 T4 T5 /CK CK Command READ tRPRE tRPST CL = 2 Hi-Z DQS Read preamble Read postamble DQ Q0 Q1 Q2 Q3 tRPRE CL = 2.5 tRPST Hi-Z DQS Read postamble Read preamble DQ Remark Q0 Q1 Q2 Q3 CL: /CAS latency, BL: Burst length Figure 9-7. Timing of Data Strobe Signal Read Preamble and Read Postamble 2 (Read-to-Read Data Bus transition) CL = 2, BL = 4 T0 T1 T2 T4 T3 T5 T6 /CK CK Command READ a READ b tRPRE tRPST Hi-Z DQS Read preamble Read postamble Qa0 DQ Remark Qa1 Qa2 Qa3 Qb0 Qb1 Qb2 Qb3 CL: /CAS latency, BL: Burst length User’s Manual E0234E30 (Ver.3.0) 71
