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PISO-P32C32 Series PISO-P32A32 Series PISO-P32S32WU PISO-P64/C64/A64 Series User Manual Version 4.4 Aug. 2012 Warranty All products manufactured by ICP DAS are warranted against defective materials for a period of one year from the date of delivery to the original purchaser. Warning ICP DAS assumes no liability for damages consequent to the use of this product. ICP DAS reserves the right to change this manual at any time without notice. The information furnished by ICP DAS is believed to be accurate and reliable. However, no responsibility is assumed by ICP DAS for its use, nor for any infringements of patents or other rights of third parties resulting from its use. Copyright Copyright © 2012 by ICP DAS. All rights are reserved. Trademark Names are used for identification only and may be registered trademarks of their respective companies. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 1 Tables of Contents 1. INTRODUCTION....................................................................................................................................... 4 1.1 SPECIFICATIONS ..................................................................................................................................... 5 1.1.1 PISO-P32S32WU ......................................................................................................................... 5 1.1.2 PISO-P32A32/P32A32-5V ........................................................................................................ 6 1.1.3 PISO-P32C32/P32C32U/P32C32U-5V ........................................................................................... 7 1.1.4 PISO-C64/C64U ......................................................................................................................... 8 1.1.5 PISO-P64/P64U .......................................................................................................................... 8 1.1.6 PISO-A64 ...................................................................................................................................... 9 1.2 ORDER DESCRIPTION ............................................................................................................................. 9 1.2.1 Options ........................................................................................................................................... 10 1.3 PCI DATA ACQUISITION FAMILY ......................................................................................................... 10 1.4 PRODUCT CHECK LIST .......................................................................................................................... 11 2. HARDWARE CONFIGURATION ................................................................................................... 12 2.1 BOARD LAYOUT ..................................................................................................................................... 12 2.2 ISOLATED D/I ARCHITECTURE............................................................................................................. 19 2.3 ISOLATED D/O ARCHITECTURE ........................................................................................................... 21 2.4 DAUGHTER BOARDS .............................................................................................................................. 24 2.4.1 DB-37 ............................................................................................................................................. 24 2.5 PIN ASSIGNMENT .................................................................................................................................. 25 2.5.1 PISO-P32C32/P32C32U(-5V)/P32A32(-5V) ................................................................................. 25 2.5.2 PISO-P32S32WU ...................................................................................................................... 26 3. 2.5.3 PISO-P64/P64U ....................................................................................................................... 27 2.5.3 PISO-C64/C64U/A64 ............................................................................................................ 28 I/O CONTROL REGISTER ................................................................................................................ 29 3.1 HOW TO FIND THE I/O ADDRESS ....................................................................................................... 29 3.1.1 PIO_DriverInit .......................................................................................................................... 31 3.1.2 PIO_GetConfigAddressSpace............................................................................................... 34 3.1.3 Show_PIO_PISO ..................................................................................................................... 37 3.2 THE ASSIGNMENT OF I/O ADDRESS ................................................................................................... 38 3.3 ENABLING I/O OPERATION .................................................................................................................. 40 3.4 THE I/O ADDRESS MAP ....................................................................................................................... 40 3.4.1 PISO-P32C32/P32C32U(-5V)/P32S32WU/ P32A32(-5V) I/O Mapping.......................................... 41 3.4.2 PISO-P64/P64U I/O Mapping............................................................................................. 43 3.4.3 PISO-C64/C64U/A64 I/O Mapping ................................................................................................. 44 PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 2 3.4.4 RESET\ Control Register ...................................................................................................... 46 3.4.5 AUX Control Register ............................................................................................................ 46 3.4.6 AUX Data Register ................................................................................................................ 47 3.4.7 INT Mask Control Register .................................................................................................. 47 3.4.8 AUX Status Register .............................................................................................................. 47 4. THE APPLICATIONS OF DIGITAL I/O ......................................................................................... 48 4.1 PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V) ................................................. 48 4.2 THE EXAMPLE OF PISO-P64(U) ....................................................................................................... 54 4.3 THE EXAMPLE OF PISO-C64(U)/A64............................................................................................... 57 5. SOFTWARE INSTALLATION ............................................................................................................. 62 5.1 SOFTWARE INSTALLING PROCEDURE ................................................................................................... 62 5.2 PNP DRIVER INSTALLATION ................................................................................................................. 63 5.3 CONFIRM THE SUCCESSFUL INSTALLATION......................................................................................... 64 6. DEMO PROGRAM ............................................................................................................................. 65 6.1 PROGRAM FILE LIST .............................................................................................................................. 65 6.1.1 PISO-P32C32/P32C32U(-5V)/P32S32WU/P32A32(-5V) ................................................................ 65 6.1.2 PISO-P64(U) ............................................................................................................................... 68 6.1.3 PISO-C64(U) ............................................................................................................................... 70 6.2 DIAGNOSTIC PROGRAM ........................................................................................................................ 72 6.2.1 Diagnostic program for DOS ........................................................................................................... 72 6.2.2 Diagnostic program for WINDOWS ................................................................................................ 73 6.3 DEMO PROGRAM FOR PISO-P32C32/ P32C32U(-5V)/P32S32WU/P32A32(-5V) ............ 74 6.3.1 DEMO1 for PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V) ............................................ 74 6.3.2 DEMO2 for PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V) ............................................ 76 6.3.3 DEMO3 for PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V) ............................................ 78 6.4 DEMO PROGRAM FOR PISO-P64(U) ................................................................................................. 80 6.5 DEMO PROGRAM FOR PISO-C64(U)/A64 ....................................................................................... 82 7. DIAGNOSTIC PROCEDURES .......................................................................................................... 84 7.1 PISO-P64(U)...................................................................................................................................... 84 7.2 PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V) ................................................. 85 7.3 PISO-C64(U)/A64............................................................................................................................ 86 PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 3 1. Introduction The PISO-P32C32/P32S32WU series consists of 32 channels of isolated DI & 32 channels of isolated DO (Current Sinking). The PISO-P32A32 series consists of 32 channels of isolated DI & 32 channels of isolated DO (Current Sourcing). The PISOP64 series consists of 64 channels of isolated DI. The PISO-C64 series consists of 64 channels of isolated DO (Current Sinking). The PISO-A64 consists of 64 channels of isolated DO (Current Sourcing). The DI specifications of PISOP32C32/P32S32WU, PISO-P64 & PISO-P32A32 are the same. Comparison Table D/O channels PCI Bus D/I channels Low Drive High Drive Type PISO-P32S32WU Universal PCI 32 24 8 Current Sink, NPN PISO-P32C32U-5V Universal PCI 32 32 - Current Sink, NPN PISO-P32C32U Universal PCI 32 32 - Current Sink, NPN PISO-P32A32U Universal PCI 32 32 - Current Source, PNP PISO-P32C32 5 V PCI 32 32 - Current Sink, NPN PISO-P32A32 5 V PCI 32 32 - Current Source, PNP PISO-P32A32-5V 5 V PCI 32 32 - Current Source, PNP PISO-P64 5 V PCI 64 - - - PISO-P64U Universal PCI 64 - - - PISO-C64 5 V PCI - 64 - Current Sink, NPN PISO-C64U Universal PCI - 64 - Current Sink, NPN PISO-A64 5 V PCI - 64 - Current Source, PNP Model Name PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 4 1.1 Specifications 1.1.1 PISO-P32S32WU Model Name PISO-P32S32WU Digital Input Isolation Voltage Channels Compatibility Input Voltage 3750 Vrms (Using external power) 32 Photo coupler isolated Logic 0: DC 0 ~ 1 V Logic 1: DC 9 ~ 24 V Input Impedance 3 KΩ, 0.5 W Response Speed 4 kHz (Typical) Digital Output Isolation Voltage Channels Compatibility 3750 Vrms (Using external power) 32 Sink, Open Collector 500 mA for one high driving channel @ 100% duty 500 mA for all high driving channels @ 100% duty Output Capability (The GND pins all must be connected with GND of External Power) 100 mA for one low driving channel @ 100% duty 100 mA for all low driving channels @ 100% duty (The GND pins all must be connected with GND of External Power) Response Speed 4 kHz (Typical) General Bus Type 3.3 V / 5 V Universal PCI, 32-bit, 33 MHz Data Bus 8-bit Card ID I/O Connector Dimensions (L x W x D) Power Consumption Operating Temperature Storage Temperature Humidity Yes(4-bit) for version1.5 or above Female DB37 x 1 40-pin box header x 1 180 mm x 105 mm x 22 mm 600 mA @ +5 V 0 ~ 60 °C -20 ~ 70 °C 5 ~ 85% RH, non-condensing PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 5 1.1.2 PISO-P32A32/P32A32-5V/P32A32U Model Name PISO-P32A32U PISO-P32A32 PISO-P32A32-5V Digital Input Isolation Voltage 3750 Vrms (Using external power) Channels 32 Compatibility Input Voltage Photo coupler isolated Logic 0: 0~1 V Logic 0: 0~1 V Logic 1: 9 ~ 24 V Logic 1: 5 ~ 12 V (Logic 1: Min. 7 V; Max. 30 V) (Logic 1: Min. 3.5 V; Max. 16 V) D/I Power Input Impedance External - Internal/External 3 KΩ, 0.5 W Response Speed - 4 kHz (Typical) Digital Output Isolation Voltage 3750 Vrms Channels 32 Compatibility Source, Open Collector Output Capability 100 mA/+30 V for one channel @ 100% duty Response Speed 4 kHz (Typical) General Bus Type 3.3 V/5 V Universal PCI, 32-bit, 33 MHz Data Bus Card ID I/O Connector Dimensions (L x W x D) Power Consumption Operating Temperature Storage Temperature Humidity 5 V PCI, 32-bit, 33 MHz 8-bit Yes (4-bit) No Female DB37 x 1 / 40-pin box header x 1 180 mm x 105 mm x 22 mm 600 mA @ +5 V 0 ~ 60 °C -20 ~ 70 °C 5 ~ 85% RH, non-condensing PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 6 1.1.3 PISO-P32C32/P32C32U/P32C32U-5V Model Name PISO-P32C32 PISO-P32C32U PISO-P32C32U-5V Digital Input Isolation Voltage 3750 Vrms (Using external power) Channels Compatibility 32 Sink or Source, Photo coupler isolated channel with common power or ground Logic 0: 0 ~ 1 V Logic 0: 0 ~ 1 V Logic 1: 9 ~ 24 V Logic 1: 5 ~ 12 V (Logic 1: Min. 7 V; Max. 30 V) (Logic 1: Min. 3.5 V; Max. 16 V) Input Voltage Input Impedance Response Speed - 3 KΩ, 0.5 W - 4 kHz (Typical) Digital Output Isolation Voltage 3750 Vrms Channels 32 Compatibility Sink, Open Collector Output Capability 100 mA/+30 V for one channel @ 100% duty Response Speed 4 kHz (Typical) General Bus Type 5 V PCI, 32-bit, 33 MHz Data Bus Card ID I/O Connector Dimensions (L x W x D) Power Consumption Operating Temperature Storage Temperature Humidity 3.3 V / 5 V Universal PCI, 32-bit, 33 MHz 8-bit No Yes(4-bit) for version 1.1 or above Female DB37 x 1 / 40-pin box header x 1 180 mm x 105 mm x 22 mm 600 mA @ +5 V 0 ~ 60 °C -20 ~ 70 °C 5 ~ 85% RH, non-condensing PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 7 1.1.4 PISO-C64/C64U Model Name Digital Output Isolation Voltage Channels Compatibility Output Capability Response Speed General PISO-C64U 3750 Vrms 64 Sink, Open Collector 100 mA/+30 V for one channel @ 60% duty 4 kHz (Typical) 5 V PCI, 32-bit, 33 MHz 3.3 V / 5 V Universal PCI, 32-bit, 33 MHz Bus Type Data Bus Card ID 8-bit Yes (4-bit) No Female DB37 x 1 40-pin box header x 1 180 mm x 105 mm x 22 mm 800 mA @ +5 V 0 ~ 60 °C -20 ~ 70 °C 5 ~ 85% RH, non-condensing I/O Connector Dimensions (L x W x D) Power Consumption Operating Temperature Storage Temperature Humidity 1.1.5 PISO-C64 PISO-P64/P64U Model Name Digital Input Isolation Voltage Channels Compatibility Input Voltage Input Impedance Response Speed General Bus Type Data Bus Card ID I/O Connector Dimensions (L x W x D) Power Consumption Operating Temperature Storage Temperature Humidity PISO-P64U PISO-P64 3750 Vrms (Using external power) 64 Photo coupler isolated Logic 0: 0 ~ 1 V Logic 1: 5 ~ 24 V 1.2 KΩ, 1 W 4 kHz (Typical) 3.3 V / 5 V Universal PCI, 32-bit, 33 MHz 5 V PCI, 32-bit, 33 MHz 8-bit Yes (4-bit) No Female DB37 x 1 40-pin box header x 1 180 mm x 105 mm x 22 mm 400 mA @ +5 V 0 ~ 60 °C -20 ~ 70 °C 5 ~ 85% RH, non-condensing PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 8 1.1.6 PISO-A64 Model Name Digital Output Isolation Voltage Channels Compatibility Output Capability Response Speed General Bus Type Data Bus Card ID PISO-A64 3750 Vrms 64 Source, Open Collector 100 mA/+30 V for one channel @ 60% duty 4 kHz (Typical) 5 V PCI, 32-bit, 33 MHz 8-bit No Female DB37 x 1 40-pin box header x 1 180 mm x 105 mm x 22 mm 800 mA @ +5 V 0 ~ 60 °C -20 ~ 70 °C 5 ~ 85% RH, non-condensing I/O Connector Dimensions (L x W x D) Power Consumption Operating Temperature Storage Temperature Humidity 1.2 Order Description Name Description PISO-P32C32U PISO-P32C32U(-5V) PISO-P32S32WU PISO-P32A32U PISO-P32A32U(-5V) PISO-P64U PISO-C64U PISO-A64 Universal PCI with 32-bit D/I, 32-bit D/O (Current Sinking) Universal PCI with 32-bit D/I,32-bit D/O (Current Sinking) Universal PCI with 32-bit D/I,32-bit D/O (Current Sinking) Universal PCI with 32-bit D/I, 32-bit D/O (Current Sourcing) Universal PCI with 32-bit D/I, 32-bit D/O (Current Sourcing) Universal PCI, 64-bit D/I Universal PCI, 64-bit D/O (Current Sinking) PCI bus, 64-bit D/O (Current Sourcing) PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 9 1.2.1 Options Name Description ADP-37/PCI ADP-50/PCI extender, 50-pin OPTO-22 header to DB-37 for PCI Bus I/O boards extender, 50-pin OPTO-22 header to 50-pin header, for PCI Bus I/O boards 32-channel relay output board (RoHS) Include : CA-3710D Male- Male D-sub Cable 1.0 M 16-channel input terminal and 16-channel relay output board, Include: CA-3710D Male- Male D-sub Cable 1.0 M DB-32R DB-16P16R 1.3 PCI Data Acquisition Family We provide a family of PCI-BUS data acquisition cards. These cards can be divided into three groups as follows: 1. PCI-series: first generation, isolated or non-isolated cards PCI-1002/1202/1800/1802/1602: multi-function family, non-isolated PCI-P16R16/P16C16/P16POR16/P8R8: D/I/O family, isolated PCI-TMC12: timer/counter card, non-isolated 2. PIO-series: cost-effective generation, non-isolated cards PIO-823/821: multi-function family PIO-D168/D144/D96/D64/D56/D48/D24: D/I/O family PIO-DA16/DA8/DA4: D/A family 3. PISO-series: cost-effective generation, isolated cards PISO-813: A/D card PISO-P32C32/P32S32WU/P32A32/P64/C64/A64: D/I/O family PISO-P8R8/P8SSR8AC/P8SSR8DC: D/I/O family PISO-730/730A: D/I/O card PISO-DA2: Channel to Channel Isolated D/A card PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 10 1.4 Product Check List The shipping package includes the following items: One PCI boards as follows: PISO-P32C32 series: PISO-P32C32/P32C32U/P32C32U-5V PISO-P32A32 series: PISO-P32A32/P32A32-5V/P32A32U PISO-P32S32WU PISO-P64/C64/A64 series: PISO-P64U/C64U/A64 One company floppy diskette or CD. One Quick Start Guide. It is recommended that you read the Quick Start Guide first. All the necessary and essential information is given in the Quick Start Guide, including: Where to get the software driver, demo programs and other resources. How to install the software. How to test the card. Attention! If any of these items is missing or damaged, contact the dealer from whom you purchased the product. Please save the shipping materials and carton in case you need to ship or store the product in the future. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 11 2. Hardware Configuration 2.1 Board Layout The board layout of PISO-P32C32/P32C32U(-5V)/P32A32(-5V) is as follows: Digital Input 0~15 Digital Output 0~15 JP LED LED DC/DC 1 PISO-P32C32/ DC/DC 2 PISO-P32A32(-5V) LED3 LED Digital Input 16~31 Digital Output16~31 JP CON1 CON2 DB-37 40-PIN Figure 2-1A. Board layout of PISO-P32C32/P32A32/P32A32-5V Figure 2-1B. Board layout of PISO-P32C32U/P32C32U-5V PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 12 JP1/JP2 Default Setting Power Indicator LED1 DO_0~15 LED2 DI_0~15 LED3 DO_16~31 LED4 DI_16~31 Internal/External Power J1 DI_0~15 (3000 V isolation) J2 DI_16~31 (3000 V isolation) DO Channel Power Ground Isolation Bank 1 DI_0~15 (CON1, Pin18) (CON1, Pin19) Isolation Bank 2 DO_0~15 (CON1, Pin37) (CON1, Pin1 & 20) Isolation Bank 3 DI_16~31 (CON2, Pin18) (CON2, Pin19) Isolation Bank 4 DO_16~31 (CON2, Pin37) (CON2, Pin1 & 20) All four banks are fully isolated from each other when using four isolated external power supplies. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 13 The board layout of PISO-P32S32WU is as follows: Figure 2-1A. Board layout of PISO-P32S32WU DI/DO Channel Isolation Bank 1 Power DI_0~15 (CON1,Pin1) DO_0~3 (High drive for 500 mA sink Isolation Bank 2 current, NPN ) (CON1,Pin37) DO_4~15(Low drive for 100 mA sink DI_16 to DI_31 (CON2,Pin1) DO_16~19(High drive for 500 mA Isolation Bank 4 sink current, NPN ) DO_20~31(Low drive for 100 mA sink current, NPN ) ! (CON1,Pin18 & Pin19) (CON1,Pin1 & Pin20) current, NPN ) Isolation Bank 3 Ground (CON2,Pin37) (CON2,Pin18 & Pin19) (CON2,Pin1 & Pin20) Note: To prevent the board damaged forever by overload, the GND pins (CON1: pin 1/ 18/ 19/ 20, CON2: pin 1/ 18/ 19/ 20) all must be connected with GND of External Power. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 14 The board layout of PISO-P64/P64U is as follows: 32 Channels Digital Input DC/DC 1 LED1 LED2 J1 PISO-P64 LED3 J3 J2 32 Channels Digital Input LED4 J4 CON2 40-PIN CON1 DB-37 PCI BUS Figure 2-1A. Board layout of PISO-P64 32 Channels Digital Input LED1 LED2 J1 DC/DC 1 PISO-P64U PISO-P64 LED3 J3 J2 LED4 32 Channels Digital Input J4 SW1 ON CON2 40-PIN CON1 DB-37 PCI BUS Figure 2-1B. Board layout of PISO-P64U PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 15 JP1/JP2/J3/J4 INTERNAL Default Setting LED1 LED2 LED3 LED4 Power Indicator DI_0~15 DI_16~31 DI_32~47 DI_48~63 Isolation Bank 1 Isolation Bank 2 Isolation Bank 3 Isolation Bank 4 DO Channel DI_0~15 DI_16~31 DI_32~47 DI_48~63 J1 J2 J3 J4 Internal/External Power DI_0~15 (3000 V isolation) DI_16~31 (3000 V isolation) DI_32~47 (3000 V isolation) DI_48~63 (3000 V isolation) Power (CON1, Pin18) (CON1, Pin37) (CON2, Pin18) (CON2, Pin37) Ground (CON1, Pin1) (CON1, Pin20) (CON2, Pin1) (CON2, Pin20) All four banks are fully isolated from each other when using four isolated external power supplies. The DC/DC1 provides the internal power supply for banks 1 & 2. The DC/DC2 provides the internal power supply for banks 3 & 4. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 16 The board layout of PISO-C64/A64 is as follows: 32 Channels Digital Output LED1 LED2 PISO-C64/ PISO-A64 32 Channels Digital Output LED3 LED4 CON2 40-PIN CON1 DB-37 PCI BUS Figure 2-1A. Board layout of PISO-C64/A64 32 Channels Digital Output 32 Channels Digital Output PISO-C64U LED3 LED1 LED2 LED4 SW1 ON CON2 40-PIN CON1 DB-37 PCI BUS Figure 2-1B. Board layout of PISO-C64U PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 17 Power Indicator LED1 DO_0~15 LED2 DO_16~31 LED3 DO_32~47 LED4 DO_48~63 DO Channel Power Ground Isolation Bank 1 DO_0~15 (CON1, Pin18) (CON1, Pin1) Isolation Bank 2 DO_16~31 (CON1, Pin37) (CON1, Pin20) Isolation Bank 3 DO_32~47 (CON2, Pin18) (CON2, Pin1) Isolation Bank 4 DO_48~63 (CON2, Pin37) (CON2, Pin20) All four banks are fully isolated from each other when using four isolated external power supplies. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 18 2.2 Isolated D/I Architecture The D/I architecture of the PISO-P32C32/P32C32U(-5V)/P32S32WU/P32A32(5V)/P32A32U and the PISO-P64(U) are the same. Select either internal or external power to supply photo-couple digital input power. The PISO-P32S32WU only supports external power mode. Here are diagrams for the various configurations: Configure 1: Internal power supply (Default Setting) Figure 2-2-1. Isolated D/I Architecture with internal power supply Figure 2-2-2. Typical Applications of D/I with internal power supply PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 19 Configure 2: External power supply DC / DC (-) GND Internal PC's Power In (-) External GND Out (+) External Power (+) Internal Vcc R=10k R=3K D in D Input (External) PISO-P32C32 / P32S32WU/PISO-P32A32 / PISO-P64 Figure 2-2-3. Isolated DI Architecture with external power supply DC / DC PC's Power External Power Supply (-) GND Internal In (-) GND (+)External Power Out (+) Internal Vc c R=10k D in R=3K External source signal (+) (-) GND PISO-P32C32 / P32S32WU/PISO-P32A32 / PISO-P64 Figure 2-2-4. Typical Applications of DI with external power supply PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 20 2.3 Isolated D/O Architecture The PISO-P32C32/P32C32U(-5V)/P32S32WU and the PISO-C64(U) share the same architecture, and the PISO-P32A32(-5V)/P32A32U and the PISO-A64 share the same architecture. Here are block diagrams related to the DO: Vcc (+) External Power 390 R R=6.8K D D out (External) D out O.C. R=10K Out (-) GND External Power PISO-P32C32 / PISO-C64 Figure 2-3-1. Isolated DO Architecture (Current sinking) External Power Vcc (+) 390 R D out R=6.8K D1 I1 O.C. R=10KOut DC R1 10V~30V External - + Device PISO-P32C32 / PISO-C64 (-) GND Figure 2-3-2. Typical Applications of DO (Current sinking) PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 21 Vcc (+) External Power 390 R R=10K D O.C. Out D out D out (External) R=6.8K (-) GND External Power PISO-P32A32 / PISO-A64 Figure 2-3-3. Isolated DO Architecture (Current sourcing) External Power Vcc 390 R (+) (+) External Power R=10K D D out O.C. Out D out (External) + I1 R1 R=6.8K PISO-P32A32 / PISO-A64 DC 10V~30V (-) GND External Power External Device (-) GND Figure 2-3-4. Typical Applications of DO (Current sourcing) ! NOTE: 1. The PISO-P32C32/P32C32U(-5V)/P32A32(-5V)/C64(U)/A64, I1~I32(I64) must be < 100 mA. The P32S32WU, I1~I4 & I17~I20 must be < 500 mA, The other must be < 100 mA. 2. The PISO-P32C32/P32C32U(-5V)/P32S32WU/P32A32(-5V)/C64(U)/A64 , R1, R2, ... & R32(R64) are current-limit resistors. They must be designed to let I1, I2, ... & I32 <100 mA.. , I1~I4 & I17~I20 < 500 mA for PISO-P32S32WU 3. If the internal resistance of the external device is large enough, the R can be omitted. 4. D1, D2, ... & D31 are common-cathode diodes for switching inductive loads. They can be used as relay drivers, hammer drivers, lamp drivers, display drivers, line drivers & logic buffers. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 22 Open Collector Wiring Notice PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 23 2.4 Daughter boards 2.4.1 DB-37 The DB-37 is a general-purpose daughter board for D-sub 37 pins. It is designed for easy wiring connections. 37-Pin Cable DB-37 2.4.2 DN-37 The DN-37 is a general-purpose daughter board for DB-37 with DIN-Rail Mounting. It is designed for easy wiring connections. 37-Pin Cable DN-37 2.4.3 DB-8125 The DB-8125 is a general-purpose screw terminal board. It is designed for easy wiring connection. One DB-37 and two 20-pin flat-cable headers are used in the DB-8125. 37-Pin Cable DB-8125 (for DB-37 or 20-pin flat-cable PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 24 2.5 2.5.1 Pin Assignment PISO-P32C32/P32C32U(-5V)/P32A32(U) CON1 Pin assignment C O N 1 D O E x te rn a l 1 G N D (-) DI 0 3 DI 2 4 6 DI 5 7 9 DI 8 10 DI 9 11 12 D I 11 13 D I 12 14 D I 13 15 D I 14 16 D I 15 21 DO0 22 DO1 23 DO2 24 DO3 25 DO4 26 DO5 27 DO6 28 DO7 29 DO8 30 DO9 31 D O 10 32 D O 11 33 D O 12 34 D O 13 35 D O 14 36 D O 15 17 C O N 1 D /I C O M 1 A 1 8 C O N 1 D /I C O M 1 B 1 9 37 C O N 1 D O E x te rn a l P o w e r(+ ) CON2 Pin assignment C O N 2 D O E x te rn a l 1 G N D (-) D I 16 2 D I 17 3 D I 18 4 D I 19 5 D I 20 6 D I 21 7 D I 22 8 D I 23 9 D I 24 10 D I 25 11 D I 26 D I 27 D I 28 D I 29 D I 30 D I 31 P IS O -P 3 2 C 3 2 / P32A32 D C /D C 2 LED3 LED4 JP2 CON2 4 0 - P IN CON1 D B -3 7 PCI BUS 8 DI 7 D I 10 L E D 2 D C /D C 1 C O N 1 D O E x te rn a l 2 0 G N D (-) 5 DI 4 DI 6 LED1 2 DI 1 DI 3 JP1 12 20 C O N 2 D O E x te rn a l G N D (-) 21 D O 16 22 D O 17 23 D O 18 24 D O 19 25 D O 20 26 D O 21 27 D O 22 28 D O 23 29 D O 24 30 D O 25 31 D O 26 32 D O 27 33 D O 28 34 D O 29 35 D O 30 CON2 Pin assignment C O N 2 D O E x te rn a l G N D (-) CON2 G N D (-) 1 2 D I 16 3 4 D I 17 5 6 D O1 7 D I 18 7 8 D O1 8 D I 19 9 10 D O19 D I 20 11 12 DO20 D I 21 13 14 D O21 D I 22 15 16 D O 22 D I 23 17 18 D I 24 19 20 D O 24 D I 25 21 22 D O25 D I 26 23 2 4 D O2 6 D I 27 25 2 6 D O2 7 D I 28 27 2 8 D O2 8 D I 29 29 3 0 D O2 9 D I 30 31 3 2 D O3 0 D I 31 33 3 4 D O3 1 C O N 2 D/ I C O M2 A 35 C O N 2 D / I C O M2B 3 7 N .C . 39 D O E x te rn a l D O1 6 DO23 D O E x te n a l 36 C O N 2 P o w e r (+ ) 3 8 N .C . 4 0 N .C . 13 14 15 16 Extension Cable 17 C O N 2 D /I C O M 2 A 18 C O N 2 D /I C O M 2 B 19 36 37 D O 31 C O N 2 D O E x te rn a l P o w e r(+ ) 40-Pin to 37-Pin conversion cable Pin assignment of CON2 via extension PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 25 2.5.2 PISO-P32S32WU CON1 Pin assignment PISO-P32C2WU C O N 1 D O E xtern al 1 G N D (-) DI 0 2 DI 1 3 DI 2 4 DI 3 5 DI 4 6 DI 5 7 C O N 1 D O E xtern al 20 G N D (-) 21 D O 0 fo r h ig h d rive 22 D O 1 fo r h ig h d rive 23 D O 2 fo r h ig h d rive 24 D O 3 fo r h ig h d rive DI 6 9 DI 8 10 DI 9 11 12 D I 11 13 D I 12 14 D I 13 15 D I 14 16 D I 15 DO4 26 DO5 27 DO6 28 DO7 29 DO8 30 DO9 31 D O 10 32 D O 11 33 D O 12 34 D O 13 35 D O 14 36 D O 15 17 G N D fo r H ig h d rive 18 C O N 1 E xternal 37 P ow er G N D fo r H ig h d rive 19 CON2 Pin assignment C O N 2 D O E x te rn a l 1 G N D (-) D I 16 2 D I 17 3 D I 18 4 D I 19 5 D I 20 6 D I 21 7 D I 22 8 D I 23 9 D I 24 10 D I 25 11 D I 26 D I 27 D I 28 D I 29 D I 30 D I 31 PCI BUS 8 DI 7 D I 10 25 CON2 40-PIN CON1 DB-37 12 C O N 2 D O E x te rn a l 2 0 G N D (-) 2 1 D O 1 6 fo r h ig h d riv e 2 2 D O 1 7 fo r h ig h d riv e 2 3 D O 1 8 fo r h ig h d riv e 2 4 D O 1 9 fo r h ig h d riv e 25 DO 20 26 DO 21 27 DO 22 28 DO 23 29 DO 24 30 DO 25 31 DO 26 32 DO 27 33 DO 28 34 DO 29 35 DO 30 CON2 Pin assignment 1 2 CON 2 G N D (-) D I 16 3 4 D O 16 fo r hig h d rive D I 17 5 6 D O 17 fo r hig h d rive D I 18 7 8 D O 18 fo r hig h d rive D I 19 9 10 D O 19 fo r hig h d rive D I 20 11 D I 21 13 14 D O21 D I 22 15 16 D O 22 18 D O23 C O N 2 D O E xtern al G N D (-) 12 D O 20 D I 23 17 D I 24 19 20 D O 24 D I 25 21 22 D O25 D I 26 23 24 D O26 D I 27 25 26 D O27 D I 28 27 28 D O28 D I 29 29 30 D O29 D I 30 31 32 D O30 D I 31 33 34 D O31 G N D for H ig h drive 35 G N D for H ig h drive 37 N. C. 39 D O E xtern al 36 C O N 2 E xtern al P o w er (+) 38 N. C. 40 N. C. 13 14 15 16 Extension Cable 17 G N D fo r H ig h d riv e 1 8 G N D fo r H ig h d riv e 1 9 36 37 DO 31 C O N 2 E x te rn a l Pow er 40-Pin to 37-Pin conversion cable Pin assignment of CON2 via extension PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 26 2.5.3 PISO-P64/P64U CON1 Pin assignment P IS O -P 6 4 D C /D C 1 E x te rn a l P o w e r G N D (-) D I: 0 -1 5 (-) 1 DI 0 5 DI 4 6 DI 5 7 DI 6 8 DI 7 DI 18 24 DI 19 25 DI 20 26 DI 21 27 DI 22 28 DI 23 29 DI 24 30 DI 25 31 DI 26 10 11 12 D I 11 13 D I 12 14 D I 34 4 5 D I 36 6 D I 39 D I 40 D I 41 D I 42 DI 49 DI 34 7 8 DI 50 DI 35 9 10 DI 51 36 DI 31 DI 36 11 12 DI 52 37 D I: 1 6 -3 1 (+ ) DI 37 13 14 DI 53 E x te rn a l P o w e r (+ ) DI 38 15 16 DI 54 DI 39 17 18 DI 55 D I 40 19 20 DI 56 DI 41 21 22 DI 57 DI 42 23 24 DI 58 DI 43 25 26 DI 59 DI 44 27 28 DI 60 DI 45 29 30 DI 61 E x te rn a l P o w e r G N D (-) DI 46 31 32 DI 62 D I: 4 8 -6 3 (-) DI 47 33 34 DI 63 C O N 2 D /I P o w e r (+ ) 35 36 C O N 2 D /I P o w e r (-) 37 38 C O N 2 D /I E x te rn a l P o w e r (+ ) N .C . N .C . 39 40 N .C . D I 48 22 D I 49 23 D I 50 24 D I 51 25 D I 52 26 D I 53 27 D I 54 28 D I 55 29 D I 56 30 D I 57 31 D I 58 32 D I 59 33 D I 60 34 D I 61 35 D I 62 9 10 11 Extension Cable 12 13 14 15 16 D I 47 17 E x te rn a l P o w e r (+ ) D I: 3 2 -4 7 (+ ) 1 8 36 37 N .C . DI 48 6 8 D I 44 D I 46 4 5 7 D I 43 D I 45 3 DI 33 DI 30 21 D I 35 DI 32 35 20 3 C O N 2 D /I E x te rn a l P o w e r G N D (-) DI 29 D I: 3 2 -4 7 (-) 1 D I 33 2 34 19 2 C O N 2 D /I E x te rn a l P o w e r G N D (-) 1 DI 28 16 D I 32 CON2 Pin assignment DI 27 E x te rn a l P o w e r G N D (-) D I 38 PCI BUS 33 CON2 Pin assignment D I 37 CON2 4 0 -P IN CON1 D B -3 7 32 15 D I 15 17 E x te rn a l P o w e r (+ ) D I: 0 -1 5 (+ ) 1 8 N .C . DI 17 23 J4 9 D I 10 D I 14 DI 16 22 4 DI 3 D I 13 D I: 1 6 -3 1 (-) 21 J3 3 DI 2 DI 9 20 D C /D C 2 J2 2 DI 1 DI 8 E x te rn a l P o w e r G N D (-) J1 19 40-Pin to 37-Pin conversion cable D I 63 D I: 4 8 -6 3 (+ ) E x te rn a l P o w e r (+ ) Pin assignment of CON2 via extension PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 27 2.5.3 PISO-C64/C64U/A64 CON1 Pin assignment External Power GND (-) DO: 0-15 (-) 1 DO 0 2 DO 1 3 DO 2 7 DO 6 8 DO 7 DO 18 24 DO 19 25 DO 20 26 DO 21 27 DO 22 28 DO 23 29 DO 24 30 DO 25 31 DO 26 32 DO 27 33 DO 28 34 DO 29 35 DO 30 36 DO 31 10 DO 9 11 12 DO 11 13 DO 12 14 16 19 2 C O N 2 D /O 4 8 ~ 6 3 (-) D O 32 3 4 DO 48 D O 33 5 6 DO 49 D O 34 7 8 DO 50 D O 35 9 10 DO 51 D O 36 11 12 DO 52 D O 37 13 14 DO 53 D O 38 15 16 DO 54 D O 39 17 18 DO 55 D O 40 19 20 DO 56 D O 41 21 22 DO 57 E x te rn a l P o w e r G N D (-) D O 42 23 24 DO 58 20 D O : 4 8 -6 3 (-) D O 43 25 26 DO 59 21 D O 48 D O 44 27 28 DO 60 22 D O 49 D O 45 29 30 DO 61 D O 46 31 32 DO 62 D O 47 33 34 DO 63 35 36 C O N 2 D /O 4 8 ~ 6 3 (+ ) N .C . 37 38 N .C . N .C . 39 40 N .C . 37 DO: 16-31 (+) External Power (+) CON2 Pin assignment E x te rn a l P o w e r G N D (-) D O : 3 2 -4 7 (-) 1 DO 33 2 3 DO 34 4 DO 35 5 DO 36 6 DO 37 7 23 24 DO 38 8 DO 39 9 DO 40 10 DO 41 DO 42 DO 43 DO 44 DO 45 DO 46 CON2 Pin assignment C O N 2 D /O 3 2 ~ 4 7 (-)1 15 DO 15 17 External Power (+) DO: 0-15 (+) 18 DO 32 PCI BUS 9 DO 8 N.C. DO 17 23 6 DO 5 DO 14 DO 16 22 5 DO 4 DO 13 21 CON2 4 0 -P IN 4 DO 3 DO 10 External Power GND (-) 20 DO: 16-31 (-) P IS O -C 6 4 CON1 D B -3 7 D O 50 D O 51 25 D O 52 26 D O 53 27 D O 54 28 D O 55 29 D O 56 30 D O 57 31 D O 58 32 D O 59 33 D O 60 34 D O 61 35 D O 62 C O N 2 D /O 3 2 ~ 4 7 (+ ) 11 12 13 14 15 Extension Cable 16 DO 47 17 E x te rn a l P o w e r (+ ) D O : 3 2 -4 7 (+ ) 1 8 N .C . 19 36 D O 63 37 D O : 4 8 -6 3 (+ ) E x te rn a l P o w e r (+ ) 40-Pin to 37-Pin conversion cable Pin assignment of CON2 via extension PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 28 3. I/O Control Register 3.1 How to Find the I/O Address The plug & play BIOS will assign a proper I/O address to each PIO/PISO series card during the power-on stage. The fixed IDs of the PIO/PISO series cards are as following: OLD version (Vendor ID= 0xE159, Device ID= 0x02) Model name PISO-C64(U) PISO-P64(U) PISO-P32C32 PISO-P32C32U PISO-P32C32U-5V PISO-P32S32WU PISO-A64 PISO-P32A32 PISO-P32A32U PISO-P32A32-5V Sub-Vender 0x80 0x80 Sub-Device 0x08 0x08 Sub-Aux 0x00 0x10 Version Rev1.0~3.0 Rev1.0~3.0 0x80 0x08 0x20 Rev1.0~4.0 Rev1.4 0x80 0x08 0x50 Rev1.0~2.0 0x80 0x08 0x70 Rev1.0~2.0 New version (Vendor ID= 0xE159, Device ID= 0x01) Model name PISO-C64(U) PISO-P64(U) PISO-P32C32 PISO-P32C32U PISO-P32C32U-5V PISO-P32S32WU PISO-A64 PISO-P32A32 PISO-P32A32U PISO-P32A32-5V Sub-Vender 0x0280 0x4280 Sub-Device 0x00 0x00 Sub-Aux 0x00 0x10 Version Rev4.0 Rev4.4 0x4280 0x00 0x20 Rev5.5 Rev1.4 0x8280 0x00 0x50 Rev3.0 0xC280 0x00 0x70 Rev3.3 We provide all necessary functions as follows: 1. PIO_DriverInit(&wBoard, wSubVendor, wSubDevice, wSubAux) 2. PIO_GetConfigAddressSpace(wBoardNo,*wBase,*wIrq, *wSubVendor,*wSubDevice, *wSubAux, *wSlotBus, *wSlotDevice) 3. Show_PIO_PISO(wSubVendor, wSubDevice, wSubAux) PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 29 All functions are defined in PIO.H. Refer to Sec. 3.4 for more information. The important driver information is given as follows: 1. Allocated resource information: wBase : BASE address mapping in this PC wIrq: Allocated IRQ channel number of this board in this PC 2. PIO/PISO identification information: wSubVendor: subVendor ID of this board wSubDevice: subDevice ID of this board wSubAux: subAux ID of this board 3. PC’s physical slot information: wSlotBus: The bus number of the slot used by this board. wSlotDevice: The device number of the slot used by this board. The utility program, PIO_PISO.EXE, will detect & show all PIO/PISO cards installed in this PC. Refer to Sec. 6.2 for more information. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 30 3.1.1 PIO_DriverInit PIO_DriverInit(&wBoards, wSubVendor,wSubDevice,wSubAux) wBoards=0 to N wSubVendor wSubDevice wSubAux Number of boards found in this PC SubVendor ID of board you are seeking SubDevice ID of board you are seeking SubAux ID of board to you are seeking This function can detect all PIO/PISO series cards with your system. Implementations are based on the PCI plug & play mechanism-1. It will find all PIO/PISO series cards installed in this system & save all their resource in the library. Find all PIO/PISO cards in this PC /* Step 1: Detect all PIO/PISO series cards in this PC */ wRetVal=PIO_DriverInit(&wBoards, 0xff, 0xff, 0xff); /*Find all PIO_PISO*/ printf("\nThere are %d PIO_PISO Cards in this PC",wBoards); if (wBoards==0 ) exit(0); /* Step2: Save resources for all PIO/PISO cards installed in this PC */ printf("\n-----------------------------------------------------"); for(i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i, &wBase, &wIrq, &wSubVendor, &wSubDevice, &wSubAux, &wSlotBus, &wSlotDevice); printf("\nCard_%d:wBase=%x,wIrq=%x,subID=[%x,%x,%x], SlotID=[%x,%x]",i,wBase,wIrq,wSubVendor,wSubDevice, wSubAux,wSlotBus,wSlotDevice); printf(" --> "); } ShowPioPiso(wSubVendor,wSubDevice,wSubAux); PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 31 Find all PISO-P32C32/P32C32U(-5V)/P32S32WU/P32A32(U) cards in this PC /* Step1: Detect all PISO-P32C32/P32A32 cards first */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x20; /* for PISO_P32C32 */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x70; /* for PISO_P32A32 */ wRetVal=PIO_DriverInit(&wBoards, wSubVendor, wSubDevice, wSubAux); printf("There are %d PISO-P32C32 Cards in this PC\n",wBoards); /* Step2: Save resource of all PISO-P32C32/P32S32WU/P32A32 cards installed in this PC */ for (i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i, &wBase, &wIrq, &wID1, &wID2, &wID3, &wID4, &wID5); printf("\nCard_%d: wBase=%x, wIrq=%x", i, wBase, wIrq); wConfigSpace[i][0]=wBaseAddress; wConfigSpace[i][1]=wIrq; /* save all resource of this card */ /* save all resource of this card */ } Find all PISO-P64/P64U cards in this PC /* Step1: Detect all PISO-P64 cards first */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x10; /* for PISO_P64 */ wRetVal=PIO_DriverInit(&wBoards, wSubVendor,wSubDevice,wSubAux); printf("There are %d PISO-P64 Cards in this PC\n",wBoards); /* Step2: save resource of all PISO-P64 cards installed in this PC */ for (i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,, &wBase, &wIrq, &wID1, &wID2, &wID3, &wID4, &wID5); printf("\nCard_%d: wBase=%x, wIrq=%x", i, wBase, wIrq); wConfigSpace[i][0]=wBaseAddress; wConfigSpace[i][1]=wIrq; /* save all resource of this card */ /* save all resource of this card */ } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 32 Find all PISO-C64/C64U/A64 cards in this PC /* Step1: Detect all PISO-C64 cards first */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x00; /* for PISO-C64 */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x50; /* for PISO-A64 */ wRetVal=PIO_DriverInit(&wBoards, wSubVendor,wSubDevice,wSubAux); printf("There are %d PISO-C64 Cards in this PC\n",wBoards); /* Step2: save resource of all PISO-C64/A64 cards installed in this PC */ for (i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&wID1,&wID2,&wID3,&wID4, &wID5); printf("\nCard_%d: wBase=%x, wIrq=%x", i, wBase, wIrq); wConfigSpace[i][0]=wBaseAddress; wConfigSpace[i][1]=wIrq; /* save all resource of this card */ /* save all resource of this card */ } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 33 3.1.2 PIO_GetConfigAddressSpace PIO_GetConfigAddressSpace(wBoardNo,*wBase,*wIrq, *wSubVendor,*wSubDevice, *wSubAux, *wSlotBus,*wSlotDevice) wBoardNo=0 to N wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice totally N+1 boards found by PIO_DriveInit(...) base address of the board control word allocated IRQ channel number of this board subVendor ID of this board subDevice ID of this board subAux ID of this board The bus number of the slot used by this board The device number of the slot used by this board The user can use this function to save resource information of all PIO/PISO cards installed in this system. Then the application program can directly control all functions of the PIO/PISO series card. Find the configure address space for your PISO-P32C32/P32S32WU/P32A32 card /* Step1: Detect all PISO-P32C32/P32S32WU cards first */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x20; /* for PISO_P32C32/ P32S32WU*/ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x70; /* for PISO_P32A32*/ wRetVal=PIO_DriverInit(&wBoards, wSubVendor,wSubDevice,wSubAux); printf("There are %d PISO-P32C32 Cards in this PC\n",wBoards); /* Step2: Save resources for all PISO-P32C32/P32S32WU/P32A32 cards installed in this PC */ for (i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&t1,&t2,&t3,&t4,&t5); printf("\nCard_%d: wBase=%x, wIrq=%x", i,wBase,wIrq); wConfigSpace[i][0]=wBaseAddress; wConfigSpace[i][1]=wIrq; /* save all resource of this card */ /* save all resource of this card */ } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 34 /* Step3: Control the PISO-P32C32/P32S32WU/P32A32 directly */ wBase=wConfigSpace[0][0]; /* get base address the card_0 */ outport(wBase,1); /* enable all D/I/O operation of card_0 */ wBase=wConfigSpace[1][0]; /* get base address the card_1 */ outport(wBase,1); /* enable all D/I/O operation of card_1 */ Find the configure address space of your PISO-P64/P64U card /* Step1: Detect all PISO-P64 cards first */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x10; /* for PISO_P64 */ wRetVal=PIO_DriverInit(&wBoards, wSubVendor,wSubDevice,wSubAux); printf("There are %d PISO-P64 Cards in this PC\n",wBoards); /* Step2: Save resource of all PISO-P64 cards installed in this PC */ for (i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&t1,&t2,&t3,&t4,&t5); printf("\nCard_%d: wBase=%x, wIrq=%x", i,wBase,wIrq); wConfigSpace[i][0]=wBaseAddress; wConfigSpace[i][1]=wIrq; /* save all resource of this card */ /* save all resource of this card */ } /* Step3: Control the PISO-P64 directly */ wBase=wConfigSpace[0][0]; /* get base address the card_0 */ outport(wBase,1); /* enable all D/I/O operation of card_0 */ wBase=wConfigSpace[1][0]; outport(wBase,1); /* get base address the card_1 */ /* enable all D/I/O operation of card_1 */ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 35 Find the configure address space of your PISO-C64/C64U/A64 card /* Step1: Detect all PISO-C64 cards first */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x00; /* for PISO_C64 */ wSubVendor=0x80; wSubDevice=0x08; wSubAux=0x50; /* for PISO_A64 */ wRetVal=PIO_DriverInit(&wBoards, wSubVendor,wSubDevice,wSubAux); printf("There are %d PISO-C64 Cards in this PC\n",wBoards); /* Step2: Save resource of all PISO-C64/A64 cards installed in this PC */ for (i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&t1,&t2,&t3,&t4,&t5); printf("\nCard_%d: wBase=%x, wIrq=%x", i,wBase,wIrq); wConfigSpace[i][0]=wBaseAddress; /* save all resource of this card */ wConfigSpace[i][1]=wIrq; /* save all resource of this card */ } /* Step3: Control the PISO-C64/A64 directly */ wBase=wConfigSpace[0][0]; outport(wBase,1); wBase=wConfigSpace[1][0]; outport(wBase,1); /* get base address the card_0 */ /* enable all D/I/O operation of card_0 */ /* get base address the card_1 */ /* enable all D/I/O operation of card_1 */ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 36 3.1.3 Show_PIO_PISO Show_PIO_PISO(wSubVendor, wSubDevice, wSubAux) wSubVendor subVendor ID of board you are seeking wSubDevice subDevice ID of board you are seeking wSubAux subAux ID of board you are seeking This function will show a text string for these special subIDs. This text string is the same as defined in PIO.H The demo program is as follows: wRetVal=PIO_DriverInit(&wBoards,0xff,0xff,0xff); /* find all PIO_PISO series card*/ printf("\nThere are %d PIO_PISO Cards in this PC",wBoards); if (wBoards==0 ) exit(0); printf("\n-----------------------------------------------------"); for(i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&wSubVendor, &wSubDevice,&wSubAux,&wSlotBus,&wSlotDevice); printf("\nCard_%d:wBase=%x,wIrq=%x,subID=[%x,%x,%x], SlotID=[%x,%x]",i,wBase,wIrq,wSubVendor,wSubDevice, wSubAux,wSlotBus,wSlotDevice); } printf(" --> "); ShowPioPiso(wSubVendor,wSubDevice,wSubAux); PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 37 3.2 The Assignment of I/O Address The Plug & Play BIOS will assign an appropriate I/O address to the PIO/PISO series card. If there is only one PIO/PISO board, the board will be identified as card_0. If there are two PIO/PISO boards in the system, it is very difficult to identify which board is card_0. The software driver can support a maximum of 16 boards. Therefore, the user can install 16 PIO/PSIO series cards in one PC system. Details of how to locate and identify card_0 and card_1 are provided below: The simplest way to identify which card is card_0 is to use the wSlotBus and wSlotDevice functions as follows: Step 1: Remove all PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 series cards from the PC. Step 2: Install a single PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 series card into the PCI_slot1 in the PC, then run PIO_PISO.EXE and record the wSlotBus1 and wSlotDevice1 information. Step 3: Remove all PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 series cards from the PC. Step 4: Install a single PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 series cards into the PCI_slot2 in the PC, then run PIO_PISO.EXE and record the wSlotBus2 and wSlotDevice2 information. Step 5: Repeat Steps 3 and 4 for all PCI_slots and record all wSlotBus and wSlotDevice information. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 38 The records may be similar to the following table: Table 3-1 PC’s PCI slot WslotBus WSlotDevice Slot_1 0 0x07 Slot_2 0 0x08 Slot_3 0 0x09 Slot_4 0 0x0A Slot_5 1 0x0A Slot_6 1 0x08 Slot_7 1 0x09 Slot_8 1 0x07 PCI-BRIDGE The above procedure is used to record all the wSlotBus and wSlotDevice information for the PC. These values will be mapped to this PC’s physical slots and this mapping will not be changed for any PIO/PISO cards. Therefore, this information can be used to identify the specific PIO/PISO card using the following steps: Step 1: Using the wSlotBus and wSlotDevice information from Table 3-1 enter the board number into the PIO_GetConfigAddressSpace(…) function to get the information for a specific card information, especially wSlotBus and wSlotDevice details. Step 2: Identify the specific PIO/PISO card by comparing the data of the wSlotBus and wSlotDevice from Step 1. ! Note that, normally, the card that is installed in slot 0 is card0 and the card installed in slot1 is card1 for PIO/PISO series cards. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 39 3.3 Enabling I/O Operation When the PC is first powered-on, DI/DO operations are disabled. The enable/disable of DI/DO is controlled by the RESET\ signal. The powered-on states are given as follows: All DI/DO operations are disabled All DO latch registers are clear The DI/DO ports must be enabled by program before using. For example: Step 1: Enable all DI/DO operation. Step 2: Read from DI or write to DO Refer to DEMO1.C for demo program. 3.4 The I/O Address Map The I/O address of the PIO/PISO series card is automatically assigned by the main board ROM BIOS. The I/O address can also be re-assigned by the user, but It is strongly recommended that the I/O address is not changed by user. The Plug & Play BIOS will assign an appropriate I/O address to each PIO/PISO series card. The I/O addresses of the PISOP32C32/P32S32WU/P32A32/P64/C64/A64 series cards are as follows, and are based on the base address of each card. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 40 3.4.1 PISO-P32C32/P32C32U(-5V)/P32S32WU/ P32A32(-5V) I/O Mapping The PISO-P32C32/P32C32U(-5V)/P32S32WU/P32A32(U)(-5V) I/O addresses are mapped as follows: Address Wbase+0 Wbase+2 Wbase+3 Wbase+5 Wbase+7 Wbase+0x2a Read Write Same Same Same Aux pin status register Same RESET\ control register Aux control register Aux data register INT mask control register INT polarity control register Wbase+0xc0 Wbase+0xc4 Wbase+0xc8 Wbase+0xcc Read data from DI_0 ~ DI_7 Read data from DI_8 ~ DI_15 Read data from DI_16 ~ DI_23 Read data from DI_24 ~ DI_31 Write data to DO_0 to DO_7 Write data to DO_8 to DO_15 Write data to DO_16 to DO_23 Write data to DO_24 to DO_31 Wbase+0xe0 Wbase+0xe4 Wbase+0xe8 Wbase+0xec Read DO_0 to DO_7 Readback Read DO_8 to DO_15 Readback Read DO_16 to DO_23 Readback Read DO_24 to DO_31Readback - Wbase+0xd0 Read the Card ID - Note. Refer to Sec. 3.1 for more information about wBase. Digital Output/Digital Input: outportb(wBase+0xc0,Val); outportb(wBase+0xc4,Val); outportb(wBase+0xc8,Val); outportb(wBase+0xcc,Val); /* write to DO 0~7 /* write to DO 8~15 /* write to DO 16~23 /* write to DO 24~31 */ */ */ */ Val=inportb(wBase+0xc0); Val=inportb(wBase+0xc4); Val=inportb(wBase+0xc8); Val=inportb(wBase+0xcc); /* read from DI 0~7 */ /* read from DI 8~15 */ /* read from DI 16~23 */ /* read from DI 24~31 */ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 41 DO Readback Register: Val=inportb(wBase+0xe0); Val=inportb(wBase+0xe4); Val=inportb(wBase+0xe8); Val=inportb(wBase+0xec); /* read DO Readback from DO 0~7 */ /* read DO Readback from DO 8~15 */ /* read DO Readback from DO 16~23 */ /* read DO Readback from DO 24~31 */ Card ID Register: wCardID = inportb(wBase+0xD0); /* read Card ID(0x0~0x15) */ Note: The CardID function supports the following models: PISO-P32C32U(-5V) (Ver1.1 or above), PISO-P32S32WU(Ver 1.5 or above) and PISO-P32A32U PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 42 3.4.2 PISO-P64/P64U I/O Mapping The PISO-P64(U)I/O addresses are mapped as follows: Address wBase+0 wBase+2 wBase+3 Read Write - RESET\ control register Same Aux control register Same Aux data register WBase+5 Wbase+7 Wbase+0x2a Same INT mask control register Aux pin status register - Same INT polarity control register Wbase+0xc0 Wbase+0xc4 Wbase+0xc8 Wbase+0xcc Read data from DI_0 ~ DI_7 Reserved Read data from DI_8 ~ DI_15 Reserved Read data from DI_16 ~ DI_23 Reserved Read data from DI_24 ~ DI_31 Reserved WBase+0xd0 WBase+0xd4 WBase+0xd8 WBase+0xdc Read data from DI_32 ~ DI_39 Reserved Read data from DI_40 ~ DI_47 Reserved Read data from DI_48 ~ DI_55 Reserved Read data from DI_56 ~ DI_63 Reserved WBase+0xf0 Read the Card ID - Note. Refer to Sec. 3.1 for more information about wBase. Digital Output/Digital Input: Val=inportb(wBase+0xc0); Val=inportb(wBase+0xc4); Val=inportb(wBase+0xc8); Val=inportb(wBase+0xcc); /* read from DI 0~7 */ /* read from DI 8~15 */ /* read from DI 16~23 */ /* read from DI 24~31 */ Val=inportb(wBase+0xd0); Val=inportb(wBase+0xd4); Val=inportb(wBase+0xd8); Val=inportb(wBase+0xdc); /* read from DI 32~39 /* read from DI 40~47 /* read from DI 48~55 /* read from DI 56~63 */ */ */ */ Card ID Register: CardID = inportb(wBase+0xF0); /* read Card ID(0x0~0x15) */ ※The PISO-P64U (Ver1.0 or above) supports the Card ID function. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 43 3.4.3 PISO-C64/C64U/A64 I/O Mapping The PISO-C64(U)/A64 I/O addresses are mapped as follows: Address wBase+0 wBase+2 wBase+3 Read Write - RESET\ control register Same Aux control register Same Aux data register wBase+5 wBase+7 wBase+0x2a Same INT mask control register Aux pin status register - Same INT polarity control register wBase+0xc0 wBase+0xc4 wBase+0xc8 wBase+0xcc Read DO_0 to DO_7 Readback Write data to DO_0 to DO_7 Read DO_8 to DO_15 Readback Write data to DO_8 to DO_15 wBase+0xd0 wBase+0xd4 wBase+0xd8 wBase+0xdc Read DO_32 to DO_39 Readback Write data to DO_32 to DO_39 WBase+0xf0 Read the Card ID Read DO_15 to DO_23 Readback Write data to DO_16 to DO_23 Read DO_24 to DO_31 Readback Write data to DO_24 to DO_31 Read DO_40 to DO_47 Readback Write data to DO_40 to DO_47 Read DO_48 to DO_55 Readback Write data to DO_48 to DO_55 Read DO_56 to DO_63 Readback Write data to DO_56 to DO_63 - Note. Refer to Sec. 3.1 for more information about wBase. Digital Output/Digital Input: outportb(wBase+0xc0,Val); outportb(wBase+0xc4,Val); outportb(wBase+0xc8,Val); outportb(wBase+0xcc,Val); /* write to DO 0~7 */ /* write to DO 8~15 */ /* write to DO 16~23 */ /* write to DO 24~31 */ outportb(wBase+0xd0,Val); outportb(wBase+0xd4,Val); outportb(wBase+0xd8,Val); outportb(wBase+0xdc,Val); /* write to DO 32~39 */ /* write to DO 40~47 */ /* write to DO 48~55 */ /* write to DO 56~63 */ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 44 DO Readback Register: Val=inportb(wBase+0xc0); Val=inportb(wBase+0xc4); Val=inportb(wBase+0xc8); Val=inportb(wBase+0xcc); /* read DO Readback from DO 0~7 */ /* read DO Readback from DO 8~15 */ /* read DO Readback from DO 16~23 */ /* read DO Readback from DO 24~31 */ Val=inportb(wBase+0xd0); Val=inportb(wBase+0xd4); Val=inportb(wBase+0xd8); Val=inportb(wBase+0xdc); /* read DO Readback from DO 32~39 */ /* read DO Readback from DO 40~47 */ /* read DO Readback from DO 46~55 */ /* read DO Readback from DO 56~63 */ Card ID Register: CardID = inportb(wBase+0xF0); /* read Card ID(0x0~0x15) */ ※The PISO-C64U (Ver1.0 or above) supports the Card ID function. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 45 3.4.4 RESET\ Control Register (Read/Write): wBase+0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved Reserved Reserved Reserved Reserved Reserved Reserved RESET\ Note. Refer to Sec. 3.1 for more information about wBase. When the PC is first powered-on, the RESET\ signal is in Low-state. This will disable all DI/DO operations. The user has to set the RESET\ signal to High-state before any DI/DO commands are given. outportb(wBase,1); outportb(wBase,0); 3.4.5 /* RESET\ = High all DI/DO are enabled now */ /* RESET\ = Low all DI/DO are disabled now */ AUX Control Register (Read/Write): wBase+2 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0 Note. Refer to Sec. 3.1 for more information about wBase. Aux?=0 this Aux is used as a DI Aux?=1 this Aux is used as a DO When the PC is first powered-on, All Aux? signals are in Low-state. All Aux? are designed as DI for all PIO/PISO series cards. Please set all Aux? to DI state. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 46 3.4.6 AUX Data Register (Read/Write): wBase+3 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0 Note. Refer to Sec. 3.1 for more information about wBase. When the Aux? is used as DO, the output state is controlled by this register. This register is designed for future applications, Please do not change this register. 3.4.7 INT Mask Control Register (Read/Write): wBase+5 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 0 0 0 0 0 0 Note. Refer to Sec. 3.1 for more information about wBase. This register is designed for future applications, Please do not change this register. 3.4.8 AUX Status Register (Read): wBase+7 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0 Note. Refer to Sec. 3.1 for more information about wBase. Aux0-3=reserved, aux4-7=Aux-ID. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 47 4. The Applications of Digital I/O 4.1 PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V)/P32A32U The circuit diagram of DO of PISO-P32C32/P32C32U(-5V) /P32S32WU/P32A32(-5V)/P32A32U is as follows: PISO-P32c32 JP1 LED1 LED2 DC/DC 1 DC/DC 2 LED3 LED4 JP2 CON DB-37 1 CON2 40-PIN PCI BUS External Cable DN-37 Board External Device 1 DN-37 Board External Device 2 Figure 4-1-1. Digital inputs/outputs for PISO-P32C32/P32C32U(-5V)/ P32S32WU//P32A32(-5V)/P32A32U Figure 4-1-2(PISO-P32C32/P32S32WU) shows the circuit diagram of external device 1 Figure 4-1-3(PISO-P32A32) shows the circuit diagram of external device 1 Figure 4-1-4(PISO-P32C32/P32S32WU) shows the circuit diagram of external device 2 Figure 4-1-5(PISO-P32A32) shows the circuit diagram of external device 2 SWITCH ON ON OFF PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 48 Here’s the circuit diagram for external device 1: From the CON1 of PISO-P32C32 Pow er IC P D A S Super 2 S u p p ly + 5 .0 0 V CE POW ER V o lta g e O u tp u t 20 CO M D N -3 7 I/O C O N N E C T O R B L O C K 37 On OFF + 19 1 LED 1 LED 2 LED 3 LED 4 LED 5 LED 6 LED 7 LED 8 R1 LED 9 R9 LED 10 R 10 R2 LED 11 R 11 R3 LED 12 R 12 R4 LED 13 R13 R5 LED 14 R14 R6 LED 15 R 15 R7 LED 16 R16 R8 Figure 4-1-2. The circuit diagram of external device 1 for the digital outputs of PISO-P32C32/P32C32U(-5V)/P32S32WU From the CON1 of PISO-P32A32 IC P D A S Super 2 P o w e r S u p p ly + 5 .0 0 V POW ER V o lta g e O u tp u t + CE 20 COM OFF D N -3 7 I/O C O N N E C T O R B L O C K 37 On 19 1 R9 LED 9 R1 LE D 1 R10 LED 10 R2 LE D 2 R11 LED 11 R3 LE D 3 R12 LED 12 R4 LE D 4 R13 R5 LE D 5 R14 LED 14 R6 LE D 6 R15 LED 15 R7 LE D 7 R16 R8 LE D 8 LED 13 LED 16 Figure 4-1-3. The circuit diagram of external device 1 for the digital outputs of PISO-P32A32/P32A32-5V/P32A32U PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 49 Resistance for R1~R16 is 330 Ohm. LEDs 1-6 are light-emitting diodes. Pin-1/20 are the GND signal for DI_0~DI_15 / DO_0~DO_15. Pin-1/18/19/20 are the GND signal for PISO-P32S32WU DI_0~DI_15 / DO_0~DO_15. Pin-18/37 are the voltage (+) signal for DI_0~DI_15 / DO_0~DO_15 (input 9 VDC ~ 24 VDC). Pin-37 are the voltage (+) signal for PISO-P32S32WU DI_0~DI_15 / DO_0~DO_15 (input 9 VDC ~ 24 VDC). Here’s the circuit diagram for external device 2: From the CON2 of PISO- P32C32 Pow er IC P D A S Super 2 S u p p ly + 5 .0 0 V CE POW ER V o lta g e O u tp u t 20 CO M + OFF D N -3 7 I/O C O N N E C T O R B L O C K 37 On 1 19 LED 1 LED 2 LE D 3 LED 4 LED 5 LED 6 LED 7 LED 8 Figure 4-1-4. R1 R2 LED 9 R9 LED 10 R 10 LED 11 R 11 R3 LED 12 R4 L R5 LE D 14 R14 R6 LED 15 R 15 R7 LED 16 R 1 6 E D R 12 1 R 3 13 R8 The circuit diagram of external device 2 for the digital outputs of PISO-P32C32/P32C32U(-5V)/P32S32WU PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 50 From the CON2 of PISO-P32A32 IC P D A S Super 2 P o w e r S u p p ly + 5 .0 0 V POW ER V o lta g e O u tp u t + CE 20 COM OFF D N -3 7 I/O C O N N E C T O R B L O C K 37 On 19 1 R9 LED 9 R1 LED 1 R10 LED 10 R2 LED 2 R11 LED 11 R3 LED 3 R12 LED 12 R4 LED 4 R13 R5 LED 5 R14 LED 14 R6 LED 6 R15 LED 15 R7 LED 7 R16 R8 LED 8 LED 13 LED 16 Figure 4-1-5. The circuit diagram of external device 2 for the digital outputs of PISO-P32A32/P32A32-5V/P32A32U Resistance for R17~R32 is 330 Ohm. LEDs 17~32 are light emitting diodes. Pin-1/20 are the GND signal for DI_16~DI_31 / DO_16~DO_31. Pin-1/18/19/20 are the GND signal for PISO-P32S32WU DI_16~DI_31 / DO_16~DO_31. Pin-18/37 are the voltage (+) signal for DI_16~DI_31 / DO_16~DO_31 (input 9 VDC ~ 24 VDC). Pin-37 are the voltage (+) signal for PISO-P32S32WU DI_16~DI_31/ DO_16~DO_31 (input 9 VDC ~ 24 VDC) PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 51 Here’s the circuit diagram for DI of PISO-P32C32/P32C32U(5V)/ P32A32(-5V)/P32A32U: From the CON1 of PISO-P32C32/P32C32U(-5V)/P32A32(-5V)/P32A32U CE 20 DN-37 I/O CONNECTOR BLOCK 37 1 ON 19 1 2 3 4 5 6 7 8 ON 9 10 11 12 13 14 15 16 Figure 4-1-6. The circuit diagram of external device 1 for the DI of PISO-P32C32/P32A32(-5V)/P32A32U The DI of CON1 for PISO-P32C32 is set to internal power. Pin-19 is the GND signal for DI_0~DI_15. Pin-18 is the voltage (+) signal for DI_0~DI_15 (input 9 VDC ~ 24 VDC). PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 52 From the CON2 of PISO-P32C32/P32C32U-5V/P32A32/P32A32-5V/P32A32U Pow er Supply ICP DAS Super 2 +5.00 V CE POW ER Vlotage Output COM 20 OFF ON DN-37 I/O CONNECTOR BLOCK 37 19 1 GND POW ER ON 17 18 19 20 21 22 23 24 ON 25 26 27 28 29 30 31 32 Figure 4-1-6. The circuit diagram of external device 2 for the DI of PISO-P32C32/ P32A32(-5V)/P32A32U The DI of CON1 of PISO-P32C32 is set to external power. Pin-19 is the GND signal for DI_0~DI_15. Pin-18 is the voltage (+) signal for DI_0~DI_15 (input 9 VDC ~ 24 VDC) PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 53 4.2 The example of PISO-P64(U) Here’s the circuit diagram of DI for PISO-P64(U): Figure 4-2-1. Digital inputs for PISO-P64(U) Refer to Figure 4-2-2 for the circuit diagram of external device 1 Refer to Figure 4-2-3 for the circuit diagram of external device 2 SWITCH ON ON OFF PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 54 Here’s the circuit diagram for external device 1: From the CON1 of PISO-P64(U) CE 20 1 ON DN-37 I/O CONNECTOR BLOCK 37 19 1 ON 2 3 19 4 20 5 21 6 22 7 23 8 ON 17 18 24 9 ON 10 25 26 11 27 12 28 13 29 14 30 15 31 16 32 Figure 4-2-2. The circuit diagram of external device 2 for the digital inputs of PISO-P64(U) The DI of CON1 of PISO-P64(U) is set to internal power. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 55 Here’s the circuit diagram of external device 2: From the CON2 of PISO-P64(U) CE 20 1 ON DN-37 I/O CONNECTOR BLOCK 37 19 33 ON 34 35 51 36 52 37 53 38 54 39 55 40 ON 49 50 56 41 ON 42 57 58 43 59 44 60 45 61 46 62 47 63 48 64 Figure 4-2-3. The circuit diagram of external device 2 for the digital inputs of PISO-P64(U) The DI of CON2 of PISO-P64(U) is set to internal power. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 56 4.3 The example of PISO-C64(U)/A64 Here’s the DO circuit diagram for PISO-C64(U)/A64: PISO-C64 CON1 DB-37 CON2 40-PIN External Cable PCI BUS DN-37 I/O CONNECTOR External Device 1 DN-37 I/O CONNECTOR External Device 2 Figure 4-3-1. The example of digital outputs for PISO-C64(U)/A64 Refer to Figure 4-3-2 for the circuit diagram of external device 1: Refer to Figure 4-3-3 for the circuit diagram of external device 2: PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 57 Here’s the circuit diagram for external device 1: From the CON1 of PISO-C64(U) ICP DAS Super 2 Pow er Supply +5.00 V CE POW ER Vlotage Output 20 COM OFF 1 R1 R2 R3 R4 R5 R6 R7 R8 DN-37 I/O CONNECTOR BLOCK 37 On 19 LED 1 LED 2 LED 3 LED 4 LED 5 LED 6 LED 7 LED 8 R9 LED 9 R10 LED 10 R11 LED 11 R12 LED 12 R13 LED 13 LED 17 LED 18 LED 19 LED 20 LED 21 R14 LED 25 R26 R17 LED 26 R27 R18 LED 27 R27 R19 LED 28 R28 R20 LED 29 R29 R21 LED 30 R30 R22 LED 31 R31 R23 LED 32 R32 LED 14 LED 22 R15 LED 15 R16 LED 16 LED 23 LED 24 R24 Figure 4-3-2. The circuit diagram of external device 1 for the digital outputs of PISO-C64(U) The resistance of R1~R32 is 330 Ohm. LEDs 1~32 are light-emitting diodes. Pin-1/20 are GND signal for DO_0~DO_15 / DO_16~DO_31. Pin-18/37 are voltage (+) signal for DO_0~DO_15 / DO_16~DO_31 (input 5 VDC~24 VDC). PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 58 Here’s the circuit diagram for external device 1: From the CON1 of PISO-A64 ICP DAS Super 2 Pow er Supply +5.00 V CE POW ER Vlotage Output 20 COM OFF 1 LED 1 LED 2 LED 3 LED 4 LED 5 LED 6 DN-37 I/O CONNECTOR BLOCK 37 On 19 R1 R2 LED 9 R9 R3 LED 10 R10 R4 LED 11 R11 R5 LED 12 R12 R6 LED 13 R13 LED 14 R14 LED 15 R15 LED 16 R16 LED 7 R7 LED 8 R8 R26 LED 25 R17 LED 17 R27 LED 26 R18 LED 18 R27 LED 27 R19 LED 19 R28 LED 28 R20 LED 20 R29 LED 29 R21 LED 21 R30 LED 30 R22 LED 22 R31 LED 31 R23 LED 23 R32 LED 32 R24 LED 24 Figure 4-3-2. The circuit diagram of external device 1 for the digital outputs of PISO-A64 The resistance of R1~R32 is 330 Ohm. LEDs 1~32 are light-emitting diodes. Pin-1/20 are GND signal for DO_0~DO_15 / DO_16~DO_31. Pin-18/37 are voltage(+) signal for DO_0~DO_15 / DO_16~DO_31 (input 5 VDC~24 VDC) . PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 59 Here’s the circuit diagram for external device 2: From the CON2 of PISO-C64(U) ICP DAS Super 2 Pow er Supply +5.00 V CE POW ER Vlotage Output 20 COM OFF + 1 R33 R34 R35 R36 R37 R38 R39 R40 DN-37 I/O CONNECTOR BLOCK 37 On 19 LED 33 LED 34 R42 LED 42 LED 50 LED 36 R43 LED 38 R49 R57 LED 58 R58 R50 LED 59 R59 R51 LED 60 R60 R52 LED 61 R61 R53 LED 62 R62 R54 LED 63 R63 R55 LED 64 R64 LED 43 LED 51 LED 37 LED 40 LED 41 LED 49 LED 35 LED 39 R41 LED 57 R44 LED 44 R45 LED 45 LED 52 LED 53 R46 LED 46 R47 LED 47 R48 LED 48 LED 54 LED 55 LED 56 R56 Figure 4-3-3. The circuit diagram of external device 2 for the digital outputs of PISO-C64(U) The resistance of R33~R64 is 330 Ohm. LEDs 33~64 are light-emitting diodes. Pin-1/20 are GND signal for DO_32~DO_47 / DO_48~DO_63. Pin-18/37 are voltage(+) signal for DO_32~DO_47 / DO_32~DO_63 (input 5 VDC~24 VDC). PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 60 Here’s the circuit diagram for external device 2: From the CON1 of PISO-A64 ICP DAS Super 2 Pow er Supply +5.00 V CE POW ER Vlotage Output 20 COM OFF 1 LED 33 LED 34 LED 35 LED 36 LED 37 LED 38 DN-37 I/O CONNECTOR BLOCK 37 On 19 R33 R34 LED 41 R35 LED 42 R42 R36 LED 43 R43 R37 LED 44 R44 R38 LED 45 R45 LED 46 R46 LED 47 R47 LED48 R48 LED 39 R39 LED 40 R40 R26 LED 25 R17 LED 17 R27 LED 26 R18 LED 18 R27 LED 27 R19 LED 19 R28 LED 28 R20 LED 20 R29 LED 29 R21 LED 21 R30 LED 30 R22 LED 22 R31 LED 31 R23 LED 23 R32 LED 32 R24 LED 24 R41 Figure 4-3-4. The circuit diagram of external device 1 for the digital outputs of PISO-A64 The resistance of R1~R32 is 330 Ohm. LEDs 1~32 are light-emitting diodes. Pin-1/20 are GND signal for DO_0~DO_15 / DO_16~DO_31. Pin-18/37 are voltage(+) signal for DO_0~DO_15 / DO_16~DO_31 (Input 5 VDC~24 VDC) PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 61 5. Software Installation The PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 series can be used in DOS and Windows 98/ME/NT/2K and 32-bit/64-bit Windows XP/2003/Vista/7. The recommended installation procedure for windows is given in Sec. 5.1 ~ 5.2. Or refer to Quick Start Guide (CD:\NAPDOS\PCI\PISO-DIO\Manual\QuickStart\). http://ftp.icpdas.com/pub/cd/iocard/pci/napdos/pci/piso-dio/manual/quickstart/ 5.1 Software Installing Procedure UniDAQ SDK driver (32-bit/64-bit Windows XP/2003/Vista/7): Step 1: Insert the companion CD into the CD-ROM drive and after a few seconds the installation program should start automatically. If it doesn’t start automatically for some reason, double-click the AUTO32.EXE file in the NAPDOS folder on this CD. Step 2: Click the item: “PCI Bus DAQ Card”. Step 3: Click the item: “UniDAQ”. Step 4: Click the item: “DLL for Windows 2000 and XP/2003/Vista 32-bit”. Step 5: Double-Click “UniDAQ_Win_Setup_x.x.x.x_xxxx.exe” file in the Driver folder. Windows driver (Windows 98/NT/2K and 32-bit Windows XP/2003/Vista/7): Step 1: Insert the companion CD into the CD-ROM drive and after a few seconds the installation program should start automatically. If it doesn’t start automatically for some reason, double-click the AUTO32.EXE file in the NAPDOS folder on this CD. Step 2: Click the item: “PCI Bus DAQ Card”. Step 3: Click the item: “PISO-DIO”. Step 4: Click the item “DLL and OCX for Windows 98/NT/2K/XP/2003”. Step 5: Double-Click “PISO_DIO_Win_xxx.exe” file in the Driver folder. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 62 The setup program will then start the driver installation and copy the relevant files to the specified directory and register the driver on your computer. The directory where the drive is stoned is different for different windows versions, as shown below. Windows 64-bit Windows XP/2003/Vista/7: The UniDAQ.DLL file will be copied into the C:\WINNT\SYSTEM32 folder The NAPWNT.SYS and UniDAQ.SYS files will be copied into the C:\WINNT\SYSTEM32\DRIVERS folder ! For more detailed UniDAQ.DLL function information, please refer to UniDAQ SDK user manual (CD:\NAPDOS\PCI\UniDAQ\Manual\). http://ftp.icpdas.com/pub/cd/iocard/pci/napdos/pci/unidaq/maunal/ Windows NT/2K and 32-bit Windows XP/2003/Vista/7: The PISODIO.DLL file will be copied into the C:\WINNT\SYSTEM32 folder The NAPWNT.SYS and PISO.SYS files will be copied into the C:\WINNT\SYSTEM32\DRIVERS folder Windows 95/98/ME: The PISODIO.DLL and PISODIO.Vxd files will be copied into the C:\Windows\SYSTEM folder For more detailed PISODIO.DLL function information, please refer to “ PISO- !DIO_Win32_SDK_Manual.pdf(CD:\NAPDOS\PCI\PISO-DIO\Manual\)”. http://ftp.icpdas.com/pub/cd/iocard/pci/napdos/pci/piso-dio/manual/ 5.2 PnP Driver Installation Power off the computer and install the PISO-P32C32/P32S32WU/P32A32/ P64/C64/A64 series cards. Turn on the computer and Windows 98/Me/2K and 32-bit/64-bit Windows XP/2003/Vista/7 should automatically defect the new PCI device(s) and then ask for the location of the driver files for the hardware. If a problem is encountered during installation, refer to the PnPinstall.pdf file for more information. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 63 5.3 Confirm the Successful Installation Make sure the PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 series cards installed are correct on the computer as follows: Step 1: Select “Start” “Control Panel” and then double click the “System” icon on Windows. Step 2: Click the “Hardware” tab and then click the “Device Manager” button. Step 3: Check the PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 series card which listed correctly or not, as illustrated below. Successful PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 64 6. Demo Program There are many demo programs provided on CD-ROM. After software installation, the following driver will be installed into your hard disk: 6.1 Program file list 6.1.1 PISO-P32C32/P32C32U(-5V)/P32S32WU/ P32A32(-5V)/P32A32U ...\P32C32P32A32\TC>*.* ...\P32C32P32A32\BC>*.* ...\P32C32P32A32\MSC>*.* for Turbo C 2.xx or above for Borland C++ 3.X above for Microsoft C 5.X above ...\P32C32P32A32\TC\LIB>*.* for library source code ...\P32C32P32A32\TC\DEMO>*.* demo program source code ...\P32C32P32A32\TC\DIAG>*.* pio_piso auto detect program ...\P32C32P32A32\TC\LIB\PIO.H ...\P32C32P32A32\TC\LIB\PIO.C ...\P32C32P32A32\TC\LIB\TCLIB.BAT ...\P32C32P32A32\TC\LIB\TCPIO_L.LIB ...\P32C32P32A32\TC\LIB\TCPIO_H.LIB ...\P32C32P32A32\TC\LIB\IOPORT_L.LIB ...\P32C32P32A32\TC\LIB\IOPORT_H.LIB library header file library source file batch compiler file I/O port large mode I/O port huge mode I/O port large mode I/O port huge mode ...\P32C32P32A32\TC\DEMO\PIO.H ...\P32C32P32A32\TC\DEMO\DEMO1.C ...\P32C32P32A32\TC\DEMO\DEMO2.C ...\P32C32P32A32\TC\DEMO\DEMO3.C ...\P32C32P32A32\TC\DEMO\DEMO1.PRJ ...\P32C32P32A32\TC\DEMO\DEMO2.PRJ ...\P32C32P32A32\TC\DEMO\DEMO3.PRJ ...\P32C32P32A32\TC\DEMO\DEMO1.EXE library header file demo1 source file demo2 source file demo3 source file TC project1 file TC project2 file TC project3 file demo1 execution file PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 65 ...\P32C32P32A32\TC\DEMO\DEMO2.EXE demo2 execution file ...\P32C32P32A32\TC\DEMO\DEMO3.EXE demo3 execution file ...\P32C32P32A32\TC\DIAG\PIO.H ...\P32C32P32A32\TC\DIAG\PIO_PISO.C ...\P32C32P32A32\TC\DIAG\PIO_PISO.PRJ ...\P32C32P32A32\TC\DIAG\PIO_PISO.EXE ...\P32C32P32A32\BC\LIB>*.* ...\P32C32P32A32\BC\DEMO>*.* ...\P32C32P32A32\BC\DIAG>*.* library header file I/O source code TC project file I/O execution file for library source code demo program source code pio_piso auto detect program ...\P32C32P32A32\BC\LIB\PIO.H ...\P32C32P32A32\BC\LIB\PIO.C ...\P32C32P32A32\BC\LIB\BCLIB.BAT ...\P32C32P32A32\BC\LIB\BCPIO_L.LIB ...\P32C32P32A32\BC\LIB\BCPIO_H.LIB ...\P32C32P32A32\BC\LIB\IOPORT_L.LIB ...\P32C32P32A32\BC\LIB\IOPORT_H.LIB library header file library source file batch compiler file I/O port large mode I/O port huge mode I/O port large mode I/O port huge mode ...\P32C32P32A32\BC\DEMO\PIO.H ...\P32C32P32A32\BC\DEMO\DEMO1.C ...\P32C32P32A32\BC\DEMO\DEMO2.C ...\P32C32P32A32\BC\DEMO\DEMO3.C ...\P32C32P32A32\BC\DEMO\DEMO1.PRJ ...\P32C32P32A32\BC\DEMO\DEMO2.PRJ ...\P32C32P32A32\BC\DEMO\DEMO3.PRJ ...\P32C32P32A32\BC\DEMO\DEMO1.EXE ...\P32C32P32A32\BC\DEMO\DEMO2.EXE ...\P32C32P32A32\BC\DEMO\DEMO3.EXE library header file demo1 source file demo2 source file demo3 source file BC project1 file BC project2 file BC project3 file demo1 execution file demo2.execution file demo3 execution file ...\P32C32P32A32\BC\DIAG\PIO.H library header file ...\P32C32P32A32\BC\DIAG\PIO_PISO.C I/O source code ...\P32C32P32A32\BC\DIAG\PIO_PISO.PRJ TC project file ...\P32C32P32A32\BC\DIAG\PIO_PISO.EXE I/O execution file ...\P32C32P32A32\MSC\LIB>*.* for library source code ...\P32C32P32A32\MSC\DEMO>*.* demo program source code PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 66 ...\P32C32P32A32\MSC\DIAG>*.* pio_piso auto detect program ...\P32C32P32A32\MSC\LIB\PIO.H library header file ...\P32C32P32A32\MSC\LIB\PIO.C library source file ...\P32C32P32A32\MSC\LIB\MSCLIB.BAT batch compiler file ...\P32C32P32A32\MSC\LIB\MSCPIO_L.LIB I/O port large mode ...\P32C32P32A32\MSC\LIB\MSCPIO_H.LIB I/O port huge mode ...\P32C32 P32A32\MSC\LIB\IOPORT_L.LIB I/O port large mode ...\P32C32 P32A32\MSC\LIB\IOPORT_H.LIB I/O port huge mode ...\P32C32P32A32\MSC\DEMO\PIO.H library header file ...\P32C32P32A32\MSC\DEMO\DEMO1.C demo1 source file ...\P32C32P32A32\MSC\DEMO\DEMO2.C demo2 source file ...\P32C32P32A32\MSC\DEMO\DEMO3.C demo3 source file ...\P32C32P32A32\MSC\DEMO\MAKE1.BAT demo1 batch file ...\P32C32P32A32\MSC\DEMO\MAKE2.BAT demo2 batch file ...\P32C32P32A32\MSC\DEMO\MAKE3.BAT demo3 batch file ...\P32C32P32A32\MSC\DEMO\DEMO1.EXE demo1 execution file ...\P32C32P32A32\MSC\DEMO\DEMO2.EXE demo2 execution file ...\P32C32P32A32\MSC\DEMO\DEMO3.EXE demo3 execution file ...\P32C32P32A32\MSC\DIAG\PIO.H library header file ...\P32C32P32A32\MSC\DIAG\PIO_PSIO.C I/O source code ...\P32C32P32A32\MSC\DIAG\PIO.BAT batch file ...\P32C32P32A32\MSC\DIAG\PIO_PISO.EXE I/O execution file : : : PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 67 6.1.2 PISO-P64(U) ...\P64\TC>*.* ...\P64\BC>*.* ...\P64\MSC>*.* for Turbo C 2.xx or above for Borland C++ 3.X above for Microsoft C 5.X above ...\P64\TC\LIB>*.* ...\P64\TC\DEMO>*.* ...\P64\TC\DIAG>*.* for library source code demo program source code pio_piso auto detect program ...\P64\TC\LIB\PIO.H ...\P64\TC\LIB\PIO.C ...\P64\TC\LIB\TCLIB.BAT ...\P64\TC\LIB\TCPIO_L.LIB ...\P64\TC\LIB\TCPIO_H.LIB ...\P64\TC\LIB\IOPORT_L.LIB ...\P64\TC\LIB\IOPORT_H.LIB library header file library source file batch compiler file I/O port large mode I/O port huge mode I/O port large mode I/O port huge mode ...\P64\TC\DEMO\PIO.H ...\P64\TC\DEMO\DEMO1.C ...\P64\TC\DEMO\DEMO1.PRJ ...\P64\TC\DEMO\DEMO1.EXE library header file demo1 source file TC project1 file demo1 execution file ...\P64\TC\DIAG\PIO.H ...\P64\TC\DIAG\PIO_PISO.C ...\P64\TC\DIAG\PIO_PISO.PRJ ...\P64\TC\DIAG\PIO_PISO.EXE library header file I/O source code TC project file I/O execution file ...\P64\BC\LIB>*.* ...\P64\BC\DEMO>*.* ...\P64\BC\DIAG>*.* for library source code demo program source code pio_piso auto detect program ...\P64\BC\LIB\PIO.H ...\P64\BC\LIB\PIO.C ...\P64\BC\LIB\BCLIB.BAT ...\P64\BC\LIB\BCPIO_L.LIB ...\P64\BC\LIB\BCPIO_H.LIB ...\P64\BC\LIB\IOPORT_L.LIB library header file library source file batch compiler file I/O port large mode I/O port huge mode I/O port large mode PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 68 ...\P64\BC\LIB\IOPORT_H.LIB I/O port huge mode ...\P64\BC\DEMO\PIO.H ...\P64\BC\DEMO\DEMO1.C ...\P64\BC\DEMO\DEMO1.PRJ ...\P64\BC\DEMO\DEMO1.EXE library header file demo1 source file BC project1 file demo1 execution file ...\P64\BC\DIAG\PIO.H ...\P64\BC\DIAG\PIO_PISO.C ...\P64\BC\DIAG\PIO_PISO.PRJ ...\P64\BC\DIAG\PIO_PISO.EXE library header file I/O source code BC project file I/O execution file ...\P64\MSC\LIB>*.* ...\P64\MSC\DEMO>*.* ...\P64\MSC\DIAG>*.* for library source code demo program source code pio_piso auto detect program ...\P64\MSC\LIB\PIO.H ...\P64\MSC\LIB\PIO.C ...\P64\MSC\LIB\MSCLIB.BAT ...\P64\MSC\LIB\MSCPIO_L.LIB ...\P64\MSC\LIB\MSCPIO_H.LIB ...\P64\MSC\LIB\IOPORT_L.LIB ...\P64\MSC\LIB\IOPORT_H.LIB library header file library source file batch compiler file I/O port large mode I/O port huge mode I/O port large mode I/O port huge mode ...\P64\MSC\DEMO\PIO.H ...\P64\MSC\DEMO\DEMO1.C ...\P64\MSC\DEMO\MAKE1.BAT ...\P64\MSC\DEMO\DEMO1.EXE library header file demo1 source file demo1 batch file demo1 execution file ...\P64\MSC\DIAG\PIO.H library header file ...\P64\MSC\DIAG\PIO_PSIO.C I/O source code ...\P64\MSC\DIAG\PIO.BAT batch file ...\P64\MSC\DIAG\PIO_PISO.EXE I/O execution file PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 69 6.1.3 PISO-C64(U) ...\C64A64\TC>*.* ...\C64A64\BC>*.* ...\C64A64\MSC>*.* for Turbo C 2.xx or above for Borland C++ 3.X above for Microsoft C 5.X above ...\C64A64\TC\LIB>*.* ...\C64A64\TC\DEMO>*.* ...\C64A64\TC\DIAG>*.* for library source code demo program source code pio_piso auto detect program ...\C64A64\TC\LIB\PIO.H library header file ...\C64A64\TC\LIB\PIO.C library source file ...\C64A64\TC\LIB\TCLIB.BAT batch compiler file ...\C64A64\TC\LIB\TCPIO_L.LIB I/O port large mode ...\C64A64\TC\LIB\TCPIO_H.LIB I/O port huge mode ...\C64A64\TC\LIB\IOPORT_L.LIB I/O port large mode ...\C64A64\TC\LIB\IOPORT_H.LIB I/O port huge mode ...\C64A64\TC\DEMO\PIO.H ...\C64A64\TC\DEMO\DEMO1.C ...\C64A64\TC\DEMO\DEMO1.PRJ ...\C64A64\TC\DEMO\DEMO1.EXE ...\C64A64\TC\DIAG\PIO.H ...\C64A64\TC\DIAG\PIO_PISO.C ...\C64A64\TC\DIAG\PIO_PISO.PRJ ...\C64A64\TC\DIAG\PIO_PISO.EXE ...\C64A64\BC\LIB>*.* ...\C64A64\BC\DEMO>*.* ...\C64A64\BC\DIAG>*.* ...\C64A64\BC\LIB\PIO.H ...\C64A64\BC\LIB\PIO.C ...\C64A64\BC\LIB\BCLIB.BAT ...\C64A64\BC\LIB\BCPIO_L.LIB ...\C64A64\BC\LIB\BCPIO_H.LIB ...\C64A64\BC\LIB\IOPORT_L.LIB library header file demo1 source file TC project1 file demo1 execution file library header file I/O source code I/O project file I/O execution file for library source code demo program source code pio_piso auto detect program library header file library source file batch compiler file I/O port large mode I/O port huge mode I/O port large mode PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 70 ...\C64A64\BC\LIB\IOPORT_H.LIB I/O port huge mode ...\C64A64\BC\DEMO\PIO.H ...\C64A64\BC\DEMO\DEMO1.C ...\C64A64\BC\DEMO\DEMO1.PRJ ...\C64A64\BC\DEMO\DEMO1.EXE library header file demo1 source file BC project1 file demo1 execution file ...\C64A64\BC\DIAG\PIO.H ...\C64A64\BC\DIAG\PIO_PISO.C ...\C64A64\BC\DIAG\PIO_PISO.PRJ ...\C64A64\BC\DIAG\PIO_PISO.EXE library header file I/O source code BC project file I/O execution file ...\C64A64\MSC\LIB>*.* ...\C64A64\MSC\DEMO>*.* ...\C64A64\MSC\DIAG>*.* for library source code demo program source code pio_piso auto detect program ...\C64A64\MSC\LIB\PIO.H ...\C64A64\MSC\LIB\PIO.C ...\C64A64\MSC\LIB\MSCLIB.BAT ...\C64A64\MSC\LIB\MSCPIO_L.LIB ...\C64A64\MSC\LIB\MSCPIO_H.LIB ...\C64A64\MSC\LIB\IOPORT_L.LIB ...\C64A64\MSC\LIB\IOPORT_H.LIB library header file library source file batch compiler file I/O port large mode I/O port huge mode I/O port large mode I/O port huge mode ...\C64A64\MSC\DEMO\PIO.H ...\C64A64\MSC\DEMO\DEMO1.C ...\C64A64\MSC\DEMO\MAKE1.BAT ...\C64A64\MSC\DEMO\DEMO1.EXE library header file demo1 source file demo1 batch file demo1 execution file ...\C64A64\MSC\DIAG\PIO.H ...\C64A64\MSC\DIAG\PIO_PISO.C ...\C64A64\MSC\DIAG\MAKE1.BAT ...\C64A64\MSC\DIAG\PIO_PISO.EXE library header file I/O source code batch file I/O execution file PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 71 6.2 6.2.1 Diagnostic Program Diagnostic program for DOS /* -------------------------------------------------------------------------- */ /* Find all PIO_PISO series cards in this PC system */ /* Step 1: plug all PIO_PISO cards into PC */ /* Step 2: run PIO_PISO.EXE */ /* -------------------------------------------------------------------------- */ #include "PIO.H" WORD wBase,wIrq; WORD wBase2,wIrq2; int main() { int i,j,j1,j2,j3,j4,k,jj,dd,j11,j22,j33,j44; WORD wBoards,wRetVal; WORD wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice; char c; float ok,err; clrscr(); wRetVal=PIO_DriverInit(&wBoards,0xff,0xff,0xff); /*for PIO-PISO*/ printf("\nThere are %d PIO_PISO Cards in this PC",wBoards); if (wBoards==0 ) exit(0); printf("\n-----------------------------------------------------"); for(i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&wSubVendor, &wSubDevice,&wSubAux,&wSlotBus,&wSlotDevice); printf("\nCard_%d:wBase=%x,wIrq=%x,subID=[%x,%x,%x], SlotID=[%x,%x]",i,wBase,wIrq,wSubVendor,wSubDevice, wSubAux,wSlotBus,wSlotDevice); printf(" --> "); ShowPioPiso(wSubVendor,wSubDevice,wSubAux); } PIO_DriverClose(); } ! NOTE: the PIO_PISO.EXE file is valid for all PIO/PISO cards. Execute PIO_PISO.EXE to get the following information: A list all of PIO/PISO cards installed in this PC A list all of resources allocated to every PIO/PISO cards A list of wSlotBus & wSlotDevice for specified PIO/PISO card identification. PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 72 6.2.2 Diagnostic program for WINDOWS The PIO_PISO.EXE utility program will detect and present all information for PIO/PISO cards installed in the PC, as shown in the following figure. For more detailed information about this file, please refer to the “Readme.txt”. it is useful for all PIO/PISO series cards. The PIO_PISO.exe utility is located on the CD as below and is useful for all PIO/PISO series cards. CD:\NAPDOS\PCI\Utility\Win32\PIO_PISO\ http://ftp.icpdas.com/pub/cd/iocard/pci/napdos/pci/utility/win32/pio_piso/ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 73 6.3 Demo Program for PISO-P32C32 Series/P32S32WU/P32A32 Series 6.3.1 DEMO1 for PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V)/P32A32U /* -----------------------------------------------------------------------------*/ /* Demo 1: Digital Output of PISO-P32C32/P32A32 */ /* Step 1: The circuit diagram of hardware: refer to Sec 4.1 */ /* Step 2: run demo1.EXE */ /* ----------------------------------------------------------------------------- */ #include <dos.h> #include "PIO.H" int main() { char c; BYTE i; WORD wBoards,wRetVal; WORD wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice; clrscr(); wRetVal=PIO_DriverInit(&wBoards,0x80,0x08,0x20);/*for PISO-P32C32*/ 0x80,0x08,0x70);/*for PISO-P32A32*/ printf("\n(1) Threr are %d PISO-P32C32 Cards in this PC",wBoards); if ( wBoards==0 ) { putch(0x07); putch(0x07); putch(0x07); printf("\n(1) There are no PISO-P32C32 card in this PC !!!"); exit(0); } printf("\n(2) The Configuration Space -> wBase"); for(i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&wSubVendor,&wSubDevice,&wSubAux, &wSlotBus,&wSlotDevice); printf("\nCard_%d: wBase=%x,wIrq=%x,subID=[%x,%x,%x],SlotID=[%x,%x]" ,i,wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice); } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 74 /* step 1: enable all D/I/O port */ outportb(wBase,1); /* enable D/I/O */ /* step 2: Digital output from DO_0 to DO_31 */ while(1) { printf("\n\n --------- Digital output of PISO-P32C32 ------------"); for (i=1;i<=0x80;i=i<<1) { outportb(wBase+0xc0,i); /* DO_07 to DO_00 */ outportb(wBase+0xc4,i); /* DO_15 to DO_08 */ outportb(wBase+0xc8,i); /* DO_23 to DO_16 */ outportb(wBase+0xcc,i); /* DO_31 to DO_24 */ printf("\nD 31-0 Output Value = %02x,%02x,%02x,%02x",i,i,i,i); sleep(1); if(i==0x80) { i=0x01; break; } if (kbhit()!=0) { c=getch(); if ((c=='q') || (c=='Q') || c==27 ) return; } delay(1); } /* end of while */ } /* end of for */ PIO_DriverClose(); } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 75 6.3.2 DEMO2 for PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V)/P32A32U /*-------------------------------------------------------------------------------*/ /* Demo 2: Digital input of PISO-P32C32/P32A32 */ /* Step 1: The circuit diagram of hardware: refer to Sec 4.1 */ /* Step 2: run demo2.EXE */ /* ----------------------------------------------------------------------------- */ #include <dos.h> #include "PIO.H" int main() { WORD wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice; BYTE i,j1,j2,j3,j4; char c; WORD wBoards,wRetVal; clrscr(); wRetVal=PIO_DriverInit(&wBoards,0x80,0x08,0x20); /* for PISO-P32C32*/ 0x80,0x08,0x70); /* for PISO-P32A32*/ printf("\n(1) Threr are %d PISO-P32C32 Cards in this PC",wBoards); if ( wBoards==0 ) { putch(0x07); putch(0x07); putch(0x07); printf("\n(1) There are no PISO-P32C32 card in this PC !!!"); exit(0); } printf("\n(2) The Configuration Space -> wBase"); for(i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&wSubVendor,&wSubDevice,&wSubAux, &wSlotBus,&wSlotDevice); printf("\nCard_%d: wBase=%x,wIrq=%x,subID=[%x,%x,%x],SlotID=[%x,%x]" ,i,wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice); } /* step 1: enable all D/I/O port */ outportb(wBase,1); /* enable D/I/O */ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 76 /* step 2: digital input from DI_0 to DI_31 */ while(1) { for ( ; ; ) { printf("\n\n --------- Digital input of PISO-P32C32 ------------"); j1=inportb(wBase+0xc0)^0xff; /* DI_07 to DI_00 */ j2=inportb(wBase+0xc4)^0xff; /* DI_15 to DI_08 */ j3=inportb(wBase+0xc8)^0xff; /* DI_23 to DI_16 */ j4=inportb(wBase+0xcc)^0xff; /* DI_31 to DI_24 */ printf("\nD 31-0 Input Value = %02x,%02x,%02x,%02x",j4,j3,j2,j1); sleep(1); if(i==0x80) { i=0x01; break; } if (kbhit()!=0) { c=getch(); if ((c=='q') || (c=='Q') || c==27 ) return; } delay(1); } /* end of while */ } /* end of for */ PIO_DriverClose(); } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 77 6.3.3 DEMO3 for PISO-P32C32/P32C32U(-5V)/ P32S32WU/P32A32(-5V)/P32A32U /* ----------------------------------------------------------------------------- */ /* Demo 3: Digital I/O test of PISO-P32C32/P32A32 */ /* Step 1: The circuit diagram of hardware: refer to Sec 4.1 */ /* Step 2: run demo3.EXE */ /* ----------------------------------------------------------------------------- */ #include <dos.h> #include "PIO.H" int main() { WORD wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice; BYTE i,j1,j2,j3,j4; char c; WORD wBoards,wRetVal; clrscr(); wRetVal=PIO_DriverInit(&wBoards,0x80,0x08,0x20);/* for PISO-P32C32 */ 0x80,0x08,0x70);/* for PISO-P32A32 */ printf("\n(1) Threr are %d PISO-P32C32 Cards in this PC",wBoards); if ( wBoards==0 ) { putch(0x07); putch(0x07); putch(0x07); printf("\n(1) There are no PISO-P32C32 card in this PC !!!"); exit(0); } printf("\n(2) The Configuration Space -> wBase"); for(i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&wSubVendor,&wSubDevice,&wSubAux, &wSlotBus,&wSlotDevice); printf("\nCard_%d: wBase=%x,wIrq=%x,subID=[%x,%x,%x],SlotID=[%x,%x]" ,i,wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice); } /* step 1: enable all D/I/O port outportb(wBase,1); */ /* enable D/I/O */ /* step 2: DO_0 to DO_31 send to DI_0 to DI_31 */ while(1) { printf("\n\n --------- PISO-P32C32 test by itself ------------"); for (i=1;i<=0x80;i=i<<1) { outportb(wBase+0xc0,i); outportb(wBase+0xc4,i); outportb(wBase+0xc8,i); outportb(wBase+0xcc,i); delay(1); /* DO_07 to DO_00 */ /* DO_15 to DO_08 */ /* DO_23 to DO_16 */ /* DO_31 to DO_24 */ /* about to wait 1m sec */ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 78 j1=inportb(wBase+0xc0)^0xff; j2=inportb(wBase+0xc4)^0xff; j3=inportb(wBase+0xc8)^0xff; j4=inportb(wBase+0xcc)^0xff; /* DI_07 to DI_00 */ /* DI_15 to DI_08 */ /* DI_23 to DI_16 */ /* DI_31 to DI_24 */ printf("\nD 31-0 Output Value = %02x,%02x,%02x,%02x",i,i,i,i); printf("\nD 31-0 Input Value = %02x,%02x,%02x,%02x\n",j4,j3,j2,j1); if( i != j1 ) { printf("\nD I/O 7-0 error in here!\n"); putch(0x07); putch(0x07); putch(0x07); } if( i != j2 ) { printf("\nD I/O 15-8 error in here!\n"); putch(0x07); putch(0x07); putch(0x07); } if( i != j3 ) { printf("\nD I/O 24-16 error in here!\n"); putch(0x07); putch(0x07); putch(0x07); } if( i != j4 ) { printf("\nD I/O 31-25 error in here!\n"); putch(0x07); putch(0x07); putch(0x07); } if(i==j1 & i==j2 & i==j3 & i==j4) { printf("The Digital I/O test of PISO-P32C32 by itself OK!\n"); } if(i==0x80) { i=0x01; break; } if (kbhit()!=0) { c=getch(); if ((c=='q') || (c=='Q') || c==27 ) return; } delay(1); } /* end of while */ } /* end of for */ PIO_DriverClose(); } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 79 6.4 Demo Program for PISO-P64(U) /* ----------------------------------------------------------------------------- */ /* Demo 1: Digital Input of PISO-P64 */ /* Step 1: The circuit diagram of hardware: refer to Sec 4.2 */ /* Step 2: run demo1.EXE */ /* ----------------------------------------------------------------------------- */ #include <dos.h> #include "PIO.H" int main() { char c; BYTE i,r1,r2,r3,r4,r5,r6,r7,r8; WORD wBoards,wRetVal; WORD wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice; clrscr(); wRetVal=PIO_DriverInit(&wBoards,0x80,0x08,0x10); /* for PISO-P64 */ printf("\n(1) Threr are %d PISO-P64 Cards in this PC",wBoards); if ( wBoards==0 ) { putch(0x07); putch(0x07); putch(0x07); printf("\n(1) There are no PISO-P64 card in this PC !!!"); exit(0); } printf("\n(2) The Configuration Space -> wBase"); for(i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&wSubVendor,&wSubDevice,&wSubAux, &wSlotBus,&wSlotDevice); printf("\nCard_%d: wBase=%x,wIrq=%x,subID=[%x,%x,%x],SlotID=[%x,%x]" ,i,wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice); } /* step 1: enable all D/I/O port */ outportb(wBase,1); /* enable D/I/O */ /* step 2: Digital input from DI_0 to DI_63 while(1) { */ for ( ; ;) { printf("\n--------- Digital input of PISO-P64 ------------"); r1 =inportb(wBase+0xc0); /* DI_07 to DI_0 */ r2 =inportb(wBase+0xc4); /* DI_15 to DI_08 */ r3 =inportb(wBase+0xc8); /* DI_23 to DI_16 */ r4 =inportb(wBase+0xcc); /* DI_31 to DI_24 */ r5 =inportb(wBase+0xd0); r6 =inportb(wBase+0xd4); /* DI_39 to DI_32 */ /* DI_47 to DI_40 */ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 80 r7 =inportb(wBase+0xd8); r8 =inportb(wBase+0xdc); /* DI_55 to DI_48 */ /* DI_63 to DI_56 */ printf("\nThe CON1 of PISO-P64 ..."); printf("\nD31- 0 Input Value = %02x,%02x,%02x,%02x\n",r4,r3,r2,r1); printf("\nThe CON2 of PISO-P64 ..."); printf("\nD63-32 Input Value = %02x,%02x,%02x,%02x\n",r8,r7,r6,r5); sleep(1); if (kbhit()!=0) { c=getch(); if ((c=='q') || (c=='Q') || c==27 ) return; } delay(1); } /* end of while */ } /* end of for */ PIO_DriverClose(); } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 81 6.5 Demo Program for PISO-C64(U)/A64 /* ----------------------------------------------------------------------------- */ /* Demo 1: Digital Output of PISO-C64 */ /* Step 1: The circuit diagram of hardware: refer to Sec 4.3 */ /* Step 2: run demo1.EXE */ /* ----------------------------------------------------------------------------- */ #include <dos.h> #include "PIO.H" int main() { char c; BYTE i; WORD wBoards,wRetVal; WORD wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice; clrscr(); wRetVal=PIO_DriverInit(&wBoards,0x80,0x08,0x00); /* for PISO-C64 */ 0x80,0x08,0x50); /* for PISO-A64 */ printf("\n(1) Threr are %d PISO-C64 Cards in this PC",wBoards); if ( wBoards==0 ) { putch(0x07); putch(0x07); putch(0x07); printf("\n(1) There are no PISO-C64 card in this PC !!!"); exit(0); } printf("\n(2) The Configuration Space -> wBase"); for(i=0; i<wBoards; i++) { PIO_GetConfigAddressSpace(i,&wBase,&wIrq,&wSubVendor,&wSubDevice,&wSubAux, &wSlotBus,&wSlotDevice); printf("\nCard_%d: wBase=%x,wIrq=%x,subID=[%x,%x,%x],SlotID=[%x,%x]" ,i,wBase,wIrq,wSubVendor,wSubDevice,wSubAux,wSlotBus,wSlotDevice); } /* step 1: enable all D/I/O port */ outportb(wBase,1); /* enable D/I/O */ /* step 2: Digital output from DO_0 to DO_63 */ while(1) { printf("\n\n --------- Digital output of PISO-C64 ------------"); for (i=1;i<=0x80;i=i<<1) { outportb(wBase+0xc0,i); /* DO_07 to DO_00 */ outportb(wBase+0xc4,i); /* DO_15 to DO_08 */ outportb(wBase+0xc8,i) /* DO_23 to DO_16 */ outportb(wBase+0xcc,i); /* DO_31 to DO_24 */ outportb(wBase+0xd0,i); /* DO_39 to DO_32 */ outportb(wBase+0xd4,i); /* DO_47 to DO_40 */ outportb(wBase+0xd8,i); /* DO_55 to DO_48 */ PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 82 outportb(wBase+0xdc,i); /* DO_63 to DO_56 */ printf("\nThe CON1 of PISO-C64 ..."); printf("\nD31- 0 Output Value = %02x,%02x,%02x,%02x\n",i,i,i,i); printf("\nThe CON2 of PISO-C64 ..."); printf("\nD63-32 Output Value = %02x,%02x,%02x,%02x\n",i,i,i,i); sleep(1); if(i==0x80) { i=0x01; break; } if (kbhit()!=0) { c=getch(); if ((c=='q') || (c=='Q') || c==27 ) return; } delay(1); } /* end of while */ } /* end of for */ PIO_DriverClose(); } PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 83 7. Diagnostic Procedures 7.1 PISO-P64(U) Please follow the below steps to finish the test. Digital Input Test 1. Power-off the PC. 2. Refer to the hardware manual section 4.2; wire the DI to external signal(s) or switch(s) respectively. 3. Install the PISO-P64 card into an available PCI slot (5 V bus). 4. Power-on the PC with a bootable floppy disk or CD with MS-DOS. 5. Run the PISO-P64 DOS “Demo1.exe” program. 6. It shows how many PISO-P64 board(s) found in the screen. 7. Is the number correct? 8. It then gets status of the D/I channels. 9. Are these values correct? PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 84 7.2 PISO-P32C32 Series/P32S32WU/ P32A32 Series Please follow the below steps to finish the test. Digital Input and Digital Output Test 1. Power-off the PC. 2. Refer to the hardware manual section 2.1; select the external power for DI_0 to DI_15 and DI_16 to DI_31. 3. Refer to the hardware manual Section 2.2 and 2.3; wire the DO to DI respectively. 4. Install the PISO-P32C32/P32S32WU/P32A32 card into an available PCI slot (5 V bus). 5. Power-on the PC with a bootable floppy disk or CD with MS-DOS. 6. Run the PISO-P32C32 DOS “Demo3.exe” program. 7. It shows how many PISO-P32C32 board(s) found in the screen. 8. Is the number correct? 9. Does it show the following text in the screen? "The Digital I/O test of PISO-P32C32 by itself OK!" PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 85 7.3 PISO-C64(U)/A64 Please follow the below steps to finish the test. Digital Output Test 1. Power-off the PC. 2. Refer to the hardware manual section 4.3; wire the DO to LED indicator(s) respectively. 3. Install the PISO-C64/A64 card into an available PCI slot (5 V bus). 4. Power-on the PC with a bootable floppy disk or CD with MS-DOS. 5. Run the PISO-C64 DOS “Demo1.exe” program. 6. It shows how many PISO-C64/A64 board(s) found in the screen. 7. Is the number correct? 8. It then outputs to the DO channels. 9. Does these LED(s) flash correctly? PISO-P32C32/P32S32WU/P32A32/P64/C64/A64 User Manual (Ver.4.4, Aug. 2012, PMH-001-44) 86