Download PCL601MOD - Anaheim Automation
Transcript
Output Registers The PCL601 has a total of eight outputs, and these are mapped to a single 16-bit register as shown here. Ouput registers are referenced to as 0x. Address (0x) 1 Access Read/Write Description Outputs 1 - 8 Range 1 - 255 The output register holds the status of the outputs in the following arrangement: bits 16 - 8 0 bit 7 output 8 bit 6 output 7 bit 5 output 6 bit 4 output 5 bit 3 output 4 bit 2 output 3 bit 1 output 2 bit 0 output 1 Individual Inputs The PCL601 has a set of six user programmable inputs in addition to a set of limit switch inputs. Individual inputs are referenced to as 1x. Address (1x) 1 2 3 4 5 6 7 8 Access Read Read Read Read Read Read Read Read Description Input 1(1) Input 2 Input 3 Input 4 input 5 input 6 Hard Limit Soft Limit (1) Note that input 1 can also be configured as an analog input; in that case, input one will read as active at all times. Input Registers The PCL601 has a set of six user programmable inputs in addition to a set of limit switch inputs. These are mapped to a single 16-bit register. Input registers are referenced to as 3x. Address (3x) 1 Access Read Description Inputs 1 - 6 and Hard and Soft Limits The input register holds the status of the outputs in the following arrangement: bits 16 - 8 0 #L011268 bit 7 bit 6 Soft Limit Hard Limit bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 input 6 input 5 input 4 input 3 input 2 input 1 63 April 2015