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Using the Inline and Embedded Assemblers
Note
You can insert a BKPT instruction in C and C++ code by using the __breakpoint()
intrinsic.
•
LDR Rn, =expression pseudo-instruction. Use MOV Rn, expression instead. (This
can generate a load from a literal pool.)
•
LDRT, LDRBT, STRT, and STRBT instructions
•
MUL, MLA, UMULL, UMLAL, SMULL, and SMLAL flag setting instructions
•
MOV or MVN flag-setting instructions where the second operand is a constant
•
user-mode LDM instructions
•
ADR and ADRL pseudo-instructions.
See __breakpoint on page 4-75 in the Compiler Reference Guide.
7.1.4
Virtual registers
The inline assembler provides no direct access to the physical registers of an ARM
processor. If an ARM register name is used as an operand in an inline assembler
instruction it becomes a reference to a virtual register, with the same name, and not the
physical ARM register.
The compiler allocates physical registers to each virtual register as appropriate during
optimization and code generation. However, the physical register used in the assembled
code might be different to that specified in the instruction. You can explicitly define
these virtual registers as normal C or C++ variables. If they are not defined then the
compiler supplies implicit definitions for the virtual registers.
The compiler-defined virtual registers have function local scope, that is, within a single
function, multiple asm statements or declarations that reference the same virtual register
name access the same virtual register.
No virtual registers are created for the sp (r13), lr (r14), and pc (r15) registers, and they
cannot be read or directly modified in inline assembly code. See Legacy inline
assembler that accesses sp, lr, or pc on page 7-27 for information on how you can
modify your source code.
There is no virtual Processor Status Register (PSR). Any references to the PSR are
always to the physical PSR.
7-8
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