Download PLC-655 - Mds 2000

PLC-655
C&T65555
Flat Panel Control Board
©Copyright 1999 by ICP Electronics Inc. All Rights Reserved.
Manual first edition May01, 1999.
The information in this document is subject to change without prior
notice in order to improve reliability, design and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect,
special, incidental, or consequential damages arising out of the
use or inability to use the product or documentation, even if advised of the possibility of such damages.
This document contains proprietary information protected by
copyright. All rights are reserved. No part of this manual may be
reproduced by any mechanical, electronic, or other means in any
form without prior written permission of the manufacturer.
Contents
1. Introduction....................................................................... 2
1.1
Specifications..............................................................3
1
Introduction
2. Installation......................................................................... 4
2.1
PLC-655's Layout........................................................5
2.2
Unpacking Precautions…………………………………. 6
2.3
Jumper Setting ............................................................6
2.4
PLC-655'S Connector.. ...............................................9
Appendix A. FP24-01 Connection Module.......................... 12
Appendix B. LVDS-01 Connection Module......................... 14
Appendix C. LVDS-02 Connection Module......................... 16
Welcome to the PLC-655 Series. The PLC-655 is a PCI bus flat
panel graphic acceleration card. This card uses C&T 65555
LCD/CRT Controller Chips to support high resolution LCD/CRT
display panel. It is made for the SBCs that are not equipped with
LCD/CRT interface from the factory and is the best solution for
internal flat panel connection.
PLC-655 is a 50-pin LCD connector (TTL Signal) with FP24-01
Connection Module for extra 44-pin and 41-pin connectors. This
model is for internal flat panel connection application, for
example: for connection with LCD-Kit01, WS-842CD, MPC6020..etc.
PLC-655L1 is a One-Channel LVDS flat panel control board
which supports 18/24-bit LCD panel display. It is equipped with
on-board 50-pin LCD connector (TTL signal) and 44-pin D-sub
connector on the iron plate for one channel LVDS signal.
PLC-655L2 is a Two-Channel LVDS flat panel control board
with on-board 50-pin LCD connector (TTL signal) and 44-pin Dsub connector on the iron plate for two channel LVDS signal. It
supports 36-bit LCD panel display.
PLC-655
C&T 65555 Flat Panel Control Board
1
PLC-655
C&T 65555 Flat Panel Control Board
2
1.1
Specifications :
2
Bus : PCI bus
LCD/CRT Interface : C&T 65555 Chipset with 2MB Video DRAM
CRT Resolution :
1280 x 1024, 256
colors
1024 x 768, 64K
colors
800 x 600, 16M
colors
Installation
36-bit LCD Interface Resolution:
1280 x 1024, 256
colors
1024 x 768, 64K
colors
800 x 600, 16M
colors
This chapter describes how to install the PLC-655. The layout of
PLC-655 is shown on the next page and the Unpacking
Precautions that you should be careful with are described on
the following page. Also included is the jumpers and connectors
description for this PLC-655.
Output Connector :
LCD :
44-pin D-sub female LVDS Interface connector (CN1)
2x25 pin header LCD Interface connector (CN4)
CRT :
2.1
15-pin D-sub female connector (CN2)
PLC-655's Layout
2x5 box header/2.54mm connector
Output Voltage : 3.3 V or 5 V (selectable from JP5)
LCD Type :
TFT or DSTN (selectable from JP2)
Support 24-bit and 36-bit data signals
(please, refer to the next page)
PLC-655
C&T 65555 Flat Panel Control Board
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PLC-655
C&T 65555 Flat Panel Control Board
4
2.2
PLC-655's Layout
2.2
Unpacking Precautions
Some components on PLC-655 are very sensitive to static
electric charges and can be damaged by a sudden rush of
power. Ground yourself to remove any static charge before
touching your PLC-655 . You can do it by using a grounded wrist
strap at all times or by frequently touching any conducting
materials that is connected to the ground.
Disconnect power supply before handling and doing connection
on PLC-655. Do not plug any connector or jumper while the
power is on. It will cause fatal damage to your LCD panel.
Make sure that every connector is connected in correct direction.
Any incorrect connection may cause smoke or burn of electrical
parts or fatal damage of your LCD panel.
2.3
JUMPER SETTING
• JP1: FPVDD or FPVEE Selector
This jumper decides which signal is used to generate the panel
bias voltage VEE. The default setting is FPVEE.
PIN NO.
1-2
2-3
DESCRIPTION
USE FPVDD
USE FPVEE
• JP2 and JP3: TFT or DSTN Selector
Panel Type
TFT
DSTN
PLC-655
C&T 65555 Flat Panel Control Board
5
JP2
1-2
2-3
JP3
OFF
ON
PLC-655
C&T 65555 Flat Panel Control Board
6
• JP4: Output +12V and +5V Power Supply
JP4 supplies +12V and +5V voltage for any additional device or
application.
Warning: don’t short any two pins of this jumper. It will cause
short circuit.
PIN NO.
1
2
3
DESCRIPTION
VDD SAFE (+5V)
GND
+12V SAFE
• JP5: LCD VOLTAGE SETTING
PIN NO.
1-2
2-3
DESCRIPTION
3.3 V
5V
1
ON
ON
ON
ON
ON
ON
ON
ON
PIN NO.
2
3
ON ON
ON ON
ON OFF
ON OFF
OFF ON
OFF ON
OFF OFF
OFF OFF
4
ON
OFF
ON
OFF
ON
OFF
ON
OFF
RESOLUTION
#1: 1024x768 DSTN Color Panel
#2: 1280x1024 TFT Color Panel
#3: 640x480 DSTN Color Panel
#4: 800x600 DSTN Color Panel
#5: 640x480 Sharp 16-bit TFT Color Panel
#6: 640 x 480 18-bit TFT Color Panel
#7: 1024 x 768 TFT Color Panel 18bits
#8: 800 x 600 TFT Color Panel
• JP8: CN1 Pin40 Inverter ON/OFF Control
• JP7: SELECT BIOS
The BIOS used on PLC-655 is 128K Flash ROM. It is divided into
two segments, 64K each, BIOS 1 & BIOS 2. Each Segment is
programmed with 8 types of LCD resolution.
PIN NO.
1-2
2-3
• SW1: LCD PANEL TYPE SETTING (BIOS 2)
PIN NO.
1-2
2-3
DESCRIPTION
USE FPVEE
USE ENABKL
DESCRIPTION
BIOS 1
BIOS 2
• SW1: LCD PANEL TYPE SETTING (BIOS 1)
1
ON
ON
ON
ON
ON
ON
ON
ON
PIN NO.
2
3
ON ON
ON ON
ON OFF
ON OFF
OFF ON
OFF ON
OFF OFF
OFF OFF
4
ON
OFF
ON
OFF
ON
OFF
ON
OFF
RESOLUTION
#1: 1024x768 DSTN Color Panel
#2: 1280x1024 TFT Color Panel
#3: 640x480 DSTN Mono Panel
#4: 800x600 DSTN Color Panel
#5: 640x480 Sharp 16-bit TFT Color Panel
#6: 640 x 480 18-bit TFT Color Panel
#7: 1024 x 768 TFT Color Panel 36bits
#8: 800 x 600 TFT Color Panel
PLC-655
C&T 65555 Flat Panel Control Board
7
PLC-655
C&T 65555 Flat Panel Control Board
8
13
15
2.4
PLC-655’S CONNECTOR
FUNCTION
+12V
+12V
GND
GND
+5V
+5V
KBVCC
GND
SOUT
SIN
RTS
TX0TX0+
TX1TX1+
TX10TX10+
TX11TX11+
TX12TX12+
TX1CLK-
PIN NO
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
PIN NO. DESCRIPTION
1
RED
2
GREEN
3
BLUE
4
HS
5
VS
FUNCTION
TX1CLK+
TX20TX20+
TX2TX2+
TXCTXC+
TX21TX21+
DSR
CTS
DTR
TX22TX22+
TX2CLKTX2CLK+
GND
JP8
KBDAT
KBCLK
TX3+
TX3-
NC
PIN NO.
2
4
6
8
10
12
PLC-655
C&T 65555 Flat Panel Control Board
PIN NO.
6
7
8
9
10
DESCRIPTION
NC
NC
GND
GND
GND
• CN4: 25X2 header LCD Connector
PIN NO. DESCRIPTION
1
VPCLK
3
P34P
5
P35
7
P30
9
P39
11
P25
13
P24
15
P23
17
P16
19
P17
21
P19
23
P13
25
P15
27
P7
29
PLCD
31
P9
33
P4
35
P3
37
P2
39
M
41
SHFCLK
43
FPVDD
45
FPVEE
47
GND
49
+12V
• CN2: DSub-15pin CRT (VGA monitor) Connector
(connect to CRT Panel)
PIN NO. DESCRIPTION
1
RED
3
BLUE
5
VS
7
NC
9
GND
11
NC
14
• CN3: 5X2 header CRT Connector
• CN1: Dsub-44pin LVDS-LCD Connector
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NC
NC
DESCRIPTION
GREEN
HS
NC
GND
GND
NC
9
PIN NO.
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
PLC-655
C&T 65555 Flat Panel Control Board
DESCRIPTION
P33
P31
P32
P28
P27
P26
P21
P22
P20
P18
P14
P12
P11
P10
PLCD
P8
P6
P5
P1
P0
ENABLK
FLM
LP
GND
+12V
10
• CN5: Keyboard Connector (connect to CPU card)
Appendix A. FP24-01 Connection Module
PIN NO. DESCRIPTION
1
KB-CLK
2
KB-DAT
3
NC
4
GND
5
+5V
The FP24-01 converts PLC-655’s on board 50pin LCD interface
signal to the 44-pin and 41pin (Hirose DF9-41P-1V) LCD
connectors. The 44-pin or 41-pin connector will only support 24-bit
flat panel.
• CN6: 5X2 header RS-232 Connector (connect to CPU card)
PIN NO. DESCRIPTION
1
NC
2
SIN
3
SOUT
4
DTR
5
GND
PIN NO.
6
7
8
9
10
PLC-655
C&T 65555 Flat Panel Control Board
DESCRIPTION
DSR
RTS
CTS
NC
NC
11
• J3 : 44-pin LCD Interface Connector
PIN NO.
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
DESCRIPTION
+12V
GND
5V/3.3V
FPVEE
P0
P2
P4
P6
P8
P10
P12
P14
P16
P18
P20
P22
GND
SHFCLK
M
GND
NC
FPVDD
PIN NO.
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
PLC-655
C&T 65555 Flat Panel Control Board
DESCRIPTION
+12V
GND
5V/3.3V
GND
P1
P3
P5
P7
P9
P11
P13
P15
P17
P19
P21
P23
GND
FLM
LP
ENABKL
NC
5V/3.3V
12
• J1 : 41-pin LCD Interface Connector
PIN NO.
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
DESCRIPTION
P20
P16
P21
P17
P22
P18
P23
P19
5V or 3.3V
FLM
M
LP
SHFCLK
5V or 3.3V
5V or 3.3V
ENABKL
FPVDD
FPVEE
GND
GND
N/C
PIN NO.
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
Appendix B. LVDS-01 Connection Module
DESCRIPTION
GND
5V or 3.3V
P0
P8
P1
P9
P2
P10
P3
P11
P4
P12
P5
P13
P6
P14
P7
P15
+12V
+12V
(One Channel LVDS Piggy Back Module)
The LVDS-01 supports the TFT LCD which equipped the
1pixel/clock for LVDS Interface.
1.
• JP2 : Hirose DF14A-20P-1.25H LVDS Connector
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
• J2 : LCD Backlight Power Connector
PIN NO.
1
2
3
4
5
DESCRIPTION
N/C
GND
+12V
GND
FPVEE Inverter Enable
PLC-655
C&T 65555 Flat Panel Control Board
CONNECTOR DESCRIPTION
13
DESCRIPTION
PLCD
PLCD
GND
GND
TX0TX0+
GND
TX1TX1+
GND
TX2TX2+
GND
TXCTXC+
GND
TX3TX3+
GND
PLC-655
C&T 65555 Flat Panel Control Board
14
20
GND
Note : PLCD is a power supply from CPU board which can be set
as +3V or +5V. See the CPU board’s user manual for this setting.
• J4 : LCD Backlight Inverter’s Power Connector
PIN NO.
1
2
3
4
5
Appendix C. LVDS-02 Connection Module
DESCRIPTION
N/C
GND
12V (0.9A)
GND
FPVEE
(Two Channels LVDS Piggy Back Module)
The LVDS-02 supports the TFT LCD which equipped the 2
pixels/clock for LVDS interface.
FPVEE: power sequencing control for panel bias voltage VEE, it
may be configured also as ENABKL
2.
1.
JUMPER SETTING
• CN1 : Hirose DF14A-20P-1.25H LVDS Connector
• J1 :
PIN NO.
1
2
3
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
DESCRIPTION
SHFCLK
DCLK
VPCLK
1-2 ON: for TFT application (default)
2-3 ON: for DSTN LCD application
• J2 :
PIN NO.
1
2
CONNECTOR DESCRIPTION
DESCRIPTION
PDATA
SHFCLK
OFF: for TFT application
ON: for DSTN LCD application
PLC-655
C&T 65555 Flat Panel Control Board
15
DESCRIPTION
PLCD
PLCD
GND
GND
TX10TX10+
TX11TX11+
TX12TX12+
TX1CLKTX1CLK+
TX20TX20+
TX21TX21+
TX22TX22+
PLC-655
C&T 65555 Flat Panel Control Board
16
19
20
TX2CLKTX2CLK+
Note : PLCD is a power supply from CPU board which can be set
as +3V or +5V. See the CPU board’s user manual for this setting.
• J3 : LCD Backlight Inverter’s Power Connector
PIN NO.
1
2
3
4
5
DESCRIPTION
N/C
GND
12V (0.9A)
GND
FPVEE
FPVEE: power sequencing control for panel bias voltage VEE, it
may be configured also as ENABKL
PLC-655
C&T 65555 Flat Panel Control Board
17
PLC-655
C&T 65555 Flat Panel Control Board
18