Download VM162/VM172

VM162/VM172
Chapter
2
Functional Description
2.1
2.2
2.3
VM162/VM172 Block Diagram..................................................... 2-3
CPU Options ................................................................................. 2-4
Memory..........................................................................................2-4
2.3.1
2.3.2
2.3.3
2.3.4
2.4
Communication Controller 68EN360 (QUICC) ...........................2-6
2.4.1
2.4.2
2.4.3
2.4.4
2.5
Real Time Clock ..........................................................................................2-18
Serial EEPROM ..........................................................................................2-18
TICK Timer .................................................................................................2-18
General Purpose Timer...............................................................................2-18
DMA Transfers............................................................................................2-18
Data Retention for RTC and SRAM ............................................................2-19
Front Panel Buttons and LED Ports...........................................................2-19
Serial Communication Ports ....................................................... 2-20
2.8.1
2.8.2
Juli 23, 1997
Boot Decoder Logic ....................................................................................2-14
Interrupt Control.........................................................................................2-14
Bus Timer ....................................................................................................2-16
Watchdog Timer ..........................................................................................2-16
Board Control/Status Register ....................................................................2-16
Special Functions ........................................................................ 2-18
2.7.1
2.7.2
2.7.3
2.7.4
2.7.5
2.7.6
2.7.7
2.8
VME Master Interface...................................................................................2-9
System Controller Functions.......................................................................2-10
VME Slave Interface ...................................................................................2-11
VME Address Map from the VME Side.......................................................2-12
VME Control/Status Register......................................................................2-13
Board Control Logic ................................................................... 2-14
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
2.7
Use of 68EN360 Communication Ports ........................................................2-6
Use of 68EN360 Memory Controller ............................................................2-7
Use of 68EN360 Interrupt Controller ...........................................................2-7
Use of 68EN360 DMA Channels...................................................................2-8
VMEbus Interface..........................................................................2-8
2.5.1
2.5.2
2.5.3
2.5.4
2.5.5
2.6
DRAM/FLASH...............................................................................................2-4
SRAM.............................................................................................................2-5
Boot ROM (optional).....................................................................................2-5
EEPROM.......................................................................................................2-6
Ethernet/SER4 Port.....................................................................................2-21
SER1, SER2 and SER3 Ports ......................................................................2-22
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