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5.3.3.2 Compiling to Flash
For flash compiles, flash memory is mapped to banks 0 and 1 (address range 0x00000 to 0x7FFFF). RAM
is mapped to banks 2 and 3 (address range 0x80000 to 0xFFFFF).
RAM
Register Settings
MMIDR = 0x29
SEGSIZE = 0xD3
DATASEG = 0x0
Stacks, xalloc,
etc.
Data
0xCFFF
Root Data
0x8D000
0x3000
Root Data
Constants
0x83000
0x0000
Instruction
0x80000
0xCFFF
Flash
Root Code
0x3000
Stack Space/
Watch Code
Root Code
Xmem Code
continued
0x0000
0x13000
Shared
0x10000
0xFFFF
Xmem
0xE000
0xD000
Root Constants
Xmem Code
0x0D000
Stack
Root Code
0x03000
0x00000
Root Code
The BIOS sets the MMIDR to 0x29 to enable the I&D space for flash compilation. Bit 5 of this register
enables the I&D split, bit 0 enables inversion of A16 for the data space base segment (i.e., the logical
address space for constants) and bit 3 enables inversion of A19 for the data space data segment (i.e., the
logical address space for root data).
Rabbit 3000 Designer’s Handbook
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