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ALICE/ITS/SSD/EndCapModules
NIKHEF Amsterdam.R.Kluit,
8-7-2003
Contents
Contents ......................................................................................................................................................... 2
List of figures:................................................................................................................................................ 3
Changes in ALCAPONE1 ................................................................................................................................. 3
1
Introduction ........................................................................................................................................... 4
2
Functional description .......................................................................................................................... 4
2.1
LVDS and CMOS buffers/repeaters ........................................................................................... 4
2.1.1
Low Power LVDS AC input.............................................................................................. 5
2.1.2
LVDS driver with disable function.................................................................................... 5
2.1.3
CMOS AC input ................................................................................................................ 5
2.1.4
CMOS output..................................................................................................................... 5
2.2
Readout and Token (delays) ........................................................................................................ 5
2.3
Power regulator ............................................................................................................................ 6
2.3.1
Shunt regulator................................................................................................................... 6
2.3.2
Power supply regulator ...................................................................................................... 7
2.4
Adc ................................................................................................................................................. 8
2.5
Error Handling ............................................................................................................................. 8
2.6
JTAG logic....................................................................................................................................... 8
2.6.1
Instruction register ............................................................................................................. 9
2.6.2
IdCode................................................................................................................................ 9
2.6.3
Bypass................................................................................................................................ 9
2.6.4
Extest ................................................................................................................................. 9
2.6.5
INTEST .............................................................................................................................. 10
2.6.6
SAMPLE/PRELOAD ............................................................................................................ 11
2.6.7
ENDCAPSTATUS................................................................................................................ 11
2.6.8
POWERCONTROL .............................................................................................................. 12
2.6.9
DELAYCONTROL .............................................................................................................. 12
2.6.10
CHIPCOUNT ...................................................................................................................... 13
2.6.11
POWERREFERENCE ........................................................................................................... 13
2.6.12
ADC .................................................................................................................................. 13
2.6.13
ADCINPUT ........................................................................................................................ 13
2.6.14
ERRORMASK .................................................................................................................... 13
2.6.15
RESET ............................................................................................................................... 14
2.7
3
ALCAPONE
ALCAPONE
reset functions .......................................................................................................... 14
Pin descriptions.................................................................................................................. 15
3.1
LVDS receivers & drivers pins for AC coupling ..................................................................... 15
3.2
JTAG signal pins ........................................................................................................................ 15
3.3
Power supply pins....................................................................................................................... 15
3.4
Miscellaneous pins ...................................................................................................................... 16
3.5
Test Pads (internal pads in chip area) ...................................................................................... 16
3.6
Specials ........................................................................................................................................ 16
3.6.1
ALCAPONE0: ..................................................................................................................... 16
3.6.2
ALCAPONE1: ..................................................................................................................... 17
4
Connections by functional position in EndCap:................................................................................. 18
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