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Download Intel Xeon Processor with 800 MHz System Bus, Intel E7520
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System Overview—Intel® Xeon™ Processor with 800 MHz System Bus, Intel® E7520 Chipset, and Intel® 6300ESB ICH Development Kit 5.3 Platform Resets Figure 7 depicts the reset logic for the CRB. The Intel 6300ESB I/O Controller provides most of the reset following assertion of power good and system reset. However, the glue logic within the SIO is also used to buffer reset to PXH, MCH, FWH, and IDE. Platform Reset Diagram PCI 32 PCI-X VRM_PWRGD PCI-X FWH Port 80 MCH Intel® 6300ESB I/O Controller Hub IDE CPU 0 CPURST# PCIRST_N SYS_RESET# IDERST# PCIRST2# PCIRST1# SIO SYS_PWRGD_3V3 CPU 1 ITP-700 PXH_PBPCIRST_N PXH PCI-E PXH_PAPCIRST_N Figure 7. PCI-X PCI-X PCI-X B2938-03 Intel® Xeon® Processor with 800 MHz System Bus, Intel® E7520 Chipset, and Intel ® 6300ESB ICH Development Kit March 2007 UG Order Number: 300281-006US 27
