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PLASMA TV
SERVICE MANUAL
CHASSIS : PD12A
MODEL : 50PZ950
50PZ950-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL66982501(1012-REV00)
Printed in Korea
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................6
BLOCK DIAGRAM....................................................................................................................11
EXPLODED VIEW .................................................................................................................. 12
CIRCUIT DIAGRAM .....................................................................................................................
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in
the Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Leakage Current Hot Check (See below Figure)
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it
with the specified.
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC
voltage measurements for each exposed metallic part. Any
voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Due to high vacuum and large surface area of picture tube,
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect
an electrical jumper across the two AC plug prongs. Place the
AC switch in the on position, connect one lead of ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna
terminals, phone jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-3-
To Instrument's
exposed
METALLIC PARTS
0.15uF
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
1.5 Kohm/10W
LGE Internal Use Only
SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.
V
Application Range
This spec is applied to PDP TV used PD12A Chassis.
Model Name
Market Place
Brand
Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark,
Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,
50PZ950-ZA
Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, Norway,
LG
Poland, Portugal, Romania, Russia, Serbia, Slovakia, Slovenia, Spain,
Sweden, Switzerland, Turkey, Ukraine, UK
V
Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.
V
Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification
EMC : CE, IEC
Model Name
Remark
Market
Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia, Czech, Denmark,
50PZ950-ZA
Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy,
Safety : IEC/ EN60065,
Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands,
EMI : EN55013
Norway, Poland, Portugal, Romania, Russia, Serbia, Slovakia,
EMS : EN55020
Slovenia, Spain, Sweden, Switzerland, Turkey, Ukraine, UK
V
Module Specification
(1) 3D 50” FHD
No
Item
1
Display Screen Device
Specification
2
Aspect Ratio
16:9
3
PDP Module
PDP50R3####,
127 cm (50 inch) wide Color Display Module
Remark
PDP
RGB Closed (Well) Type, Glass Filter (43%)
Pixel Format: 1920 horiz. By 1080 ver.
4
Operating Environment
1) Temp. : 0 deg ~ 40 deg
2) Humidity : 20 % ~ 80%
5
Storage Environment
LGE SPEC
3) Temp. : -20 deg ~ 60 deg
4) Humidity : 10 % ~ 90 %
6
Input Voltage
AC 100 V ~ 240 V, 50 / 60 Hz
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-4-
Maker LG
LGE Internal Use Only
V
Model General Specification
No
1
Item
Specification
Remarks
Market
Albania, Austria, Belgium, Bosnia, Bulgaria,
36 Country
Coratia, Czech, Denmark, Estonia, Finland, ,
France, Germany, Greece, Hungary, Ireland,
Italy, Kazakhstan, Latvia, Lithuania, Luxembourg,
Morocco, Netherlands, Norway, Poland, Portugal,
Romania, Russia, Serbia, Slovenia, Spain, Sweden,
Slovakia, Switzerland, Turkey, Ukraine, UK
2
Broadcasting system
1) PAL/SECAM BG
EU (PAL Market)
2) PAL/SECAM DK
3) PAL Ⅰ/Ⅱ
4) SECAM L/L’
5) DVB T / T2
Supporting T2 is only for **PZ***T./W
6) DVB C
7) DVB S
3
Receiving system
Supporting S is only for **PZ***S/G
Analog : Upper Heterodyne
G
Digital : COFDM
- Guard Interval(Bitrate_Mbit/s)
DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK
: 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
G
DVB-C
- Symbolrate :
4.0Msymbols/s to 7.2Msymbols/s
- Modulation :
16QAM, 64-QAM, 128-QAM and 256- QAM
G
DVB-S
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5,
5/6, 8/9, 9/10
4
Scart Jack (1EA)
PAL, SECAM
Scart 1 Jack is Full scart and support
RF-OUT(Analog), MNT-OUT
5
Video Input (1EA)
PAL, SECAM, NTSC
Side AV
6
Component Input (1EA)
Y/Cb/Cr, Y/ Pb/Pr
7
RGB Input
RGB-PC
Analog (D-Sub 15Pin)
8
HDMI Input (4EA)
HDMI-PC
HDMI/DTV,HDMI2, HDMI3, HDMI4
HDMI-DTV
9
Audio Input (3 EA)
RGB/DVI Audio, Component, AV
10
SPDIF Out(1 EA)
SPDIF Out
11
USB(2EA)
For SVC, S/W Download, X-Studio, DivX
12
Ethernet LAN
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-5-
L/R Input
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
* Each Chassis has it’ own MAC Address. Please be careful of
download.
1. Application Range
This spec sheet is applied to all of the PD12A chassis.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep 100 V ~ 240
V, 50 / 60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 °C
- In case of keeping module is in the circumstance of 0 °C,
it should be placed in the circumstance of above 15 °C
for 2 hours
- In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above
15 °C for 3 hours,.
3-2. ADC Adjustment
After RGB Full White in HEAT-RUN Mode, the receiver
must be operated prior to the adjustment.
O Enter into HEAT-RUN MODE
1) Press the POWER ON KEY on R/C for adjustment.
2) OSD display and screen display PATTERN MODE.
- Set is activated HEAT run without signal generator in this
mode.
- Single color pattern ( WHITE ) of HEAT RUN MODE uses
to check panel.
- Caution : If you turn on a still screen more than 20
minutes (Especially digital pattern, cross hatch
pattern), an after image may be occur in the
black level part of the screen.
O
3. PCB assembly adjustment
method
Caution: Using ‘power on’ button of the control R/C power on
TV.
3-1. Download MAC Address,
CI+ Key and widevine Key.
O
Auto-control adjustment protocol(RS-232C)
Order
1. Inter the
Adjustment
mode
2. Change the
Source
Command
aa 00 00
3. Start
Adjustment
4. Return the
Response
5. Read data
Adjustment
data
ad 00 10
6. Confirm
Adjustment
7. End of
Adjustment
XB 00 40
XB 00 60
( main )
ad 00 20
( main )
ad 00 30
ad 00 99
ad 00 90
Set response
a 00 OK00x
b 00 OK40x (Adjust 480i Comp1 )
(Adjust 1080p Comp1)
b 00 OK60x (Adjust 1080p RGB)
OKx ( Success condition )
NGx ( Failed condition )
(main : component1 480i, RGB 1080p)
00000000000000000000000007c007b006dx
(main : component1 480i, RGB 1080p)
000000070000000000000000007c00830077x
NG 03 00x (Failed condition)
NG 03 01x (Failed condition)
NG 03 02x (Failed condition)
OK 03 03x (Success condition)
d 00 OK90x
(1) Adjustment of RGB
1) Convert to PC in Input-source.
2) Signal equipment displays
Output Voltage: 700 mVp-p
Impress Resolution FHD (1920 x 1080 @ 60Hz)
Model : 225 in Pattern Generator
Pattern : 65 in Pattern Generator
(MSPG-925 SERISE)
* Connect TV SET and PC which download keys Writing
program by RS232C-Cable
(1) Start Program and Click ‘start’ Button to connect TV and
PC.
(2) When download succeed, you can see “OK” on the
screen.
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
-6-
3) Adjust by commanding AUTO_COLOR_ADJUST
LGE Internal Use Only
(2) COMPONENT input ADC
V Convert to Component in Input-source.
V Signal equipment displays
Impress Resolution 480i
MODEL: 209 in Pattern Generator(480i Mode)
PATTERN : 65 in Pattern Generator
(MSPG-925 SERISE)
Impress Resolution 1080i
MODEL: 225 in Pattern Generator(1080P Mode)
PATTERN: 65 in Pattern Generator
(MSPG-925 SERISE)
3-3. DFT Process.
* Depend on situation, Step can be changed.
No
STEP
1
DFT Mode-In
2
Tool Option Write
3
AREA Option Write
4
[RF]RF CHECK
5
[RF]<DTV>EYE
6
[COMP1]Color Test
7
[RGB]Color Test
8
Version Check
9
Wireless Check
10
Motion Check
11
CI Card detect Check
12
3-4. Insert Tool OPTION
and Model Name download.
(1) Press IN_START key on R/C to insert Tool OPTION
(2) On the “ Tool Option ”, Insert Tool Option by a number key
(3) Press the ENTER(V)
(4) Press ENTER(V) again.
(5) Select “OK to Download” by using F/G(VOL +/-) and press
G(VOL +)
PZ950
PZ750
PZ570
50 INCH
32777
32793
32809
60 INCH
32781
32797
32813
50 INCH
65
130
195
60 INCH
65
130
195
Tool option 3
19807
19807
19743
Tool option 4
7348
7348
7348
CI Key Check
Tool option 5
14921
14921
14920
13
EDID Write
Tool option 6
857
857
857
14
[AV2]Color Test
15
KEY1 Test
16
KEY2 Test
17
[HDMI1]Color Test
18
[HDMI2]Color Test
19
[HDMI3]Color Test
20
[HDMI4]Color Test
21
[TV]USB2 Audio Test
22
SPDIF OUT Audio Test
23
[AV1]Color Test
24
[TV]<AV1-OUT>Color Test
25
[AV1]Scart_RGB Color Test
26
[TV]USB1 Audio Test
27
LAN Port Check
28
3D Check
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Model Name
Tool Option 1
Tool Option 2
3-5. EDID(The Extended Display
Identification Data) download
(1) Press the ADJ KEY on R/C and enter EZ ADJUST.
(2) Select “5.EDID D/L” by using D / E (CH +/-) and press
ENTER(V).
(3) Select “Start” and press navigation key(G).
(4) EDID download is executed automatically.
(5) Press EXIT key on R/C
* Caution
- Never connect HDMI & D-sub Cable when the user
download EDID .
-7-
LGE Internal Use Only
* EDID DATA
4-2. Download Serial number (RS-232C)
V
Press “Power on” key of service R/C.
(Baud rate : 115200 bps)
V Connect RS232 Signal Cable to RS-232 Jack.
V Write Serial number by use RS-232.
V Must check the serial number at the Diagnostics of SET UP
menu.
(Refer to below ‘6.SET INFORMATION’).
(1) RGB
4-3. Adjustment of White Balance
(2) HDMI
Required Equipment
O Remote controller for adjustment
O Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same
produc: CH 10 (PDP)
* Please adjust CA-210, CA-100+ by CS-1000 before
measuring
O Auto W/B adjustment instrument(only for Auto adjustment)
O 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B
EQUIPMENT.
Before Adjust of White Balance, Please press POWER ONLY
key
Adjust Process will start by execute RS232C Command.
O Color temperature standards according to CSM and Module
3-6. Confirmation
(1) Press ‘InStart’ Key on Factory SVC Remote Controller.
And MUST check ADC & EDID ADJ status is OK.
O
4. SET assembly adjustment method
* Caution : Each PCB assembly must be checked by check JIG
set. (Because power PCB Assembly damages to PDP
Module, especially be careful)
Test equipment : D.M.M 1EA
Connection Diagram for Measuring : refer to fig.4
Adjustment method
(1) Va adjustment
1) Connect + terminal of D. M.M. to Va pin of P811,
connect -terminal to GND pin of P811.
2) After turning VR901,voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top
(deviation; ±0.5V)
(2) Vs adjustment
1) Connect + terminal of D. M..M. to Vs pin of P811,
connect -terminal to GND pin of P811.
2) After turning VR951, voltage of D.M.M adjustment as
same as Vs voltage which on label of panel right/top (
deviation ; ±0.5V)
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
PLASMA
Cool
11000K
Medium
9300K
Warm
6500K
CS-1000/CA-100+/CA-210(CH 10) White balance
adjustment coordinates and color temperature.
CSM
4-1.POWER PCB Assembly Voltage
adjustment (Va/Vs Voltage Adjustment)
CSM
Color Coordinate
Temp
±Color Coordinate
0.283
11000K
0.002
0.285
0.293
9300K
0.002
0.313
0.329
6500K
0.002
x
y
Cool
0.276
Medium
Warm
* Manual W/B process (using adjusts Remote control)
Please Adjust in AV 1 MODE, Turn off Energy Saving Mode.
(1) Enter ‘PICTURE RESET’ on Picture Mode, then turn off
Fresh Contrast and Fresh colour in Advanced Control
(2) After enter Service Mode by pushing “ADJ” key,
(3) Enter White Pattern off of service mode, and change off ->
on.
(4) Enter “W/B ADJUST” by pushing “ G ” key at “3. W/B
ADJUST”.
* Gain Max Value is 192. So, Never make any Gain Value over
192 and please fix one Value on 192, between R, G and B.
-8-
Min
Tpy
Max
R-GAIN
0
192
192
G-GAIN
0
192
192
B-GAIN
0
192
192
LGE Internal Use Only
* Auto-control interface and directions
(1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10ux).
(2) Measure and adjust after sticking the Color Analyzer (CA100+, CA210 ) to the side of the module.
(3) Aging time
After aging start, keep the Power on (no suspension of
power supply) and heat-run over 5 minutes
4-6. Checking the EYE-Q Operation.
4-4. Serial number download & Model
name D/L and Check Tool Option.
(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12)
* IF you press IN-STAP Button, change Green Eye-check OSD.
(1) Press "Power on" button of a service R/C.(Baud rate :
115200 bps)
(2) Connect RS232-C Signal Cable and start ‘Option Check
Program Ver3.8’
(3) Scan serial Number and press ‘F5’ button.
(4) Check ‘OK’ on program (1) program.
(5) Press ‘In start’ button on SVC R/C, check Serial Number
and Model Name.
(1) Press the EYE Key on the adjustment remote controller.
(2) Check the Sensor DATA ( It must be under 10) and keep
the data longer than 1.5s
(3) Check ‘OK’
4-7. Ping TEST
* This test is to check Network operation.
(1) Equipment Setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
*IP Number : 12.12.2.2
(2) LAN PORT inspection (PING TEST)
* In this case Network setting is on Manual Setting.
1) Play the LAN Port Test Program.
2) connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) remove LAN CABLE
4-5. Check Tool Option and write Country
Group & Area Code(Option) D/L
Model Name
Tool Option 1
Tool Option 2
PZ950
PZ750
PZ570
50 INCH
32777
32793
32809
60 INCH
32781
32797
32813
50 INCH
65
130
195
60 INCH
65
130
195
19807
19807
19743
Tool option 3
Tool option 4
7348
7348
7348
Tool option 5
14921
14921
14920
Tool option 6
857
857
857
0
0
0
Area option / Code
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
(3) Check Wireless function.
1) Connect set and Dongle of Wireless to Cable of HDMI &
TTA 20Pin
2) At OSD of SET, check the message like Fig 3.
3) Detach Cable of Wireless Dongle
-9-
LGE Internal Use Only
(1) On 3D Mode, Check the picture like below.
4-8. Magic Motion Remote Controller test
Required Equipment
- RF Remote Controller for test, IR-KEY-Code Remote
Controller for test
* You must confirm the battery power of Remote Controller
before test
(Recommend that change the battery per every lot)
(1) If you select the ‘start key(Mute)’ on the controller, you can
pairing with the TV SET.
(2) You can check the cursor on the TV Screen, when select
the ‘OK Key’ on the controller
(3) You must remove the pairing with the TV Set by select
‘Vol+(STOP) Key’ on the controller
(2) If RF Emitter is correctly working, you can see that the
lamp of RF tester turns on.
4-9. 3D Function Test
Required Equipment
O Pattern Generator : MSHG-600, MSPG-6100 [SUPPORT
HDMI1.4])
MODE : HDMI mode NO. 872
Pattern No.83
(1) Please input 3D test pattern like below (HDMI mode NO.
872 , pattern No.83)
5. Set Information
(Serial No & Model name)
5-1. Check the serial number
& Model Name
(1) Push the menu button in DTV mode.
(2) Check the Serial Number
Select the STATION -> Diagnostics -> To set
(2) When 3D OSD appear automatically, then press OK button
on ADJ Remote Controller.
(3) Check the picture. The picture must be same as below.
(Don’t have to wear 3D glasses.)
6. SW Download Guide.
* Put a *.bin to USB Stick and Turn on TV
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
* If your downloaded program version in USB Stick is Low,
it didn’t work.
But your downloaded version is High, USB data is
automatically detecting.
(3) Show the message “Copying files from memory”
(4) Updating is staring.
(5) Updating Completed, The TV will restart automatically.
After turn on TV, Please press ‘IN-STOP’ button on ADJ
Remote-control.
* IF you don’t have ADJ R/C, enter ‘Factory Reset’ in
OPTION MENU.
(6) When TV turn on, check the Updated version on
Diagnostics MENU.
4-10. Check RF Emitter.
Required Equipment
- Pattern Generator : 3D-GT002, MSHG-600,
MSPG-6100 [SUPPORT HDMI1.4])
MODE : HDMI mode NO. 872
Pattern No.83
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 10 -
LGE Internal Use Only
BLOCK DIAGRAM
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 11 -
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
900
910
602
205
580
590
A9
A12
A21
A2
570
305
540
A4
560
A23
A13
300
LV1
120
304
A10
203
202
302
301
204
207
201
303
501
206
200
208
209
604
520
601
240
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
- 12 -
LGE Internal Use Only
Strap Setting
NAND FLASH MEMORY
8Gbit
+3.3V_Normal
Boot ROM Device Select - (FA4,FAD7,FAD2,FAD1)
+3.3V_Normal
IC102
K9F8G08U0M-PCB0
NC_1
2.7K
NC_2
NC_3
R107
NC_4
NC_5
OPT
Open Drain
NC_6
0
R133
R/B
NAND_RBb
RE
NAND_REb
CE
NAND_CEb
OPT
NAND_CEb2
NC_7
0
R149
4700pF
NC_8
C102
C101
VCC_1
0.1uF
VSS_1
NC_9
NC_10
CLE
NAND_CLE
ALE
NAND_ALE
WE
NAND_WEb
WP
+3.3V_Normal
NC_11
4.7K
OPT
- High : Normal Operation
- Low : Write Protection
R103
Write Protection
NC_12
NC_13
FLASH_WP
NC_14
NC_15
NC_29
48
1
SS-NAND
2
47
3
46
5
44
6
43
7
42
8
41
10
39
11
38
12
37
13
36
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
NC_2
NC_27
NC_3
I/O6
I/O5
I/O4
NAND_DATA[0-7]
NC_4
NC_5
NAND_DATA[7]
NC_6
NAND_DATA[6]
RY/BY
NAND_DATA[5]
RE
NAND_DATA[4]
NC_25
NC_24
CE
OPT
R148
NC_7
0
NC_23
VCC_2
NC_8
+3.3V_Normal
VSS_2
C104
VCC_1
VSS_1
10uF
10V
NC_22
35
14
NC_28
I/O7
40
9
NC_1
NC_26
45
4
+3.3V_Normal
IC102-*1
TC58DVG3S0ETA00
NC_9
C103
0.1uF
NC_21
NC_10
NC_20
I/O3
I/O2
I/O1
I/O0
CLE
ALE
NAND_DATA[3]
WE
NAND_DATA[2]
WP
NAND_DATA[1]
NC_11
NAND_DATA[0]
NC_19
NC_12
NC_18
NC_13
NC_17
NC_14
NC_16
NC_15
48
1
TOSIBA-NAND
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
R113
10K
NC_28
R117
10K
OPT
R122
10K
0000:
0010:
0100:
0110:
1000:
1010:
CI_ADDR[4] 0001:
NAND_DATA[7]0011:
NAND_DATA[2]0101:
0111:
NAND_DATA[1]1001:
1011:
1100:
1110:
1101,
R127
10K
OPT
NC_27
NC_26
NC_25
R114
10K
OPT
I/O8
R118
10K
R123
10K
OPT
R128
10K
I/O7
ST Micro M25P or compatible Serial Flash
8-bit 512Mbit 512B page SLC NAND Flash devices
8-bit 128, 256Mbit 512B page SLC NAND Flash devices
8-bit 1Gbit 2KB page SLC NAND Flash devices
8-bit 2Gbit, 4Gbit, 8Gbit 2KB page SLC NAND Flash devices
8-bit 16Gbit, 32Gbit 4KB page SLC NAND Flash devices (O)
8-bit 8/16/32Gbit 2KB page MLC NAND Flash devices
8-bit 16/32Gbit 4KB page MLC NAND Flash devices
8-bit 32Gbit 8KB page MLC NAND Flash devices
3B dual IO Serial Flash
BB dual IO Serial Flash
fast Serail Flash > 50Mhz
OneNAND Flash (always 16-bit)
Reserved
1111: Reserved
R154
10K
OPT
R157
10K
OPT
R160
10K
OPT
R164
10K
OPT
R170
10K
R167
10K
OPT
R177
10K
R175
10K
OPT
R183
10K
R181
10K
OPT
R179
10K
OPT
R187
10K
OPT
R192
10K
OPT
NAND_DATA[0]
CI_ADDR[7]
NAND_DATA[6]
CI_ADDR[6]
NAND_CLE
NAND_DATA[4]
CI_ADDR[9]
CI_ADDR[11]
I/O6
CI_ADDR[12]
I/O5
CI_ADDR[13]
NC_24
CI_ADDR[8]
NAND_DATA[3]
NAND ECC (FA3, FA2, FALE)
PSL
NAND_DATA[5]
R155
10K
+3.3V_Normal
NC_23
R158
10K
R161
10K
R165
10K
R168
10K
R171
10K
OPT
R176
10K
R178
10K
OPT
R180
10K
R182
10K
R184
10K
OPT
R188
10K
R193
10K
VCC_2
VSS_2
R111
10K
OPT
NC_22
R115
10K
R119
10K
OPT
000 = ECC disabled
001 = ECC 1-bit repair
010 = ECC 4-bit BCH (O)
011 = ECC 8-bit BCH, 27 byte spare
100 = ECC 12-bit BCH, 27 byte spare
101 = ECC 8-bit BCH, 16 byte spare
110, 111 = Reservedd
CI_ADDR[3]
CI_ADDR[2]
NC_21
NAND_ALE
NC_20
R112
10K
I/O4
R116
10K
OPT
R120
10K
NAND_DATA[0]:
0: System is LITTLE endian (O)
1: System is BIG endian
CI_ADDR[9],CI_ADDR[11],CI_ADDR[12],CI_ADDR[13]
TVM Crystal oscillator bias/gain control
0000: 210uA
0001: 390uA
0010: 570uA
0011: 730uA
0100: 890uA (O)
0111: 1290uA
1000: 1416uA
1111: 2196uA
0101, 0110, 1001, 1010, 1011, 1100, 1101, 1110: Reserved
CI_ADDR[7]:
0: Disable EDID automatic Downloading from Flash (O)
1: Enable EDID automatic Downloading from Flash
I/O3
I/O2
NAND_DATA[6] :
0: Disable OSC clock output on chip Pin (O)
1: Enable OSC clock output on chip pin.
I/O1
NC_19
CI_ADDR[6]:
0: Host MIPS run at 500 MHz (O)
1: Host MIPS run at 250 MHz
NC_18
NC_17
CI_ADDR[8]:
0: RESETOUTb (in On/Off only) stay asserted until software releases them.
1: Fix amount of delay for de-assertion on RESETOUTb (in On/IOff only)
at end of RESETb pulse (O)
NAND_CLE:
0: Differential Oscillators TVM not bypassed (O)
1: Differential Oscillators TVM bypassed
NC_16
NAND_DATA[3]:
0: MIPS will boot from external flash (O)
1: MIPS will boot from ROM
NAND_DATA[4]:
0: 27MHz TVM Crystal Frequency
1: 54MHz TVM Crystal Frequency (O)
NAND_DATA[5]:
0: FLASH MODE
1: BSC_SLAVE(BBS) MODE (O)
+3.3V_Normal
NVRAM
R198
10K
RGB_DDC_SDA
FOR ATMEL_EEPROM
IC103-*1
AT24C256C-SSHL-T
A0
S
B
D
+3.3V_Normal
A1
1
8
2
7
3
6
4
5
VCC
WP
+3.3V_Normal
A2
TXOUT0_L1N
HDMI0_D0N
TXOUT0_L1P
HDMI0_D0P
TXOUT0_L2N
TXOUT0_L2P
A3
HDMI_RX1-
B3
HDMI_RX1+
HDMI0_D1N
TXCLK_LN
HDMI0_D1P
TXCLK_LP
TXOUT0_L3N
A2
HDMI_RX2-
B2
HDMI_RX2+
HDMI0_D2N
TXOUT0_L3P
HDMI0_D2P
TXOUT0_L4N
AF27
AF28
AG27
AG28
AE26
AF26
AH27
AG26
AF25
AE25
TXOUT0_L4P
TXA0P
AH26
TXOUT0_U0N
V4
W4
DDC0_SCL
TXOUT0_U0P
DDC0_SDA
TXOUT0_U1N
TXOUT0_U1P
V3
+5V_MAIN
R101
4.7K
V2
HDMI_ARC
HDMI0_HTPLG_IN
TXOUT0_U2N
HDMI0_HTPLG_OUT
TXOUT0_U2P
TXCLK_UN
D13
E6
HDMI0_ARC
TXCLK_UP
HDMI0_RESREF
R106
3K
TXOUT0_U3N
TXOUT0_U3P
TXOUT0_U4N
AG25
AE24
AD24
AH25
AF24
AE23
AD23
AG24
AF23
AC22
AD22
TXOUT0_U4P
54MHz_XTAL_P
TXA1N
TXA1P
TXA2P
TXOUT1_L0P
TXOUT1_L1N
TXOUT1_L1P
TXOUT1_L2N
TXOUT1_L2P
TXCLK1_LN
TXCLK1_LP
TXOUT1_L3N
TXOUT1_L3P
TXOUT1_L4N
AF22
RGB_DDC_SCL
Y4
TXA3P
TXA4P
Q101
BSS83
C119
0.1uF
16V
TXB0N
TXB0P
AF20
AB5
BBS CONNECT
TXB2P
TXBCLKN
+3.3V_Normal
U2
TXOUT1_U1P
TXOUT1_U2N
TXOUT1_U2P
TXCLK1_UN
TXCLK1_UP
TXB3P
TXB4N
TXB4P
R121
2.2K
+3.3V_Normal
DEBUG
R126
2.2K
R129
2K
TXOUT1_U3N
TXOUT1_U3P
TXOUT1_U4N
P101
R135
R136
SDA0_3.3V
TJC2508-4A
1
VCC
2
C106
R109
4.7uF 1.5K
R137
SCL2_3.3V
R110
1.5K
Y1
AG18
AF17
R138
SDA2_3.3V
33
AA3
33
AA2
33
H3
33
H2
SCL
AC18
GPIO_BL_ON
AH16
AG16
H5
3
OPT
SDA
4
5V_HDMI_1
GND
C107
33pF
50V
OPT
C108
33pF
50V
OPT
OPT
C109
33pF
50V
5V_HDMI_2
C110
33pF
50V
R141
NFWPB
FWE
VGA_SCL
FRD
4.7K
OPT
4.7K
R173
R174
E1
1
8
2
7
VCC
Write Protection
WP
- Low : Normal Operation
- High : Write Protection
A8’h
E2
VSS
3
6
4
5
SCL
R190
33
SDA
R191
33
C115
8pF
OPT
NAND_ALE
AF1
SCL3_3.3V
SDA3_3.3V
C117
8pF
OPT
NAND_CEb
AC5
NAND_CEb2
AE6
/CI_CE1
AG5
/CI_CE2
FLASH_WP
AG2
54MHz X-TAL
NAND_WEb
AE3
NAND_REb
AA5
SUNNY
X101
54MHz
C113
12pF
/PCM_WAIT
R144
R130
2K
R145
FA_1
BSCDATAA
FA_2
BSCCLKA
FA_3
FA_4
RDB/GPIO
FA_5
TDB/GPIO
FA_6
FA_7
BSC_S_SCL
FA_8
BSC_S_SDA
FA_9
FA_11
NMIB
U4
Y6
4.7K
AON_GPIO_36
TDI/GPIO
AON_GPIO_37
TDO
TMS/GPIO
AON_RESETOUTB
TVM_BYPASS
R139
CI_ADDR[3]
AD4
CI_ADDR[4]
AE4
CI_ADDR[5]
AE5
CI_ADDR[6]
AD6
CI_ADDR[7]
AH3
CI_ADDR[8]
AF4
CI_ADDR[9]
AH4
CI_ADDR[10]
AG4
CI_ADDR[11]
AF5
CI_ADDR[12]
AG3
CI_ADDR[13]
CI_ADDR[14]
AH2
4
TCK/GPIO
X-TAL_1
KDS
X101-*1
54MHz
1
4
2
3
GND_1
R189
1M
OPT
54MHz_XTAL_P
GND_2
X-TAL_2
+3.3V_Normal
AH5
10K
STRAP_PCI
R147
1K
R150
1K
R153
1K
R156
1K
R159
1K
R162
1K
R166
1K
TP122
AF14
TP123
AH14
TP124
AD14
TP118
AG14
TP119
AC16
TP120
DINT/GPIO
TP121
Y3
G24
RESETB
AVS_VFB
AVS_VSENSE
AVS_RESETB
J6
W6
TP125
AH7
RESETOUTB
R124
1K
OPT
X-TAL_1
C114
12pF
OPT
0
SOC_RESET
1
GND_2
JRST
+3.3V_Normal
GND_1
AD15
TRSTB
W3
W1
NAND_RBb
CI_ADDR[2]
AD5
R146
AON_VSYNC
22 OPT
22 OPT
AC4
AON_HSYNC
AB6
R132
FA_14
AE1
2
X-TAL_2
CI_ADDR[2-14]
NAND_CLE
FA_15
U5
22 OPT
22 OPT
FA_12
FA_13
POWER_CTRL
+3.3V_Normal
FOR HDMI STANDARD
APPLY ONLY WHEN CONNECT TO PULL-UP GPIO
AF2
FA_0
FA_10
4.7K F25
PCM_5V_CTL
R142
3
RDA
W5
TMODE
AVS_NDRIVE_1
TESTEN
AVS_PDRIVE_1
JRST
AG7
R163
1K
AD7
AF7
AH8
+3.3V_Normal
C111
0.01uF
C112
0.1uF
BCM REFRENCE is 562ohm
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
NAND_DATA[0]
FCEB_3
VGA_SDA
+3.3V_Normal
BL_PWM/GPIO
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
FS_IN1
H4
R125
1K
LT0VCAL_MONITOR
FCEB_2
TDA
BCM_TX
AF18
TXOUT1_U4P
NAND_DATA[1]
AE2
NC
Y2
BCM_RX
R131
2K
AE18
AG19
AD3
R169 0
54MHz_XTAL_N
TXB3N
AF19
AD18
NAND_DATA[2]
FOR ATMEL_EEPROM
R199 0
TXBCLKP
AE19
AH19
NAND_DATA[3]
AD2
FRDYB
5V_HDMI_3
AD19
AC3
AF3
TXB2N
AC21
AH20
NAND_DATA[4]
FS_IN2
AG20
TXOUT1_U1N
FCEB_1
U3
R143
TXOUT1_U0P
FCEB_0
SPARE_ADC2
TXB1P
5V_HDMI_4
TXOUT1_U0N
NAND_DATA[5]
AC2
SDA
TXB1N
AD21
TXOUT1_L4P
SPARE_ADC1
AB2
SC_ID
NAND_DATA[6]
AC1
AG1
FALE
AA4
Y5
NAND_DATA[7]
AB3
SCL
C116
0.1uF
IC103
M24M01-HRMN6TP
FP_IN0
FP_IN1
TXA4N
AB1
FAD_0
AB4
AF21
AG21
FAD_2
FAD_1
R196
10K
TXACLKP
AH22
AG22
IRRXDA
TXACLKN
AE22
AE21
FAD_3
V5
LNB_INT
AG23
AH23
FAD_5
FAD_4
+3.3V_Normal
TXA2N
TXA3N
FAD_7
FAD_6
TVM_XTALOUT
54MHz_XTAL_N
SCL0_3.3V
TXOUT1_L0N
NON_BCM_CAP
TVM_XTALIN
AF6
W2
CEC
AG6
TXA0N
22
AE28
G
R102
4.7K
TXOUT0_L0P
R195
B4
HDMI_RX0+
R105 R104
4.7K 4.7K
TXOUT0_L0N
HDMI0_CLKP
A4
HDMI_RX0-
+3.3V_Normal
AE27
HDMI0_CLKN
22
C5
HDMI_CLK+
NAND_DATA[0-7]
S
B
D
B5
HDMI_CLK-
GND
FOR ST_EEPROM
4.7K
OPT
C118
0.1uF
16V
NON_BCM_CAP
IC101
LGE35230(BCM35230KFSBG)
R172
Q100
BSS83
R197
G
IC101
LGE35230(BCM35230KFSBG)
F7
E7
C6
VDAC_VREG
VDAC_1
VDAC_RBIAS
VDAC_2
D7
DTV/MNT_V_OUT
R140
560
1%
EAX63525101
MAIN & NAND FLASH
1
19
LGE Internal Use Only
POWER 2.5V
+0.9V_CORE
+2.5V_BCM35230
C233
6.3V
NFM18PS105R0J
+3.3V_Normal
OUT
IN
+2.5V_BCM35230
C247
22uF
10V
OUT
CORE 0.9V
ADAC_AVDD25
C249
10uF
C253
10uF
C256
0.1uF
16V
HDMI_AVDD
+0.9V_CORE
L205
BLM18PG121SN1D
C258
0.1uF
16V
C263
4.7uF
C274
22uF
10V
C271
0.01uF
C267
0.1uF
16V
USB_AVDD
+0.9V_CORE
L209
BLM18PG121SN1D
C261
10uF
R257
1K
MHP
R256
1K
S
R255
1K
T2
AADC_AVDD25
L202
BLM18PG121SN1D
GND
GND
R254
1K
DDR_1333
R224
1K
NVR_1M
R201
1K
FHD
R251
1K
OPT
R250
1K
OPT
IN
C204
NFM18PS105R0J
C284
22uF
10V
C280
0.1uF
16V
VAFE2_DVDD
+0.9V_CORE
L214
BLM18PG121SN1D
L219
BLM18PG121SN1D
C285
4.7uF
10V
C292
22uF
10V
C288
0.1uF
16V
C296
4.7uF
10V
C299
0.1uF
16V
C202
390pF
50V
READY
+3.3V_Normal
MODEL_OPT_0
C244
6.3V
NFM18PS105R0J
+2.5V_BCM35230
+2.5V_BCM35230
EPHY_VDD25
MODEL_OPT_1
PLL_AUD_AVDD
+0.9V_CORE
C232
4.7uF
MODEL_OPT_2
C234
0.1uF
C236
0.1uF
C238 IN
4.7uF
L203
BLM18PG121SN1D
C248
10uF
OUT
GND
MODEL_OPT_3
C251
0.1uF
16V
MODEL_OPT_4
C252
4.7uF
C255
0.1uF
16V
C259
10uF
6.3V
C262
10uF
6.3V
C260
4.7uF
10V
C266
4.7uF
10V
C270
0.1uF
16V
C272
0.01uF
50V
VAFE3_DVDD
+0.9V_CORE
L210
BLM18PG121SN1D
C277
4.7uF
C281
0.1uF
PLL_MAIN_AVDD
L217
BLM18PG121SN1D
C287
4.7uF
+0.9V_CORE
MODEL_OPT_5
+0.9V_CORE
L215
BLM18PG121SN1D
C294
4.7uF
C2006
390pF
50V
*NOTE 20
Close to BCM IC
C290
0.1uF
16V
C297
0.1uF
R267
1K
NOT_MHP
R266
1K
NON_S
R265
1K
NON_T2
R264
1K
DDR_1600
R229
1K
NVR_256K
R219
1K
HD
R261
1K
R260
1K
MODEL_OPT_6
MODEL_OPT_7
MODEL_OPT_0
R286
0
R285
0
R220
0
R230
0
C225
0.22uF
6.3V
RF_BOOSTER_CTL
MODEL_OPT_1
MODEL_OPT_0
0
0
1
1
MODEL_OPT_1
0
1
0
1
HIGH
MODEL_OPT_4
DDR speed
MODEL_OPT_5
T2 Tuner
REMOTE_SW_CTRL
C203
10uF
C205
10uF
C207
4.7uF
C209
4.7uF
C211
0.1uF
C213
0.1uF
C215
0.01uF
C220
0.1uF
Enable
C222
0.01uF
close to soc
IC101
LGE35230(BCM35230KFSBG)
Not Support
Disable
D26
R211
6.04K
EPHY_TDP
NON_BCM_CAP
F28
E27
EPHY_RDP
E26
EPHY_RDN
VI_IFP0
EPHY_RDAC
VI_IFM0
EPHY_TDP
EPHY_TDN
AGC_SDM_2
EPHY_RDP
AGC_SDM_1
R210
4.87K
1%
GPIO_1
USB_MONCDR
GPIO_2
USB_RREF
D1
USB_PORT1DN
D2
PCI_VIO_0
PCI_VIO_1
USB_PWRFLT_1/GPIO
C1
USB_DP1
C4
USB_CTL1
GPIO_4
USB_PORT2DP
GPIO_5
GPIO_6
USB_PWRFLT_2/GPIO
USB_PWRON_2/GPIO
GPIO_7
GPIO_70
GPIO_71
PCM_TS_DATA[0-7]
GPIO_72
M4
PCM_TS_CLK
PCM_TS_DATA[0]
L5
PCM_TS_DATA[1]
M5
PCM_TS_DATA[2]
L6
PCM_TS_DATA[3]
N3
PCM_TS_DATA[4]
N1
PCM_TS_DATA[5]
N2
PCM_TS_DATA[6]
M3
PCM_TS_DATA[7]
M2
L4
PCM_TS_SYNC
FE_TS_DATA[0-7]
H_NIM
2K
N4
PCM_TS_VAL
TS_CLK
TCLKA/GPIO
GPIO_73
TDATA_0/GPIO
GPIO_74
TDATA_1/GPIO
GPIO_75
TDATA_2/GPIO
GPIO_76
TDATA_3/GPIO
GPIO_77
TDATA_4/GPIO
GPIO_78
TDATA_5/GPIO
GPIO_79
J4
FE_TS_DATA[4] R206F/NIM0
F/NIM0
FE_TS_DATA[5] R207
K2
FE_TS_DATA[6] R208F/NIM0
FE_TS_DATA[7] R209F/NIM0
K3
K5
J2
J3
K1
L1
L3
TS_SYNC
L2
TS_VAL
C229
0.1uF
U10
V10
W10
C16
PCM_MDI[1]
R3
PCM_MDI[2]
R2
PCM_MDI[3]
P3
PCM_MDI[4]
P2
PCM_MDI[5]
P1
PCM_MDI[6]
R6
PCM_MDI[7]
N5
T4
PCM_MISYNC
P5
PCM_MIVAL
TSTRTA/GPIO
PCI_AD05
TVLDA/GPIO
PCI_AD06
PCI_AD07
TCLKD/GPIO
PCI_AD08
TDATD_0/GPIO
PCI_AD09/GPIO
TDATD_1/GPIO
PCI_AD10/GPIO
TDATD_2/GPIO
PCI_AD11/GPIO
TDATD_3/GPIO
PCI_AD12/GPIO
TDATD_4/GPIO
PCI_AD13/GPIO
TDATD_5/GPIO
PCI_AD14/GPIO
TDATD_6/GPIO
PCI_AD15/GPIO
TDATD_7/GPIO
PCI_AD16/GPIO
TSTRTD/GPIO
PCI_AD17/GPIO
TVLDD/GPIO
PCI_AD18/GPIO
PCI_AD20/GPIO
MPEG_CLK/GPIO
PCI_AD21/GPIO
MPEG_D_0/GPIO
PCI_AD22
MPEG_D_1/GPIO
PCI_AD23
MPEG_D_2/GPIO
PCI_AD24
MPEG_D_3/GPIO
PCI_AD25
MPEG_D_4/GPIO
L11
G26
M11
R233
1.2K
PDP_MODEL_OPT_3
R231
MPEG_D_5/GPIO
PCI_CBE00
MPEG_D_6/GPIO
PCI_CBE01/GPIO
MPEG_D_7/GPIO
PCI_CBE02/GPIO
MPEG_SYNC/GPIO
R288
0
0
33
W13
C227
33pF
50V
C231
33pF
50V
J5
OPT
OPT
U1
T1
T5
R5
22
SDA1_3.3V
R11
SCL1_3.3V
T11
U11
V11
W11
V14
L18
MODEL_OPT_0
M18
CI_DET
H6
R240
AE15
100
N18
M_RFModule_RESET
P18
EPHY_ACTIVITY
AF15
R18
EPHY_LINK
AG15
R214
22
AF16
R215
22
R216
T18
DTV_ATV_SELECT
OPT
22
U18
/CI_CD1
V18
MODEL_OPT_1
AE16
R241
22
AG17
R242
22
AH17
R243
22
AE17
R244
22
OPT
R228
22
OPT
AD17
P11
REMOTE_OR_MODULE_RX
R280
V6
AD16
N11
OPT
W18
/CI_CD2
V15
REMOTE_SW_CTRL
L19
L/R_INDICATOR
M19
N19
AB13
T19
AC15
U19
AB12
V19
AB11
W19
AE14
AH13
R217
0 OPT
AE13
AD12
R218
22
AF12
AG10
AF10
AE10
DC_MREMOTE
AD10
AE9
AE8
DD_MREMOTE
R221
R222
0 OPT
0 OPT
AC10
AC11
AC8
AB8
AG12
AH10
VSS_2
VDDC_3
VSS_3
VDDC_4
VSS_4
VDDC_5
VSS_5
VDDC_6
VSS_6
VDDC_7
VSS_7
VDDC_8
VSS_8
VDDC_9
VSS_9
VDDC_10
VSS_10
VDDC_11
VSS_11
VDDC_12
VSS_12
VDDC_13
VSS_13
VDDC_14
VSS_14
VDDC_15
VSS_15
VDDC_16
VSS_16
VDDC_17
VSS_17
VDDC_18
VSS_18
VDDC_19
VSS_19
VDDC_20
VSS_20
VDDC_21
VSS_21
VDDC_22
VSS_22
VDDC_23
VSS_23
VDDC_24
VSS_24
VDDC_25
VSS_25
VDDC_26
VSS_26
VDDC_27
VSS_27
VDDC_28
VSS_28
VDDC_29
VSS_29
VDDC_30
VSS_30
VDDC_31
VSS_31
VDDC_32
VSS_32
VDDC_33
VSS_33
VDDC_34
VSS_34
VDDC_35
VSS_35
VDDC_36
VSS_36
VDDC_37
VSS_37
VDDC_38
VSS_38
VDDC_39
VSS_39
1. COMP_DET + COMP_AV_DET = COMPONENT
VDDC_40
V16
2. COMP_DET ONLY = AV
VDDC_41
+1.5V_DDR
V17
COMP_AV_DET
VDDC_42
Place Cap
L200
AMP_RESET_N
to L22 Ball
MLG1005S22NJT Very close L10
POR_VDD
AV2_SIDE_CVBS_DET
C206
C208
1uF
0.1uF
10V
16V
L22
READY READY
DSUB_DET
VDDR1_1
AA28
PCM_RST
VDDR1_2
V28
MODEL_OPT_4
VDDR1_3
R28
VDDR1_4
M28
VDDR1_5
J28
VDDR1_6
K23
VDDR1_7
M22
VDDR1_8
T22
VDDR1_9
T23
VDDR1_10
very close
U22
VDDR1_11
to SOC R22 pin
Y22
VDDR1_12
C242
0.1uF
R22
COMP_DET
DDR_LDO_VDDO
MODEL_OPT_5
+3.3V_Normal
SC/COMP2_DET
AG13
AF13
VSS_1
VDDC_2
R283
22
AB7
AG11
MCIF_RESET/GPIO
PCI_IRDYB/GPIO
MCIF_SCLK/GPIO
PCI_PAR/GPIO
MCIF_SCTL/GPIO
PCI_PERRB/GPIO
MCIF_SDI/GPIO
MCIF_SDO/GPIO
PCI_REQ1B
PCI_SERRB/GPIO
PCI_STOPB/GPIO
PCI_TRDYB/GPIO
R223
22
AD11
G23
MODEL_OPT_6
AE11
AB9
MODEL_OPT_7
AD13
R236
AE12
R235
R225 OPT22
R226 OPT 22
PDP_MODEL_OPT_1
AC13
AH11
R247
AF11
3D_GPIO_1
R227
AC12
H22
3D_GPIO_0
0
0
22
22
K7
PDP_MODEL_OPT_0
AB15
L7
AB14
M7
N6
3D_GPIO_2
P6
+0.9V_CORE
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
G15
PCI_FRAMEB/GPIO
R4
T3
/PCM_IRQA
+3.3V_Normal
VDDR3_1
VSS_63
VDDR3_2
VSS_64
VDDR3_3
VSS_65
VDDR3_4
VSS_66
VDDR3_5
VSS_67
VDDR3_6
VSS_68
VDDR3_7
VSS_69
VDDR3_8
VSS_70
VDDR3_9
VSS_71
VDDR3_10
VSS_72
VDDR3_11
VSS_73
R295
1K
OPT
VSS_74
R293
1K
OPT
R290
1K
MOTION
+3.3V_Normal
AA7
PDP_MODEL_OPT_0
PDP_MODEL_OPT_1
PDP_MODEL_OPT_2
R296
1K
PDP_MODEL_OPT_3
MODEL_OPT_0
MODEL_OPT_1
DVR READY
MOTION R/C
MODEL_OPT_2
HIGH
LOW
Support
Not Support
Support
Not Support
VSS_75
AA6
Y7
R294
1K
C200
390pF
50V
READY
C279
4.7uF
C295
4.7uF
C2009
390pF
50V
*NOTE 20
Close to BCM IC
C282
0.1uF
C298
0.1uF
PLL_VAFE_AVDD25
POWER 3.3V
C2008
390pF
50V
C268
0.1uF
16V
USB_AVDD33
+3.3V_Normal
HDMI_AVDD33
+3.3V_Normal
L212
BLM18PG121SN1D
L216
BLM18PG121SN1D
C283
0.1uF
16V
C291
4.7uF
C293
0.1uF
K10
VDDC_1
PCI_CBE03
MPEG_DATA_EN/GPIO
R287
R234
1.2K
33
R232
W15
AC14
PCI_DEVSELB/GPIO
PDP_MODEL_OPT_2
V13
+3.3V_Normal
G28
R19
P4
T2
T10
P19
TDATA_7/GPIO
PCI_AD19/GPIO
PCM_MICLK
PCM_MDI[0]
R10
TDATA_6/GPIO
K6
F/NIM
0
FE_TS_DATA[0] R202
F/NIM
FE_TS_DATA[1] R203
0
F/NIM
FE_TS_DATA[2] R204
0
FE_TS_DATA[3] R205F/NIM0
P10
IF_AGC_MAIN
0.01uF
H_NIM
PCI_VIO_2
USB_PORT2DN
C3
/USB_OCD1
OPT OPT OPT
R213
USB_PWRON_1/GPIO
B1
USB_DM1
C2005 C2001 C2002
closed to soc
A16
W14
E1
USB_CTL2
N10
GPIO_3
USB_PORT1DP
/USB_OCD2
M10
IF_N_MAIN
C2
USB_DM2
V7
L201
BLM18PG121SN1D
+3.3V_Normal
USB_DP2
R292
1K
NON_MOTION
C269
0.1uF
16V
IC101
LGE35230(BCM35230KFSBG)
V12
+3.3V_Normal
IF_P_MAIN
H_NIM
C218
100
0.1uF R245
16V
B16
A15
GPIO_0
PCM_MDI[0-7]
PLL_MIPS_AVDD
L218
BLM18PG121SN1D
NON_BCM_CAP
D15
C216
F5
C201
100pF
OPT
B17
C217
H_NIM
16V
0.1uF 100
R246
VDDR_AGC
EPHY_RDN
E5
R212
1K
C17
EPHY_VREF
F27
EPHY_TDN
R289
1K
DVR
C265
4.7uF
10V
+2.5V_BCM35230
1600
Not Support
F26
R291
1K
NON_DVR
PLL_VAFE_AVDD
L211
BLM18PG121SN1D
*NOTE 20
Close to BCM IC
H_NIM
Support
PHM
+0.9V_CORE
+0.9V_CORE
C264
4.7uF
H_NIM
S Tuner
VAFE2_VDD25
L207
BLM18PG121SN1D
H_NIM
MODEL_OPT_6
C2007
390pF
50V
*NOTE 20
Close to BCM IC
+0.9V_CORE
MODEL_OPT_7
C257
0.1uF
16V
LOW
1333
Support
C254
4.7uF
C250
4.7uF
external
URSA5
+2.5V_BCM35230
L206
BLM18PG121SN1D
+1.5V_DDR
MODEL OPTION
LG FRC2
VAFE3_VDD25
L204
BLM18PG121SN1D
/CI_CD2
MODEL_OPT_3
BCM
internal
FRC
+2.5V_BCM35230
C223
0.01uF
LG8300_RESET
MODEL_OPT_2
NO_FRC
C221
0.1uF
AON_VDDC_1
VSS_76
AON_VDDC_2
VSS_77
AON_POR_VDD
VSS_78
VSS_79
U7
AON_VDDR3
VSS_81
T7
T6
VSS_80
AON_VDDR10_1
VSS_82
AON_VDDR10_2
VSS_83
K11
K12
VDAC_AVDD33
+3.3V_Normal
L12
L213
BLM18PG121SN1D
M12
N12
P12
C286
4.7uF
R12
T12
C289
0.1uF
16V
U12
W12
K13
L13
M13
N13
IC101
LGE35230(BCM35230KFSBG)
P13
R13
T13
AADC_AVDD25
U13
NON_BCM_CAP
F19
W16
F20
AADC_AVDD25
ADAC_AVDD25
K14
AADC_AVSS
D25
L14
M14
D24
N14
E24
EPHY_VDD25
P14
R14
F24
T14
E25
G22
ADACA_AVDD25
ADACA_AVSS
ADACC_AVDD25
ADACC_AVSS
ADACD_AVDD25
ADACD_AVSS
G21
F22
F23
EPHY_BVDD25
EPHY_AVSS
EPHY_AVDD25
U14
K15
HDMI_AVDD
L15
HDMI_AVDD33
M15
D5
D4
N15
+2.5V_BCM35230
P15
HDMI0_AVSS_1
HDMI0_AVDD33
HDMI0_AVSS_2
AE20
R15
AD20
T15
AC20
U15
+2.5V_BCM35230
K16
AB20
L16
LT0VSS_1
LT0VDD25_2
LT0VSS_2
LT0VDD25_3
LT0VSS_3
LT0VDD25_4
LT0VSS_4
C275
0.1uF
OPT
N16
P16
R16
LT0VSS_6
D14
T16
USB_AVDD33
K17
SPDIF_IN_AVDD25
SPDIF_IN_AVSS
E4
D3
VDAC_AVDD33
L17
M17
USB_AVSS_1
USB_AVDD33
USB_AVSS_2
D16
U17
D17
VAFE3_DVDD
W17
VAFE3_VDD25
K18
D8
H7
E8
G14
F9
AB16
E9
R7
F8
M6
PLL_AUD_AVDD
VAFE2_AVDD25_2 VAFE2_VSS_3
VAFE2_DVDD25
VAFE2_VSS_4
VAFE2_VSS_5
VAFE3_DVDD
F15
G8
VAFE2_VSS_6
PLL_MAIN_AVDD
VAFE3_AVDD25_2
PLL_VAFE_AVDD
J7
K4
AD25
D11
PLL_VAFE_AVDD25
D12
+0.9V_CORE
L208
BLM18PG121SN1D
VAFE3_DVDD25
VAFE3_VSS_2
POR_VDD25
VAFE3_VSS_3
VAFE3_VSS_5
PLL_AUD_AVDD
F18
G16
F16
G12
F12
G11
G10
F10
VAFE3_VSS_6
PLL_MIPS_AVDD
PLL_MIPS_AVSS
PLL_VAFE_AVDD
PLL_VAFE_AVDD25
AD26
AC7
TVM_OSC_AVDD
C276 +3.3V_Normal
U6
0.01uF
OPT
G17
PLL_MAIN_AVDD
AE7
C273
0.1uF
G18
G13
VAFE3_AVDD25_3 VAFE3_VSS_1
G25
PLL_MIPS_AVDD
W7
E18
VAFE3_AVDD25_1 VAFE2_VSS_7
VAFE3_VSS_4
P7
J23
VAFE2_VSS_1
VAFE2_AVDD25_1 VAFE2_VSS_2
AB23
AA22
AC17
G20
VAFE2_DVDD
D9
K19
G19
AB17
VDAC_AVSS
D18
E17
AC6
AB18
VAFE2_VDD25
T17
AC23
AC19
G9
VDAC_AVDD33
R17
AB10
AB19
G7
USB_AVDD
D6
VAFE2_DVDD
P17
N7
AB21
LT0VSS_7
USB_AVDD
U16
G6
AB22
LT0VDD25_1
LT0VSS_5
M16
N17
F6
HDMI0_AVDD
TVM_OSC_AVSS
AUX_AVDD33
J22
K22
J25
C278
0.1uF
N22
N23
M25
P22
R25
V22
W22
W23
V25
AA25
VSS_84
MODEL_OPT_3
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
MAIN POWER
2
19
LGE Internal Use Only
DSUB_R+
C320
0.1uF
DSUB_G+
C321
C327
0.1uF
0.1uF
C328
0.1uF
Run Along DSUB_R Trace
Run Along DSUB_G Trace
R311
36
IC101
LGE35230(BCM35230KFSBG)
NON_BCM_CAP
A6
C7
A7
DSUB_B+
Run Along DSUB_B Trace
C322
0.1uF
B7
C323
0.1uF
C8
VI_R
VI_INCM_R
VI_G
NON_BCM_CAP
VI_INCM_G
B15
VI_B
C15
+3.3V_Normal
VI_INCM_B
R312
36
A13
DSUB_VSYNC
HSYNC_IN
B14
VSYNC_IN
0.1uF
C9
0.1uF
A9
C331
0.1uF
B9
C332
0.1uF
B8
COMP_Y/AV1_CVBS
C329
COMP_Pr
C330
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace COMP_Pb
SC_R/COMP2_Pr
C333
0.1uF
C11
SC_G/COMP2_Y
C334
0.1uF
A10
C335
0.1uF
B10
C336
0.1uF
C10
Run Along SC R,G,B Trace
R318
0
R301
2.2K
R302
2.2K
REMOTE_OR_MODULE_TX
R308
SCL3_3.3V
VI_PR1
SDA3_3.3V
VI_PB1
OPT
C301
33pF
50V
R309
OPT
C302
33pF
50V
VI_SC_R1
VI_SC_G1
VI_FB_1/GPIO
A12
C12
B12
B11
VI_SC_R2
VI_SC_G2
VI_INCM_SC2
BCM35230_with_CAP_220pF
IC101-*1
LGE35230
E12
E14
VI_FB_2/GPIO
BCM_CAP
VI_FS2
U26
R26
U27
R27
V27
E15
F17
SC_CVBS_IN
Run Along SC_CVBS Trace
0.1uF
C338
0.1uF
C303
AV2_SIDE_CVBS_IN
Run Along SIDE_CVBS Trace
TU_CVBS
OPT
Run Along TUNER_CVBS Trace
C337
R325
36
R303
36
F14
E11
0.1uF
C18
0.1uF
B18
A18
C19
A19
B19
C340
COMP_Y/AV1_CVBS
C339
NON_EU
0.1uF
0.1uF
NON_EU
P27
VI_C1_1
VI_INCM_LC1_1
R24
N24
T25
M23
R23
VI_C1_2
N25
T24
N26
L26
L27
C304
0.1uF
P26
U25
H27
C325
R316
36
VI_L1
VI_INCM_LC1_2
0.1uF
C326
R306
75
1%
E16
C20
B20
J26
VI_CVBS1
M27
G27
M26
VI_INCM_CVBS1
L23
VI_CVBS2
L24
H26
H25
J24
VI_INCM_CVBS2
VI_CVBS3
VI_INCM_CVBS3
VI_CVBS4
M24
H23
L25
H24
V23
DDR_DQA_0
DDR_ADA_0
DDR_DQA_1
DDR_ADA_1
DDR_DQA_2
DDR_ADA_2
DDR_DQA_3
DDR_ADA_3
DDR_DQA_4
DDR_DQA_5
1uF 10V
C306
1uF 10V
B24
C307
1uF 10V
A24
DDR_ADA_5
DDR_ADA_6
DDR_DQA_8
DDR_DQA_9
DDR_DQA_10
DDR_ADA_ALT_5
DDR_DQA_11
DDR_ADA_ALT_6
DDR_DQA_12
DDR_ADA_7
DDR_ADA_8
DDR_DQA_15
DDR_ADA_9
DDR_DQA_16
DDR_ADA_10
DDR_DQA_17
DDR_ADA_11
DDR_DQA_18
DDR_ADA_12
DDR_DQA_19
DDR_ADA_13
DDR_DQA_20
DDR_ADA_14
DDR_DQA_21
DDR_BAA_0
DDR_DQA_23
DDR_BAA_1
DDR_DQA_26
DDR_RASA_N
DDR_DQA_27
DDR_CASA_N
DDR_DQA_28
DDR_WEA_N
DDR_DQA_29
J27
1uF 10V
D23
I2SSD_OUTA1/GPIO
C311
1uF 10V
C24
COMP_R_IN
C312
1uF 10V
C23
C313
1uF 10V
B23
SC/COMP2_L_IN
C314
1uF 10V
E21
SC/COMP2_R_IN
C315
1uF 10V
D21
C316
1uF 10V
D22
I2SWS_IN
I2SSCK_OUTC/GPIO
I2SWS_OUTC/GPIO
AADC_LINE_L1
AADC_LINE_R1
C22
AC26
A22
D20
AA27
AC27
AA26
E20
AA24
AD27
R300
1.2K
E2
R307
33
F2
R326
33
R304
1.2K
MOD_SCL
OPT
E3
TU_RESET
F3
C300
33pF
50V
OPT
MOD_SDA
C317
33pF
50V
SC_RE1
G3
SC_RE2
G1
H1
S2_RESET
B13
SPDIF_OUT
SPDIF_OUTA/GPIO
AADC_LINE_L3
AADC_LINE_R3
AG8
AUDMUTE_0/GPIO
AADC_INCM3
AUDMUTE_1
AADC_LINE_L4
ADAC_AL_N
AADC_LINE_R4
ADAC_AL_P
E13
C28
C27
D28
ADAC_AR_N
AADC_LINE_L5
D27
ADAC_AR_P
AADC_LINE_R5
C26
ADAC_CL_N
SCART_Lout_N
A27
SCART_Lout_P
ADAC_CL_P
F21
AD28
Y25
AD9
AADC_LINE_R2
AADC_INCM5
AC25
AC24
AD8
AADC_LINE_L2 I2SSOSCK_OUTD/GPIO
B22
Y24
I2SWS_OUTD/GPIO
I2SSD_OUTD/GPIO
Y23
Y26
AUD_MASTER_CLK
G2
I2SSCK_OUTD/GPIO
+3.3V_Normal
AUD_LRCH
AC9
I2SSOSCK_OUTC/GPIO
AADC_INCM4
AB27
AUD_LRCK
AG9
I2SSD_OUTA2/GPIO
I2SSCK_IN/GPIO
AADC_INCM2
COMP_L_IN
AB28
W24
A21
V24
C21
W25
V26
B21
AADC_LINE_L6
B27
AADC_LINE_R6
ADAC_CR_N
AADC_INCM6
ADAC_CR_P
SCART_Rout_N
B28
SCART_Rout_P
B25
AADC_LINE_L7
ADAC_DL_N
AADC_LINE_R7
ADAC_DL_P
AADC_INCM7
U24
W27
DDR_DMA_0
DDR_DMA_1
DDR_CKA23_P
DDR_DMA_2
DDR_CKA23_N
DDR_DMA_3
ADAC_DR_N
N28
ADAC_DR_P
N27
A25
A26
W28
B26
U23
DDR_VREFA
T28
E19
F11
1uF 10V
C310
AV2_SIDE_R_IN
DDR_CKEA
T27
E10
SPDIF_IND_N
DDR_CKA01_N
T26
K24
C309
E23
DDR_BAA_2
DDR_DQA_25
DDR_CKA01_P
P25
I2SSOSCK_OUTA/GPIO
AUD_SCK
AF9
Y27
DDR_DQA_22
DDR_DQA_30
E22
C308
AB25
DDR_DQA_13
DDR_DQA_14
DDR_DQA_24
INCM_AUD_SC
1uF 10V
AV2_SIDE_L_IN
AB24
DDR_ADA_ALT_4
SPDIF_IND_P
AADC_INCM1
AB26
DDR_ADA_4
DDR_DQA_6
DDR_DQA_7
DDR_DQA_31
VI_INCM_CVBS4
D19
I2SSD_OUTA0/GPIO
I2SSD_IN/GPIO
C305
INCM_AUD_COMP
VI_SC_B2
33
G5
PC_R_IN
INCM_AUD_SIDE_AV
VI_FS1
F4
PC_L_IN
INCM_AUD_PC
VI_SC_B1
33
C25
VI_INCM_SC1
F13
I2SWS_OUTA/GPIO
I2SSD_OUTC/GPIO
D10
SC_FB
I2SSCK_OUTA/GPIO
SPDIF_INC_N
G4
VI_Y1
VI_INCM_COMP1
SC_B/COMP2_Pb
AF8
SPDIF_INC_P
C14
C13
DSUB_HSYNC
R310
0
IC101
LGE35230(BCM35230KFSBG)
B6
R317
36
AA23
DDR_DQSA_P_0
DDR_RST_N
DDR_DQSA_N_0
VI_SIF1_1
P23
VI_INCM_SIF1_1
K27
W26
DDR_ZQ
P24
DDR_DQSA_P_1
DDR_DQSA_N_1
K28
VI_SIF1_2
VI_INCM_SIF1_2
DDR_DQSA_P_2
DDR_DQSA_N_2
K25
K26
DDR_DQSA_P_3
DDR_DQSA_N_3
+2.5V_BCM35230
R313
10K
C319
TU_SIF
R305
240
R314
12K
+2.5V_BCM35230
R319
10K
OPT
Route Along With TUNER_SIF_IF_N
C324
AUDIO INCM
0.1uF
0.1uF
R315
120
OPT
R321
5.1
Route Between SIDE_AV_L_IN & SIDE_AV_R_IN Trace
Near JK900
R322
5.1
Route Between SC_L_IN & SC_R_IN Trace
Near JK803
R323
5.1
Route Between COMP_L_IN & COMP_R_IN Trace
Near JK801
R324
5.1
Route Between PC_L_IN & PC_R_IN Trace
INCM_AUD_SIDE_AV
INCM_AUD_SC
INCM_AUD_COMP
INCM_AUD_PC
R320
12K
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Near JK800
EAX63525101
MAIN AUDIO/VIDEO
3
19
LGE Internal Use Only
DDR STRAP
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
R401
4.7K
R407
4.7K
R405
4.7K
R403
4.7K
R409
4.7K
OPT
+1.5V_DDR
+1.5V_DDR
C432
6.3V
NFM18PS105R0J
C410
6.3V
NFM18PS105R0J
JEDEC Types : DDR_DQ[0:4]
00001 : DDR3-1333H (CasL=9)(O)
10101 : DDR3-1600K (CasL=11)
C403
4.7uF
C407
10uF
C405
10uF
IN
C423
10uF
C421
4.7uF
C417
470pF
OUT
C425
10uF
IN
OUT
GND
GND
+1.5V_DDR
DDR_DQ[10]
DDR_DQ[9]
+1.5V_DDR
+1.5V_DDR
DDR_DQ[7]
DDR_DQ[8]
C454
1uF
6.3V
C453
1uF
6.3V
DDR_DQ[6]
DDR_DQ[5]
C402
6.3V
NFM18PS105R0J
C455
1uF
6.3V
IN
C433
6.3V
NFM18PS105R0J
C412
1uF
OUT
GND
R402
4.7K
OPT
R432
4.7K
OPT
R404
4.7K
HYNIX_DDR
R408
4.7K
R406
4.7K
OPT
1
SS
1
0
Hynix
0
1
Reserve
0
0
Reserve
C426
1uF
OUT
GND
R410
4.7K
OPT
Bus Width : DDR_DQ[10]
0 - 16b
1 - 32b (O)
Chip Width : DDR_DQ[8]
0 - 8b
1 - 16b (O)
Chip Size : DDR_DQ[6:5]
00 - 4Gbit
01 - 2Gbit (O)
10 - 1Gbit
11 - 512Mbit
DDR_DQ[9] DDR_DQ[7] Maker
1
IN
+1.5V_DDR
+1.5V_DDR
+1.5V_DDR
IC401
K4B2G1646C
IC402
K4B2G1646C
R416
4.99K
1%
R422
4.99K
1%
R429
82
R430
4.7K
OPT
DDR_RESETb
N3
DDR_AA0
IC101
LGE35230(BCM35230KFSBG)
P7
DDR_AA1
P3
DDR_AA2
DDR_DQ[0-7]
DDR_DQ[8-15]
DDR_DQ[1]
R26
DDR_DQ[2]
U27
DDR_DQ[3]
R27
DDR_DQ[4]
V27
DDR_DQ[5]
P26
DDR_DQ[6]
U25
DDR_DQ[7]
P27
DDR_DQ[8]
DDR_DQ[16-23]
R24
DDR_DQ[9]
N24
DDR_DQ[10]
T25
DDR_DQ[11]
M23
DDR_DQ[12]
R23
DDR_DQ[13]
N25
DDR_DQ[14]
T24
DDR_DQ[15]
N26
DDR_DQ[16]
DDR_DQ[24-31]
U26
L26
DDR_DQ[17]
H27
DDR_DQ[18]
L27
DDR_DQ[19]
J26
DDR_DQ[20]
M27
DDR_DQ[21]
G27
DDR_DQ[22]
M26
DDR_DQ[23]
H26
DDR_DQ[24]
L23
DDR_DQ[25]
H25
DDR_DQ[26]
L24
DDR_DQ[27]
J24
DDR_DQ[28]
M24
DDR_DQ[29]
H23
DDR_DQ[30]
L25
DDR_DQ[31]
H24
DDR_DQA_1
DDR_ADA_0
DDR_ADA_1
DDR_DQA_2
DDR_ADA_2
DDR_DQA_3
DDR_ADA_3
DDR_DQA_4
DDR_ADA_4
DDR_DQA_6
DDR_ADA_5
DDR_DQA_7
DDR_ADA_6
DDR_DQA_8
DDR_ADA_ALT_4
DDR_DQA_10
DDR_ADA_ALT_5
DDR_DQA_11
DDR_ADA_ALT_6
DDR_DQA_12
DDR_ADA_7
DDR_DQA_14
DDR_ADA_8
DDR_DQA_15
DDR_ADA_9
DDR_DQA_16
DDR_ADA_10
DDR_DQA_17
DDR_ADA_11
DDR_DQA_18
DDR_ADA_12
DDR_DQA_19
DDR_ADA_13
DDR_DQA_20
DDR_ADA_14
DDR_DQA_21
DDR_BAA_0
DDR_DQA_23
DDR_BAA_1
DDR_DQA_24
DDR_BAA_2
DDR_DQA_25
DDR_DQA_26
DDR_RASA_N
DDR_DQA_27
DDR_CASA_N
DDR_DQA_28
DDR_WEA_N
DDR_DQA_29
T26
DDR_DM[1]
P25
J27
DDR_DM[3]
K24
Y24
AC26
DDR_DMA_3
DDR_QS0
DDR_QS0b
DDR_QS1
DDR_QS1b
DDR_QS2
DDR_QS2b
DDR_QS3
DDR_QS3b
T28
Y25
AC27
AA26
P23
DDR_AA12
DDR_BAA1
DDR_AA8
DDR_BAA2
DDR_AA10
DDR01_CLK
DDR_AA11
DDR01_CLKb
T3
M3
W24
C401
1000pF
DDR_CKE
R414
DDR_RASb
DDR_CASb
DDR_BAA2
DDR_WEb
DDR_RESETb
10K
K1
J3
K3
L3
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
DDR_QS0
DDR_QS0b
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
DDR01_CLK
W28
DDR_QS1
DDR01_CLKb
DDR_QS1b
DDR23_CLK
N27
DDR23_CLKb
DDR_DM[0]
DDR_DQ[0-7]
DDR_VREFA
DDR_RESETb
W26 R411
240
1%
DDR_DQ[8-15]
DDR_DM[1]
K25
DDR_DQSA_P_3
DDR_DQSA_N_3
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
NC_2
NC_4
DQSL
D9
DDR_AA10
G7
DDR_AA11
K2
DDR_AA12
K8
DQSU
D3
DML
DMU
DDR_DQ[0]
E3
DDR_DQ[1]
F7
DDR_DQ[2]
F2
DDR_DQ[3]
F8
DDR_DQ[4]
H3
DDR_DQ[5]
H8
DDR_DQ[6]
G2
DDR_DQ[7]
H7
VSS_1
VSS_2
VSS_4
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D7
DDR_DQ[14]
C3
DDR_DQ[13]
C8
DDR_DQ[12]
C2
DDR_DQ[9]
A7
DDR_DQ[10]
A2
DDR_DQ[15]
B8
DDR_DQ[11]
A3
N7
T3
A3
A5
A6
M3
A8
DDR23_CLK
C1
DDR23_CLKb
C9
VDD_2
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
E9
F1
R419
56
1%
C419
1000pF
H2
H9
K9
DDR_CKE
VDD_8
DDR_RASb
DDR_CASb
10K
K1
J3
K3
L3
J9
DDR_RESETb
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
DDR_QS2
RESET
A9
DDR_QS3
B3
DDR_QS3b
DQSL
G8
DDR_DM[2]
DDR_DQ[16-23]
DDR_DM[3]
B7
VSS_1
DQSU
VSS_2
VSS_3
E7
D3
M1
DDR_DQ[16]
E3
M9
DDR_DQ[17]
F7
P1
DDR_DQ[18]
F2
P9
DDR_DQ[19]
F8
T1
DDR_DQ[20]
H3
T9
DDR_DQ[21]
H8
DDR_DQ[22]
G2
DDR_DQ[23]
H7
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
DDR_DQ[24]
D7
D1
DDR_DQ[30]
C3
D8
DDR_DQ[29]
C8
E2
DDR_DQ[28]
C2
E8
DDR_DQ[25]
A7
F9
DDR_DQ[26]
A2
G1
DDR_DQ[31]
B8
G9
DDR_DQ[27]
A3
R424
56
R425
56
AR401
56
DDR_AA11
N1
DDR_AA3
N9
DDR_AA7
R1
R9
AR402
56
AR403
56
DDR_AA9
DDR_AA0
DDR_AA1
A8
DDR_BAA0
C1
DDR_BAA2
C9
DDR_BAA1
D2
DDR_AA10
E9
AR404
DDR_WEb
H2
H9
DDR23_AA6
AR405
OPT
C438
1uF
C400
0.1uF
C404
0.1uF
C450
0.1uF
C406
0.1uF
C439
1uF
C408
0.1uF
C451
0.1uF
C409
0.1uF
C440
1uF
C452
0.1uF
C441
1uF
56
DDR_AA12
F1
56
DDR23_AA4
DDR23_AA5
J9
L1
AR406
56
DDR_CASb
R426
56
DDR_RASb
R427
56
DDR01_AA6
L9
T7
R431
4.7K
OPT
DDR01_AA4
DDR_AA14
DDR01_AA5
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL7
B9
DDR_AA13
DDR_AA14
DDR_AA2
K8
NC_6
DQSU
J8
DDR_DQ[24-31]
VSSQ_2
K2
A9
B1
VSSQ_1
DQU0
G7
DQSL
C7
E1
J2
NC_2
NC_4
F3
G3
D9
J1
NC_1
NC_3
DDR_AA14
C437
100pF
DDR_AA8
VDDQ_2
L9
DDR_CKE
+1.5V_DDR
A1
VDDQ_1
T2
C442
100pF
R428
82
240
VDD_9
CK
L1
T7
DDR_VREFA
BA1
L2
+1.5V_DDR
R420
VDD_7
BA2
K7
R423
4.99K
1%
B2
VDD_1
A11
BA0
R421
1%
A10/AP
J7
R418
56
1%
D2
ZQ
A9
M2
N8
L8
A8
NC_5
DDR_BAA0
C436
0.01uF
A7
M7
R9
H1
VREFDQ
A4
R1
DQL6
DQL7
DDR_DQ[8]
R7
N9
DDR_QS2b
VSS_3
E7
L7
A2
N1
NC_6
C7
B7
R3
DDR_AA13
DQSL
DQSU
T8
DDR_AA9
C435
0.01uF
VREFCA
A1
J1
NC_1
DDR_DQSA_P_2
DDR_DQSA_N_2
DDR_AA7
DDR_WEb
WE
G3
+1.5V_DDR
R2
DDR_BAA1
NC_3
DDR_CKE
R8
DDR23_AA6
240
DDR_BAA2
VDDQ_2
RESET
P2
M8
A0
A1
VDDQ_1
F3
P8
DDR23_AA4
VDD_9
CK
DDR_WEb
N2
DDR_AA3
DDR_VREFA
BA1
DDR_CASb
V26
VDD_7
VDD_8
T2
P3
DDR_AA8
VDD_2
L2
+1.5V_DDR
DDR_BAA1
DDR_RASb
W25
R413
56
1%
K9
R415
1%
A10/AP
BA0
P7
DDR_AA1
B2
VDD_1
BA2
K7
R412
56
1%
ZQ
A9
M2
N8
L8
A8
J7
DDR_BAA0
K27
K26
N7
C416
0.01uF
A7
NC_5
DDR_DQSA_N_1
K28
R7
A6
N3
DDR_AA0
DDR23_AA5
A5
M7
DDR_AA7
DDR_AA14
AB28
DDR_DQSA_P_1
DDR_AA11
DDR01_AA6
DDR_AA13
AD27
DDR_RST_N
DDR_ZQ
P24
DDR01_AA5
DDR_AA12
AA24
U23
DDR_DQSA_N_0
L7
DDR_AA10
H1
VREFDQ
A4
DDR_AA9
AA27
AA23
DDR_DQSA_P_0
R3
DDR_BAA0
AD28
DDR_VREFA
T27
T8
A3
R417
4.99K
1%
DDR_AA2
A2
DDR23_AA6
N28
DDR_CKA23_N
DDR_AA8
DDR23_AA5
AC24
DDR_CKA01_N
DDR_CKA23_P
DDR_AA7
C415
0.01uF
VREFCA
A1
DDR23_AA4
AC25
W27
DDR_DMA_2
DDR_AA2
DDR_AA3
R2
DDR_AA13
U24
DDR_DMA_1
DDR01_AA6
DDR01_AA4
DDR_CKEA
DDR_DMA_0
R8
DDR_AA9
V24
DDR_CKA01_P
DDR_DM[2]
Y26
Y27
DDR_DQA_22
DDR_DQA_31
DDR_DM[0]
Y23
P2
DDR01_AA5
DDR_AA1
AB25
DDR_DQA_13
DDR_DM[0-3]
AB27
AB24
DDR_DQA_9
DDR_DQA_30
DDR_AA0
AB26
DDR_DQA_5
P8
DDR01_AA4
V23
DDR_DQA_0
N2
DDR_AA3
NON_BCM_CAP
DDR_DQ[0]
M8
A0
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
EAX63525101
MAIN DDR
4
19
LGE Internal Use Only
+5V_MULTI Switch
P_+5V
+5V_MULTI
fr. PWR SUPPLY UNIT
R538
0
2012
P_17V
P500
SMAW200-H18S1
L516
MLB-201209-0120P-N2
C511
0.1uF
16V
R507
10K
OPT
5
6
7
8
9
10
11
12
13
14
C523
10uF
16V
C527
100uF
16V
C530
0.1uF
16V
C535
10uF
6.3V
OPT
PSU_ERR_DET
C525
16V
0.1uF
OPT
+5V_ST
18
C524
10uF
16V
C528
100uF
16V
C531
0.1uF
16V
C536
10uF
6.3V
OPT
IC506
TPS54231D
C561
P_17V
19
0.1uF
50V
AC_DET
C512
0.1uF
16V
BOOT
C532
0.1uF
16V
VIN
EN
C554
0.01uF
50V
SS
R520
3.6K
OPT
C551
4.7uF
50V
R519
16K
-->3.12V
C549
10uF
25V
+3.3V_Stand_By
Closed to Tuner
L512
22.0uH
R509
100
MOD_ON
+5V_TU
Max 420mA
17V->5V
+5V_NORMAL
R512
0
16
17
C565
10uF
16V
OPT
L518
+5V_ST
1/4W
4
15
RL_ON
P_+5V
L503
MLB-201209-0120P-N2
8
2
7
3
6
2A
4
PH
C581
10uF
16V
C577
10uF
16V
C585
10uF
6.3V
OPT
R1
GND
R533
20K
1%
COMP
VSENSE
5
R2
C576
470pF
50V
C560
0.015uF
50V
C582
15pF
50V
R529
51K
+3.3V_TU
+3.3V_Normal
TUNER
1
1%
R508
100
R537
0
3216
R532
105K
R506
2K
OPT
+5V_MAIN
C526
0.1uF
50V
40V
+5V_ST
C522
100uF
25V
OPT
2
3
C563
10uF
16V
OPT
D500
SMAB34
1
1/10W
L502
MLB-201209-0120P-N2
*NOTE 13
L504
MLB-201209-0120P-N2
POWER_ON/OFF_2
R518
10K
OPT
+3.3V_ST
+5V_ST
C539
0.1uF
16V
C540
22uF
16V
C541
0.1uF
16V
C544
0.1uF
16V
Vout=0.8*(1+R1/R2)
0.1uF
50V
C558
OPT
IC500
R510
0
AP2121N-3.3TRE1
VOUT
+1.25V_TU
PH_2
PH_1
2
3
AGND
MAX 4000 mA
+0.9V_CORE
R521
13K
+2.5V_BCM35230
+5V_MAIN
+5V_MAIN
L501
2uH
IC507
Max 960mA
AZ1085S-ADJTR/E1
[EP]LX
C589
0.1uF
16V
ADJ/GND
POWER_ON/OFF_2
R2
R534
1K
C579
10uF
6.3V
C515
10uF
6.3V
C529
10uF
6.3V
R1
C592
50V
100pF
R546
330K
C593
0.1uF
16V
R2
Vout=Vref*(1+R1/R2)|Vref=0.827
*NOTE 21
C591
0.1uF
16V
C590
10uF
6.3V
1%
R1
1%
C517
10uF
16V
R511
910
R501
10K
OPT
OUTPUT
C578
10uF
6.3V
SS
1
R1
1/10W
1%
C596
3300pF
50V
OPT
5%
C598
10uF
6.3V
2
3A
0
C597
10uF
6.3V
1%
C519
10uF
6.3V
OPT
3
R540
66.5
4.7K
R551
COMP
C518
10uF
6.3V
R503
5A
5
C521
10uF
6.3V
2K
4
R504
16K
C520
10uF
6.3V
OPT
INPUT
1%
FB
EN
R500
10K
C508
0.1uF
16V
OPT
PGOOD
OPT
R553 0
50V
1000pF
C504
C503
10uF
16V
7
6
3
OPT
C500
10uF
16V
2
NC
16V
0.1uF
C501
VIN
AGND
9
Placed on SMD-TOP
8
1
THERMAL
PGND
R547
*NOTE 17
L508
3.6uH
C557
3300pF
50V
120-ohm
L515
IC501
AOZ1037PI
L500
MLB-201209-0120P-N2
10K
OPT
11
IC505
10
SN1007054RTER
4
9
VIN_2
GND_1
GND_2
BOOT
PH_3
THERMAL
17
R535
16K
1%
C550
0.1uF
50V
12
1
5
C553
22uF
10V
+3.3V_Normal
C594
0.1uF
50V
C595
0.01uF
VIN_1
R527
22
13
L506
MLB-201209-0120P-N2
V0 = 1.25(1+R2/R1)
PLACE THE NEAR TO TUNER
PWRGD
R541
10
R2
OPT
R545
0
R528
51K
1%
+5V_MULTI
EN
R542
1.2K
OPT
+0.9V_CORE_BCM35230
C546
0.1uF
50V
R513
1
8
C533
10uF
6.3V
ADJ/GND
R1
C538
10uF
16V
14
C537
0.1uF
50V
RT/CLK
OUTPUT
15
2
1
7
1A
3
POWER_ON/OFF_2
6
INPUT
+3.3V_NORMAL
R523
R552
120-ohm
BLM18PG121SN1D
AZ1117BH-ADJTRE1
OPT
C559
0.1uF
16V
IC503
COMP
C516
0.1uF
16V
VSENSE
C514
10uF
6.3V
OPT
R550
10K
+3.3V_TU
C510
10uF
6.3V
EP[GND]
2
GND
C506
0.1uF
16V
VIN_3
3
1
C502
10uF
16V
16
VIN
R554
1
R2
+1.5V_DDR
+5V_ST
+5V_MULTI
+3.3V_ST
V0 = 1.25(1+R2/R1)
+1.5V_DDR
OPT
L519
R522
10K
R502
10K
Switching freq: 555K
POWER_ON/OFF_2
C505
RTR030P02
Q504
G
0.47uF
25V
R530
0
S
Q501 C
R505 2SC3052
10K
B
IC504
D
AZ1085S-ADJTR/E1
INPUT
E
3
2
OUTPUT
1
ADJ/GND
1K
1%
R524
150
R526
C507
10uF
10V
Vout=Vref*(1+R1/R2)|Vref=0.8
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
1%
R525
75
R2
1%
C513
16V
0.1uF
C509
22uF
10V
R1
R555
1
V0 = 1.25(1+R2/R1)
EAX63525101
POWER
5
19
LGE Internal Use Only
SUB MICOM
+3.3V_ST
+3.3V_ST
680
R670
OPT
OUT
MICOM_RESET
2:S15;11:S15
2
1
4
DEBUG
3
for Debugger
R652
0
VCC
1
+3.3V_ST
P601
12505WS-12A00
2
SW603
JTP-1127WEM
C607
0.1uF
16V
OPT
3
DEBUG
1
GND
2
OPT
C625
10uF
16V
+3.3V_ST
10K
R635
OPT
IC602
AZ7029RTRE1
3
4
MICOM_RESET
5
R649
22
R650
22
NEC_ISP_Tx
MICOM MODEL OPTION
+3.3V_ST
NEC_ISP_Rx
R629
R632
R642
10K
VSS
6
SCL
NEC_ISP_Rx
4
5
NEC_ISP_Tx
120K
HIGH
LOW
8
ATSC
DVB
MODEL1_OPT_1
11
PZ550
PZ750/950
MODEL1_OPT_2
30
PZ950
PZ750/550
MODEL1_OPT_3
31
IR_WRLS
P140/PCL/INTP6
35
P00/TI000
Q601
2SC3052
P01/TI010/TO00
R639
33
P130
R671
P33/TI51/TO51/INTP4
5
32
P20/ANI0
31
ANI1/P21
30
ANI2/P22
NEC
8
29
9
28
ANI4/P24
P71/KR1
10
27
ANI5/P25
P70/KR0
11
26
ANI6/P26
22
P32/INTP3/OCD1B
25
ANI7/P27
OCD1B
12
R644
22
10K
10K
OPT
10K
P603
12507WS-15L
B
E
+5V_MULTI
+3.3V_ST
Q602
2SC3052
R638
R658
47K
C
1
B
E
Q604
2SC3052
R695
R696
22
TOUCH_VER_CHECK
10K
R660
10K
R648
22
OPT
R662
10K
KEY1
KEY2
2
R665
4.7K
3
C612
220pF
50V
*NOTE2
KEY2
C622
10pF
50V
C611
680pF
50V
22
C618
50V
10pF
OPT
C613
220pF
50V
+3.3V_ST
KEY1
5
C619
10pF
50V
C614
10pF
50V
OPT
R661
10K R663
OPT 10K
OPT
4
C623
10pF
50V
OPT
LED_RED
24
23
22
21
20
19
18
17
16
15
14
13
R602
4.7K
5
R656
47K
OPT
SUB_SCL
4
E
R654
10K
C
DISP_EN
22
MODEL1_OPT_1
LED_LOGO
3
LOGO
Q605
2SC3875S(ALY)
+3.3V_ST
R646
47K
IR_MICOM
MODEL1_OPT_2
P72/KR2
MOD_ON
E
MODEL1_OPT_3
ANI3/P23
SOC_RESET
B
22
*NOTE4
Q606
2SC3052
MICOM_DOWNLOAD
P73/KR3
MODEL1_OPT_0
22
C
R699
10K
AC_DET
uPD78F0514
Q603
2SC3052
C
+3.3V_ST
EDID_WP
34
7
LOGO
R669
10K B
RL_ON
SCART_MUTE
4
6
R692
4.7K
R657
47K
C
R647
22
OPT
3
P74
OPT
E
P63
P75
LOGO
R691
330
B
P62/EXSCL0
IC600
LOGO
P602
12507WS-04L
2
+3.3V_Normal
R653
10K
C
1/16W
1%
36
2
LED_LOGO
+5V_MULTI
R655
47K
R698
20K
37
38
39
40
41
42
43
44
45
46
47
48
1
P61/SDA0
EEPROM_SDA
Lighting Logo LED
C617
10uF
OPT
P60/SCL0
6
R666
22
7
AVSS
AVREF
P10/SCK10/TXD0
R667
22
8
SUB_SDA
C615
10pF
OPT
+3.3V_ST
+3.3V_Normal
+5V_MULTI
+3.3V_ST
9
BLUE_LED_0N
10
L601
550
C609 1uF
P12/SO10
P11/SL10/RXD0
P13/TXD6
P14/RXD6
P15/TOH0
C610
10pF
OPT
L602
+3.3V_Normal
C620
10uF
6.3V
750/950
R664
4.7K
C616
10pF
50V
OPT
+3.3V_ST
R620
R697
22
R618
OPT
11
C624
10uF
16V
LED_Power_On
12
C621
10pF
50V
13
22
P30/INTP1
P17/TI50/TO50
P31/INTP2/OCD1A
P16/TOH1/INTP5
SUB_SCL
+3.3V_ST
14
10K
R623
PIN NO.
B
22
R622
PIN NAME
MODEL1_OPT_0
1
R643
22
1/16W
1%
R636
100K
P41
P40
R637
22
22
**PK50 : LED_RED
PK70 : LED_RED/LED_WHITE
PK90 : LED_RED/LED_GALAXY/LED_LOGO
+3.3V_ST
R645
47K
R617
R621
EEPROM_SDA
LOGO
L608
BLM18PG121SN1D
R616
OPT
R689
MODEL PWM OPTION
+3.3V_ST
E
22
33
EEPROM_SCL
Wireless IR Buffer
P120/INTP0/EXLVI
22
RESET
R633
P124/XT2/EXCLKS
P123/XT1
FLMD0
P121/X1/OCD0A
0.1uF
C604
REGC
VSS
R603 4.7K
VDD
+3.3V_ST
R619
R688
SUB ASSY
P122/X2/EXCLK/OCD0B
GND
C603
0.1uF
EEPROM_SCL
33
SDA
10K
3
NEC
4.7M
OPT
+3.3V_ST
R601 4.7K
10K
WRLS_PWR_EN
32.768KHz
10Mhz Crystal
WRLS_DET
OPT
SDA2_3.3V
R641
MODEL1_OPT_1
C608
0.1uF
WC
15pF
*NOTE9
X602
C606
R625
10K
MICOM_RESET
C605
15pF
X601
10MHz
7
MODEL1_OPT_3
MODEL1_OPT_2
100
R615
NC/E2
MICOM_DOWNLOAD
2
0
R627
*NOTE12
NC/E1
8
MODEL1_OPT_0
R607
750/950
R613
10K
10K
47K
OPT
C602
50V
12pF
R631
1
AMP_MUTE
VCC
R605
100
750/950
R606
100
R604 OPT 0
10K
R687
47K
+3.3V_ST
SCL2_3.3V
PSU_ERR_DET
BLUE_LED_0N
NC/E0
GND
C601
50V
12pF
IC601
M24C16-WMN6T
FLMD0
10K
OPT
FLMD0
R640
R614
R608
22
12
R609
R651
11
13
R612
+3.3V_ST
OCD1B
10
R610
950
EEPROM for Micom
9
550
OCD1A
8
750/550
R611
10K
7
10K
6
15
TOUCH_VER_CHECK
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
NEC_TXD
NEC_RXD
POWER_ON/OFF_2
NEC_ISP_Tx
NEC_ISP_Rx
LED_RED
IR_MICOM
LED_Power_On
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
HDMI_CEC
OCD1A
SUB_SDA
R626
4.7K
R630
R628
0
22
16
+3.3V_ST
EAX63525101
MICOM/IR
6
19
LGE Internal Use Only
* HDMI CEC
5V_HDMI_1
L701
BLM18PG121SN1D
5V_HDMI_4
GND
20
20
15
CEC_REMOTE
13
CK-_HDMI1
12
D0-_HDMI1
D0_GND
11
10
9
8
D0+
7
7
D0+_HDMI1
D1-
6
6
D1-_HDMI1
D1_GND
5
5
D1+
4
4
D1+_HDMI1
D2-
3
3
D2-_HDMI1
D2_GND
2
2
D2+
1
1
D2+_HDMI1
CE_REMOTE
CKCK_GND
CK+
R779
R761
27K
100K
DDC_SCL_4
R719
22
HDMI_4
NC
14
D0-
8
R760
22
JP708
0
D715
30V
CEC_REMOTE
HDMI_4
+1.8V_TU
+3.3V_TU
BAT54
CK-_HDMI4
CEC_REMOTE
CK+_HDMI4
D0D0-_HDMI4
D0_GND
D0+
D0+_HDMI4
IC702
AZ1117BH-1.8TRE1
HDMI_CEC
D716
AVRL161A1R1NT
DDC_SCL_1
JP706
CK+_HDMI1
9
JP707
HDMI_4
R718
DDC_CLK
5.6V
CK+
16
5.6V
CK_GND
11
10
D718
CDS3C05HDMI1
CK-
12
5.6V
CE_REMOTE
13
D717
CDS3C05HDMI1
NC
14
OPT
D714
5.5V
DDC_DATA
JP705
R709
22
OPT
R759
3.6K
GND
OPT
R722
1K
OPT
C735
0.1uF
DDC_SDA_4
DDC_SDA_1
DDC_CLK
15
18
17
R708
22
5.6V
16
OPT
D706
5.5V
HDMI_4
D723
CDS3C05HDMI1
DDC_DATA
HDMI_HPD_4
OPT
R717
5V
HDMI_4
D724
CDS3C05HDMI1
OPT
R758
3.6K
GND
17
19
C734
R707
0.1uF 1K
OPT
OPT
EAG62611201
18
HDMI_HPD_1
OPT
R712
5V
C730
0.1uF
+3.3V_ST
HP_DET
HP_DET
19
B
S
OPT
SHIELD
EAG59023302
+3.3V_HDMI
+3.3V_Normal
BODY_SHIELD
D
IN
3
1
L702
BLM18PG121SN1D
ADJ/GND
2
C717
0.1uF
16V
BSS83
Q709
1A
C728
10uF
6.3V
OUT
C729
0.1uF
16V
R778
1
D1-
G
D1-_HDMI4
D1_GND
D1+
D1+_HDMI4
D2D2-_HDMI4
D2_GND
D2+
D2+_HDMI4
HDMI_4
RSD-105156-100
JK703
JK704
YKF45-7058V
HDMI1
HDMI4-SIDE
+3.3V_HDMI
D2-_HDMI2
HDMI_RX1+
HDMI_RX2+
HDMI_RX2-
HDMI_RX1-
HDMI_RX0+
HDMI_RX0-
HDMI_CLK+
HDMI_CLK-
CK-_HDMI1
TPWR_CI2CA
TX2P
TX2N
TX1P
TX1N
TX0P
TX0N
TXCP
14
41
R2X1N
15
40
CBUS_HPD2
DSCL2
R2X1P
16
39
R2X2N
17
38
SBVCC
R2X2P
18
37
MICOM_VCC33
1K
R731
1%
5V_HDMI_2
1%
1K
R729
1uF
D0+_HDMI3
*NOTE 22
R726
10
D0+
D1-
C710
DDC_SDA_3
5V_HDMI_3
R732
10
1K
R734
1%
HDMI_HPD_3
DDC_SCL_3
DSDA2
1uF
DDC_SDA_4
C721
HDMI_HPD_4
DDC_SCL_4
C715
R733
10
*NOTE 22
C707
R1PWR5V
CBUS_HPD1
DSCL1
DSDA1
R0PWR5V
DSCL0
D0_GND
CBUS_HPD0
DSDA0
RSVD_2
R3X2P
D0-_HDMI3
VCC33_2
R3X2N
R3X1P
R3X1N
GND
CK+_HDMI3
D0-
1uF
10V
R2X0P
C711
R2PWR5V
5V_HDMI_4
1uF
55
56
57
58
59
60
42
SDA1_3.3V
0
63.4
CK-_HDMI3
SDA3_3.3V
SCL1_3.3V
1uF
R767
D2+_HDMI3
61
13
R730
36
*NOTE 15
62
R2X0N
35
150
D1+_HDMI3
D2-_HDMI3
R766
63
DSDA3
*NOTE 22
D1-_HDMI3
D1_GND
5V_HDMI_1
D1+
D2-_HDMI3
C703
D2+_HDMI3
1uF
RSD-105156-100
HDMI3-SIDE
*NOTE 22
HDMI_HPD_2
JK702
DDC_SCL_2
D2+
1K
R727
1%
R725
10
D1+_HDMI3
D2D2_GND
DDC_SDA_2
1
CK+
CEC_REMOTE
TXCN
DSCL3
43
DDC_SCL_1
2
CK_GND
C736
0.1uF
64
44
12
HDMI_HPD_1
3
CK+_HDMI1
11
R2XCP
DDC_SDA_1
4
CE_REMOTE
CK-
VCC33_3
R2XCN
D2+_HDMI4
5
ARC
DDC_SDA_3
DDC_SCL_3
R0XCN
CBUS_HPD3
D2-_HDMI4
6
R702
22
NC
JP702
65
R3PWR5V
45
D1+_HDMI4
7
JP701
HDMI_ARC
66
46
10
D1-_HDMI4
8
D0+_HDMI1
9
D0+_HDMI4
9
D0-_HDMI1
VCC33_1
R3X0P
11
10
R701
22
R0XCP
DSDA4
8
D0-_HDMI4
EAG62611201
12
D0+_HDMI3
D1-_HDMI3
67
DSCL4
47
7
R3X0N
13
OPT
R711
1K
5.6V
14
DDC_DATA
OPT
C733
0.1uF
DDC_CLK
D721
CDS3C05HDMI1
15
OPT
D713
5.5V
5.6V
16
OPT
R706
OPT
R757
3.6K
D722
CDS3C05HDMI1
17
D1-_HDMI1
48
6
R1X2P
IC701
SII9287B
SCL3_3.3V
R782 OPT 33
R783 OPT 33
R1X2N
34
D0-_HDMI3
HDMI_HPD_3
GND
R0X0N
49
R4PWR5V
33
HP_DET
5V
R0X0P
CEC_A
32
CK+_HDMI3
20
68
50
31
CK-_HDMI3
69
51
30
HDMI3
5V_HDMI_3
52
+5V_MULTI
5
RSVD_1
BODY_SHIELD
33
INT
4
29
D2+_HDMI2
33
R781
R1X1P
28
D2-_HDMI2
R780
CSDA
R1X1N
27
D1+_HDMI2
CSCL
53
CEC_D
26
D1-_HDMI2
3
54
R1X0P
25
D0+_HDMI2
R1X0N
THERMAL
73
24
EDID Pull-up
HDMI2
2
23
D0-_HDMI2
1
R1XCP
22
JK701
R1XCN
21
HDMI2
20
DDC_SCL_3
D2+_HDMI2
70
DDC_SCL_4
D2+
71
DDC_SDA_3
YKF45-7058V
R777
4.7K
DDC_SDA_4
D2_GND
CK+_HDMI2
18
D2-_HDMI1
D2+_HDMI1
4.7K
R0X1N
4.7K
D2-
HDMI_4
R724
R0X1P
D1+_HDMI2
HDMI_4
R721
4.7K
R716
R0X2N
R714
4.7K
D1+
R0X2P
D1_GND
CK-_HDMI2
19
D1+_HDMI1
A2
C
D1-_HDMI2
R3XCP
1
HDMI_4
D711
D708
D0+_HDMI2
D1-
CK+_HDMI4
2
D0+
[EP]GND
3
D0_GND
72
4
+5V_MULTI
5V_HDMI_4
D0-_HDMI2
19
5
+5V_MULTI
5V_HDMI_3
CK+_HDMI2
D0-
R3XCN
6
CK-_HDMI2
CK-_HDMI4
7
CK+
CEC_REMOTE
A1
8
CK_GND
DDC_SCL_2
A2
9
CK-
DDC_SDA_2
DDC_SCL_1
JP704
C
11
10
DDC_SCL_2
R705
22
HDMI S/W OUTPUT
HDMI1
4.7K
DDC_SDA_2
A1
12
4.7K
DDC_CLK
CE_REMOTE
C705 C706 C708 C709
0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
R723
R720
4.7K
R715
R713
4.7K
DDC_SDA_1
NC
C704
10uF
10V
JP703
C
13
R704
22
A2
14
R763
C732
0.1uF 1K
OPT
OPT
5.6V
15
DDC_DATA
OPT
D712
5.5V
D719
CDS3C05HDMI1
16
OPT
R756
3.6K
GND
5.6V
17
C702
10uF
10V
HDMI_HPD_2
OPT
R703
5V
D720
CDS3C05HDMI1
18
C
HP_DET
19
C701
10uF
10V
D710
D707
20
EAG59023302
A1
A2
5V_HDMI_2
SHIELD
A1
+5V_MULTI
5V_HDMI_2
+5V_MULTI
5V_HDMI_1
HDMI4
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
HDMI
7
19
LGE Internal Use Only
RGB/ PC AUDIO/ SPDIF/ CVBS / COMP / RS232C
D0A
DSUB_VSYNC
22
R800
DSUB_HSYNC
22
R801
D0B
Q0
14
1
2
13
3
12
4
11
AT24C02BN-SH-T
VCC
A0
C806
0.1uF
16V
D3B
A1
D3A
A2
*NOTE 19
OPT
D1A
R882 0
D1B
Q1
GND
10
6
9
7
8
8
2
7
3
6
R819
R827
10K
R821
2.7K
2.7K
VCC
D2B
4
5
T_TERMINAL1
7A
B_TERMINAL1
EDID_WP
R822
SCL
22
D801
5.1V
5
T_SPRING
D837
5.1V
R834
470K
7B
B_TERMINAL2
6B
T_TERMINAL2
C816
560pF
50V
C805
560pF
50V
R881 0
R826
0
C810
18pF
50V
C803
0.1uF
16V
L804
BLM18PG121SN1D
PC_L_IN
RGB_DDC_SDA
C809
18pF
50V
D803
30V
OPT
PC_R_IN
R_SPRING
22
R823
SDA
SPDIF_OUT
L803
BLM18PG121SN1D
4
RGB_DDC_SCL
*NOTE 19
OPT
D2A
6A
WP
Q3
GND
5
1
C811
0.1uF
16V
VINPUT
FIX_POLE
IC802
R851
0
4
+5V_MULTI
IC801
74F08D
VCC
R859
2.7K
E_SPRING
3
3
2
JK801
PEJ027-01
A1
GND
1
C
SPDIF OUT
Fiber Optic
D810
KDS184
A2
JK802
JST1223-001
+3.3V_Normal
PC AUDIO
+5V_MULTI
RGB PC
R830
0
D802
5.1V
D838
5.1V
R833
470K
C818
560pF
50V
C804
560pF
50V
Q2
OPT
R806
10K
22
R813
D804
30V
C807
22pF
50V
D805
30V
C808
22pF
50V
CVBS SIDE JACK
OPT
R807
10K
22
R812
D811
D809
5.6V
OPT
5.6V
OPT
AV2_SIDE_R_IN
R874
22
D835
5.1V
DSUB_B+
C837
4.7pF
50V
D808
30V
R816
75
R835
470K
R866
12K
OPT
R836
470K
R867
12K
OPT
R842
75
C817
47pF
50V
AV2_CVBS_EMI
D800
5.1V
AV2_SIDE_L_IN
JK800
D836
5.1V
PPJ235-01
R872
22
DSUB_G+
R815
75
C836
4.7pF
50V
5C
[RD]E-LUG
4C
[RD]O-SPRING
3C
[RD]CONTACT
4B
[WH]O-SPRING
3A
[YL]CONTACT
R831
10K
1K
R832
4A
[YL]O-SPRING
5A
[YL]E-LUG
D826
5.1V
D824
5.1V
D812
5.6V
D807
30V
R817
75
C834
100pF
50V
R838
2.7K
R849
1K
ROM_DL_CK
AV2_SIDE_CVBS_DET
16
SHILED
DDC_GND
DDC_CLOCK
SYNC_GND
D825
5.6V
COMP/AV REAR JACK
JK803
5
10
4
9
3
15
GND_1
V_SYNC
NC
14
BLUE
H_SYNC
BLUE_GND
13
GREEN
DDC_DATA
8
RED
2
1
7
12
GND_2
C832
270pF
50V
OPT
RED_GND
C831
220pF
50V
OPT
11
D815
30V
OPT
R824
220pF
50V
OPT
6
R825
220pF
50V
OPT
P801
D828
30V
OPT
GREEN_GND
R802
10
ROM_DL_DA
SPG09-DB-010
ROM DOWNLOAD
for Plasma
AV2_SIDE_CVBS_IN
+3.3V_Normal
R873
22
C835
4.7pF
50V R811
10
R850
10
+3.3V_Normal
D806
30V
DSUB_DET
DSUB_R+
D827
5.1V
6E
[RD]E-LUG
5E
[RD]O-SPRING_2
4E
[RD]CONTACT_2
D833
5.1V
5D
[WH]O-SPRING
D819
5.1V
4C
[RD]CONTACT_1
5C
[RD]O-SPRING_1
7C
[RD]E-LUG-S
PPJ234-02
RS232C JACK
OPT
R868
12K
COMP_R_IN
R843
470K
10
5
+3.3V_ST
IC803
C820
0.1uF
MAX3232CDR
R879
4
JP809
R808
3
7
0.1uF
0.1uF
C812
C813
C1+
V+
C1-
0.1uF
C814
C2+
C2-
0.1uF
C815
V-
1
2
16
15
3
14
4
13
5
12
6
11
VCC
100
100
GND
5B
[BL]O-SPRING
7B
[BL]E-LUG-S
8
100
OPT
+3.3V_ST
4A
[GN]CONTACT
5A
[GN]O-SPRING
6A
[GN]E-LUG
2
R878
*NOTE 16
D821
5.1V
D831
D813
1
D814
L800
CM2012FR27KT
R845
75
RIN2
7
10
8
9
COMP_AV_DET
10
R856
1%
10
R857
1%
10
R858
1%
COMP_Pr
C800
27pF
50V
C825
27pF
50V
P802
L801
CM2012FR27KT
ROUT1
D817
5.1V
DIN1
R846
75
D816
5.1V
DOUT2
R877
D820
5.1V
SPG09-DB-009
R810
4.7K
1. COMP_DET + COMP_AV_DET = COMPONENT
2. COMP_DET ONLY = AV
R880
2.7K
D832
5.6V
D823
5.1V
R803
4.7K
470K
6
D830
DOUT1
RIN1
+3.3V_Normal
R844
1K
JP810
R809
D834
5.1V
R869
12K
100
OPT
COMP_L_IN
9
OPT
COMP_Pb
C801
27pF
50V
C823
27pF
50V
DIN2
UART_TXD_3D
R828
ROUT2
EAN41348201
L802
CM2012FR27KT
0
BCM_RX
UART_RXD_3D
R829
0
R804
0
NEC_RXD
D829
5.1V
R847
75
D818
5.1V
C824
27pF
50V
COMP_Y/AV1_CVBS
C802
27pF
50V
+3.3V_Normal
BCM_TX
R805
0
R848
2.7K
NEC_TXD
1K
R852
COMP_DET
D822
5.6V
CLOSE TO JUNCTION
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
COMMON JACK
8
19
LGE Internal Use Only
+5V_MULTI
SCART
+3.3V_Normal
EU
C922
0.1uF
16V
R923
10K
R967
0
NON_EU
EU
R941
10K
P_17V
DTV_ATV_SELECT
IC901
NLASB3157DFT2G
SC/COMP2_DET
R924
1K
EU
C906
0.1uF
16V
D908
5.6V
OPT
L902
BLM18PG121SN1D
SELECT
VCC
EU
R919
1
EU
SC_CVBS_IN
SHIELD
D911
5.5V
EU
23
AV_DET
R914
75
EU
C914
220pF
50V
OPT
C909
47pF
50V
EU
C
COM_GND
SYNC_IN
SYNC_OUT
D907
5.5V
EU
SYNC_GND2
9
18
[GN]G
R949
680 EU
19
SYNC_GND1
EU
EU
[GN]GND
EU
EU
C
Q900
MMBT3906(NXP)
C917
100uF
25V
EU
EU
R922
75
20
10
R951
120
B
21
11
EU
B
EU
22
FIX-TER
R935
22
C919
0.1uF
50V
EU
C920
0.1uF
50V
A
E
EU
E
R970
680 EU
R928
470K
EU
R953
82
EU
1
EU
5
2
4
3
ATV_OUT
GND
B0
DTV/MNT_V_OUT
C929
180pF
50V
OPT
C927
180pF
50V
OPT
R947
75
1%
EU
R946
75
1%
OPT
Selece = High ==> A = B1
ATV_OUT / MNT_OUT
Selece = Low
R971
300 EU
B1
R954
47K C918
47uF
16V
EU
Q901
2SC3052
R950
300EU
6
==> A = B0
CLOSE TO SOC
R952
15K
17
8
[GN]C_DET
7
[BL]B
NON_EU
RGB_IO
L900
CM2012FR27KT
16
R_OUT
14
[RD]R
0
EU
R_GND
R909
75
D900
5.5V
RGB_GND
6
*NOTE3
SC_R/COMP2_Pr
15
R968
C905
27pF
50V
+3.3V_Normal
EU
R973
10K
13
5
D2B_OUT
[WH]L_IN
L901
CM2012FR27KT
12
G_OUT
4
[RD]R_IN
D2B_IN
13
PPJ-230-01
JK901
R907
75
D901
5.5V
10
[RD]MONO
EU
R929
10K
SC_G/COMP2_Y
11
G_GND
C904
27pF
50V
C923
27pF
50V
9
ID
OPT
L903
CM2012FR27KT
8
B_OUT
R906
75
D902
5.5V
AUDIO_L_IN
6
B_GND
C903
27pF
50V
C925
27pF
50V
R932
D909 9.1K
30V *NOTE 14
OPT
5
AUDIO_GND
EU
R975
1K
+3.3V_Normal
EU
R974
10K
EU
Q909
2SC3052
C
EU
Q908
2SC3052
B
GAS18
OPT
GAS2
*NOTE11
GAS19
OPT
MDS62110209
MDS62110209
E
GAS20
OPT
MDS62110209
OPT
GAS3
REC_8
GAS21
MDS62110209
OPT
MDS62110209
GAS22
SC_ID
EU
R948
1K
MDS61887711
OPT
GAS4
GAS23
MDS62110209
MDS62110209
*NOTE 8
4
OPT
MDS62110209
SC_FB
C
B
OPT
GAS1
MDS62110209
E
OPT
D910
30V
R933
0
EU
SC_B/COMP2_Pb
7
SMD GASKET
R927
75 EU
C921
27pF
50V
AUDIO_L_OUT
OPT
OPT
GAS5
3
SC/COMP2_L_IN
AUDIO_R_IN
2
AUDIO_R_OUT
D903
5.6V
1
OPT
C916
330pF
50V
C913
OPT
R903
470K
MDS62110209
OPT
R945
12K
OPT
GAS6
MDS62110209
OPT
GAS7
PSC008-02
JK900
SC/COMP2_R_IN
D904
5.6V
OPT
C915
330pF
50V
C912
OPT
R902
470K
MDS62110209
OPT
R938
12K
OPT
GAS8
MDS62110209
EU
R901
1K
OPT
GAS9
DTV/MNT_LOUT
EU
C902
6800pF
50V
D905
5.6V
EU
MDS62110209
R913
470K
OPT
GAS10
OPT
MDS62110209
EU
R900
1K
GAS11
MDS61887711
DTV/MNT_ROUT
EU
C901
6800pF
50V
D906
5.6V
EU
GAS12
R912
470K
OPT
MDS62110209
OPT
GAS13
MDS61887711
GAS14
OPT
MDS62110209
GAS15
OPT
MDS62110209
GAS17
OPT
MDS62110209
AUD_OUT
IC900
AS324MTR-E1
EU
OUT1
DTV/MNT_LOUT
EU
R921
33K
EU
C900
0.1uF
50V
OPT
R963
47K
EU
EU
C911
33pF
EU
R918
5.6K
VCC
SCART_Lout_P
R915
5.6K
SCART_Rout_P
R916
5.6K EU
R917
5.6K EU
OPT
OPT SCART_Rout_N
R961 R964
47K
47K
EU
EU
EU
R910
2K
DTV/MNT_ROUT
C907
10uF
16V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
IN2+
IN2-
R920
33K EU
EU
C910
33pF
14
2
13
3
12
4
11
5
10
[SCART PIN 8]
OUT4
OPT
R965
3K
IN4-
R926
10K
IN1+
OUT2
EU
OPT
R962
47K
IN1-
1
R925
10K
6
7
9
8
IN4+
GND
IN3+
+3.3V_ST
DTV/MNT_LOUT
EU
Q905
2SC3052
IN3-
R956
10K
OPT
R957
10K
OPT
R960
10K
C
B
EU
R944
4.7K
OPT
C908
10uF
16V
SCART_Lout_N
P_17V
[SCART AUDIO MUTE]
EU
R911
2K
OPT
P_17V
OPT
OPT
RT1P141C-T112
Q907
EU
R939
2K
3
REC_8
E
1
2
EU
R940
2K
Q903
2SC3052
OPT
R959
1K
SCART_MUTE
EU
Q906
2SC3052
Q904
2SC3052
OPT
E
C
B
SC_RE1
OUT3
DTV/MNT_ROUT
R966
12K
EU
R972
0
EU
C924
0.1uF
C
OPT
SC_RE2
B
Q902
2SC3052
OPT
R958
1K
E
EAX63525101
SCART
09
19
LGE Internal Use Only
WIRELESS READY MODEL
Wireless Interface
WIRELESS
P_17V_WRLS
Wireless Power On/Off
JK1000
KJA-PH-3-0168
P_17V
VCC[24V/20V/17V]_1
VCC[24V/20V/17V]_2
VCC[24V/20V/17V]_3
VCC[24V/20V/17V]_4
VCC[24V/20V/17V]_5
VCC[24V/20V/17V]_6
+3.3V_Normal
WIRELESS
R1001
1K
WIRELESS
R1004
10K
DETECT
INTERRUPT
GND_1
RESET
WRLS_DET
GND_2
I2C_SCL
WRLS_SCL
GND_3
5.6V
WIRELESS
5.6V
D1002
CDS3C05HDMI1
WRLS_SDA
WIRELESS
D1001
CDS3C05HDMI1
I2C_SDA
UART_RX
UART_TX
GND_4
IR
IR_WRLS
GND_5
GND_6
1
WIRELESS
2
L1000
BLM18PG121SN1D
3
4
5
WIRELESS
WIRELESS
WIRELESS
C1000
0.1uF
50V
R1012
22K
C1001
2.2uF
50V
S
6
WIRELESS
R1013
2.2K
7
WIRELESS
Q1001
ZXMP3F30FHTA
G
P_17V_WRLS
D
8
WIRELESS
9
WRLS_PWR_EN
10
R1011
10K
B
11
C
WIRELESS
Q1000
MMBT3904(NXP) WIRELESS OPT
C1004
C1002
0.01uF
10uF
E
50V
25V
12
13
14
15
16
*weapon.ahn $ [WRLS] - WiReLeSs
17
18
19
20
Wireless I2C connection with I2C_1
Address : 0x20
21
SHIELD
WIRELESS
R1014
33
WRLS_SDA
SDA2_3.3V
R1015
33
WRLS_SCL
* weapon.ahn $ [MRMC] Motion ReMoCon
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SCL2_3.3V
WIRELESS
EAX63525101
WIRELESS
10
19
LGE Internal Use Only
IC1100
120-ohm
C1100
NC 8
2 IN_1
OUT_1 6
3 IN_2
FLG 5
220uF
16V
R1103
4.7K
OPT
1 GND
OUT_2 7
IC1102
HEF4053B
+5V_MULTI
AP2191DSG
L1102
MLB-201209-0120P-N2
+3.3V_Normal
OPT
0
R1137
+3.3V_Normal
USB 1
Y1B
M_REMOTE_TX
1
16
2
15
3
14
4
13
VDD
C1102
4 EN
C1103
10uF
10V
R1106
2.7K
EAN61849601
Y0B
C1104
0.1uF
MOD_TX
USB_CTL1
Y1C
3AU04S-305-ZC-(LG)
JK1101
/USB_OCD1
1
ZC
USB DOWN STREAM
2
Y0C
USB_DM1
5
12
ZB
0.1uF
REMOTE_OR_MODULE_TX
+3.3V_Normal
P1101
FF05004-80
ZA
REMOTE_OR_MODULE_RX
R1123
4.7K
Y1A
M_REMOTE_RX
Y0A
R1138
0
R1122
4.7K
R1141
+3.3V_Normal
OPT
MOD_RX
MOD_RX
R1119
0
R1120
0
1
0
OPT
3
E
USB_DP1
6
11
SA
2
3
4
MOD_TX
5
R1139
4.7K
OPT
6
7
4
R1136
5
D1100
ADUC 5S 03 0R5
5.5V
D1101
ADUC 5S 03 0R5
5.5V
0
VEE
VSS
7
10
8
9
SB
REMOTE_SW_CTRL
SC
R1140
47K
OPT
TE4P
8
TE4N
9
TD4P
10
TD4N
11
12
TCLK4P
13
TCLK4N
14
15
USB 2
16
TC4N
17
TB4P
18
TB4N
19
TA4P
20
TA4N
21
22
+3.3V_Normal
23
IC1101
+5V_MULTI
AP2191DSG
L1103
MLB-201209-0120P-N2
NC 8
120-ohm
C1105
3AU04S-305-ZC-(LG)
JK1102
TC4P
1 GND
OUT_2 7
2 IN_1
OUT_1 6
3 IN_2
FLG 5
220uF
16V
R1112
4.7K
OPT
TE3P
24
TE3N
25
TD3P
26
TD3N
27
28
4 EN
R1113
2.7K
EAN61849601
C1106
10uF
10V
C1107
0.1uF
TCLK3P
29
TCLK3N
30
31
1
USB_CTL2
2
USB_DM2
3
USB DOWN STREAM
/USB_OCD2
USB_DP2
TC3P
32
TC3N
33
TB3P
34
TB3N
35
TA3P
36
TA3N
37
38
4
39
5
D1108
ADUC 5S 03 0R5
5.5V
D1109
ADUC 5S 03 0R5
5.5V
TE2P
40
TE2N
41
TD2P
42 LVDS_N
43
TD2N
44
TCLK2P
45
TCLK2N
46
47
TC2P
48
TC2N
49
TB2P
50
TB2N
51
TA2P
52
TA2N
53
LVDS_P
P1101-*1
104060-8017
1
2
3
4
5
6
7
8
9
10
11
54
12
13
55
14
15
Ethernet Block
TE1P
56
TE1N
57
TD1P
58
TD1N
59
16
17
18
19
20
21
22
23
24
25
26
60
27
28
+2.5V_BCM35230
TCLK1P
61
TCLK1N
62
29
30
31
32
33
63
34
35
JK1100
TC1P
64
TC1N
65
TB1P
66
TB1N
67
TA1P
68
TA1N
69
36
37
38
43-10013AD11-1
L1100
CIC21J501NE
L1104
CIC21J501NE
39
40
41
42
43
1
44
45
46
47
48
EPHY_TDP
49
50
51
70
52
53
2
71
+3.3V_Normal
54
55
56
72
57
58
73
3
59
60
EPHY_TDN
61
74
62
63
4
R1125
4.7K
EPHY_RDP
R1124
4.7K
MOD_SDA
100
DISP_EN
R1115
64
65
66
76
67
68
77
MOD_SCL
69
70
71
78
ROM_DL_DA
5
75
72
73
79
ROM_DL_CK
74
75
76
80
77
78
6
79
7
80
81
C1108
0.1uF
16V
+3.3V_Normal
D1103
D1105
D1106
D1107
5.5V
5.5V
5.5V
5.5V
81
27K
R1121
C1101
0.1uF
16V
EPHY_RDN
8
R1100
510
R1101
510
D1
D2
EPHY_LINK
D3
D4
EPHY_ACTIVITY
9
D1102
D1104
5.5V
5.5V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
USB/Ethernet/LVDS
11
19
LGE Internal Use Only
Motion Remote controller
TI solution M_REMOTE OPTION
+3.3V_Normal
P1201
2
3
R1208
100
M_REMOTE_RX
R1211
100
4
M_REMOTE_TX
R1212
100
5
M_RFModule_RESET
R1213
100
6
7
R1217
2.7K
R1216
2.7K
1
R1218
2.7K
+3.3V_Normal
L1201
120-ohm
12507WS-12L
DC_MREMOTE
R1209
100
DD_MREMOTE
8
9
10
11
12
R1223
22
3D_GPIO_0
R1222
22
3D_GPIO_1
R1224
22
3D_GPIO_2
R1215
22
3D_SYNC_RF
13
ALL M_REMOTE OPTION
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
M_REMOCON
12
19
LGE Internal Use Only
AUDIO AMP
+3.3V_Normal
+17V_AMP
P_17V
+3.3V_AMP
L1306
MLB-201209-0120P-N2
L1307
MLB-201209-0120P-N2
C1326
0.1uF
50V
+3.3V_AMP
EAPD/OUT4B
R1301
10K
+3.3V_AMP
OPT
TWARN/OUT4A
C
18
20
17
21
16
22
15
23
14
24
13
25
12
Q1300
2SC3052
10K
50V
0.1uF
E
VDD_DIG_1
C1304
GND_DIG_1
OPT
0
R1320
33K
R1311
AC_DET
PWRDN
OUT3A/FFX3A
OUT3B/FFX3B
CONFIG
50V
0.1uF
C1306
VDD
GND_REG
10.0uH
L1300
OUT1A
20
Close-by
FILTER_PLL
GND_PLL
11
10
26
Close-by
GND1
OUT1B
VCC1
R1319
1uF 25V
C1319
0.22uF
50V
C1323
1000pF
50V
C1320
0.22uF
50V
C1324
1000pF
50V
C1317
0.22uF
50V
C1316
330pF
50V
C1308
0.1uF 50V
C1309
AUD_MASTER_CLK
100
R1305
XTI
27
9
OUT2A
8
VCC2
7
GND2
SPK_L10.0uH
L1301
SPK_R+
AUD_SCK
100
R1306
BICKI
28
100
R1307
LRCKI
29
C1315
330pF
50V
C1310
C1311
SDI
30
6
20
C1321
0.22uF
50V
C1325
1000pF
50V
C1322
0.22uF
50V
C1330
1000pF
50V
C1318
0.22uF
50V
0.1uF 50V
AUD_LRCH
100
R1308
10.0uH
L1302
1uF 25V
Close-by
AUD_LRCK
R1318
OUT2B
SPK_R-
AMP_RESET_N
0
R1309
RESET
1%
1/16W
INT_LINE
31
5
32
SCL3_3.3V
100
R1314
+3.3V_AMP
R1310
2K
+3.3V_AMP
R1304
2K
GND_DIG_2
10K
R1303
2.2
50V
4700pF
C1301
R1302
0
R1313
R1315
2K
16V
0.1uF
C1300
SCL
34
Close-by
50V
680pF
50V
0.1uF
C1303
50V
0.1uF
C1305
VDD_DIG_2
37
SDA
1%
1/16W
33
THERMAL
100
R1316
10.0uH
L1303
VCC_REG
+17V_AMP
50V
SDA3_3.3V
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
C1329
0.1uF
50V
SPK_L+
VDD_PLL
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
C1328
0.1uF
50V
0 R1312
R1300 B
AMP_MUTE
19
C1327
0.1uF
50V
35
4
VSS
3
TEST_MODE
2
SA
0.1uF
C1307
WAFER-ANGLE
50V
35V
68uF
4
3
SPK_R+
2
SPK_R-
1
0.1uF
C1312
1
35V
68uF
SPK_L+
SPK_L-
GND_SUB
C1313
C1314
OPT
P1300
36
SMAW250-H04R
[EP]GND
C1302
STA368BWG
IC1300
EAX63525101
AUDIO[ST]
13
19
LGE Internal Use Only
CI_MDI[0-7]
Close to BCM35230
BCM INT Demod
CI_MDI[0]
CI_MDI[1]
PCM_MDI[0]
R1408
22 OPT
PCM_MDI[1]
R1409
22 OPT
PCM_MDI[2]
R1410
22 OPT
PCM_MDI[3]
R1411
22 OPT
PCM_MDI[4]
R1412
22 OPT
PCM_MDI[5]
R1413
22 OPT
PCM_MDI[6]
R1414
22 OPT
CI_MDI[6]
PCM_MDI[7]
R1415
22 OPT
CI_MDI[7]
+5V_CI_ON
CI_MDI[2]
CI_MDI[3]
CI_MDI[4]
CI_MDI[5]
C1404
10uF
10V
C1403
0.1uF
CI
FE_TS_DATA[0-7]
R1431
10K
CI
CI_DATA[0-7]
R1432
10K
OPT
P1400
10067972-000LF
R1436
/CI_CD1
FE_TS_DATA[0]
R1400
22
CI
FE_TS_DATA[1]
R1401
22
CI
FE_TS_DATA[2]
FE_TS_DATA[3]
R1402
22
CI
R1403
22
CI
R1404
22
CI
CI_TS_DATA[3]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
FE_TS_DATA[6]
FE_TS_DATA[7]
BCM INT Demod
R1405
22
CI
R1406
22
CI
R1407
22
CI
R1472
/PCM_IORD
/PCM_IOWR
R1469
CI
PCM_MIVAL
PCM_MICLK
R1416
22
OPT
R1417
22
OPT
R1418
22
OPT
R1419
TS_SYNC
R1420
TS_VAL
22
22
R1421
TS_CLK
22
44
10
ADDR11
R1456
45
11
ADDR10
R1457
TS_IN_SYN
46
12
ADDR8
R1458
CI_MDI[0]
TS_IN0
47
13
ADDR13
R1459
CI_MDI[1]
TS_IN1
48
14
ADDR14
R1460
CI_MDI[2]
TS_IN2
49
15
/WR_EN
CI_MDI[3]
TS_IN3
50
16
/IRQA
VCC
51
17
VCC
VPP
52
18
VPP
0
R1435
OPT
CI_TS_DATA[2]
AR1401
CI
100
PCM_TS_DATA[5]
CI_TS_DATA[4]
CI_TS_DATA[5]
19
54
20
TS_IN_CLK
55
21
ADDR12
56
22
ADDR7
TS_OUT_CLK
57
23
ADDR6
22
CI_RESET
58
24
ADDR5
22
CI_WAIT
59
25
ADDR4
R1433 10K OPT INPACK
REG
60
26
ADDR3
61
27
ADDR2
TS_OUT_VAL
62
28
TS_OUT_SYN
63
29
TS_OUT0
64
30
DAT0
CI_DATA[0]
TS_OUT1
65
31
DAT1
CI_DATA[1]
TS_OUT2
66
32
DAT2
CI_DATA[2]
62 /CI_DET2
GND
67
33
/IO_BIT
68
34
GND
PCM_TS_DATA[6]
CI_TS_DATA[6]
PCM_TS_DATA[7]
CI_TS_DATA[7]
R1422
220 CI
R1423
100 CI
R1424
100 CI
CI_DATA
OUTPUT
INPUT
Z
NAND_DATA
INPUT
OUTPUT
Z
22
PCM_ADDR[4]
22
PCM_ADDR[4]
PCM_ADDR[3]
22
PCM_ADDR[3]
PCM_ADDR[2]
PCM_ADDR[2]
ADDR1
22
ADDR0
R1454 CI
22
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[1]
CI_ADDR[0]
CI_ADDR[1]
CI_ADDR[0]
+5V_CI_ON
10K
G1
+5V_CI_ON
+3.3V_CI
0.1uF
C1402
16V
R1425 CI
C1405
0.1uF
16V
R1430 CI
IC1402
74LVC245A
22
100
AR1402 CI
OE
B0
B1
20
1
CI
19
2
18
3
17
4
16
5
15
6
14
7
13
8
22
R1442
22K
CI
R1439
10K
OPT
B2
CI_DATA[3]
B3
CI_DATA[4]
CI
AR1403 100
B4
C1408
4.7uF
16V
G
READY
L1401
BLM18PG121SN1D
CI
Q1401
AO3407A
CI
C1413
0.1uF
16V
CI
C1411
0.1uF
16V
CI
R1468
10K
CI
NAND_REb
NAND_DATA[0-7]
DIR
A0
NAND_DATA[0]
A1
NAND_DATA[1]
A2
NAND_DATA[2]
A3
NAND_DATA[3]
R1477
2.2K
CI
C
A4
NAND_DATA[4]
A5
NAND_DATA[5]
A6
NAND_DATA[6]
A7
NAND_DATA[7]
Q1400
2SC3052
CI
B
PCM_5V_CTL
CI_DATA[2]
R1441
4.7K
CI
E
CI_DATA[5]
CI_DATA[6]
+3.3V_CI
B7
12
9
11
10
GND
*AND GATE
CI
IC1400
74LVC125APW
1
14
2
13
3
12
4
11
5
B6
CI_DATA[7]
+3.3V_CI
+5V_CI_ON
10
VCC
NAND F/M Data
CI
C1400
0.1uF
16V
CI
IC1401
74AHC08PW
4OE
/CI_CE2
1A
/CI_CE1
4A
NAND_WEb
4Y
CI 45
/PCM_IOWR
1B
/CI_CE2
1Y
/CI_EN1
3OE
2A
6
9
7
8
2B
NAND_REb
3Y
14
VCC
3,3V_CI POWER
2
13
3
12
4
11
4B
+3.3V_Normal
NAND_RBb
4A
CI
4Y
CI_ADDR[1]
C1414
0.1uF
16V
IC1404
74LVC245A
VCC
3A
/PCM_WE
1
CI
C1401
0.1uF
16V
+3.3V_CI
/CI_EN1
GND
PCM_ADDR[7]
S
DIR
L
H
X
B5
2Y
PCM_ADDR[12]
22
PCM_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
22
R1451 CI
R1452 CI
R1453 CI
R1444
OPT
PCM_ADDR[12]
22
+5V_MAIN
Y
L
H
Z
2A
R1449 CI
R1450 CI
/PCM_IRQA
CI POWER ENABLE CONTROL
OE
L
L
H
CI_DATA[1]
CI 15
22
/PCM_WE
CI_TS_SYNC
VCC
NAND_WEb
CI
R1447 CI
R1448 CI
22
CI_TS_CLK
CI_DATA[0]
1Y
69
CI_TS_VAL
/CI_EN1
2OE
R1446
CI
CI_MIVAL
CI_DATA[0-7]
CI 9
CI
22
C1412
0.1uF
16V
CI
CI_MICLK
CI TS OUTPUT
/PCM_OE
0
OPT
R1466
CI
R1474
10K
CI
R1463
CI_MISYNC
C1415
12pF
50V
OPT
1A
R1467
10K
CI
CI_ADDR[14]
CI_TS_DATA[1]
PCM_TS_SYNC
NAND_REb
PCM_ADDR[13]
CI_ADDR[8]
CI_TS_DATA[0]
CI_TS_DATA[3]
PCM_TS_VAL
/CI_CE1
R1443
53
G2
PCM_TS_DATA[3]
PCM_TS_CLK
1OE
PCM_ADDR[13]
CI_ADDR[14]
0.1uF
TS_IN7
R1437
PCM_ADDR[9]
CI
C1409
TS_IN6
R1434 0
CI
+5V_CI_ON
PCM_ADDR[11]
PCM_ADDR[9]
CI_ADDR[8]
CI_TS_DATA[0-7]
PCM_TS_DATA[2]
PCM_TS_DATA[4]
A
L
H
X
CI 22
CI 22
CI 22
TS_IN5
CI
OE
L
L
H
PCM_ADDR[11]
CI_MDI[5]
CI_TS_CLK
R1473
10K
CI
CI_ADDR[10]
/PCM_OE
CI 22
CI 22
CI_MDI[6]
CI_TS_DATA[2]
/CI_CD2
100
CI_ADDR[10]
CI_MDI[7]
R1429
10K
OPT
CI_TS_DATA[1]
CI
TS_IN4
+5V_CI_ON
22
CI 22
CI 22
TS_IN_VAL
CI_TS_DATA[0]
AR1400
R1455
IOWR
CI TS INPUT
PCM_TS_DATA[0]
/CARD_EN1
IORD
CI_MDI[0-7]
CI_TS_SYNC
PCM_TS_DATA[1]
7
22
CI_TS_VAL
Close to CI Slot
41
R1461
CI
PCM_TS_DATA[0-7]
CI_DATA[7]
TS_OUT7
R1462
CI
R1427
DAT6
ADDR10
R1428
100K
OPT
/PCM_WAIT
6
/O_EN
R1478
10K
OPT
CI
CI_DATA[6]
40
8
CI_MDI[4]
PCM_RST
CI_DATA[5]
DAT6
9
+5V_CI_ON
R1426
DAT5
5
43
CI_MICLK
CI
4
39
42
CI_MIVAL
CI
CI_DATA[4]
3
38
VS1
CI_MISYNC
Close to Tuner
37
TS_OUT5
TS_OUT6
TS_OUT4
CARD_EN2
Close to BCM35230
PCM_MISYNC
CI_DATA[3]
CI
DAT4
TS_OUT3
22
CI
FE_TS_DATA[4]
FE_TS_DATA[5]
DAT3
36
CI_TS_DATA[4]
CI
CI
R1470 R1471
10K
10K
GND
2
35
CI
/PCM_CE1
1
GND
62 /CI_DET1
+5V_CI_ON
R1445
10K
OPT
D
PCM_MDI[0-7]
5
10
6
9
3B
NAND_CLE
/CI_EN1
R1475
22
CI
OE
B0
CI 44
/PCM_IORD
/PCM_CE1
CI 7
2Y
PCM_ADDR[2]
3A
B1
PCM_ADDR[3]
GND
7
8
3Y
B2
CI_ADDR[0]
PCM_ADDR[4]
B3
PCM_ADDR[7]
B4
PCM_ADDR[9]
B5
PCM_ADDR[11]
B6
PCM_ADDR[12]
B7
PCM_ADDR[13]
20
1
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
10
CI
R1476
10K
CI
+3.3V_CI
CI
L1400
BLM18PG121SN1D
DIR
A0
CI_ADDR[2]
A1
CI_ADDR[3]
A2
CI_ADDR[4]
CI
C1407
0.1uF
CI
C1406
0.1uF
A3
CI_ADDR[7]
A4
CI_ADDR[9]
A5
CI_ADDR[11]
A6
CI_ADDR[12]
A7
CI_ADDR[13]
GND
CI DETECT
+3.3V_CI
+3.3V_CI
CI
CI
R1438 R1440
10K
10K
CI CONTROL INTERFACE
IN_B
1
IN_A
2
GND
3
5
VCC
4
OUT_Y
/CI_CD2
/CI_CD1
+3.3V_CI
CI
IC1403
KIC7SZ32FU
CI
C1410
0.1uF
16V
GND
CI
R1465
10K
CI
R1464
CI_DET
47
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
CI
14
19
LGE Internal Use Only
F/NIM & T/C/S2 Combo Tuner
+5V_TU
L1500
NON_S
BLM18PG121SN1D
R1528
0
NON_S
R1538
NON_S
10K
Q1501
E
MMBT3906(NXP)
R1531
NON_S
C1502
0.1uF
16V
TU1500
TDFR-G136D
TU1502
TDTJ-S001D
H_NIM
1
2
3
ANT_PWR[OPT]
2
+B
L1503
BLM18PG121SN1D
+5V_TU
3
1
BST_CNTL
2
+B1[5V]
3
0
NC_1
C1510
100pF
50V
NC_2
C1519
100pF
50V
S
0
NON_S
R1505
NC_3
R1540
10K
4
5
6
7
8
9
10
11
12
13
14
15
4
AS
5
SCL
6
SDA
7
NC[IF_TP]
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
NC_2[RF_AGC]
4
NC_3
5
SCLT
6
SDAT
7
NC_4
8
SIF
9
NC_5
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
C1522
0.1uF
16V
S
C1526
10uF
6.3V
S
C1554
22uF
16V
to TUNER
+5V_TU
R1530
470
R1533
82
RESET
15
17
18
16
DIF_1
17
DIF_2
18
19
19
20
SHIELD
21
22
23
24
25
26
27
+B4[2.5V]
16
SCL
17
SDA
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
C1558
22uF
16V
C1560
0.1uF
16V
+5V_TU
TU_SIF
S2_TU[3.3V]
close to TUNER
B
SCL0_3.3V
NC_4
Q1500
R1527
C
4.7K MMBT3906(NXP)
close to TUNER
TU_SCL
+1.8V_TU
S
R1557
OPT
TU_SDA
R1546
220
SDA0_3.3V
C1518
18pF
50V
R1547
220
R1570
0
FOR NON_S 2.5V
TU_CVBS
0
T_1.8V
T_SIF
C1569
100pF
50V
S
C1568
220uF
6.3V
S
C1570
0.1uF
16V
S
E
+5V_TU
B
C1501
0.1uF
NC_5
C1517
18pF
50V OPT
16V
R1548
200
EU
C1501-*1
0
*NOTE 10
T_CVBS
L1510
BLM18PG121SN1D
NON_S
R1549
200
EU
+3.3V_TU
+1.25V_TU
+2.5V_TU
+2.5V_BCM35230
Q1503
MMBT3906(NXP)
C
close to TUNER
C1563
0.1uF
16V
ATV_OUT
+3.3V_TU
NON_S
NON_S
E
C1562
10uF
6.3V
GND_1
B
TD_1.2V
C1504
100pF
50V
T_3.3
C1524
100pF
50V
C1514
220uF
6.3V
C1509
0.1uF
16V
C1528
0.1uF
16V
C1530
220uF
6.3V
R1529
100K
R1526
100
TU_RESET
C1561
0.1uF
16V
NON_S
Q1504
MMBT3906(NXP)
C
EU
+2.5V_TU
C1535
0.1uF
16V
T_TU_RESET
F/NIM
0
R1536
C1512
16
IF_AGC_CNTL
+5V_TU
E NON_S
E
NC[RF_AGC]
RF_BOOSTER_CTL
NON_S
+3.3V_TU
L1506
close
BLM18PG121SN1D
S
C1516
10uF
6.3V
OPT
C1515
0.1uF
16V
B
Q1502
2SC3052
C1531
0.01uF
50V
NON_S
S
1
BST_CNTL
TU1501
TDFQ-G001D
NC_1
C
C
NON_S
R1556
T/C
2.2K
NON_S
B
close to TUNER
NC_6
TD_SCL
F/NIM
R1564
0
TD_SDA
F/NIM
R1565
0
0.1uF
16V
+1.8V_TU
IF_AGC_MAIN
T/C
SCL1_3.3V
H_NIM
R1567
0
T/C/S2_ERROR
FOR DVB-S 1.8V
H_NIM
0
R1568
close to Tuner
OPT
C1534
18pF
50V OPT
C1538
18pF
50V
SDA1_3.3V
S
R1566H_NIM
0
T/C/S2_SYNC
C1572
10uF
6.3V
C1573
0.1uF
16V
S
close to TUNER
T/C/S2_VALID
IF_N_MAIN
T/C/S2_MCL
IF_P_MAIN
T/C/S2_D0
Close to the tuner
T/C/S2_D1
R1513
F/NIM 47
TS_SYNC
T/C/S2_D2
R1514
F/NIM 47
TS_VAL
T/C/S2_D3
R1515
F/NIM 47
T/C/S2_D4
TS_CLK
FE_TS_DATA[0-7]
28
29
31
30
D5
28
D6
29
D7
30
31
32
SHIELD
33
34
35
T2
TU1500-*1
TDFR-G236D
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
31
30
36
BST_CNTL
+B1[5V]
NC_3
37
SDAT
NC_4
S
S2_RESET
C1520
100pF
50V
S
S2_3.3V
C1523
0.1uF
16V
S
C1527
220uF
6.3V
S
R1501
51
S
S2_F22
S2_SCL
R1507
2.2K
R1502
100
R1558 S
0
S2_SDA
S2_RESET
NC_5
GND_2
38
GND
+B2[1.2V]
R1517
47
FE_TS_DATA[1]
F/NIM
R1518
47
FE_TS_DATA[2]
F/NIM
R1519
47
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
F/NIM
OPT
0
OPT
C1565
47pF
50V
SIF
VIDEO
FE_TS_DATA[0]
F/NIM
R1522
47
F/NIM
R1523
47
S
S C1506
0.1uF
S
R1559 S
R1516
F/NIM 47
F/NIM
R1520
47
F/NIM
R1521
47
+3.3V_TU
NC_2[RF_AGC]
SCLT
+1.25V_TU
R1569
0
S2_1.25V
S2_LNB
C1566
47pF
50V
OPT
C1567
47pF
50V
LNB_TX
+3.3V_TU
+B3[3.3V]
L1504
BLM18PG121SN1D
RESET
+B4[2.5V]
SCL
SDA
39
ERR
SYNC
VALID
MCL
D0
D1
D2
D3
D4
D5
D6
D7
SHIELD
SHIELD
C1521
100pF
50V
S
3
4
T/C/S2_D7
L1512
BLM18PG121SN1D
2
NC_1
T/C/S2_D6
Close to Tuner #38 pin
1
T/C/S2_D5
C1525
0.1uF
16V
S
S
R1572
10uF
6.3V
S
Close to the tuner
R1571S
10uF
6.3V
OPT
LNB_OUT
C1505
1000pF
50V
S
Close to Tuner #38 pin
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
C1508
33pF
50V
OPT
C1511
33pF
50V
S
D1500
R1500
2.2K
S
3.0SMCJ20A(suzhougrande)
S
Surge protectioin
EAX63525101
TUNER
15
19
LGE Internal Use Only
DVB-S2 LNB Part_Allegro
S
D1600
SMAB34
D1603
SMAB34 S
40V
40V
S
2A
3A +12V_LNB
S
S
C1601
1uF
50V
S
C1623
68uF
35V
C1604 C1606
68uF 0.01uF
50V
35V
L1600
close to Boost pin(#1)
S
S
33UH
SP-7850_33
2.4A
C1610
10uF
25V
S
DCDC_GND
C1611
0.1uF
50V
close to VIN pin(#25)
DCDC_GND
D1601
MBR230LSFT1G
DCDC_GND
LNB_OUT
S
30V
S
D1602
SMAB34
40V
S
C1602
0.1uF
50V
C1600
0.22uF
25V
S
A_GND
22000pF
NC_1
4
TDO
5
EXTM
6
BFO
NC_9
BFI
VIN
LX
GNDLX
NC_7
19
BFC
IC1600
A8290SETTR-T
18
NC_6
S
17
NC_5
16
NC_4
15
NC_3
14
13
A_GND
+3.3V_Normal
NC_2
IRQ
12
SCL
11
ADD
SDA
GND
10
7
8
TDI
NC_8
20
9
LNB_TX
21
THERMAL
29
VREG
A_GND
DCDC_GND and A_GND are connected in pin#27
PCB_GND and A_GND are connected
22
3
23
TCAP
24
C1605
25
2
26
1
VCP
0.1uF
S
LNB
BOOST
C1603
S
28
A_GND
27
[EP]
DCDC_GND and A_GND are connected
A_GND
A_GND
A_GND
0
R1602
27pF
33
C1609
S
27pF
R1601
33
C1608
0.22uF S R1600
LNB_INT
A_GND
SDA1_3.3V
DCDC_GND
4.7K
S
S
SCL1_3.3V
A_GND
R1605
0S
S
S
R1604
0S
C1607
S
R1603
P_17V
+12V_LNB
17V->12V
Max 1.3A
S
R1613
0
L1601
22.0uH
VIN
1
8
2
7
S
S
C1619
10uF
16V
40V
PH
S
BOOT
S
D1604
SMAB34
0.1uF
50V
C1620
10uF
16V
C1622
10uF
25V
OPT
1%
IC1601
TPS54231D
C1617
S
R1610
120K
EAP61606601
S
R1
GND
C1613
4.7uF
50V
S
C1614
0.01uF
50V
EN
3
6
COMP
R1611
6.8K
1%
S
S
R1608
S 3.6K
C1612
4.7uF
50V
S
SS
4
5
VSENSE
S
C1616
0.01uF
25V
C1618
470pF
50V
S
R1609
51K
R1612
S
1.6K
1%
R2
S
S
S
R1607
16K
S
-->3.12V
C1621
15pF
50V
*NOTE 13
POWER_ON/OFF_2
R1606
10K
OPT
0.1uF
50V
C1615
OPT
Vout=0.8*(1+R1/R2)
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
LNB
16
19
LGE Internal Use Only
TE4P
TE4N
TD4P
TD4N
TCLK4N
TCLK4P
TC4P
TC4N
TB4P
TB4N
TA4P
TA4N
TE3P
TD3P
TE3N
TD3N
TCLK3P
TCLK3N
TC3P
TB3P
TC3N
TB3N
TA3P
TA3N
TE2P
TD2P
TE2N
TD2N
TCLK2N
TCLK2P
TC2N
TC2P
TB2P
TB2N
B2
B1
B3
C3
C1
C2
D2
D1
D3
E3
E1
E2
F2
F1
F3
G3
G1
G2
H2
H1
H3
J3
J1
J2
K2
K1
K3
L3
L1
L2
M2
M1
M3
N3
N1
TE4P
TE4N
TD4P
TD4N
TCLK4P
TCLK4N
TC4P
TC4N
TB4P
TB4N
TA4P
TA4N
TE3P
TE3N
TD3P
TD3N
TCLK3P
TCLK3N
TC3P
TC3N
TB3P
TB3N
TA3P
TA3N
TE2P
TE2N
TD2P
TD2N
TCLK2P
TCLK2N
TC2P
TC2N
TB2P
TB2N
TA2P
DDR_ADDR[0]
UART_TXD
DDR_ADDR[1]
UART_RXD
DDR_ADDR[2]
DDR_ADDR[3]
SPI_CS
DDR_ADDR[4]
SPI_SCLK
DDR_ADDR[5]
SPI_DO
DDR_ADDR[6]
SPI_DI
DDR_ADDR[7]
DDR_ADDR[8]
SCL
DDR_ADDR[9]
SDA
SCL_M
DDR_ADDR[10]
DDR_ADDR[12]
V9
DDR_BA[0]
GPIO[1]
DDR_BA[1]
GPIO[2]
GPIO[3]
DDR_CK
GPIO[4]
DDR_CK_N
GPIO[5]
DDR_CKE
GPIO[6]
GPIO[7]
V4
T5
R10
DDR_CS_N
DDR_ODT
DDR_RAS_N
DDR_CAS_N
DDR_WE_N
V14
V12
DDR_DQS[0]
DDR_DQS[1]
U14
U12
DDR_DQS_N[0]
DDR_DQS_N[1]
R15
T12
DDR_DM[0]
IC1700
R5
U4
GPIO[8]
GPIO[9]
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[22]
DDR_DM[1]
GPIO[23]
V15
T15
U16
T16
R16
C_DDR_DQ[5]
V16
C_DDR_DQ[6]
T14
C_DDR_DQ[7]
U15
C_DDR_DQ[8]
T13
C_DDR_DQ[9]
V11
C_DDR_DQ[10]
U13
C_DDR_DQ[11]
U11
C_DDR_DQ[12]
T11
C_DDR_DQ[13]
V13
C_DDR_DQ[14]
R12
C_DDR_DQ[15]
R13
DDR_DQ[0]
GPIO[24]
DDR_DQ[1]
GPIO[25]
DDR_DQ[2]
GPIO[26]
DDR_DQ[3]
GPIO[27]
DDR_DQ[4]
GPIO[28]
DDR_DQ[5]
GPIO[29]
DDR_DQ[6]
GPIO[30]
DDR_DQ[7]
GPIO[31]
DDR_DQ[8]
DDR_DQ[9]
TDI
DDR_DQ[10]
TMS
DDR_DQ[11]
TRST
DDR_DQ[12]
TDO
DDR_DQ[13]
TCK
DDR_DQ[14]
TEST_SE
DDR_DQ[15]
TMODE[0]
TMODE[1]
U10
DDR_TAOUT
TMODE[2]
DDR_TDOUT[0]
DDR_TDOUT[1]
TMODE[3]
22 R1703
D16
A15
22 R1704
22 R1705
B15
22 R1706
SPI_CSZ
SPI_CK
SPI_DI
SPI_DO
22
R1707
22 R1708
D15
A14
22 R1709
B14
22 R1710
MOD_SCL
MOD_SDA
OPT
R1765 0
R1766 0 OPT
D14
A13
B13
C13
D13
A12
B12
C12
D12
A11
B11
C11
D11
R1711 0 OPT
R1712 0 OPT
R1713 0 OPT
A10
B10
C10
D10
A9
R1714 0 OPT
B9
R1715 0
OPT
C9
D9
R1716
A8
B8
R1763
C8
22
SERIAL_WP
22
L/R_INDICATOR
D8
A7
B7
C7
D7
A6
B6
C6
22 R1717
D6
22 R1718
22 R1719
JTAG_TMS
C5
22 R1720
22 R1721
JTAG_TDO
D5
4.7K
A5
B5
JTAG_TDI
/JTAG_TRST
JTAG_TCLK
A4
TMODE[0]
B4
TMODE[1]
C4
TMODE[2]
D4
TMODE[3]
A3
BOOT_SEL
BOOT_SEL
RA1N
RA1P
RB1N
RB1P
RC1N
RC1P
RCLK1N
RD1N
RCLK1P
RD1P
RE1N
RE1P
RA2N
RA2P
RB2N
RB2P
RC2N
RC2P
RCLK2N
RD2N
TMODE[3]
BOOT_SEL
+3.3V_Normal
OPT
3.3K 3.3K
3.3K
3.3K
OPT
3.3K
3.3K
TXA0N
TXA0P
OPT
100
TXA1N
TXA1P
OPT
100
TXA2N
TXA2P
3.3K 3.3K
100
TXACLKN
TXACLKP
OPT
100
TXA3N
TXA3P
3.3K
100
TXA4N
TXA4P
R1739 R1741 R1743 R1745 R1747
100
TXB2N
TXB2P
TXB3P
TXB4N
TXB4P
SPI_CSZ
SPI_DO
SERIAL_WP
2
B
/JTAG_TRST
R1750
10K
C
E
R1762
4.7K OPT
Q1701
KRC103S
OPT
JTAG_TMS
JTAG_TDI
JTAG_TDO
R1751
1K
R1761
4.7K
OPT
2
5
6
7
1 3DF_SFLASH 8
4
3
VCC
HOLD
CLK
DIO
R1756
3.3K
C1704
0.1uF
16V
R1759
4.7K
SPI_DI
SPI_CK
TP1703
TP1702
TP1704
TP1705
TP1706
TP1707
3DF_RESET
R1767
0
C1705
0.1uF
16V
17
R1757
3.3K
OUT
R1758
1K
3
+3.3V_Normal
IC1701
W25X20BVSNIG
CS
DO
WP
GND
R1754
3.3K
R1755
3.3K
IC1702
2
GND
AZ7029RTRE1
1
+3.3V_Normal
OPT
R1753
3.3K
VCC
0
OPT
R1752
C1703
0.1uF
16V
+3.3V_Normal
R1749
330
JTAG_TCLK
EJTAG
1
4
SW1701
JTP-1127WEM
3
EAX63525101
LG8300
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
R1740 R1742 R1744 R1746 R1748
100
TXB0N
TXB0P
3.3K
100
TXBCLKN
TXBCLKP
TXB1N
TXB1P
100
TXB3N
100
100
100
LG8300_RESET
3D_SYNC_RF
25MHz
X1701
50V
50V
27pF
27pF
C1702
C1701
TMODE[2]
TMODE[0]
R1726
R1727
R1728
R1731
R1729
R1730
R1732
R1733
R1734
R1737
R1735
R1736
R1738
TMODE[1]
U18
U17
T18
T17
R18
R17
P18
P17
N18
N17
M18
M17
L18
L17
K18
K17
J18
J17
H18
H17
G18
G17
F18
F17
A17
B18
B17
V2
V3
R1723
0
R1764
0
OPT
1M 1%
RCLK2P
RD2P
RE2N
RE2P
CLK_XIN
CLK_XOUT
PO_RST_N
LR_SYNC
EMITTER_PULSE
V10
C16
UART_TXD_3D
UART_RXD_3D
R1722
C_DDR_DQ[15-0]
T10
22 R1702
C14
GPIO[0]
V6
U6
22 R1701
B16
SDA_M
DDR_ADDR[11]
U9
T9
A16
C15
LG8300
C_DDR_DQ[4]
TA2N
C_DDR_DQ[3]
N2
C_DDR_DQ[2]
TA2P
C_DDR_DQ[0]
C_DDR_DQ[1]
TA2N
C_DDR_DQM1
TE1P
C_DDR_DQM0
P2
C_DDR_DQS1M
TE1P
C_DDR_DQS0M
TE1N
C_DDR_DQS1P
P1
C_DDR_DQS0P
TE1N
/C_DDR_WE
TD1P
/C_DDR_CAS
TD1N
/C_DDR_RAS
P3
C_DDR2_ODT
R3
/C_DDR_CS
TD1P
C_DDR2_CKE
TD1N
/C_DDR2_CLK
TCLK1P
C_DDR2_CLK
R1
C_DDR_BA[1]
TCLK1P
C_DDR_A[12] V7
R2
U7
C_DDR_A[10] R9
C_DDR_A[11] T7
TCLK1N
C_DDR_A[9]
TC1P
R7
T2
R8
C_DDR_A[8]
T1
C_DDR_A[7]
TC1P
T6
TC1N
C_DDR_A[6]
TCLK1N
T8
TC1N
C_DDR_A[5]
TB1P
R6
TB1N
U8
C_DDR_A[4]
T3
C_DDR_A[3]
TB1P
V5
TA1P
C_DDR_A[2]
U3
TA1N
V8
U1
U2
U5
C_DDR_A[1]
TB1N
TA1N
C_DDR_A[0]
C_DDR_BA[0]
TA1P
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
C_DDR_A[12-0]
LGE Internal Use Only
R1760
3.3K
TP1708
LG8300_RESET
19
+1.8V
IC1700
LG8300
C1803
10uF
6.3V
+1.0V
C1808
0.1uF
16V
C1814
0.1uF
16V
C1818
0.1uF
16V
C1821
0.1uF
16V
C1825
0.1uF
16V
C1829
0.1uF
16V
C1833
0.1uF
16V
C1837
0.1uF
16V
C1841
0.1uF
16V
C1846
0.1uF
16V
C1850
0.1uF
16V
C1815
0.1uF
16V
C1819
0.1uF
16V
C1822
0.1uF
16V
C1826
0.1uF
16V
C1830
0.1uF
16V
C1834
0.1uF
16V
C1838
0.1uF
16V
C1842
0.1uF
16V
C1847
0.1uF
16V
C1851
0.1uF
16V
C1854
0.1uF
16V
C1858
0.1uF
16V
C1863
0.1uF
16V
C1865
0.1uF
16V
C1866
0.1uF
16V
C1868
0.1uF
16V
A2
GND_0
F6
F13
G6
G7
G8
G9
G10
G11
G12
G13
H6
H13
J6
J13
K6
K13
L6
L7
L8
L9
L10
L11
L12
L13
+1.0V_LTX
M6
M13
VDD10_1
GND_1
VDD10_2
GND_2
VDD10_3
GND_3
VDD10_4
GND_4
VDD10_5
GND_5
VDD10_6
GND_6
VDD10_7
GND_7
VDD10_8
GND_8
VDD10_9
GND_9
VDD10_10
GND_10
VDD10_11
GND_11
VDD10_12
GND_12
VDD10_13
GND_13
VDD10_14
GND_14
VDD10_15
GND_15
VDD10_16
GND_16
VDD10_17
GND_17
VDD10_18
GND_18
VDD10_19
GND_19
VDD10_20
GND_20
VDD10_21
GND_21
VDD10_22
GND_22
VDD10_23
GND_23
VDD10_24
GND_24
VDD10_25
GND_25
VDD10_26
GND_26
GND_27
H5
J5
K5
+3.3V_VDD
L5
M5
LTX_VDD10_1
GND_28
LTX_VDD10_2
GND_29
LTX_VDD10_3
GND_30
LTX_VDD10_4
GND_31
LTX_VDD10_5
GND_32
GND_33
GND_34
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
+3.3V_LRX
F15
G15
VDD33_1
GND_35
VDD33_2
GND_36
VDD33_3
GND_37
VDD33_4
GND_38
VDD33_5
GND_39
VDD33_6
GND_40
VDD33_7
GND_41
VDD33_8
GND_42
VDD33_9
GND_43
VDD33_10
GND_44
VDD33_11
GND_45
VDD33_12
GND_46
VDD33_13
GND_47
GND_48
L16
+3.3V_LTX
N16
LRX_AVDD33_1
GND_49
LRX_AVDD33_2
GND_50
GND_51
E4
G4
L4
N4
J4
LTX_AVDD33_1
GND_52
LTX_AVDD33_2
GND_53
LTX_AVDD33_3
GND_54
LTX_AVDD33_4
GND_55
LTX_AVDD33_5
DDR_VREF_LG8300
V17
DDR_VREF0
N9
N10
N11
N12
N13
N14
P6
P7
P8
P9
P10
P12
P13
P14
P15
+1.0V
F9
F10
F11
F12
F14
C1807
10uF
6.3V
C1804
10uF
6.3V
G5
G14
C1811
0.1uF
16V
C1855
0.1uF
16V
C1864
0.1uF
16V
C1859
0.1uF
16V
C1885
0.1uF
16V
G16
H7
H8
H9
H10
H11
+1.0V_LTX
+3.3V_LRX
+3.3V_LTX
H12
3.3V TO 1.8V
H14
H15
H16
J7
C1802
10uF
6.3V
C1809
0.1uF
16V
C1805
0.1uF
16V
C1812
0.1uF
16V
C1816
0.1uF
16V
C1820
0.1uF
16V
C1824
10uF
6.3V
C1828
0.1uF
16V
C1832
0.1uF
16V
C1836
0.1uF
16V
C1839
0.1uF
16V
C1844
0.1uF
16V
C1852
10uF
6.3V
C1856
0.1uF
16V
C1860
0.1uF
16V
+3.3V_Normal
J8
J9
J10
IC1803
AZ1117BH-1.8TRE1
J11
J12
J14
+1.8V
+3.3V_PLL
DDR_VREF_LG8300
IN
+3.3V_VDD
ADJ/GND
J15
OPT
C1871
22uF
25V
J16
K7
K8
K9
K10
C1801
10uF
6.3V
C1806
0.1uF
16V
C1810
0.1uF
16V
C1813
0.1uF
16V
C1817
10uF
6.3V
C1823
0.1uF
16V
C1827
0.1uF
16V
C1831
0.1uF
16V
C1835
0.1uF
16V
C1840
10uF
6.3V
C1845
0.1uF
16V
C1849
0.1uF
16V
C1853
0.1uF
16V
C1857
0.1uF
16V
C1862
0.1uF
16V
C1873
0.1uF
16V
OUT
C1880
10uF
6.3V
C1884
10uF
6.3V
C1882
0.1uF
16V
R1811
1
K11
K12
K14
K15
K16
L14
L15
M7
M8
+1.0V
M9
+1.0V_LTX
M10
L1801
BLM18PG121SN1D
M11
M12
M14
5V TO 1.0V
M15
N5
+3.3V_VDD
N6
N15
CLOSE TO VIN AND AGND PIN
+3.3V_Normal
L1802
BLM18PG121SN1D
P5
+5V_MAIN
+1.0V
P11
R4
R14
IC1801
AOZ1072AI-3
+3.3V_LTX
L1803
BLM18PG121SN1D
L1809
BLM18PG121SN1D
L1806
BLM18PG121SN1D
P16
PGND
1
8
2
7
L1807
3.6uH
LX_2
F4
DDR_VREF1
LTX_AVSS33_1
DDR_VREF2
LTX_AVSS33_2
LTX_AVSS33_3
N7
N8
F8
LRX_AVSS33_2
T4
+1.8V
F7
M16
LRX_AVSS33_1
R11
F5
DDR_VDDQ_1
LTX_AVSS33_4
DDR_VDDQ_2
LTX_AVSS33_5
+3.3V_PLL
L1804
BLM18PG121SN1D
H4
K4
M4
C1843
10uF
16V
P4
DDR_VDDQ_3
DDR_VDDQ_4
DDRPLL_AVSS33
DDR_VDDQ_6
SYSPLL_AVSS33
DDR_VDDQ_7
ADPLL_AVSS33
DDR_VDDQ_8
SSPLL_AVSS33
DDR_VDDQ_9
C1848
10uF
FB
6
4
5
EN
OPT
R1803
C1874
22uF
10V
100
E16
OPT
C1875
22uF
10V
R1808
3.3K
1%
R1
OPT
C1878
100pF
50V
C1881
0.1uF
16V
GND
COMP
9.1K
2200pF
R1804
C1867
D17
F16
3
LX_1
GND
+3.3V_LRX
L1805
BLM18PG121SN1D
C17
DDR_VDDQ_5
VIN
C1876
0.1uF
AGND
16V
+3.3V_PLL
R1809
12K
1%
R2
C18
DDR_VDDQ_10
DDRPLL_AVDD33
DDR_VDDQ_11
SYSPLL_AVDD33
DDR_VDDQ_12
SSPLL_AVDD33
DDR_VDDQ_13
ADPLL_AVDD33
GND
D18
E17
E18
DDR_VDDQ_14
GND
DDR_VDDQ_15
DDR_VDDQ_16
DDR_VDDQ_17
Vout=0.8*(1+R1/R2)
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
LG8300_POWER
18
19
LGE Internal Use Only
+1.8V
C1904
10uF
6.3V
DDR_VREF_DDR
C1901
0.1uF
16V
C1905
0.1uF
16V
C1907
0.1uF
16V
C1909
0.1uF
16V
C1912
0.1uF
16V
C1914
0.1uF
16V
C1917
0.1uF
16V
C1916
0.1uF
16V
C1919
0.1uF
16V
C1920
0.1uF
16V
C1921
0.1uF
16V
C1922
0.1uF
16V
C1927
0.1uF
16V
C1923
0.1uF
16V
C1928
0.1uF
16V
C1929
0.1uF
16V
C1930
0.1uF
16V
C1931
0.1uF
16V
IC1901
W9725G6JB-25
C1902
470pF
50V
SDDR_DQ[15-0]
DDR_A[12-0]
DDR_A[0]
DDR_A[1]
A0
M8
A1
M3
A2
DDR_A[3]
M7
A3
N2
DDR_A[4]
A4
DDR_A[5]
N8
A5
N3
A6
DDR_A[7]
N7
A7
DDR_A[8]
P2
A8
P8
A9
P3
DDR_A[9]
DDR_A[10]
A10/AP
DDR_A[11]
M2
A11
DDR_A[12]
P7
A12
R2
DDR_BA[0]
BA0
L2
DDR_BA[1]
BA1
L3
R1901
100
/DDR2_CLK
J2
DDR_A[2]
DDR_A[6]
DDR2_CLK
VREF
SDDR_DQ[1]
DQ2
SDDR_DQ[2]
H3
DQ3
SDDR_DQ[3]
H1
DQ4
SDDR_DQ[4]
H9
DQ5
SDDR_DQ[5]
F1
DQ6
SDDR_DQ[6]
F9
DQ7
SDDR_DQ[7]
C8
DQ8
SDDR_DQ[8]
C2
DQ9
SDDR_DQ[9]
D7
DQ10
SDDR_DQ[10]
D3
DQ11
SDDR_DQ[11]
C_DDR_DQ[10]
D1
DQ12
SDDR_DQ[12]
C_DDR_DQ[8]
D9
DQ13
SDDR_DQ[13]
C_DDR_DQ[15]
B1
DQ14
SDDR_DQ[14]
B9
DQ15
A1
VDD_5
E1
VDD_4
J9
VDD_3
M9
VDD_2
CKE
K2
R1
VDD_1
/DDR_RAS
/DDR_CAS
CAS
WE
DDR_DQS0P
LDQS
DDR_DQS1P
UDQS
C_DDR_DQ[0]
SDDR_DQ[0]
C_DDR_DQ[7]
SDDR_DQ[7]
C_DDR_BA[0]
/C_DDR2_CLK
DDR_DQS0P
C_DDR_DQS0P
C_DDR_DQS1P
C_DDR_DQM0
SDDR_DQ[9]
C_DDR_DQ[11]
SDDR_DQ[11]
C_DDR_DQ[12]
SDDR_DQ[12]
DDR_DQM0
R1908
22
C_DDR_DQM1
C_DDR_DQS0M
SDDR_DQ[3]
C_DDR_DQ[4]
SDDR_DQ[4]
C_DDR_DQ[1]
SDDR_DQ[1]
C_DDR_DQ[6]
SDDR_DQ[6]
DDR2_ODT
AR1907
22
1/16W
C_DDR_A[1]
DDR_A[1]
C_DDR_A[3]
DDR_A[3]
DDR_A[12]
C_DDR_A[9]
DDR_A[9]
AR1908
22
1/16W
DDR_DQS0M
C_DDR_DQS1M
C_DDR_DQ[3]
C_DDR2_ODT
C_DDR_A[12]
DDR_DQM1
R1909
22
R1910
22
AR1904
22
1/16W
DDR_A[0]
/DDR_RAS
DDR_DQS1P
R1907
22
SDDR_DQ[14]
C_DDR_DQ[9]
C_DDR_A[0]
/C_DDR_RAS
R1906
22
SDDR_DQ[15]
C_DDR_DQ[14]
DDR_A[2]
C_DDR_A[2]
/DDR2_CLK
R1905
22
SDDR_DQ[10]
AR1903
22
1/16W
DDR_BA[0]
AR1906
22
1/16W
DDR2_CLK
R1904
22
SDDR_DQ[8]
DDR_BA[1]
R1903
22
C_DDR2_CLK
SDDR_DQ[13]
DDR2_CKE
C_DDR_BA[1]
DDR_DQS1M
R1911
22
/DDR_CS
/C_DDR_CS
C_DDR_A[10]
DDR_A[10]
C_DDR_A[5]
DDR_A[5]
C_DDR_A[7]
DDR_A[7]
DDR_A[11]
C_DDR_A[11]
VDDQ_10
K7
C1
VDDQ_9
L7
C3
VDDQ_8
K3
C7
VDDQ_7
C_DDR_A[8]
DDR_A[8]
C9
VDDQ_6
C_DDR_A[6]
DDR_A[6]
E9
VDDQ_5
C_DDR_A[4]
DDR_A[4]
G1
VDDQ_4
/C_DDR_CAS
/DDR_CAS
G3
VDDQ_3
G7
VDDQ_2
G9
VDDQ_1
F7
B7
DDR_DQM1
UDM
B3
DDR_DQS0M
LDQS
E8
A3
VSS_5
DDR_DQS1M
UDQS
A8
E3
VSS_4
J3
VSS_3
N1
VSS_2
P9
VSS_1
B2
VSSQ_10
B8
VSSQ_9
A7
VSSQ_8
D2
VSSQ_7
D8
VSSQ_6
NC_4
L1
NC_5
R3
NC_6
R7
NC_1
A2
E2
R8
J7
+1.8V
VDDL
SDDR_DQ[2]
C_DDR2_CKE
SDDR_DQ[15-0]
A9
L8
F3
VSSDL
C_DDR_DQ[2]
AR1902
22
1/16W
K9
LDM
NC_3
SDDR_DQ[5]
C_DDR_DQ[13]
/DDR_WE
/C_DDR_WE
C_DDR_DQ[5]
SDDR_DQ[15]
DDR_DQM0
NC_2
AR1901
22
1/16W
+1.8V
J8
RAS
/DDR_WE
DQ1
H7
K8
CS
/DDR_CS
G2
CLK
ODT
DDR2_ODT
SDDR_DQ[0]
CLK
DDR2_CKE
AR1905
22
1/16W
G8
DQ0
J1
E7
VSSQ_5
F2
VSSQ_4
F8
VSSQ_3
H2
VSSQ_2
H8
VSSQ_1
AR1909
22
1/16W
C_DDR_DQ[15-0]
DDR VTT
DDR_VREF_LG8300
+1.8V
R1902
4.7K
1%
R1912
4.7K
1%
DDR_VREF_DDR
+1.8V
R1913
4.7K
1%
C1910
0.1uF
16V
C1913
1000pF
50V
R1916
4.7K
1%
C1925
0.1uF
16V
C1926
1000pF
50V
C1903
100pF
50V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAX63525101
LG8300_DDR
19
19
LGE Internal Use Only
PDP TV Repair Guide
< Applicable Model >
- 50PZ900,50PZ700,50PZ500
(Apply Full HD Module in 50PZ950/750/570)
ⓒ LG Electronics. Inc.2010
PDP TV Repair Process Index
No.
Symptom (M)
Page
1
No Picture/Sound OK
1
2
No Picture/No sound
2
Mal-discharge/Noise/dark picture
3
4
Picture broken/Freezing
4
5
Vertical bar/ Horizontal Bar
5
6
No Power (Not turn on)
6
Turn off (Instant, under watching)
7
No sound/ Sound distortion
8
Remote control & Local Key checking
9
3
Symptom (L)
A. Picture Problem
Remark
B. Power Problem
7
8
C. Sound Problem
9
E. General function Problem
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV
Symptom
A. Picture Problem
Making
No Picture/Sound OK
Revision
2010. 12 . 24
전자 - 6-2
1/9
First of all, Check whether all of cable between board was inserted properly or not.
(Main B/D↔ Power B/D, Power B/D↔ Y-sus B/D,Y-Sus B/D ↔Z-Sus B/D,LVDS Cable,Speaker Cable,IR B/D Cable,,,)
☞A1
Check Module pattern
by using “TILT” key
on SVC R/C
☞A2
Normal
Y
Check
Sound
Sound
OK
Y
Check
LVDS Cable
Normal
N
Check
Vs, Va
Replace
Main B/D
Normal
Y
Check voltage
. -VY
. VSC
. VZB
Normal
N
Move
Power problem
Section
☞A13
☞A12
☞A5~A6
☞A3
Close
N
Move
No Picture/No sound
Section
N
Y
Y
Check B+ Voltage
on Power Board
/ Control Board
.Check B+(5V)
Move
Power problem
Section
1. Check Y-Sus/ Z-Sus Board
2. Replace defective B/D
※Refer to the Module label for each voltage
Y
N
N
☞A8~A11
Normal
1.Check Control Board
. LED on
. Crystal(X2), 3.3V, 5V
. Rom update
2.Replace Control B/D
☞A4
<SVC R/C & Pattern>
-VY
VSC
1
VZB
ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV
Symptom
☞A1
A. Picture Problem
Making
No Picture/No Sound
Revision
2010. 12 . 24
전자 - 6-2
2/9
☞A2
Check Module pattern
by using “TILT” key
on SVC R/C
Y
Normal
Check
Sound
Sound
OK
Y
Check
LVDS Cable
Picture
OK
N
N
☞A6
Y
Close
N
Check
Video
Move
No Picture/ Sound Ok
Section
Close
Check
“Speaker ON/Off” setting
in OSD Menu
Normal
Sound?
N
Check Speaker
jack connection
& Speaker Cable open
Normal
Sound?
Y
Y
Close
Close
N
SVC
Bulletin?
Y
Apply
SVC Bulletin
(S/W Upgrade etc)
N
Check 17V
(Audio IC B+)
on Power B/D
Normal
Sound?
N
Normal
voltage?
N
Check Power B/D
Replace Power B/D
Y
Check Audio IC Short
Replace Main B/D
2
ⓒ LG Electronics. Inc.2010
Y
Repair Process
PDP TV
Check
Picture problem
Type
A. Picture Problem
Symptom
Mal-discharge/Noise/dark picture
전자 - 6-2
2010. 12 . 24
Making
3/9
Revision
☞A15
Check CTRL ROM Ver.
and
Rom Upgrade
Dot
type
Normal
Picture?
☞A14
N
Replace
Control board
Normal
Picture?
Y
Y
Close
Close
N
Replace
Module
Mal-discharge
☞A16
☞A5
Scan
Type
Check voltage
. –VY / VSC
(Y-Sus B/D)
Y
Normal
Picture?
Check
Y Drive B/D
&
Replace B/D
☞A13
Normal
Picture?
N 1.Check Control B/D
2.Replace Board
Y
N
N
Normal
Picture?
Y
Close
Replace
Y-Sus B/D
Close
☞A6-1, 2
Picture Noise
Check RF Cable
Connection
N
Normal
Picture?
Check Tuner
& Replace
Y
Close
☞A9
Dark Picture
Check
Picture mode
setting
Normal
Picture?
N
1. Check Z-Sus Board
2. Replace Board
Normal
Picture?
Y
Y
Close
Close
3
N
Replace
Module
ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV
Check RF Signal level
Y
2010. 12 . 24
Making
Picture broken/Freezing
☞A21
Normal
Signal?
A. Picture Problem
Symptom
전자 - 6-2
4/9
Revision
. By using Digital signal level meter
. By using Diagnostics menu on OSD
( Menu→SUPPORT→Signal TEST)
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Check whether other equipments have problem or not.
(By connecting RF Cable at other equipment)
→ DVD Player ,Set-Top-Box, Different maker TV etc
N
Check RF Cable
Connection
1. Reconnection
2. Booster ON/OFF
Normal
Picture?
N
Move
No Picture/ Sound Ok
Section
■ Menu→Setup →Booster
Y
Normal
Picture?
N
Check
S/W Version
Y
Close
N
SVC
Bulletin?
Normal
Picture?
N
Y
S/W Upgrade
Y
Close
☞A6-1, 2
Check
Tuner & replace
Main B/D
N
Normal
Picture?
Normal
Picture?
Y
Close
※In case of Models, Booster function isn’t supported.
Booster menu
On→Off: Check
Off→On: Check
4
N
Contact with signal
distributor or
broadcaster
(Cable or Air)
ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV
☞A19
Check
defect type
A. Picture Problem
Making
Vertical bar/ Horizontal Bar
Revision
Symptom
전자 - 6-2
2010. 12 . 24
5/9
☞A1
Check Module pattern
by using “TILT” key
on SVC R/C
Regular
Vertical
Line / Bar
Y
Normal
Pattern?
N
☞A13
1.Check CTRL B/D
2.Replace Board
Vertical
Line/Bar
☞A20
Irregular
Vertical
Line / Bar
Replace
Module
※CTRL B/D: Control board
☞A13
Check connection
of Connector
(COF,TCP)
on CTRL B/D , X B/D
Normal
Y
1.Check CTRL B/D
2.Replace Board
Normal
Picture?
N
Check Main B/D
Replace Module
(If Main B/D doesn’t cause)
N
Y
1.Connector re-connection
2.Eliminate foreign material on Connector
Close
☞A18
Half
No picture
1.Check X B/D
2.Replace Board
N
Normal
Picture?
Replace
Module
Y
Close
☞A20
Horizontal
Line/Bar
※ H-Line’s Cause is rare CTRL B/D
☞A16
Check connection
of Connector (FFC)
on Y Drive B/D
Normal
Y
1. Check Y Drive B/D
2. Replace Board
N
1.Connector re-connection
2.Eliminate foreign material on FFC
5
Normal
Picture?
N
1.Check CTRL B/D
2.Replace Board
Normal
Picture?
Y
Y
Close
Close
N
Replace
Module
ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV
B. Power Problem
Symptom
No Power (Not turn on)
전자 - 6-2
2010. 12 . 24
Making
6/9
Revision
☞A26
Check
Power LED
Y
Power LED
ON?
. Stand-By: Red
. Operating: Blue
DC Power on
by pressing Power Key
On Remote control
N
Normal
Check
R/C IR Operation
N
Normal
Y
N
Repair/Replace
IR B/D
Y
Close
Check Power cord
was inserted properly
Normal
?
☞A22
Y
Close
N
Check ST-BY 5V
on Power Board
☞A22
Normal
Voltage?
N
Y
☞A22
☞A22
Check
AC DET Signal
on Power B/D
Normal
Signal?
☞A23
Y
Check
RL_ON Signal
on Power B/D
Normal
Signal?
Y
N
N
Check Power B/D
Replace Power B/D
Check Main B/D
Replace Main B/D
6
Check
the other pin’s
Output voltage
on Power B/D
N
Normal
Replace
Power B/D
Y
Close
ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV
B. Power Problem
Symptom
Making
Turn off (Instant, under watching)
전자 - 6-2
7/9
Revision
☞A8~A11
※ To check Power B/D Protection
Instant
Turn off
2010. 12 . 24
Turn on after pull out connector
between Power B/D & Y-Sus
Power LED
Blue?
Y
1. Check Y-Sus/ Z-Sus Board
(especially Short or Open)
2. Replace defective B/D
N
☞A23
Check Power B/D
Replace Power B/D
RCU Off
☞A24
Turn off
Under watching
N
“Off Timer”
Set?
KEY Off
Check
Power Off History
2HOUR Off
This is not problem
Normal operation
Y
NO Signal Off
“Off timer”
Function off
Don’t appear
Power Off History
7
Move
No Power problem
Section
ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV
C. Sound Problem
Symptom
No sound/ Sound distortion
전자 - 6-2
2010. 12 . 24
Making
8/9
Revision
1.No sound( If HDMI Input only have no sound, upload EDID data)
Close
☞A25
Check
“Speaker ON/Off” setting
in OSD Menu
Normal
Sound?
N
Check Speaker
jack connection
& Speaker Cable open
Normal
Sound?
Y
N
SVC
Bulletin?
Close
Apply
SVC Bulletin
(S/W Upgrade etc)
Y
Normal
Sound?
N
Y
Close
Y
N
☞A22
☞A23
Check 17V
(Audio IC B+)
on Power B/D
Normal
voltage?
N
Check Power B/D
Replace Power B/D
Y
2.Sound distortion & sound drop
☞A2
Check Input signal
→Cable connection
→Cable open
- RF & external
(HDMI,SCART,,,)
Normal
Sound?
N
Check
AVL off/on
Clear voiceⅡ off/on
Normal
Sound?
Problem in external input
(SCART,HDMI,,,)
Y
Close
Problem in all input
Problem in only DTV
N
Y
Check Audio IC Short
Replace Main B/D
Close
Check whether Problem happen
in same output of other equipments or not.
(By connecting same output cable of other equipment)
→ DVD Player ,Set-Top-Box, different maker TV etc
N
Normal
Sound?
Y
SVC
Bulletin?
N
Explain customer that
Cause is RF Signal’s problem (Case 1)
Cause is Equipment’s problem (case 2)
8
Y
Apply
SVC Bulletin
(S/W Upgrade etc)
Normal
Sound?
Y
Close
N
Check Audio IC
Replace Main B/D
ⓒ LG Electronics. Inc.2010
Repair Process
PDP TV
D. General Function Problem
Symptom
Remote control & Local Key checking
2010. 12 . 24
Making
전자 - 6-2
9/9
Revision
1. Remote controller (R/C) operating error
Replace
Main B/D
☞A26
Check R/C itself
Operation
Y
Normal
operating?
Normal
operating?
N
N
Check B+ 5V
On Main B/D
Y
Check R/C Operating
When turn off light
in room
Check & Replace
Battery of R/C
If R/C operate,
Explain the customer
cause is interference
from light in room.
Normal
operating?
☞A26
☞A26
Check & Repair
Cable connection
Connector solder
☞A12
Close
Normal
Voltage?
Y
Check IR
Output signal
N
Normal
Signal?
Y
N
Repair/Replace
IR B/D
Check 5v on Power B/D
Replace Power B/D or
Replace Main B/D
(Power B/D don’t have problem)
Close
N
Replace R/C
2. Local (Film Type) switch operating error
☞A27
Check R/C
Operation
Y
Normal
operating?
N
Move
Power problem
Section
Check & Repair
Cable connection
Connector solder
Replace
Main B/D
☞A28
Normal
operating?
N
Check & Replace
Assembly status
(Key PCB + tool )
☞A27
Normal N
operating?
Y
Y
Close
Close
9
Check Key
Output signal
Normal
Signal?
N
Replace cabinet
assembly.
ⓒ LG Electronics. Inc.2010
Y
PDP TV Repair Process Reference data Index
No.
Symptom
Detail
Page
1
Check Module pattern by Tilt key
A1
2
Audio check method
A2
3
Check Va, Vs on Power Board
A3
4
PDP Module Label Information
A4
5
Check & Adjust –VY,VSC,VZB voltage
- 50H3 –VY,VSC(Y-Sus) / VZB(Z-Sus)
A5
6
Video Check Method
A6
6
Fuse Checking Method
A7
7
Y-Sus Board Checking Method(50H3)
A8
8
Z-Sus Board Checking Method(50H3)
A9
11
Check 5V, 12V on Power B/D
A12
Control Board Checking Method(50H3)
A13
13
Mal discharge Symptom Picture
A14
14
PDP Module Rom Ver. Checking method
A15
15
Y Drive B/D Checking method
A16
16
(Half picture) X- B/D Checking method(50H3)
A18
12
Picture Problem
Remark
Next page Continued
ⓒ LG Electronics. Inc.2010
PDP TV Repair Process Reference data Index
No.
Symptom
Detail
Page
Defect type cause by PDP Module
A19
Connector Type on PDP Module
A20
19
RF Signal level Checking method
A21
20
Check voltage on Power board
A22
Power board Checking Method
A23
Check Power off History
A24
Speaker cable checking method
A25
Check Remote control IR operation
A26
Check Local Key operation
A27
Check Local switch assembly status
A28
17
18
21
Picture Problem
Power Problem
22
23
Sound Problem
24
25
26
General Function Problem
Remark
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
Item
A. Picture Problem
Check Module pattern by Tilt key
Making
2010. 12 . 24
전자 - 6-2
A1
Revision
Tilt Key
You can see 20 types patterns by using TILT Key on SVC Remote controller (except Old model)
< CHECK Item >
1. Dead pixel 2.Image sticking 3.Mal discharge 4.Module defect (V-Line/Bar, H-Line/Bar,,,)
5. In case of no picture, you can judge defect cause (Module or Main B/D)
- If patterns appear, defect cause is Main B/D
A1
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
Audio check method
Revision
2010. 12 . 24
전자 - 6-2
A2
Jack for Speaker connection
1.Check Audio output by using oscilloscope
2.Check whether speaker jack was inserted properly or not.
GND ↔ R- or R+ or L- or L+
Audio output waveform
A2
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
All Input Audio Problem
Making
Revision
2010. 12 . 24
전자 - 6-2
A2-1
Make sure you can’t hear any audio
Y
N
Check speaker for damage.
Replace the Speaker
Y
Check Connector
P1300
N
Replace P1300
Y
Check IC700 Power
17V(L1306), 3.3V(L1307)
N
Check 17V (P500 #1,2),
3.3V (IC505)
N
Check
Reset (R1309) / PDN (R1311)
:They must be High (3.3V)
Y
Check IC1300 Status
PDN(#23) / Reset(#31) is High?
Y
Check SCL,SDA
R1314, R1316
N
Delete R1314,1416 and check
IIC Line(SCL/SDA3)
Y
Check BCM I2S Output
R1305, 1306, 1307, 1308
N
Replace BCM(IC101).
Y
Replace AMP(IC1300)
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
Digital TV / HDMI Audio Problem
Making
Revision
2010. 12 . 24
전자 - 6-2
A2-2
◆ Digital TV
Check video output
N
Follow procedure digital TV
video trouble shooting
N
Follow procedure HDMI video
trouble shooting
Y
Follow procedure All source audio
trouble shooting
◆ HDMI
Check video output
Y
Check EDID Download
N
Re-download EDID data
Y
Follow procedure All source audio
trouble shooting
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
Check video output
Analog TV Audio Problem
N
Follow procedure analog TV video
trouble shooting
N
Check IC506 for 5V, IC503 for 1.25V,
L504 for 3.3V output Voltage
Making
2010. 12 . 24
전자 - 6-2
A2-3
Revision
Y
Check #3 for 5V, #13 for 1.25V, #14
for 3.3V on TU1500
Y
Check SIF signal C1501
N
Replace TU601
Y
Check SIF signal (C319)
N
Check SIF line
Y
Follow procedure All source audio
trouble shooting
< SIF waveform – sample >
- Defend on the input signal.
Y
Replace BCM IC (IC100)
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Input
Block
Component / AV/RGB Audio Problem
Check Connector and cables
JK803 (Component)
JK900 (SCART)
P801 (RGB)
JK800 (Side AV)
N
Making
Revision
2010. 12 . 24
전자 - 6-2
A2-4
Replace connector or
cable if found damaged
Y
Check signal
JK803 (Component) : R843, R844
JK900 (SCART) : R1024, R1025
P801 (RGB) : R903, R902
JK800 (Side AV) : R935, R936
N
Replace the Resistor
Y
Check IC101 signal
JK1000 (Component) : C311, C312
JK1001 (SCART) : C314, C315
JK702 (RGB) : C305, C306
JK900 (Side AV) : C308, C309
N
Replace the Resistor
Y
Follow procedure
All source audio trouble shooting
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
Optical Audio Problem
Making
2010. 12 . 24
전자 - 6-2
A2-5
Revision
Check Signal (JK902 #3)
Y
N
Check 3.3V #2 on JK1003
Check IC505 Output
Y
N
Check SPDIF signal (R851)
Replace BCM(IC101)
< SPDIF waveform – sample >
- Defend on the input signal.
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
A. Picture Problem
Making
Check Va, Vs on Power Board
Revision
Symptom
2010. 12 . 24
전자 - 6-2
A3
▶ Check Va & Adjust Va Voltage
(Refer to the Module label for Va specification)
PDP Module Label
▶ Check Vs & Adjust Vs Voltage
(Refer to the Module label for Vs specification)
Check Va, Vs
Z-Sus Board
Power Board
Vs Adjustment
(VR901)
Y-Sus Board
Control Board
Main Board
Va Adjustment
(VR502)
A3
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
PDP Module Label Information
Revision
전자 - 6-2
2010. 12 . 24
A4
PDP Module Label Information.
①
②
③
④
⑤
⑥
⑨
⑧
⑩
⑪
⑫
⑦
Vy Vsc
⑭
⑬
Vzb
① Model Name
⑨ UL Approval Mark
② Bar Code
(Code 128, Contains the manugacture No.)
⑩ UL Approval No.
⑪ Model Name
③ Manugacture No.
⑫ Max. Watt
④ Adjusting Voltage(DC Va, Vs)
⑬ Max. Volts
⑤ Adjusting Voltage (Set up/-Vy/Vsc/Ve/Vzb)
⑭ Max. Amps
⑥ The trade name of LG Electronics
⑦ Manufactured date(Year & Month)
⑧ Warning
A4
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Making
2010. 12 . 24
Check & Adjust –VY,VSC,VZB voltage(50R3) Revision
전자 - 6-2
A5
Voltage Check & Adjustment : 50R3
YSUS board
<Module Label>
Vsc adjustment
Fuses
-Vy adjustment
-VY
VSC
VZB
1. Vsc (150V) on Y-Sus B/D
- Check Point: R324
- Adjustment Point: VR301
2. -Vy (-190V) on Y-Sus B/D
- Check Point: R334
- Adjustment Point: VR302
A5
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Making
2010. 12 . 24
Check & Adjust –VY,VSC,VZB voltage(50R1) Revision
전자 - 6-2
A5
Voltage Check & Adjustment : 50R3
ZSUS board
<Module Label>
Vzb adjustment
-VY
VSC
VZB
3. VZB (115V) on Z-Sus B/D
. Check Point: R156
- Adjustment Point: VR204
A5
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
Digital TV Video Problem
Making
Revision
2010. 12 . 24
전자 - 6-2
A6-1
Check RF Cable
Y
Check TU1500 #3 for 5V, #13 for
1.25V, #14 for 3.3V and #16 for
2.5V
N
Y
Check Video color
N
Y
Check IIC Line
Check Voltage
5V : IC506 Output
3.3V : IC505 Output
2.5V : IC507 Output
1.25V:IC503 Output
Check Monitor Out Video
(Scart out)
Y
N
N
Replace Tuner
Go to ⓐ
Check SCL/SDA1 Line
Y
ⓐ
Check TP Clock, Data, Sync
N
Maybe Tuner has problems
: Replace Tuner
Y
Check other input / OSD
N
Check Module
Y
Change BCM(IC101)
A6
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
Analog TV Video Problem
Making
2010. 12 . 24
Revision
전자 - 6-2
A6-2
Check RF Cable
Y
Check 5V voltage
on TU1500(Pin3)
N
Check IC506 Output Voltage
Y
Check CVBS signal
TU1500 #11 Pin
N
Replace Tuner(TU1500)
Y
Replace BCM(IC101)
< CVBS waveform – sample >
- Defend on the input signal.
A6
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
Component Video Problem
Making
Revision
2010. 12 . 24
전자 - 6-2
A6-3
Check input signal format
Is it supported?
Y
Check Component Cable
Y
Check signal
on L800, 801, 802
N
Check the damage of JK800
And Replace Connector
Y
Replace BCM(IC101)
※ Measured signals depend on the input signal.
A6
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
RGB(D-Sub) Video Problem
Making
Revision
2010. 12 . 24
전자 - 6-2
A6-4
Check input signal format
Is it supported?
Y
Check RGB Cable
conductors for damage
Y
N
Check P801
Replace connector (P801).
Y
Check signal, Hsync, Vsync
R812, R813
N
Check IC801 Input/Output
Y
Check signal
C320, C322, C327
N
Replace C320, C322, C327
Y
Replace BCM(IC101)
※ Measured signals depend on the input signal.
A6
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
AV Video Problem
Making
Revision
2010. 12 . 24
전자 - 6-2
A6-5
Check input signal format
Is it supported?
Y
Check AV Cable for damage or open
conductors
Y
Check AV port of JK800(Side),
JK900(Rear)
N
Replace connector
Y
Check signal line
JK800-Video : R850
JK900-Video : L900,901,902(RGB),
R919(CVBS)
N
Replace L900,901,902(RGB),
R919(CVBS)
Y
Replace BCM(IC101)
※ Measured signals depend on the input signal.
A6
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
Input
Block
PDP TV
HDMI Video Problem
Making
Revision
2010. 12 . 24
전자 - 6-2
A6-6
Check input signal format
Is it supported?
Y
Check HDMI Cable for damage or
open conductors
Y
Check EDID D/L
N
Re-Download EDID
Y
Check JK701, 702, 703, 704
for proper connection or damage
N
Replace Connector
Y
Check #56~63 on IC701
(HDMI Switch Output)
N
Replace IC701
Y
Replace BCM(IC101)
A6
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
A. Picture Problem
Making
Fuse Checking Method
Revision
Symptom
2010. 12 . 24
전자 - 6-2
A7
< DMM mode >
Pic. 1. Fuse check
Pic. 1.
Pic. 2.
1) Sound comes, the fuse is OK.
2) If Fuse is defects, it should check again voltage of 5V, Va, Va after replacing the fuse.
3) In case there are no voltage of 5V, Va, Vs, the board is failure, it need to replace the board.
A7
ⓒ LG Electronics. Inc.2009
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
Y-Sus Board Checking Method(50H3)
▣ Check Method
① Check input voltages(5V, Va, Vs) at P103 connector.
② Check it is short or not between Vs and GND at P103 connector.
③ Check all of fuses open. (FS201, FS202, FS203, FS501)
④ Check voltage of diode , FET by using digital multi-meter.
2010. 12 . 24
A8
Revision
YSUS board
FS203
Vs fuse
▣ Measurement method
Diode
전자 - 6-2
P113
FET
FS202
5V fuse
FS201
Va fuse
▣ Specifications
Forward
Reverse
HS602
Forward
Reverse
HS603
Forward
Reverse
D610
Q606,Q607 Q608,Q609
0.35V ~ 0.45V 0.45V~0.55V 0.45V~0.55V
O.L. (Overload)
D604,D605
Q601,Q602
0.35V ~ 0.45V
0.45V~0.55V
O.L. (Overload)
Q603,Q605 Q610,Q612
D602
0.35V ~ 0.45V 0.35V ~ 0.45V 0.4V~0.5V
O.L. (Overload)
A8
A9
HS602
HS601
FS501
18V fuse
Circuit No.
HS601
Direction
HS603
Position
ⓒ LG Electronics. Inc.2009
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Making
Z-Sus Board Checking Method(50R1)
① Check input voltages(5V, Va, Vs) at P203 connector.
② Check it is short or not between Vs and GND at P203 connector.
③ Check all of fuses open. (FS202)
④ Check voltage of diode , FET by using digital multi-meter.
▣ Measuring Method
FET
전자 - 6-2
2010. 12 . 24
A9
Revision
ZSUS board
P203
Diode
HS101
HS102
Direction
Forward
Reverse
Forward
Reverse
Circuit No.
D114,D118
Q107, Q110
Q106, Q109
0.35V ~ 0.45V
0.35V ~ 0.45V
0.35V ~ 0.45V
O.L. (Overload)
D109,D110,D108,D111 Q104,Q113,Q114
0.35V ~ 0.45V
0.5V ~ 0.6V
Q102,Q103
0.45V~0.55V
HS101
Position
HS102
▣ Specifications
O.L. (Overload)
FS202
5V fuse
A9
ⓒ LG Electronics. Inc.2009
Repair Process-Reference data
PDP TV
A. Picture Problem
Making
Check 5V, 12V on Power B/D
Revision
Symptom
2010. 12 . 24
전자 - 6-2
A12
PDP Module
Label
P811
Y-Sus
Board
Z-Sus
Board
Power
Board
P813
Control
Board
Main
Board
P813
▣ Measure 5V voltage
▣ Measure 17V voltage
17.02
A12
ⓒ LG Electronics. Inc.2009
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Control Board Checking Method(50H3)
▣ Checking Method
Making
전자 - 6-2
2010. 12 . 24
A13
Revision
④ Check IC ( IC53, IC51 )
① Check input voltages(5V of P105 / 18V of P2) at control
board.
IC53
IC51
5V
② Check LED is on.
3.3V
3.3V
GND
③ If LED doesn’t work, check crystal X1 output.
④ Check 3.3V, 5V IC.
⑤ Check MCM at VS_DA by using digital multi meter.
② Check LED On
③ Check Crystal(X1)
Check oscillation of Crystal
(Normal: 25 MHZ)
⑤ Check MCM
MCM Check point
(+)VS_DA / (-) GND
(Normal: 3.3V )
P105_FL1,FL2(5V)
P2(18V)
Pin14, 15
Pin 14,15 : 18V
① Check Input voltage
ⓒ LG Electronics. Inc.2009
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
Mal discharge Symptom
Revision
2010. 12 . 24
전자 - 6-2
A14
▣ Dot type Mal-discharge symptom
▣ Dark picture caused by Mal-discharge
▣ Scan type Mal-discharge symptom
A14
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
PDP Module Rom Ver. Checking method
2010. 12 . 24
전자 - 6-2
A15
Revision
Rom ver. Label
▣ Check by using SVC Remote controller
※Refer to the Module Rom upgrade manual
for Rom upgrade.
Press “In-start” →Press ”0413”
→ Select Panel Control → Check Module Rom ver.
USB Type Jig
A15
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Y Drive B/D Checking method(50R3)
Making
2010. 12 . 24
전자 - 6-2
A16
Revision
▣ Y drive board
Scan IC
※ DMM (Digital Multi-Meter)
Input signal connector
※ Check all output pins of scan IC (connector) using DMM.
A16
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Making
(Half picture) X- B/D Checking method(50R3)
▣ Half / partly display (or abnormal display)
▣ Connections between panel and X B/D
-. Right display (Picture 1.) ↔ Check/replace right X B/D
-. Both ends display (Picture 2.) ↔ Check/replace center X B/D
-. Left display (Picture 3.) ↔ Check/replace left X B/D
Partly
display
(abnormal)
전자 - 6-2
A18
Revision
Picture 1.
-. Check Va input voltage.
(P121, P120, P220, P221, P320 : Power connector of the X board)
Half
-. Check cables between CTRL board and X board.
display
-. Replace the X B/D.
(abnormal)
-. Check TCP connection after X B/D replacement.
2010. 12 . 24
Picture 2.
Picture 3.
abnormal
abnormal
※ Check connections (TCP - X board, CTRL board - X board)
Va
from CTRL
Va
from CTRL
A18
Va
from CTRL
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Defect type cause by PDP Module
Making
2010. 12 . 24
전자 - 6-2
A19
Revision
First of all, Check whether all of cable between board was inserted properly or not.
Next, Check whether there is foreign material on connector.
Symptom picture
defects description
To action
Regular vertical lines
1. Check connection
(CTRL B/D, X B/D)
2. Check CTRL B/D
3. Replace CTRL B/D
Vertical lines or Bar
1. Check connection
(CTRL B/D, X B/D)
2. Check CTRL B/D
3. Replace CTRL B/D
Many irregular vertical lines
1. Check connection
(CTRL B/D, X B/D)
2. Check CTRL B/D
3. Replace CTRL B/D
Horizontal Line or Bar
1. Check connection
(Y-Sus B/D ↔Panel)
2. Check Y-Sus B/D
3. Replace Y-Sus B/D
A19
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Connector Type on PDP Module
COF Type
TCP Type
96 Out Put
192 Out Put
1. Check foreign & Connection status
2. Check bad soldering
on Chip resistance
TCP (Tape Carrier Package) is film
for IC connect with Electrode pattern
(Direct Bonding) on X B/D
2010. 12 . 24
Making
전자 - 6-2
A20
Revision
FFC Type
Connector to connect between
Electrode PAD Of PANEL and
Y Drive B/D,Z-Sus B/D
▣ Defect symptom
A20
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
RF Signal level Checking method
Revision
2010. 12 . 24
전자 - 6-2
A21
◆ MENU Æ SUPPORT Æ Signal TEST
1. Check whether Signal Strength, Signal Quality is over 50% or not.
2. If Signal Strength, Signal Quality is under 50%,install the Booster to increase signal level.
A21
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
B. Power Problem
Making
Check voltage on Power board
Revision
2010. 12 . 24
전자 - 6-2
A22
P813
Pin Map
Power B/D↔Main B/D
Checking
Checking Order
Order
A22
No.
Checking
Point
Spec
1
STBY
5V
2
3
4
5
6
5V
17V
AC DET
RL_ON
M_ON
5V
17V
High(3.3V~5V)
High(3.3V~5V)
High(3.3V~5V)
Remark
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
B. Power Problem
Making
Power board Checking Method
Revision
2010. 12 . 24
전자 - 6-2
A23
Power B/D↔ Y-Sus B/D(P811) ◆ Check 5V,Va,Vs voltage
: For Voltage specification,
refer to the PDP Module Label.
Vs Adjustment
(VR901)
Va Adjustment
(VR502)
P813
Va Voltage ADJ
◆ Adjust Va,Vs voltage.
▣ Checking Method
- value
① Check soldering status on each major component.
② Check there is problem on major component or not by eye.
(CONDENSER, FET, IC, Resistor)
+ value
A3
Vs Voltage ADJ
③ Check FUSE.
④ Check 5V,Va,Vs voltage
※ PSU Maker: 1) LGIT 2) LITEON 3) YUYANG
Adjust way
※ If happen Power board Protection,
check whether there is Short or Open on Y-SUS, Z-SUS B/D or not.
A23
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
B. Power Problem
Making
Check Power off History
Revision
2010. 12 . 24
전자 - 6-2
A24
▣ Check Power off History by using SVC Remote controller
Press “In-start” →Press” 0000” → Select “Power Off History” → Pop up Module Rom ver.
LAST HISTORY
1~5
Appear Power off history 5ea.
(1 is the latest history)
RCU OFF
Power off by Remote control
KEY OFF
Mechanical power switch off
2HOUR OFF
After turn on by OnTimer, There is no operation
for 2hours
NO SIGNAL OFF
In case that there is no signal for 15minutes
A24
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
PDP TV
Symptom
C. Sound Problem
Making
Speaker cable checking method
Revision
2010. 12 . 24
전자 - 6-2
A25
Z-Sus Board
Power Board
Y-Sus Board
Jack for Speaker connection
Main Board
Control Board
Speaker
1.Check whether speaker jack was inserted properly on Main B/D side & speaker side or not.
2. Check whether speaker cable have problem (disconnection wire) or not.
A25
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
D. General function defect
PDP TV
Symptom
Check Remote control IR operation
Z-Sus Board
Power Board
Y-Sus Board
Control Board
Main Board
IR Board
Making
2010. 12 . 24
전자 - 6-2
A26
Revision
IR
GND
KEY1
KEY2
LED-RED
GND
SCL
SDA
BLUE_LED_ON
+3.3V_ST
+3.3V_Normal/
+5V_MULTI
3.3V Multi
LED_Power_On
TOUCH_Ver_CHECK
-
▣ Checking method
1.Check connector was inserted properly
on Main board and IR board.
2. Check +3.3V ST Voltage at Pin10
3. Check whether appear voltage on multi meter
when operate remote control.
※ Test Condition for case 3
→ Check Point: Pin 1( IR)
→ TV: power on status
→ Multi meter: Select DC 10V
IR/KEY Board for XXPZ7/90XX
A26
ⓒ LG Electronics. Inc.2010
Repair Process-Reference data
D. General function defect
PDP TV
Symptom
Z-Sus Board
Y-Sus Board
Control Board
Main Board
IR Board
CH-
2010. 12 . 24
Check Local Key operation
Power Board
CH+
Making
Vol+
Vol-
OK
HOME
전자 - 6-2
A27
IR
GND
KEY1
KEY2
LED-RED
GND
SCL
SDA
BLUE_LED_ON
+3.3V_ST
+3.3V_Normal/
+5V_MULTI
3.3V Multi
LED_Power_On
TOUCH_Ver_CHECK
-
1.Check connector was inserted properly
on Main board and local switch board.
[ If mechanical switch off status, Key-on is high(3.3v) ]
Input
2. Check whether appear voltage on multi meter
when operate Local switch.
※ Test Condition for case 3
→ Check Point: Pin 3,4( Key1,Key2)
→ TV: power on status
→ Multi meter: Select DC 10V
IR/KEY Board for XXPZ7/90XX
A27
ⓒ LG Electronics. Inc.2010