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LED LCD TV
SERVICE MANUAL
CHASSIS : LD01U
MODEL: 42LW4500/451C
MODEL: 42LW450A/N/U
42LW4500/451C-ZB
42LW450A/N/U-ZB
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL62863071 (1109-REV01)
Printed in Korea
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION............................................................... 11
BLOCK DIAGRAM...................................................................................18
EXPLODED VIEW .................................................................................. 19
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-3-
To Instrument’s
exposed
METALLIC PARTS
0.15 uF
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
1.5 Kohm/10W
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1 Ω
*Base on Adjustment standard
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
3. Test method
1. Application range
This specification is applied to the LCD/ LED LCD TV used
LD01U chassis.
2. Requirement for Test
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: CE, IEC specification
- EMC:CE, IEC
Each part is tested as below without special appointment.
1) Temperature
: 25 ºC ± 5 ºC (77 ºF ± 9 ºF), CST : 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Model General Specification
No.
1
Item
Market
Specification
EU(PAL Market-36Countries)
Remarks
DTV-T/C & Analog
(Germany, Netherlands, Switzerland, Hungary, Austria, Slovenia, Sweden, Denmark,
Finland, Norway, Bulgaria
DTV-T & Analog
UK, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece, Czech, Croatia,Turkey,
Morocco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Ukraine
Analog Only
Kazakhstan, Albania, Bosnia, Serbia, Slovakia
2
Broadcasting system
1) PAL-BG
2) PAL-DK
3) PAL-I/I’
4) SECAM L/L’
5) DVB-T/C/S (ID TV)
3
Receiving system
Analog : Upper Heterodyne
4
Scart Jack (1EA)
5
Video Input RCA(1EA) PAL, SECAM, NTSC
6
Component Input(1EA) Y/Cb/Cr, Y/Pb/Pr
7
RGB Input
RGB-PC
Analog(D-SUB 15PIN)
8
HDMI Input (3EA)
HDMI1-DTV (DVI)
PC(HDMI version 1.3)
HDMI2-DTV
Support HDCP
Digital : COFDM, QAM
PAL, SECAM
Scart Jack is Full scart and support RF-OUT(analog & DTV)
4System : PAL, SECAM, NTSC, PAL60
HDMI3-DTV
9
Audio Input (3EA)
RGB/DVI Audio, Component, AV
10 SDPIF out (1EA)
SPDIF out
11 Earphone out (1EA)
Antenna, AV1, AV2, AV3, Component,
L/R Input
RGB, HDMI1, HDMI2, HDMI3, HDMI4
12 USB (1EA)
For Service (download)
DivX
13 DVB
DVB-T
CI : UK, Finland, Denmark, Norway, Sweden, Russia, Spain, Ireland, Luxemburg, Belgium, Netherland
CI+ : France(Canal+), Italy(DGTVi)
DVB-C
CI : Switzerland, Austria, Slovenia, Hungary, Bulgaria
CI+ : Switzerland(UPC,Cablecom), Netherland(Ziggo), Germany(KDG,CWB), Finland(labwise)
DVB-S
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CI+ : Germany(Astra HD+)
-6-
LGE Internal Use Only
5. Component Video Input (Y, CB/PB, CR/PR)
No.
1.
Specification
Resolution
H-freq(kHz)
V-freq(Hz)
720x480
15.73
60.00
Remark
SDTV,DVD 480i
2.
720x480
15.63
59.94
SDTV,DVD 480i
3.
720x480
31.47
59.94
480p
4.
720x480
31.50
60.00
480p
5.
720x576
15.625
50.00
SDTV,DVD 625 Line
6.
720x576
31.25
50.00
HDTV 576p
7.
1280x720
45.00
50.00
HDTV 720p
8.
1280x720
44.96
59.94
HDTV 720p
9.
1280x720
45.00
60.00
HDTV 720p
10.
1920x1080
31.25
50.00
HDTV 1080i
11.
1920x1080
33.75
60.00
HDTV 1080i
12.
1920x1080
33.72
59.94
HDTV 1080i
13.
1920x1080
56.250
50
HDTV 1080p
14.
1920x1080
67.5
60
HDTV 1080p
6. RGB (PC)
No.
Specification
Resolution
H-freq(kHz)
V-freq(Hz)
Pixel Clock(MHz)
Proposed
Remark
Input 848*480 60 Hz, 852*480 60 Hz
1.
720*400
31.468
70.08
28.321
2.
640*480
31.469
59.94
25.17
VESA
For only DOS mode
3.
800*600
37.879
60.31
40.00
VESA
4.
1024*768
48.363
60.00
65.00
VESA(XGA)
5.
1280*768
47.78
59.87
79.5
WXGA
6.
1360*768
47.72
59.8
84.75
WXGA
FHD Model
7.
1366*768
47.56
59.6
84.75
WXGA
WXGA Model
8.
1200*1024
63.901
60.02
100.075
SXGA
FHD model
9.
1280*720
45
60
74.25
720p
DTV Standard
10.
1920*1080
67.5
60
148.5
WUXGA
-> 640*480 60 Hz Display
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-7-
FHD model
LGE Internal Use Only
7. HDMI Input
7.1. DTV Mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
1.
720*480
31.469/31.5
59.94/60
27.00/27.03
SDTV 480P
2.
720*576
31.25
50
54
SDTV 576P
3.
1280*720
37.500
50
74.25
HDTV 720P
4.
1280*720
44.96/45
59.94/60
74.17/74.25
HDTV 720P
5.
1920*1080
33.72/33.75
59.94/60
74.17/74.25
HDTV 1080I
6.
1920*1080
28.125
50.00
74.25
HDTV 1080I
7.
1920*1080
26.97/27
23.97/24
74.17/74.25
HDTV 1080P
8.
1920*1080
33.716/33.75
29.976 /30.00
74.25
HDTV 1080P
9.
1920*1080
56.250
50
148.5
HDTV 1080P
10.
1920*1080
67.43/67.5
59.94/60
148.35/148.50
HDTV 1080P
Remark
7.2. PC Mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
70.08
Pixel clock(MHz)
Proposed
28.321
Remark
1.
720*400
31.468
HDCP
2.
640*480
31.469
59.94
25.17
VESA
HDCP
3.
800*600
37.879
60.31
40.00
VESA
HDCP
4.
1024*768
48.363
60.00
65.00
VESA(XGA)
HDCP
5.
1280*768
47.78
59.87
79.5
WXGA
HDCP
WXGA
6.
1360*768
47.72
59.8
84.75
7.
1280*720
45
60
74.25
8.
1280*1024
63.981
60.02
108.875
SXGA
HDCP/FHD model
9.
1920*1080
67.5
60
148.5
WUXGA
HDCP/FHD model
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-8-
HDCP
HDCP
LGE Internal Use Only
8. 3D Specification
8.1. HDMI Input
(1) HDMI Input(1.4a)
When connect the cable on TV or change the input mode, Automatically 3D on.
Display OSD information -> 1920x2205[1080p 24], 1280x1470[720p 50/60]
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
3D input proposed mode
1
1920*2205
53.95 / 54
23.98 / 24
148.35/148.5
HDTV 1080P
Frame packing (1080 24p)
2
1280*1470
89.9 / 90
59.94/60
148.35/148.5
HDTV 720P
Frame packing (720 60p)
3
1280*1470
75
50
148.5
HDTV 720P
Frame packing (720 50p)
4
1920*1080
67.5
60
148.5
HDTV 1080P
Side by Side(half), Top and bottom
5
1920*1080
56.3
50
148.5
HDTV 1080P
Side by Side(half), Top and bottom,
6
1280*720
45
60
74.25
HDTV 720P
Side by Side(half), Top and Bottom
7
1280*720
37.5
50
74.25
HDTV 720P
Side by Side(half), Top and Bottom
8
1920*1080
33.7
60
74.25
HDTV 1080i
Side by Side(half), Top and Bottom
9
1920*1080
28.1
50
74.25
HDTV 1080i
Side by Side(half), Top and Bottom
10
1920*1080
27
24
74.25
HDTV 1080P
Side by Side(half), Top and Bottom
11
1920*1080
33.7
30
89.1
HDTV 1080P
Side by Side(half), Top and Bottom
(2) HDMI Input (1.3)
1) Connect the HDMI cable & receiving the HDMI signal.
2) Press “3D” key of remote control & select 3D format below.
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
3D input proposed mode
1
1280*720
45.00
60.00
74.25
HDTV 720P
Side by Side, Top & Bottom
2
1280*720
37.500
50
74.25
HDTV 720P
Side by Side, Top & Bottom
3
1920*1080
33.75
60.00
74.25
HDTV 1080I
Side by Side, Top & Bottom
4
1920*1080
28.125
50.00
74.25
HDTV 1080I
Side by Side, Top & Bottom
5
1920*1080
27.00
24.00
74.25
HDTV 1080P
Side by Side, Top & Bottom, Checkerboard
6
1920*1080
33.75
30.00
74.25
HDTV 1080P
Side by Side, Top & Bottom, Checkerboard
7
1920*1080
67.50
60.00
148.5
HDTV 1080P
Side by Side, Top & Bottom, Checkerboard
Single Frame Sequential
8
1920*1080
56.250
50
148.5
HDTV 1080P
Side by Side, Top & Bottom, Checkerboard
Single Frame Sequential
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
8.2. USB Input
(1) USB Divx
: When selecting MPO file, Automatically 3D on.
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
1920*1080
33.75
30.000
74.25
3D input proposed mode
Side by Side
Proposed
HDTV 1080P
Top & Bottom
Checkerboard
(2) MPO Piture 3D
: When selecting MPO file, Automatically 3D on.
(3) Store 3D Demo motion
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
1920*1080
33.75
30.000
74.25
3D input proposed mode
Side by Side
Proposed
HDTV 1080P
8.3. DTV Input
: When watching the DTV mode, Press “3D” key & select 3D format.
No.
Resolution
1
720x579
2
1920x1080
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
3D input proposed mode
50.000
Side by Side
50.000
Side by Side
(interlace)
Proposed
SD 576i 50 Hz
Top & Bottom
(interlace)
HD 1080i 50 Hz
Top & Bottom
8.4. 2D to 3D
: Support all input mode which is possible.(refer to 3D specification)
8.5. Reference
2D to 3D
Top & Bottom
Side By Side
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Checkerboard
- 10 -
Frame Seq
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application Range
(2)
This specification sheet is applied to all of the LCD/ LED LCD
TV with LD01U chassis.
(3)
2. Designation
1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 ºC ± 5 ºC
Relative humidity : 65 % ± 10 %
Input voltage : 220 V, 60 Hz
6) Adjustment equipments: Color Analyzer(CA-210 or CA-110),
DDC Adjustment Jig equipment, Service remote control.
7) Push The “IN STOP” key - For memory initialization.
Case1 : Software version up
1. After downloading S/W by USB, TV set will reboot
automatically.
2. Push “In-stop” key.
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first.
2. Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
Please Check the Speed :
To use speed between
from 200KHz to 400KHz
5) Click “Auto” tab and set as below.
6) Click “Run”.
7) After downloading, check “OK” message.
(4)
filexxx.bin
(5)
(7)
.OK
(6)
* USB DOWNLOAD
1) Put the USB Stick to the USB socket.
2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting.
3) Show the message “Copying files from memory”.
3. Main PCB check process
* APC - After Manual-Insult, executing APC
* Boot file Download
1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(1)
fi lexxx.bin
2) Set as below, and then click “Auto Detect” and check “OK”
message. If “Error” is displayed, check connection between
computer, jig, and set.
3) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”.
4) Click “Connect” tab. If “Can’t” is displayed, check connection
between computer, jig, and set.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 11 -
LGE Internal Use Only
3.1. ADC Process
4) Updating is starting.
(1) ADC
- Enter Service Mode by pushing “ADJ” key,
- Enter Internal ADC mode by pushing “G” key at “5. ADC
Calibration”
EZ ADJUT
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
ADC Calibration
ADC Comp 480i
NG
ADC Comp 1080p
NG
ADC RGB
NG
Start
Reset
<Caution> Using ‘power on’ key of the Adjustment remote
control, power on TV.
* ADC Calibration Protocol (RS232)
Adjust Sequence
Item
CMD1 CMD2 Data0
Adjust ‘Mode In’ A
A
0 0 When transfer the ‘Mode In’,
Carry the command.
ADC Adjust
A
D
1 0 Automatically adjustment
(The use of a internal pattern)
5) Uploading completed, The TV will restart automatically.
6) If your TV is turned on, check your updated version and
Tool option.(explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
• ad 00 10 [Adjust 1024*768 RGB]
• aa 00 90 End Adjust mode
* Required equipment : Adjustment remote control.
3.2. Function Check
* After downloading, have to adjust Tool Option again.
1) Push "IN-START" key in service remote control.
2) Select “Tool Option 1” and push “OK” key.
3) Punch in the number. (Each model has their number)
Module Tool option1 Tool option2 Tool option3 Tool option4 Tool option5
LGD
26528
18986
55337
27032
* Check display and sound
- Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART1/SCART2/CVBS)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60 Hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote control.
8448
4) Completed selecting Tool option.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 12 -
LGE Internal Use Only
4. Total Assembly line process
4.1. Adjustment Preparation
· W/B Equipment condition
CA210
: CCFL/EEFL -> CH9, Test signal: Inner pattern(80IRE)
LED -> CH14, Test signal: Inner pattern(80IRE)
· Above 5 minutes H/run in the inner pattern. (“power on” key
of adjust remote control)
Cool
13,000
Medium 9,300
Warm
6,500
K
X=0.269(±0.002)
K
K
• Auto adjustment Map(RS-232C)
RS-232C COMMAND
[CMD ID DATA]
Wb 00
00
White Balance Start
Wb 00
ff
White Balance End
RS-232C COMMAND MIN
Aging Time
(Min.)
Warm
Cool
Mid
Warm
R Gain
jg
Ja
jd
00
172
192
192
192
G Gain
jh
Jb
je
00
172
192
192
192
X=0.285(±0.002)
Inner pattern
B Gain
ji
Jc
jf
00
192
192
172
192
Y=0.293(±0.002)
(204 gray, 80 IRE)
R Cut
64
64
64
128
X=0.313(±0.002)
G Cut
64
64
64
128
Y=0.329(±0.002)
B Cut
64
64
64
128
Cool
Medium
** Caution **
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module)
Warm
X
Y
X
Y
X
Y
269
273
285
293
313
329
0-2
279
288
295
308
319
338
2
3-5
278
286
294
306
318
336
3
6-9
277
285
293
305
317
335
4
10-19
276
283
292
303
316
333
5
20-35
274
280
290
300
314
330
6
36-49
272
277
288
297
312
327
7
50-79
271
275
287
295
311
325
8
80-149
270
274
286
294
310
324
Over 150
Mid
<Test Signal>
1
9
Cool
MAX
(DEFAULT)
Y=0.273(±0.002)
· Edge LED W/B Table is process of time (Only LGD Module)
CA210: CH14, Test signal : Inner pattern(80IRE)
GP2R
CENTER
[CMD ID DATA]
269
273
285
293
309
* Manual W/B process using adjusts remote control.
• After enter Service Mode by pushing “ADJ” key,
• Enter White Balance by pushing “ G ” key at “6. White
Balance”.
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
323
* Connecting picture of the measuring instrument
(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment remote control P-ONLY->
Enter the mode of White-Balance, the pattern will come out.
Full White Pattern
White Balance
Color Temp.
R-Gain
G-Gain
B-Gain
R-Cut
G-Cut
B-Cut
Test-Pattern.
Reset
Cool
172
172
192
64
64
64
ON
To set
* After you finished all adjustments, Press “In-start” key and
compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory Jig model.
* Push the “IN STOP” key after completing the function
inspection. And Mechanical Power Switch must be set “ON”.
CA-210
COLOR
ANALYZER
TYPE: CA-210
4.2. DDC EDID Write (RGB 128Byte )
• Connect D-sub Signal Cable to D-sub Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
RS-232C Communication
* Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10 lux).
2) Adhere closely the Color Analyzer (CA210) to the module
less than 10 cm distance, keep it with the surface of the
Module and Color Analyzer’s prove vertically.(80° ~ 100°).
3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others,
check the back light on.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.3. DDC EDID Write (HDMI 256Byte)
- 13 -
• Connect HDMI Signal Cable to HDMI Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
LGE Internal Use Only
4.4. EDID DATA
1) FHD RGB EDID data
1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum
00
1
2
3
4
5
6
7
8
9
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
68
10
09
78
0A
EE
91
A3
54
4C
99
26
54
A1
08
00
81
80
61
40
45
40
31
40
01
01
2C
10
- Auto Download
HDMI1
HDMI2
HDMI3
RGB
Start
NG
NG
NG
NG
Start
01
01
01
01
01
01
02
3A
80
18
71
38
2D
40
58
45
00
A0
5A
00
00
00
1E
01
1D
00
72
51
D0
1E
20
50
6E
28
55
00
A0
5A
00
00
00
1E
00
00
00
FD
00
3A
60
3E
1E
53
10
00
0A
20
20
20
20
20
20
FF
FF
FF
FF
FF
A
0
Download
Reset
0 When transfer the ‘Mode In’,
Carry the command.
A
E
d
d
FF
FF
FF
FF
FF
FF
FF
FF
FF
00
e
FF
FF
90
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
A0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
B0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
C0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
D0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
E0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
F0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
00
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
80
10
09
78
0A
EE
91
A3
54
4C
99
26
54
A1
08
00
71
4F
81
80
01
01
01
01
01
01
2C
10
OK
OK
OK
OK
CMD1 CMD2 Data0
A
F
2) FHD HDMI EDID data
* Edid data and Model option download (RS232)
‘Mode In’
E
b
40
c
a
b
20
0F
50
30
01
01
01
01
01
01
02
3A
80
18
71
38
2D
40
58
40
45
00
A0
5A
00
00
00
1E
1B
21
50
A0
51
00
1E
30
50
48
88
35
00
A0
5A
00
00
00
1C
00
00
00
FD
00
3A
60
3E
1E
53
10
00
0A
20
20
20
20
20
20
84
13
05
14
03
02
70
d
d
80
02
90
22
A0
Download
D
30
Reset
* Caution : Never connect HDMI & D-sub Cable when EDID
download
Item
C
50
EDID D/L
HDMI1
HDMI2
HDMI3
RGB
B
a
0F
80
EDID D/L
EZ ADJUT
c
A
20
70
• After enter Service Mode by pushing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by pushing “OK” key.
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
0
00
03
15
F1
4E
10
1F
01
26
15
07
50
09
57
07
E3
05
03
01
01
1D
80
18
71
1C
16
12
01
e
20
21
f
20
58
2C
B0
25
00
A0
5A
00
00
00
9E
01
1D
00
72
51
D0
1E
20
C0
6E
28
55
00
A0
5A
00
00
00
1E
02
3A
80
18
71
38
D0
2D
40
58
2C
45
00
A0
5A
00
00
00
1E
01
1D
00
BC
E0
52
D0
1E
20
B8
28
55
40
A0
5A
00
00
00
1E
00
00
F0
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
e
A
B
C
D
E
F
00 10 Automatically Download
f
26
3) 3D RGB EDID data
(The use of a internal pattern)
00
0
1
2
3
4
5
6
7
8
9
00
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
68
10
09
78
0A
EE
91
A3
54
4C
99
26
54
A1
08
00
81
80
61
40
45
40
31
40
01
01
2C
10
- Manual Download
* Caution
1) Use the proper signal cable for EDID Download.
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time.
3) Use the proper cables below for EDID Writing.
4) Download HDMI1, HDMI2, separately because HDMI1 is
different from HDMI2.
c
a
b
20
0F
50
30
01
01
01
01
01
01
02
3A
80
18
71
38
2D
40
58
40
45
00
A0
5A
00
00
00
1E
01
1D
00
72
51
D0
1E
20
50
6E
28
55
00
A0
5A
00
00
00
1E
00
00
00
FD
00
3A
60
3E
1E
53
10
00
0A
20
20
20
20
20
20
FF
FF
FF
FF
FF
70
80
d
d
FF
FF
FF
FF
FF
FF
FF
FF
FF
00
e
FF
FF
90
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
A0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
B0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
For Analog EDID
For HDMI EDID
C0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
D-sub to D-sub
DVI-D to HDMI or HDMI to HDMI
D0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
E0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
F0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
Item
Condition
Data(Hex)
Manufacturer ID
GSM
1E6D
Version
Digital : 1
01
Revision
Digital : 3
03
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 14 -
LGE Internal Use Only
4.5. V-COM Adjust(Only LGD(M+S) Module)
4) 3D HDMI EDID data
00
0
1
2
3
4
5
6
7
8
9
00
FF
FF
FF
FF
FF
FF
00
1E
6D
10
c
A
B
C
D
a
E
F
26
- Why need Vcom adjustment?
A The Vcom (Common Voltage) is a Reference Voltage of
Liquid Crystal Driving.
-> Liquid Crystal need for Polarity Change with every frame.
b
01
03
80
10
09
78
0A
EE
91
A3
54
4C
99
20
0F
50
54
A1
08
00
71
4F
81
80
01
01
01
01
01
01
30
01
01
01
01
01
01
02
3A
80
18
71
38
2D
40
58
2C
40
45
00
A0
5A
00
00
00
1E
1B
21
50
A0
51
00
1E
30
50
48
88
35
00
A0
5A
00
00
00
1C
00
00
00
FD
00
3A
60
3E
1E
53
10
00
0A
20
20
20
20
20
20
01
e
Y
20
21
S
d
d
02
03
37
F1
4E
10
1F
84
13
05
90
22
15
01
26
15
07
50
09
57
07
A0
14
03
02
12
B0
E
E3
05
03
01
01
1D
80
18
71
1C
16
20
58
25
f
00
A0
5A
00
00
00
9E
01
1D
00
72
51
D0
1E
20
6E
28
55
00
A0
5A
00
00
00
1E
02
3A
80
18
71
38
2D
40
58
2C
45
00
A0
5A
00
00
00
1E
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
e
2C
D0
E0
F0
Ti m i n g
Co nt r o ll e r
HEX
EDID Table
DDC Function
FHD Model
0001
01 00
Analog/Digital
all
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
Gamm a Reference
Volta ge
Column Line
Pane l
V COM
CLC
CST
Liquid
Crys tal
Row Li ne TFT
- Adjust sequence
· Press the PIP key of th ADJ remote control.(This PIP key is
hot key to enter the VCOM adjusting mode)
(Or After enter Service Mode by pushing “ADJ” key, then
Enter V-Com Adjust mode by pushing “G” key at “10. VCom”.)
· As pushing the right or the left key on the remote control,
and find the V-COM value which is no or minimized the
Flicker. (If there is no flicker at default value, Press the exit
key and finish the VCOM adjustment.)
· Push the “OK” key to store value. Then the message
“Saving OK” is pop.
· Press the exit key to finish VCOM adjustment.
ⓒ Month, Year: Week : ‘01’ -> ‘01’
Year : ‘2011’ -> ‘15’ fix
ⓓ Model Name(Hex):
MODEL NAME(HEX)
Cont rol si gnal
V COM
ⓑ Serial No: Controlled on production line.
MODEL
Po w e r
Blo ck
V COM
* Detail EDID Options are below
ⓐ Product ID
Model Name
Power
Po w e rInput
I nput
M
Data (R ,G,B ) & C ont ro l s ignal
So urce D r i v e I C
T
f
f
C0
Da t a I n p u t
Gat e Driv e IC
80
S
In t e r f a ce
70
Circuit Block
Ga mma
Re f e r e nce V o ltage
Data (R ,G,B ) &
Cont rol si gnal
ⓔ Checksum: Changeable by total EDID data.
EDID C/S data
check sum
FHD
HD
HDMI
RGB
Block 0
E2
1C
Block 1
D1 (HDMI2)
(Hex)
HDMI
RGB
E1 (HDMI1)
(Visual Adjust and control the Voltage level)
C1 (HDMI3)
4.6. Outgoing condition Configuration
When pressing IN-STOP key by Service remote control, Red
LED are blinked alternatively. And then Automatically turn off.
(Must not AC power OFF during blinking)
ⓕ Vendor Specific(HDMI)
INPUT
MODEL NAME(HEX)
HDMI1
78030C001000B82D20C00E01400A3C08201820982058203820
HDMI2
78030C002000B82D20C00E01400A3C08201820982058203820
HDMI3
78030C003000B82D20C00E01400A3C08201820982058203820
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.7. Hi-pot Test
Confirm whether is normal or not when between power
board’s ac block and GND is impacted on 1.5 kV(dc) or 2.2
kV(dc) for one second.
- 15 -
LGE Internal Use Only
5. Model name & Serial number D/L
4) Check the model name Instart menu -> Factory name
displayed (ex 42LD450-ZA)
5) Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42LD450)
• Press “Power on” key of service remote control.
(Baud rate : 115200 bps)
• Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
• Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below).
5.1. Signal TABLE
CMD
LENGTH
ADH
ADL
DATA_1
...
Data_n
CS
DELAY
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n
Delay : 20ms
6. CI+ Key Download method
5.2. Command Set
No.
Adjust mode
CMD(hex)
LENGTH(hex)
Description
1
EEPROM WRITE
A0h
84h+n
n-bytes Write(n=1~16)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model name and Serial number write in EEPROM.
(1) Download Procedure
1) Press "Power on" key of a service remote control.
(Baud rate : 115200 bps)
2) Connect RS232-C Signal Cable.
3) Write CI+ Key through RS-232-C.
4) Check whether the key was downloaded or not at ‘In
Start’ menu. (Refer to below).
=> Check the Download to CI+ Key value in LGset.
1. check the method of CI+ Key value
a. check the method on Instart menu
5.3. Method & notice
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, Sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the ‘instart’ key of Adjustment remote control.
2) Go to the menu ‘5.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 16 -
LGE Internal Use Only
8. 3D function test
b. check the method of RS232C Command
1) into the main ass’y mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
A
(Pattern Generator MSHG-600, MSPG-6100 [Support HDMI 1.4])
* HDMI mode No. 872, pattern No. 83)
1) Please input 3D test pattern like below.
Data 0
0
0
2) check the key download for transmitted command
(RS232 : ci 00 10)
CMD 1
CMD 2
C
I
Data 0
1
0
3) result value
- normally status for download : OKx
- abnormally status for download : NGx
2) When 3D OSD appear automatically, then select OK key.
2. Check the method of CI+ Key value (RS232)
1) into the main ass’y mode (RS232 : aa 00 00)
CMD 1
CMD 2
A
A
Data 0
0
0
2) Check the method of CI+ key by command (RS232 :
ci 00 20)
CMD 1
CMD 2
C
I
Data 0
2
0
3) Result value
i 01 OK 1d1852d21c1ed5dcx
CI+ key Value
3) Don’t wear a 3D Glasses, Check the picture like below.
7. Local Dimming Function Check
Step1) Turn on TV.
Step2) Press “P-only” key, entrance to power only mode and
Press “Exit” key.
Step3) Press “Tilt” key, entrance to Local Dimming mode.
Step4) At the Local Dimming mode, module Edge Backlight
moving right to left Back light of module moving.
Step5) Confirm the Local Dimming mode.
Step6) Press “Exit” key.
9. IR emitter inspection
(1) Start 3D pattern inspection
(2) If IR emitter emitter signal is correctly received to IR
receiver, the lamp of IR tester turn on.
<IR Emitter inspection>
<IR Tester Lamp turned off(NG)>
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 17 -
<IR Tester Lamp turned on(OK)>
LGE Internal Use Only
Copyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 18 -
Rear
Side
TUNER
( T/ C)
PCMCIA
RS-232C
SCART
SPDI F
PC- AUDI O
PC- RGB
A/V1
COMP1
HDMI 2
HDMI 1
HDMI 3
H/ P
USB
Debug _TX/ RX
SC_VI DEO/ LR_OUT
SC_CVBS/ RGB/ LR_I N
SPDI F_OUT
PC_ Audio I N
DDC_SDA/ UART_TX
DSUB_RGB/ HVsync
AV_CVBS/ LR_I N
COMP_ YPbPr/ LR_I N
HDMI _TMDS/ HPD/ CEC
HDMI _TMDS/ HPD/ CEC
HDMI _TMDS/ HPD/ CEC
HP_OUT
USB_DM/ DP
CI _ADDR[ 14:0]
CI _DATA[ 7:0]
CI _TS_DATA[ 7: 0] / CLK/ Valid/ Sync
FE_TS_DATA[ 0] / CLK/ Valid/ Sync
SCL/ SDA
Tuner_CVBS
Tuner_SI F
LGE101 (S7R)
LGE107 (S7+URSA)
SCL/ SDA
I 2S_I / F
SCL/ SDA
SCL/ SDA
30P
51P
41P
Audio
AMP
Sub Micom
( NEC)
HDCP EEPROM X 1
( 8Kb)
SYSTEM EEPROM X 1
( 1Mb)
NAND
Flash( 8Gb)
SPI
Flash( 8Mb)
SYSTEM
DDR3 X 16 X 2
( 2Gb)
For FRC
SPI
Flash( 2Mb)
SYSTEM
DDR3 X 16 X 1
( 1Gb)
DATA
Video
Audio
BLOCK DIAGRAM
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
AG1
A21
511
300
510
120
A2
A5
200
A10
810
800
LV1
LV2
530
540
521
900
910
400
700
710
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 19 -
LGE Internal Use Only
IC102
NAND01GW3B2CN6E
NAND FLASH MEMORY
S7M-PLUS_DivX_MS10
+3.3V_Normal
+3.3V_Normal
LGE107DC-RP [S7M+ DIVX/MS10]
C101
0.1uF
+3.3V_Normal
VDD_1
VSS_1
R105
1K
NC_9
NC_10
OPT
CL
OPT
R104
10K
/PF_CE1
AL
PF_ALE
W
/PF_WE
WP
Q101
KRC103S
OPT
B
3.3K
R102
/PF_WP
NC_11
R106
1K
C
NC_12
NC_13
E
NC_14
NC_15
8
41
9
40
10
39
11
38
12
37
13
36
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
PCM_A[6]
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
PCM_A[5]
<T3 CHIP Config>
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
PCM_A[4]
I/O4
22
NC_25
PCM_A[0-14]
MIPS_no_EJ_NOR8
MIPS_EJ1_NOR8
MIPS_EJ2_NOR8
B51_Secure_no scramble
B51_Sesure_scramble
NC_24
C102
10uF
NC_23
VDD_2
:
:
:
:
:
4’h3
4’h4
4’h5
4’hb
4’hc
(MIPS
(MIPS
(MIPS
(8051
(8051
as
as
as
as
as
host.
host.
host.
host.
host.
No EJ PAD. Byte mode NAND flash.)
EJ use PAD1. Byte mode NAND flash.)
EJ use PAD2. Byte mode NAND flash.)
Internal SPI flash secure boot, no scramble)
Internal SPI flash secure boot with scarmble)
NC_22
NC_21
NC_20
AR102
I/O2
PCM_A[2]
I/O1
PCM_A[1]
AUD_MASTER_CLK
R148
PCM_A[0]
I/O0
22
NC_19
25
PCM_D[3]
AB18
PCM_D[4]
AC18
PCM_D[5]
AC19
PCM_D[6]
AC20
PCM_D[7]
AC21
/PCM_OE
NC_16
/PCM_WE
/PCM_IORD
+5V_Normal
V21
PCM_A[2]
Y22
PCM_A[3]
AA22
PCM_A[4]
R22
PCM_A[5]
R21
PCM_A[6]
T23
PCM_A[7]
T24
PCM_A[8]
AA23
PCM_A[9]
Y20
PCM_A[11]
AA21
PCM_A[12]
U23
PCM_A[13]
Y23
PCM_A[14]
W23
V22
W21
Y21
NAND_FLASH_1G_HYNIX
EAN35669102
IC102-*1
H27U1G8F2BTR-BC
EAN61857001
IC102-*2
K9F1G08U0D-SCB0
V23
P23
R23
P22
PCM_RST
AC17
/PF_CE1
AB20
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
47
2
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
28
21
27
22
23
26
24
25
NC_29
NC_2
NC_28
NC_3
NC_27
NC_4
NC_26
NC_5
I/O7
NC_6
I/O6
R/B
I/O5
RE
I/O4
CE
NC_25
NC_7
NC_24
NC_8
NC_23
VCC_1
VCC_2
VSS_1
VSS_2
NC_9
NC_22
NC_10
NC_21
CLE
NC_20
ALE
I/O3
WE
I/O2
WP
I/O1
NC_11
I/O0
NC_12
NC_19
NC_13
NC_18
NC_14
NC_17
NC_15
NC_16
48
1
47
2
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
31
18
19
30
20
29
21
28
22
27
23
26
24
25
NC_29
NC_1
NC_28
NC_2
NC_27
NC_3
NC_26
NC_4
I/O7
NC_5
I/O6
NC_6
I/O5
RY/BY
I/O4
RE
NC_25
CE
NC_24
NC_7
NC_23
NC_8
VCC_2
VSS_2
VCC_1
VSS_1
NC_22
NC_9
NC_21
NC_10
NC_20
CLE
I/O3
ALE
I/O2
WE
I/O1
WP
I/O0
NC_11
NC_19
NC_12
NC_18
NC_13
NC_17
NC_14
NC_16
NC_15
48
1
47
2
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
31
18
19
30
20
29
21
28
22
27
23
26
24
25
NC_29
AA18
I/O7
I/O6
for SYSTEM/HDCP
EEPROM&URSA3
I/O5
RGB_DDC_SCL
VSS_2
NC_22
I/O2
AD1
AE14
AE13
S7R_DivX
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
NC_45
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
W26
AE1
W25
AF16
U26
AF1
U25
AE3
U24
AD14
V26
AD3
V25
AF15
V24
W24
AF2
AE15
Y26
AD2
Y25
AD16
Y24
AD15
AE16
IC101-*3
LGE101DC-R-1 [S7R DIVX]
NC_48
LVACLKP/LLV6P/BLUE[3]
NC_78
LVACLKN/LLV6N/BLUE[2]
NC_64
LVA0P/LLV3P/BLUE[9]
NC_50
LVA0N/LLV3N/BLUE[8]
NC_45
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
LVB0P/RLV6P/RED[1]
NC_66
LVB0N/RLV6N/RED[0]
NC_76
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8]
NC_44
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
NC_61
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
RLV1N/LCK
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
AE9
AF9
AF6
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
AD12
AE5
EEPROM_1MBIT_ATMEL
AF12
AF5
AE12
AF7
AD11
AD7
AD10
AE7
IC103-*1
CAT24C08WI-GT3-H-RECV(TV)
AF10
AD8
AC24
AE14
AD26
AE13
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
NC_37
NC_43
NC_52
NC_75
NC_68
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
NC_57
NC_70
TCON5/TP/SOE
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
LVB2P/RLV8P/GREEN[7]
NC_61
AE25
NC_19
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
AE2
AF26
RLV1N/LCK
AE24
AF8
AF24
AD9
AF23
AD22
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
AE9
AF9
AF22
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
NC_31
NC_55
NC_29
NC_12
NC_21
Y11
Y19
WP
GND_105
AD2
Y24
AD15
AE16
AE19
AE6
AD21
AF11
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
AF7
AB22
AD10
AD11
NC_37
NC_43
NC_52
NC_75
NC_68
AB23
AE7
AC23
AF10
AC22
AD8
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
NC_57
NC_70
TCON5/TP/SOE
AB26
AD1
AB25
AB24
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
NC_39
TCON17/CS6/GCLK4
LVB0P/RLV6P/RED[1]
NC_66
LVB0N/RLV6N/RED[0]
NC_76
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8]
NC_44
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
AC24
AE14
AD26
AE13
NC_61
LVB3P/LLV1P/GREEN[3]
NC_60
AD25
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AD24
AF4
AD4
NC_19
NC_31
AE8
AA16
Y11
AA15
Y19
NC_55
NC_29
NC_12
NC_21
GND_105
AA11
AE25
RLV3P/RED[7]
RLV3N/RED[6]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
AE2
AF26
RLV1N/LCK
AF25
AE24
AF8
AF24
AD9
AF23
AD22
AE22
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
AE9
AF9
AF22
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
AD3
AF15
AF2
AE15
W24
Y26
AD2
Y25
AD16
AD15
Y24
AE16
AE19
AE6
AD21
AF11
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
TCON3/OE/GOE/GCLK2
NC_53
TCON15/SCAN_BLK1
NC_74
TCON18/CS7/GCLK5
AF7
AB22
AD10
AD11
NC_37
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
AB23
AE7
AC23
AF10
AC22
AD8
NC_57
TCON5/TP/SOE
NC_70
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
AF3
AF14
AD1
AB26
AB25
AC24
AE14
AD26
AE13
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8]
NC_44
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
NC_61
LVB3P/LLV1P/GREEN[3]
NC_60
AD25
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AD24
AF4
AD4
AA14
NC_19
RLV3P/RED[7]
RLV3N/RED[6]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
AE2
AE25
AF26
RLV1N/LCK
AF25
AE24
AF8
AF24
AD9
AF23
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
AE9
AD22
AF9
AE22
AF22
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
NC_31
AE8
Y11
AF2
AE15
AD2
AD16
AD15
Y24
AE16
NC_55
NC_29
NC_12
NC_21
GND_105
AE19
AE6
AD21
AF11
AE21
AD6
AD12
AF21
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
TCON3/OE/GOE/GCLK2
NC_53
TCON15/SCAN_BLK1
NC_74
TCON18/CS7/GCLK5
NC_37
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
AE10
AE18
AF18
AF7
AB22
AD10
AD11
AB23
AE7
AC23
AF10
AC22
AD8
NC_57
TCON5/TP/SOE
NC_70
NC_24
AF3
AF14
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
NC_39
TCON17/CS6/GCLK4
AA14
NC_19
AC15
AF1
+3.3V_Normal
NC_31
AE8
AA16
Y11
AA15
Y19
NC_55
NC_29
NC_12
NC_21
GND_105
AC24
AE14
AD26
AE13
AE3
AD14
AD3
AF15
AF2
EEPROM
AE15
AD2
AD16
IC103
CAT24WC08W-T
$0.199
2
7
3
6
5
LVB1N/RLV7N/GREEN[8]
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
NC_61
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
W26
AE1
W25
AF16
AF1
U26
U25
AE3
U24
AD14
V26
AD3
V25
AF15
C107
0.1uF
VCC
FRC_DDR3_A1/DDR2_A6
ACKM/RLV3N/RED[2]
FRC_DDR3_A2/DDR2_A7
A0P/RLV0P/RED[9]
FRC_DDR3_A3/DDR2_A1
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
AF4
AD4
AD2
AD16
AD15
Y24
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
ACKM/RLV3N/RED[2]
FRC_DDR3_A2/DDR2_A7
A0P/RLV0P/RED[9]
FRC_DDR3_A3/DDR2_A1
A0M/RLV0N/RED[8]
AE16
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
AD1
AE14
AE13
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
RLV3P/RED[7]
RLV3N/RED[6]
NC_49
RLV0N/LHSYNC
RLV0P/LVSYNC
AE2
AE25
AF26
RLV1N/LCK
AF25
AE24
AF8
AF24
AD9
AF23
RLV2P/RED[9]
NC_71
RLV1P/LDE
NC_40
RLV2N/RED[8]
RLV4P/RED[5]
AE9
AD22
AF9
AE22
AF22
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
AF4
AD4
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
U26
AF1
U25
AE3
U24
AD14
V26
AD3
V25
AF15
V24
AF2
W24
AE15
Y26
AD2
Y25
AD16
Y24
AE19
AE6
AD21
AF11
AE21
AD6
AD12
AF21
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AF7
AB22
AD10
AD11
AB23
AE7
AC23
AF10
AC22
AD8
AF3
AF14
B0P/RLV6P/GREEN[7]
AD1
AB26
AB25
TCON3/OE/GOE/GCLK2
NC_53
TCON15/SCAN_BLK1
NC_74
TCON18/CS7/GCLK5
NC_37
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
NC_57
TCON5/TP/SOE
NC_70
AC24
AE14
AD26
AE13
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
B1M/RLV7N/GREEN[4]
B2M/RLV8N/GREEN[2]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
I2C_SCL
E1
1
8
2
7
C1M/LLV1N/BLUE[2]
AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
FRC_DDR3_DQSU/DDR2_DQS1
AF4
AD4
AA14
NC_19
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
AE25
FRC_DDR3_RESETB/DDR2_A3
AF26
AF6
AD15
AE16
NC_31
AE8
AA16
Y11
Y19
NC_55
NC_29
NC_12
NC_21
GND_105
AE24
AF8
AF24
AD9
C1M/LLV1N/BLUE[2]
AF23
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AD22
AF9
AE22
AF22
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
22
3
A0’h
6
AF12
SCL
R111
22
AF5
I2C_SCL
AE12
AF7
AD11
AD7
4
5
C3M/LLV4N
C4P/LLV5P
AD10
SDA
R112
C104
8pF
OPT
AE19
AE6
AD21
AF11
AE21
AD6
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
C106
8pF
OPT
22
AE7
I2C_SDA
AF10
AD8
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
AB26
FRC_DDR3_DQU5/DDR2_DQ9
AD1
AB25
AB24
AD2
Y24
AD15
AE16
SC1/COMP1_DET
G20
ERROR_OUT
G19
MODEL_OPT_0
F20
PCM_A6
GPIO50/UART1_RX
PCM_A7
GPIO51/UART1_TX
PCM_A8
DC_MREMOTE
F19
GPIO6/PM0/INT0
PCM_A10
GPIO7/PM1/PM_UART_TX
PCM_A11
GPIO8/PM2
PCM_A12
GPIO9/PM3
PCM_A13
GPIO10/PM4
PCM_A14
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_CS1/GPIO12/PM6
PM_SPI_WP1/GPIO13/PM7
PM_SPI_WP2/GPIO14/PM8/INT2
PCM_OE_N
GPIO15/PM9
PCM_WE_N
PM_SPI_CS2/GPIO16/PM10
PCM_IORD_N
GPIO17/PM11/INT3
PCM_IOWR_N
GPIO18/PM12/INT4
PM_SPI_CK/GPIO1
PCM_IRQA_N
GPIO0/PM_SPI_CZ
PCM_CD_N
PM_SPI_DI/GPIO2
PCM_WAIT_N
PM_SPI_DO/GPIO3
USB1_CTL
E11
HP_DET
G9
CONTROL_ATTEN
F9
MODEL_OPT_6
C5
E8
3D SG
USB1_OCD
D7
33
MODEL_OPT_1
R146
E9
/FLASH_WP
MODEL_OPT_2
F7
F6
TUNER_RESET
D8
DEMOD_RESET
AV_CVBS_DET
G12
F10
D9
PCM_CE_N
3D SG
DD_MREMOTE
E7
PCM_A9
TS0_CLK
PCM_PF_CE0Z
TS0_VLD
PCM_PF_CE1Z
TS0_SYNC
PCM_PF_OEZ
33
R147
SPI_SCK
D11
E10
D10
33
R151
/SPI_CS
SPI_SDI
for SERIAL FLASH
SPI_SDO
AA5
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
AA10
CI_TS_DATA[0-7]
AB5
PCM_PF_WEZ
TS0_D0
PCM_PF_ALE
TS0_D1
PCM_PF_AD[15]
TS0_D2
PCM_PF_RBZ
TS0_D3
TS0_D5
UART_TX2/GPIO65
TS0_D6
UART_RX2/GPIO64
TS0_D7
TS1_CLK
DDCR_CK/GPIO72
TS1_VLD
from CI SLOT
CI_TS_DATA[0]
AC4
CI_TS_DATA[1]
Y6
CI_TS_DATA[2]
AA6
CI_TS_DATA[3]
W6
CI_TS_DATA[4]
AA7
CI_TS_DATA[5]
Y9
CI_TS_DATA[6]
AA8
CI_TS_DATA[7]
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC
AC5
DDCR_DA/GPIO71
AC6
Internal demod out
/External demod in
FE_TS_DATA[0-7]
AB6
TS1_SYNC
DDCA_DA/UART0_TX
TS1_D0
TS1_D2
PWM0/GPIO66
TS1_D3
PWM1/GPIO67
TS1_D4
PWM2/GPIO68
TS1_D5
PWM3/GPIO69
TS1_D6
PWM4/GPIO70
TS1_D7
C6
B6
C8
C7
A6
AC10
FE_TS_DATA[0]
AB10
FE_TS_DATA[1]
AC9
FE_TS_DATA[2]
AB9
FE_TS_DATA[3]
AC8
FE_TS_DATA[4]
AB8
FE_TS_DATA[5]
AC7
FE_TS_DATA[6]
AB7
FE_TS_DATA[7]
D12
SAR0/GPIO31
MPIF_CLK
SAR1/GPIO32
MPIF_CS_N
SAR2/GPIO33
D14
E14
SAR3/GPIO34
Delete /PIF_SPI_CS
R160
1K
MPIF_BUSY
SAR4/GPIO35
E12
AE5
AF12
AF20
AF5
AF19
AE12
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
FRC_DDR3_DQL7/DDR2_DQ5
AD18
AF7
AB22
AD10
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
AD11
AB23
AE7
AC23
AF10
AC22
AD8
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
AE10
AE18
AF18
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
ACKM/RLV3N/RED[2]
FRC_DDR3_A2/DDR2_A7
A0P/RLV0P/RED[9]
FRC_DDR3_A3/DDR2_A1
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
FRC_DDR3_DQU5/DDR2_DQ9
D4P/TCON1
AA26
AF3
AF14
AB26
AD1
AB25
AB24
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
B0M/RLV6N/GREEN[6]
FRC_DDR3_BA1/DDR2_ODT
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
AD13
AC24
AE14
AD26
AE13
AD25
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD24
AF4
AD4
FRC_GPIO1
AE25
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
FRC_DDR3_RESETB/DDR2_A3
AF26
AE24
AF8
AF24
AD9
AF23
AD22
AE22
C1M/LLV1N/BLUE[2]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
AF22
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
FRC_REXT
FRC_TESTPIN
AE19
AE6
AD21
AF11
AE21
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD15
AE16
AE18
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
AF7
AB22
AD10
AD11
AB23
AE7
AC23
AF10
AC22
AD8
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
AE10
AF18
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
D4P/TCON1
FRC_PWM1
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_DQU5/DDR2_DQ9
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
AA26
AF3
AF14
FRC_GPIO1
AB26
AD1
AB25
AB24
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
AD13
AC24
AE14
AD26
AE13
AD25
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD24
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
FRC_REXT
FRC_TESTPIN
AF4
AD4
V26
AD3
V25
AF15
AF2
V24
AE15
W24
Y26
AD2
Y25
AD16
AD15
Y24
AE16
AE25
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
FRC_DDR3_RESETB/DDR2_A3
AF26
AF8
AD9
C1M/LLV1N/BLUE[2]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
AF22
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
AE19
AE6
AD21
AF11
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AF7
AB22
AD10
AD11
AB23
AE7
AC23
AF10
AC22
AD8
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
AD1
AB26
AB25
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
F12
D13
E13
FRC_DDR3_DQU5/DDR2_DQ9
AC24
AE14
AD26
AE13
AD25
D4P/TCON1
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AF4
AD4
FRC_GPIO1
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
AE25
FRC_DDR3_RESETB/DDR2_A3
AF26
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF25
AE24
AF8
AF24
AD9
AF23
C1M/LLV1N/BLUE[2]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AD22
AF9
AE22
AF22
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
FRC_REXT
FRC_TESTPIN
AE19
AE6
AD21
AF11
AE21
AD6
AD12
AF21
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
Y24
AD15
AE16
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
FRC_DDR3_DQL1/DDR2_DQ0
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
D3P/TCON3
D3M/TCON2
AE10
AE18
AF18
AF7
AB22
AD10
AD11
AB23
AE7
AC23
AF10
AC22
AD8
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
FRC_DDR3_DQU5/DDR2_DQ9
AA26
AF3
AF14
AB26
AD1
AB25
AB24
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
FRC_DDR3_DQU7/DDR2_DQM1
GPIO3/TCON6/LCK/GCLK2
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
B0M/RLV6N/GREEN[6]
FRC_DDR3_BA1/DDR2_ODT
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
AD13
AC24
AE14
AD26
AE13
AD25
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD24
AF4
AD4
AA14
FRC_GPIO1
AC15
AE25
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
FRC_DDR3_RESETB/DDR2_A3
AF26
AE24
AF8
AF24
AD9
AF23
AD22
AE22
C1M/LLV1N/BLUE[2]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
AF22
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
URSA_DEBUG
P3904
Y24
AE19
AE6
AD21
AF11
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
FRC_DDR3_DQL1/DDR2_DQ0
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
D3P/TCON3
D3M/TCON2
AE10
AF18
AF7
AB22
AD10
AD11
AB23
AE7
AC23
AF10
AC22
AD8
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
FRC_I2CM_DA
FRC_TESTPIN
FRC_DDR3_DQU5/DDR2_DQ9
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
FRC_PWM1
2
FRC_SDA
3
AE24
4
AF24
AF23
AD22
AE22
AF22
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
FRC_GPIO1
AB23
AC23
AC22
AA14
AC15
FRC_GPIO3
Y16
FRC_GPIO8
AC16
AC14
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
FRC_TESTPIN
AA11
AC16
AC14
FRC_GPIO10
AA16
FRC_REXT
FRC_I2CM_DA
AA15
FRC_I2CM_CK
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM1
AE25
AF26
AF25
AB16
AA14
FRC_I2CS_CK
FRC_PWM0
FRC_SCL
AE23
AE26
AB22
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
Y10
AB14
AD24
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
FRC_DDR3_DQU7/DDR2_DQM1
AC15
FRC_I2CM_CK
FRC_I2CS_DA
AA11
1
AC24
AD26
AD25
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_GPIO0/UART_RX
FRC_GPIO10
FRC_REXT
AB26
AB25
AB24
AD19
FRC_DDR3_DQL7/DDR2_DQ5
AD18
AA26
AA25
AA24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE21
AE18
12505WS-03A00
AC25
C4M/LLV5N
AE11
AF21
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF25
Y16
FRC_GPIO8
AC16
Y19
W24
Y26
Y25
AD23
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_GPIO3
AA16
V26
V25
V24
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AB16
AA15
U26
U25
U24
B4M/TCON8/BLUE[6]
AE4
AD23
AE23
AE26
AD7
FRC_GPIO0/UART_RX
AC14
W25
AC26
BCKP/TCON13/GREEN[1]
AA25
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
AB15
FRC_PWM0
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
BCKM/TCON12/GREEN[0]
AA24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_I2CS_CK
AB15
W26
FRC_DDR3_A0/DDR2_NC
AC25
AF6
Y10
FRC_PWM1
AD2
AD19
FRC_DDR3_DQL7/DDR2_DQ5
AD18
FRC_I2CM_CK
FRC_I2CS_DA
AB14
AF2
AE15
AD16
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
FRC_GPIO10
FRC_I2CM_DA
AA11
AD3
AF15
W24
Y26
Y25
C4M/LLV5N
AE11
Y16
FRC_GPIO8
AC16
V26
V25
V24
AD5
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_GPIO3
AC14
AF1
AE3
AD14
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AB16
FRC_GPIO0/UART_RX
AA14
AE1
AF16
U26
U25
U24
B4M/TCON8/BLUE[6]
AE4
AD23
AE23
AE26
AD7
FRC_DDR3_DQU6/DDR2_DQ10
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
AD24
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
FRC_DDR3_DQU7/DDR2_DQM1
AC15
S7MR_RM
IC101-*10
LGE107RC-R [S7MR RM]
W26
W25
FRC_DDR3_A12/DDR2_A8
AD13
AB24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
Y10
FRC_PWM0
AF3
AF14
AF6
FRC_DDR3_DQL0/DDR2_DQ6
AE10
AF18
FRC_I2CM_CK
FRC_I2CS_DA
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
AA26
AA25
AA24
AD19
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL7/DDR2_DQ5
AD18
FRC_GPIO10
FRC_I2CM_DA
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
AC26
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE21
AE18
ACKM/RLV3N/RED[2]
BCKP/TCON13/GREEN[1]
C4M/LLV5N
AE11
AF21
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AE24
AF24
AF23
AD22
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
BCKM/TCON12/GREEN[0]
AD5
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
AF25
AE22
FRC_DDR3_A0/DDR2_NC
AC25
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_I2CS_CK
AB14
AF1
AE3
AD14
B4M/TCON8/BLUE[6]
AE4
AD23
AE23
AE26
Y16
FRC_GPIO8
AC16
AE1
AF16
U26
U25
U24
FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA1/DDR2_ODT
FRC_GPIO3
AA11
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
AB16
FRC_GPIO0/UART_RX
AA14
AC14
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
W26
W25
AC26
AD7
AB15
FRC_PWM0
ACKM/RLV3N/RED[2]
BCKP/TCON13/GREEN[1]
AA25
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
FRC_DDR3_DQU7/DDR2_DQM1
AC15
FRC_I2CS_CK
AB15
ACKP/RLV3P/RED[3]
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
BCKM/TCON12/GREEN[0]
AA24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
S7MR_DivX_MS10
IC101-*9
LGE107DC-R [S7MR DIVX/MS10]
FRC_DDR3_A0/DDR2_NC
AC25
AF6
Y10
NC_24
Y24
AD19
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL7/DDR2_DQ5
AD18
FRC_I2CM_CK
FRC_I2CS_DA
AB14
AD2
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
FRC_GPIO10
FRC_I2CM_DA
AA11
AF2
AE15
AD16
C4M/LLV5N
AE11
AF21
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF25
Y16
FRC_GPIO8
FRC_GPIO9/UART_TX
AE8
AD3
AF15
W24
Y26
Y25
AD5
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_GPIO3
AC16
V26
V25
V24
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AB16
FRC_GPIO0/UART_RX
AC14
AF1
AE3
AD14
B4M/TCON8/BLUE[6]
AE4
AD23
AE23
AE26
AD7
FRC_DDR3_DQU6/DDR2_DQ10
AA14
AE1
AF16
U26
U25
U24
AC26
BCKP/TCON13/GREEN[1]
AA25
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
FRC_DDR3_DQU7/DDR2_DQM1
AC15
W26
W25
FRC_DDR3_A12/DDR2_A8
BCKM/TCON12/GREEN[0]
AA24
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
S7MR_DivX
IC101-*8
LGE107DC-R-1 [S7MR DIVX]
FRC_DDR3_A0/DDR2_NC
AC25
AF6
FRC_DDR3_DQL1/DDR2_DQ0
NC_17
NC_25
AB14
AC24
AE14
AD26
AE13
FRC_DDR3_A1/DDR2_A6
ACKM/RLV3N/RED[2]
FRC_DDR3_A2/DDR2_A7
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
AF1
AE3
AD14
V26
AD3
V25
AF15
V24
AF2
W24
AE15
Y26
AD2
Y25
AD16
Y24
AD15
AE16
AD23
AF4
AE23
AD4
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
AE26
AE25
AE24
FRC_DDR3_RESETB/DDR2_A3
AD22
C1M/LLV1N/BLUE[2]
AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
FRC_GPIO1
C3M/LLV4N
C4P/LLV5P
AB14
AB15
FRC_PWM0
AB14
FRC_PWM1
AF7
AD10
AB23
AE7
AC23
AF10
AC22
AD8
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
FRC_DDR3_DQU5/DDR2_DQ9
AC24
AE14
AE13
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
AD24
FRC_GPIO1
FRC_VSYNC_LIKE
FRC_TESTPIN
FRC_I2CS_CK
AD23
AF4
AE23
AD4
AE25
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
AE26
AF2
W24
AE15
Y26
AD2
Y25
AD16
Y24
AD15
AE16
AE24
AF24
FRC_DDR3_RESETB/DDR2_A3
AD22
C1M/LLV1N/BLUE[2]
AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
FRC_SPI_CK
C3M/LLV4N
C4P/LLV5P
AF7
AD10
AB23
AE7
AC23
AF10
AC22
AD8
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
FRC_DDR3_DQU5/DDR2_DQ9
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
AC24
AE14
AE13
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
B2P/RLV8P/GREEN[3]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
AD24
FRC_GPIO1
AD23
AF4
AE23
AD4
AE25
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
AE26
FRC_VSYNC_LIKE
FRC_TESTPIN
FRC_DDR3_RESETB/DDR2_A3
AE24
AF24
AD22
C1M/LLV1N/BLUE[2]
AF8
AD9
AF23
AE22
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF5
AF19
AE12
AD18
AE18
AF18
C3M/LLV4N
C4P/LLV5P
AF7
AD10
AB23
AE7
AC23
AF10
AC22
AD8
FRC_SPI_CK
DCKM/TCON4
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
FRC_DDR3_DQU5/DDR2_DQ9
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AD24
AE23
AE26
AE25
AF26
AMP_SDA
AMP_SCL
AF25
C111
2.2uF
AE24
AF24
AF23
AD22
AE22
AF22
PWM2
I2C_SDA
I2C_SCL
R155
0
OPT
LD650 Scan
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
NEC_SDA
NEC_SCL
SCAN_BLK2
R158
AF18
FRC_GPIO1
R159
AB23
AC23
100
OPT
100
AC22
AB16
FRC_SPI_CZ
AA14
AA14
SCAN_BLK1/OPC_OUT
FRC_PWM1
FRC_PWM0
OPT
AC15
FRC_SPI1_CK
Y16
FRC_GPIO8
AC16
AC14
FRC_SPI_DO
AE8
FRC_DDR3_NC/DDR2_DQM0
AA16
Y11
AA15
Y19
AC16
AC14
FRC_SPI1_DI
AA16
FRC_VSYNC_LIKE
FRC_TESTPIN
AA11
FRC_I2CS_CK
FRC_SPI_CK
AA15
FRC_SPI_DI
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM1
PWM0
100
PWM_DIM
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
Y10
FRC_PWM0
AC24
AD26
AD25
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
AC15
FRC_SPI_DI
FRC_I2CS_DA
10K
R157
AB26
AB25
AB24
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
AE10
AD11
R156
A_DIM
AA25
AA24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
AC25
AA26
C4M/LLV5N
AE11
AE19
AD21
AE21
AF21
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
FRC_SPI1_DI
AB15
AB14
Y24
AD23
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE2
AF26
AF25
Y16
FRC_GPIO8
FRC_SPI_DO
FRC_DDR3_NC/DDR2_DQM0
Y11
Y19
W24
Y26
Y25
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_SPI1_CK
AE8
AA16
V26
V25
V24
B4M/TCON8/BLUE[6]
AE4
AB16
FRC_SPI_CZ
AA15
U26
U25
U24
A4M/RLV5N/GREEN[8]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
B4P/TCON9/BLUE[7]
AD7
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AC16
AA11
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
W25
AC26
AD1
AD26
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
AA14
AC14
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
AD13
AD25
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
AC15
FRC_I2CS_CK
FRC_PWM1
AB26
AB25
AB24
AF6
DCKM/TCON4
Y10
FRC_PWM0
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
BCKP/TCON13/GREEN[1]
AF3
AF14
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
AE10
AD11
FRC_SPI_DI
FRC_I2CS_DA
ACKM/RLV3N/RED[2]
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
BCKM/TCON12/GREEN[0]
AA25
AA24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
AF18
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
AC25
C4M/LLV5N
AE11
AE19
AD21
AE21
AF21
CCKP/LLV3P
CCKM/LLV3N
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF23
AE22
ACKP/RLV3P/RED[3]
AA26
AD5
C0P/LLV0P/BLUE[5]
AE2
AF26
AF25
FRC_SPI1_DI
AB15
AB14
AD3
AF15
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
Y16
FRC_GPIO8
FRC_SPI_DO
FRC_DDR3_NC/DDR2_DQM0
Y11
Y19
AF1
AE3
AD14
V26
V25
V24
B4M/TCON8/BLUE[6]
AE4
FRC_SPI1_CK
AE8
AA16
AA15
U26
U25
U24
W26
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A12/DDR2_A8
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
AB16
FRC_SPI_CZ
AC16
AA11
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
DIMMING
IC101-*14
LGE107RC-RP [S7M+ RM]
AE1
AF16
A4M/RLV5N/GREEN[8]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
B4P/TCON9/BLUE[7]
AD7
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
Y10
FRC_PWM1
AD1
AD26
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
AA14
AC14
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
AD13
AD25
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
AC15
FRC_SPI_DI
FRC_PWM0
AB26
AB25
AB24
AF6
DCKM/TCON4
AE10
AD11
FRC_SPI1_DI
FRC_SPI_CK
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
+3.3V_Normal
S7M-PLUS_RM
W26
W25
AC26
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
Y16
FRC_GPIO8
FRC_SPI_DO
ACKM/RLV3N/RED[2]
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
BCKP/TCON13/GREEN[1]
AF3
AF14
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
AF18
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
BCKM/TCON12/GREEN[0]
AA25
AA24
C4M/LLV5N
AE11
AE19
AD21
AE21
AF21
CCKP/LLV3P
CCKM/LLV3N
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF23
AE22
ACKP/RLV3P/RED[3]
AC25
AD5
C0P/LLV0P/BLUE[5]
AE2
AF26
AF25
AF24
FRC_DDR3_A0/DDR2_NC
AA26
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_SPI1_CK
Y11
FRC_VSYNC_LIKE
U26
U25
U24
B4M/TCON8/BLUE[6]
AE4
AB16
FRC_DDR3_NC/DDR2_DQM0
AE1
AF16
FRC_DDR3_A12/DDR2_A8
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B4P/TCON9/BLUE[7]
AD7
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
FRC_SPI_CZ
Y19
W26
W25
A4M/RLV5N/GREEN[8]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
AD24
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
AE8
I2C
S7M-PLUS_DivX
IC101-*13
LGE107DC-RP-1 [S7M+ DIVX]
FRC_DDR3_A3/DDR2_A1
AD13
AD25
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_I2CS_DA
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
AF2
AE15
AD16
AD19
DCKP/TCON5
AD12
AF21
AD20
AE20
AC26
AF6
DCKM/TCON4
FRC_TESTPIN
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
AD3
AF15
W24
Y26
Y25
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
Y10
BCKP/TCON13/GREEN[1]
AF3
AF14
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
AE10
I2C_SDA
VSS
V26
V25
V24
C4M/LLV5N
AE11
NC_20
NC_11
AA11
BCKM/TCON12/GREEN[0]
AA25
AA24
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AE5
E2
R129
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AF25
Y16
NC_15
AC16
AA15
AF1
AE3
AD14
AD5
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
NC_30
AC14
AE1
AF16
U26
U25
U24
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AB16
NC_26
AC15
ACKP/RLV3P/RED[3]
AC25
C4M/LLV5N
AE11
WP
AF11
SDA
CCKP/LLV3P
CCKM/LLV3N
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
AE9
22
G21
S7MR_MS10
W26
W25
B4M/TCON8/BLUE[6]
AE4
AD23
AE23
AE26
AD7
NC_39
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
AD24
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B2P/RLV8P/GREEN[3]
AD25
NC_42
NC_38
NC_41
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
AD13
AB24
AF6
AE10
AE18
AF18
AA26
AA25
AA24
AD19
NC_59
AD18
FRC_DDR3_A0/DDR2_NC
AA26
AD5
C0P/LLV0P/BLUE[5]
VCC
4.7K
R128
G22
AC26
BCKP/TCON13/GREEN[1]
NC_58
NC_69
IC101-*12
LGE107C-RP [S7M+ MS10]
AE1
AF16
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AE2
R127
G23
FRC_DDR3_A12/DDR2_A8
BCKM/TCON12/GREEN[0]
RLV5N/RED[2]
AE11
S7M-PLUS_MS10
W26
W25
B4M/TCON8/BLUE[6]
AE4
AF9
SCL
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
AC25
AD5
NC_67
NC_35
FRC_DDR3_A12/DDR2_A8
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
FRC_DDR3_RESETB/DDR2_A3
WP
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
AE15
W24
Y26
Y25
NC_51
NC_36
AB15
A4M/RLV5N/GREEN[8]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
AD13
AD5
NC
PWM2
IC101-*7
LGE107C-R [S7MR MS10]
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A4/DDR2_CASZ
AF2
V24
LVB4N/LLV0N/GREEN[0]
AE4
AD23
AE23
AE26
NC_24
ACKP/RLV3P/RED[3]
AF3
AF14
AD12
4
NC_32
NC_44
NC_17
NC_25
AB14
BCKM/TCON12/GREEN[0]
C105
0.1uF
AD6
VSS
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
Y10
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_DQSUB/DDR2_DQSB1
A2
LVB0P/RLV6P/RED[1]
NC_66
NC_76
AD24
AC26
IC104
M24M01-HRMN6TP
K22
FRC_DDR3_A12/DDR2_A8
NC_60
AD25
NC_20
NC_11
AA11
BCKP/TCON13/GREEN[1]
A1
LVA4P/LLV8P
LVA4N/LLV8N
Y16
NC_15
AC16
AC14
FRC_DDR3_A12/DDR2_A8
8
NC_47
NC_46
NC_30
AE1
AF16
AD15
1
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
AB16
NC_26
NC_24
AE16
A0
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
NC_65
NC_62
NC_33
AD13
AD7
IC101-*11
LGE107C-RP-1 [S7M+ BASIC]
R113
4.7K
AD1
AB26
AB25
AB24
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD
AB15
NC_25
NC_45
NC_34
NC_77
AA26
AA25
AA24
NC_42
NC_38
NC_41
NC_17
AB15
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
AC26
AF6
Y10
AB14
LVACLKN/LLV6N/BLUE[2]
LVBCLKP/LLV0P/GREEN[5]
AD19
NC_59
AD18
NC_20
NC_11
AA11
LVACLKP/LLV6P/BLUE[3]
NC_78
NC_64
NC_50
LVBCLKN/LLV0N/GREEN[4]
NC_58
NC_69
S7M-PLUS_BASIC
HDCP_EEPROM_CATALYST_OLD
3D SG
FRC_RESET
M20
SDA
+3.3V_Normal
EEPROM_1MBIT_ST
PWM1
IC101-*6
LGE107C-R-1 [S7MR BASIC]
NC_48
AC25
RLV5N/RED[2]
AE11
Y16
NC_15
AC16
Y19
AD3
AF15
W24
Y26
Y25
AD5
NC_67
NC_35
NC_30
AA16
V26
V25
V24
NC_51
NC_36
AB16
NC_26
AA15
AF1
AE3
AD14
LVB4N/LLV0N/GREEN[0]
AE4
AD23
AE23
AE26
AD7
NC_39
LVB0P/RLV6P/RED[1]
NC_66
NC_76
AD13
AB24
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD
AC15
AC14
AE1
AF16
U26
U25
U24
NC_63
AA26
AA25
AA24
NC_42
NC_38
NC_41
Y10
NC_25
NC_45
NC_34
NC_77
W26
W25
AC26
AF6
AE10
AF18
NC_20
NC_11
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
LVBCLKP/LLV0P/GREEN[5]
AD19
NC_59
AD18
AE18
LVACLKN/LLV6N/BLUE[2]
LVBCLKN/LLV0N/GREEN[4]
NC_58
NC_69
AE21
AF21
LVACLKP/LLV6P/BLUE[3]
NC_78
NC_64
NC_50
S7MR-PLUS
Addr:10101--
L20
SCL
HDCP_EEPROM_ON_SEMI_NEW
HDCP EEPROM
PWM0
K23
S7MR_BASIC
IC101-*5
LGE101RC-R [S7R RM]
NC_48
AC25
RLV5N/RED[2]
AE11
NC_17
AB14
V26
V25
V24
AD5
NC_67
NC_35
Y16
NC_15
AC16
AF1
AE3
AD14
NC_51
NC_36
NC_30
AC14
AE1
AF16
U26
U25
U24
LVB4N/LLV0N/GREEN[0]
AE4
AD23
AE23
AE26
AB16
NC_26
AA14
W26
W25
NC_63
AD13
AD7
AB15
NC_24
AF3
AF14
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD
AC15
NC_17
NC_25
NC_45
NC_34
NC_77
AA26
AA25
NC_42
NC_38
NC_41
Y10
WP
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
AC26
AF6
NC_53
AE10
AF18
NC_20
NC_11
LVACLKN/LLV6N/BLUE[2]
LVBCLKP/LLV0P/GREEN[5]
AD19
NC_74
NC_59
AD18
AE18
LVACLKP/LLV6P/BLUE[3]
NC_78
NC_64
NC_50
LVBCLKN/LLV0N/GREEN[4]
AA24
NC_58
NC_69
AE21
AF21
IC101-*4
LGE101DC-R [S7R DIVX/MS10]
NC_48
AC25
RLV5N/RED[2]
AE11
Y16
NC_15
VCC
AF2
AE15
AD16
AD5
RLV3P/RED[7]
RLV3N/RED[6]
NC_30
AE8
AD3
AF15
W24
Y26
Y25
LVB4N/LLV0N/GREEN[0]
NC_67
NC_35
AB16
NC_26
VCC
V26
V25
V24
NC_51
NC_36
AF25
AE22
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AF4
AD4
AD7
NC_39
LVB1N/RLV7N/GREEN[8]
LVB2N/RLV8N/GREEN[6]
AE4
AD23
AE23
AE26
TCON14/SACN_BLK
TCON21/CS10/VGH_ODD
NC_32
NC_44
AD24
NC_42
NC_38
NC_41
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
NC_60
AD25
AF6
NC_53
AE10
AD1
LVB0P/RLV6P/RED[1]
NC_66
NC_76
AD13
AD19
NC_74
NC_59
IC104-*1
AT24C1024BN-SH-T
AB26
AB25
AB24
RLV5N/RED[2]
AE6
AD6
AF3
AF14
NC_58
NC_69
AF11
AA26
AA25
AD5
RLV3P/RED[7]
RLV3N/RED[6]
AE11
AF1
AE3
AD14
AC26
LVBCLKN/LLV0N/GREEN[4]
AA24
LVB4N/LLV0N/GREEN[0]
NC_67
NC_35
AF8
AD9
AE1
AF16
U26
U25
U24
NC_63
LVBCLKP/LLV0P/GREEN[5]
AC25
NC_51
NC_36
AE2
W26
W25
NC_63
LVB4P/LLV0P/GREEN[1]
5
3D SG
M_REMOTE_TX
S7R_DivX_MS10
S7R_RM
IC101-*2
LGE101C-R [S7R MS10]
LVACLKP/LLV6P/BLUE[3]
NC_78
NC_64
NC_50
NC_60
AF4
AD4
4
M_REMOTE_RX
ET_RXER
S7MR
NC_48
AE4
AD5
GND
PCM_A5
MPIF_D0
S7R
NC_16
AD13
SDA
GPIO42
K20
NC_17
AF3
5
GPIO41
PCM_A4
L23
MPIF_D3
AF14
4
GPIO40
PCM_A3
NC_18
AC26
VSS
PCM_A2
MPIF_D2
LVBCLKP/LLV0P/GREEN[5]
6
GPIO39
MPIF_D1
LVBCLKN/LLV0N/GREEN[4]
3
PCM_A1
NC_19
NC_63
6
B5
M_RFModule_RESET
3D SG
I/O1
AD15
3
A5
22
/RST-PHY
AE16
SCL
22
R139
DSUB_DET
AD2
A2
R138
PCM_5V_CTL
AD3
A2
N22
MODEL_OPT_3
I/O3
AF2
7
22
SC_RE1
I/O4
AE15
2
SIDEAV_DET
NC_20
AD16
NC_2
GPIO38
M22
SC_RE2
TO SCART1
NC_21
AF15
7
GPIO37/UART3_TX
TS1_D1
IC101-*1
LGE101C-R-1 [S7R BASIC]
2
GPIO36/UART3_RX
PCM_A0
DDCA_CK/UART0_RX
VCC_2
P21
K21
NC_23
AF1
A1
I2C_SCL
N23
22
R137
RGB_DDC_SDA
AE3
8
PCM_D6
M23
22
R136
I2C_SDA
NC_25
NC_24
22
R135
S7_NEC_RXD
5V_DET_HDMI_4
L21
PCM_D5
TS0_D4
R134
S7_NEC_TXD
AE1
1
/F_RB
AA19
22
AD14
NC_1
AD17
I/O8
AF16
8
AB19
/PF_WP
NC_26
S7R_MS10
1
AB21
PF_ALE
NC_27
S7R_BASIC
NC
22
AR103
/PF_WE
NC_28
R140
1K
NC_2
48
1
5V_DET_HDMI_2
L22
AA9
/PF_CE0
/PF_OE
NC_1
NC_1
GPIO151/TCON8
5V_DET_HDMI_1
M21
PCM_RESET
C109
0.1uF
C108
0.1uF
OPT
AR104
EAN61508001
IC102-*3
TC58NVG0S3ETA0BBBH
GPIO149/TCON6
PCM_D4
AA20
/PCM_CD
NAND_FLASH_1G_TOSHIBA
PCM_D3
AA17
/PCM_WAIT
NAND_FLASH_1G_SS
GPIO147/TCON4
PCM_REG_N
/PCM_CE
/PCM_IRQA
R133
10K
GPIO145/TCON2
PCM_D2
W22
/PCM_IOWR
R132
10K
GPIO143/TCON0
PCM_D1
PCM_D7
/PCM_REG
NC_17
N21
PCM_D0
U21
PCM_A[1]
AB17
PWM0
NC_18
T22
PCM_A[10]
PWM1
C112
100pF
50V
T21
PCM_D[2]
AUD_SCK
AUD_MASTER_CLK_0
56
U22
PCM_D[1]
AUD_LRCH
PCM_A[3]
I/O3
PCM_D[0]
PCM_A[0]
+3.3V_Normal
C103
0.1uF
VSS_2
35
14
I/O6
I/O5
42
7
PCM_A[7]
R145
2.2K
NC_8
OPT
R108 1K
NC_7
43
AR101
I/O7
R144
2.2K
/PF_CE0
6
<T3 CHIP Config(AUD_LRCH)>
NC_26
R143
3.3K
E
44
R142
3.3K
R
/PF_OE
45
5
PCM_D[0-7]
R141
1K
RB
4
IC101
PCM_A[0-7]
NC_27
R123
OPT1K
R125
OPT 1K
NC_6
46
R126
1K
1K
3.9K
NC_5
R109
R107
/F_RB
NC_4
3
NC_28
R124
1K
NC_3
48
NAND_FLASH_1G_NUMONYX
EAN60762401
47
2
1
R117
1K
NC_2
R115
1K
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :
8 bit
NC_29
R116
1K OPT
R118
1K OPT
R121
1K
NC_1
AB14
AB15
FRC_PWM0
AB14
FRC_PWM1
GP3_Saturn7M
FLASH/EEPROM/GPIO
Ver. 0.1
1
LGE Internal Use Only
MODEL_OPT_2
F7
NON_DVB_T2
MODEL_OPT_3
B6
HD
FHD
MODEL_OPT_5
D18
Ready
default
MODEL_OPT_3
MODEL_OPT_4
0
MODEL_OPT_5
0
MODEL_OPT_6
MODEL_OPT_6
0.1uF
OPT
C4024
C4011
0.1uF
0.1uF
C4006
OPT
C4013
0.1uF
0.1uF
C299
0.1uF
0.1uF
C292
C283
0.1uF
C280
10uF
0.1uF
C276
C277
10uF
OPT
S7M-PLUS_DivX_MS10
IC101
[S7M+ DIVX/MS10]
-->In case of GP2, This port was used for GIP/NON_GIP
LGE107DC-RP
+1.26V_VDDC
Normal Power 3.3V
--> MODEL_OPT_5, MODEL_OPT_6
: Only 3D_SG GPIO OUTPUT CONTROL
+3.3V_Normal
VDD33
H11
H12
VDD33_T/VDDP/U3_VD33_2:47mA
L204
BLM18PG121SN1D
E6
HPD1
C1
CK-_HDMI2
D1
D0+_HDMI2
D2
D0-_HDMI2
D1+_HDMI2
E2
E3
D1-_HDMI2
F3
D2+_HDMI2
E1
D2-_HDMI2
D4
DDC_SDA_2
E4
DDC_SCL_2
D5
HPD2
W1
TP202
0.1uF
0.1uF
C4020
C4031
0.1uF
C4014
OPT
0.1uF
0.1uF
OPT
C4025
0.1uF
C4012
OPT
C4007
C4001 10uF
C293 10uF
47
C284 10uF
0.1uF R4003
OPT
J15
J16
L18
AVDD_MEMPLL:24mA
AU33:31mA
FRC_AVDD:60mA
+2.5V_Normal
AU33
IM
A_RX1N
+3.3V_Normal
L227
BLM18PG121SN1D
Y2
A_RX2P
SSIF/SIFP
A_RX2N
SSIF/SIFM
DDCDA_DA/GPIO24
L215
BLM18PG121SN1D
C4064
0.1uF
U3
DDCDA_CK/GPIO23
QP
HOTPLUGA/GPIO19
QM
TP203
V3
Close to MSTAR
R4019
1K
TP204
R4020
10K
Y5
B_RXCP
IFAGC
B_RXCN
RF_TAGC
B_RX0P
IF_AGC_MAIN
Y4
TP205
U1
B_RX0N
TGPIO0/UPGAIN
B_RX1P
TGPIO1/DNGAIN
B_RX1N
TGPIO2/I2C_CLK
B_RX2P
TGPIO3/I2C_SDA
B_RX2N
AMP_SCL
AMP_SDA
22
FULL_NIM R291
FULL_NIM R292
U2
XTALIN
DDCDB_CK/GPIO25
XTALOUT
VDD33
C4065
0.022uF
16V
TU/DEMOD_I2C
DEMOD_SCL
22
FRC_LPLL:13mA
FRC_LPLL
L206
BLM18PG121SN1D
DEMOD_SDA
R3
T3
OPT
TU_SDA
C261
T1
HOTPLUGB/GPIO20
X201
24MHz
27pF
+3.3V_Normal
C262
FRC
M18
M19
N18
N19
N20
P18
P19
FRC_VDD33_DDR:50mA
VDD33
FRC_VDD33_DDR
FRC_MPLL:4mA
FRC
L222
BLM18PG121SN1D
P20
FRCVDDC
C4045
1uF
L7
AA4
DDC_SCL_4
AC3
HPD4
C_RX1P
DM_P0
C_RX1N
DP_P0
DM_P1
DDCDC_DA/GPIO28
DP_P1
B3
A1
B2
C2
C3
B4
C4
E5
D6
CEC_REMOTE_S7
D_RXCP
I2S_IN_SD/GPIO176
D_RXCN
I2S_IN_WS/GPIO174
D_RX0P
R228
DSUB_R+
DSUB_G+
DSUB_B+
C204
0.047uF
K1
R229
68
C205
0.047uF
L3
33
C206
0.047uF
K3
R231
68
C207
0.047uF
K2
R232
33
C208
0.047uF
J3
68
C209
C210
10K
10K
R4023
R4026
33
R230
R233
SCART1_RGB/COMP1
G6
0.047uF
1000pF
J2
J1
D_RX0N
I2S_OUT_BCK/GPIO181
D_RX1P
I2S_OUT_MCK/GPIO179
D_RX1N
I2S_OUT_SD/GPIO182
D_RX2P
I2S_OUT_SD1/GPIO183
D_RX2N
I2S_OUT_SD2/GPIO184
DDCDD_DA/GPIO30
I2S_OUT_SD3/GPIO185
DDCDD_CK/GPIO29
I2S_OUT_WS/GPIO180
F13
F15
Y15
0.1uF
C4017
0.1uF
C4008
0.1uF
C4002
VDD33_DVI
Normal 2.5V
AUD_SCK
E20
AUD_MASTER_CLK_0
D19
AUD_LRCH
F18
LED_DRIVER_D/L_SCL
E18
MODEL_OPT_4
D18
MODEL_OPT_5
E19
+2.5V_Normal
C236
HSYNC0
LINE_IN_1L
VSYNC0
LINE_IN_1R
RIN0P
LINE_IN_2L
RIN0M
LINE_IN_2R
GIN0P
LINE_IN_3L
GIN0M
LINE_IN_3R
BIN0P
LINE_IN_4L
BIN0M
LINE_IN_4R
LINE_IN_5L
P3
C237
P1
C238
P2
C239
2.2uF
2.2uF
2.2uF
SC1/COMP1_R_IN
C4059
2.2uF
2.2uF
AV_R_IN
P5
C4060
2.2uF
R6
C242
P4
C243
2.2uF
U5
C244
2.2uF
U6
C245
C246
V6
C247
SIDEAV_L_IN
SIDEAV_R_IN
2.2uF
T6
V5
AV_L_IN
COMP2_L_IN
COMP2_R_IN
+2.5V_Normal
P8
AU33
AU25:10mA
2.2uF OPT
2.2uF OPT
VDD33
AVDD25_PGA:13mA
W20
VDD_RSDS
TU_CVBS
SC1_CVBS_IN
SIDEAV_CVBS_IN
Delete CHB_CVBS_IN
AV_CVBS_IN2
C203
1000pF
OPT
HP_OUT_1L
R244
33
C225
0.047uF
N4
R245
33
C226
0.047uF
N6
R246
AV_CVBS_IN
0.047uF
33
C227
0.047uF
L4
R4016
33
C4057 0.047uF
L5
R248
33
C229
L6
R249
33
C230
0.047uF
0.047uF
M4
R250
33
C231
0.047uF
M5
R251
33
C232
0.047uF
K7
DTV/MNT_VOUT
R252
68
C233
0.047uF
R2 L205
ET_RXD0
CVBS3P
ET_TXD0
CVBS4P
D21
ET_RXD1
HEAD_PHONE
F21
E23
ET_REFCLK
ET_TX_EN
CVBS_OUT2
ET_MDC
ET_MDIO
HEAD_PHONE
ET_REF_CLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
D22
F22
D23
F23
ET_CRS
F8
TP206
G8
AVDD_DDR_FRC
AVDD2P5_ADC_2
GND_34
AVDD25_REF
GND_35
GND_37
100
IR
GND_40
PVDD_1
GND_41
PVDD_2
GND_42
GND_43
GND_46
GND_49
AVDD_DVI_1
GND_50
AVDD_DVI_2
GND_51
AVDD3P3_CVBS
GND_52
AVDD_DMPLL
GND_53
GND_55
AVDD_AU33
GND_56
AVDD_EAR33
GND_57
GND_59
GND_61
VDDP_1
GND_62
VDDP_2
GND_63
VDDP_3
GND_64
GND_66
FRC_VD33_2_1
GND_67
FRC_VD33_2_2
GND_68
GND_69
FRC_AVDD_RSDS_1
GND_70
FRC_AVDD_RSDS_2
GND_71
FRC_AVDD_RSDS_3
GND_72
GND_73
FRC_AVDD
GND_74
FRC_AVDD_LPLL
GND_75
FRC_AVDD_MPLL
GND_76
GND_77
10K
R4017
OPT
MIU1VDDC
L226
BLM18SG700TN1D
+3.3V_Normal
FRC_RESET
C4066 10uF
10K
GND_78
GND_81
W14
AVDD_MEMPLL
GND_82
FRC_AVDD_MEMPLL
GND_83
C285
0.1uF
C4038
0.1uF
0.1uF
C4036
C4032
0.1uF
C4028
10uF
C4022
D15
D16
AVDD_DDR0_D_1
GND_86
AVDD_DDR0_D_2
GND_87
AVDD_DDR0_D_3
GND_88
AVDD_DDR0_D_4
GND_89
AVDD_DDR0_C
GND_90
GND_91
F16
F17
MVREF
GND_85
G17
H17
AVDD_DDR1_D_1
GND_92
AVDD_DDR1_D_2
GND_93
AVDD_DDR1_D_3
GND_94
AVDD_DDR1_D_4
GND_95
AVDD_DDR1_C
GND_96
AVDD_DDR_FRC
GND_98
AB11
AB12
AC11
AC12
FRC_AVDD_DDR_D_1
GND_99
FRC_AVDD_DDR_D_2
GND_100
FRC_AVDD_DDR_D_3
GND_101
FRC_AVDD_DDR_D_4
GND_102
FRC_AVDD_DDR_C
GND_103
+1.26V_VDDC
0.1uF
22
GND_60
GND_106
C4063 10uF
U3_RESET
GND_47
GND_105
SOC_RESET
FRC
R205
GND_44
+1.26V_VDDC
FRCVDDC
FRC
L225
BLM18SG700TN1D
MVREF
GND_107
G15
MVREF
GND_109
GND_110
Y7
FRC
GND_108
Y8
NC_1
GND_FU
NC_2
PGA_VCOM
H10
H18
H19
J10
J17
J18
J19
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
L9
L10
L11
L12
L13
L14
L15
L16
L17
M9
M10
M11
M12
M13
M14
M15
M16
M17
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
R18
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
U10
U11
U12
U13
U14
U15
U16
U17
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
W7
W8
W9
W10
W11
W12
W13
W16
W17
W18
Y13
Y18
AA13
AB13
AC13
D17
H23
AF13
J9
L223
U9 BLM18SG121TN1D
FRC
C4056
A4
Y17
GND_38
RSDS Power OPT
K8
R4018
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GND_33
R19
G16
L228
BLM18SG700TN1D
OPT
R298
FRC
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
GND_32
AVDD2P5_ADC_1
GND_104
10K
RESET
TP211
GND_30
Y14
AA12
R4006
IRINT
TESTPIN
C4018
AVDD_DDR0
AVDD_DDR_FRC:55mA
MIU0VDDC
AVLINK
10uF
AVDD_DDR0
Close to MSTAR
AV_CVBS_IN2
GND_29
DVDD_NODIE
GND_97
ET_RXD1
ET_TXD1
ET_TXD1
CVBS_OUT1
VCOM0
HP_ROUT
ET_RXD0
ET_TXD0
E22
+1.5V_FRC_DDR
HP_LOUT
5.6uH
E21
CVBS2P
N5
H/P OUT
HEAD_PHONE
HEAD_PHONE
CVBS1P
M6
M7
CM2012F5R6KT
5.6uH
R1 L203
CVBS0P
CVBS6P
T20
E17
CM2012F5R6KT
CVBS7P
TP210
P6
HP_OUT_1R
CVBS5P
U18
E16
0.1uF
C248
AVDD1P2
H9
C4058
SOGIN2
GND_26
GND_28
W19
E15
OPT
OPT
OPT
0.1uF
VRP
OPT
C4061 10uF
M3
GND_25
GND_80
AVDD_DDR0
C241
1000pF
VAG
BIN2M
OPT
1/16W
1%
C224
BIN2P
C263
10uF
1/16W
1%
L1
C256
0.1uF
0.1uF
0.047uF
R7
C253
1uF
R4014
1K
C223
C249
4.7uF
0.1uF
68
GIN2M
C4042
R242
L2
P7
VRM
0.1uF
R4015
1K
0.047uF
0.047uF
GIN2P
GND_24
VDD33
AVDD_DDR0
0.1uF
C240 FRC
C221
C222
M1
R241
68
33
RIN2M
C4009
M2
0.1uF
0.047uF
OPT
C4003
C220
L202
BLM18SG121TN1D
AUCOM
0.1uF
33
FRC_VDDC_8
GND_84
C4010 FRC
R239
GND_23
T4
C4004 OPT
N2
OPT
AVDD_DDR1:55mA
0.1uF
0.047uF
FRC_VDDC_7
GND_79
AVDD_DDR0
C4062
C219
GND_22
U19
U20
0.1uF
MICIN
T5 C234 OPT 2.2uF
R5 C235
2.2uF
0.1uF
68
GND_21
FRC_VDDC_6
V20
FRC_VDD33_DDR
AVDD_DDR0:55mA
C4046
MIC_DET_IN
HSYNC2
RIN2P
FRC_VDDC_5
AVDD_DDR0
0.1uF
N3
R238
R240
COMP2_Pb+
0.047uF
GND_20
FRC_VDD33_DDR
C297
COMP2_Y+
C218
TP209
0.1uF
COMP2_Pr+
33
W5
R4
MICCM
H5
R237
SCART1_Rout
+1.5V_DDR
BIN1M
NON_EU
Y3
0.1uF
LINE_OUT_3R
SOGIN1
0
FRC_VDDC_4
GND_65
DDR3 1.5V
C290
J5
LINE_OUT_2R
BIN1P
TP208
OPT
1000pF
GIN1M
V4
FRC
C217
J6
LINE_OUT_0R
0.1uF
0.047uF
H4
GIN1P
C298
R236
C216
K6
GND_19
T9
R9
FRC_LPLL
C291
SC1_SOG_IN
68
C215
0.047uF
0.047uF
J4
TP207
BLM18PG121SN1D
R258
C214
0.047uF
W4
C281
R257
SC1_B+/COMP1_Pb+
68
33
C213
LINE_OUT_3L
10uF
R256
33
LINE_OUT_2L
RIN1M
10uF
R255
SC1_G+/COMP1_Y+
RIN1P
BLM18PG121SN1D
K4
SCART1_Lout
FRC
0.047uF
W3
10uF
C212
GND_18
FRC_VDDC_3
AVDD33_T
FRC_AVDD
10uF
68
U4
LINE_OUT_0L
C282
R254
HSYNC1
L209
K5
FRC_VDDC_2
GND_58
L219
BLM18PG121SN1D
PC_R_IN
C278
0.047uF
GND_17
T7
U7
AVDD25_PGA
+2.5V_Normal
AU25
L212
BLM18PG121SN1D
FRC
L210
C211
GND_16
FRC_VDDC_1
GND_54
T8
FRC
33
FRC_VDDC_0
R8
PC_L_IN
2.2uF
AVDD2P5
AVDD2P5
AVDD2P5
SC1/COMP1_L_IN
C279
R253
GND_15
N9
N8
AVDD_DMPLL
L211
BLM18PG121SN1D
AUDIO OUT
SC1_R+/COMP1_Pr+
GND_14
M8
P9
AVDD2P5/ADC2P5:162mA
AUD_LRCK
N1
LINE_IN_0R
VSYNC1
GND_13
B_DVDD
U8
G4
H6
A_DVDD
W15
V19
SC1_ID
GND_12
GND_48
NEC_SCL
LINE_IN_5R
SC1_FB
GND_11
COMP2_DET
HOTPLUGD/GPIO22
SOGIN0
GND_10
VDDC_11
AVDD_NODIE
AUDIO IN
DSUB_HSYNC
VDDC_10
GND_45
NEC_SDA
D20
LINE_IN_0L
DSUB_VSYNC
GND_9
AVDD25_PGA
AVDD_DMPLL
F14
I2S_IN_BCK/GPIO175
G5
GND_8
VDDC_9
SIDE USB
DDCDC_CK/GPIO27
CEC/GPIO5
R4024 22
R4025 22
AVDD25_PGA
SIDE_USB_DP
I2S_I/F
B1
SIDE_USB_DM
AE17
VDDC_8
L8
AVDD_DMPLL/AVDD_NODIE:7.362mA
AF17
C_RX2N
A2
AVDD2P5
OPT
AVDD2P5
C_RX2P
HOTPLUGC/GPIO21
A3
A7
GND_7
GND_39
0.1uF
AB4
B7
VDDC_7
AVDD_AU25
C4026
D2-_HDMI4
DDC_SDA_4
B/T USB
C_RX0N
AU25
C288
0.1uF
0.1uF
AC1
C287
10uF
C_RX0P
C4027
AC2
D2+_HDMI4
SPDIF_OUT
0.1uF
AB2
D1-_HDMI4
SPDIF_OUT/GPIO178
100
GND_6
GND_36
C295
AB3
R296
GND_5
VDDC_6
H7
L217
BLM18PG121SN1D
0.1uF
D0-_HDMI4
D1+_HDMI4
C_RXCN
G13
VDDC_5
GND_31
J7
C296
AA3
L207
BLM18PG121SN1D
LED_DRIVER_D/L_SDA
0.1uF
AB1
D0+_HDMI4
SPDIF_IN/GPIO177
GND_4
J11
AVDD_DMPLL
C289 10uF
AA1
CK-_HDMI4
G14
C_RXCP
VDDC_4
GND_27
27pF
C294
AA2
GND_3
U3_DVDD_DDR
J8
CK+_HDMI4
GND_2
VDDC_3
Y12
AVDD2P5
VDD33_DVI:163mA
VDD33_DVI
GND_1
VDDC_2
L19
L221
BLM18PG121SN1D
FRC
TU_SCL
T2
DDCDB_DA/GPIO26
C4015
0.1uF
OPT
Y1
K19
MIU1VDDC
0.1uF
V1
G18
VDDC_1
H16
MIU0VDDC
FRC_AVDD
V2
IP
D3
CK+_HDMI2
C251
TU_SIF
C4040
F4
DDC_SCL_1
47
J14
0.1uF
DDC_SDA_1
0.1uF R4002
IF_N_MSTAR
J13
C4041
F5
C250
IF_P_MSTAR
0.1uF
H2
D2-_HDMI1
0.1uF
J12
C4023
H1
D2+_HDMI1
A_RX1P
C258
0.1uF
G1
D1-_HDMI1
100
H15
C4016
H3
R289
VDD33
A_RX0P
A_RX0N
0.1uF
ANALOG SIF
Close to MSTAR
TP201
VIFM
C257
0.1uF
G3
D0-_HDMI1
D1+_HDMI1
A_RXCN
100
H13
H14
C286
G2
D0+_HDMI1
VIFP
1M
CK-_HDMI1
A_RXCP
R287
F2
W2
R288
0.1uF
DTV_IF
Close to MSTAR
CK+_HDMI1
HDMI
OPT
OLED
LCD
NO_FRC
R227
1K
PHM_OFF
R212
1K
1K
HD
R207
NON_DVB_T2
R209
1K
50/60Hz LVDS
R297
1K
R293 OPT 1K
1K
OPT
R215
F9
F1
DSUB
C4005
0.1uF
DVB_T2
S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
COMP2
FRC
VDDC : 2026mA
MODEL_OPT_2
3D_SG
CVBS In/OUT
L214
BLM18PG121SN1D
VDD33
--> This option is only applied in EU.
In case of NON_EU, default value set LOW.
10uF
PHM_ON
C275
100/120Hz LVDS
PHM_OFF
C4044
3D_SG
50/60Hz LVDS
C5
+2.5V_Normal
LOW
LOW
HIGH
HIGH
0.1uF
R216
E18
MODEL_OPT_1
: LOW
: HIGH
:HIGH
: LOW
C4043
OPT
MODEL_OPT_4
VDD_RSDS
OPT
L213
BLM18PG121SN1D
OPT_0 OPT_4
NO_FRC
U3_INTERNAL
U5_EXTERNALBOOT
reserved for FRC
1000pF
3D_GPIO_2
OPT 100
R213
FRC_HW_OPT
+1.26V_VDDC
VDDC 1.26V
C228
PHM_ON
R211
1K
FRC_H/W_OPT
R226
1K
1K
DVB_T2
R208
1K
MODEL_OPT_1
100
R210
HIGH
NO FRC
C272
4.7uF
3D_GPIO_1
LOW
G19
OPT
C264
R204
PIN NO.
MODEL_OPT_0
R203 RF_SW_OPT 100
RF_SWITCH_CTL
PIN NAME
MODEL_OPT_0
C268
4.7uF
LNA2_CTL
FHD
R206
1K
1K
IF_AGC_SEL
100/120Hz LVDS
R294
1K
OPT
R295
OPT
R214
OPT 100
R201
R202 BOOSTER_OPT100
+1.26V_VDDC
VDD_RSDS:88mA
0.1uF
MODEL OPTION
MODEL OPTION
C4019
RSDS Power OPT
+3.3V_Normal
GP2R
MAIN2, HW OPT
20101023
2
LGE Internal Use Only
EAN61829001
EAN61857101
FRC_DDR_1600_HYNIX
L7
N7
T3
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
M7
A15
VDD_7
VDD_8
M2
Close to DDR Power Pin
BA0
N8
K9
C-TMA6
C-MA4
C-TMA4
C-MBA1
C-TMBA1
VDD_6
VDD_7
A8
C1
C9
D2
E9
F1
H2
H9
L9
T7
N7
T3
M2
BA0
N8
M3
J7
CK
VDDQ_3
CK
ODT
RAS
CAS
K7
NC_1
K1
J3
K3
L3
T2
RESET
F3
DQSL
G3
C7
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS_2
DQSU
E7
VSS_4
DML
VSS_5
DMU
VSS_6
D1
D8
E2
E8
F9
G1
G9
D3
E3
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
DQL5
DQL6
B9
B7
DQSU
VSS_3
F7
F2
F8
H3
H8
G2
H7
DQL7
B1
C-TMA1
C-MA11
C-TMA11
AE16
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
C-MA6
C-MA7
C-MA5
C-TMA5
C-MA7
C-TMA7
C-MRESETB
C-TMRESETB
BCKM/TCON12/GREEN[0]
AD1
C-TMBA2
C-TMCK
AE14
AE13
C-TMCKB
22
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
C-TMODT
C-TMCKE
AD5
AF4
C-TMCASB
AD4
C-TMWEB
22
C-TMRASB
C-MRASB
C-MBA1
C-MCKB
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
C-TMODT
C-MWEB
C-TMWEB
C-MBA0
C-TMBA0
AE2
C-TMRESETB
FRC_DDR3_RESETB/DDR2_A3
22
AD9
C-TMDQSLB
C-MCASB
C-MWEB
AF9
C-TMDQSUB
C-TMDQSL
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
22
R314
C-MDQSL
C-MDQSLB
C-TMDQSUB
C-TMDQL5
C-TMDMU
22
C-MDQSUB
C-TMDQL3
C-MDQL3
C-TMDQL1
C-TMDML
C-MDML
C-MDMU
C-TMDQL6
AE12
AF7
C-TMDQU1
AD11
C-TMDQU2
AD7
AD10
C-TMDQU4
AR307
C-MDQL0
C-MDQL0
C-TMDQL0
C-MDQL2
C-TMDQL2
C-MDQL2
C-MDQL6
C-TMDQL6
C-MDQL3
C-MDQL4
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
FRC_DDR3_DQL1/DDR2_DQ0
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
AE10
C-TMDQU0
C-TMDQU3
22
C-MDQL1
AE7
C-TMDQU5
AF10
C-TMDQU6
AD8
C-TMDQU7
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
Y26
Y25
Y24
D3
RXB3+
E3
RXB3-
F7
RXB4+
F2
RXB4-
F8
RXACK-
AA26
AA24
AB26
AB25
AB24
AC24
AD26
AD25
D7
VSSQ_2
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
C3
C8
C2
A7
A2
B8
A3
C-MDQU0
C-MDQU1
C-MDQU2
C-MDQU3
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
FRC_DDR3_DQU7/DDR2_DQM1
GPIO3/TCON6/LCK/GCLK2
C-MDQU5
C-MDQU6
C-MDQU7
DMU
VSS_5
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D7
C3
RXA1-
C8
RXA2+
C2
RXA2-
A7
RXA3+
A2
RXA3-
B8
B7
B3
E1
G8
D3
J2
J8
A3
C-TMDQU6
C-MDQU0
C-TMDQU0
C-MDQU4
C-TMDQU4
22
AR309
F7
M9
F2
P1
F8
P9
H3
T1
H8
T9
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
G2
B1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
FRC_GPIO1
D2
K9
F1
L2
H2
K1
J3
K3
L3
J9
VSS_4
VSS_5
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C3
D1
C8
D8
C2
E2
A7
E8
A2
F9
B8
G1
A3
G9
B3
C7
E1
B7
G8
D3
J8
M1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
FRC_L/DIM
33
R332
FRC_GPIO8
FRC_SPI_DO
AE8
FRC_DDR3_NC/DDR2_DQM0
R317
820
Y11
S7M-R
Y19
C-MDQU1
C-TMDQU1
C-MDQU5
C-TMDQU5
C-MDQU3
C-TMDQU3
R317-*1
4.7K
S7M-PLUS
VDD_7
VDD_8
BA0
G7
K2
K8
N1
N9
R1
R9
VDD_9
BA1
A1
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
NC_2
NC_4
DQSL
J9
L1
L9
T7
NC_7
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
E3
M9
P1
F7
P9
F2
T1
F8
T9
H3
H8
VSSQ_1
VSSQ_2
VDD_6
E7
J2
H7
B1
DQU1
VDD_5
D9
DQSL
G2
DQU0
VDD_4
NC_6
NC_3
DQL6
D7
B9
A12
F3
VSS_6
DQL0
VDD_3
T7
VSS_3
DMU
A11
RESET
L9
A9
DML
VDD_2
T2
L1
G3
VSS_2
VDD_1
A10/AP
WE
NC_6
VSS_1
B2
A9
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
D7
D8
C3
C8
E2
E8
C2
F9
A7
G1
A2
G9
B8
A3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL7
B9
B3
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
RXC0+
AE25
RXC0-
AF26
RXC1+
AF25
RXC1-
AE24
RXC2+
AF24
RXC2-
AF23
RXC3+
AD22
RXC3-
AE22
RXC4+
AF22
RXC4-
+3.3V_Normal
RXDCK+
AE19
RXDCK-
AD21
RXD0+
AE21
RXD0-
AF21
RXD1+
AD20
RXD1-
AE20
RXD2+
AF20
RXD2-
AF19
RXD3+
AD18
RXD4+
AF18
RXD4-
AB23
AC23
AC22
FRC_MODEL_OPT_0
FRC_MODEL_OPT_1
FRC_MODEL_OPT_2
2D/3D_CTL
<U3 CHIP Config>
(FRC_CONF0)
HIGH : I2C ADR = B8
LOW : I2C ADR = B4
(FRC_CONF1,FRC_PWM1, FRC_PWM0)
FRC_MODEL_OPT_0
FRC_MODEL_OPT_1
3’d5 : boot from internal SRAM
3’d6 : boot from EEPROM
3’d7 : boot form SPI flash
FRC_MODEL_OPT_2
RXD3-
AE18
AA14
2D/3D_CTL
+3.3V_Normal
FRC_CONF0
FRC_CONF1
FRC_PWM1
AC15
AC16
FRC_PWM0
FRC_/SPI_CS
FRC_CONF0
R300
33
FRC_L/DIM
L/DIM_SCLK
FRC_CONF1
AC14
R348
33
FRC_L/DIM
FRC_SPI1_DI
FRC_SPI_SDO
L/DIM_MOSI
AA16
FRC_VSYNC_LIKE
FRC_SPI_CK
FRC_TESTPIN
FRC_SPI_DI
FRC_SPI_SCK
AA15
FRC_SPI_SDI
R326 22
R331 22
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM0
AB14
R335
FRC_PWM0
FRC
FRC
22
I2C_SDA
I2C_SCL
FRC_SCL
OPT
FRC_PWM1
R334
OPT
22
FRC_SDA
+3.3V_Normal
+3.3V_Normal
S7M-PLUS_S_FLASH_2MBIT_WIN
R344
0
S7M-PLUS
3D_SYNC_RF
3D_SG
R329
10
FRC_/SPI_CS
FRC_SPI_SDO
R330
10
IC302
W25X20BVSNIG
CS
DO
1
$ 0.17
8
2
7
3
6
4
5
VCC
HOLD
S7M-PLUS
WP
GND
CLK
S7M-PLUS
R328
10
DIO
R327
10
FRC_SPI_SCK
S7M-PLUS
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
K7
H9
NC_2
DQSU
A8
RXCCK-
AE26
Y16
V_SYNC
FRC_PWM1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
J7
C9
J1
DQSU
ZQ
A7
BA2
C1
E9
NC_1
DQSL
M3
A8
DQL7
C-TMDQU7
22
VDDQ_4
L8
A6
RXCCK+
AE23
FRC_SPI1_CK
C-MDQU6
C-MDQU7
CKE
A5
M2
AB16
FRC_SPI_CZ
C-TMDQU2
C-MDQU2
VDDQ_3
E3
M1
H7
VSSQ_1
RXA4-
R9
VDDQ_1
VDDQ_2
VREFDQ
A4
NC_5
A1
CK
H1
A3
M7
N8
CK
E7
C-TMDQL4
C-TMDQL5
22
C-MDQU4
VSS_4
DQL7
RXA0-
RXA4+
AD24
DML
T3
R1
C7
DQL6
H7
RXA1+
AR308
VSSQ_1
G2
RXA0+
AA25
VSS_2
VSS_6
H8
RXACK+
AC25
AB22
FRC_DDR3_DQU6/DDR2_DQ10
R316
C-MDQL5
C-MDQL7
E7
VSS_1
DQSU
N1
DQSL
A9
DQSU
N7
BA1
F3
G3
K8
VDD_9
NC_4
FRC_DDR3_DQU2/DDR2_DQ13
22
C-MDQL4
C-MDQL5
C-MDQL6
AF5
C-TMDQL7
C-MDQL7
C-MDQL1
C-MDML
AE5
AF12
C-TMDQL7
AR306
C-MDQSU
AD6
AD12
C-TMDQL3
C-TMDQL4
C-MDMU
AF11
C-TMDQL2
22
RXB1RXB2+
VDD_7
NC_3
T7
R7
N9
VDD_8
RESET
NC_6
VSS_3
RXB2-
W24
AD19
DCKP/TCON5
AE6
C-TMDQL1
R315
B7
VDD_6
L9
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
C-TMDQL0
C-TMDQSU
C-MDQSU
C-MRESETB
AF6
C-TMDMU
22
R313
V24
C4M/LLV5N
AE11
C-TMDML
C-TMDQSLB
C-MDQSLB
VCC1.5V_U3_DDR
R333
10K
C0M/LLV0N/BLUE[4]
FRC_DDR3_DQSL/DDR2_DQS0
AE9
C-TMDQSU
22
R312
C-MRASB
CCKM/LLV3N
C1M/LLV1N/BLUE[2]
AF8
C-TMDQSL
R311
C-MDQSL
V25
AD23
CCKP/LLV3P
C0P/LLV0P/BLUE[5]
C1P/LLV1P/BLUE[3]
C-TMCASB
C-MODT
C-MODT
B3M/TCON10/BLUE[8]
FRC_DDR3_RASZ/DDR2_WEZ
AR305
C-MCASB
C7
RXB0-
VDD_5
L7
K2
A2
FRC_DDR3_ODT/DDR2_BA1
22
C-MBA2
RXB0+
A13
L1
DQSL
RXB1+
V26
B4M/TCON8/BLUE[6]
AE4
C-TMRASB
C-MCKE
C-MBA0
B1P/RLV7P/GREEN[5]
B4P/TCON9/BLUE[7]
C-TMCKB
C-MCKB
C-MA12
B0M/RLV6N/GREEN[6]
FRC_DDR3_BA1/DDR2_ODT
C-TMCK
22
R308
C-MA11
FRC_DDR3_BA0/DDR2_BA2
AD13
C-TMCKE
C-MCK
C-MA10
B0P/RLV6P/GREEN[7]
AF3
AF14
C-TMBA1
R307
C-MA9
U24
AC26
22
C-MA8
U25
FRC_DDR3_A12/DDR2_A8
C-TMBA0
DQSL
H3
BCKP/TCON13/GREEN[1]
C-TMA3
C-MDQSUB
NC_4
DQSL
E1
C-MA5
NC_3
VSS_1
C-MA1
C-MA3
C-MA4
K9
WE
A9
B3
C-TMA12
C-MCKE
CS
VDDQ_7
NC_6
C-MA12
L2
VDDQ_6
NC_2
AD15
C-TMA12
AR304
C-MA3
CKE
VDDQ_5
VDDQ_8
C-TMA10
C-MA2
C-MCK
VDDQ_2
VDDQ_4
AD16
C-TMA10
R309
BA2
J1
L1
R7
AD2
C-TMA9
R310
VDDQ_1
VDDQ_9
J9
L7
AE15
FRC_DDR3_A5/DDR2_A10
22
M7
BA1
A1
C-TMA7
C-TMA8
C-TMA11
C-MA10
NC_5
VDD_8
VDD_9
R3
AF2
A1P/RLV1P/RED[7]
VDD_4
R3
G7
R323
1K
C-MA6
AF15
C-TMA6
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
A12/BC
D9
VREFCA
A1
R322
OPT1K
C-TMA8
A0P/RLV0P/RED[9]
FRC_DDR3_A3/DDR2_A1
VDD_3
FRC
R9
A13
C-TMA5
C-MA8
FRC_DDR3_A2/DDR2_A7
U26
VDD_2
A11
R324
OPT 1K
VCC1.5V_U3_DDR
A12/BC
VDD_5
T8
AD3
NC_4
RXBCK-
A10/AP
BA0
T8
M8
A0
R318
FRC 1K
R1
VDD_4
R2
NC_2
F3
W25
VDD_1
R320
FRC 1K
R321
1K
N9
A11
R8
AE3
AD14
C-TMA4
ACKM/RLV3N/RED[2]
R2
B2
A9
S7M-PLUS
N1
VDD_3
P2
AF1
FRC_DDR3_A1/DDR2_A6
R8
A8
T2
J9
P2
A7
R319
OPT1K
R325
1K
K8
A10/AP
P8
NC_1
G3
P8
ZQ
WE
J1
RESET
RXBCK+
N2
L8
A6
S7M-R
K2
VDD_2
N2
AF16
ACKP/RLV3P/RED[3]
L3
R336
1K
G7
A9
VDDQ_9
L/DIM_EDGE_32/37
D9
VDD_1
CAS
K3
H9
R337
1K
A8
B2
VDDQ_8
J3
H2
L/DIM_EDGE_42/47/55
A7
RAS
F1
4.7K
240
1%
A6
VDDQ_7
K1
P3
H1
VREFDQ
A5
L2
E9
R340
LVDS_EXT_URSA5 1K
R338
OPT 1K
ZQ
P3
C-MA1
150
L8
P7
C-MA0
OPT
R306
R303
A5
ODT
D2
R339
1K
A4
VDDQ_6
C9
R350
A3
CS
K9
OPT
A2
VREFDQ
C-TMA2
C-TMA3
AR303
N3
H1
C-TMA0
C-TMBA2
22
FRC_DDR_1333_HYNIX
C-MVREFDQ
VDDQ_4
K7
C1
R341
1K
C-TMA1
IC301
H5TQ1G63DFR-H9C
A1
CKE
T2
W26
FRC_DDR3_A0/DDR2_NC
P7
A4
J7
A8
LVDS_S7M-PLUS
C-TMA2
22
AR302
EAN61828901
A0
L3
AE1
N8
OPT
C-MA2
C-MA0
VREFCA
K3
A3
M2
R9
N3
A2
NC_5
R1
R342
1K
C-TMA0
N9
FRC_DDR_1333_NANYA_NEW
VREFCA
A1
M7
OPT
1000pF
0.1uF
C314
C-TMA9
N1
R349
S7M-PLUS 10K
R304
R301
1K 1%
1%
R305
1K
AR301
C-MA9
CLose to Saturn7M IC
M8
VDDQ_3
NC_3
C-MBA2
C-MVREFCA
VDDQ_2
CK
WE
C312
1000pF
0.1uF
C302
C304
1%
1K
R302
1K 1%
J3
CLose to DDR3
CK
VDDQ_5
K1
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
K8
A1
L2
C-MVREFCA
T3
M8
A0
BA2
VDDQ_1
K7
C-MVREFDQ
N7
K2
M3
J7
S7M-PLUS_DivX_MS10
R7
G7
VDD_9
BA2
VCC1.5V_U3_DDR
L7
D9
BA1
M3
VCC1.5V_U3_DDR
R3
B2
R343
1K
0.1uF
0.1uF
C323
0.1uF
C322
0.1uF
C321
0.1uF
C320
0.1uF
C319
0.1uF
C318
0.1uF
C317
0.1uF
C316
0.1uF
C315
0.1uF
C313
0.1uF
C311
0.1uF
C310
0.1uF
C309
0.1uF
C308
0.1uF
C307
0.1uF
C306
0.1uF
C305
C303
10uF
C301
T8
A8
R3
R7
OPT
R2
ZQ
A7
T8
C325
0.1uF
16V
R8
L8
A6
R2
C324
10uF
10V
P2
A5
R8
L301
P8
VREFDQ
A4
P2
+1.5V_FRC_DDR
N2
H1
A3
P8
VCC1.5V_U3_DDR
P3
A2
N2
DDR3 1.5V By CAP - Place these Caps near Memory
P7
VREFCA
A1
P3
VCC1.5V_U3_DDR
N3
M8
A0
IC301-*4
NT5CB64M16DP-CF
FRC_DDR_1333_SS_NEW
N3
P7
EAN61857201
IC301-*3
K4B1G1646G-BCH9
IC301-*2
H5TQ1G63DFR-PBC
GP2R
FRC_DDR
FRC_SPI_SDI
20101023
3
LGE Internal Use Only
ST_3.5V--> 3.375V --> 3.46V
20V-->3.51V --> 3.76V (3.59V)
3.5V
3.5V
11
12
3.5V
GND
13
14
GND
GND
15
16
GND/V-sync
2
PD_+12V
R480
100
RESET
R450
0
R448
2.7K
R447
1.21K
1
GND
PD_+12V_PWR_DET_ON_SEMI
R440
5.6K
Power_DET
S7M DDR 1.5V
VIN_1
R484
0
C461
10uF
10V
C468
0.1uF
16V
VIN_2
2
GND_1
3
GND_2
PH_3
11
PH_2
10
IC407
TPS54319TRE
9
PH_1
4
5
R606-*1
1K
PWM_PULL-DOWN_1K
12
THERMAL
17
AGND
R471 0
PWM_PULL-DOWN_3.9K
POWER_22_PWM_DIM
R606
3.9K
C416
OPT
0.1uF
16V
+3.3V_Normal
100
POWER_24_ERROR_OUT
C492
0.1uF
AGND
16V
L423
3.6uH
C472
22uF
10V
C470
0.1uF
16V
C476
22uF
10V
0.01uF
50V
R1
R452
1/16W 330K 5%
7
1/16W
ERROR_OUT
L424
CIC21J501NE
5%
3A
3
6
LX_1
POWER_ON/OFF2_2
EN
R456
10K
C459
10uF
25V
FB
4
5
COMP
12K
R454
C485
0.1uF
16V
C473
0.1uF
16V
C469
22uF
16V
R1
OPT
C423
100pF
50V
2200pF
C464
C463
100pF
50V
C467
4700pF
R455
15K
R2
Vout=(1+R1/R2)*0.8
50V
R2
100
R420
C457
10uF
25V
NR8040T3R6N
C465
SS/TR
OPT
R437
R486
4.7K
POWER_20_ERROR_OUT
2
LX_2
NR8040T3R6N
VIN
1
PWM_DIM
8
16V
A_DIM
POWER_20_A_DIM
0
POWER_20_PWM_DIM R453
POWER_24_PWM_DIM
R472 0
1
R460
27K
L420
PGND
R461
4.7K
POWER_22_A_DIM
R485
0
+1.5V_DDR
1934 mA
L421
3.6uH
R462
10K
R427
10K
OPT
POWER_18_A_DIM
0
R451
C462
0.1uF
L416
E
IC405
AOZ1073AIL-3
0.1uF
16V
+3.5V_ST
BOOT
Q405
2SC3052
+3.3V_Normal
+12V/+15V
C475
INV_CTL
PWRGD
OPT
R421
10K
14
B
7
C
R418
POWER_24_INV_CTL
6.8K
+3.3V_Normal
1074 mA
POWER_ON/OFF1
OPT
R457
R426
10K
R425
100
13
R419
1K
POWER_18_INV_CTL
R415
100
8
SLIM_32~52
P401
SMAW200-H24S2
POWER_24_GND
R475
0
R476
0
L402-*1
CIS21J121
25
+3.5V_ST
COMP
C407
0.1uF
16V
OPT
C404
0.1uF
16V
POWER_23_GND
C402
100uF
16V
POWER_+24V
3
+3.3V_Normal
RT/CLK
Err OUT
10K
R464
P.DIM1
24
EN
A.DIM
22
23
VIN_3
20
21
15
19
12V
6
18
12V
GND/P.DIM2
VSENSE
L402
MLB-201209-0120P-N2
E
NCP803SN293
VCC
C412
0.1uF
16V
PD_+12V
PD_+12V
100K
IC409
R407
2.2K
OPT
OPT
EP[GND]
17
INV ON
C455
0.1uF
16V
E
R435
22K
Q406
2SC3052
R405
2.2K
1:AK10
16
12V
+12V/+15V
R429
47K
B
PANEL_CTL
0
C408
0.1uF
16V
OPT
C406
0.1uF
16V
Q407
2SC3052
C
C474
0.1uF
1%
10
POWER_DET
PWR_DET_ON_SEMI
1%
9
POWER_+24V
C
B
R402
100
RESET
1%
3.5V
OPT
R430
10K
C426
68uF
35V
R404
+24V
1%
8
C418
0.1uF
50V
C451
0.1uF
50V
1608
OPT
R482
8.2K
7
GND
GND
1%
GND
2
G
R403
1.5K
24V
6
5
D
S
4
GND
POWER_16_GND
C401
100uF
16V
R439
33K
2
L404
MLB-201209-0120P-N2
C411
0.1uF
16V
PANEL_VCC
C443
10uF
25V
3
1
+24V
L407
MLB-201209-0120P-N2
24V
R412
PWR ON 1
24V
3
GND
+3.5V_ST
L407-*1
CIS21J121
R431
22K
L404-*1
CIS21J121
E
NORMAL_32
P404
FM20020-24
NORMAL_EXPEPT_32
P403
FW20020-24S
2
Q401
2SC3052
B
VCC
Q409
AO3407A
47K 1%
C
R401
10K
RL_ON
3
IC408
NCP803SN293
PANEL_DISCHARGE_RES
PANEL_DISCHARGE_RES
New item
Q402
1
R407-*1
3K
R488
100K
1/10W
1%
PD_+12V
C442
10uF
16V
OPT
C438
0.1uF
16V
RT1P141C-T112
R406
4.7K
+3.5V_ST
PD_+12V
1%
R405-*1
3K
0.01uF
C409
C436
0.015uF
0.01uF
50V
25V
+3.5V_ST -> 3.375V
+3.5V_ST
12V -->3.58V --> 3.82V (3.68V)
18.5V-->3.5V --> 3.75V (3.59V)
0.015uF
+3.5V_ST
+12V/+15V
24V-->3.78V --> 3.92V (3.79V)
OPT
R463
10K
L412
PANEL_POWER
PD_+3.5V
5%
+12V/+15V
FROM LIPS & POWER B/D
R449
56K
1/16W
1%
3A $ 0.145
Vout=0.827*(1+R1/R2)=1.521V
<MODULE PIN MAP>
A-DIM
INV_ON
INV_ON
TP5303
V_SYNC
TP5304
SCAN_BLK2
INV_ON
+2.5V/+1.8V
SCAN_BLK1/OPC_OUT
TP5305
+3.3V_Normal
52/60:ERROR
20
VBR-A
Err_out
NC
26/32HD:NC
TP5306
Err_out
OPC_OUT
IC402
PGND
23
C490
0.1uF
AGND
16V
Err_out INV_ON PWM_DIM
GND
GND
GND
VIN
NC
60:NC
26/32/52:GND
60:PWM
VOUT
1 Vd=550mV3
300 mA
2
PWM_DIM
C432
0.1uF
16V
GND
C458
10uF
25V
1
NC
R473
24
PWM_DIM PWM_DIM
<LED MODULE PIN MAP -> latest update 20100618>
32LE5300-TA
CMO10"LED
(PSU)
NC
32LE4500-TA
AUO 10"LED
16
NC
18
INV_ON
INV_ON INV_ON
INV_ON
20
NC
err_out err_out
--> NC --> NC
NC
NC
22
PWM_DIM
24
err_out
--> NC PWM_DIM PWM_DIM
23
NC
NC
NC
INV
#11
#12
#13
#14
(PSU)
NC
NC
2
7
L422
3.6uH
LX_2
3
2A
6
LX_1
POWER_ON/OFF2_2
EN
R459
10K
C460
10uF
25V
FB
4
5
COMP
12K
R458
<-->
<-->
<-->
<-->
<-->
2200pF
C466
Vout=0.8*(1+R1/R2)
MAIN
#24
#18
#20
#22
R1
C471
22uF
16V
C477
0.1uF
16V
OPT
C427
100pF
50V
C440
0.1uF
16V
<Module Inv to Main Pin Connection>
32LE5300-TA
LGD 10"LED
(PSU)
8
GND
GND
C403
10uF
10V
PIN No LGD LPB/
OS LPB
1
NR8040T3R6N
VIN
+2.5V_Normal
AZ2940D-2.5TRE1
26/32/52:PWM
22
MAX 1A
IC406
AOZ1072AI-3
1%
INV_ON
+12V/+15V
GND
R465
24K
GND
1%
GND
+5V_Normal
OLP
TP5302
R466
51K
(PSU)
GND
IPS-@
(PSU)
1%
18
(PSU)
GND
AUO 10"Lamp
R467
10K
16
SHARP
(PSU)
CMO10"Lamp
L417
PIN No LGD(PSU)
or LIPS
R2
+5V_TUNER
IC410
AP1117EG-13
PWM_DIM
IN
NC
OUT
IN
ADJ/GND
err_out
--> NC
S7M core 1.26V volt
NC
C491
0.1uF
50V
IC411
AP1117EG-13
+5V_Normal
110
R417
330
R411
C414
0.1uF
16V
R424
1
5%
C422
0.1uF
50V
C415
10uF
10V
330
R409
110
R408
C417
0.1uF
16V
10K
R445
POWER_ON/OFF2_1
OUT
ADJ/GND
R422
1
5%
LGD edge led error-out use or not? checking is necessary...
C419
10uF
10V
C447
0.1uF
16V
+3.5V_ST
2200pF
C413
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BOOT
R432
1/16W 330K 5%
5%
50V
100pF
C439
OPT
C435
4.7uF
10V
4.7uF
OPT
R1
C445
0.01uF
50V
S
C488
SS
+1.5V_FRC_DDR
Q408
AO3438
FRC
C444
0.1uF
16V
R443
FRC 10K
PH_1
1/16W
C448
3300pF
50V
R2
POWER_ON/OFF2_1
R2
4A
Vout=(1+R1/R2)*0.8
13
PWRGD
14
15
EN
10
IC403
SN1007054RTER
9
C456
22uF
10V
D
4
C453
22uF
10V
G
3
GND_2
+1.5V_DDR
NR8040T3R6N
R442
GND_1
R436
7.5K
R423
10K
12K
R413
C428
0.1uF
16V
OPT
PH_2
$ 0.165
Vout=0.8*(1+R1/R2)=1.29V
R441
75K
1/8W
1%
OPT
COMP
C424
0.1uF
16V
11
L415
3.6uH
R434
120K
5
C420
22uF
16V
PH_3
22K 1% 24K 1%
4
R1
OPT
C429
100pF
50V
2
12
R444
R410
10K
FB
1%
POWER_ON/OFF2_1
VIN_2
C431
0.1uF
16V
16V
8
EN
C430
10uF
10V
RT/CLK
6
R414
51K
7
3A
1%
C410
10uF
25V
3
R416
1.5K
C405
10uF
25V
2
1%
C489
0.1uF
16V AGND
LX_1
THERMAL
17
7
NR8040T3R6N
VIN
1
6
VIN_1
COMP
LX_2
VSENSE
8
1
L413
5
PGND
2000 mA
L406
3.6uH
AGND
L401
IC401
AOZ1073AIL-3
VIN_3
EP[GND]
+12V/+15V
C421,C422 Close to LDO
+1.26V_VDDC
C441
0.1uF
16
+5V_USB
+5V_USB
+1.5V_DDR_FRC
GP2R
POWER_LARGE
20101023
4
LGE Internal Use Only
FLMD0
CRYSTAL_KDS
X1002-*1
S/T_SDA
15pF
C1008
X1002
32.768KHz
CRYSTAL_EPSON
R1034
NEW_SUB
R4035
4.7K
4.7M
CRYSTAL_KDS
P124/XT2/EXCLKS
RESET
P40
P41
P120/INTP0/EXLVI
42
41
40
39
38
37
R1048
22
35
P00/TI000
R1049
22
P62/EXSCL0
3
34
P01/TI010/TO00
R1050
33
P130
R1090
32
P20/ANI0
R1055
22
31
ANI1/P21
R1056
22
30
ANI2/P22
R1057
22
29
ANI3/P23
P63
4
P33/TI51/TO51/INTP4
5
P75
6
P74
7
P73/KR3
8
CEC_REMOTE_NEC
22
POWER_ON/OFF2_1
AMP_MUTE
R1023
22
R1063
+3.5V_ST
IC1001-*1
AT24C16BN-SH-B
28
ANI4/P24
R1054
22
10
27
ANI5/P25
R1052
10K
P70/KR0
11
26
ANI6/P26
P32/INTP3/OCD1B
12
25
ANI7/P27
OCD1B
M24C16-WMN6T
GND
R1008
SDA
NEC_EEPROM_SDA
22
EEPROM_NEC_16KBIT_ATMEL
EEPROM_NEC_16KBIT_STM
22
R1068
B/L_LED
R1071
10K
MODEL_OPT_0
PANEL_CTL
22
AMP_RESET
PWM_BUZZ/IIC_LED
R1009
10K
GP2
R1079
10K
TOUCH_KEY
R1075
10K
+3.5V_ST
MICOM MODEL OPTION
AVSS
AVREF
5
MODEL1_OPT_2
19-22_LAMP
OLP
SIDE_HP_MUTE
KEY2
KEY1
+3.5V_ST
C1009 1uF
TP1003
P10/SCK10/TXD0
SDA
22
0.1uF
C1002
4
SCL
R1041
5
6
R1069
4
3
WP
NEC_EEPROM_SCL
22
VSS
7
P11/SL10/RXD0
R1080
2
22
TP1002
NC_3
CEC_ON/OFF
(MODEL_OPT_3)
VCC
R1037
SCL
NC_2
8
P12/SO10
6
R1015 2.7K
3
WC
R1014 2.7K
R1001
47K
TP1001
NC/E2
7
1
P31/INTP2/OCD1A
NC_1
VCC
SCART1_MUTE
POWER_ON/OFF1
9
13
IC1001
22
OPT
P71/KR1
22
PANEL_CTL
(MODEL_OPT_1)
OPT
10K
P72/KR2
22
INV_CTL
EEPROM for Micom
NEC_MICOM
RL_ON
24
OCD1B
P13/TXD6
10K
uPD78F0514
23
R1065
OCD1A
IC1002
22
0
21
R1020
20
10K
10K
NEC_EEPROM_SDA
19
OPT
R1084
NEC_ISP_Rx
P14/RXD6
10K
SOC_RESET
2
R1039
36
2
R1066
NC/E1
1/16W
1%
P123/XT1
43
1
P61/SDA0
NEC_EEPROM_SCL
AMP_RESET
(MODEL_OPT_0)
8
R1089
20K
FLMD0
44
22
NEC_ISP_Tx
OPT
1
Q1001
2SC3052
E
22
OPT
NC/E0
EDID_WP
C
B
R1019
P15/TOH0
10K
OPT
R1005
20K
1/16W
1%
R1018
18
+3.5V_ST
R1073
R1047
P140/PCL/INTP6
NEC CONFIGURATION
OPT
R1072
TOP SIDE for reset.
P60/SCL0
17
NEC_SDA
R1006
47K
P122/X2/EXCLK/OCD0B
45
0.1uF
C1006
NEC_SCL
+3.5V_ST
TP1601
C1010
0.1uF
TP1602
FLMD0
MICOM_DEBUG
R1002 10K
16
11
12
OCD1B
MICOM_DEBUG
R1013
22
R1046
P121/X1/OCD0A
MICOM_DEBUG
R1081
22
9
10
C1003
0.1uF
OCD1A
P16/TOH1/INTP5
8
13
NEC_ISP_Rx
MICOM_DEBUG
R1010
22
7
15
6
NEW_SUB
22
REGC
46
MICOM_DEBUG
R1078
22
5
+3.5V_ST
NEC_ISP_Tx
P17/TI50/TO50
4
MICOM_RESET
MICOM_DEBUG
R1076
22
14
3
P30/INTP1
+3.5V_ST
1
2
R1060
VSS
47
12505WS-12A00
22
VDD
48
GND
for Debugger
+3.5V_ST
P1001
NEW_SUB
22
R1043
+3.5V_ST
R1091 10K
MICOM_DEBUG_WAFER
+3.5V_ST
NEW_SUB
R4034
4.7K
MICOM_RESET
R1030
C1007
10K
15pF
S/T_SCL
32.768KHz
+3.5V_ST
R1083
MODEL_OPT_1
10K
OPT
MODEL1_OPT_2
CEC_ON/OFF
S7_NEC_RXD
S7_NEC_TXD
POWER_ON/OFF2_2
NEC_ISP_Tx
LED_R/BUZZ
NEC_ISP_Rx
IR
POWER_DET
LED_B/LG_LOGO
OCD1A
B/L_LAMP
R1012
10K
PWM_LED
R1004
10K
TACT_KEY
R1011
10K
GP3
R1074
10K
MODEL_OPT_3
2010Y,GP2
2011Y,GP2R, 101125 Update
MODEL OPTION
MODEL OPTION
MODEL_OPT_0
PIN NAME
PIN NO.
HIGH
LOW
MODEL_OPT_0
8
MODEL_OPT_1
11
MODEL_OPT_2
30
B/L_LED
MODEL_OPT_3
31
TOUCH_KEY
GP2
PWM_LED
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LOW
MODEL_OPT_3
LOW
LOW : LED
HIGH : LAMP
LOW
LOW
HIGH
Description
PIN NAME
LK330/LK430 for KR/US
10Y EYE-Q Sensor
KEY & PWM LED & No Buzz & No LED Blink
LK330/LK430/LK530
KEY & PWM LED & No Buzz & No LED Blink
HIGH
HIGH
LOW
LV25/LV35/LV45/LW45/LV55/LK45/LK55
S/T & IIC LED & NO BUZZ & LED Blink
HIGH
LOW
LOW
TBD
IIC LED(09Y IIC Protocol) & No BUZZ
Low
HIGH
LOW
TBD
S/T & IIC LED & No Buzz & LED Blink
GP3
PIN NO.
HIGH
MODEL_OPT_0
8
B/L_LED
MODEL_OPT_1
11
PWM_BUZZ/IIC_LED
MODEL_OPT_2
TACT_KEY
PWM_BUZZ/IIC_LED :Using IIC for LED Breathing & PWM Buzz
PWM_LED : Using PWM Signal for LED Lighting
LOW
B/L_LAMP
LOW
PWM_BUZZ/IIC_LED
MODEL_OPT_1 MODEL_OPT_2
LOW
MODEL_OPT_3
30
31
TOUCH_KEY
GPIO_LED
LOW
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
LOW
LOW
LOW
LOW
LD350/450/550
PWM LED & No Buzz & No LED Blink
19/22/26LE5300/5300
IIC LED & PWM IIC BUZZ
B/L_LAMP
HIGH
LOW
HIGH
LOW
HIGH
HIGH
HIGH
LOW
LOW
HIGH
LOW
LOW
LD420
IIC LED(09Y IIC Protocol) & No BUZZ
HIGH
LOW
LOW
HIGH
LE7300
GPIO LED & NO BUZZ
PWM_LED
TACT_KEY
32/37/42/47/55LE5300
IIC LED & PWM BUZZ
NON_GPIO_LED
PWM_BUZZ/IIC_LED : For model that use LED Lighting used IIC
PWM_LED : For model that use LED Lighting used PWM Signal
GP2R
MICOM Rev.4
20101125
5
LGE Internal Use Only
CONTROL
IR & LED
+3.5V_ST
R2404
10K
1%
EYEQ/TOUCH_KEY
R2411
100
R2405
10K
1%
OLD_SUB
EYEQ/TOUCH_KEY
NEC_EEPROM_SCL
C2408
18pF
50V
OPT
L2401
BLM18PG121SN1D
R2401
100
KEY1
EYEQ/TOUCH_KEY
100
L2402
BLM18PG121SN1D
R2402
100
C2401
0.1uF
R2412
C2402
0.1uF
D2401
5.6V
AMOTECH
P2402
12507WR-15L
D2403
1
1
2
2
3
3
JP2407
4
4
JP2408
5
5
6
6
7
7
JP2409
8
8
JP2410
9
9
10
10
11
11
EYEQ/TOUCH_KEY
NEC_EEPROM_SDA
D2402
5.6V
AMOTECH
KEY2
NEW_SUB
P2401
12507WR-12L
5.6V
C2409
18pF
50V
OPT
5.6V
D2404
+3.5V_ST
+3.5V_ST
L2403
BLM18PG121SN1D
+3.5V_ST
R2425
47K
OPT
R2428
22
IR
Q2406
2SC3052
OPT
R2430
10K
C
+3.5V_ST
R2429
47K
OPT
B
E
OPT
R2431
47K
C
C2403
0.1uF
16V
C2404
1000pF
50V
R2413
LED_B/LG_LOGO
1.5K
OPT
C2410
0.1uF
16V
R2426
47K
B
Q2405
2SC3052
OPT
E
OPT
C2407
100pF
50V
+3.3V_Normal
D2405
5.6V
L2404
BLM18PG121SN1D
JP2411
R2427
0
R2414
C2405
0.1uF
16V
LED_R/BUZZ
C2406
1000pF
50V
1.5K
12
OPT
R2416
10K
12
13
13
14
15
16
S/T_SCL
NEW_SUB
C906
18pF
50V
OPT
D902
CDS3C05HDMI1
5.6V
S/T_SDA
C907
18pF
50V
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
NEW_SUB
D903
CDS3C05HDMI1
5.6V
GP2R
IR/CONTROL-L
20101023
6
LGE Internal Use Only
USB_DIODES
EAN61849601
IC1450
AP2191DSG
L1451-*1
CIS21J121
NC
L1451
MLB-201209-0120P-N2
OUT_2
8
1
$0.077
7
2
6
3
5
4
GND
+5V_USB
IN_1
120-ohm
C1452
10uF
10V
IN_2
FLG
C1453
0.1uF
+3.3V_Normal
EN
SIGN6409
R1455
4.7K
OPT
USB1_CTL
R1451
47
USB1_OCD
1
2
SIDE_USB_DM
3
1
2
3
22uF
16V
JK1450
5
4
5
OUT_1
C1451
R1454
10K
USB DOWN STREAM
USB DOWN STREAM
3AU04S-345-ZC-H-LG
JK1450-*1
USB_JACK
R1459
2K
1/8W
1%
SIDE_USB_DP
4
USB_JACK_LV3400
3AU04S-305-ZC-(LG)
R1458
2K
1/8W
1%
D1451
RCLAMP0502BA
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
USB_OCP_DIODE
20101023
7
LGE Internal Use Only
HDMI EEPROM
A1
A2
5V_HDMI_1 +5V_Normal
C
ENKMC2838-T112
D821
HDMI_1_RENESAS
5V_DET_HDMI_1
IC801-*1
R1EX24002ASAS0A
C
A0
SHIELD
Q802
2SC3052
R896
20
17
3.3K
R802
1.8K
VCC
8
A0
1
A1
C802
0.1uF
16V
2
A2
VSS
DDC_SDA_1
7
3
6
4
5
VCC
8
HPD1
E
R804
18
1
R830
10K
1K
19
B
EDID_WP
AT24C02BN-SH-T
10K
5V_HDMI_1
R874
HDMI_1
HDMI_1_ATMEL
IC801
$0.055
WP
A1
SCL
A2
SDA
2
GND
WP
7
3
6
4
5
C806
R884
R888
0.1uF
2.7K
2.7K
SCL
R876
22
R875
22
DDC_SCL_1
SDA
16
DDC_SDA_1
DDC_SCL_1
15
R824
0
5V_HDMI_2 +5V_Normal
HDMI_CEC
13
12
9
8
7
6
5
4
3
2
D0-
HDMI_2_RENESAS
D0+_HDMI1
D1-
HDMI_2_ATMEL
IC802
IC802-*1
R1EX24002ASAS0A
D0-_HDMI1
D0_GND
D0+
C
CK+_HDMI1
A0
1
8
2
7
AT24C02BN-SH-T
VCC
A0
WP
A1
1
D1-_HDMI1
D1_GND
A1
D1+
EDID_WP
VCC
8
$0.055
2
A2
D2-
D2-_HDMI1
3
6
4
5
SCL
A2
3
6
VSS
SDA
GND
4
5
D2+_HDMI1
R885
R889
2.7K
2.7K
JP810
SCL
DDC_SCL_2
D2_GND
D2+
C807
0.1uF
WP
7
D1+_HDMI1
R878
22
R877
22
SDA
DDC_SDA_2
OPT
D802
1
ENKMC2838-T112
D822
CK+
10K
11
10
A1
A2
CK-_HDMI1
R873
JK802
HDMI_2
SIDE_HDMI
5V_HDMI_2
5V_HDMI_4 +5V_Normal
5V_DET_HDMI_2
5V_HDMI_4
A2
5V_DET_HDMI_4
JP805
DDC_SDA_4
15
5
4
3
2
11
10
9
8
D1-
D0+_HDMI2
7
D1-_HDMI2
6
D1_GND
5
D1+
D2-
D1+_HDMI2
4
D2-_HDMI2
3
D2_GND
2
D2+
D2+_HDMI2
JK801
5
8
1
C
10K
$0.055
2
7
WP
SCL
A2
3
6
4
5
C809
R887
R891
0.1uF
2.7K
2.7K
JP812
SCL
DDC_SCL_4
R881 22
VSS
SDA
GND
SDA
DDC_SDA_4
CK-_HDMI4
12
D0_GND
D0+
4
1
0
HDMI_CEC
13
OPT
D801
1
D0-_HDMI2
6
A1
R882 22
CK+
CK+_HDMI4
D0D0-_HDMI4
D0_GND
D0+
D0+_HDMI4
+3.3V_Normal
D1D1-_HDMI4
68K
D1_GND
D1+
D1+_HDMI4
R854
For CEC
D2D2-_HDMI4
D2_GND
R855
0
R856
10K
OPT
R857
68K
OPT
D2+
D2+_HDMI4
S
B
D
6
CK+_HDMI2
D0-
3
WP
EDID_WP
VCC
JK803
G
7
CK+
7
D804
12
8
2
A0
OPT
D811
CK-_HDMI2
A2
R841
HDMI_CEC
13
EAG62611201
0
JP806
14
HDMI_SIDE
HDMI_2
EAG59023302
R815
1
AT24C02BN-SH-T
VCC
DDC_SCL_4
DDC_SCL_2
8
A1
16
14
HDMI_SIDE_ATMEL
IC804
IC804-*1
R1EX24002ASAS0A
R871
1.8K
17
15
9
HPD4
10K
A0
DDC_SDA_2
16
11
10
HDMI_SIDE_RENESAS
R862
C803
0.1uF
16V
R837
18
B
E
1K
19
3.3K
17
Q803
2SC3052
R897
20
E
1.8K
R801
18
BODY_SHIELD
HPD2
C801
0.1uF
16V
R803
ENKMC2838-T112
D824
C
R828
10K
D803
AVRL161A1R1NT
1K
19
B
3.3K
Q801
2SC3052
R895
20
R835
C
SHIELD
A1
HDMI_1
EAG59023302
14
CEC_REMOTE_S7
Q806
BSS83
OPT
C805
0.1uF
16V
GND
GND
CEC_ON/OFF
68K
+3.5V_ST
D825
R892
R883
0
R893
10K
OPT
R853
68K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
G
D826
AVRL161A1R1NT
S
B
D
HDMI_CEC
CEC_REMOTE_NEC
Q805
BSS83
OPT
C810
0.1uF
16V
GND
GND
GP2R
HDMI
20101023
8
LGE Internal Use Only
RGB/SPDIF/PC/HP
New Item Development
EARPHONE BLOCK
HP_LOUT
HEAD_PHONE
C
E
Q1101
MMBT3904-(F)
B
B
MMBT3904-(F)
Q1104
E
JK3301
KJA-PH-0-0177
+3.3V_Normal
C
R1155
1K
HP_ROUT
5
L
4
DETECT
3
R
1
HP_DET
C
C1119
10uF
16V
C1116
1000pF
50V
OPT
C
R1128
1K
E
Q1102
MMBT3904-(F)
B
B
C
MMBT3904-(F)
Q1103
E
+3.5V_ST
B
R1129
3.3K
B
C
E
SIDE_HP_MUTE
Q1106
2SC3052
RGB PC
PC AUDIO
+3.3V_Normal
5.15 Mstar Circuit Application
PEJ027-01
C
A2
B_TERMINAL1
GND
5
T_SPRING
D1101
AMOTECH
5.6V
OPT
C1107
100pF
50V
R1107
15K
R1102
470K
002:S12
VCC
R1110
10K
VINPUT
SPDIF_OUT
7B
6B
R1108
15K
B_TERMINAL2
C1131
PC_L_IN
T_TERMINAL2
D1102
AMOTECH
5.6V
OPT
C1108
100pF
50V
R1103
470K
R1111
10K
002:S12
002:T18
0.1uF
16V
C1121
100pF
50V
RGB_EEMPROM_ATMEL
IC1105
RGB_EEMPROM_RENESAS
A0
A0
1
8
2
7
3
6
4
5
7
3
6
4
5
WP
EDID_WP
SCL
RGB_DDC_SCL
SCL
GND
VSS
2
C1129
0.1uF
16V
R1142
10K
WP
A2
A2
8
VCC
VCC
A1
A1
1
R1140
2.2K
R1139
2.2K
AT24C02BN-SH-T
IC1105-*1
R1EX24002ASAS0A
4
4
PC_R_IN
R_SPRING
JST1223-001
JK1103
7A
2
T_TERMINAL1
Fiber Optic
6A
1
E_SPRING
3
3
+5V_Normal
D1115
ENKMC2838-T112
A1
SPDIF OPTIC JACK
JK1102
FIX_POLE
002:V7
GND
Q1105
ISA1530AC1
R1125
1K
E
C1115
1000pF
50V
OPT
R1130
10K
C1118
10uF
16V
002:V7
SDA
RGB_DDC_SDA
SDA
R1141
22
C1128
18pF
50V
C1127
18pF
50V
R1143
22
DSUB_VSYNC
DSUB_HSYNC
C1122
68pF
50V
OPT
C1126
68pF
50V
OPT
D1109
30V
D1113
D1116
D1114
5.6V
OPT
5.6V
OPT
30V
DSUB_B+
R1133
75
D1110
30V
DSUB_G+
R1135
75
D1111
30V
+3.3V_Normal
R1146
10K
DSUB_DET
R1147
1K
DSUB_R+
R1137
75
D1112
30V
D1117
5.6V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
RGB/SPDIF/HP
16
SHILED
DDC_GND
DDC_CLOCK
SYNC_GND
15
GP2R
5
V_SYNC
GND_1
10
BLUE
H_SYNC
NC
14
4
9
GREEN
BLUE_GND
13
8
3
GREEN_GND
RED
DDC_DATA
12
7
2
GND_2
11
6
1
SPG09-DB-010
JK1104
RED_GND
OPT
20101023
9
LGE Internal Use Only
RS232C
10
5
9
4
8
R1123
100
JP1121
R1124
100
JP1122
3
+3.5V_ST
7
2
D1107
CDS3C30GTH
30V
OPT
6
D1108
CDS3C30GTH
30V
OPT
1
C1101 0.33uF
SPG09-DB-009
IC1101
C1+
C1102
0.1uF
V+
C1103
0.1uF
C1-
C2+
C1104
0.1uF
C2-
VC1105
0.1uF
DOUT2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
JK1101
C1106
0.1uF
MAX3232CDR
VCC
GND
DOUT1
RIN1
ROUT1
S7_NEC_RXD
DIN1
DIN2
S7_NEC_TXD
RIN2
ROUT2
EAN41348201
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
RS232C_9PIN
20101023
10
LGE Internal Use Only
[51Pin LVDS Connector]
(For FHD 60/120Hz)
PANEL_VCC
[41Pin LVDS Connector]
(For FHD 120Hz)
L702
120-ohm
WAFER_FHD
P703
P705
P704
FI-RE51S-HF-J-R1500
FF10001-30
FI-RE41S-HF-J-R1500
WAFER_FHD
C709
1000pF
50V
OPT
C700
10uF
16V
OPT
1
HD
WAFER_FHD_120HZ
C710
0.1uF
16V
WAFER_FHD
[30Pin LVDS Connector]
(For HD 60Hz_Normal)
1
1
OPT
2
2
2
3
3
4
4
RXD4+
5
5
RXD3-
6
6
RXD3+
7
7
8
8
RXDCK-
9
9
RXDCK+
10
10
3
RXD44
11
RXD2-
RXA4+
12
RXD2+
13
RXA3-
13
RXD1-
14
RXA3+
14
RXD1+
15
RXD0RXD0+
16
17
RXACK+
17
18
19
RXA2-
RXC4+
21
RXA1-
21
RXC3-
22
RXA1+
22
RXC3+
23
RXA0-
23
24
RXA0+
25
26
26
27
RXB4-
28
29
30
R709
10K
BIT_SEL_LOW
LVDS_SEL
+3.3V_Normal
18
RXA0-
19
RXA0+
R712
3.3K
OPT
R711
10K
OPT
L701
RXCCK+
120-ohm
26
HD
27
RXC1-
RXB3+
30
RXC1+
31
RXC0RXC0+
34
RXA1+
PANEL_VCC
RXC2+
33
RXA1-
16
25
29
32
15
24
28
RXBCK-
RXA2+
23
RXB3-
RXBCK+
RXA2-
13
RXCCK-
RXB4+
33
12
22
RXC2-
32
RXACKRXACK+
21
27
31
9
10
20
20
25
RXA3+
RXC4-
RXA2+
24
RXA3-
7
17
20
BIT_SEL
6
14
18
19
OPC_OUT
11
RXA4-
RXACK-
PWM_DIM
TP722
8
12
16
TP721
5
11
15
0 R713
28
29
C701
10uF
16V
OPT
OPT
C702
1000pF
50V
HD
C703
0.1uF
16V
30
31
34
35
RXB2-
35
36
RXB2+
36
37
RXB1-
37
38
RXB1+
38
39
RXB0-
40
RXB0+
39
40
LVDS_SEL
41
+3.3V_Normal
42
42
43
44
41
SCAN_BLK2
SCAN_BLK1/OPC_OUT
R703
0
LVDS_PWM_44
R705
PWM_DIM
45
46
R710
10K
OPT
47
48
3.3K
OPT
R701
0
3D_SG
LED_DRIVER_D/L_SDA
49
50
51
52
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R702
0
3D_SG
LED_DRIVER_D/L_SCL
100
2D/3D_CTL
LVDS_51PIN_GPIO
R706
R707
0
LVDS_51PIN_GND
GP2R
LVDS_LARGE
20101023
11
LGE Internal Use Only
R1227
1K 1%
1K
1%
0.1uF
C1250
1000pF
C1249
R1228
R1224
1K 1%
1%
R1225
1K
C1248
1000pF
C1246
10uF
0.1uF
C1245
0.1uF
C1244
0.1uF
C1243
0.1uF
C1242
0.1uF
C1241
0.1uF
C1239
0.1uF
C1238
0.1uF
C1237
C1236
C1235
0.1uF
0.1uF
C1234
0.1uF
0.1uF
C1233
0.1uF
C1232
0.1uF
C1231
0.1uF
C1230
0.1uF
C1229
0.1uF
C1228
0.1uF
C1227
0.1uF
0.1uF
C1224
C1223
0.1uF
0.1uF
C1222
0.1uF
C1221
0.1uF
C1220
C1219
0.1uF
0.1uF
C1218
0.1uF
C1217
0.1uF
C1216
0.1uF
C1215
C1214
0.1uF
0.1uF
C1213
0.1uF
C1212
0.1uF
C1211
0.1uF
C1210
0.1uF
C1208
0.1uF
C1207
C1206
10uF
Close to DDR Power Pin
0.1uF
B-MVREFDQ
B-MVREFCA
C1205
0.1uF
VCC_1.5V_DDR
DDR3 1.5V By CAP - Place these Caps near Memory
C1247
DDR3 1.5V By CAP - Place these Caps near Memory
A-MVREFCA
1000pF
C1204
1%
R1205
1K
C1203
1000pF
0.1uF
C1202
VCC_1.5V_DDR
A-MVREFDQ
Close to DDR Power Pin
CLose to Saturn7M IC
CLose to DDR3
VCC_1.5V_DDR
VCC_1.5V_DDR
1K 1%
R1204
VCC_1.5V_DDR
1K 1%
1%
R1202
1K
C1201
R1201
VCC_1.5V_DDR
CLose to Saturn7M IC
CLose to DDR3
IC1201-*1
K4B1G1646G-BCH9
IC1202-*1
K4B1G1646G-BCH9
DDR_1333_SS_NEW
DDR_1333_SS_NEW
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
VCC_1.5V_DDR
N7
+1.5V_DDR
T3
M8
A0
VREFCA
A2
H1
A3
VREFDQ
B-TMA0
L8
A6
ZQ
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
C1225
10uF
10V
R1213
A-TMA11
A-MA11
VDD_6
DDR_1333_HYNIX
N3
M8
A0
A1
VREFDQ
A3
A4
R1203
A5
L8
ZQ
240
1%
A7
A8
B2
D9
G7
K2
K8
N1
N9
R1
VCC_1.5V_DDR
A6
R9
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
C9
D2
E9
F1
H2
H9
VDDQ_2
VDDQ_3
VDDQ_4
L9
T7
R3
L7
R7
N7
T3
CK
CK
N8
M3
K9
RAS
CAS
K1
J3
K3
L3
WE
NC_1
T2
RESET
J2
J8
M1
M9
P1
P9
T1
T9
DQSL
G3
C7
VSS_1
DQSU
VSS_2
DQSU
VSS_3
VSS_4
VSS_5
VSS_7
VSS_8
E2
E8
F9
G1
G9
B7
E7
DML
D3
DMU
A-MA7
A-MA7
A-MA9
A-MA10
E3
DQL0
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
DQL5
F7
F2
F8
H3
H8
G2
H7
DQL7
VSSQ_1
VSSQ_2
A-TMA1
A-TMA4
A-MA12
A-TMA12
A-MBA1
A-TMBA1
A-TMA10
A-MA10
A-MA11
56
A-MA12
A-MBA0
A-MBA2
A-MCK
0.01uF
25V
A-TMBA2
A-TMA9
A-TMA13
A-TMA9
A-MA9
56
A-TMA13
A-MCKB
A-TMBA0
A-TMBA1
A-TMRASB
A-MODT
A-TMODT
A-MWEB
A-TMWEB
A-MCASB
56
R1231
10K
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-MDQSUB
D7
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
C3
A-TMDQL1
A-MDQL1
A-TMDQL3
A-MDQL3
C8
C2
A7
A2
B8
A3
A-MDQU2
A-MDQU3
A22
A10
B22
C9
C23
B11
A9
C10
B23
A_DDR3_A2/DDR2_A9
B_DDR3_A2/DDR2_A9
A_DDR3_A3/DDR2_A1
B_DDR3_A3/DDR2_A1
A_DDR3_A4/DDR2_A2
A_DDR3_A5/DDR2_A10
A_DDR3_A6/DDR2_A4
B_DDR3_A4/DDR2_A2
B_DDR3_A5/DDR2_A10
B_DDR3_A6/DDR2_A4
A_DDR3_A7/DDR2_A3
B_DDR3_A7/DDR2_A3
A_DDR3_A8/DDR2_A6
B_DDR3_A8/DDR2_A6
A_DDR3_A9/DDR2_A12
A_DDR3_A10/DDR2_RASZ
A_DDR3_A11/DDR2_A11
B_DDR3_A9/DDR2_A12
B_DDR3_A10/DDR2_RASZ
B_DDR3_A11/DDR2_A11
A_DDR3_A12/DDR2_A0
B_DDR3_A12/DDR2_A0
A_DDR3_A13/DDR2_A7
B_DDR3_A13/DDR2_A7
A24
P25
C24
P26
B26
R24
B25
T26
D24
A26
C25
T25
B-TMA1
B-TMA2
B-TMA7
B-MA7
B-TMBA1
B-MBA1
B-TMA10
B-MA10
B-TMA4
B-TMA5
B-TMA6
B-TMA7
B-TMA8
B-TMBA2
B-MBA2
B-TMA13
B-MA13
B-TMA9
B21
A11
A23
P24
A_DDR3_BA0/DDR2_BA2
A_DDR3_BA1/DDR2_CASZ
A_DDR3_BA2/DDR2_A5
B_DDR3_BA0/DDR2_BA2
B_DDR3_BA1/DDR2_CASZ
B12
R26
B_DDR3_BA2/DDR2_A5
A12
C11
C26
D26
A_DDR3_MCLK/DDR2_MCLK
A_DDR3_MCLKZ/DDR2_MCLKZ
A_DDR3_CKE/DDR2_DQ5
B_DDR3_MCLK/DDR2_MCLK
B_DDR3_MCLKZ/DDR2_MCLKZ
D25
E24
B_DDR3_CKE/DDR2_DQ5
B-TMBA0
B-MCK
22
R1223
B-TMCKB
B-MCKB
B-TMCASB
B-MCASB
B-TMBA2
B-TMWEB
A-TMODT
A-TMWEB
A-TMRESETB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMCKE
A-TMDML
A-TMDQL7
A-TMDMU
A-MDQL5
A-TMDQL5
A-TMDQL0
A-TMDQL1
AR1205
A-TMDQL2
A-MDQL0
A-TMDQL0
A-MDQL2
A-TMDQL2
A-MDQL6
A-MDQL4
A-TMDQL3
A-TMDQL4
A-TMDQL6
A-TMDQL5
A-TMDQL4
A-TMDQL6
22
A-TMDQL7
A-TMDQU7
A-MDQU3
A-MDQU5
A-MDMU
A-TMDQU0
A-TMDQU3
A-TMDQU1
A-TMDQU5
A-TMDQU2
A-TMDMU
A-TMDQU3
22
A-TMDQU4
AR1207
A-TMDQU5
A-TMDQU6
A-MDQU6
A-MDQU0
A-TMDQU0
A-MDQU4
A-TMDQU4
B-TMDQSL
B-MBA1
K3
L3
C20
A20
B20
A21
N25
A_DDR3_ODT/DDR2_ODT
A_DDR3_RASZ/DDR2_WEZ
A_DDR3_CASZ/DDR2_BA1
A_DDR3_WEZ/DDR2_BA0
B_DDR3_ODT/DDR2_ODT
B_DDR3_RASZ/DDR2_WEZ
B_DDR3_CASZ/DDR2_BA1
M26
N24
N26
B_DDR3_WEZ/DDR2_BA0
C22
R25
A_DDR3_RESETB
B_DDR3_RESETB
B-TMODT
C16
B16
J25
A_DDR3_DQSL/DDR2_DQS0
A_DDR3_DQSLB/DDR2_DQSB0
B_DDR3_DQSL/DDR2_DQS0
J24
B_DDR3_DQSLB/DDR2_DQSB0
B-TMDQSU
B-MDQSU
22
R1218
B-TMRASB
B-TMCASB
B-TMDQSUB
B-MDQSUB
22
B-TMWEB
B-TMRESETB
B-TMDQL1
B-MDQL1
B-TMDQL3
B-MDQL3
B-TMDML
B-TMDQSL
B-MDML
B-TMDQU2
B-MDQU2
B-TMDQSLB
22
A16
C15
H26
A_DDR3_DQSU/DDR2_DQSB1
B_DDR3_DQSU/DDR2_DQSB1
A_DDR3_DQSUB/DDR2_DQS1
B_DDR3_DQSUB/DDR2_DQS1
H25
AR1213
B-TMDQSU
B-TMDQSUB
A14
B18
F26
A_DDR3_DML//DDR2_DQ13
A_DDR3_DMU/DDR2_DQ6
B_DDR3_DML/DDR2_DQ13
C18
B13
A19
C13
C19
A13
B19
C12
L24
B_DDR3_DMU/DDR2_DQ6
L25
A_DDR3_DQL0/DDR2_DQ3
A_DDR3_DQL1/DDR2_DQ7
A_DDR3_DQL2/DDR2_DQ1
A_DDR3_DQL3/DDR2_DQ10
A_DDR3_DQL4/DDR2_DQ4
B_DDR3_DQL0/DDR2_DQ3
B_DDR3_DQL1/DDR2_DQ7
B_DDR3_DQL2/DDR2_DQ1
B_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQL4/DDR2_DQ4
A_DDR3_DQL5/DDR2_DQ0
B_DDR3_DQL5/DDR2_DQ0
A_DDR3_DQL6/DDR2_CKE
B_DDR3_DQL6/DDR2_CKE
A_DDR3_DQL7/DDR2_DQ2
F24
L26
F25
M25
E26
M24
E25
B_DDR3_DQL7/DDR2_DQ2
A-TMDQU6
A-TMDQU7
A15
A17
B14
C17
B15
A18
C14
B17
G26
A_DDR3_DQU0/DDR2_DQ15
B_DDR3_DQU0/DDR2_DQ15
A_DDR3_DQU1/DDR2_DQ9
B_DDR3_DQU1/DDR2_DQ9
A_DDR3_DQU2/DDR2_DQ8
B_DDR3_DQU2/DDR2_DQ8
A_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU3/DDR2_DQ11
A_DDR3_DQU4/DDR2_DQM1
B_DDR3_DQU4/DDR2_DQM1
A_DDR3_DQU5/DDR2_DQ12
B_DDR3_DQU5/DDR2_DQ12
A_DDR3_DQU6/DDR2_DQM0
B_DDR3_DQU6/DDR2_DQM0
A_DDR3_DQU7/DDR2_DQ14
B_DDR3_DQU7/DDR2_DQ14
J26
G24
K25
H24
K26
G25
K24
B-TMCKE
B-MCKE
B-TMDQL7
B-MDQL7
B-TMDQL5
B-MDQL5
B-TMDML
B-TMDMU
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
B-TMDQL0
B-TMDQL1
B-TMDQL2
B-TMDQL3
B-TMDQL0
B-MDQL0
B-TMDQL2
B-MDQL2
B-TMDQL6
B-MDQL6
B-TMDQL4
B-MDQL4
B-TMDQL4
22
B-TMDQL5
B-TMDQL6
B-TMDQL7
B-TMDQU0
B-MDQU7
B-TMDQU3
B-MDQU3
B-TMDQU5
B-MDQU5
B-TMDMU
B-MDQL0
H3
B-MDQL4
H8
B-MDQL5
G2
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
DMU
VSS_5
DQL0
VSS_7
DQL1
VSS_8
G2
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C3
A8
C8
C1
C2
B-MDQU2
B-MDQU3
A7
A2
B-MDQU5
B8
B-MDQU6
A3
B-MDQU7
B-TMDQU1
VSS_1
VSS_2
A2
D2
B8
E9
A3
DML
VSS_4
DMU
VSS_5
B3
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
J3
H9
K3
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
R8
R2
T8
R3
G8
L7
J2
J8
R7
N7
T3
M1
M9
P1
P9
T1
N8
M3
B9
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
D1
K1
J3
D8
K3
E2
L3
A6
F9
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
G9
G3
22
F2
R2
T8
R3
L7
R7
N7
VDD_1
A10/AP
VDD_2
VDD_3
A12/BC
VDD_4
A13
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
K7
CK
VDDQ_2
CK
VDDQ_3
J3
L3
VDDQ_4
VDDQ_5
L2
K3
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
G7
R7
K2
N7
K8
T3
N1
N9
RESET
NC_2
NC_3
NC_4
F3
DQSL
K7
K9
E9
L2
F1
K1
H2
J3
H9
K3
L3
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
DMU
F7
F2
F8
H3
H8
G2
H7
VSS_5
VSS_6
E3
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C3
C2
A7
A2
B8
A3
A10/AP
VDD_2
VDD_3
A12/BC
VDD_4
A13
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6
VDD_8
VDDQ_9
F1
H2
H9
J1
J9
NC_2
L1
L9
T7
NC_6
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
B3
DMU
VSS_5
E1
G8
J2
J8
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
M1
M9
P1
P9
T1
T9
DQL6
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
ZQ
R8
R2
T8
VDD_1
VDD_2
VDD_3
VDD_4
NC_6
VDD_5
VDD_6
VDD_7
VDD_8
B2
R3
D9
L7
G7
R7
K2
N7
K8
T3
N1
N9
R9
VDD_9
VDDQ_2
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
A8
J7
C1
K7
C9
K9
D2
E9
L2
F1
K1
H2
J3
H9
K3
L3
NC_2
NC_4
J9
K8
N1
N9
R1
R9
C3
C8
A1
CK
VDDQ_2
CK
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
A8
C1
C9
D2
E9
F1
H2
A7
A2
B8
A3
H9
L8
ZQ
A7
A8
B2
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12
VDD_4
NC_6
VDD_5
VDD_6
VDD_7
VDD_8
BA0
G7
K2
K8
N1
N9
R1
R9
VDD_9
BA1
A1
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_2
NC_3
NC_4
F3
DQSL
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
RESET
G3
D9
J9
L1
L9
T7
NC_7
DQSL
VSS_1
DQSU
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
A9
C7
B3
B7
E1
G8
J2
M1
D3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
VSSQ_2
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL7
B1
VSSQ_1
DQU1
VSS_1
DQSU
E3
H7
DQU0
A9
DQSU
E7
J8
DQL6
D7
A6
L9
NC_7
DQSU
G7
K2
A5
T2
L1
T7
H1
VREFDQ
A4
WE
J1
NC_1
A3
BA2
A1
VDDQ_1
CK
VREFCA
A2
M2
N8
EAN61857201
A1
NC_5
M3
CK
M8
A0
M7
R1
BA1
DQSL
N2
P2
A12
BA0
N3
P8
L8
DQL7
C2
VDDQ_1
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
J1
NC_1
NC_2
NC_3
NC_4
DQSL
H7
D9
BA1
F3
C7
B3
B7
E1
G8
E7
J2
D3
J9
L1
L9
T7
NC_6
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8
G2
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3
VSS_5
VSS_6
E3
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
C3
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
VSSQ_1
D7
D8
B3
E1
DQL6
DQL7
B1
VSSQ_1
A9
DQSU
DMU
J8
M1
H7
DQL7
C8
B2
VDD_1
A11
RESET
A9
DQL6
D7
CAS
E9
DQSL
DQSU
E7
D3
A8
A9
T2
G3
G2
A7
L9
T7
L8
ZQ
WE
L1
NC_6
H8
A5
A6
H3
VREFDQ
A4
CKE
D2
DQSL
C7
B7
A3
H1
BA2
C1
F8
A1
J7
C9
J9
VREFCA
A2
M2
N8
A8
M8
A0
M7
R1
R9
J1
NC_1
T2
G3
R3
L7
A1
VDDQ_1
CKE
K1
B2
D9
M3
BA2
K9
R2
BA1
J7
R8
T8
A11
M2
N8
P2
L8
ZQ
A8
M7
N2
P8
A7
A9
N3
P7
P3
A5
A6
VDDQ_8
A9
P7
VREFDQ
A11
F3
F7
P2
RAS
IC1202-*2
NT5CB64M16DP-CF
H1
NC_3
IC1202-*3
K4B2G1646C
VREFDQ
D2
DDR_1333_NANYA_NEW
A10/AP
RESET
IC1201-*3
K4B2G1646C
A3
VDDQ_7
VSS_3
P3
A9
T2
E3
A4
C9
DQL7
B9
EAN61857201 VREFCA
A8
G1
DDR_DVB_T2_2G
P8
ODT
DQSL
D3
E3
A7
E8
DDR_DVB_T2_2G
H1
C1
NC_4
G2
WE
B-MDQU4
A1
VDDQ_6
E7
M1
A5
L2
B-TMDQU4
A2
A8
NC_1
J8
A4
J7
VSSQ_3
DQU3
A3
T9
B-TMDQU5
P3
CS
F3
B7
A2
M2
D3
N2
VDDQ_4
NC_3
B3
J2
BA2
VSSQ_2
VSSQ_4
M8
CKE
RESET
C7
A1
NC_5
B1
DQU2
VREFCA
VDDQ_3
T2
A9
M8
A0
M7
B-MDQU0
A0
VDDQ_2
CK
WE
B1
VSSQ_2
N2
B-TMDQU0
B-MCKE
H2
A1
CK
DDR_1333_NANYA_NEW
B-TMDQU4
R1234
K1
G8
VSSQ_1
DQU1
P3
E7
10K
F1
E1
C7
N3
R9
VDDQ_5
DQSL
P7
R1
VDDQ_1
H7
DQU0
P7
B-MDQU6
A-TMDQU1
L2
N3
B-TMDQU6
B-MDQU1
E9
DQL6
B7
R1221
K9
IC1201-*2
NT5CB64M16DP-CF
E1
22
B-TMDQU7
N9
BA1
G3
VSS_6
AR1218
B-TMDQU6
N1
VDD_9
L9
VSS_3
K9
DQU1
C2
A7
K8
DQSL
DQSU
K7
DQU0
C8
K7
C9
NC_6
DQSU
P8
VSSQ_1
C3
B-MDQU1
VCC_1.5V_DDR
A1
T7
VSS_9
D7
M3
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R9
L9
DQL7
B-MDQU0
H3
H8
DQL6
H7
DQSL
P2
DQL2
F8
B-MDQL3
F8
R1
L1
VSS_6
F2
B-MDQL2
J7
C1
T7
K2
VDD_7
BA0
L1
NC_4
G7
BA2
A8
J9
VDD_5
D9
VDD_8
J1
NC_2
A13
M2
L3
NC_1
J9
VSS_3
F7
T3
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
F2
B-MDMU
B-TMDQU2
B-TMDQU3
N1
NC_6
E3
B-MDQU4
AR1217
B-TMDQU7
F7
A9
D3
VDDQ_9
H9
NC_2
E7
B-MDML
B-MDMU
CAS
VDD_4
J1
DQSL
B7
VDDQ_8
A12/BC
H2
C7
B-MDQL7
AR1216
K8
DQSL
B-MDQSU
RAS
VDD_3
F1
NC_4
G3
B-MDQSLB
E3
C9
NC_1
F3
B-MDQSL
B-MDQL6
22
R1210
10K
VDDQ_3
NC_3
B-MDQL1
22
22
CK
RESET
R8
R1233
VDDQ_2
T2
B-MDQSUB
AR1212
22
A-MCKE
CK
B-MDQSLB
R1217
VDDQ_7
D7
WE
B-MRESETB
ODT
DQL7
VDDQ_5
J3
B-MWEB
D3
H7
VDDQ_1
K1
B-MRASB
B7
BA1
K9
B-MCKE
VDDQ_6
C7
K2
VDD_9
BA2
B-MCASB
22
R1220
BA0
K7
CS
VDD_2
A11
NC_5
D2
VDDQ_5
E7
N9
VDD_7
VDD_8
M3
B-MBA2
B-MDQSL
B-TMCKE
VDDQ_4
VDD_1
A10/AP
VDD_6
DQSL
G7
VDD_6
N8
B-MODT
R1232
10K
R1219
B-TMDQU1
A-MDQU1
VDD_5
L2
B-MWEB VCC_1.5V_DDR
56
AR1206
A-MDQU7
A13
22
A-MDQL7
22
VDD_4
J7
B-MODT
B-TMDQSLB
A-TMDQSUB
A-MCKE
0.01uF
25V
B-TMRASB
B-TMCK
B-TMCKB
C1240
B-MCKB
B-MRASB
B-TMODT
VDD_3
A12/BC
M2
B-MBA0
R1222
B-TMCK
B-TMBA1
T3
A11
NC_5
B-MCK
56
B-TMA12
B-TMA13
N7
G3
D9
VDD_2
M7
B-MA9
B-TMA10
B-TMA11
A10/AP
R7
B-MA13
VDD_1
B-MRESETB
B-TMA9
CKE
NC_3
B2
A9
L7
R1226
240
1%
A8
R3
B-MA12
AR1219
B-TMRESETB
VDDQ_3
B2
A9
M7
A1
VDDQ_2
CK
RESET
ZQ
A7
T8
B-MA11
56
A6
R2
B-MA10
L8
A8
N8
VDDQ_1
CK
T2
B-MVREFDQ
T3
ZQ
A7
M3
F3
A5
R8
B-MA9
H1
VREFDQ
A4
K8
R9
WE
A3
P2
B-MA8
B-MVREFCA
L3
A2
P8
B-MA7
VREFCA
K3
A1
N2
B-MA6
B-MA12
A0
P3
B-MA5
B-MA4
B-TMA12
B-TMA3
AR1210
A-MDQU5
A-MDQU7
A-TMDQU2
22
A-MDQU4
A-MDQU6
B-MA4
A-TMDML
A-MDQU2
A-MDQL7
A-MDQU1
B-MA3
B-MA5
B-TMA4
B-TMA0
22
A-MDQL6
A-MDQU0
B10
B_DDR3_A1/DDR2_A8
B24
AR1209
A-MDQL2
A-MDQL5
A-TMCKB
A-TMCASB
22
R1212
A-MDQL1
A-MDQL3
A-TMCK
A-TMRASB
A-MDQSU
A-MDQSUB
A-MDQL4
A-TMBA2
A-TMCKE
R1211
A-MDQSL
A-MDQL0
C21
A_DDR3_A1/DDR2_A8
B_DDR3_A0/DDR2_A13
A-TMDQSL
22
R1209
A-MRESETB
A-MDMU
A8
A25
A_DDR3_A0/DDR2_A13
R1208
A-MDQSL
A-MDML
B-MA2
B-MA3
M8
P7
B-MA1
B-TMA5
J3
N3
B-MA0
B-TMA3
22
AR1220
A-TMCKB
A-TMCASB
A-MDQSU
B9
K1
DDR_1333_HYNIX
B-MBA0
22
R1207
A-MCASB
A-MDQSLB
B8
A-TMCK
A-MCKB A-MRASB
VCC_1.5V_DDR
A-TMA10
A-TMA11
A-TMA12
A-MCK
A-MCKE
A-MRASB
A-TMA5
A-TMA8
22
AR1202
A-MODT
A-TMA4
A-TMRESETB
R1206
C1209
A-TMA3
A-TMA7
A-MBA2
A-MBA1
A-TMA2
A-TMA6
AR1201
A-MA13
B-MA6
K9
N7
BA1
L2
56
AR1215
A-TMA0
A-MA4
A-MA8
A-MWEB
S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
A-TMA7
56
AR1204
A-MA6
B-TMA6
A-TMA5
A-MDML
VSS_6
B1
D8
A-MA5
B-MA8
A-TMA3
22
F3
DQL6
D1
A-MA5
B-TMA8
B-TMBA0
A-TMBA0
A-MDQSLB
NC_4
VSS_12
B9
A-MA4
NC_3
A9
G8
A-MA3
L2
CS
ODT
VDDQ_8
DQSL
E1
A-MA3
K7
CKE
VDDQ_7
NC_6
B3
A-MBA0
J7
VDDQ_6
NC_2
A-MA2
B-MA1
56
AR1214
56
AR1203
A-MA13
VDDQ_5
VDDQ_9
L1
T8
M2
BA0
VDDQ_1
J1
J9
R2
BA2
A1
C1
R8
A-TMA6
A-MA0
NC_5
BA1
A8
P2
A-MA6
A-MA1
M7
VDD_8
VDD_9
P8
A-TMA8
A-MRESETB
VDD_6
VDD_7
N2
A-MA8
1%
H1
P3
R1235
56
A-MVREFDQ
A2
P7
1%
VREFCA
R1236
56
A-MVREFCA
B-TMA1
K7
R7
K2
VDD_9
J7
EAN61828901
IC1202
H5TQ1G63DFR-H9C
L7
G7
L8
A6
R1
VDD_8
BA0
R3
D9
N9
VDD_7
B-MA2
B-MA11
A-TMA1
A-MA1
1%
56
R1237
IC1201
H5TQ1G63DFR-H9C
A-TMA2
1%
56
AR1208
56
AR1211
B-TMA11
A5
N1
BA2
56
R1238
EAN61828901
B-TMA2
M3
1%
A-MA2
A-TMA0
1%
56
R1214
1%
1%
A-MA0
56
R1216
C1226
0.1uF
16V
N8
B2
VREFDQ
A4
T8
A8
H1
A3
R8
R2
A7
M2
B-MA0
A2
N2
P2
A5
VREFCA
A1
P8
A4
NC_5
R1215
M8
A0
P3
M7
L1201
N3
P7
A1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
GP2R
DDR_256
20101023
12
LGE Internal Use Only
+3.3V_Normal
+3.3V_Normal
4.7K
+3.3V_Normal
R1404
S_FLASH_MAIN_MACRONIX
IC1401
MX25L8006EM2I-12G
R1403
10K
CS#
/SPI_CS
8
2
7
3
6
4
5
VCC
C1401
0.1uF
SO/SIO1
SPI_SDO
WP#
/FLASH_WP
GND
C
R1401
1
HOLD#
SCLK
SPI_SCK
R1405
SI/SIO0 33
SPI_SDI
Q1401
KRC103S
B
OPT 0
E
OPT
S_FLASH_MAIN_WINBOND
IC1401-*1
W25Q80BVSSIG
CS
DO[IO1]
%WP[IO2]
GND
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
1
8
2
7
3
6
4
5
VCC
HOLD[IO3]
CLK
DI[IO0]
GP2R
SFLASH_1MB
20101023
13
LGE Internal Use Only
GP2R_LARGE_TUNER
+5V_TU
BOOSTER : CHINA OPT
RF_SWITCH_CTL
L3701 BOOSTER_OPT
BLM18PG121SN1D
Pull-up can’t be applied
because of MODEL_OPT_2
BOOSTER_OPT
R3734
BOOSTER_OPT
R3743
0
close to TUNER
10K
Q3701
BOOSTER_OPT
ISA1530AC1
R3737
2.2K
E
OPT
R3762
0
CONTROL_ATTEN
B
C
CN_2INPUT_H_LG3911
TU3701
TDFR-C036D
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
4
AS
5
5
SCL
6
6
SDA
7
7
NC[IF_TP]
8
8
SIF
9
9
NC
10
10
VIDEO
11
11
GND
12
12
1.2V
13
13
3.3V
14
14
RESET
15
15
IF_AGC_CNTL
16
16
DIF_1
17
17
DIF_2
18
18
19
19
20
SHIELD
21
22
23
24
25
TUNER MULTI-OPTION
26
GP3_ATSC_1INPUT_H_SANYO
TU3702-*3
UDA55AL
27
TU3702-*1
TDVJ-H101F
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC(IF_TP)
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
19
28
NC_1
R3705
C3701
0.1uF
16V
BST_CNTL
R3707
+5V_TU
OPTION : RF AGC
RF_SW_OPT
C3703
100pF
50V
C3704
0.1uF
16V
C3728
0.1uF
16V
OPT
B
R3754
10K
TU_IIC_NON_ATSC_SANYO
FE_AGC_SPEED_CTL
IF_AGC_SEL
OPT
TU_IIC_NON_ATSC_SANYO
OPT
TU_IIC_ATSC_SANYO
R3740
1.2K
TU_I2C_NON_FILTER
C3713
33 R3736
18pF TU_I2C_NON_FILTER
50V
TU_I2C_NON_FILTER
C3742
C3711
20pF
18pF
50V
50V
NC_2
C3702
0.1uF
NC_3
TU_IIC_ATSC_SANYO
R3741
1.2K
TU_SCL
close to TUNER
C3743
20pF
50V
TU_I2C_FILTER
TU_SDA
R3751
220
R3752
220
TU_CVBS
TU_I2C_FILTER
E
R3749
+3.3V_TU
VIDEO
GND
+B2[1.2V]
C3738
0.1uF
16V
FULL_NIM
C3705
100uF
16V
CN
C3739
10uF
6.3V
C3707
100pF
50V
C3708
0.1uF
16V
R3732
100
TU_I2C_FILTER
R3735-*1
R3733
100K
C
Q3703
ISA1530AC1
COIL
DEMOD_RESET
C3710
0.1uF
16V
close to the tuner pin, add,09029
B
TU_I2C_FILTER
R3736-*1
COIL
TUNER_RESET
0
R3750
1K
OPT
C3713-*1
C3711-*1
20pF
20pF
50V
50V
TU_I2C_FILTER TU_I2C_FILTER
+3.3V_TU
+1.2V/+1.8V_TU
+B3[3.3V]
+3.3V_TU
This was being applied to the only china demod,
so this has to be deleted in both main and ISDB sheet.
RESET
NC_4
R3704
SDA
0
IF_AGC_MAIN
HALF_NIM
SCL
FULL_NIM
R3702
100
R3701
ERR
R3742
4.7K
FULL_NIM
R3744
4.7K
FULL_NIM
should be guarded by ground
FULL_NIM
HALF_NIM_1.2V_BCD
IC3703
DEMOD_SCL
100
DEMOD_SDA
close to IF line
C3712
22pF
50V
FULL_NIM
SYNC
HALF_NIM
R3760
0
INPUT
C3714
22pF
50V
FULL_NIM
IC3703-*1
AP1117EG-13
29
NC[RF_AGC]
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
SDA
NC(IF_TP)
31
30
OUT
R3766
1
1/10W
1
R3770
EN
10K
2
FULL_NIM_SEMTEK
D5
VIN
R3769
D6
FULL_NIM_BCD
VIDEO
GND
SHIELD
+3.3V
380mA
R3764
0
1/10W
FULL_NIM
R3748
ADJ
7
5.1K
3
6
4
5
R1
VOUT
NC
D7
NC_3
+1.2V/+1.8V_TU
FULL_NIM_SEMTEK
10K
VCTRL
+5V_Normal
GND
8
FULL_NIM_BCD
FULL_NIM_BCD
C3717
0.1uF
16V
D4
PG
10K
R3747
9.1K
1005
FULL_NIM
C3729
0.1uF
16V
FULL_NIM
C3730
10uF
10V
R2
IC3701-*1
SC4215ISTRT
Vo=0.8*(1+R1/R2)
RESET
NC_1
IF_AGC_CNTL
DIF_1
FULL_NIM
DIF_2
R3724
0
FE_TS_SYNC
FE_TS_DATA[0-7]
EN
19
SHIELD
FULL_NIM_BCD
R3748-*1
10K
Close to the tuner
R3771
C3741
10uF
10V
HALF_NIM
C3740
0.1uF
16V
HALF_NIM
IC3701
AP2132MP-2.5TRG1
[EP]
D3
R3703
150
OPT
HALF_NIM
HALF_NIM_1.2V_DIODES
SIF
+1.2V
HALF_NIM
R3768
1.2K
R1
OUTPUT
Please, check multi Item! 10/12
AS
SCL
+1.2V/+1.8V_TU
ADJ/GND
IF_P_MSTAR
R3761 0
HALF_NIM
D1
D2
ADJ/GND
1
2
IN
MCL
D0
3
IF_N_MSTAR
VALID
R2
HALF_NIM
R3767
10
AZ1117BH-ADJTRE1
+3.3V_TU
NC_2
+B[+5V]
Q3705
C
+5V_TU
16V
C3737
100pF
50V
ISA1530AC1
R3753
4.7K
R3741-*1
1K
33 R3735
TU_I2C_NON_FILTER
SDAT
SIF
TU_SIF
B
+3.3V_TU
R3740-*1
1K
C3706
0.1uF
16V
SCLT
R3758
82
E
GPIO must be added.
C
Q3704
2SC3052
OPT
0
R3755
470
C3731
10uF
10V
OPT
E
NC_1
FE_BOOSTER_CTL
LNA2_CTL
The pull-up/down of LNA2_CTL
is depended on MODLE_OPT_1.
GPIO must be added for FE_BOOSTER_CTL
+5V_TU
0
+B1[+5V]
NC[RF_AGC]
BOOSTER_OPT
L3704
3
close to TUNER
RF_S/W_CNTL
E
BOOSTER_OPT
R3745
10K
FULL_NIM_BCD
2
C3709
0.01uF
25V
BOOSTER_OPT
B
FULL_NIM
ANT_PWR[OPT]
Q3702
2SC3052
9
DVB_1INPUT_H_LGIT
BOOSTER_OPT
THERMAL
TU3702
TDTJ-S001D
1
C
SHIELD
FULL_NIM
R3730
0
FE_TS_VAL_ERR
VIN
GP3_ATSC_1INPUT_H_LGIT
FULL_NIM
R3731
0
R3725
0
2
7
3
6
4
5
ADJ
VO
FE_TS_CLK
NC_2
FULL_NIM_CHINA
GND
1
8
FULL_NIM_SEMTEK
NC_3
FE_TS_DATA[0]
NTSC_2INPUT_H_LGIT
CN_2INPUT_H_ALTO
GP2R_AU_1INPUT_H_LGIT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
FULL_NIM
R3727
FULL_NIM
R3728
FULL_NIM
R3729
TU3702-*4
TDTJ-S101D
RF_S/W_CTL
0
TU3701-*4
TDFR-C236D
FE_TS_DATA[1]
BST_CTL
+B1[5V]
1
NC_1[RF_AGC]
2
NC_2
3
SCLT
4
SDAT
5
NC_3
6
SIF
7
NC_4
8
VIDEO
9
GND
10
+B2[1.2V]
11
+B3[3.3V]
12
RESET
13
IF/AGC
14
DIF_1[N]
15
DIF_2[P]
16
17
19
18
ANT_PWR
0
NC_1
FE_TS_DATA[2]
2
TU3701-*2
TDFR-B036F
+B1[5V]
RF_AGC
0
FE_TS_DATA[3]
1
2
SCL
3
FULL_NIM
R3726
0
FE_TS_DATA[4]
4
NC_2
5
SIF
6
NC_3
FULL_NIM
R3721
7
0
VIDEO
FE_TS_DATA[5]
8
9
GND
+B2[1.2V]
10
FULL_NIM
R3722
11
0
+B3[3.3V]
FE_TS_DATA[6]
12
13
RESET
IF_AGC
14
FULL_NIM_CHINA
R3723
0
DIF_1[N]
15
FE_TS_DATA[7]
16
17
DIF_2[P]
18
SHIELD
19
19
TU3702-*2
TDTR-T036F
Close to the CI Slot
20
SHIELD
21
22
23
R3706
3
4
MOPLL_AS
SDA
1
FULL_NIM_BR
24
0
25
26
FULL_NIM_BR
27
28
29
31
30
RF_S/W_CNTL
5
BST_CNTL
6
7
NC_2
8
SCLT
9
SDAT
10
+B1[+5V]
NC[RF_AGC]
NC_1
SCLT
SDAT
NC_2
SIF
NC_3
NC_3
SIF
11
NC_4
12
VIDEO
13
GND
14
VIDEO
GND
+B2[1.2V]
+B3[3.3V]
+B2[1.2V]
+B3[3.3V]
15
RESET
16
NC_5
17
SCL
18
RESET
NC_4
SCL
SDA
+5V_TUNER
SDA
ERR
19
SYNC
20
VALID
21
MCL
22
ERR
+3.3V_Normal
SYNC
+5V_TU
VALID
MCL
D1
23
D2
24
D3
25
D4
26
D0
D1
200mA
27
D7
28
31
30
SHIELD
60mA
MLB-201209-0120P-N2
D2
Size change
L3703
MLB-201209-0120P-N2
D3
D5
D6
+3.3V_TU
Size change
L3702
D0
SHIELD
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BST_CNTL
+B1[5V]
NC_1[RF_AGC]
29
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
RF_S/W_CNTL
D4
D5
D6
C3719
22uF
10V
C3724
0.1uF
16V
C3722
22uF
16V
C3726
0.1uF
16V
D7
location movement,0929
GP2R
TUNER_L
C3723
22uF
10V
C3725
0.1uF
16V
C3715
C3727
22uF
0.1uF
10V
16V
Add,0929
20101023
14
LGE Internal Use Only
+1.8V_AMP
+3.3V_Normal
IC404
IN
3 Vd=1.4V 1
R474
1
AP1117E18G-13
ADJ/GND
120 mA
2
C434
0.1uF
16V
OUT
C446
0.1uF
16V
C421
10uF
10V
+24V
SPK_L+
D501
1N4148W
100V
OPT
OPT
R535
3.3
C515
0.1uF
50V
AUD_LRCK
AUD_SCK
AMP_SDA
AMP_SCL
PVDD1B_2
PVDD1B_1
OUT1B_2
OUT1B_1
PGND1B_2
PGND1B_1
BST1B
VDR1B
48
47
46
45
44
43
PVDD1A_1
49
PVDD1A_2
OUT1A_1
OUT1A_2
51
50
52
PGND1A_1
CLK_I
7
36
OUT2A_1
VDD_IO
8
35
PVDD2A_2
34
PVDD2A_1
33
PVDD2B_2
32
PVDD2B_1
9
AGND_PLL
10
LF
11
IC501
EAN60969603
NTP-7100
12
31
OUT2B_2
DVDD_PLL
13
30
OUT2B_1
29
PGND2B_2
C513
0.1uF
16V
SPEAKER_L
C537
0.1uF
50V
R524
12
R528
4.7K
SPK_R+
C525
22000pF
D503
1N4148W
100V
OPT
50V
R521
12
R525
12
R522
12
NRS6045T100MMGK
L508
10.0uH
L509
10.0uH
C532
390pF
50V
D504
1N4148W
100V
OPT
NRS6045T100MMGK
R523
12
C535
0.47uF
50V
C538
R529
0.1uF
50V
4.7K
C539
R530
0.1uF
50V
4.7K
SPEAKER_R
SPK_R-
28
+24V
PGND2B_1
27
BST2B
26
VDR2B
24
25
/FAULT
MONITOR2
23
MONITOR1
22
MONITOR0
21
SCL
20
SDA
19
BCK
18
14
15
C505
0.1uF
16V
R520
12
4.7K
C534
0.47uF
50V
L507
NRS6045T100MMGK
C531
390pF
50V
AVDD_PLL
OPT
C511
10uF
10V
R503
53
6
OUT2A_2
+1.8V_AMP
AUD_LRCH
PGND1A_2
PGND2A_1
37
WCK
OPT
C503
10uF
10V
54
EP_PAD
PGND2A_2
38
GND
C502
0.1uF
16V
55
56
39
DGND_PLL
3.3K
C522
25V1uF
5
17
R508
C433
10uF
10V OPT
C530
390pF
50V
D502
1N4148W
100V
OPT
GND_IO
SDATA
100pF
50V
4
AD
DGND_1
L502
C504
BST2A
THERMAL
57
3
DGND_2
OPT
C501
10uF
10V
BLM18PG121SN1D
BLM18PG121SN1D
L501
VDR2A
40
2
C509
0.1uF
C508
1000pF
50V
NC
41
1
+1.8V_AMP
+1.8V_AMP
10.0uH
R527
C520
1uF
25V
42
BST1A
VDR1A
25V /RESET
C512
1uF
NRS6045T100MMGK
C536
0.1uF
50V
SPK_L-
16
C506
1000pF
50V
AUD_MASTER_CLK
L506
10.0uH
C518
22000pF
50V
L504
TP502
AMP_RESET
C514
22000pF
50V
DVDD
BLM18PG121SN1D
+3.3V_Normal
C519
0.1uF
50V
C529
390pF
50V
OPT
C547
0.01uF
50V
C521
10uF
35V
R526
12
R519
12
C517
1uF
25V
C526
C527
0.1uF
50V
0.1uF
50V
C528
10uF
35V
C524
22000pF
50V
100
R504
100
R505
100
R506
33
R507
33
R513
0
POWER_DET
C516
1000pF
50V
OPT
+3.5V_ST
C507
18pF
50V
C510
18pF
50V
C546
22pF
50V
C544
22pF
50V
C545
22pF
50V
OPT
OPT
OPT
R514
100
WAFER-ANGLE
R515
10K
C
B
Q501
2SC3052
R517
SPK_L+
AMP_MUTE
4
10K
E
SPK_L-
SPK_R+
SPK_R-
3
2
1
P501
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2R
AMP_NTP
20101023
16
LGE Internal Use Only
Rear AV
COMPONENT2
AV_CVBS_IN
REAR_AV
D1619
R1654
30V
75
REAR_AV
+3.3V_Normal
C1648
220pF
50V
+3.3V_Normal
OPT
C1643
47pF
50V
REAR_AV
R1612
10K
R1615
1K
COMP2_DET
PPJ233-01
5C
[RD]E-LUG
4C
[RD]O-SPRING
3C
[RD]CONTACT L-MONO
AV_CVBS_DET
R1666
1K
REAR_AV
C1646
0.1uF
16V
REAR_AV
[GN]E-LUG
[GN]O-SPRING
[YL]CONTACT
D1625
5.6V
REAR_AV
[YL]O-SPRING
L1609
120-ohm
REAR_AV
R1671
470K
REAR_AV
C1663
330pF
50V
REAR_AV
R1689
12K
3A
R1619
75
6A
COMP2_Y+
D1612
30V
5A
[GN]CONTACT
4A
AV_R_IN
REAR_AV
[WH]C-LUG
5A
OPT
REAR_AV
R1685
10K
4B
4A
D1624
5.6V
OPT
ETHERNET FOR DVB_T2
D1613
5.6V
R1660
10K
REAR_AV
JK1604
[BL]E-LUG-S
D1614
R1620
75
[BL]O-SPRING
5B
[YL]E-LUG
REAR_AV
D1626
5.6V
[RD]O-SPRING_1
C1662
330pF
50V
REAR_AV
R1672
ET_TXD0
TP1612
ET_RXD1
TP1613
TP1614
ET_TXD1
ET_REF_CLK
[WH]O-SPRING
R1688
12K
REAR_AV
TP1615
ET_TX_EN
TP1616
ET_MDC
TP1617
TP1618
ET_MDIO
ET_CRS
TP1619
ET_RXER
TP1620
/RST-PHY
COMP2_Pr+
D1615
30V
5C
REAR_AV
470K
REAR_AV
R1621
75
7C
REAR_AV
R1684
10K
AV_L_IN
REAR_AV
ET_RXD0
TP1611
COMP2_Pb+
[RD]E-LUG-S
L1610
120-ohm
TP1610
30V
7B
R1633
10K
5D
[RD]CONTACT
COMP2_L_IN
D1616
5.6V
4E
[RD]O-SPRING_2
R1625
470K
C1616
1000pF
50V
OPT
R1636
12K
5E
[RD]E-LUG
R1632
10K
6E
COMP2_R_IN
PPJ234-01
JK1603
REAR_COMP2
D1617
5.6V
R1626
470K
C1617
1000pF
50V
OPT
R1634
12K
IC1601-*1
SN324
OUT1
1
14
OUT4
EU_OPT_AUK
INV_IN1
NON_INV_IN1
+3.3V_Normal
VCC
R1613
10K
SC1/COMP1_DET
R4223
0
D1611
5.6V
OPT
C1607
0.1uF
16V
COMPONENT1
NON_INV_IN2
R1614
1K
EU_OPT
R4210
0
EU_OPT
AV_DET
FIX-TER
22
21
10
SYNC_IN
[GN]G
20
[GN]C_DET
19
8
SYNC_GND2
18
17
7
RGB_IO
[RD]R
[WH]L_IN
5
EU_OPT
R1628
75
D1610
30V
OPT
D1604
30V
RGB_GND
14
13
D2B_OUT
[RD]MONO
SC1_R+/COMP1_Pr+
R1608
75
INV_IN2
+12V/+15V
EU_OPT
C1625
0.1uF
50V
OUT2
12
G_OUT
PPJ-230-01
D1605
30V
10
EU_OPT
R1656
2.2K
CLOSE TO MSTAR
Rg
EU_OPT
R1639
180
EU_OPT
R1642
15K
C1664
0.01uF
+12V/+15V
SC1_FB
SCART1_Lout
R4219
EU_OPT
C1644
10uF
16V
R4218
22K
EU_OPT
R1657
5.6K
C1642
0.1uF
SCART1_Rout
50V
EU_OPT
C1654
33pF
R4216
100
C1665
0.01uF
EU_OPT
IN2+
EU_OPT
R1665
33K
R4217
22K
9
ID
SC1_B+/COMP1_Pb+
7
AUDIO_L_IN
6
D1606
30V
B_GND
OPT
EU_OPT
D1618 R1623
30V
15K
R1605
75
SC1_ID
C1655
33pF
11
5
10
6
9
7
8
GND
NON_INV_IN3
INV_IN3
OUT3
1
14
2
13
3
12
4
11
5
10
6
9
7
8
OUT4
IN4-
IN4+
GND
IN3+
IN3-
OUT3
EU_OPT
EU_OPT
OPT
R1661
470K
C1645
10uF
16V
EU_OPT
EU_OPT
R1629
3.9K
IN2R1668
10K
OUT2
EU_OPT
R1655
2.2K
DTV/MNT_R_OUT
B_OUT
EU_OPT
R1667
10K IN1+
EU_OPT
R1658
5.6K
D1716
8
IN1-
VCC
REC_8
R1604
EU_OPT
R1664
33K
OPT
R1662
470K
100
75
G_GND
OUT1
DTV/MNT_L_OUT
OPT
30V
SC1_G+/COMP1_Y+
D2B_IN
4
NON_INV_IN4
EU_OPT_BCD
R4221
0
EU_OPT
11
12
IC1601
AS324MTR-E1
DTV/MNT_VOUT
E
Gain=1+Rf/Rg
EU_OPT
R1627
22
EU_OPT
R1641
47K
EU_OPT
C1621
47uF
16V
R_GND
[RD]R_IN
4
EU_OPT
R1616
75
EU_OPT
C1620
100uF
16V
Rf
EU_OPT
Q1602
2SC3052
B
EU_OPT
R1635
390
16
15
C
R4211
390
R_OUT
6
JK1601
COMPONENT1
D1603
30V
OPT
SYNC_GND1
[BL]B
13
EU_OPT
SYNC_OUT
9
EU_OPT
C1623
0.1uF
50V
EU_OPT
R1640
470
C
C1608
220pF
50V
OPT
D1602
30V
OPT
COM_GND
[GN]GND
11
3
INV_IN4
B
SC1_CVBS_IN
EU_OPT
C1604
47pF
50V
13
IN CASE OF SMALL= 15V
EU_OPT
L1606
SC1_SOG_IN EU_OPT
E
ISA1530AC1
Q1601
EU_OPT
R1609
75
2
5
AUDIO_GND
4
AUDIO_L_OUT
R1617
10K
3
AUDIO_R_IN
2
AUDIO_R_OUT
1
SC1/COMP1_L_IN
D1607
5.6V
NON_EU
R1606
470K
L1604
120-ohm
C1611
330pF
50V
PSC008-01
JK1602
R1618
10K
OPT
R1687
10K
SC1/COMP1_R_IN
D1609
5.6V
NON_EU
L1603
120-ohm
R1607
470K
C1612
330pF
50V
R1631
12K
OPT
R1675
2K
Full Scart/ Comp1
[SCART AUDIO MUTE]
+3.5V_ST
EU_OPT
L1601
BLM18PG121SN1D
EU_OPT
C1609
1000pF
50V
EU_OPT
C1618
4700pF
DTV/MNT_L_OUT
EU_OPT
Q1607
2SC3052
EU_OPT
R1648
2K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EU_OPT
L1602
BLM18PG121SN1D
EU_OPT
C1610
1000pF
50V
EU_OPT
C1619
4700pF
EU_OPT
Q1608
2SC3052
1
2
EU_OPT
C1636
0.1uF
C
R4207
51K
OPT
REC_8
B
C
SCART1_MUTE
3
DTV/MNT_R_OUT
OPT
Q1615
2SC3052
E
OPT
Q1613
E 2SC3052
OPT
Q1611
2SC3052
B
SC_RE2
DTV/MNT_R_OUT
D1601
5.6V
OPT
OPT
R1695
12K
OPT
R1676
560
EU_OPT
R1652
10K
EU_OPT
RT1P141C-T112
Q1610
C
B
OPT
R1677
10K
OPT
R1680
1K
SC_RE1
DTV/MNT_L_OUT
D1608
5.6V
OPT
+12V/+15V
IN CASE OF SMALL= 15V
[SCART PIN 8]
R1630
12K
OPT
R1678
680
OPT
R1681
1K
E
EU_OPT
R1650
2K
GP2R
REAR_JACK
20101023
17
LGE Internal Use Only
SIDE CVBS PHONE JACK
(New Item Development)
SIDE_CVBS
L9903
BLM18PG121SN1D
JK9901
KJA-PH-1-0177
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A
[YL]CONTACT
4B
[WH]O-SPRING
3C
[RD]CONTACT
4C
[RD]O-SPRING
5C
[RD]E-LUG
SIDEAV_CVBS_IN
5
M5_GND
4
M4
3
M3_DETECT
1
M1
6
M6
SIDE_CVBS
R9907
75
SIDE_CVBS
D9901
30V
ADUC30S03010L_AMODIODE
+3.3V_Normal
SIDE_CVBS
10K
R9911
C9907
100pF
OPT
SIDE_CVBS
R9915
1K
SIDEAV_DET
C9901
100pF
SIDE_CVBS
OPT
D9902
5.6V
ADMC5M03200L_AMODIODE
SIDE_CVBS
L9902
BLM18PG121SN1D
SIDE_AV_GENDER
SIDE_CVBS
R9914
SIDEAV_L_IN
SIDE_CVBS
R9906
470K
SIDE_CVBS
D9903
5.6V
ADMC5M03200L_AMODIODE
PPJ235-01
JK9903
SIDE_AV_3HOLE
SIDE_CVBS
L9901
BLM18PG121SN1D
SIDE_CVBS 10K
C9906
100pF
50V
SIDE_CVBS
R9913
SIDE_CVBS
R9917
12K
SIDEAV_R_IN
SIDE_CVBS
D9904
5.6V
ADMC5M03200L_AMODIODE
SIDE_CVBS
C9905
100pF
50V
SIDE_CVBS
R9905
470K
10K
SIDE_CVBS
R9916
12K
SIDE COMPONENT PHONE JACK
(New Item Developmen)
+3.3V_Normal
R9904
10K
SIDE_COMP
R9912
1K
COMP2_DET
SIDE_COMP
D9908
5.6V
OPT
JK9902
KJA-PH-1-0177
5
M5_GND
4
M4
3
M3_DETECT
1
M1
6
M6
R9910
75
D9907
30V
SIDE_COMP
COMP2_Y+
SIDE_COMP
D9905
30V
75
R9909
SIDE_COMP
SIDE_COMP
COMP2_Pb+
SIDE_COMP
75
R9908
D9906
30V
SIDE_COMP
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
COMP2_Pr+
SIDE_COMP
GP2R
SIDE_JACK
20101023
18
LGE Internal Use Only
* Option name of this page : CI_SLOT
(because of Hong Kong)
CI Region
CI SLOT
+5V_CI_ON
CI TS INPUT
CI_DATA[0-7]
CI_DATA[0-7]
EAG41860102
CI_SLOT_JACK_LV3400
P1901
P1902
10067972-050LF
10067972-000LF
CI_SLOT_JACK
35
R1908
100
2
CI_DATA[3]
37
3
38
4
39
5
CI_DATA[6]
CI_TS_DATA[6]
CI_TS_DATA[7]
40
6
CI_DATA[7]
41
7
42
8
43
9
R1905
10K
R1919
47
CI_ADDR[10]
CI_ADDR[11]
10
45
11
CI_ADDR[9]
CI_ADDR[8]
46
12
CI_MDI[0]
47
13
CI_ADDR[13]
CI_MDI[1]
48
14
CI_ADDR[14]
CI_MDI[2]
49
15
50
16
51
17
0
R1910
GND
OPT
52
18
OPT
19
20
21
CI_MDI[7]
56
22
CI_ADDR[7]
57
23
CI_ADDR[6]
REG
10K
47
CI_ADDR[5]
24
59
25
CI_ADDR[4]
AR1902
60
26
CI_ADDR[3]
61
27
CI_ADDR[2]
62
28
CI_ADDR[1]
63
29
CI_ADDR[0]
64
30
65
31
CI_DATA[1]
66
32
CI_DATA[2]
67
33
33
CI_TS_DATA[0]
33
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
0
100
OPT
R1909
R1907
/CI_CD2
CI_DATA[0]
CI_ADDR[0-14]
34
68
AR1903
CI HOST I/F
CI_ADDR[12]
58
CI_TS_SYNC
FE_TS_CLK
CI_MCLKI
GND
47
CI_TS_CLK
CI_TS_VAL
CI_MIVAL_ERR
/PCM_CE
CI_OE
G2
2
69
G1
1
CI_DET
+5V_Normal
IC1902
GND
1OE
GND
PCM_A[0]
GND
19
2
2OE
0ITO742440D
C1904
0.1uF
16V
2Y4
CI_ADDR[7]
1A2
PCM_A[1]
CI_MISTRT
CI_MIVAL_ERR
2Y3
CI_ADDR[6]
3
18
4
17
5
CI_MCLKI
1A3
PCM_A[2]
2Y2
CI_ADDR[5]
1A4
PCM_A[3]
2Y1
CI DETECT
CI_ADDR[4]
GND
+3.3V_Normal
+3.3V_CI
C1913
0.1uF
VCC
16V
TOSHIBA
1A1
R1904
10K
20
1
TC74LCX244FT
R1902
FE_TS_SYNC
FE_TS_VAL_ERR
/PCM_IRQA
55
R1901
33
C1909
0.1uF
54
PCM_RST
FE_TS_DATA[0]
FE_TS_DATA[0-7]
100
53
/PCM_WAIT
FE_TS_DATA[2]
FE_TS_DATA[1]
CI_MDI[1]
CI_WE
R1920
CI_MDI[6]
R1906
FE_TS_DATA[3]
0
R1916
CI_MDI[5]
CI_MDI[4]
AR1906
AR1904
44
0.1uF
33
CI_MDI[2]
CI_MISTRT
CI_IOWR
C1905
FE_TS_DATA[5]
CI_MDI[0]
CI_IORD
CI_MDI[3]
FE_TS_DATA[6]
FE_TS_DATA[4]
CI_MDI[4]
1
36
CI_TS_DATA[5]
CI_TS_DATA[4]
33
FE_TS_DATA[7]
CI_MDI[5]
CI_MDI[3]
CI_DATA[4]
CI_DATA[5]
AR1901
AR1905
R1921
10K
C1903
0.1uF
16V
CI_DATA[0-7]
/CI_CD1
33
CI_MDI[7]
CI_MDI[6]
@netLa
C1906
10uF
10V
10K
R1903
+5V_Normal
+3.3V_CI
+3.3V_CI
6
16
15
7
14
8
13
9
12
10
11
1Y1
CI_ADDR[0]
2A4
PCM_A[7]
1Y2
CI_ADDR[1]
2A3
PCM_A[6]
1Y3
CI_ADDR[2]
2A2
PCM_A[5]
1Y4
CI_ADDR[3]
2A1
PCM_A[4]
+3.3V_CI
CI_SLOT_OR_GATE_NXP
IC1901
74LVC1G32GW
1
2
3
5
VCC
4
Y
R1917
0.1uF
16V
C1908
/CI_CD1
OPT
C1902
0.1uF
0.1uF
CI_DATA[0]
GND
R1915
33
AR1907
PCM_D[0]
CI_DATA[1]
CI_DET
CI_DATA[0-7]
C1901
47
R1918
OPT
/PCM_CD
47
PCM_D[1]
CI_DATA[2]
PCM_D[2]
CI_DATA[3]
PCM_D[3]
CI_DATA[4]
33
AR1908
PCM_D[4]
CI_DATA[5]
PCM_D[5]
CI_DATA[6]
PCM_D[6]
CI_DATA[7]
PCM_D[7]
PCM_D[0-7]
B
A
GND
/CI_CD2
10K
L1901
BLM18PG121SN1D
CI POWER ENABLE CONTROL
PCM_D[0-7]
CI_DATA[0-7]
+5V_CI_ON
+5V_Normal
Q1902
RSR025P03
S
L1902
BLM18PG121SN1D
CI_ADDR[8]
D
33
AR1912
PCM_A[8]
R1914
22K
R1912
10K
OPT
C1911
4.7uF
16V
C1910
G
0.1uF
16V
0.1uF
C1907
CI_ADDR[9]
16V
R1923
10K
OPT
C1912
0.1uF
16V
OPT
PCM_A[9]
CI_ADDR[10]
PCM_A[10]
CI_ADDR[11]
PCM_A[11]
CI_ADDR[12]
33
AR1913
CI_ADDR[13]
R1922
PCM_A[12]
PCM_A[13]
PCM_A[14]
CI_ADDR[14]
/PCM_REG
REG
2.2K
R1913
10K
PCM_5V_CTL
C
R1924
10K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Q1901
2SC3052
B
E
CI_OE
CI_WE
AR1909
33
/PCM_OE
/PCM_WE
CI_IORD
/PCM_IORD
CI_IOWR
/PCM_IOWR
GP2R
PCMCI
20101023
20
LGE Internal Use Only
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
9.5T_GAS
MDS61887708
GAS5-*4
12.5T_GAS
MDS61887708
GAS6-*4
12.5T_GAS
MDS61887708
GAS7-*4
8.5T_GAS
MDS62110209
GAS5-*5
8.5T_GAS
MDS62110209
GAS6-*5
8.5T_GAS
MDS62110209
GAS7-*5
GAS4-*4
12.5T_GAS
GAS4-*5
GAS3-*4
GAS3-*5
12.5T_GAS
MDS61887708
MDS62110209
MDS61887708
12.5T_GAS
8.5T_GAS
8.5T_GAS
GAS2-*4
GAS2-*5
MDS62110209
MDS61887708
MDS62110209
MDS62110204
GAS2-*1
MDS62110205
GAS2-*2
GAS5-*1
5.5T_GAS
GAS4-*2
7.5T_GAS
MDS62110205
GAS5-*2
7.5T_GAS
GAS4-*3
9.5T_GAS
MDS61887710
GAS5-*3
9.5T_GAS
GAS7-*2
GAS7-*3
GAS7-*1
MDS62110204
5.5T_GAS
7.5T_GAS
9.5T_GAS
MDS62110205
GAS6-*1
GAS6-*2
GAS6-*3
MDS61887710
MDS62110204
MDS62110205
MDS61887710
MDS62110204
5.5T_GAS
GAS4-*1
MDS62110204
7.5T_GAS
MDS62110205
9.5T_GAS
5.5T_GAS
GAS3-*1
MDS62110204
MDS61887710
GAS3-*2
MDS62110205
5.5T_GAS
GAS1-*1
5.5T_GAS
GAS1-*2
7.5T_GAS
7.5T_GAS
5.5T_GAS
MDS62110204
7.5T_GAS
MDS62110205
GAS3-*3
MDS61887710
9.5T_GAS
GAS2-*3
MDS61887710
GAS1-*3
9.5T_GAS
GAS1-*4
12.5T_GAS
GAS1-*5
MDS61887710
8.5T_GAS
12.5T_GAS
MDS61887708
8.5T_GAS
MDS62110209
6.5T_GAS
GAS7
MDS62110206
6.5T_GAS
GAS6
MDS62110206
6.5T_GAS
GAS5
MDS62110206
6.5T_GAS
GAS4
MDS62110206
6.5T_GAS
GAS3
MDS62110206
6.5T_GAS
GAS2
MDS62110206
6.5T_GAS
GAS1
MDS62110206
SMD GASKET
GP2R
SMD_GAS
20101023
20
LGE Internal Use Only
+3.3V_Normal
L/DIM_LED/DRIVER
+3.3V_Normal
P2100
12507WR-08L
3
R2100
2.2K
R2103
10K
FRC_L/DIM_REVERSE_SEL
2
LED_DRIVER_D/L
OPT
1
R2101
2.2K
LED_DRIVER_D/L
R2102
10K
L/DIM_SCLK
4
5
L/DIM_MOSI
LED_DRIVER_D/L
R4029
22
6
LED_DRIVER_D/L_SCL
R4028
22
7
LED_DRIVER_D/L_SDA
LED_DRIVER_D/L
8
9
V_SYNC
C2100
18pF
50V
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C2101
18pF
50V
OPT
C2102
18pF
50V
OPT
C2103
18pF
50V
OPT
C2104
18pF
50V
OPT
GP2R
L/DIM_LED
20101023
21
LGE Internal Use Only
TI solution RF-3D OPTION
+3.3V_Normal
+3.3V_Normal
P3401
12507WR-12L
L3401
3D_SG
120-ohm
1
2
3
4
5
6
7
8
9
10
11
12
3D_SG
3.3V
GND
RX
3D_SG
R3402
100
M_REMOTE_RX
TX
3D_SG
R3408
100
RESET
3D_SG
R3409
100
DC
3D_SG
R3407
100
R3410
R3411
2.7K
3D_SG
2.7K
3D_SG
R3412
2.7K
3D_SG
M_REMOTE_TX
M_RFModule_RESET
FREQ. GPOIO_0
DC_MREMOTE
DD
3D_SG
R3401
100
GPOIO_1
GPOIO_2
3D Off
0
0
0
60Hz
0
0
1
59.94Hz
0
1
0
50Hz
0
1
1
RESERVED
1
0
0
RESERVED
1
0
1
RESERVED
1
1
0
RESERVED
1
1
1
DD_MREMOTE
GND
GPIO_0
3D_SG
R3406
22
GPIO_1
3D_SG
R3404
22
GPIO_2
3D_SG
R3405
22
3D_SYNC
3D_SG
R3403
22
3D_GPIO_0
3D_GPIO_1
3D_GPIO_2
3D_SYNC_RF
13
.
ALL 3D-SG OPTION
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
LCD TV Repair Guide
`11 years New Basic Models
Contents
1. Product Roadmap
2. Main PCB layout
3. Block Diagram
4. Interconnection
5. Standard Repair Process
LCD TV EU Group
LCD TV Research Department
JAN. 28th, 2011
Overview for ’11 Year Model
LCD TV Repair Guide
`11 years New Models
< Applicable Basic Model >
xxLK330, xxLK430, xxLK450, xxLK530, xxLK550
xxLV2300, xxLV2500, xxLV2540, xxLV3400
xxLV3500, xxLV3550, xxLV5500, xxLV4500
xxLW4500 (3D)
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2/22
LGE Internal Use Only
Product Roadmap
2011
2011
Lamp
Edge
LED
3D
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
3/22
LGE Internal Use Only
Main PCB
19/22/26LV2500 (50HZ)
To LCD Module
1
1
Main processor, DDR Memory
Flash Memory
2
Micom for Key/IR sensing
3
Audio AMP (5W+5W)
2
Adapter
3
* 19/22/26LV2500_S7 Reused (’11)
Main IC : LGE101_Mstar
Tuner Type : TDTJ-S001D (DVB-T/C)
Display Type (Resolution) : LED TV (1366 x 768)
Interface : HDMI 2EA , Component 1EA, AV 1EA, USB 1EA
Difference : Without FRC, HDMI Position , Resolution , Interface, Wafer
Position (Sub)
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4/22
LGE Internal Use Only
Main PCB
22/26LK330 (50HZ)
To LCD Module
1
1
Main processor, DDR Memory
Flash Memory
2
Micom for Key/IR sensing
3
Audio AMP (5W+5W)
2
Adapter
3
* 22/26LK330_S7 Reused (’11)
Main IC : LGE101_Mstar
Tuner Type : TDTJ-S001D (DVB-T/C)
Display Type (Resolution) : LCD TV (1366 x 768)
Interface : HDMI 2EA , Component 1EA, AV 1EA, USB 1EA
Difference : Without FRC, HDMI Position , Resolution , Interface, Wafer
Position (Sub)
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5/22
LGE Internal Use Only
Main PCB
32/37/42/47LK450 (50HZ)
Power
To LCD Module
1
Main processor, DDR Memory
Flash Memory
2
Micom for Key/IR sensing
3
Audio AMP (10W+10W)
LVDS
1
2
IR
3
* 32/37/42/47LK450_S7 Reused (’11)
Main IC : LGE101_Mstar
Tuner Type : TDTJ-S001D (DVB-T/C)
Display Type (Resolution) : LCD TV (1920 x 1080)
Interface : HDMI 3EA , Component 1EA, AV 1EA, USB 1EA
Difference : Without FRC, HDMI Position , Resolution , Interface, Wafer
Position (Sub)
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
6/22
LGE Internal Use Only
Main PCB
32/37/42/47/55LW4500 (100HZ)
Led Driver Power
4
LVDS
1
1
Main processor, DDR Memory
Flash Memory
2
Micom for Key/IR sensing
3
Audio AMP (10W+10W)
4
LED Driver connection (with local dimming)
2
IR
3
* 37LW4500_S7 Reused (’11)
Main IC : LGE107_Mstar
Tuner Type : TDTJ-S001D (DVB-T/C)
Display Type (Resolution) : 3D, LED TV (1920 x 1080)
Interface : HDMI 3EA , Component 1EA, AV 1EA, USB 1EA
Difference : HDMI Position , Interface, Wafer Position (LVDS, Power, Sub)
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
7/22
LGE Internal Use Only
Block diagram
TUNER
(T/C)
Tuner_SIF
41P
Tuner_CVBS
51P
SCL/SDA
30P
FE_TS_DATA[0]/CLK/Valid/Sync
FRC
DDR3 X 16 X 1
(1Gb X 1)
PCMCIA
CI_TS_DATA[7:0]/CLK/Valid/Sync
CI_DATA[7:0]
USB_DM/DP
HDMI1
HDMI2
COMP1
A/V1
PC-RGB
Only for FRC or 3D Model
HP_OUT
H/P
HDMI3
SPI
Flash(2Mb)
CI_ADDR[14:0]
USB
Side
DATA
Video
Audio
SYSTEM
DDR3 X 16 X2
(1Gb)
HDMI_TMDS/HPD/CEC
HDMI_TMDS/HPD/CEC
LGE101 (S7)
LGE107 (S7+FRC)
SPI
Flash(8Mb)
NAND
Flash(1Gb)
HDMI_TMDS/HPD/CEC
COMP_ YPbPr/ LR_IN
AV_CVBS/LR_IN
SCL/SDA
SYSTEM EEPROM X 1
(1Mb)
SCL/SDA
HDCP EEPROM X 1
(8Kb)
DSUB_RGB/ HVsync
DDC_SDA/UART_TX
PC-AUDIO
PC_ Audio IN
SPDIF
SPDIF_OUT
Sub Micom
(NEC)
SC_CVBS/RGB/LR_IN
SCART
Rear
SC_VIDEO/LR_OUT
RS-232C
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
I2S_I/F
SCL/SDA
Debug _TX/RX
8/22
Audio
AMP
LGE Internal Use Only
Interconnection - 1
[PCBs]
19/22LV2500
1
2
2
Main PCB
Soft Touch Key/IR PCB
1
LED driver
3
1
[Cables]
4
1
Soft Touch key/IR cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
2
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
9/22
LGE Internal Use Only
Interconnection - 2
[PCBs]
19/22LV5500
1
2
2
Main PCB
Soft Touch Key/IR PCB
1
LED driver
3
1
[Cables]
4
2
1
Soft Touch key/IR cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
10/22
LGE Internal Use Only
Interconnection - 3
[PCBs]
26LV2500
1
LED driver
2
2
3
Main PCB
Soft Touch Key/IR PCB
1
1
[Cables]
4
2
1
Soft Touch key/IR cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
11/22
LGE Internal Use Only
Interconnection - 4
[PCBs]
26LV5500
1
2
LED driver
Main PCB
Soft Touch Key/IR PCB
2
3
1
1
[Cables]
4
2
1
Soft Touch key/IR cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
12/22
LGE Internal Use Only
Interconnection - 5
[PCBs]
32LV2500
3
2
1
1
5
6
1
Main PCB
2
PSU
3
Soft Touch Key/IR PCB
4
Timing controller
5
LED Driver
2
4
4
[Cables]
5
1
Main / PSU cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
5
Soft Touch key/IR cable
6
LED driver / PSU cable
14P
3
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
13/22
LGE Internal Use Only
Interconnection - 6
[PCBs]
37LV3400
3
1
1
5
2
1
Main PCB
2
PSU
3
Soft Touch Key/IR PCB
4
Timing controller
5
LED Driver
6
2
4
4
[Cables]
5
1
Main / PSU cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
5
Soft Touch key/IR cable
6
LED driver / PSU cable
14P
3
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
14/22
LGE Internal Use Only
Interconnection - 7
[PCBs]
37LV3550
3
1
Main PCB
2
PSU
3
Soft Touch Key/IR PCB
4
Timing controller
5
LED Driver
2
6
1
1
5
2
4
[Cables]
4
5
1
Main / PSU cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
5
Soft Touch key/IR cable
6
LED driver / PSU cable
14P
3
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
15/22
LGE Internal Use Only
Interconnection - 8
[PCBs]
42LV4500
3
1
1
2
1
Main PCB
2
PSU + LED driver
3
Soft Touch Key/IR PCB
4
Timing controller
2
4
5
[Cables]
4
1
Main / PSU cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
5
Soft Touch key/IR cable
3
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
16/22
LGE Internal Use Only
Interconnection - 9
[PCBs]
42LW4500
3
1
6
1
2
1
Main PCB
2
PSU + LED driver
3
Soft Touch Key/IR PCB
4
Timing controller
2
4
[Cables]
4
5
1
Main / PSU cable
2
Main / Module LVDS cable
3
LED driver / Module cable
4
SPK cable
5
Soft Touch key/IR cable
6
Local dimming signal cable
(Main / LED driver 8pin)
3
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
17/22
LGE Internal Use Only
Interconnection - 10
[PCBs]
32LK530
6
5
2
1
1
2
5
4
4
Main PCB
2
PSU (without inverter)
3
IR & Indicator PCB
4
Local Key PCB
5
Inverter
6
Timing controller
[Cables]
3
3
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
1
18/22
1
Main / PSU cable
2
Main / Module LVDS cable
3
SPK cable
4
IR/Local key cable
5
Inverter/PSU cable
(14pin)
LGE Internal Use Only
Interconnection - 11
[PCBs]
37LK430
5
2
1
1
Main PCB
2
PSU (without inverter)
3
IR & Indicator PCB
4
Local Key PCB
5
Timing controller
1
2
4
[Cables]
4
3
1
Main / PSU cable
2
Main / Module LVDS cable
3
SPK cable
4
IR/Local key cable
3
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
19/22
LGE Internal Use Only
Interconnection - 12
[PCBs]
42LK450
5
4
2
1
1
2
1
Main PCB
2
PSU (without inverter)
3
Soft Touch Key/IR PCB
4
Inverter
5
Timing controller
5
[Cables]
4
3
1
Main / PSU cable
2
Main / Module LVDS cable
3
SPK cable
4
Soft Touch key/IR cable
5
Inverter/PSU cable
(14pin)
3
LCD Module
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
20/22
LGE Internal Use Only
Interconnection – sub PCB( LV**/LK450 Series )
SPK unit
Soft Touch Key/IR PCB
15pin Cable
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
21/22
To Main
LGE Internal Use Only
Interconnection – sub PCB( LK430/LK530 Series )
SPK unit
SPK unit
Tact key
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
IR/Sensor
12pin Cable
22/22
To Main
LGE Internal Use Only
Contents of LCD TV Standard Repair Process
No.
Error symptom (High category)
Error symptom (Mid category)
Page
1
No video/Normal audio
1
2
No video/No audio
2
Video error, video lag/stop
3
4
Color error
4
5
Vertical/Horizontal bar, residual image,
light spot, external device color error
5
6
No power
6
7
Off when on, off while viewing, power auto
on/off
7
8
No audio/Normal video
8
9
Wrecked audio/discontinuation/noise
9
10
No response in remote controller, key error,
recording error, memory error
10
External device recognition error
11
3
A. Video error
B. Power error
Remarks
C. Audio error
D. Function error
11
12
E. Noise
Circuit noise, mechanical noise
12
13
F. Exterior error
Exterior defect
13
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process
Error
symptom
LCD TV
A. Video error
Established
date
No video/ Normal audio
Revised date
2010. 2 .19
1/13
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable,Speaker Cable,IR B/D Cable,,,)
☞A1
No video
Normal audio
Normal
audio
Y
☞A4
Check Back Light
On with naked eye
N
Move to No
video/No audio
Y
On
Check Power
Board
12v,3.5v etc.
N
☞A2
Y
Replace T-con
Board or module
N
Check Power Board 20V /12V or 24v output
Normal
voltage
Normal
voltage
Y
Repair Power
Board or parts
Replace Inverter
or module
End
N
Repair Power
Board or parts
※Precaution
☞A7 & A3
Always check & record S/W Version and White
Balance value before replacing the Main Board
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Replace Main Board
1
Re-enter White Balance value
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
A. Video error
Established
date
No video/ No audio
Revised date
2010. 2 .19
2/13
☞A4
No Video/
No audio
Check various
voltages of Power
Board
( 3.5V,12V,20V or
24V…)
Normal
voltage?
Y
N
Check and
replace
MAIN B/D
End
Replace Power
Board and repair
parts
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2
LGE Internal Use Only
Standard Repair Process
Error
symptom
LCD TV
☞ A6
Check RF Signal level
Normal
Signal?
Y
A. Picture Problem
Established
date
Picture broken/ Freezing
Revised date
2010. 2 .19
3/13
. By using Digital signal level meter
. By using Diagnostics menu on OSD
( Menu→Red key→Signal test)
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Check whether other equipments have problem or not.
(By connecting RF Cable at other equipment)
→ DVD Player ,Set-Top-Box, Different maker TV etc`
N
☞ A7
Check RF Cable
Connection
1. Reconnection
2. Install Booster
Normal
Picture?
Y
Check
S/W Version
N
N
Y
N
Normal
Picture?
SVC
Bulletin?
Y
Close
Replace
Main B/D
Contact with signal distributor
or broadcaster (Cable or Air)
Y
Normal
Picture?
N
S/W Upgrade
Normal
Picture?
Check
Tuner soldering
N
Y
Close
Close
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
3
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
☞A8
Check color by input
-External Input
-COMPONENT
-RGB
-HDMI/DVI
A. Video error
Established
date
Color error
Revised date
2010. 2 .19
4/13
☞ A10/ A11
Color
error?
N
Y
※ Check
and replace
Link Cable
(LVDS) and
contact
condition
Y
Color
error?
Y
Color
error?
Replace Main B/D
N
N
End
Check error
color input
mode
☞A12
Check Test pattern
Replace module
External Input/
Component
error
Check
external
device and
cable
External device Y
/Cable
normal
Replace Main B/D
N
Request repair
for external
device/cable
N
RGB/
HDMI/DVI
error
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Check external
device and
cable
4
External device Y
/Cable
normal
Replace Main B/D
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
A. Video error
Established
date
Vertical / Horizontal bar, residual image,
light spot, external device color error
Revised date
2010. 2 .19
5/13
Vertical/Horizontal bar, residual image, light spot
Replace
Module
☞A8
☞ A10/ A11
Check color condition by input
-External Input
-Component
-RGB
-HDMI/DVI
Screen Y
normal?
Check external
device
connection
condition
N
N
N
Screen N
normal?
Screen
normal?
Replace Main
B/D
Y
Y
Request repair
for external
device
Replace
module
☞A12
Y
Normal?
Check and
replace Link
Cable
End
End
Check Test pattern
External device screen error-Color error
Check S/W Version
Check screen
condition by
input
-External Input
-Component
-RGB
-HDMI/DVI
Check N
version
Y
Component
error
S/W Upgrade
Normal
screen?
External
Input
error
RGB
error
N
Y
HDMI/
DVI
End
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
N
Screen
normal?
Replace
Main B/D
Y
Request repair for
external device
Y
Screen
normal?
N
Replace
Main B/D
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
B. Power error
Established
date
No power
Revised date
☞A17
Check
Power LED
. Stand-By: Red
. Operating: white
2010. 2 .19
6/13
☞A19
DC Power on
by pressing Power Key
On Remote control
Y
Power LED
On?
N
Normal N
operation?
Check Power
On ‘”High”
OK?
Y
Replace
Power
B/D
N
Y
Check Power cord
was inserted properly
Replace Main B/D
☞A4
Measure voltage of each output of Power B/D
N
Normal?
Y
Close
Y
※
Check ST-BY 5V
Normal
Y
voltage?
☞A18
Normal
voltage?
Y
Replace Main B/D
N
Replace Power B/D
N
Replace Power
B/D
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
6
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
B. Power error
Established
date
Off when on, off while viewing, power auto on/off
Revised date
2010. 2 .19
7/13
Check outlet
☞A22
Check A/C cord
Error?
N
Check Power Off
Mode
CPU
Abnormal
Normal?
Replace Main B/D
Y
End
N
Check for all 3- phase
power out
Y
Abnormal
1
☞A19
Fix A/C cord & Outlet
and check each 3
phase out
(If Power Off mode
is not displayed)
Check Power B/D
voltage
※ Caution
Check and fix exterior
of Power B/D Part
* Please refer to the all cases which
can be displayed on power off mode.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Replace Power B/D
Status
Normal
voltage?
Replace Main B/D
N
Replace Power B/D
Power off List
"POWEROFF_REMOTEKEY"
"POWEROFF_OFFTIMER"
"POWEROFF_SLEEPTIMER"
"POWEROFF_INSTOP"
"POWEROFF_AUTOOFF"
Normal "POWEROFF_ONTIMER"
"POWEROFF_RS232C"
"POWEROFF_RESREC"
"POWEROFF_RECEND"
"POWEROFF_SWDOWN"
"POWEROFF_UNKNOWN"
"POWEROFF_ABNORMAL1"
Abnormal
"POWEROFF_CPUABNORMAL"
7
Y
Explanation
Power off by REMOTE CONTROL
Power off by OFF TIMER
Power off by SLEEP TIMER
Power off by INSTOP KEY
Power off by AUTO OFF
Power off by ON TIMER
Power off by RS232C
Power off by Reservated Record
Power off by End of Recording
Power off by S/W Download
Power off by unknown status except listed case
Power off by abnormal status except CPU trouble
Power off by CPU Abnormal
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
C. Audio error
Established
date
No audio/ Normal video
Revised date
☞A24
No audio
Screen normal
Check user
menu >
Speaker off
2010. 2 .19
8/13
☞A25
N
Off
Check audio B+
20V or 24V of
Power Board
Normal
voltage
Y
N
Cancel OFF
Check
Speaker
disconnection
Y
Replace Power Board and repair parts
N
Disconnection
Replace MAIN Board
End
Y
Replace Speaker
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
8
LGE Internal Use Only
Standard Repair Process
LCD TV
Error
symptom
C. Audio error
Established
date
Wrecked audio/ discontinuation/noise
Revised date
2010. 2 .19
9/13
→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio
☞A25
Check input
signal
-RF
-External Input
signal
Wrecked audio/
Discontinuation/
Noise for
all audio
Signal
normal?
Check and replace
speaker and
connector
Check audio
B+ Voltage (20V or 24V)
Y
Y
Wrecked audio/
Discontinuation/
Noise only
for D-TV
N
Normal
voltage?
Replace Main B/D
N
Wrecked audio/
Discontinuation/
Noise only
for Analog
(When RF signal is not
received)
Request repair to external
cable/ANT provider
(In case of
External Input
signal error)
Check and fix
external device
Replace Power B/D
Replace Main B/D
Wrecked audio/
Discontinuation/
Noise only
for External Input
Connect and check
other external
device
Normal
audio?
End
N
Y
Check and fix external device
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
9
LGE Internal Use Only
Standard Repair Process
Error
symptom
LCD TV
D. General Function Problem
Established
date
Remote control & Local switch checking
Revised date
2010. 2 .19
10/13
1. Remote control(R/C) operating error
Replace
Main B/D
☞A27
Check R/C itself
Operation
Normal Y
operating?
N
Normal
operating?
N
Y
Check R/C Operating
When turn off light
in room
Check & Replace
Baterry of R/C
If R/C operate,
Explain the customer
cause is interference
from light in room.
Normal
operating?
☞A27
☞A27
Check & Repair
Cable connection
Connector solder
Check
voltage
On Main B/D
☞A4
Close
Normal
Voltage?
Y
Check IR
Output signal
N
Check 5v on Power B/D
Replace Power B/D or
Replace Main B/D
(Power B/D don’t have problem)
Normal
Signal?
Y
N
Repair/Replace
IR B/D
Close
N
Replace R/C
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
10
LGE Internal Use Only
Standard Repair Process
LCD TV
Check
input
signal
Error
symptom
Y
Signal
input?
N
Established
date
External device recognition error
Revised date
Check technical
information
- Fix information
- S/W Version
Check and fix
external device/cable
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
D. Function error
Technical
information?
N
External Input and
Component
Recognition error
2010. 2 .19
11/13
Replace Main B/D
Y
Fix in
accordance
with technical
information
11
RGB,HDMI/
DVI, Optical
Recognition error
Replace Main B/D
LGE Internal Use Only
Standard Repair Process
LCD TV
Identify
nose
type
Error
symptom
E. Noise
Established
date
Circuit noise, mechanical noise
Revised date
Circuit
noise
Check
location of
noise
Mechanical
noise
Check location
of noise
12/13
Replace PSU(with LED driver)
OR
Replace LED driver
※ When the nose is severe, replace the module
(For models with fix information, upgrade the
S/W or provide the description)
※ Mechanical noise is a natural
phenomenon, and apply the 1st level
description. When the customer does not
agree, apply the process by stage.
※ Describe the basis of the description
in “Part related to nose” in the Owner’s
Manual.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2010. 2 .19
OR
OR
12
※ If there is a “Tak Tak” noise from the
cabinet, refer to the KMS fix information and
then proceed as shown in the solution manual
(For models without any fix information,
provide the description)
LGE Internal Use Only
Standard Repair Process
LCD TV
F. Exterior defect
Error
symptom
Zoom part with
exterior damage
Exterior defect
Module
damage
Replace module
Cabinet
damage
Replace cabinet
Remote
controller
damage
Stand
dent
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Established
date
Revised date
2010. 2 .19
13/13
Replace remote controller
Replace stand
13
LGE Internal Use Only
Contents of LCD TV Standard Repair Process Detail Technical Manual
No.
Error symptom
1
Content
Page
Check LCD back light with naked eye
A1
LED driver B+ 24V measuring method
A2
3
Check White Balance value
A3
4
Power Board voltage measuring method
A4
TUNER input signal strength checking method
A6
7
LCD-TV Version checking method
A7
9
LCD TV connection diagram
A8
10
Tuner Checking Part
A9
11
Check Link Cable (LVDS) reconnection
condition
A10
A11
12
Adjustment Test pattern - ADJ Key
A12
13
LCD TV connection diagram
A8
Check Link Cable (LVDS) reconnection
condition
A10
A11
15
Adjustment Test pattern - ADJ Key
A12
16
Exchange T-Con Board (1)
A-1/5
Exchange T-Con Board (2)
A-2/5
Exchange LED driver Board (PSU)
A-3/5
Exchange Module itself (1)
A-4/5
Exchange Module itself (2)
A-5/5
2
Remarks
A. Video error_ No video/Normal audio
6
A. Video error_ No video/Video lag/stop
A. Video error_Color error
14
17
18
19
A. Video error_Vertical/Horizontal bar,
residual image, light spot
<Appendix>
Defected Type caused by T-Con/
Inverter/ Module
20
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A10 : Edge LED
A11 : Lamp
A10 : Edge LED
A11 : Lamp
Continue to the next page
LGE Internal Use Only
Contents of LCD TV Standard Repair Process Detail Technical Manual
Continued from previous page
No.
Error symptom
Content
Page
21
Check front display LED
A17
22
Check power input Voltage & ST-BY 5V
A18
Checking method when power is ON
A19
POWER BOARD voltage measuring method
A4
23
B. Power error_No power
24
Remarks
25
26
B. Power error_Off when on, off while
viewing
POWER OFF MODE checking method
A22
27
B. Power error_Off when on, off while
viewing
POWER BOARD PIN voltage checking
method
A19
Checking method in menu when there is no
audio
A24
Voltage and speaker checking method when
there is no audio
A25
28
C. Audio error_No audio/Normal video
29
30
C. Audio error_Wrecked
audio/discontinuation
Voltage and speaker checking method in
case of audio error
A25
31
D. Function error_ No response in
remote controller, key error
Remote controller operation checking
method
A27
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_No video/Normal audio
Content
Check LCD back light with naked eye
Established
date
Revised
date
2011. 2 .07
A1
<ALL MODELS>
After turning on the power and disassembling the case, check with the naked eye,
whether you can see light from 4 locations.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A1
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
Content
Established
date
Revised
LED driver/lamp inverter B+ 24V measuring method
date
A. Video error_No video/Normal audio
2011. 2 .07
A2
Check the DC 24V, 12V, 3.5V and Inverter on
Edge LED PSU without LED Driver
* 26” ~ 47” : `11 Pin map
Lamp (Power Board ↔ Inverter)
- PSU
14 Pin
Lamp PSU without inverter
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A2
1~5
24V
6 ~ 10
GND
11
Detect
12
Inverter On/Off
13
Int. PWM
14
Ext. PWM (PDIM)
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_No video/Normal audio
Content
Check White Balance value
Established
date
Revised
date
2011. 2 .07
A3
<ALL MODELS>
Entry method
method
Entry
1.
1. Press
Press the
the ADJ
ADJ button
button on
on the
the remote
remote controller
controller for
for adjustment.
adjustment.
2.
2. Enter
Enter into
into White
White Balance
Balance of
of item
item 6.
7.
3.
3. After
After recording
recording the
the R,
R, G,
G, B
B (GAIN,
(GAIN, Cut)
Cut) value
value of
of Color
Color Temp
Temp
(Cool/Medium/Warm),
re-enter
the
value
after
replacing
(Cool/Medium/Warm), re-enter the value after replacing the
the MAIN
MAIN BOARD.
BOARD.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A3
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_No video/ Audio
Content
Power Board voltage measuring method
Established
date
Revised
date
2011. 2 .07
A4
Check the DC 20Vor24V, 12V, 3.5V.
24 Pin (Power Board ↔ Main Board)
FW20020-24SB (FOOSUNG)
Edge LED PSU without LED Driver
1
Power on
2
20V (24V)
3
20V (24V)
4
20V (24V)
5
GND
6
GND
7
GND
8
GND
9
3.5V
10
3.5V
11
3.5V
12
3.5V
13
GND
14
GND
15
GND
16
GND
17
12V
18
Inverter On/off
19
12V
20
Lamp : A-Dim
21
12V
22
PWM Dim #1
23
N.C
24
Error-out
Lamp PSU without inverter
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A4
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Video error, video lag/stop
Content
TUNER input signal strength checking method
Established
date
Revised
date
2011. 2 .07
A6
<ALL MODELS>
MENU -Æ red key(customer support -Æ signal test
-Æ select channel
When the signal is strong, use the
attenuator (-10dB, -15dB, -20dB etc.)
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A6
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
<ALL MODELS>
Error
symptom
A. Video error_Video error, video lag/stop
Content
LCD-TV Version checking method
Established
date
Revised
date
2011. 2 .07
A7
1. Checking method for remote controller for adjustment
Version
Press the IN-START with the
remote controller for adjustment
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A7
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error _Vertical/Horizontal bar,
residual image, light spot
Content
LCD TV connection diagram (1)
Established
date
Revised
date
2011. 2 .07
A8
As the part connecting to the external input, check
the screen condition by signal
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A8
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Video error, video lag/stop
Content
TUNER checking part
Established
date
Revised
date
2011. 2 .07
A9
<ALL MODELS>
Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
2. After measuring each voltage from power supply, finally replace the MAIN BOARD.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A9
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Color error
Content
Check Link Cable (LVDS) reconnection condition
Established
date
Revised
date
2011. 2 .07
A10
<LV** : Edge LED Series Models>
Check the contact condition of the Link Cable, especially dust or mis insertion.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A10
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Color error
Content
Check Link Cable (LVDS) reconnection condition
Established
date
Revised
date
2011. 2 .07
A11
<LK** : Lamp series Models>
Check the contact condition of the Link Cable
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A11
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
A. Video error_Color error
Content
Adjustment Test pattern - ADJ Key
Established
date
Revised
date
2011. 2 .07
A12
You can view 6 types of patterns using the ADJ Key
Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)
4.Video error (Classification of MODULE or Main-B/D!)
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A12
LGE Internal Use Only
Appendix : Exchange T-Con Board (1)
Solder defect, CNT Broken
Solder defect, CNT Broken
Solder defect, CNT Broken
Solder defect, CNT Broken
T-Con
T-Con
Defect,
Defect,
CNT
CNT
Broken
Broken
Solder
defect,CNT
CNTBroken
Broken
T-Con
Defect,
Abnormal Power Section
Solder defect, Short/Crack
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Abnormal Power Section
A - 1/5
Solder defect, Short/Crack
LGE Internal Use Only
Appendix : Exchange T-Con Board (2)
Abnormal Power Section
Solder defect, Short/Crack
GRADATION
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Abnormal Power Section
Solder defect, Short/Crack
Fuse Open, Abnormal power section
Abnormal Display
Noise
GRADATION
A - 2/5
LGE Internal Use Only
Appendix : Exchange PSU(LED driver)
No Light
Dim Light
Dim Light
Dim Light
No picture/Sound Ok
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A – 3/5
LGE Internal Use Only
Appendix : Exchange the Module (1)
Panel Mura, Light leakage
Crosstalk
Panel Mura, Light leakage
Press damage
Press damage
Crosstalk
Un-repairable Cases
In this case please exchange the module.
Press damage
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A – 4/5
LGE Internal Use Only
Appendix : Exchange the Module (2)
Vertical Block
Source TAB IC Defect
Horizontal Block
Gate TAB IC Defect
Vertical Line
Source TAB IC Defect
Horizontal
Gate
TAB ICBlock
Defect
Gate TAB IC Defect
Vertical Block
Source TAB IC Defect
Horizontal line
Gate TAB IC Defect
Gate TAB IC Defect
Un-repairable Cases
In this case please exchange the module.
Horizontal Block
Gate TAB IC Defect
Gate TAB IC Defect
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A – 5/5
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
B. Power error _No power
Content
Check front display LED
Established
date
Revised
date
2010. 2 .19
A17
Front LED control :
Menu Æ Option Æ Power Indicator
Æ Standby light ON
ST-BY condition: Red
Power ON condition: white
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A17
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
B. Power error _No power
Content
Check power input voltage and ST-BY 3.5V
Established
date
Revised
date
2011. 2 .07
A18
For ’11 models, there is no voltage out for st-by purpose.
When st-by, only 3.5V is normally on.
Check the 3.5V when st-by
24 Pin (Power Board ↔ Main Board)
FW20020-24SB (FOOSUNG)
Edge LED PSU without LED Driver
1
Power on
2
20V (24V)
3
20V (24V)
4
20V (24V)
5
GND
6
GND
7
GND
8
GND
9
3.5V
10
3.5V
11
3.5V
12
3.5V
13
GND
14
GND
15
GND
16
GND
17
12V
18
Inverter On/off
19
12V
20
Lamp : A-Dim
21
12V
22
PWM Dim #1
23
N.C
24
Error-out
Lamp PSU without inverter
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A18
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
Content
B. Power error _No power
Checking method when power is ON
Established
date
Revised
date
2011. 2 .07
A19
Check “power on” pin is high
24 Pin (Power Board ↔ Main Board)
FW20020-24SB (FOOSUNG)
Edge LED PSU without LED Driver
1
Power on
2
20V (24V)
3
20V (24V)
4
20V (24V)
5
GND
6
GND
7
GND
8
GND
9
3.5V
10
3.5V
11
3.5V
12
3.5V
13
GND
14
GND
15
GND
16
GND
17
12V
18
Inverter On/off
19
12V
20
Lamp : A-Dim
21
12V
22
PWM Dim #1
23
N.C
24
Error-out
Lamp PSU without inverter
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A19
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
B. Power error _Off when on, off whiling viewing Established
Content
POWER OFF MODE checking method
date
Revised
date
2011. 2 .07
A22
<ALL MODELS>
Entry method
1. Press the IN-START button of the remote
controller for adjustment
2. Check the entry into adjustment item 3
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A22
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
C. Audio error_No audio/Normal video
Content
Checking method in menu when there is no audio
Established
date
Revised
date
2011. 2 .07
A24
<ALL MODELS>
Checking method
1. Press the MENU button on the remote controller
2. Select the AUDIO function of the Menu
3. Select TV Speaker from Off to On
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A24
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
symptom
C. Audio error_No audio/Normal video
Content
Voltage and speaker checking method
when there is no audio
<ALL MODELS>
Established
date
Revised
date
2011. 2 .07
A25
①
②
Edge LED PSU without LED Driver
③
Checking order when there is no audio
① Check the contact condition of 20V or 24V connector of Main Board
② Measure the 24V input voltage supplied from Power Board
(If there is no input voltage, remove and check the connector)
③ Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the
GND and output terminal, the speaker is normal.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A25
LGE Internal Use Only
Standard Repair Process Detail Technical Manual
LCD TV
Error
D. Function error_ No response in remote controller,
symptom
key error
Content
Remote controller operation checking method
Established
date
Revised
date
2011. 2 .07
A27
<ALL MODELS>
3
4
1
2
1
2
3
4
5
6
7
8
9
P2401, P2402
EYEQ_SCL
EYEQ_SDA
GND
KEY1
KEY2
St 3.3V
GND
LED_B
IR
10
GND
11
Normal 3.3V
12
13
14
15
LED_R
GND
Soft Touch_SCL
Soft Touch_SDA
Checking order
1, 2. Check IR cable condition between IR & Main board.
3.
Check the st-by 3.3V on the terminal 6.
4. When checking the Pre-Amp when the power is in ON condition, it is normal when the
Analog Tester needle moves slowly, and defective when it does not move at all.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A27
LGE Internal Use Only