Download LED TV SERVICE MANUAL

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LED TV
SERVICE MANUAL
CHASSIS : LD33B
MODEL : 42LA64**
42LA64**-Z*
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67727105(1302-REV00)
Printed in Korea
CONTENTS
CONTENTS . ............................................................................................. 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS..................................................................... 4
SPECIFICATION........................................................................................ 6
ADJUSTMENT INSTRUCTION............................................................... 14
BLOCK DIAGRAM ................................................................................. 21
EXPLODED VIEW .................................................................................. 22
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-3-
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This specification is applied to the LED TV used LD33B
chassis.
3. Test method
2. Requirement for Test
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
Each part is tested as below without special appointment.
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
4. Model General Specification
No.
1
Item
Market
Specification
Remarks
DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) : 29 countries
Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria, France, Spain, Italy, Belgium, Luxemburg,
Greece, Czech, Croatia, Turkey, Moroco, Ireland, Latvia,
Estonia, Lithuania, Poland, Portugal, Romania, Albania,
Bosnia, Serbia, Slovakia, Beralus
EU(PAL Market-37Countries)
DTV (MPEG2/4, DVB-T2): 8 countries
UK(Ireland), Sweden, Denmark, Finland, Norway, Ukraine,
Kazakhstan, Russia
DTV (MPEG2/4, DVB-C): 37 countries
Germany, Netherland, Switzerland, Hungary, Austria,
Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia,
Luxemburg, Greece, Czech, Croatia, Turkey, Moroco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania,
Albania, Bosnia, Serbia, Slovakia, Beralus, UK, Sweden,
Denmark, Finland, Norway, Ukraine, Kazakhstan
DTV (MPEG2/4,DVB-S): 30 countries
Germany, Netherland, Switzerland, Hungary, Austria,
Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia,
Luxemburg, Greece, Czech, Croatia, Turkey, Moroco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania,
Albania, Bosnia, Serbia, Slovakia, Beralus
Supported satellite : 22 satellites
HISPASAT 1C/1D, ATLANTIC BIRD 2, NILESAT 101/102,
ATLANTIC BIRD 3, AMOS 2/3, THOR 5/6, IRIUS 4,
EUTELSAT-W3A, EUROBIRD 9A, EUTELSAT-W2A,
HOTBIRD 6/8/9, EUTELSAT-SESAT, ASTRA 1L/H/M/
KR, ASTRA 3A/3B, BADR 4/6, ASTRA 2D, EUROBIRD 3,
EUTELSAT-W7, HELLASSAT 2, EXPRESS AM1, TURKSAT 2A/3A, INTERSAT10
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-6-
LGE Internal Use Only
No.
2
3
4
Item
Broadcasting system
Program coverage
Receiving system
Specification
1) PAL-BG
2) PAL-DK
3) PAL-I/I’
4) SECAM-L/L', DK , BG, I
5) DVB-T
6) DVB-C
7) DVB-T2
8) DVB-S/S2
1 ) Digital TV
- VHF, UHF
- C-Band,Ku-Band
2) Analogue TV
- VHF : E2 to E12
- UHF : E21 to E69
- CATV : S1 to S20
- HYPER : S21 to S47
Remarks
Model : *L*V*-Z* (T2 only Model)
DVB-S: Satellite
► DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2 (Model : *L*V*-Z* (T2 only Model))
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
Analog : Upper Heterodyne
Digital : COFDM, QAM
► DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM
5
Scart (1EA)
PAL, SECAM
6
Video Input RCA(1EA)
PAL, SECAM, NTSC
7
Head phone out
8
Component Input (1EA)
9
HDMI Input (3EA)
10
Audio Input (3EA)
11
12
13
SDPIF out (1EA)
USB (1EA)
Ethernet Connect(1EA)
Antenna, AV1, AV2, Component, HDMI1,
HDMI2, HDMI3, USB1, USB2, USB3
Y/Cb/Cr
Y/Pb/Pr
HDMI1-DTV
HDMI2-DTV
HDMI3-DTV
DVI Audio
Component/AV2
AV1
SPDIF out
EMF, DivX HD, For SVC (download)
Ethernet Connect
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-7-
► DVB-S/S2
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
Scart 1 Jack is Full scart and support ATV/DTV-OUT
(not support DTV Auto AV)
4 System : PAL, SECAM, NTSC, PAL60
Common port
Hybrid Type
HDMI1: PC support(HDMI version 1.3)
Support HDCP
L/R Input.
JPEG, MP3, DivX HD
LGE Internal Use Only
5. Component Video Input (Y, Pb, Pr)
No.
Resolution
H-freq(kHz)
V-freq(Hz)
Pixel clock
1.
720×480
15.73
60.00
SDTV, DVD 480i
2.
720×480
15.63
59.94
SDTV, DVD 480i
3.
720×480
31.47
59.94
480p
4.
720×480
31.50
60.00
480p
5.
720×576
15.625
50.00
SDTV 576i
6.
720×576
31.25
50.00
SDTV 576p
7.
1280×720
45.00
50.00
HDTV 720p
8.
1280×720
44.96
59.94
HDTV 720p
9.
1280×720
45.00
60.00
HDTV 720p
10.
1920×1080
31.25
50.00
HDTV 1080i
11.
1920×1080
33.75
60.00
HDTV 1080i
12.
1920×1080
33.72
59.94
HDTV 1080i
13.
1920×1080
56.250
50
HDTV 1080p
14.
1920×1080
67.5
60
HDTV 1080p
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
6. HDMI Input
6.1. DTV mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1.
640*480
2.
720*480
31.469 / 31.5
59.94/60
SDTV 480P
31.469 / 31.5
59.94 / 60
SDTV 480P
3.
4.
720*576
31.25
50
SDTV 576P
720*576
15.625
50
SDTV 576I
5.
1280*720
6.
1280*720
37.500
50
HDTV 720P
44.96 / 45
59.94 / 60
HDTV 720P
7.
1920*1080
8.
1920*1080
33.72 / 33.75
59.94 / 60
HDTV 1080I
28.125
50.00
HDTV 1080I
26.97 / 27
23.97 / 24
HDTV 1080P
25
HDTV 1080P
29.976 / 30.00
HDTV 1080P
9.
1920*1080
10.
1920*1080
11.
1920*1080
12.
1920*1080
56.250
50
HDTV 1080P
13.
1920*1080
67.43 / 67.5
59.94 / 60
HDTV 1080P
33.716 / 33.75
6.2. PC mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
1
640 x 350 @70Hz
31.468
70.09
EGA
2
720 x 400 @70Hz
31.469
70.08
DOS
3
640 x 480 @60Hz
31.469
59.94
VESA(VGA)
4
800 x 600 @60Hz
37.879
60.31
VESA(SVGA)
5
1024 x 768 @60Hz
48.363
60.00
VESA(XGA)
6
1152 x 864 @60Hz
54.348
60.053
VESA
7
1280 x 1024 @60Hz
63.981
60.020
VESA(SXGA)
8
1360 x 768 @60Hz
47.712
60.015
VESA(WXGA)
67.5
60.00
WUXGA(Reduced Blanking)
25
HDTV 1080P
9
1920 x 1080 @60Hz
10.
1920*1080
11.
1920*1080
33.716 / 33.75
29.976 / 30.00
HDTV 1080P
12.
1920*1080
56.250
50
HDTV 1080P
13.
1920*1080
67.43 / 67.5
59.94 / 60
HDTV 1080P
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
7. 3D Mode
7.1. HDMI 1.4b (3D supported mode automatically)
No.
Resolution
1
2
640*480
3
4
5
720*480
6
7
8
720*576
9
10
11
720*576
12
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
VIC
3D input proposed mode
Proposed
31.469 / 31.5
59.94/ 60
25.125
1
Top-and-Bottom
Side-by-side(half)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
62.938/63
59.94/ 60
50.35/50.4
1
Frame packing
Line alternative
Secondary(SDTV 480P)
(SDTV 480P)
31.469 / 31.5
59.94/ 60
50.35/50.4
1
Side-by-side(Full)
(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
31.469 / 31.5
59.94 / 60
27.00/27.03
2,3
Top-and-Bottom
Side-by-side(half)
62.938/63
59.94 / 60
54/54.06
2,3
Frame packing
Line alternative
Secondary(SDTV 480P)
(SDTV 480P)
31.469 / 31.5
59.94 / 60
54/54.06
2,3
Side-by-side(Full)
(SDTV 480P)
Secondary(SDTV 576P)
Secondary(SDTV 576P)
31.25
50
27
17,18
Top-and-Bottom
Side-by-side(half)
62.5
50
54
17,18
Frame packing
Line alternative
Secondary(SDTV 576P)
(SDTV 576P)
31.25
50
54
17,18
Side-by-side(Full)
(SDTV 576P)
Secondary(SDTV 576I)
Secondary(SDTV 576I)
15.625
50
27
21
Top-and-Bottom
Side-by-side(half)
31.25
50
54
21
Frame packing
Field alternative
Secondary(SDTV 576I)
(SDTV 576I)
15.625
50
54
21
Side-by-side(Full)
(SDTV 576I)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
(HDTV 720P)
13
37.500
50
74.25
19
Top-and-Bottom
Side-by-side(half)
14
75
50
148.5
19
Frame packing
Line alternative
37.500
50
148.5
19
Side-by-side(Full)
(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
(HDTV 720P)
15
1280*720
16
44.96 / 45
59.94 / 60
74.18/74.25
4
Top-and-Bottom
Side-by-side(half)
17
89.91/90
59.94 / 60
148.35/148.5
4
Frame packing
Line alternative
18
44.96 / 45
59.94 / 60
148.35/148.5
4
Side-by-side(Full)
(HDTV 720P)
19
33.72 / 33.75
59.94 / 60
74.18/74.25
5
Top-and-Bottom
Side-by-side(half)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
20
67.432 / 67.50
59.94 / 60
148.35/148.5
5
Frame packing
Field alternative
Primary(HDTV 1080I)
(HDTV 1080I)
33.72 / 33.75
59.94 / 60
148.35/148.5
5
Side-by-side(Full)
(HDTV 1080I)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
21
1920*1080
28.125
50.00
74.25
20
Top-and-Bottom
Side-by-side(half)
23
56.25
50.00
148.5
20
Frame packing
Field alternative
Primary(HDTV 1080I)
(HDTV 1080I)
24
28.125
50.00
148.5
20
Side-by-side(Full)
(HDTV 1080I)
25
26.97 / 27
23.97 / 24
74.18/74.25
32
Top-and-Bottom
Side-by-side(half)
Primary(HDTV 1080P)
Primary(HDTV 1080P)
26
43.94/54
23.97 / 24
148.35/148.5
32
Frame packing
Line alternative
Primary(HDTV 1080P)
(HDTV 1080P)
27
26.97 / 27
23.97 / 24
148.35/148.5
32
Side-by-side(Full)
(HDTV 1080P)
Secondary(HDTV 1080P)
Secondary(HDTV 1080P)
22
28
28.125
25
74.25
33
Top-and-Bottom
Side-by-side(half)
29
56.24
25
148.5
33
Frame packing
Line alternative
Secondary(HDTV 1080P)
(HDTV 1080P)
28.12
25
148.5
33
Side-by-side(Full)
(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Primary(HDTV 1080P)
(HDTV 1080P)
30
1920*1080
31
33.716 / 33.75
29.976 / 30.00
74.18/74.25
34
Top-and-Bottom
Side-by-side(half)
32
67.432 / 67.5
29.976 / 30.00
148.35/148.5
34
Frame packing
Line alternative
33
33.716 / 33.75
29.976 / 30.00
148.35/148.5
34
Side-by-side(Full)
(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
34
56.250
50
148.5
31
Top-and-Bottom
Side-by-side(half)
35
67.43 / 67.5
59.94 / 60
148.35/148.50
16
Top-and-Bottom
Side-by-side(half)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 10 -
LGE Internal Use Only
7.2. HDMI Input(1.3)
No.
Resolution
H-freq(kHz) V-freq.(kHz)
Pixel clock(MHz)
Proposed
1
1280*720
45.00
60.00
74.25
HDTV 720P
2
1280*720
37.500
50
74.25
HDTV 720P
3
1920*1080
33.75
60.00
74.25
HDTV 1080I
4
1920*1080
28.125
50.00
74.25
HDTV 1080I
5
1920*1080
27.00
24.00
74.25
HDTV 1080P
6
1920*1080
28.12
25
74.25
HDTV 1080P
7
1920*1080
33.75
30.00
74.25
HDTV 1080P
8
1920*1080
67.50
60.00
148.5
HDTV 1080P
9
1920*1080
56.25
50
148.5
HDTV 1080P
3D input proposed mode
2D to 3D, Side by Side(half),
Top & Bottom, Single Frame Sequential
2D to 3D, Side by Side(half),
Top & Bottom
2D to 3D, Side by Side(Half),
Top & Bottom, Checker Board
2D to 3D, Side by Side(half),
Top & Bottom, Checkerboard,
Single Frame Sequential,
Row Interleaving, Column Interleaving
7.3. RF Input(3D supported mode manually)
No.
Resolution
Proposed
3D input proposed mode
1
HD
1080I
720P
2D to 3D
Side by Side(Half)
Top & Bottom
2
SD
576P
576I
2D to 3D
7.4. RF Input (3D supported mode automatically)
No.
Signal
1
Frame Compatible
3D input proposed mode
Side by Side(Half),
Top & Bottom
7.5. USB Input (3D supported mode manually)
No.
1
Resolution
1920*1080
Others
H-freq(kHz)
33.75
-
V-freq.(Hz)
30
-
Pixel clock(MHz)
Proposed
3D input proposed mode
74.25
HDTV 1080P
2D to 3D, Side by Side(Half)*,
Top & Bottom*, Checkerboard*,
Row Interleaving, Column Interleaving
(Photo : side by Side(half), Top & Bottom)
-
640*350
720*400
640*480
800*600
1152*864
1280*1024
2D to 3D
(“*” 3D supported mode manually & automatically)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 11 -
LGE Internal Use Only
7.6. HDMI-PC Input (3D supported mode manually)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
3D input proposed mode
Proposed
1
1024*768
48.36
60
65
2D to 3D, Side by Side(half)
Top & Bottom
2
1360*768
47.71
60
85.5
2D to 3D, Side by Side(half)
Top & Bottom
HDTV 768P
148.50
2D to 3D, Side by Side(half)
Top & Bottom, Checker Board,
Single Frame Sequential,
Row Interleaving,
Column Interleaving
HDTV 1080P
2D to 3D
640*350
720*400
640*480
800*600
1152*864
3
4
1920*1080
67.500
Others
60
-
-
-
HDTV 768P
7.7. DLNA Input (3D supported mode manually)
No.
1
Resolution
1920*1080
H-freq(kHz)
33.75
V-freq.(Hz)
30
Pixel clock(MHz)
Proposed
3D input proposed mode
2D to 3D, Side by Side(Half)*,Top &
Bottom*,Checker Board*, Row Interleaving, Column Interleaving(Photo : Side by
Side(Half), Top&Bottom)
74.25
(“*” 3D supported mode manually & automatically)
7.8. Component Input(3D) (3D supported mode manually)
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock
Proposed
1
1280*720
45.00
60.00
74.25
HDTV 720P
2
1280*720
37.500
50
74.25
HDTV 720P
3
1920*1080
33.75
60.00
74.25
HDTV 1080I
4
1920*1080
28.125
50.00
74.25
HDTV 1080I
5
1920*1080
27.00
24.00
74.25
HDTV 1080P
6
1920*1080
28.12
25
74.25
HDTV 1080P
7
1920*1080
33.75
30.00
74.25
HDTV 1080P
8
1920*1080
67.50
60.00
148.5
HDTV 1080P
9
1920*1080
56.250
50
148.5
HDTV 1080P
3D input proposed mode
2D to 3D, Side by Side(Half), Top & Bottom
7.9. 3D Input mode
No.
Side by Side
Top & Bottom
ii.
iii.
Checker board
Single Frame
Sequential
Frame
Packing
2D to 3D
1
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
iv.
- 12 -
v.
vi.
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LED TV with
LD33B chassis.
3.2. LAN Inspection
3.2.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
2. Designation
(1) Because this is not a hot chassis, it is not necessary to
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15.
3.2.2. LAN inspection solution
▪ LAN Port connection with PCB
▪ Setting automatic IP
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours.
In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
▪ If you want manual connection, enter Network connection at
MENU Mode of TV. Press Start connection key, then
Network will be connected.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3. Automatic Adjustment
3.1. M
AC address D/L, CI+ key D/L, Widevine
key D/L, ESN D/L, HDCP14/20 D/L
Connect: USB port
Communication Prot connection
▪ Com 1,2,3,4 and 115200(Baudrate)
Mode check: Online Only
▪ Check the test process: DETECT -> MAC -> CI -> Widevine
-> ESN -> HDCP14 -> HDCP20
▪ Play: Press Enter key
▪ Result: Ready, Test, OK or NG
▪ Printer Out (MAC Address Label)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 13 -
▪ Setting state confirmation
- If automatic setting is finished, you confirm IP and MAC
Address at ‘in start’ menu mode.
LGE Internal Use Only
3.2.3. WIDEVINE key Inspection
- Confirm key input data at the "IN START" MENU Mode.
3.4. Model name & Serial number Download
3.4.1. Model name & Serial number D/L
Press "P-ONLY" key of service remote control.
(Baud rate : 115200 bps)
▪ Connect RS-232C Signal to USB Cable to USB.
▪ Write Serial number by use USB port.
▪ Must check the serial number at Instart menu.
▪
3.4.2. Method & notice
(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always)
It is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "7.Model Number D/L" like below photo.
3) Input the Factory model name(ex 42LA690V-ZA) or Serial
number like photo.
3.3. LAN PORT INSPECTION(PING TEST)
Connect SET → LAN port == PC → LAN Port
SET
PC
3.3.1. Equipment setting
(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
3.3.2. LAN PORT inspection(PING TEST)
(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.
4) Check the model name Instart menu. → Factory name
displayed. (ex 42LA690V-ZA)
5) C heck the Diagnostics.(DTV country only) → Buyer
model displayed. (ex 42LA690V-ZA)
3.5. CI+ Key checking method
- Check the Section 3.1
Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).
=> Check the Download to CI+ Key value in LGset.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 14 -
LGE Internal Use Only
4. Manual Adjustment
3.5.1. Check the method of CI+ Key value
(1) Check the method on Instart menu
(2) Check the method of RS232C Command
1) Into the main ass’y mode(RS232: aa 00 00)
CMD 1
CMD 2
Data 0
A
A
0
* ADC adjustment is not needed because of OTP(Auto ADC
adjustment)
0
2) Check the key download for transmitted command
(RS232: ci 00 10)
CMD 1
CMD 2
C
I
4.1. EDID DATA
4.1.1. 3D EDID
Data 0
1
0
3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx
3.5.2. Check the method of CI+ key value(RS232)
1) Into the main ass’y mode(RS232: aa 00 00)
CMD 1
CMD 2
Data 0
A
A
0
▪ Reference
- HDMI1 ~ HDMI4 / RGB
- In the data of EDID, bellows may be different by S/W or
Input mode.
ⓐ Product ID
0
2) Check the mothed of CI+ key by command
(RS232: ci 00 20)
CMD 1
CMD 2
C
I
Data 0
2
HEX
0001
0001
0
3) Result value
i 01 OK 1d1852d21c1ed5dcx
3.6. WIFI MAC ADDRESS CHECK
(1) Using RS232 Command
Transmission
V-freq.(Hz)
[A][I][][Set ID][][20][Cr]
[O][K][X] or [NG]
DDC Function
Analog
Digital
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ → ‘01’
Year : ‘2013’ → ‘17’
ⓓ Model Name(Hex): LGTV
CI+ Key Value
H-freq(kHz)
EDID Table
0100
0100
Chassis
MODEL NAME(HEX)
LD33B
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓔ1
(2) Check the menu on in-start
HDMI1
HDMI2
HDMI3
E8
E8
E8
ⓔ2
10bit
/none XvYcc
85
75
65
ⓔ2
8bit
/none XvYcc
CC
BC
AC
ⓔ3
X
X
X
ⓕ Vendor Specific(HDMI)
1) Deep color (module 10bit)
INPUT
MODEL NAME(HEX)
HDMI1
78 03 0C 00 10 00 B8 2D 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
HDMI2
78 03 0C 00 20 00 B8 2D 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
HDMI3
78 03 0C 00 30 00 B8 2D 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
2) None deep color (module 8bit)
INPUT
MODEL NAME(HEX)
HDMI1
78 03 0C 00 10 00 80 1E 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
HDMI2
78 03 0C 00 20 00 80 1E 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
HDMI3
78 03 0C 00 30 00 80 1E 20 C0 0E 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
ⓖ Colorimetry Data Block(HDMI)
1) The Model not supporting XvYcc
INPUT
HDMI1
HDMI2
HDMI3
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 15 -
MODEL NAME(HEX)
E3 05 00 00
E3 05 00 00
E3 05 00 00
LGE Internal Use Only
4.1.2. 2D EDID
4.2.3. Equipment connection MAP
Co lo r Analyzer
RS -232C
Probe
Co m p ut er
RS -232C
RS -232C
Pat t ern Generat o r
Signal Source
* If TV internal pattern is used, not needed
▪ Reference
- HDMI1 ~ HDMI4 / RGB
- In the data of EDID, bellows may be different by S/W or
Input mode.
ⓐ Product ID
HEX
0001
0001
EDID Table
0100
0100
4.2.4. Adj. Command (Protocol)
DDC Function
Analog
Digital
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ → ‘01’
Year : ‘2012’ → ‘16’
ⓓ Model Name(Hex): LGTV
Chassis
LD33B
HDMI1
HDMI2
HDMI3
ⓔ3
X
X
X
A
CMD
A
00
A
VAL
A
CS STOP
Explantion
wb
00
00
Begin White Balance adjustment
wb
00
10
Gain adjustment(internal white pattern)
wb
00
1f
Gain adjustment completed
wb
00
20
Offset adjustment(internal white pattern)
wb
00
2f
Offset adjustment completed
wb
00
ff
End White Balance adjustment
(internal pattern disappears )
wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f → Gain adj. completed
*(wb 00 20(Start), wb 00 2f(end)) → Off-set adj.
wb 00 ff → End white balance auto-adj.
MODEL NAME(HEX)
67 03 0C 00 10 00 80 2D
67 03 0C 00 20 00 80 2D
67 03 0C 00 30 00 80 2D
4.2. White Balance Adjustment
4.2.1. Overview
▪ W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel's W/B deviation
(2) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.
(3) Adjustment condition : normal temperature
1) Surrounding Temperature : 25 °C ± 5 °C
2) Surrounding Humidity : 20 % ~ 80 %
4.2.2. Equipment
(1) Color Analyzer: CA-210 (LED Module : CH 14)
(2) Adjustment Computer(During auto adj., RS-232C protocol
is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model: 217, Pattern: 78)
→ Only when internal pattern is not available
▪ Color Analyzer Matrix should be calibrated using CS-1000.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A LEN A 03
Ex)
ⓕ Vendor Specific(HDMI)
INPUT
HDMI1
HDMI2
HDMI3
50
RS-232C COMMAND
[CMD
ID
DATA]
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓔ2
15
05
F5
A
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
▪ RS-232C Command used during auto-adjustment.
MODEL NAME(HEX)
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
ⓔ1
43
43
43
<Command Format>
START 6E
- 16 -
▪ Adj. Map
Applied Model : LD33B Chassis ALL MODELS
Adj. item
Cool
Medium
Warm
R Gain
G Gain
B Gain
R Cut
G Cut
B Cut
R Gain
G Gain
B Gain
R Cut
G Cut
B Cut
R Gain
G Gain
B Gain
R Cut
Command
(lower caseASCII)
CMD1
CMD2
j
g
j
h
j
i
Data Range
(Hex.)
MIN
MAX
00
C0
00
C0
00
C0
j
j
j
a
b
c
00
00
00
C0
C0
C0
j
j
j
d
e
f
00
00
00
C0
C0
C0
Default
(Decimal)
G Cut
LGE Internal Use Only
4.2.5. Adj. method
(1) Auto adj. method
1) Set TV in adj. mode using POWER ON key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable.(RS-232C to USB)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
▪ Standard color coordinate and temperature using CA-210(CH 14)
▪ Adjustment condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer(CA-210) probe should be within 10 cm
and perpendicular of the module surface (80° ~ 100°)
3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.
4.2.6. Reference (White balance Adj. coordinate and
color temperature)
▪ Luminance : 204 Gray
▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)
Coordinate
Mode
Temp
∆uv
x
y
Cool
0.269
0.273
13000 K
0.0000
0.285
0.293
9300 K
0.0000
Warm
0.313
0.329
6500 K
0.0000
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
x
y
Temp
∆uv
Cool
0.269 ± 0.002
0.273 ± 0.002
13000 K 0.0000
Medium
0.285 ± 0.002
0.293 ± 0.002
9300 K
0.0000
Warm
0.313 ± 0.002
0.329 ± 0.002
6500K
0.0000
4.2.7. ALELF & EDGE LED White balance table
(2) Manual adjustment. method
1) Set TV in Adj. mode using POWER ON.
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10 cm of the
surface.
3) Press ADJ key → EZ adjust using adj. R/C → 7. WhiteBalance then press the cursor to the right(key ►).
(When right key(►) is pressed 204 Gray internal pattern
will be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adjustment is performed in COOL, MEDIUM, WARM 3
modes of color temperature.
▪ If internal pattern is not available, use RF input. In EZ Adj.
menu 7.White Balance, you can select one of 2 Testpattern: ON, OFF. Default is inner(ON). By selecting OFF,
you can adjust using RF signal in 204 Gray pattern.
Medium
Coordinate
Mode
- 17 -
- EDGE LED module change color coordinate because of
aging time.
- Apply under the color coordinate table, for compensated
aging time.
* Normal Line
[LN5xxx, LA6xxx, LA7xxx, LA8xxx]
NC4.0
Aging
time
(Min)
1
2
3
4
5
6
7
8
9
0-2
3-5
6-9
10-19
20-35
36-49
50-79
80-119
Over 120
Cool
X
y
271
270
283
287
282
285
281
284
279
281
277
277
275
274
273
272
272
271
271
270
Medium
x
y
286
289
298
306
297
304
296
303
294
300
292
296
290
293
288
291
287
290
286
289
Warm
x
y
313
329
322
342
321
340
320
339
318
336
316
332
314
329
312
327
311
326
310
325
Medium
x
y
286
289
297
304
293
299
290
294
287
291
284
288
283
286
282
285
281
283
280
282
Warm
x
y
313
329
321
340
317
335
314
330
311
327
308
324
307
322
306
321
305
319
304
318
*Aging Chamber
[LN5xxx, LA6xxx, LA7xxx, LA8xxx]
NC4.0
Aging
time
(Min)
1
2
3
4
5
6
7
8
9
0-5
6-10
11-20
21-30
31-40
41-50
51-80
81-119
Over 120
Cool
X
y
271
270
282
285
278
280
275
275
272
272
269
269
268
267
267
266
266
264
265
263
LGE Internal Use Only
4.3. Local Dimming Function Check
(2) When 3D OSD appear automatically, then select OK key.
Step 1) Turn on TV.
Step 2) At the Local Dimming mode, module Edge Backlight
moving right to left Back light of IOP module moving.
Step 3) Confirm the Local Dimming mode.
Step 4) Press "exit" key.
(3) Don't wear a 3D Glasses, check the picture like below.
4.6. Wi-Fi Test
4.4. Magic Motion Remote control test
- R esults are automatically marked in Instart OSD after
through the AP/Magic Remocon Equipment on the line
Step 1) Turn on TV
Step 2) Select Network Connection option in Network Menu.
Step 3) Select Start Connection button in Network Connection.
Step 4) If the system finds any AP like blow PIC, it is working
well.
4.5. 3D function test
(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
(1) Please input 3D test pattern like below.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 18 -
LGE Internal Use Only
4.7. LNB voltage and 22KHz tone check
(only for DVB-S/S2 model)
▪ Test method
(1) Set TV in Adj. mode using POWER ON.
(2) Connect cable between satellite ANT and test JIG.
(3) Press Yellow key(ETC+SWAP) in Adj Remote control to
make LNB on.
(4) Check LED light ‘ON’ at 18 V menu.
(5) Check LED light ‘ON’ at 22 KHz tone menu.
(6) Press Blue key(ETC+PIP INPUT) in Adj Remote control
to make LNB off.
(7) Check LED light ‘OFF’ at 18 V menu.
(8) Check LED light ‘OFF’ at 22 KHz tone menu.
7. GND and Internal Pressure check
7.1. Method
(1) GND & Internal Pressure auto-check preparation
- Check that Power cord is fully inserted to the SET.
(If loose, re-insert)
(2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
▪ Test result
(1) After press LNB On key, ‘18 V LED’ and ‘22 KHz tone
LED’ should be ON.
(2) After press LNB OFF key, ‘18 V LED’ and ‘22 KHz tone
LED’ should be OFF.
4.8. Option selection per country
7.2. Checkpoint
4.8.1. Overview
▪ TEST voltage
- GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
▪ TEST time: 1 second
▪ TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
▪ LEAKAGE CURRENT: At 0.5 mArms
- Option selection is only done for models in Non-EU
4.8.2. Method
(1) Press ADJ key on the Adj. R/C, then select Country Group
Meun
(2) Depending on destination, select Country Group Code 04
or Country Group EU then on the lower Country option,
select US, CA, MX. Selection is done using +, - or ►◄
key.
5. Tool Option selection
▪ Method : Press "ADJ" key on the Adjustment remote control,
then select Tool option.
8. Audio
6. Ship-out mode check(In-stop)
▪ After final inspection, press "IN-STOP" key of the Adjustment
remote control and check that the unit goes to Stand-by
mode.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 19 -
Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms
(3) RGB PC: 1 KHz sine wave signal 0.7 Vrms
No.
Item
Min
Typ
Max
Unit
9
10
12
W
1.
Audio practical
max Output, L/R
(Distortion=10%
max Output)
8.10
10.8
Vrms
2.
Speaker (8Ω
Impedance)
10
12
W
9
Remark
EQ Off
AVL Off
Clear Voice Off
LGE Internal Use Only
9. USB S/W Download(Service only)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
- I f your downloaded program version in USB Stick is
Lower, it didn’t work.
B ut your downloaded version is Higher, USB data is
automatically detecting (Download Version High & Power
only mode, Set is automatically Download)
(3) Show the message “Do not unplug!”
(4) Updating is starting.
(5) Updating Completed, The TV will restart automatically
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust Tool Option again.
(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 20 -
LGE Internal Use Only
R
E
A
DVB-S
R
(H)
Air/
Cable
T/C/S2 Tuner
LNB
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 21 R
E
A
R
S
I
D
E
S
I
D
E
SPDIF OUT
ETHERNET
OPTIC
LAN
CVBS/YPbPr
HDMI
MUX
USB
CVBS/RGB
AMP
OCP
MHL
IC
OCP
OCP
P_TS
LGE2122
T/C Demod
Analog Demod
P_TS
X_TAL
SCART
AV/COMP
H/P
(MHL)
HDMI3
HDMI2
HDMI1
USB2
USB3
USB1
(HDD)
P_TS
IF (+/-)
P_TS
CI Slot
A
LEVEL
SHIFTER
USB_WIFI
X_TAL
Sub Micom
IR
LOGO LIGHT
KEY
WIFI
BLUTOOTH
Audio AMP
PM
IC
UART
50P
50P
eMMC
SYSTEM EEPROM
DDR3
LOCAL DIMMING
B
SPI
EPI
DDR3
SUB
ASSY
BLOCK DIAGRAM
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
510
900
120
540
300
* Set + Stand
* Stand Base + Body
A7
A2
301
501
500
590
A10
200
AG1
AT1
310
820
121
530
LV1
410
521
400
570
910
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 22 -
LGE Internal Use Only
EAX64797001* : LD33B
EAX64872101* : LA33B
X-TAL
IC100-*1
M24256-BRMN6TP
NVRAM
+3.3V_NORMAL
E0
E1
E2
R101
4.7K
R102
4.7K
OPT
R100
IC100
AT24C256C-SSHL-T
VSS
8
2
7
3
6
4
5
VCC
A0
WC
A1
SCL
A2
SDA
VSS
NVRAM_ST
A0
4.7K
OPT
+3.3V_NORMAL
1
IC100-*2
R1EX24256BSAS0A
A1
A2
1
8
2
7
3
6
1
8
2
7
3
6
4
5
X-TAL_1
1
C114
GND_1
1.0pF
2
50V DVB_1pF
MT5398_XTAL_IN
Close to eMMC Flash
(IC8100)
GND_2
4
X-TAL_2
3
EMMC_CLK
WP
R168
10K
MT5398_XTAL_OUT
C115
1.0pF
50V
C114-*1
2.7pF
50V
ATSC_2.7pF
VCC
SCL
X100
27MHz
C115-*1
2.7pF
50V
ATSC_2.7pF
DVB_1pF
SDA
NVRAM_RENESAS
VCC
Write Protection
WP
- Low : Normal Operation
- High : Write Protection
SCL
R135
33
SDA
R134
33
IC105
LGE2122[A2_M13]
VDD3V3
I2C_SCL5
+3.3V_NORMAL
I2C_SDA5
NVRAM_ATMEL
AK10
L/DIM0_MOSI
AK11
L/DIM0_SCLK
AL9
AJ11
AJ12
L/DIM0_VS
HDCP EEPROM
OSDA0
+3.3V_NORMAL
AH10
7
3
6
VSS 4
5
AVDD_33SB
WC
SCL
SDA
R125
4.7K
OPT
R126
22
OPT
R127
22
STRAPPING
I2C_SCL1
LED_PWM0
LED_PWM1
OPCTRL3
1
0
0
0
ICE mode + 27M + ROM to Nand boot
1
0
0
1
U1RX
AM29
AL29
C111
0.1uF
OSDA0
POWE
POOE
POCE1
OSDA1
POCE0
OSCL1
PDD7
PDD6
XTALI
PDD5
XTALO
PDD4
Wake On Lan
PDD3
AVDD33_XTAL_STB
PDD2
AVSS33_XTAL_STB
PDD1
PDD0
I2C_SDA1
OPT
+3.3V_NORMAL
R155
1K
OPT
R162
1K
R157
1K
ICE mode + 27M + ROM to 60bit ECC Nand boot
1
0
1
0
ICE mode + 27M + ROM to eMMC boot from
EMMC pins (share pins w/s NAND)
1
0
1
1
ICE mode + 27M + ROM to eMMC
Boot from SDIO pins
R163
1K
1
1
0
PARB
AVDD_33SB
PACLE
AN17
C110
0.1uF
AL17
PAALE
AVDD33_VGA_STB
AVSS33_AVSS33_VGA_STB
AL26
C109
0.1uF
AC21
H21
OPT
I2C
:
:
:
:
:
:
R133
2.7K
R138
2.7K
R141
2.7K
R142
2.7K
R147
2.7K
R150
2.7K
R151
2.7K
R152
2.7K
NON_TU_Q_KR
R132
2.7K
R161
1K
TU_N_TW/BR
1.2K
R120
33
STB_SDA
R115
33
I2C_SDA1
OPCTRL_11_SCL
R116
33
I2C_SCL2
R117
33
I2C_SDA2
OSCL1
R118
33
OSDA1
R119
33
OSCL2
R110
33
I2C_SCL4
OSDA2
R111
33
I2C_SDA4
R153-*2
SOC -> CI SLOT
B30
A31
CI_ADDR[2]
B31
CI_ADDR[3]
A32
CI_ADDR[4]
C30
CI_ADDR[5]
A33
CI_ADDR[6]
B32
CI_ADDR[7]
C31
CI_ADDR[8]
E30
CI_ADDR[9]
F29
MT5398_MCLKI
MT5398_MIVAL_ERR
CI_ADDR[10]
F27
CI_ADDR[11]
F28
MT5398_MISTRT
CI_ADDR[12]
C32
CI_ADDR[13]
F30
CI_ADDR[14]
F32
SOC -> CI SLOT
I2C_SCL_MICOM
D30
MT5398_TS_OUT[0-7]
I2C_SDA_MICOM
D32
F31
MT5398_TS_OUT[0]
F33
R112
33
I2C_SCL5
MT5398_TS_OUT[1]
E31
OSDA0
R113
33
I2C_SDA5
MT5398_TS_OUT[2]
E32
OPCTRL_1_SCL
R114
33
I2C_SCL6
MT5398_TS_OUT[3]
D31
OPCTRL_0_SDA
R109
33
I2C_SDA6
MT5398_TS_OUT[4]
D33
MT5398_TS_OUT[5]
E29
MT5398_TS_OUT[6]
C33
MT5398_TS_OUT[7]
B33
CI_DATA[0-7]
CI_DATA[0]
A30
CI_DATA[1]
E28
CI_DATA[2]
C29
CI_DATA[3]
J28
CI_DATA[4]
H29
CI_DATA[5]
J26
CI_DATA[6]
G30
CI_DATA[7]
G27
E27
MT5398_TS_IN[0]
D29
MT5398_TS_IN[1]
MTK_EPI
R149
4.7K
DDR_0.78G
R146
4.7K
MTK_DVB_S_TUNER
R145
4.7K
MTK_DVB_T2_TUNER
R140
4.7K
MTK_CP_BOX
R137
4.7K
MTK_DDR_1.25GB
R131
4.7K
MODULE_V13
R130
4.7K
MTK_FHD
R108
4.7K
FRC_120Hz
R106
4.7K
Country_TW
R105
4.7K
Country_AJJA
R123
4.7K
Model Option
CI SLOT -> SOC
D28
MT5398_TS_IN[2]
MT5398_TS_IN[3]
H28
J27
MT5398_TS_IN[4]
HIGH
LOW
MODEL_OPT_0
MODEL_OPT_0
Country_TW
TW
MODEL_OPT_1
FRC
MODEL_OPT_2
Panel
FRC(120Hz) No FRC(60Hz)
MODEL_OPT_2
FHD
HD
MODEL_OPT_3
MODEL_OPT_3 Country_AJJA
AJJA
Non_AJJA
Module
V13
V12
MODEL_OPT_5
DDR
DDR_1.25G
MODEL_OPT_7
MODEL_OPT_6
CP BOX
Enable
MODEL_OPT_8
MODEL_OPT_7
T2 Tuner
Support
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
MODEL_OPT_4
G29
MT5398_TS_IN[5]
GPIO45(EMMC_RST) is dedicated to reset
EMMC for improving A1’s leakage current
G31
MT5398_TS_IN[6]
MT5398_TS_IN[7]
Non_TW
MODEL_OPT_1
/S2_RESET
G28
/USB_OCD2
B28
/USB_OCD1
K28
/USB_OCD3
E25
D21
EMMC_RST
USB_CTL1
G23
C28
#SIL_RESET
EPI_LOCK6
DDR_1.5G
CTS
RTS
Disable
MODEL_OPT_8
MODEL_OPT_9
DDR
DDR_0.78G
MODEL_OPT_10
EPI
Support
MODEL_OPT_7
Not Support
NON_DDR_0.78G
MODEL_OPT_5
MODEL_OPT_6
NON_EU
R169
10K
Not Support
R170
F24
AB8
AA7
AD6
AC8
AC7
AB6
AC6
CAM_SLIDE_DET
R188
4.7K
D23
C24
C25
WOL/ETH_POWER_ON
R187
4.7K
OPT +3.3V_NORMAL
CAM_SLIDE_DET
A26
EMMC_DATA[1]
B26
EMMC_DATA[0]
C21
EMMC_CLK
R158
R189
10K
OPT
R186
SOC_RESET
C117
0.1uF
16V
C20
FSRC_WR
AL14
STB_SCL
AN16
STB_SCL
AK15
STB_SDA
STB_SDA
R193
AE14
4.7K
POR_BND
AH23
MODEL_OPT_0
M_RFModule_RESET
DDR_1.25G
DDR_1.5G
DDR_0.768G
OPC_EN
/TU_RESET1
High
Low
High
Low
Low
High
MODEL_OPT_4
P30
GPIO0
DEMOD_RST
GPIO1
DEMOD_TSCLK
GPIO2
DEMOD_TSDATA0
GPIO3
DEMOD_TSDATA1
GPIO4
DEMOD_TSDATA2
GPIO5
DEMOD_TSDATA3
GPIO6
DEMOD_TSDATA4
GPIO7
DEMOD_TSDATA5
GPIO8
DEMOD_TSDATA6
GPIO9
DEMOD_TSDATA7
GPIO10
DEMOD_TSSYNC
GPIO11
DEMOD_TSVAL
GPIO12
GPIO13
CI_TSCLK
GPIO15
CI_TSDATA0
GPIO16
CI_TSSYNC
GPIO17
CI_TSVAL
GPIO18
GPIO19
D100
1N4148W
R196
240
Q100 +3.3V_NORMAL
PMV48XP
100V
G
/S2_RESET
AD28
AF22
AK21
AG24
AM18
R27
PVR_TSVAL
GPIO21
PVR_TSSYNC
GPIO22
PVR_TSDATA0
GPIO23
PVR_TSDATA1
GPIO24
SPI_CLK1
GPIO26
SPI_CLK
GPIO27
SPI_DATA
GPIO28
SPI_CLE
GPIO29
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
T26
T27
FE_DEMOD1_TS_DATA[2]
P26
FE_DEMOD1_TS_DATA[3]
R28
FE_DEMOD1_TS_DATA[4]
U27
FE_DEMOD1_TS_DATA[5]
U26
FE_DEMOD1_TS_DATA[6]
R29
FE_DEMOD1_TS_SYNC
P27
FE_DEMOD1_TS_VAL
/PCM_REG
N33
/PCM_CE1
MT5398_TS_SYNC CI SLOT -> SOC
/PCM_WE
K26
N30
N31
/PCM_OE
MT5398_TS_VAL CI SLOT -> SOC
CI_A_VS1
M27
L27
MT5398_TS_CLK CI SLOT -> SOC
/PCM_IRQA
M29
M30
L33
L32
K27
/PCM_WAIT
+3.3V_NORMAL
/CI_CD2
/CI_CD1
/PCM_IORD
R174
4.7K
OPT
/PCM_IOWR
AL8
GPIO30
OPWM2
GPIO31
OPWM1
GPIO32
OPWM0
GPIO33
R178
/RST_HUB
R173
1K
D27
GPIO34
SD_D0
GPIO35
SD_D1
SD_D2
GPIO37
SD_D3
GPIO38
SD_CMD
GPIO39
SD_CLK
R177
4.7K
OPT
R179 PWM_DIM2
AM8
AM9
EXTERNAL DEMOD
-> SOC
FE_DEMOD1_TS_DATA[7]
R26
L30
GPIO25
FE_DEMOD1_TS_DATA[0-7]
PCM_RST
FE_DEMOD1_TS_CLK
M31
PVR_TSCLK
GPIO20
GPIO36
N32
L25
CI_INT
GPIO14
22
22
PWM_DIM2
PWM_DIM1
R176
1K
/RST_HUB
C27
D26
PWM2_PULL_DOWN_1K
PWM1_PULL_DOWN_1K
C26
A28
E24
SMARTCARD_CLK/SD_EMMC_DATA[0]
GPIO40
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
GPIO41
SMARTCARD_RST/SD_EMMC_DATA[2]
GPIO42
SMARTCARD_DET/SD_EMMC_DATA[3]
GPIO43
SMARTCARD_VCC/SD_EMMC_CMD
GPIO44
SMARTCARD_DATA/SD_EMMC_CLK
SMARTCARD_CLK/SD_EMMC_DATA[0]
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
SMARTCARD_RST/SD_EMMC_DATA[2]
SMARTCARD_DET/SD_EMMC_DATA[3]
SMARTCARD_VCC/SD_EMMC_CMD
SMARTCARD_DATA/SD_EMMC_CLK
GPIO45
GPIO46
GPIO47
AF15
GPIO48
LED_PWM1
GPIO49
LED_PWM0
AG15
LED_PWM1
LED_PWM0
GPIO50
GPIO51
5V Tolerance
GPIO52
AL16
GPIO53
OPCTRL11
GPIO54
OPCTRL10
GPIO55
OPCTRL9
OPCTRL8
AJ23
10K
AE28
USB_CTL3
MODEL_OPT_9
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Support
MODEL_OPT_3
SC_ID_SOC
MODEL_OPT_5
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
S Tuner
Not Support
MODEL_OPT_10
MTK_NON_EPI
R148
4.7K
NON_DDR_0.78G
R144
4.7K
MTK_NON_DVB_S_TUNER
R143
4.7K
MTK_NON_DVB_T2_TUNER
R139
4.7K
MTK_NON_CP_BOX
R136
4.7K
MTK_DDR_1.5GB
R129
4.7K
MODULE_V12
R128
4.7K
Non_Country_AJJA
R122
4.7K
MTK_HD
R107
4.7K
NON_FRC_60Hz
R104
4.7K
NON_Country_TW
R103
4.7K
OTP_WRITE
MODEL_OPT_9
AVDD_33SB
OTP_WRITE
CI_ADDR[0]
CI_ADDR[1]
OSCL0
+3.3V_NORMAL
EMMC_DATA[2]
IC105
LGE2122[A2_M13]
CI_ADDR[0-14]
I2C_SCL1
OPCTRL_10_SDA
EMMC_DATA[3]
B23
CI_ADDR[0-14]
TU_N_TW/BR
1.2K
STB_SCL
EMMC_DATA[4]
A23
22
AVDD10_ELDO
R152-*2
EMMC_DATA[5]
C23
AF17
C112
4.7uF
10V
R153-*1
R152-*1
TU_Q_KR
TU_Q_KR
1.5K
1.5K
R153
2.7K
A22
ORESET
AVSS33_PLLGP
AVDD10_LDO
AMP, L/DIMMING,HDCP KEY
T-CON,
MICOM
S/Demod,T2/Demod, LNB, MHL(Sil1292)
NVRAM
TUNER_MOPLL(T/C,ATV)
NON_TU_Q_KR
R124
1.2K
B22
EMMC_DATA[6]
AK20
AM17
C107
4.7uF
10V
+3.3V_NORMAL
R121
1.2K
EMMC_DATA[7]
OIRI
OPCTRL7
I2C_1
I2C_2
I2C_3
I2C_4
I2C_5
I2C_6
C22
22
AVDD33_PLL
AVSS33_CPUPLL
OPCTRL3
R160
1K OPT
EMMC_DATA[2-7]
FE_LNA_Ctrl2
A25
OPWRSB
LED_PWM1
R156
1K OPT
FE_LNA_Ctrl1
D25
AL15
LED_PWM0
R154
1K
EMMC_CMD
B25
EMMC_CLK
VDD3V3
0
M_REMOTE_TX
M_REMOTE_RX
D24
AN30
OPCTRL7
ICE mode + 27M + serial boot
JTRST
AN29
MT5398_XTAL_IN
MT5398_XTAL_OUT
R184
4.7K
AG13
10K
R190
NC_3
2
VCC
U1TX
S
NC_2
8
1
R183
4.7K
SOC_RX
D
NC_1
AG11
SOC_TX
AH14
AH13
JTMS
OSCL0
OSCL1
OPT
C100
0.1uF
16V
U0RX
JTDO
AF11
OSDA1
OPT
U0TX
JTDI
AH11
OSCL0
IC101
M24C16-R
AH15
JTCK
R180 4.7K
5
R195
10K
4
R194
10K
GND
ADIN0_SRV
OPCTRL7
ADIN1_SRV
OPCTRL6
ADIN2_SRV
OPCTRL5
ADIN3_SRV
OPCTRL4
ADIN4_SRV
OPCTRL3
ADIN5_SRV
OPCTRL2
ADIN6_SRV
OPCTRL1
ADIN7_SRV
OPCTRL0
AM16
AE17
AG19
AH17
AE19
AH19
AK16
AG17
AJ17
AF19
AJ19
OPCTRL_11_SCL
OPCTRL_10_SDA
COMP1_DET
SC_DET
OPCTRL7
HP_DET
AV1_CVBS_DET
AMP_RESET_SOC
OPCTRL3
RF_SWITCH_CTL
OPCTRL_1_SCL
OPCTRL_0_SDA
MID_MAIN_1
R182
AMP_RESET_SOC
AMP_RESET_N
33
R185
10K
2011.12.13
8
LGE Internal Use Only
PLACE AT JACK SIDE
Close to JACK
Close to Main Chip
C345
10uF
16V
+5V_NORMAL
1608 sizs For EMI
1.0Vpp
COMP1/AV1/DVI_L_IN_SOC
1uF
HDMI_ARC
C346
10uF
16V
R309
100K
PCB_700*
C342
100pF
50V
1608 sizs For EMI
R345
C391
27pF
50V
OPT
C386
27pF
50V
OPT
R381
0
COMP1_Pb_SOC
R354
75
1%
C379
10pF
50V
1608 sizs For EMI
0
R372
C385
27pF
50V
FOR EMI
OPT
ZD306
ADLC 5S 02 015
COMP1_Pr
1%
C384
10pF
50V
COMP1_COM_SOC
ZD304
ADLC 5S 02 015
C343
100pF
50V
R355
75
1/16W
COMP1_Pb
30K
C339
560pF
50V
OPT
R329
470K
OPT
COMP1_Y/AV1_CVBS_SOC
C394
27pF
50V
OPT
1608 sizs For EMI
0
R373
COMP1/AV1/DVI_R_IN_SOC
COMP1/AV1/DVI_R_IN
R374
C388
27pF
50V
OPT
PCB_700*
C311
R303
82
ZD302
ADLC 5S 02 015
C338
560pF
50V
OPT
10V
R302
180
0
COMP1_Y/AV1_CVBS
30K
R328
470K
OPT
ARC
1608 sizs For EMI
R344
COMP1/AV1/DVI_L_IN
R308
1.2K
OPT
COMP1_Pr_SOC
C392
27pF
50V
OPT
R353
75
1%
C378
10pF
50V
IC105
LGE2122[A2_M13]
IC105
LGE2122[A2_M13]
Y1
BE0P
AG30
HDMI_CEC
HDMI_0_RX_0
HDMI_0_RX_0B
AC27
AB27
DDC_SCL_3_JACK
AA26
DDC_SCL_1_SOC
W27
DDC_SCL_MHL
HDMI_0_SCL
HDMI_0_RX_1
HDMI_1_SCL
HDMI_0_RX_1B
HDMI_2_SCL
HDMI_0_RX_2
HDMI_3_SCL
HDMI_0_RX_2B
HDMI_0_SDA
HDMI_0_RX_CB
HDMI_0_RX_C
AC26
AB26
DDC_SDA_3_JACK
Y26
DDC_SDA_1_SOC
DDC_SDA_MHL
W26
5V_HDMI_3_JACK
5V_HDMI_1_SOC
5VBUS
1K
Y27
R306
1K
AA28
R307
1K
V28
HDMI_1_RX_0
HDMI_3_SDA
HDMI_1_RX_0B
HDMI_0_PWR5V
HDMI_1_RX_1B
HDMI_1_RX_1
HDMI_1_PWR5V
HDMI_1_RX_2
HDMI_2_PWR5V
HDMI_1_RX_2B
HDMI_3_PWR5V
AA27
AA29
HDMI_HPD_1_SOC
+1.2V_MTK_AVDD
V29
HDMI_HPD_4_MHL
HDMI_1_RX_C
P33
VDD3V3_HDMI
P32
HDMI_1_HPD
HDMI_2_RX_0
HDMI_2_HPD
HDMI_2_RX_0B
HDMI_2_RX_1
HDMI_2_RX_1B
AVDD12_HDMI_0_RX
HDMI_2_RX_2
AVDD12_HDMI_1_RX
HDMI_2_RX_2B
AVDD12_HDMI_2_RX
HDMI_2_RX_C
AVDD12_HDMI_3_RX
HDMI_2_RX_CB
AH33
HDMI_3_RX_0
HDMI_3_RX_0B
C307
0.1uF
HDMI_3_RX_1
HDMI_3_RX_1B
HDMI_3_RX_2
AE27
T25
W25
AD27
AC33
AC30
AC31
AE30
AE31
W6
MODEL_OPT_10
AVSS33_HDMI_RX_1
HDMI_3_RX_2B
AVSS33_HDMI_RX_2
HDMI_3_RX_C
AVSS33_HDMI_RX_3
HDMI_3_RX_CB
D0+_HDMI3_JACK
MCLK_SOC
D0-_HDMI3_JACK
D1+_HDMI3_JACK
GST_SOC
U6
VCOM_DYN
D2+_HDMI3_JACK
PMIC_RESET
D2-_HDMI3_JACK
2D/3D_CTL
V8
V6
AB7
W9
W33
V9
V7
AA30
AA31
U31
T32
T33
T30
T31
V30
TCON5
BO0N
TCON6
BO1P
TCON7
BO1N
BOCKN
TCON12
BO3P
AN3
AN4
CK+_HDMI1_SOC
AM3
D0-_HDMI4_MHL
D1+_HDMI4_MHL
AF5
D1-_HDMI4_MHL
AE5
D2+_HDMI4_MHL
AC5
D2-_HDMI4_MHL
V5
CK-_HDMI4_MHL
AB1
AE0P
AVDD12_LVDS_3
AE0N
AVDD33_LVDS
AE1P
AE2N
AVSS12_LVDS_2
AECKP
AVSS12_LVDS_3
AECKN
AVSS33_LVDS_1
AE3N
AVSS33_LVDS_2
AE4P
AVSS33_LVDS_3
AE4N
REXT_VPLL
AO0P
AF1
AF2
AE3
AE4
AD3
AD4
J32
USB_DP2
J31
USB_DM2
Port was changed !!!!
USB_DM_P1
RXVN_1
USB_DP_P2
PHYLED1
USB_DM_P2
PHYLED0
K32
USB_DP1
K31
USB_DM1
0 R382
RXVP_1
AF13
AN10
WIFI_DP
0
AM10
OPT
C398
0.1uF
16V
C399
0.1uF
16V
OPT
AN8
C302
0.1uF
SC_R_IN_SOC
AVDD33_USB_P0P1P2
AVDD33_ETH
AVDD33_USB_P3
AVSS33_ELDO
AVSS33_USB_P1
AVSS33_LD
EPHY_RDN
SC_L_IN_SOC
AVSS33_USB_P3
CI_ADDR[5]
CI_ADDR[7]
CI_ADDR[8]
CI_ADDR[9]
TXB3P
AK4
AK1
AK2
AJ3
CI_ADDR[10]
TXBCLKN
MT5398_MCLKI
MT5398_MIVAL_ERR
TXBCLKP
MT5398_MISTRT
CI_ADDR[12]
CI_ADDR[13]
TXB2P
CI_ADDR[14]
MT5398_TS_OUT[0-7]
For PCB Pattern
TXB1P
AH3
HP_OUT
1.2K
R351
1.2K
HP_OUT
R369
1.2K
1.2K
R370
R352
C377
1200pF
HP_OUT
MT5398_TS_OUT[0]
C390
1200pF
HP_OUT
C383
HP_OUT
1200pF
HP_OUT
C395
1200pF
HP_OUT
HP_ROUT_MAIN
MT5398_TS_OUT[1]
HP_LOUT_MAIN
MT5398_TS_OUT[2]
MT5398_TS_OUT[3]
MT5398_TS_OUT[4]
MT5398_TS_OUT[5]
CI_DATA[0-7]
SCART_Lout_SOC
AL32
AN32
AM33
AM31
PC_L_IN_SOC TP380
C328
0.1uF
AM32
AK33
AC16
COMP1/AV1/DVI_R_IN_SOC
AC15
COMP1/AV1/DVI_L_IN_SOC
AVSS33_COM
AL33
AN33
AIN1_R_AADC
AR0_ADAC
AIN1_L_AADC
AL0_ADAC
AR1_ADAC
AIN3_R_AADC
AL1_ADAC
AK30
CI_DATA[0]
AJ29
CI_DATA[1]
AL2_ADAC
C365
10uF
10V
AC24
C362
0.1uF
ARC
AVSS33_AADC
C352
Close to MT5369
R380
1K
TU_S/N/Q_T/US/KR/TW
R331
1K
IF_N
TU_S/N/Q_T/US/KR/TW
Close to Tuner
TU_S/N/Q_T/US/KR/TW
R346
1K
0.01uF
R334
C337
1uF
AOMCLK
C363
1uF
10V
AK9
/CI_CD2
R367
100
R371
100
Don’t use as GPIO
AJ10
/CI_CD1
AUD_LRCK
AUD_MASTER_CLK
C389
22pF
OPT
C393
22pF
OPT
C396
33pF
OPT
PCM_RST
/PCM_REG
TP307
MT5398_TS_VAL
CI_A_VS1
MT5398_TS_CLK
/PCM_IRQA
/PCM_WAIT
33pF
TU_S/N/Q_T/US/KR/TW
VDD3V3
AM27
AN27
+1.2V_MTK_AVDD
C364
0.1uF
C351
0.1uF
AK18
ADCINP_DEMOD
HSYNC
ADCINN_DEMOD
VSYNC
RP
AN26
AVDD33_DEMOD
AVDD12_DEMOD
COM
AVSS33_DEMOD
VGA_SDA
AVSS12_DEMOD
VGA_SCL
SOG
AL28
IF_AGC
HP_OUT
L303
BLM18PG121SN1D
HP_LOUT
HP_LOUT_AMP
TU_S/N/Q_T/US/KR/TW
R342
10K
TU_S/N/Q_T/US/KR/TW
R332
10K
AL27
C355
0.047uF
TU_S/N/Q_T/US/KR/TW
Close to Tuner
C341
0.047uF
TU_S/N/Q_T/US/KR/TW
M28
Close to MT5369
PB1P
TP300
IF_AGC
RF_AGC
AK27
N26
Y1P
LOUTN
COM0
LOUTP
PB0P
PR0P
N27
OSCL2
OSDA2
PR1P
SOY1
AJ27
OSCL2
Y0P
OSDA2
SOY0
VDACX_OUT
HP_OUT
L302
BLM18PG121SN1D
For PCB Pattern
COMP1_Y/AV1_CVBS_SOC
TU_CVBS
AL19
AN20
AG22
AH22
R341
100
C360
0.047uF
AM25
R340
100
C359
0.047uF
AH26
TU_A_GLOBAL_6/7 TU_A_GLOBAL_6/7
C361
1uF
VDD3V3
AK25
AJ26
Near the SOC
AM26
TP311
TP359
TP360
TP361
TP362
TP363
TP364
SC_R_IN_SOC
TP365
SC_L_IN_SOC
TP366
TP303
SC_COM_SOC
TP306
SC_G_SOC
TP369
TP304
SC_R_SOC
TP370
SC_B_SOC
TP367
TP368
TP371
TP383
SC_FB_SOC
TP372
TP301
DTV/MNT_V_OUT_SOC
TP373
TP302
SCART_Rout_SOC
TP374
SCART_Lout_SOC
TP375
SC_G_SOC
PCM_5V_CTL
TP377
SC_R_SOC
SC_DET
TP378
SC_COM_SOC
AL22
AM21
SC_B_SOC
AN21
AM23
0.01uF
C371
51
R361
AL23
0.01uF
C372
51
R362
AL24
0.01uF
C373
51
R363
AN23
0.01uF
C374
51
R364
AK23
1500pF
C375
SC_FB_SOC
For PCB Pattern
COMP1_COM_SOC
COMP1_Pb_SOC
COMP1_Pr_SOC
OPT
AH24
0
AJ24
10
COMP1_Y/AV1_CVBS_SOC
R349
R350
DTV/MNT_V_OUT_SOC
VDD3V3
AVDD33_VIDEO
CVBS2P
CVBS1P
CVBS0P
AN18
AVDD12_RGB
+1.2V_MTK_AVDD
CVBS_COM
AC19
AVDD33_CVBS
Place at JACK SIDE
AVSS33_VDAC_BG
AVSS12_RGB
AK17
AE20
C382
0.1uF
AVSS33_VDAC
AB20
AB22
TP310
SC_CVBS_IN_SOC
AK22
AN25
CVBS3P
TP308
TP309
TP305
TP382
AK19
EU
AK26
HP_OUT
C331
0.22uF
10V
AM20
VDACY_OUT
SC_CVBS_IN_SOC
HP_ROUT
HP_ROUT_AMP
AL20
AL21
COM1
L26
HP_OUT
C332
0.22uF
10V
GP
BP
AN28
TP376
AL18
TP356
TP358
/PCM_OE
TU_S/N/Q_T/US/KR/TW
TP355
TP357
/PCM_IOWR
/PCM_WE
IC105
LGE2122[A2_M13]
TP353
/PCM_IORD
/PCM_CE1
MT5398_TS_SYNC
AOSDATA0
51
TP352
TP354
AUD_LRCH
C387
22pF
OPT
AH8
AOSDATA1
AUD_SCK
100
R368
AH9
AJ8
AOSDATA2
100
AF10
AK8
AOSDATA3
51
SC_ID_SOC
AJ9
AOLRCK
AOSDATA4
C358
0.1uF
TP351
V27
R366
TP347
TP348
TP349
TP350
MT5398_TS_IN[5]
TU_S/N/Q_T/US/KR/TW
R335
10V
TU_S/N/Q_T/US/KR/TW
C310
AH25
TU_A_GLOBAL_6/7
33pF
C336
1uF
10V
TU_S/N/Q_T/US/KR/TW
AOBCK
TP346
MT5398_TS_IN[4]
AG10
ASPDIF1
TP336
TP344
MT5398_TS_IN[6]
MT5398_TS_IN[7]
AG9
ALIN
ASPDIF0
MPXP
R339
2.2K
OPT
TU_S/N/Q_T/US/KR/TW
C312
SPDIF_OUT
AVDD3V3_AADC
AVDD33_AADC
AN31
VMID_AADC
IF_P
AC23
AVDD3V3_AADCAJ32
AVDD3V3_AADC
C305
1uF
10V
TUNER_SIF
TP333
TP335
TP343
MT5398_TS_IN[2]
MT5398_TS_IN[3]
AVSS33_ADAC
TP332
TP334
TP345
Ready For commercial Audio_L_OUT
AVDD33_ADAC
TP329
TP330
TP331
TP342
CI_DATA[7]
AJ33
Close to AVDD33_ADAC & AVDD33_AADC
TP324
TP341
CI_DATA[6]
Ready For commercial Audio_R_OUT
MT5398_TS_IN[1]
L304
TP323
TP325
TP337
MT5398_TS_IN[0]
VDD3V3
TP321
TP339
CI_DATA[5]
AH28
TP319
TP320
TP322
TP338
CI_DATA[4]
AJ30
AR2_ADAC
TP318
TP340
CI_DATA[3]
AK29
AIN3_L_AADC
AIN4_L_AADC
MT5398_TS_OUT[7]
AJ31
AIN2_L_AADC
AIN4_R_AADC
MT5398_TS_OUT[6]
CI_DATA[2]
AIN2_R_AADC
TP315
TP316
TP317
TP328
TXB0P
SCART_Rout_SOC
R315
TP313
TP327
TXB0N
AH4
TP312
TP314
TP326
TXB1N
AJ4
/TU_RESET2
24K
CI_ADDR[11]
TXB2N
IC105
LGE2122[A2_M13]
PC_R_IN_SOC TP379
AE13
TXA0P
HP_OUT
AVDD_33SB
AN14
M25
AE11
EPHY_RDP
REXT
K33
CI_ADDR[4]
TXB4P
AK3
AO4N
Wake On Lan
VDD3V3
CI_ADDR[3]
MODEL_OPT_1
AJ13
AN12
USB_DP_P3
USB_DM_P3
R383
WIFI_DM
AM12
CI_ADDR[2]
TXA0N
For PCB Pattern
EPHY_TDN
AL12
USB_DP_P1
CI_ADDR[1]
TXA1P
TXB3N
AL4
AO4P
CI_ADDR[0]
TXA1N
CI_ADDR[6]
AL3
AO1P
TXA2N
TXA2P
TXB4N
AM2
AO0N
CI_ADDR[0-14]
TXACLKP
AM1
EPHY_TDP
AM13
TXACLKN
AF4
AO3N
AL13
TXA3P
AF3
AO3P
TXVN_0
TXA3N
AG4
AO2N
TXVP_0
TXA4N
TXA4P
AG3
AOCKN
USB_DM_P0
TXD0P
AH2
AOCKP
USB_DP_P0
TXD0N
Y4
AO2P
H33
TXD1P
Y3
AE3P
R343
24K
1%
H32
TXD1N
AA4
AE2P
AVSS12_LVDS_1
IC105
LGE2122[A2_M13]
USB_DM3
TXD2P
AA3
AO1N
USB_DP3
TXD2N
AB2
T1
AVSS33_HDMI_RX_4
TXDCLKP
AH1
AVDD12_LVDS_2
AM4
D0+_HDMI4_MHL
TXDCLKN
AB4
AE1N
C347
0.1uF
CK-_HDMI1_SOC
TXD3P
AB3
BO2N
BOCKP
TCON11
TXD4P
TXD3N
AC4
BO2P
TCON10
TXD4N
AC3
AVDD12_LVDS_1
AN2
VDD3V3
TXC0P
AD2
BO4N
CK+_HDMI4_MHL
V31
BO0P
AN1
C354
0.1uF
D2-_HDMI1_SOC
TXC0N
T4
AD1
TCON4
BO3N
C350
0.1uF
D2+_HDMI1_SOC
W31
BE4N
TXC1P
T3
BO4P
D1-_HDMI1_SOC
W30
BE4P
TCON2
+1.2V_MTK_AVDD
D0-_HDMI1_SOC
D1+_HDMI1_SOC
W32
TCON1
TCON9
U9
PCM_5V_CTL
USB_CTL2
CK-_HDMI3_JACK
BE3N
TCON8
U8
MODEL_OPT_2
CK+_HDMI3_JACK
TCON0
TXC1N
U4
TCON3
U7
EO_SOC
D1-_HDMI3_JACK
D0+_HDMI1_SOC
Y31
U30
AVDD33_HDMI
C304
0.1uF
AC32
Y30
HDMI_3_HPD
AA32
AD31
HDMI_1_RX_CB
HDMI_0_HPD
AA33
C306
0.1uF
C303
0.1uF
MODEL_OPT_9
AG33
AD30
HDMI_2_SDA
AD29
HDMI_HPD_3_JACK
AA9
GCLK_SOC
HDMI_1_SDA
AE29
R305
MODEL_OPT_8
AG32
TXC2P
U3
BE3P
AA8
TXC2N
V2
BECKN
AE32
AE33
TXCCLKP
V1
BECKP
AF31
TXCCLKN
V4
BE2N
AF30
TXC3P
V3
BE2P
AG31
TXC3N
W4
BE1N
V26
TXC4P
W3
BE1P
HDMI_CEC TP381
TXC4N
Y2
BE0N
AVSS33_CVBS_1
AVSS33_CVBS_2
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
MID_MAIN_2
2011.12.19
9
LGE Internal Use Only
IC105
LGE2122[A2_M13]
+1.2V_MTK_CORE
L11
N12
+1.2V_MTK_CORE
+3.3V_NORMAL
+1.2V_MTK_CORE
VDD3V3
P12
OPT
OPT
AG5
60mA
L501
BLM18PG121SN1D
AH5
OPT
C505
10uF
C503
10uF
5600mA
C507
0.1uF
C514
10uF
C508
2.2uF
C517
10uF
C523
0.1uF
C520
0.1uF
C513
10uF
C532
0.1uF
C527
0.1uF
C535
0.1uF
AJ5
AK5
AL5
AM5
AN5
AK6
AL6
AM6
AN6
M11
N11
P11
R11
M12
R12
L13
L14
+3.5V_ST_WAKE
VDD3V3
L15
AVDD_33SB
L17
L18
OPT
L503
BLM18PG121SN1D
L19
T11
U11
V11
W11
OPT
L502
BLM18PG121SN1D
+1.2V_MTK_CORE
+1.2V_MTK_AVDD
Y11
AA11
L504
BLM18PG121SN1D
AB11
OPT
AC11
C504
0.1uF
C518
10uF
C506
0.1uF
R23
L12
W12
V23
Y12
AF6
AG6
AH6
AJ6
AE7
AF7
POWER_ON/OFF1
AG7
TP500
AVDD_33SB
AD8
IC500
+3.5V_ST
+3.5V_ST_WAKE
+3.5V_ST_WAKE
AE8
AP2121N-3.3TRE1
AF8
VIN
AE9
AC10
AD10
AE10
AF9
AG8
AH7
ZD500
5V
C502
0.1uF
16V
AD11
C512
1uF
10V
C510
0.1uF
16V
AJ7
AK7
OPT
R502
10K
VOUT
GND
G
C501
4.7uF
10V
2
1
D
S
Q501
PMV48XP
3
AL7
+3.3V_NORMAL
3.3V_EMMC
AM7
LAN_JACK_POWER
AN7
L16
R501
1.8K
WOL_CTL
R500
10K
U12
T12
AD13
C531
0.1uF
16V
C
AD17
AD14
VDD3V3
Q500
MMBT3904(NXP)
B
C500
4.7uF
10V
OPT
V12
TP501
L505
BLM18PG121SN1D
AB12
AA12
AC12
E
R15
VCCK_1
DVSS_24
VCCK_2
DVSS_25
VCCK_3
DVSS_26
VCCK_4
DVSS_27
VCCK_5
DVSS_28
VCCK_6
DVSS_29
VCCK_7
DVSS_30
VCCK_8
DVSS_31
VCCK_9
DVSS_32
VCCK_10
DVSS_33
VCCK_11
DVSS_34
VCCK_12
DVSS_35
VCCK_13
DVSS_36
VCCK_14
DVSS_37
VCCK_15
DVSS_38
VCCK_16
DVSS_39
VCCK_17
DVSS_40
VCCK_18
DVSS_41
VCCK_19
DVSS_42
VCCK_20
DVSS_43
VCCK_21
DVSS_44
VCCK_22
DVSS_45
VCCK_23
DVSS_46
VCCK_24
DVSS_47
VCCK_25
DVSS_48
VCCK_26
DVSS_49
VCCK_27
DVSS_50
VCCK_28
DVSS_51
VCCK_29
DVSS_52
VCCK_30
DVSS_53
VCCK_31
DVSS_54
VCCK_32
DVSS_55
VCCK_33
DVSS_56
VCCK_34
DVSS_57
VCCK_35
DVSS_58
VCCK_36
DVSS_59
VCCK_37
DVSS_60
VCCK_38
DVSS_61
VCCK_39
DVSS_62
VCCK_40
DVSS_63
VCCK_41
DVSS_64
VCCK_42
DVSS_65
VCCK_43
DVSS_66
VCCK_44
DVSS_67
VCCK_45
DVSS_68
VCCK_46
DVSS_69
VCCK_47
DVSS_70
VCCK_48
DVSS_71
VCCK_49
DVSS_72
VCCK_50
DVSS_73
VCCK_51
DVSS_74
VCCK_52
DVSS_75
VCCK_53
DVSS_76
VCCK_54
DVSS_77
VCCK_55
DVSS_78
VCCK_56
DVSS_79
VCCK_57
DVSS_80
VCCK_58
DVSS_81
VCCK_59
DVSS_82
VCCK_60
DVSS_83
VCCK_61
DVSS_84
VCCK_62
DVSS_85
VCCK_63
DVSS_86
VCCK_64
DVSS_87
VCCK_65
DVSS_88
VCCK_66
DVSS_89
VCCK_67
DVSS_90
VCCK_68
DVSS_91
VCCK_69
DVSS_92
VCCK_70
DVSS_93
VCCK_71
DVSS_94
VCCK_72
DVSS_95
DVSS_96
DVSS_97
T9
Y10
AA10
D22
E22
VCC3IO_C
DVSS_98
VCC3IO_B_1
DVSS_99
VCC3IO_B_2
DVSS_100
VCC3IO_A_1
DVSS_101
VCC3IO_A_2
DVSS_102
DVSS_103
DVSS_104
AC18
AB21
AB14
N13
P13
R13
T13
DECAP FOR SOC (HIDDEN - UCC)
DECAP FOR SOC Rework (BOTTOM)
U13
V13
W13
Y13
P18
N14
P14
+1.2V_MTK_CORE
VDD3V3
R14
T14
TP503
TP502
U14
V14
W14
Y14
R18
N15
P15
DVSS_1
DVSS_105
DVSS_2
DVSS_106
DVSS_3
DVSS_107
DVSS_4
DVSS_108
DVSS_5
DVSS_109
DVSS_6
DVSS_110
DVSS_7
DVSS_111
DVSS_8
DVSS_112
DVSS_9
DVSS_113
DVSS_10
DVSS_114
DVSS_11
DVSS_115
DVSS_12
DVSS_116
DVSS_13
DVSS_117
DVSS_14
DVSS_118
DVSS_15
DVSS_119
DVSS_16
DVSS_120
DVSS_17
DVSS_121
DVSS_18
DVSS_122
DVSS_19
DVSS_123
DVSS_20
DVSS_124
DVSS_21
DVSS_125
DVSS_22
DVSS_126
DVSS_23
DVSS_127
T15
U15
V15
W15
Y15
AA15
AB15
T18
R16
T16
U16
V16
W16
Y16
AA16
AB16
R17
T17
U17
V17
Y17
N16
V18
Y18
P16
V19
Y19
W17
AA17
AB17
N19
AC14
C13
K24
K25
L24
M17
M18
M19
P17
P19
N18
U20
V20
W20
Y20
AA20
R19
T19
M20
N20
U21
V21
W21
Y21
AA21
P20
R20
T20
U22
V22
W22
Y22
AA22
N21
P21
R21
T21
M22
N22
P22
R22
T22
M21
AC17
AA19
M13
M14
M15
AA13
AB13
AA14
AB19
D6
W19
U19
N17
L3
AB18
AA18
W18
U18
D16
AC13
M16
AC20
AC22
AD20
Y23
AA23
AB23
V24
W23
+1.5V_DDR
+1.5V_DDR
C509
0.1uF
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
OPT
C539
0.1uF
OPT
C541
0.1uF
16V
C511
0.1uF
MID_MAIN_3
2011.12.09
10
LGE Internal Use Only
PLACE AT JACK SIDE
R610
51K
SC_ID_SOC
SC_ID
1/16W
1%
EU
R613
10K
EU
READY FOR FILTER (EMI)
L611
SC_CVBS_IN
SC_CVBS_IN_IF
120-ohm
C601
10pF
OPT
C607
100pF
EU
EU
SC_FB
R604
75
1%
EU
SC_FB_SOC
R608
75
1%
EU
R609
22
EU
PLACE AT MAIN SOC SIDE
R605
75
1%
EU
100
R622
SC_G
R606
75
1%
EU
SC_B
R607
75
1%
EU
C615
EU
C604
10pF
EU
C605
10pF
EU
0.01uF
100
C614
EU
0
R620
R637
1/16W
EU
R621
100
C612
100
C613
SC_G_SOC
0.01uF
SC_COM_SOC
EU
EU
SC_CVBS_IN_IF
0.01uF
EU
EU
C606
10pF
EU
SC_R_SOC
EU
R617
0.01uF
SC_B_SOC
PLACE AT IC6000
EU
100
C616
EU
0.047uF
EU
R618
15K EU
R619
15K EU
SCART_Lout_SOC
EU
Close to Main Chip
Close to SOC
C608
10uF
16V
1608 size For EMI
R625
C619
330pF
50V
EU
C621
1uF
EU
SCART_Rout_SOC
Close to JACK
+3.3V_NORMAL
SC_CVBS_IN_SOC
EU
R630
68K
C620
1uF
R623
SC_R
C618
330pF
50V
EU
SCART_Rout
+3.3V_NORMAL EU
R631
EU
R628
68K
100K
SCART_Lout
EU
R629
100K
R614
0
SC_L_IN_SOC
SC_L_IN
30K
EU
EU
R601
470K
OPT
C602
330pF
50V
OPT
C609
10uF
16V
C610
100pF
50V
EU
1/16W
5%
EU
R635
SCART_AMP_R_FB
10K
EU
R636
1608 size For EMI
R626
SCART_AMP_L_FB
R624
0
SC_R_IN
SC_R_IN_SOC
R602
470K
OPT
30K
EU
EU
C603
330pF
50V
OPT
C611
100pF
50V
EU
10K
EU
1/16W
5%
EU
READY FOR FILTER (EMI)
EU
R600
DTV/MNT_V_OUT_SOC
R616
75
1%
EU
TU_CVBS
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
0
R615
75
1%
OPT
C600
220pF
OPT
C617
100pF
EU
DTV/MNT_V_OUT
TP600
MID_MAIN_SCART
2011.12.30
11
LGE Internal Use Only
DDR_512MB_SS
DDR_512MB_SS
IC703
K4B4G1646B-HCK0
IC701
K4B4G1646B-HCK0
+1.5V_DDR
A_RVREF2
ARA[0-14]
+1.5V_DDR
A_RVREF4
A_RVREF1
R706
1K
1%
M8
A0
VREFCA
A1
A_RVREF1
R707
1K
1%
A2
H1
A3
VREFDQ
C714
0.1uF
1%
240
R710
A4
A5
L8
A6
ZQ
+1.5V_DDR
A7
+1.5V_DDR
A8
B2
D9
A_RVREF4
R708
1K
1%
C715
0.1uF
G7
K2
K8
N1
R709
1K
1%
+1.5V_DDR
ARA[0-14]
C713
0.1uF
N9
C716
0.1uF
R1
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
VDD_6
A14
VDD_7
A15
VDD_8
R9
N3
ARA[0]
P7
ARA[1]
P3
ARA[2]
N2
ARA[3]
ARA[4] P8
ARA[5] P2
A3
ARA[6]
ARA[6] R8
A5
ARA[7] R2
ARA[8] T8
ARA[9] R3
A6
ARA[7]
ARA[10] L7
ARA[11] R7
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
A15
VDD_7
ARA[4]
ARA[5]
T8
ARA[8]
R3
ARA[9]
L7
R7
ARA[10]
ARA[11]
N7
ARA[12]
T3
ARA[13]
T7
ARA[12] N7
ARA[13]
T3
ARA[14]
T7
ARA[14]
M7
M7
M2
BA0
VDD_9
BA1
VDDQ_1
ARBA1
M3
A8
D2
VDDQ_3
CK
VDDQ_4
CKE
VDDQ_5
E9
F1
H2
H9
VDDQ_6
CS
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
K3
L3
NC_1
J9
/ARRAS
/ARCAS
/ARCAS
/ARWE
J3
K3
L3
VDD_8
BA0
F3
DQSL
ARDQS0
G3
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_2
/ARDQS0
DQSL
C7
A9
B3
E1
VSS_1
DQSU
VSS_2
DQSU
VSS_3
G8
J2
J8
DML
VSS_5
DMU
VSS_6
M1
M9
P1
P9
T1
T9
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
DQL5
DQL6
ARDQM0
D3
B7
ARDQ[16-23]
E3
ARDQ[0]
F7
ARDQ[1]
F2
ARDQ[2]
F8
ARDQ[3]
H3
ARDQ[4]
H8
ARDQ[5]
G2
ARDQ[6]
H7
ARDQ[7]
D7
ARDQ[8]
C3
ARDQ[9]
D3
ARDQM3
ARDQ[0-7]
VSSQ_1
ARDQ[24-31]
B9
DQU0
VSSQ_2
D1
D8
E2
E8
F9
G1
G9
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
C8
ARDQ[10]
C2
ARDQ[11]
A7
ARDQ[12]
A2
ARDQ[13]
B8
ARDQ[14]
A3
ARDQ[15]
ARDQ[16]
E3
ARDQ[17]
F7
ARDQ[18]
F2
ARDQ[19]
F8
ARDQ[20]
H3
ARDQ[21]
H8
VSS_2
VSS_3
DML
VSS_4
ARDQ[22]
G2
ARDQ[23]
H7
ARDQ[24]
D7
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
C751
0.1uF
C753
0.1uF
C755
0.1uF
C702
1uF
C754
0.1uF
R9
R719
1K
1%
C734
0.1uF
A8
C1
C9
D2
E9
F1
H2
H9
J9
L1
L9
ARDQ[25]
C3
ARDQ[26]
C8
ARDQ[27]
C2
ARDQ[28]
A7
ARDQ[29]
A2
ARDQ[30]
B8
ARDQ[31]
A3
B3
E1
IC701-*1
H5TQ4G63AFR-PBC
P3
J2
P2
N2
P8
R8
R2
J8
T8
R3
L7
R7
M1
N7
T3
T7
M9
M7
A6
A9
A10/AP
A11
A12/BC
A13
A14
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
BA0
K1
T9
L3
J3
K3
K8
N1
N9
R9
VDDQ_4
VDDQ_6
VDDQ_5
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
H2
H9
NC_2
NC_3
J9
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
F2
F8
H3
D8
H8
G2
H7
VSS_8
DQL2
VSS_9
DQL3
VSS_10
C2
A7
A2
F9
B8
A3
J3
K3
DQL4
VSS_11
DQL5
VSS_12
B3
J2
CKE
VDDQ_4
VDDQ_6
VDDQ_5
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
T3
C9
H2
H9
J3
K3
J9
M9
P1
P9
T1
T9
F7
F2
F8
H3
H8
G2
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
DQL0
B8
A3
VSS_7
VSS_8
DQL2
VSS_9
VSS_10
DQL4
VSS_11
DQL5
VSS_12
G8
J2
NC_4
L2
K1
J3
K3
L3
J9
T7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
BA0
R9
CKE
VDDQ_4
VDDQ_6
VDDQ_5
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_2
NC_3
NC_4
DQSL
L2
K1
J3
K3
L3
J9
VDD_8
VDDQ_4
VDDQ_6
VDDQ_5
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_2
NC_3
NC_4
DQSL
A8
C1
N7
T3
A3
A6
H1
VREFDQ
A10/AP
A11
A12/BC
A13
D2
E9
F1
H2
H9
VDD_2
VDD_3
VDD_4
VDD_5
VDD_7
VDD_8
BA0
K3
L3
A9
DQSU
DQSU
D3
M9
P1
P9
T1
T9
F7
F2
F8
H3
H8
G2
H7
VSS_1
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
DQ0
VSS_7
VSS_6
E3
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
DQ4
VSS_11
DQ5
VSS_12
C2
A7
A2
B8
A3
M9
P1
VSSQ_2
VSSQ_3
DQ10
VSSQ_4
DQ11
VSSQ_5
DQ12
VSSQ_6
DQ13
F7
F2
P9
F8
T1
H3
T9
H8
G2
H7
DQ8
DQ9
VSSQ_7
DQ14
VSSQ_8
DQ15
VSSQ_9
B9
VSS_1
VSS_2
VSS_3
DML
VSS_4
DMU
VSS_5
DQ0
VSS_7
VSS_6
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
C3
C8
C2
E8
A7
F9
A2
G1
B8
G9
A3
DQ4
VSS_11
DQ5
VSS_12
B3
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
T2
RESET
J9
T7
NC_2
NC_3
NC_4
F3
G3
DQSL
J2
D3
M9
P1
F7
F2
P9
F8
T1
H3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
DQ14
VSSQ_8
DQ15
VSSQ_9
T9
H8
G2
B9
VSS_4
VSS_5
VSS_7
VSS_6
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
C3
C8
C2
E8
A7
F9
A2
G1
B8
G9
A3
DQ4
VSS_11
DQ5
VSS_12
C746
0.1uF
R3
R4
D2
R5
E9
F1
H2
K3
H9
R731
1K
1%
J9
L1
L9
T7
NC_6
R6
C747
0.1uF
L8
A9
M9
P1
P9
T1
D3
T9
F2
F8
H3
H8
G2
VSS_1
VSS_2
VSS_4
VSS_3
DMU
VSS_5
DQ0
VSS_7
VSS_6
E3
F7
H7
DQ1
DQ2
VSS_8
VSS_9
DQ3
VSS_10
DQ4
VSS_11
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
DQ14
VSSQ_8
DQ15
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
DQ5
VSS_12
C2
A7
A2
B8
A3
D17
J2
J8
M1
M9
A19
P1
P9
T1
DQ8
VSSQ_2
DQ9
VSSQ_3
DQ10
VSSQ_4
DQ11
VSSQ_5
DQ12
VSSQ_6
DQ13
VSSQ_7
DQ14
VSSQ_8
DQ15
VSSQ_9
TP700
E2
E8
F9
G9
VSSQ_9
E13
G13
G15
H18
ARDQ6
DDRV_11
ARDQ7
D14
C14
ARDQM0
ARDQS0
B17
/ARDQS0
ARDQ[0]
D10
ARDQ[1]
C17
ARDQ[2]
C10
C18
ARDQ[0-7]
ARDQ[3]
ARDQ[4]
B9
ARDQ[5]
E18
ARDQ[6]
D9
ARDQ[7]
C15
MEMTP
ARDQM1
MEMTN
ARDQS1
ARDQ8
ARDQ9
ARDQ11
ARDQ12
ARDQ13
ARCLK1
ARDQ14
ARCLK1
ARDQ15
ARCLK0
ARDQM2
ARCLK0
ARDQS2
F9
G18
ARRAS
ARDQ17
ARCAS
ARDQ18
ARCS
ARDQ19
ARWE
ARDQ20
ARDQ21
ARA[13]
F16
D8
ARA[11]
E11
ARA[10]
G9
ARA[9]
E16
ARA[8]
F11
ARA[7]
G17
ARA[6]
F10
ARA[5]
E17
ARA[4]
E10
ARA[3]
E15
ARA[2]
F17
ARA[1]
G10
ARA[0]
F18
B11
B16
ARDQM1
ARDQS1
/ARDQS1
ARDQ[8]
ARDQ[10]
A17
ARDQ[11]
C12
ARDQ[12]
A16
ARDQ[13]
C11
ARDQ[14]
C16
ARDQ[15]
D5
C5
E7
ARDQM2
ARDQS2
/ARDQS2
ARDQ[16]
B2
ARDQ[17]
C8
ARDQ[18]
B1
ARDQ[19]
A9
C1
ARDQ[8-15]
ARDQ[9]
A11
ARDQ[16-23]
ARDQ[20]
ARDQ[21]
C9
ARDQ[22]
C3
ARDQ[23]
C6
ARDQM3
ARBA2
ARDQS3
ARDQS3
ARDQ24
ARDQ25
D11
ARA[12]
B13
ARDQ23
ARBA1
ARCSX
ARA[14]
ARDQ22
ARBA0
F15
/ARCSX
C708
10uF
10V
ARDQ16
D15
ARBA0
+1.5V_DDR
ARODT
ARRESET
ARBA2
A13
A3
ARDQS2
G16
ARBA1
C701
10uF
10V
C706
1uF
ARDQ5
DDRV_10
F13
+1.5V_DDR
C727
0.1uF
ARDQ4
DDRV_9
B14
A14
/ARCS
C725
0.1uF
ARDQ3
DDRV_8
ARCKE
A5
/ARWE
C723
0.1uF
DDRV_7
B5
ARREST
C750
0.1uF
ARDQ2
G8
/ARRAS
C719
0.1uF
ARDQ1
DDRV_6
ARDQ10
/ARCAS
C717
0.1uF
DDRV_5
RVREF_A
ARODT
C703
1uF
ARDQ0
D18
G9
ARCLK0
C728
0.1uF
ARDQS0
ARDQS1
/ARCLK0
C726
0.1uF
K22
TP701
RVREF_A
G1
/ARCLK1
C722
0.1uF
ARDQS0
DDRV_3
DDRV_4
J22
B9
D1
D8
G1
ARCKE
C720
0.1uF
ARDQM0
DDRV_2
T9
B1
VSSQ_1
D7
C3
C8
M8
B3
E1
G8
D12
DDRV_1
DQ6
DQ7
VSSQ_2
VSSQ_3
DQ11
DQ12
DQ13
DQSU
DQSU
DML
E7
J2
J8
M1
B1
VSSQ_1
DQ8
DQ9
DQ10
B7
B3
E1
G8
DQ6
DQ7
D7
D1
D8
E2
VSS_1
VSS_2
VSS_3
DML
DMU
DQ0
E3
H7
VSSQ_2
VSSQ_3
DQ11
DQ12
DQ13
R730
1K
1%
A8
C1
C9
DQSL
A9
DQSU
DQSU
E7
J8
M1
B1
VSSQ_1
DQ8
DQ9
DQ10
R2
RVREF_A
R9
J1
NC_1
L1
L9
NC_6
C7
B7
E1
G8
DQ6
DQ7
D7
D1
D8
E2
DQSU
DQSU
D3
E3
R1
N1
N9
R1
A1
VDDQ_1
CK
CK
CKE
DQSL
A9
C7
B7
E7
B1
VSSQ_1
D7
C3
C8
J2
J8
M1
DQ6
DQ7
VSSQ_2
VSSQ_3
DQU3
DQU4
B3
E1
G8
D9
G7
K2
K8
VDD_9
BA1
L2
K1
J3
+1.5V_DDR
B2
VDD_1
VDD_6
NC_5
J7
K7
K9
+1.5V_DDR
L8
ZQ
A7
A8
A9
M2
N8
VREFCA
A4
A5
M7
C9
J1
NC_1
RESET
M8
A0
A1
A2
BA2
CKE
F3
G3
R9
M3
CS
ODT
L7
R7
K8
N1
N9
R1
A1
VDDQ_2
VDDQ_3
T2
DQSL
D9
G7
K2
VDD_9
VDDQ_1
CK
CK
WE
L1
T7
VDD_5
VDD_7
BA1
L9
A14
VDD_1
VDD_2
VDD_3
VDD_4
VDD_6
BA0
R2
T8
R3
B2
BA2
D2
H2
A9
A10/AP
A11
A12/BC
A13
E9
H9
L8
ZQ
A7
A8
NC_5
F1
P8
P2
J7
K7
K9
P7
P3
N2
H1
VREFDQ
R8
A6
IC105
LGE2122[A2_M13]
DDR_256MB_MICRON
VREFCA
A2
A3
A4
A5
M2
C1
C9
J1
NC_1
RESET
F3
T3
N8
A8
A0
A1
M7
M3
CS
ODT
L7
R7
N7
K8
N1
N9
R1
A1
VDDQ_2
VDDQ_3
T2
G3
D9
G7
K2
VDD_9
VDDQ_1
CK
CK
WE
L1
R2
BA1
L9
A14
C7
B7
E7
J8
M1
B1
VSSQ_1
DQU0
DQU1
DQU5
NC_2
NC_3
DQSL
D2
R8
R3
T8
BA2
E9
H2
A9
A10/AP
A11
A12/BC
A13
NC_5
F1
L8
B2
ZQ
A7
J7
K7
K9
H9
A6
N2
P8
P2
IC703-*3
MT41K128M16JT-125:K
N3
M8
N3
P7
P3
H1
VREFDQ
A8
M2
J1
NC_1
RESET
F3
B3
E1
DQL6
DQU2
VDDQ_7
VDDQ_8
VDDQ_9
VREFCA
A2
A3
A4
A5
C7
DQL7
C8
C2
A7
A2
VDDQ_5
T2
T3
A0
A1
M7
N8
A8
C1
C9
DQSL
DQL3
D7
C3
VDDQ_4
VDDQ_6
RAS
CAS
L1
A9
VSS_4
VSS_5
VSS_6
DQL1
R9
M3
CKE
ODT
L7
R7
N7
K8
N1
N9
R1
A1
CS
L9
G3
D9
G7
K2
VDD_9
VDDQ_2
VDDQ_3
L2
K1
L3
NC_4
VSS_1
VSS_2
VSS_3
DML
DMU
VDD_5
VDD_7
VDDQ_1
CK
CK
J1
NC_2
NC_3
DQSU
DQSU
VDD_1
VDD_2
VDD_3
VDD_4
VDD_8
BA0
D2
E9
F1
R2
BA1
J7
K7
K9
R8
R3
T8
VDD_6
NC_5
M2
N8
A8
C1
DQSL
E7
D3
E3
A9
A10/AP
A11
A12/BC
A13
M7
R1
R9
L8
B2
ZQ
A7
WE
NC_1
RESET
L7
R7
N7
A6
N2
P8
P2
A8
DDR_256MB_MICRON
M8
N3
P7
P3
H1
VREFDQ
BA2
C7
B7
J8
M1
H7
VSSQ_2
VSSQ_3
DQU3
DQU4
DQU5
K8
VREFCA
A2
A3
A4
A5
N1
N9
M3
CS
T2
E1
G8
B1
VSSQ_1
DQU0
DQU1
DQU2
D9
G7
K2
A0
A1
A1
WE
L1
DQL6
D7
C3
C8
E8
VDD_8
VDD_9
DQSL
VSS_6
DQL7
E2
VDD_4
VDD_5
VDD_6
VDD_7
VDDQ_2
VDDQ_3
F3
VSS_4
VSS_5
VSS_7
DQL1
B2
VDD_1
VDD_2
VDD_3
VDDQ_1
CK
CK
L2
G3
VSS_1
VSS_2
VSS_3
DML
DMU
DQL0
E3
F7
D1
A12/BC
BA0
BA1
L9
A9
DQSU
DQSU
D3
A9
A10/AP
A11
A13
A14
BA2
K9
R8
R2
T8
R3
NC_4
DQSL
DQSL
E7
L8
ZQ
A7
A8
A15
K1
N2
P8
P2
IC701-*3
MT41K128M16JT-125:K
DDR_512MB_MICRON
M8
N3
P7
P3
H1
VREFDQ
A5
A6
IC703-*2
MT41K256M16HA-125:E
DDR_512MB_MICRON
VREFCA
A2
A3
A4
J7
K7
D2
E9
F1
A0
A1
M2
J1
NC_1
RESET
A8
C1
C9
L3
C7
B7
M7
N8
CKE
F3
B9
T3
T7
M3
CS
T2
B1
VSSQ_1
R3
L7
R7
N7
R1
A1
VDDQ_2
VDDQ_3
WE
G3
D9
G7
K2
VDD_9
VDDQ_1
CK
CK
ODT
R8
R2
T8
B2
BA1
L2
T1
VSS_12
L8
ZQ
A7
A8
BA2
K7
K9
N2
P8
P2
A15
N8
M3
H1
VREFDQ
M8
N3
P7
P3
A2
A3
A4
A5
J7
P9
VREFCA
A1
M2
P1
DDR_512MB_Hynix
M8
A0
IC701-*2
MT41K256M16HA-125:E
IC703-*1
H5TQ4G63AFR-PBC
DDR_512MB_Hynix
N3
P7
G8
ARCLK1
C718
0.1uF
C704
10uF
10V
R1
DQL6
DQL7
ARDQ[8-15]
DQU7
VSSQ_9
VSS_1
DQSU
DMU
DQL7
B1
C745
0.1uF
N9
A9
DQSU
E7
ARDQM2
ARDQM1
C733
0.1uF
DQSL
C7
/ARDQS3
/ARDQS1
R718
1K
1%
DQSL
ARDQS3
ARDQS1
B7
E7
VSS_4
A_RVREF3
NC_4
F3
G3
N1
J1
NC_1
RESET
/ARDQS2
K8
A1
T2
ARDQS2
+1.5V_DDR
+1.5V_DDR
G7
K2
VDD_9
VDDQ_1
NC_3
NC_4
D9
BA1
NC_3
L9
C707
10uF
10V
C705
1uF
C736
0.1uF
B2
WE
ARREST
ARREST
RESET
NC_2
L1
/ARRAS
/ARWE
T2
K1
R721
1K
1%
+1.5V_DDR
A8
L2
ARODT
ARODT
J3
K9
/ARCSX
/ARCS
WE
J1
K7
/ARCLK1
/ARCLK0
K1
L8
1%
240
R716
ZQ
A7
BA2
ARCKE
ARCKE
L2
C735
0.1uF
H1
J7
R714
100
5%
R712
100
5%
K7
K9
M3
ARBA2
R720
1K
1%
VREFDQ
A4
ARCLK0
J7
CK
VDDQ_2
C1
C9
N8
ARBA1
ARCLK1
ARBA2
A_RVREF2
A_RVREF3
A2
M2
ARBA0
ARBA0
N8
BA2
A1
VREFCA
ARA[2] P3
ARA[3] N2
P2
R2
M8
A0
A1
P8
R8
ARA[0] N3
ARA[1] P7
ARA14
ARDQ26
ARA13
ARDQ27
ARA12
ARDQ28
ARA11
ARDQ29
ARA10
ARDQ30
ARA9
ARDQ31
A4
B4
A1
ARDQM3
ARDQS3
/ARDQS3
ARDQ[24]
B7
ARDQ[25]
C4
ARDQ[26]
C7
ARDQ[27]
B3
ARDQ[28]
A7
ARDQ[29]
A2
ARDQ[30]
D7
ARDQ[31]
ARDQ[24-31]
VDD3V3
ARA8
ARA
A20
ARA6
AVDD33_MEMPLL
ARA5
AVSS33_MEMPLL
H9
ARA4
C700
0.1uF
ARA3
ARA2
ARA1
ARA0
ARA[0-14]
IC702
MT41K128M16JT-125:K
+1.5V_DDR
B_RVREF6
DDR_256MB_MICRON
R702
1K
1%
C709
0.1uF
VREFCA
A2
H1
VREFDQ
R703
1K
1%
R711
1%
240
A5
L8
ZQ
D9
G7
K2
C711
0.1uF
K8
N1
N9
R705
1K
1%
R1
C712
0.1uF
A6
A7
A8
B2
+1.5V_DDR
R704
1K
1%
A3
A4
C710
0.1uF
+1.5V_DDR
B_RVREF6
A0
A1
B_RVREF5
R9
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
VDD_6
VDD_7
D2
E9
F1
H2
H9
L1
L9
BRA[14]
T7
P3
P8
R8
BRA[5]
T8
L7
R8
BRA[6]
N7
R2
BRA[7]
T8
BRA[8]
P8
R3
BRA[10]
R7
BRA[11]
BRA[12]
T3
BRA[13]
G8
J8
M1
M9
P1
P9
T1
T9
D8
E2
E8
F9
G1
G9
R7
T3
VDDQ_2
CKE
A11
VDD_3
VDD_4
VDDQ_6
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
BRCLK0
B7
VDDQ_6
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
D3
R713
100
5%
F8
/BRCLK0
H8
G2
/BRCS
H7
BRODT
D7
C3
K3
/BRRAS
C8
/BRCAS
A7
/BRWE
B8
C2
L3
A2
T2
BRREST
NC_3
F3
DQSL
BRDQS0
G3
/BRDQS0
C7
VSS_1
DQSU
VSS_2
DQSU
VSS_3
BRDQS1
B7
/BRDQS1
DML
VSS_5
DMU
BRDQM0
D3
DQ0
VSS_8
DQ1
VSS_9
DQ2
VSS_10
DQ3
VSS_11
DQ4
VSS_12
DQ5
VSSQ_2
VSSQ_3
DQ9
VSSQ_4
DQ10
VSSQ_5
DQ11
VSSQ_6
DQ12
VSSQ_7
DQ13
VSSQ_8
DQ14
VSSQ_9
DQ15
N9
C742
0.1uF
J1
/BRCLK0
VSS_2
R1
BRDQ3
R9
BRDQ4
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
NC_1
RESET
NC_2
NC_3
NC_4
F3
VSS_4
VSS_5
VSS_7
VSS_8
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C7
B3
B7
DQSL
A8
C1
G8
E7
D3
BRCKE
D2
E9
F1
H9
/BRRAS
J1
/BRCAS
J9
L1
L4
D3
D4
/BRCS
L9
F7
F2
P9
F8
T1
H3
T9
H8
G2
DQL6
H7
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_4
VSS_5
VSS_6
DQL0
DQL1
DQL2
VSS_7
VSS_8
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
M6
BRBA1
G8
E4
BRBA2
J2
BRDQM1
BRCAS
BRDQS1
BRCS
BRDQS1
BRDQ8
BRBA0
BRDQ9
BRBA1
BRDQ10
BRBA2
BRDQ11
J8
M1
M9
P1
BRA[0-15]
/BRWE
BRDQ12
K4
BRWE
P9
T1
BRA[15]
J3
T9
BRA[14]
P4
BRA[13]
G5
B9
D1
BRA[12]
P6
BRA[11]
P5
D8
E2
E8
F9
BRA[10]
L5
BRA[9]
F4
BRA[8]
P3
BRA[7]
H4
BRA[6]
P2
BRA[5]
K6
BRA[4]
M5
BRA[3]
K5
BRA[2]
G6
BRA[1]
N5
BRA[0]
E5
G1
G9
H1
BRDQM0
BRDQS0
E2
/BRDQS0
BRDQ[0]
N3
BRDQ[1]
E1
BRDQ[2]
N1
D1
P1
BRDQ[0-7]
BRDQ[3]
BRDQ[4]
BRDQ[5]
D2
BRDQ[6]
N2
BRDQ[7]
H3
BRRAS
J4
BRBA0
B3
E1
B1
VSSQ_1
D7
BRODT
T7
DQL6
DQL7
B1
VSSQ_1
DML
E3
M9
P1
VSS_1
VSS_2
BRDQ6
H2
BRDQ7
E3
BRODT
H2
NC_6
VSS_3
DMU
J8
M1
BRDQ5
L6
BRCKE
C9
A9
DQSU
DQSU
J2
BRDQ0
BRDQ1
A1
VDDQ_2
VDDQ_3
T2
E1
BRCLK0
BRCLK0
VDD_9
VDDQ_1
CK
CK
L9
A9
BRDQS0
BRDQ2
BRDQ13
BRDQ14
BRA15
K1
K2
N4
BRDQM1
BRDQS1
/BRDQS1
BRDQ[8]
F2
BRDQ[9]
M3
BRDQ[10]
F1
BRDQ[11]
L2
F3
BRDQ[8-15]
BRDQ[12]
BRDQ[13]
M4
BRDQ[14]
G3
BRDQ[15]
BRDQ15
BRA14
BRA13
BRA12
BRA11
BRA10
BRA9
BRA8
BRA7
BRA6
BRA5
BRA4
BRA3
BRA2
BRA1
B19
C19
F7
BRDQ[1]
D19
F2
BRDQ[2]
E19
F8
BRDQ[3]
F19
H3
BRDQ[4]
G19
H8
BRDQ[5]
F5
G2
BRDQ[6]
H5
H7
BRDQ[7]
N8
BRDQ[8-15]
DQ8
BRDQS0
BRDQ[0]
DQ7
VSSQ_1
K3
L1
K8
N1
R727
1K
1%
BRDQM0
BRDQM1
E3
VSS_7
VDD_7
VDD_8
G7
K2
L1
RVREF_C
J2
BRCLK0
BA1
CKE
K1
J3
T7
VDD_5
VDD_6
L2
F1
H2
C2
C741
0.1uF
+1.5V_DDR
BRDQ[0-7]
VSS_6
DQL1
DQL2
VDD_3
VDD_4
BA2
D2
R726
1K
1%
D9
DQSL
VSS_1
VSS_6
DQL0
A11
A12/BC
BA0
RVREF_C
B2
VDD_1
VDD_2
NC_5
K7
J9
L8
ZQ
A9
A10/AP
J7
K9
H9
A6
A7
A8
M2
C1
C9
E9
H1
VREFDQ
A4
A5
BRA0
E7
VSS_4
A8
G3
DQL7
RESET
NC_4
DML
DMU
F7
F2
J3
R9
VREFCA
A2
A3
M7
R1
NC_6
VSS_3
E3
BRCKE
K1
N9
A0
A1
A13
L3
NC_2
NC_4
DQSU
T3
J1
NC_1
DQSL
DQSU
A3
NC_2
VDDQ_4
VDDQ_5
CS
ODT
C7
K9
K8
N1
DQSL
BRBA2
K7
N7
M3
WE
BRBA1
R7
N8
NC_3
M3
G7
K2
A1
VDDQ_2
VDDQ_3
F3
G3
R3
L7
VDD_9
VDDQ_1
CK
CK
CKE
L3
WE
NC_1
VDD_7
VDD_8
BA0
B2
D9
BA1
L2
BRA[15]
L2
CS
VDD_5
VDD_6
BA2
H3
VDDQ_5
R2
A12/BC
NC_5
K7
K9
R8
T8
VDD_1
VDD_2
E7
CK
VDDQ_4
P2
A9
A10/AP
J7
N2
P8
L8
ZQ
A7
A8
M2
BRBA0
N8
J7
CK
VDDQ_3
H1
VREFDQ
A5
A6
M7
N8
P7
RVREF_C
M8
N3
P3
A4
A13
M3
VREFCA
A2
A3
+1.5V_DDR
DDR_256MB_HYNIX
M8
A0
A1
RESET
VDDQ_1
B1
D1
R3
K3
DQ6
B9
R2
K1
M2
A9
J2
P2
BRA[9]
L7
N7
DQSL
E1
N2
BRA[3]
BRA[4]
P2
N2
BA2
NC_6
B3
P7
T2
J1
J9
P3
M7
BA0
BA1
C9
N3
IC105
LGE2122[A2_M13]
IC702-*2
H5TQ2G63DFR-PBC
DDR_256MB_SS
BRA[1]
BRA[2]
NC_5
VDD_8
A1
C1
BRA[0]
P7
J3
VDD_9
A8
IC702-*1
K4B2G1646E-BCK0
BRA[0-14]
N3
M8
B_RVREF5
D7
BRDQ[8]
C3
BRDQ[9]
C8
BRDQ[10]
C2
BRDQ[11]
A7
BRDQ[12]
A2
BRDQ[13]
B8
BRDQ[14]
A3
BRDQ[15]
P8
D13
E8
G11
D20
E20
F20
G20
R7
R8
T5
T6
T7
T8
DDRV_12
DDRV_13
DDRV_14
DDRV_15
DDRV_16
DDRV_17
DDRV_18
DDRV_19
DDRV_20
G4
BRRESET
BRREST
DDRV_21
DDRV_22
DDRV_23
DDRV_24
DDRV_25
DDRV_26
DDRV_27
DDRV_28
DDRV_29
DDRV_30
DDRV_31
DDRV_32
DDRV_33
DDRV_34
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2011.12.09
DDR ONE SIDE
12
LGE Internal Use Only
CI_DATA[0-7]
CI_A_DATA[0-7]
CI_A_DATA[0]
AR904
0
CI
CI_DATA[1]
CI_A_DATA[1]
CI DETECT
CI_A_DATA[2]
CI_DATA[2]
CI_A_DATA[3]
CI_DATA[3]
CI_A_DATA[4]
+3.3V_NORMAL
CI TS INPUT
Close to MT5369
MT5398_TS_OUT[0-7]
AR902
47
MT5398_TS_OUT[0]
R910
10K
CI
CI_MDI[0-7]
CI
CI_MDI[1]
MT5398_TS_OUT[2]
CI_MDI[2]
MT5398_TS_OUT[3]
CI_MDI[3]
CI
CI_MDI[5]
CI_MDI[6]
MT5398_TS_OUT[7]
CI_MDI[7]
R929
10K
CI
/CI_CD1
R930
47K
CI
R933
10K
OPT
R934
10K
OPT
R935
10K
CI
/CI_CD2
MT5398_MISTRT
R908
47 CI
R909
MT5398_MCLKI
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_A_DATA[7]
CI_DATA[7]
R936
10K
CI
PCM_INPACK
CI_A_ADDR[0-14]
CI_ADDR[0-14]
CI_VS1
R913
47K
CI
R906
10K
OPT
R919
47K
CI
R918
47K
CI
R923
10K
OPT
CI_A_ADDR[0] AR906
CI_A_ADDR[1]
/PCM_REG
R924
10K
OPT
/PCM_CE2
PCM_RST
MT5398_MIVAL_ERR
CI
/PCM_WAIT
+3.3V_NORMAL
AR903
47
47 CI
0
CI_A_DATA[6]
+5V_CI_ON
R914
10K
CI
CI_MDI[4]
MT5398_TS_OUT[5]
MT5398_TS_OUT[6]
R907
AR905
CI_A_DATA[5]
CI_MDI[0]
MT5398_TS_OUT[1]
MT5398_TS_OUT[4]
CI_DATA[0]
CI_IN_TS_VAL
47 CI
C902
12pF
50V
OPT
CI_ADDR[1]
CI_ADDR[2]
CI_ADDR[3]
0
CI
CI_ADDR[6]
22
R931
CI_VS1
OPT
R932
CI_ADDR[7]
CI_A_ADDR[8] AR908
CI_A_ADDR[9]
CI_A_VS1
0
/PCM_REG
CI
CI_ADDR[9]
CI_ADDR[10]
CI_A_ADDR[11]
CI_ADDR[11]
0
CI
CI_ADDR[12]
CI_ADDR[13]
CI_A_ADDR[14]
OPT
CI_ADDR[8]
CI_A_ADDR[10]
CI_A_ADDR[12]AR909
CI_A_ADDR[13]
22
/PCM_A_REG
CI_ADDR[4]
CI_ADDR[5]
CI_A_ADDR[7]
Close to CI Slot
CI_ADDR[0]
CI_A_ADDR[2]
CI_A_ADDR[6]
CI_IN_TS_CLK
Close to MT5369
CI
CI_A_ADDR[3]
CI_A_ADDR[4] AR907
CI_A_ADDR[5]
/PCM_IRQA
R900
10K
OPT
CI_IN_TS_SYNC
0
CI_ADDR[14]
CI TS OUTPUT
/PCM_IORD
/PCM_IOWR
Close to CI Slot
MT5398_TS_IN[0-7]
MT5398_TS_IN[0]
MT5398_TS_IN[1]
AR900
47 CI
/PCM_OE
/PCM_WE
CI_TS_DATA[1]
MT5398_TS_IN[2]
/PCM_CE1
CI_TS_DATA[2]
MT5398_TS_IN[3]
MT5398_TS_IN[4]
CI_TS_DATA[0-7]
CI_TS_DATA[0]
CI_TS_DATA[3]
AR901
47 CI
CI_TS_DATA[4]
MT5398_TS_IN[5]
CI_TS_DATA[5]
MT5398_TS_IN[6]
CI_TS_DATA[6]
MT5398_TS_IN[7]
CI_TS_DATA[7]
Close to CI Slot
MT5398_TS_CLK
MT5398_TS_VAL
MT5398_TS_SYNC
R915
47
CI
R916
47
CI
R917
47
CI
+5V_CI_ON
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
C900
12pF
50V
OPT
C904
0.1uF
CI
Close to MT5398
C905
10uF
10V
CI
CI_A_DATA[0-7]
JK900
10120698-015LF
R911
22
100
CI
R912
CI_A_DATA[3]
3
CI_A_DATA[4]
CI_TS_DATA[4]
38
4
CI_A_DATA[5]
CI_TS_DATA[5]
39
5
CI_A_DATA[6]
CI_TS_DATA[6]
CI_TS_DATA[7]
40
6
41
7
42
8
22
CI_MDI[0-7]
PCM_RST
10
45
CI_A_ADDR[10]
CI_A_ADDR[11]
11
CI_A_ADDR[9]
46
12
CI_A_ADDR[8]
47
13
CI_A_ADDR[13]
48
14
CI_MDI[2]
49
15
CI_MDI[4]
CI_MDI[5]
0
OPT
CI_A_ADDR[14]
R940
16
50
51
17
52
18
53
19
C906
R938
0
OPT
0.1uF
CI
CI
54
20
55
21
56
22
CI_A_ADDR[7]
57
23
CI_A_ADDR[6]
58
24
CI_A_ADDR[5]
R922
59
25
CI_A_ADDR[4]
R920
22 OPT
60
26
CI_A_ADDR[3]
61
27
62
28
CI_A_ADDR[1]
63
29
CI_A_ADDR[0]
64
30
65
31
66
32
67
33
CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
/CI_CD2
R928 CI 100
34
68
R925
0
G2
69
/PCM_OE
CI_A_ADDR[12]
22 CI
22 CI
CI_TS_VAL
22
22
C907
0.1uF
16V
CI_MDI[7]
/PCM_A_REG
R941
R942
/PCM_WE
/PCM_IRQA
22 CI
CI_MDI[6]
CI_TS_CLK
/PCM_WAIT
9
44
CI_A_DATA[7]
CI R939
22
CI_MDI[0]
R926
PCM_INPACK
43
/PCM_CE1
CI_MDI[1]
CI_MDI[3]
R921
1
2
/PCM_CE2
CI_VS1
/PCM_IORD
/PCM_IOWR
35
36
37
R927
/CI_CD1
CI_TS_DATA[3]
CI_A_ADDR[2]
CI_A_DATA[0]
CI_A_DATA[1]
+5V_CI_ON
CI_A_DATA[2]
R937
10K
OPT
G1
CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
MID_MAIN_CI
2011.11.21
13
LGE Internal Use Only
FROM LPB & PSU
+12V
L2401
CIS21J121
C2401
0.1uF
50V
L/DIM0_MOSI_PWR
8
GND
24V
9
10
24V
GND
11
12
GND
12V
13
14
12V
12V
15
16
24V
17
18
GND
GND
19
20
GND
22
L/DIMO_VS
24
L/DIM0_SCLK
GND
21
L/DIM0_MOSI
23
19
D
S
R2442
33K
C2440
1uF
25V
OPT
L/DIM0_MOSI_PWR
L/DIM_OUT
R2456
33
L/DIM0_VS
L/DIM0_VS_PWR
G
C2435
4.7uF
50V
VDD3V3_HDMI
L/DIM0_MOSI
C2413
0.1uF
50V
GND
L/DIM0_SCLK_PWR
L/DIM_OUT
R2458
33
+24V
L2403
CIS21J121
L/DIM0_VS_PWR
NTR4501NT1G
Q2408
C2453
0.1uF
16V
R2437
10K
PANEL_CTL
1/8W
2K
7
PWM_DIM2
1/8W
2K
OPT
R2452
GND
L/DIM0_SCLK
PWM_DIM1
OPT
R2451
PDIM#2
R2453
10K
R2441
5.6K
PDIM#1
6
C2432
0.01uF
50V
PANEL_VCC
L/DIM_OUT
R2459
33
PANEL_VCC
Q2407
AO3407A
C2433
0.1uF
50V
G
4
R2425
100
S
INV ON
5
3.5V
C2406
0.1uF
16V
2
R2457
4.7K
PWR ON 1
3.5V
3
+3.3V_NORMAL
R2426
1K
INV_CTL
D
POWER_18P
L2402
CIS21J121
OPT
1/16W
5%
P2400
SMAW200-H24S2
2
R2401
10K
+3.5V_ST
R2454
0
3
1
L/DIM_OUT
10K
L2408
BLM18SG121TN1D
Q2401
R2408
PANEL_POWER
+3.3V_NORMAL
MMBT3906(NXP)
RL_ON
TYP 1450mA
+12V
HDMI LEAKAGE Workaround in MTK A2(A0) (Default= with HDMI_LEAKAGE)
+3.5V_ST
C2443
0.1uF
50V
C
Q2406
MMBT3904(NXP)
B
E
L/DIM0_SCLK_PWR
POWER_24P
25
SMAW200-H18S1
P2401
+5V_Normal
IC2401-*1
R2412-*1
8.2K
P_DET_BOTH_12_24V
P_DET_BOTH_12_3.5V
C2410-*1
0.1uF
R2416-*1
50V
100K
P_DET_BOTH_24_3.5V
P_DET_BOTH_24_3.5V
R2409-*1
1.2K
1%
P_DET_BOTH_12_24V
P_DET_BOTH_24_3.5V
R2410-*2
2.7K
1%
1
R2418-*2
100
GND
NC_1
R2409-*2 P_DET_BOTH_12_24V
1.2K
1%
NC_2
+24V
L2406
Power_DET
R2417
100K
3
4
+24V
C2417
10uF
35V
R2421
10K
OPT
C2428
10uF
10V
C2429
0.1uF
16V
GND
EN
POWER_ON/OFF1
POWER_ON/OFF2_1
POWER_ON/OFF2_2
POWER_ON/OFF2_3
POWER_ON/OFF2_4
POWER_ON/OFF2_3
R2439
10K
R2419
100
51K
R2438
R2
C2427
0.1uF
16V
R1
1%
POWER_DET
C2424
150pF
50V
P_DET_BOTH_12_3.5V
R2416
100K
Vout=1.222*(1+R1/R2)
not to RESET at 8kV ESD
R2400
IC2401
0
P_DET_BOTH_12_3.5V NCP803SN293
R2418
100
P_DET_BOTH_24_3.5V
VCC
P_DET_BOTH_24_3.5V
5
125C
C2426
22uF
10V
GND
+3.5V_ST
R2411
1.5K
1%
5A
125C
C2425
22uF
10V
1%
C2412
0.1uF
16V
R2412
8.2K
6
VIN
C2422
0.1uF
50V
1
C2411
0.1uF
16V
P_DET_ONLY_12V
R2409
1.2K
1%
7
L2407
4.7uH
SW
+3.5V_ST
R2413
IC2402
0
NCP803SN293
5%
P_DET_BOTH_24_3.5V
VCC 3
2 RESET
R2436
16K
+3.5V_ST
On-semi
2
BLM18PG121SN1D
P_DET_ONLY_12V
R2410
2.7K
1%
8
P_DET_BOTH_12_24V
FB
+12V
1
[EP]GND
JP2411
C2423
0.01uF
50V
BOOT
C2410-*2
0.1uF
50V
P_DET_BOTH_12_24V
JP2410
P_DET_BOTH_12_24V
IC2404
RT8289GSP
JP2408
P_DET_BOTH_24_3.5V
R2418-*1
100
NCP803SN293
R2411-*1
P_DET_BOTH_12_24V
1.5K
R2416-*2
1%
VCC 3
100K
2 RESET
40V
GND
R2410-*1
2.7K
1%
IC2401-*2
P_DET_BOTH_12_24V
1
P_DET_BOTH_12_3.5V
+5V_NORMAL
RESET
D2401
B540C
2
9
3
THERMAL
VCC
JP2409
NCP803SN293
3
C2410
GND
0.1uF
50V
P_DET_BOTH_12_3.5V
2
RESET
P_DET_BOTH_12_3.5V
1
24V-->3.48V
12V-->3.58V
ST_3.5V-->3.5V
P_DET_BOTH_12_3.5V
DDR MAIN 1.5V
DDR MAIN 1.5V
+3.3V_NORMAL
C2420
MAX
C2404
0.1uF
16V
POWER_ON/OFF1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R2432
1/16W 330K 5%
R2431
15K
5%
R1
C2421
4700pF
C2452
100pF
50V
POWER_ON/OFF2_2
C2434
0.1uF
16V
OPT
R2414
10KC2436
0.1uF
16V
SS
3
6
4
5
C2415
1uF
10V
VBST
16V
0.1uF
C2437
NR8040T2R0N
C2438
10uF
10V
C2439
10uF
10V
SW
GND
C2442
10uF
10V
C2444
10uF
10V
C2445
100pF
50V
OPT
1%
VIN
R1
ZD2400
5V
C2431
10uF
16V
7
OPT
C2430
10uF
16V
8
1/16W
1%
C2457
0.1uF
16V
C2447
10uF
10V
2
1%
C2454
10uF
10V
ZD2401
5V
13
14
15
16
C2450
C2451
10uF
10V
0.01uF
50V
1/16W
Vout=0.8*(1+R1/R2)
C2456
10uF
10V
1
R2427
30K
PWRGD
EP[GND]
EN
BOOT
NR5040T2R2N
R2455
1%
R2
11
PH_1
10
IC2403
SS/TR
TPS54319TRE
9
4
OPT
R2403
10K
R1
2
3
3A
7
R2402
6.8K
GND_2
VFB
VREG5
47K 1%
COMP
C2419
0.1uF
16V
PH_2
Placed on SMD-TOP
L2411
2.2uH
8
EN
C2418
10uF
10V
COMP
5
GND_1
C2448
10uF
10V
PH_3
L2410
2uH
IC2405
TPS54327DDAR [EP]GND
EN
12
RT/CLK
6
6A
C2441
47pF
50V
OPT
THERMAL
17
AGND
4
C2414
10uF
10V
R2404
5.1K
9
3
C2409
10uF
10V
ZD2402
5V
FB
C2408
10uF
10V
C2405
0.0068uF
50V
OPT
C2403
0.1uF
16V
OPT
C2407
10uF
10V
SW_1
VIN_2
1%
C2402
10uF
16V
7
SW_2
R2406
10K
AGND
C2400
10uF
16V
2
8
THERMAL
VIN
1
1
6
VIN_1
PGND
VIN_3
L2404
2uH
[EP]
5
IC2400
BD86106EFJ
VSENSE
L2400
BLM18PG121SN1D
Placed on SMD-TOP
L2409
BLM18PG121SN1D
R2440
3.3K
+1.5V_DDR
16V
L2405
BLM18PG121SN1D
9
+1.2V_MTK_CORE
+12V
+3.3V_NORMAL
3.4 A
+12V
C2455
0.1uF
THERMAL
0.1uF
16V
+3.5V_ST
R2428
10K
10K
R2430
POWER_ON/OFF2_1
R2
C2416
3300pF
50V
50V
3A
Vout=0.827*(1+R1/R2)=1.521V
R2433
56K
1/16W
1%
R2
Vout=0.765*(1+R1/R2)
MID_POWER
2011.11.25
24
LGE Internal Use Only
Renesas MICOM
For Debug
32.768KHz
2
HDMI_WAUP:HDMI_INIT
MICOM_DEBUG
MICOM_DEBUG
X3000
1
R3028
LOGO_LIGHT
LOGO_LIGHT
8pF
C3003
MICOM_RESET
8pF
Don’t remove R3014,
not making float P40
C3002
R3016 1K
P3000
12507WS-04L
R3014 10K
MICOM_DEBUG
MICOM_DEBUG
+3.5V_ST
+3.5V_ST
3
MHL_DET
MICOM_RESET
4
4.7M
OPT
5
R3030
P120/ANI19
MICOM_RESET_SW
SW3000
JTP-1127WEM
270K
OPT
P124/XT2/EXCLKS
41
37
P123/XT1
42
P41/TI07/TO07
P137/INTP0
43
P40/TOOL0
P122/X2/EXCLK
44
C3001
+3.5V_ST
38
P121/X1
45
C3000
0.1uF
C3004
0.1uF
16V
39
REGC
46
Commercial
RESET
VSS
47
0.47uF
VDD
48
Ready For
+3.5V_ST
R3031
MICOM_RESET_22OHM
R3029
22
GND
40
10K
R3032
10K
MHL_DET
2
1
4
3
ST_BY_DET_CAM
ST_BY_DET_CAM
MICOM_RESET_33OHM
R3029-*1 33
R3021
10K
GP4 High/MID Power SEQUENCE
P60/SCLA0
1
36
P140/PCLBUZ0/INTP6
P61/SDAA0
2
35
P00/TI00/TXD1
P62
3
34
P01/TO00/RXD1
33
P130
IC3000
32
P20/ANI0/AVREFP
R5F100GEAFB
31
P21/ANI1/AVREFM
30
P22/ANI2
I2C_SCL_MICOM
POWER_ON/OFF!
I2C_SDA_MICOM
EDID_WP
POWER_ON/OFF2_1
EDID_WP
P63
4
P31/TI03/TO03/INTP4
5
P75/KR5/INTP9/SCK01/SCL01
6
P74/KR4/INTP8/SI01/SDA01
7
PANEL_CTL
WOL/WIFI_POWER_ON
IR
POWER_ON/OFF2_2
HDMI_CEC
KEY1
MODEL1_OPT_1
29
P23/ANI3
9
28
P24/ANI4
10
27
P25/ANI5
P70/KR0/SCK21/SCL21
11
26
P26/ANI6
P30/INTP3/RTC1HZ/SCK11/SCL11
12
25
P27/ANI7
P71/KR1/SI21/SDA21
EYE_SCL
CAM_PWR_ON_CMD
KEY2
P72/KR2/SO21
EYE_SDA
CAM_PWR_ON_CMD
SCART_MUTE
POWER_ON/OFF2_4
POWER_ON/OFF2_1
8
POWER_ON/OFF2_3
POWER_ON/OFF2_4
MICOM_LEAD_Au
SCART_MUTE
POWER_ON/OFF2_4
P73/KR3/SO01
POWER_ON/OFF2_2
POWER_ON/OFF2_3
RL_ON
MODEL1_OPT_4
MODEL1_OPT_0
SIDE_HP_MUTE
MODEL1_OPT_3
MODEL1_OPT_2
P21/ANI1/AVREFM
P74/KR4/INTP8/SI01/SDA01
7
30
P22/ANI2
29
P23/ANI3
MICOM_LEAD_Cu
26
P26/ANI6
P30/INTP3/RTC1HZ/SCK11/SCL11
12
25
P27/ANI7
P147/ANI18
P146
P10/SCK00/SCL00
P11/SI00/RXD0/TOOLRXD/SDA00
P12/SO00/TXD0/TOOLTXD
P13/TXD2/SO20
P14/RXD2/SI20/SDA20
P15/PCLBUZ1/SCK20/SCL20
P16/TI01/TO01/INTP5
P17/TI02/TO02
13
P50/INTP1/SI11/SDA11
MICOM_NON_LOGO_LIGHT
R3012
10K
MICOM_TACT_KEY
R3008
10K
MICOM_LCD/OLED
R3005
10K
MICOM_GP3_12/15PIN
R3004
10K
MICOM_M13
R3001
10K
MICOM_NON_GED
R3000
10K
P51/INTP2/SO11
MODEL1_OPT_5
24
11
23
P25/ANI5
P70/KR0/SCK21/SCL21
22
27
21
10
20
P71/KR1/SI21/SDA21
19
P24/ANI4
MODEL1_OPT_4
18
28
17
9
16
P72/KR2/SO21
15
MODEL1_OPT_3
8
14
P73/KR3/SO01
24
23
22
P146
20
19
18
17
16
15
14
21
P10/SCK00/SCL00
P147/ANI18
CAM_CTL
31
CAM_CTL
R5F100GEAFB#30
MODEL1_OPT_5
6
AMP_MUTE
P20/ANI0/AVREFP
P75/KR5/INTP9/SCK01/SCL01
SOC_RX
32
P11/SI00/RXD0/TOOLRXD/SDA00
P130
IC3000-*1
33
5
P13/TXD2/SO20
P120/ANI19
37
4
P31/TI03/TO03/INTP4
P12/SO00/TXD0/TOOLTXD
P41/TI07/TO07
38
P01/TO00/RXD1
P63
SOC_TX
P40/TOOL0
39
P00/TI00/TXD1
34
INV_CTL
RESET
40
P140/PCLBUZ0/INTP6
35
3
P14/RXD2/SI20/SDA20
P124/XT2/EXCLKS
36
2
P62
P15/PCLBUZ1/SCK20/SCL20
P123/XT1
1
P61/SDAA0
P16/TI01/TO01/INTP5
P137/INTP0
41
P60/SCLA0
SOC_RESET
GED
Ready for sample set
WOL_CTL
MODEL1_OPT_2
NON_GED
Need to Assign ADC port
LED_R
MODEL1_OPT_1
MODEL_OPT_5
Ready for sample set
For CEC
LED_R
MODEL1_OPT_0
P122/X2/EXCLK
H13
42
M13
43
MODEL_OPT_4
44
IR_wafer(10pin)
45
PDP
IR_wafer(12/15)
P121/X1
LCD / OLED
MODEL_OPT_3
REGC
MODEL_OPT_2
VSS
TOUCH_KEY
VDD
TACT_KEY
For LOGO LIGHT
46
MODEL_OPT_1
LOGO
47
NON LOGO
48
MICOM_OLED_FRC
R3007-*2
22K
MICOM_OLED_MAIN
R3007-*1
56K
MICOM_LOGO_LIGHT
R3013
10K
MICOM_TOUCH_KEY
R3010
10K
MICOM_PDP
R3007
10K
MICOM_H13
R3003
10K
MICOM_NC4_8PIN
R3006
10K
MICOM_GED
R3002
10K
MODEL_OPT_0
P17/TI02/TO02
1
POWER_DET
0
+3.5V_ST
POWER_ON/OFF1
MICOM MODEL OPTION
P51/INTP2/SO11
13
MICOM MODEL OPTION
WOL/ETH_POWER_ON
P50/INTP1/SI11/SDA11
EYE_Q_10P
R3035
3.3K
+3.5V_ST
EYE_Q_10P
R3036
3.3K
SOC_RESET
+3.5V_ST
R3034
120K
G
R3033
27K
D3000
Q3001
RUE003N02
HDMI_CEC_FET_ROHM
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
S
D
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
HDMI_CEC
S
D
BAT54_SUZHO
G
CEC_REMOTE
Q3001-*1
SI1012CR-T1-GE3
HDMI_CEC_FET_VISHAY
2012.02.22
MICOM
30
LGE Internal Use Only
CK-_HDMI4_JACK
CK+_HDMI4_JACK
D0+_HDMI4_JACK
D0-_HDMI4_JACK
6
5
NON_TU_H/N/S_T/US
5.1
4
OPT
7
8
9
10
L3302
BLM18PG121SN1D
+3.3V_NORMAL
Close to SIL1292
VDD33_1
RXC-
3
1
2
R3389
R3388
5.1
RX0-
RX0+
RX1-
RX1+
RX2-
RX2+
RXC+
D1+_HDMI4_JACK
D2-_HDMI4_JACK
D2+_HDMI4_JACK
D1-_HDMI4_JACK
D3302
RCLAMP0524PA
6
5
8
9
10
7
4
3
2
1
OPT
D3303
RCLAMP0524PA
VDD33_2
[EP]GND
+3.3V_NORMAL
SIL_HPD/CBUS
1.2V_MHL
+1.23V_D_Demod
C3320
0.1uF
16V
C3316
0.1uF
16V
6
5
4
3
2
1
31
32
33
34
35
36
37
25
TX1-
D0+_HDMI4_MHL
9
22
TX2+
10
21
HPD_IN
5V_MHL
L3301
BLM18PG121SN1D
C3318
0.1uF
16V
5V_MHL
D1+_HDMI4_MHL
D2-_HDMI4_MHL
C3321
0.1uF
16V
R3348
10K
D2+_HDMI4_MHL
HDMI_HPD_4_MHL
20
19
TX2-
18
23
17
24
8
16
7
15
+5V_NORMAL
C3311
0.1uF
16V
D1-_HDMI4_MHL
DSCL
VDD5_IN
+3.3V_NORMAL
CK+_HDMI4_MHL
D0-_HDMI4_MHL
TX1+
5V_MHL
S
SIL1292CNUC
14
SIL_HPD/CBUS
TX0+
DSDA
CBUS/HPD
Q3314
PMBFJ177
38
40
DDC_SDA_MHL
26
CK-_HDMI4_MHL
R3358
CK-_HDMI4_JACK
CK_GND
CK+
CK+_HDMI4_JACK
D0D0-_HDMI4_JACK
+3.5V_ST
D0_GND
VDD12_2
CEC_A
CSCL
CSDA
GPIO0
HDMI_DET
GPIO1/CI2CA
CEC_REMOTE
PS_CTRL
SOC_RX
OPT
CE_REMOTE
CK-
C3313
0.1uF
16V
DDC_SDA_MHL
DDC_SCL_4_JACK
VREG33_OUT
0
100
100
RSVDNC
R3342
R3308
R3309
OPT
DDC_CLK
VA3301
ADLC 5S 02 015
DDC_DATA
1.2V_MHL
5V_MHL
+3.3V_NORMAL
R3362
10K
OPT
R3355
HDMI_DET
4.7K
OPT
R3345
R3357
10K
4.7K
C
Q3310
B
MMBT3904(NXP)
D0+
MHL_DET
D0+_HDMI4_JACK
E
D1D1-_HDMI4_JACK
D1_GND
E MMBT3906(NXP)
Q3302
R3375
10K
D1+
D1+_HDMI4_JACK
B
D2D2-_HDMI4_JACK
C
R3373
1K
D2_GND
D2+
D2+_HDMI4_JACK
51U019S-312HFN-E-R-B-LG
JK3301
C
B
I2C_SCL4
7
INT
IC3304
I2C_SDA4
8
6
R3351
TX0-
R3363 10K
9
MHL_DET
TXC+
27
HDMI_DET
11
10
5
TXC-
28
R3374
10K
EAG62611204
12
PWR5V_DET
AVDD12
29
GND
NC
13
4
30
THERMAL
41
4.7K
OPT
15
14
RESET
DDC_SCL_MHL
D
G
VA3300
OPT ADLC 5S 02 015
16
3
4.7K OPT
R3370
1K
#MHL_OCP
MHL_DET
TP3300
Q3301
1/16W
5%
R3386
180K
17
5V
+12V
C3322
0.1uF
16V
OPT
R3387
120K
18
5VBUS
OPT
HP_DET
19
C3314
0.1uF
16V
R3371
820
VA3303
ADLC 5S 02 015 OPT
20
RSVDL2
#SIL_RESET
OPT
L3303
BLM18PG121SN1D
2
13
VA3302
ADLC 5S 02 015
D
GND
1
R3356
10K
12
G
R3376
0
SIDE
2N7002K
Q3304
OPT
S
R3384
1K
BODY_SHIELD
RSVDL1
VDD12_1
OPT
11
+12V
39
1.2V_MHL
1.2V_MHL
+3.3V_NORMAL
MMBT3904(NXP) E
(CD_SENCE)
Current Limit
5VBUS
IC3301
TPS2051BDBVR
OUT
5V_MHL
+3.5V_ST
C3312
UI : HDMI3
R3359
5V_HDMI_3_JACK
SIDE
C3315
0.1uF
16V
2
OC
3
4
EN
#MHL_OCP
R3338
10K
MHL_DET
R3361
47K
VA3310
ADLC 5S 02 015
SIDE
IN
R3332
10K
C
5V_HDMI_1_SOC
GND
5
100K
5V_MHL
A2
MMBD6100
D3301
A1
10uF
10V
1
5V_MHL
OPT
DDC_SCL_MHL
1
CK+
2
9
D0-
3
8
4
7
D0_GND
5
CK-_HDMI3_JACK
CK+_HDMI3_JACK
9
8
D0-_HDMI3_JACK
D0+_HDMI3_JACK
6
7
D0+
6
OPT
D1-
D1+
D2D2_GND
5
D3321
RCLAMP0524PA
D1_GND
4
1
10
2
9
3
8
4
7
5
6
D1-_HDMI3_JACK
D1+_HDMI3_JACK
3
2
D2-_HDMI3_JACK
1
CK_GND
D3319
RCLAMP0524PA
MHL_DET
R3381
22K
C
R3307
1.8K
DDC_SDA_MHL
E
OPT
1
10
CK+
2
9
D0-
3
8
4
7
5
6
D0_GND
DDC_SCL_MHL
CK-_HDMI1_SOC
CK+_HDMI1_SOC
D0-_HDMI1_SOC
D0+_HDMI1_SOC
+5V_NORMAL
D0+
D1OPT
D1_GND
D3318
RCLAMP0524PA
D1+
D2D2_GND
D2+
D2+_HDMI3_JACK
5V_HDMI_1_SOC +5V_NORMAL
HDMI_EXT_EDID
1
10
2
9
3
8
4
7
5
6
E
D1-_HDMI1_SOC
D1+_HDMI1_SOC
MMBT3904(NXP)
Q3313
D2-_HDMI1_SOC
EDID_WP
B
C
IC3300
D2+_HDMI1_SOC
M24C02-RMN6T
D2+
E0
JK3300
1
8
2
7
VCC
51U019S-312HFN-E-R-B-LG
JK3303
E1
51U019S-312HFN-E-R-B-LG
UI : HDMI2
UI : HDMI1
30V
R3380
1.8K
Q3311
MMBT3904(NXP)
B
BAT54_SUZHO
D3313
30V
DDC_SCL_1_SOC
BAT54_SUZHO
D3312
100
D
S
VA3309
ADLC 5S 02 015
VA3308
ADLC 5S 02 015
CEC_REMOTE
CK-
R3303
R3379
22K
VA3311
ADLC 5S 02 015
OPT
SOC_TX
A1
10
11
10
0
OPT
C
12
R3341
E2
VSS
HDMI_EXT_EDID
3
6
4
5
WC
SCL
SDA
R3319
22
HDMI_EXT_EDID
R3320
22
C3302
0.1uF
16V
MMBD6100
D3300
R3323 R3325
47K
47K
R3337 R3339
47K
47K
R3340
47K
HDMI_INTERNAL_EDID
3
2
13
OPT
1
NC
CE_REMOTE
G
R3378
47K
4
CK_GND
D3320
RCLAMP0524PA
15
14
DDC_SDA_1_SOC
HDMI_INTERNAL_EDID
R3377
47K
5
CK-
DDC_SDA_3_JACK
DDC_SCL_3_JACK
100
A2
MMBD6100
D3314
6
CEC_REMOTE
100
100
R3302
A2
7
CE_REMOTE
R3328
R3329
DDC_CLK
R3321
4.7K
HDMI_EXT_EDID
HDMI_EXT_EDID
8
HDMI_ARC
16
GND
DDC_DATA
Q3309
PMV48XP
HDMI_HPD_1_SOC
A1
9
17
R3305
1K
C
11
10
18
B
HDMI_EXT_EDID
EAG62611204
12
ARC
HDMI_HPD_3_JACK
5V
5V_MHL
Q3300
MMBT3904(NXP)
R3301
E
100K
HDMI_EXT_EDID
13
DDC_DATA
DDC_CLK
19
R3306
4.7K
HDMI_INTERNAL_EDID
OPT
14
B
R3304
1K
C
OPT
15
Q3303
MMBT3904(NXP)
R3327
E
100K
R3331
1K
EAG62611204
16
GND
20
HP_DET
C
OPT
17
5V
R3336
4.7K
VA3307
ADLC 5S 02 015
18
R3330
1K
VA3306
ADLC 5S 02 015
HP_DET
19
BAT54_SUZHO
D3304
OPT
20
30V
DDC_SCL_4_JACK
BODY_SHIELD
VA3305
ADLC 5S 02 015
GND
BODY_SHIELD
VA3304
ADLC 5S 02 015
OPT
OPT
DDC_SCL_1_SOC
DDC_SDA_1_SOC
DDC_SDA_MHL
DDC_SCL_1_SOC
DDC_SDA_1_SOC
HDMI_EXT_EDID
DDC_SCL_3_JACK
DDC_SDA_3_JACK
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
HDMI 4
2011.10.29
33
LGE Internal Use Only
SPDIF
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
JST1223-001
JK3602
2
3
4
VCC
VINPUT
C3602
0.1uF
16V
Fiber Optic
R3610
33
SPDIF_OUT
FIX_POLE
GND
R3611
2.7K
OPT
1
+3.3V_NORMAL
SPDIF OUT
JACK HIGH / MID
2011.11.21
36
LGE Internal Use Only
JK3700
PEJ034-01
E_SPRING
3
R_SPRING
4
T_SPRING
5
HP_ROUT
HP_LOUT
B_TERMINAL2
7B
T_TERMINAL2
6B
+3.3V_NORMAL
R3700
10K
R3701
1K
HP_DET
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
JACK_COMMON
2011.11.21
37
LGE Internal Use Only
AV/COMPONENT REAR
UART FOR DEBUG
R3822
0
COMP1_Y/AV1_CVBS
+3.3V_NORMAL
OPT
C3800
0.1uF
JK3802
PPJ245-02
UART_4PIN_STRAIGHT
12507WS-04L
1
2
3
SOC_TX
[GN]E-LUG
6E
[GN]C-SPRING
P3800
+3.5V_ST
SOC_RX
7E
4E
[GN]CONTACT
5D
[BL]C-SPRING
4C
[RD2]CONTACT
6C
[RD2]C-SPRING
8C
[RD2]E-LUG-S
5B
[WH]C-SPRING
4A
[RD1]CONTACT
6A
[RD1]C-SPRING
7A
[RD1]E-LUG
R3806
10K
R159
1K
D3803
5.6V
AV1_CVBS_DET
+3.3V_NORMAL
COMP1_Pb
OPT
C3801
0.1uF
R3810
10K
COMP1_Pr
R164
1K
4
COMP1_DET
COMP1/AV1/DVI_L_IN
5
D3800
5.6V
D3801
5.6V
COMP1/AV1/DVI_R_IN
+12V
D3802
5.6V
OPT
C3802
0.1uF
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
OPT
C3803
0.1uF
JACK_COMMON
2011.11.21
38
LGE Internal Use Only
+3.5V_ST_WAKE
+3.5V_ST
L4111
BLM18PG121SN1D
MAX 0.4A
WIFI
+3.3V_NORMAL
R4117
10K
5%
120-ohm
R4118
10K
5%
L4112
BLM18PG121SN1D
C4113
R4113
100
12507WR-10L
12507WR-08L
R4114
100
KEY2
C4100
0.1uF
C4102
0.1uF
D4101
5.6V
AMOTECH CO., LTD.
OPT
GND
D4100
5.6V
AMOTECH CO., LTD.
OPT
+3.5V_ST
KEY1
KEY2
L4100
BLM18PG121SN1D
+3.5V_ST
C4112
10uF
10V
WIFI
P4102
P4101
KEY1
10uF
10V
WIFI
C4111
0.1uF
16V
WIFI
OPT
C4110
0.1uF
16V
OPT
For EMI
1
2
M_REMOTE&WIFI_WAFER
P4100
+3.3V_NORMAL
SMAW200-H12S2
L4113
3
120-ohm
1
M_REMOTE
4
C4121
C4104
1000pF
50V
R4125
LED_R
GND
10K
5
2
6
3
0.1uF
M_REMOTE
LED_R
Place Near Micom
LOGO/LED_R
+3.5V_ST
IR
WIFI_DM
R4135
100
7
4
10K
R4133
OPT
R4131
GND
22
LOGO_LIGHT
LOGO_LIGHT
B
EYE_SCL
C
EYE_Q_10P D4105
ADMC 5M 02 200L
R4138 OPT
100
LOGO_LIGHT
LOGO_LIGHT
R4132
10K
LOGO_LIGHT
C4120
0.1uF
16V
NON_EYE_Q_8P
9
9
R4137
100
Q4100
1K
R4134
E
LOGO_LIGHT MMBT3904(NXP)
EYE_SDA
EYE_Q_10P
M_REMOTE
C4125
1000pF
50V
8
5
AR4100
100
1/16W
RTS
M_REMOTE
WIFI_DP
6
M_REMOTE_RX
10
EYE_Q_10P
11
M_REMOTE_TX
7
D4106
ADMC 5M 02 200L
OPT
M_RFModule_RESET
8
+3.5V_ST
CTS
9
R4107
10K
M_REMOTE
C4122
47pF
50V
10
IR
C4107
100pF
50V
D4104
5.6V
M_REMOTE
C4123
47pF
50V
OPT
C4124
47pF
50V
OPT
C4126
47pF
50V
M_REMOTE
OPT
AMOTECH CO., LTD.
11
12
13
OPT
WOL/ETH_POWER_ON
22
R4130
WIFI
WOL/WIFI_POWER_ON
22
R4136
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
IR / KEY
2011.11.21
41
LGE Internal Use Only
+5V_USB_2
USB2
MAX 1.5A
10uF
10V
4
C4322
5
USB_DP2
OPT
RCLAMP0502BA
D4302
USB_DM2
3
2
USB DOWN STREAM
1
3AU04S-305-ZC-(LG)
JK4302
OCP USB2/3
USB3
+5V_USB_3
FLT2
C4337
10uF
10V
/USB_OCD3
C4301
10uF
10V
USB3
1
5
2
4
USB3
3AU04S-305-ZC-(LG)
JK4300
+5V_USB_3
OUT2
USB_DM3
USB_DP3
C4310
10uF
10V
USB3
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
USB2_USB3
3
6
USB3
MAX 1.5A
USB DOWN STREAM
3
OUT1
4
10K
10K
/USB_OCD2
+5V_USB_2
7
5
EN2
USB_CTL3
FLT1
OPT
RCLAMP0502BA
D4300
EN1
USB_CTL2
2
9
IN
8
1
THERMAL
GND
C4302
0.1uF
16V
R4301
IC4306
TPS2066CDGNR [EP]GND
+5V_NORMAL
R4302
+3.3V_NORMAL
2012.7.11
43
LGE Internal Use Only
+3.3V_NORMAL
USB1
OCP USB1
R4500
10K
OPT
+5V_USB_1
R4501
10K
IC4500
BD82020FVJ
DVR Ready
MAX 1.5A
3AU04S-305-ZC-(LG)
JK4500
+5V_USB_1
+5V_NORMAL
EN
/USB_OCD1
3
6
4
5
OUT_1
1
USB_DM1
C4501
10uF
10V
OC
2
OUT_2
USB_DP1
3
7
USB DOWN STREAM
IN_2
2
OUT_3
C4502
10uF
10V
4
C4500
0.1uF
16V
8
5
IN_1
1
OPT
RCLAMP0502BA
D4500
GND
USB_CTL1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
+3.3V_NORMAL
EU
R4601
10K
CLOSE TO JUNCTION
R4602
1K
SC_DET
EU
C4604
0.1uF
VA4601
5.6V
OPT
Full Scart(18 Pin Gender)
SC_CVBS_IN
VA4609
5.5V
EU
EU
EU
1/16W
AV_DET
22
COM_GND
21
SYNC_IN
0
R8904
VA4610
5.5V
EU
DTV/MNT_V_OUT
20
SYNC_OUT
19
SYNC_GND2
18
SYNC_GND1
17
RGB_IO
SC_FB
16
VA4602
5.6V
R_OUT
15
RGB_GND
EU
14
R_GND
SC_R
13
D2B_OUT
12
VA4603
5.5V
OPT
G_OUT
11
D2B_IN
10
G_GND
9
SC_G
ID
8
VA4604
5.5V
B_OUT
7
AUDIO_L_IN
OPT
6
B_GND
5
SC_B
AUDIO_GND
4
AUDIO_L_OUT
VA4605
5.5V
OPT
3
AUDIO_R_IN
2
AUDIO_R_OUT
1
SC_ID
VA4600
20V
EU
PSC008-01
JK4600
SC_L_IN
VA4611
5.6V
OPT
SC_R_IN
VA4606
5.6V
OPT
BLM18PG121SN1D
L4600
VA4607
5.6V
OPT
EU
EU
C4600
1000pF
50V
DTV/MNT_L_OUT
EU
C4602
4700pF
BLM18PG121SN1D
L4601
VA4608
5.6V
OPT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EU
EU
C4601
1000pF
50V
EU
C4603
4700pF
DTV/MNT_R_OUT
SCART GENDER
2011.10.26
46
LGE Internal Use Only
Ethernet Block
C5000
0.1uF
16V
C5001
0.01uF
50V
NON_LN56
JK5000
RJ45VT-01SN002
1
2
3
4
5
6
7
8
1
EPHY_TDP
2
3
EPHY_TDN
4
EPHY_RDP
5
6
EPHY_RDN
7
8
D5000
D5001
5.5V
LAN_ESD
5.5V
LAN_ESD
D5002
5.5V
LAN_ESD
D5003
5.5V
LAN_ESD
9
9
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LAN_VERTICAL
2012.03.08
50
LGE Internal Use Only
L5404-*1
10.0uH
Audio_Coil_TAIYO
NRS6045T100MMGK
L5405-*1
10.0uH
Audio_Coil_TAIYO
NRS6045T100MMGK
1ST : 0TRIY80001A
L5402-*1
10.0uH
C5415
1000pF
50V
2ND : 0TR387500AA
C5416
L5401
BLM18PG121SN1D
AUD_MASTER_CLK
C
R5400
10K
AMP_MUTE_MICOM
B
100
AMP_MUTE_MICOM
Q5400
MMBT3904(NXP)
E AMP_MUTE_MICOM
PVDD1B
31
OUT1A
PVDD1A
32
33
BST1A
PGND1A
34
35
AD
CLK_I
GND_IO
RESET
36
R5416
5.1K
3
28
BST1B
GND
4
27
VDR1
DGND
5
26
VCC5
25
AGND
SPK_L-
24
VDR2
SPK_R+
23
BST2A
C5404
1000pF
50V
SPK_L-
DVDD
6
SDATA
7
WCK
8
BCK
9
22
PGND2A
SDA
10
21
OUT2A
NTP7513
18
19
20
PVDD2A
17
PGND2B
OUT2B
16
BST2B
PVDD2B
15
0x54
MONITOR_2
C5408
33pF
50V
IC5400
14
C5412
1uF
10V
MONITOR_1
R5405
SPEAKER_L
C5437
0.1uF
50V
LPH6045T-100M
R5412
12
DGND_PLL
13
AMP_MUTE_MICOM
R5401
10K
C5406
33pF
50V
Audio_Coil_ABCO
5.1K
C5434
0.47uF
50V
PGND1B
THERMAL
41
MONITOR_0
R5419 100
+3.3V_NORMAL
AMP_MUTE_PWR_DET
POWER_DET
L5405
10uH
R5415
OUT1B
12
100
LPH6045T-100M
C5430
390pF
50V
R5408
12
C5436
0.1uF
50V
Audio_Coil_ABCO
29
FAULT
R5403
37
40
I2C_SCL1
C5429
390pF
50V
L5404
10uH
30
AUD_SCK
100
R5414
12
2
AUD_LRCK
R5402
SPK_L+
R5407
12
1
AUD_LRCH
I2C_SDA1
C5422
10uF
35V
OPT
C5424
0.01uF
50V
VDD_PLL
11
C5440
0.1uF
16V
C5420
0.1uF
50V
Audio_Coil_TAIYO
NRS6045T100MMGK
AGND_PLL
SCL
OPT
38
C5411
0.1uF
16V
C5401
0.1uF
50V
VDD_IO
16V
C5400
0.1uF
50V
AMP_MUTE
OPT
R5406
3.3
C5418
0.1uF
50V
39
0.1uF
L5400
CIS21J121
C5414
10uF
10V
[EP]GND
C5413
L5403-*1
10.0uH
+24V_AMP
+24V_AMP
+24V
Audio_Coil_TAIYO
NRS6045T100MMGK
50V
Q1801
AMP_RESET_N
22000pF
+3.3V_NORMAL
DUAL COMPONENT
C5425
22000pF
50V
WAFER-ANGLE
SPK_L+
C5427
1uF
10V
C5428
1uF
10V
C5433
1uF
10V
22000pF
3
2
SPK_R-
1
C5426
22000pF
50V
P5400
SPK_R+
+24V_AMP
R5409
12
R5413
12
C5419
C5421
C5423
0.1uF
50V
0.1uF
50V
10uF
35V
L5403
10uH
C5432
390pF
50V
R5410
12
L5402
10uH
Audio_Coil_ABCO
LPH6045T-100M
C5431
390pF
50V
C5417
4
C5435
0.47uF
50V
R5417
0.1uF
50V
5.1K
C5439
R5418
0.1uF
50V
5.1K
SPEAKER_R
Audio_Coil_ABCO
LPH6045T-100M
R5411
12
C5438
50V
SPK_R-
[AMP_MUTE_PWR_DET]
-->For fixing AC-OFF POP noise 32"POLA/ROW model
-->32"POLA/ROW LPB’s 3.5st drop time is very fast
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
AMP_NEO
2011.11.21
54
LGE Internal Use Only
+12V
EU
AUD_OUT >> EU/CHINA_HOTEL_OPT
IC6000
AZ4580MTR-E1
L6000
EU
EU
OUT1
R6000
C6000
1uF
25V
EU
OPT
C6002
6800pF
OPT
R6002
33K
EU
R6004
IN1-
470K
C6003
33pF
EU
IN1+
VEE
SCART_AMP_L_FB
1
8
2
7
4
C6004
EU
0.1uF
OUT2
R6011
2.2K
50V
SIGN600002
[SCART AUDIO MUTE]
EU
C6008
DTV/MNT_R_OUT
EU
3
VCC
6
IN2-
R6008
EU
33K
OPT
R6010
470K
5
OPT
1uF
C6007
25V
DTV/MNT_L_OUT
6800pF
EU
IN2+
C
C6005 EU
33pF
Q6000
MMBT3904(NXP)
SCART_AMP_R_FB
B
EU_SCART_MUTE_ISAHAYA
Q6002
RT1P141C-T112
EU
SCART_Lout
SCART_MUTE
B
C
E
R6013
1K
E
2.2K
DTV/MNT_L_OUT
SCART_Rout
DTV/MNT_R_OUT
Q6001
MMBT3904(NXP)
E
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
E
R6014
1K
B
B
PDTA114ET
Q6002-*1
C
EU
C
EU
EU_SCART_MUTE_NXP
SCART AUDIO AMP
2011.11.21
60
LGE Internal Use Only
HP_OUT_H13
HP_OUT_H13
C6109-*1
18pF
C6104-*1
18pF
EARPHONE AMP
IC6100
TPA6138A2
HP_OUT
C6100
R6100
1uF
10V
HP_OUT 10K
+INR
HP_OUT_MTK
C6104
180pF
HP_OUT
R6106
43K
HP_OUT
-INR
HP_ROUT_MAIN
1%
R6103
33K
HP_OUT_MTK
HP_OUT_H13
R6103-*1
43K
C6108
10pF
50V
OUTR
1
14
2
13
3
12
+INL
HP_OUT_MTK
HP_OUT
R6104
-INL HP_OUT
43K
C6109
180pF
HP_OUT
R6101
10K
C6101
1uF
10V
HP_OUT
HP_LOUT_MAIN
OUTL
C6106
10pF
50V
1%
R6102
33K
HP_OUT_MTK
HP_LOUT_AMP
HP_ROUT_AMP
GND_1
+3.3V_NORMAL
4
11
UVP
+3.3V_NORMAL
HP_OUT_H13
R6102-*1
43K
1%
MUTE
SIDE_HP_MUTE
HP_OUT
4.7K
R6105
VSS
5
10
6
9
GND_2
VDD
HP_OUT
C6102
1uF
10V
HP_OUT
1%
HP_OUT
CN
7
8
CP
L6100
120-ohm
BLM18PG121SN1D
C6105
1uF
10V
HP_OUT
C6107
0.1uF
16V
C6103
1uF
10V
HP_OUT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
HEADPHONE AMP
2011.09.29
61
LGE Internal Use Only
CI POWER ENABLE CONTROL
IC6200
AP2151WG-7
+5V_NORMAL
IN
5
+5V_CI_ON
1
OUT
CI
2
CI
R6217
100
PCM_5V_CTL
EN
4
3
GND
FLG
C6210
1uF
25V
CI
R6219
10K
CI
R6218
10K
CI
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CI SLOT
2011.10.31
62
LGE Internal Use Only
B-CAS (SMART CARD) INTERFACE
+3.3V_NORMAL
INT
CMDVCC :
STATUS
--------------------------------HIGH
HIGH
CARD PRESENT
LOW
HIGH
CARD not PRESENT
+3.3V_NORMAL
IC6300
TDA8024TT
OPT
OPT
R6304
2.7K
JAPAN
R6306
5V/3V
R6300 22
R6302
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
PGND
+5V_NORMAL
S2
JAPAN
28
2
27
3
26
4
25
5
24
6
23
AUX2UC
AUX1UC
JAPAN
R6316
1.2K
JAPAN
1
OPT
R6319
1.2K
CLKDIV2
JAPAN
R6315
1.2K
CLKDIV1
OPT
R6318
1.2K
CLKDIV1 CLKDIV2 : F_CRD_CLK
----------------------------1
0
CLKIN
JAPAN
R6317
1.2K
2.7K
JAPAN
OPT
R6305
R6301
2.7K
JAPAN
R6303
SIGN630028
I/OUC
JAPAN
R6307
22
SMARTCARD_DATA/SD_EMMC_CLK
XTAL2
JAPAN
R6308
22
SMARTCARD_CLK/SD_EMMC_DATA[0]
XTAL1
JAPAN
R6309
22
SMARTCARD_DET/SD_EMMC_DATA[3]
OFF
JAPAN
R6310
22
SMARTCARD_RST/SD_EMMC_DATA[2]
L6300
VDDP
JAPAN
C6300
0.1uF
16V
JAPAN
C6301
10uF
10V
JAPAN
C6303
0.1uF
16V
S1
22
7
JAPAN
R6311
22
GND
VUP
JAPAN
C6302
0.1uF
16V
PRES
PRES
I/O
AUX2
AUX1
CGND
8
21
9
20
10
19
11
18
12
17
13
16
14
15
SMARTCARD_VCC/SD_EMMC_CMD
L6301 JAPAN
BLM18PG121SN1D
JAPAN
VDD
RSTIN
JAPAN
C6305
0.1uF
16V
JAPAN
C6306
0.1uF
16V
CMDVCC
+3.3V_NORMAL
BLM18PG121SN1D
B-CAS SLOT
P6300
10057542-1311FLF(B CAS Slot)
PORADJ
VCC
VCC
JAPAN
C6307
0.33uF
16V
RST
RST
Place CLK C3 far from C2,C7,C4 and C8
CLK
CLK
JAPAN
C6304
0.1uF
16V
RESERVED_1
GND
VPP
JAPAN
R6313
75
I/O
C1
C2
C3
C4
C5
JAPAN
C6
C7
75 ohm in I/O is for short circuit Protection
RESERVED
JAPAN
+3.3V_NORMAL
R6314
1K
JAPAN
ZD6300
5V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SW2
JAPAN
10K
R6312
JAPAN
SW1
C8
S1
S2
ZD6301
5V
CI SLOT
2011.04.17
62
LGE Internal Use Only
/TU_RESET2
RF_SWITCH_CTL_50
FE_DEMOD1_TS_ERROR
+3.3V_TU
TU_Q/W_KR/BR/TW/CO/JP
L6508
BLM18PG121SN1D
TU_S/N/Q/W
close to TUNER
/TU_RESET1
C6520
0.1uF
16V
TU_N/M_CN/TW/BR
R6508-*1
TU_N_TW/BR
/TU_RESET1_TU
3
I2C_SCL6_TU
TU_N/Q/W_KR/TW/BR/CO
4
I2C_SDA6_TU
5
+3.3V_TU
6
TUNER_SIF_TU
7
TU_+1.8V_TU
8
TU_CVBS_TU
10
C6508
47pF
50V
mA(MAX)
R6501 1K
TU_M/W_BR/TW/CO/CN
33
IF_N
12
+3.3V_TU
13
Power_D_Demod_TU
CN_RESET_TU
16
FE_DEMOD1_TS_ERROR
17
FE_DEMOD1_TS_SYNC
OPT
R6516
470
I2C_SDA6
0.1uF
OPT
R6515
4.7K
C6529
22uF
10V
85C
C6526
0.1uF
16V
TU_CVBS
B
16V
L6500
BLM18PG121SN1D
E
OPT
Q6500
C
MMBT3906(NXP)
B
+1.8V_TU
C6550
0.1uF
16V
L6503
BLM18PG121SN1D
TU_A_GLOBAL_6/7
R6521
200
TU_A_GLOBAL_6/7
R6520
200
TUNER_SIF
E
OPT
C6522
+3.3V_TU
1608 perallel
because of derating
C
C6530
0.1uF
16V
T2 : Max 1.7A
else : Max 0.7A
TU_A_GLOBAL_6/7
Q6501
MMBT3906(NXP)
close to Tuner
close to Tuner
R6506
100
TU_S/N/Q_T/US/KR/TW
IF_AGC
IF_P
should be guarded by ground
IF_N
+3.3V_TU
TU_N_BR
R6502-*1
/S2_RESET
1K
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
TU_N/M_CN/BR
L6502
BLM18PG121SN1D
R6506-*1
TU_W_BR/TW
TU_N/M
R6502
10
+3.3V_TU
OPT
R6518
82
close to TUNER
+3.3V_TU
OPT
C6514
100pF
50V
IF_AGC_TU
IF_P
+3.3V_NORMAL
0
+3.3V_TU
R6510
C6554
100pF
50V
C6503
0.1uF
16V
R6534
I2C_SCL6
33
C6506
47pF
50V
TU_S/N/Q_T/US/KR/TW
TU_A_GLOBAL_6/7
TU_S/N/Q/W
R6509
OPT
11
14
5%
100 TU_M/W_BR/TW/CO/CN
TU_N/Q/W_KR/TW/BR/CO
9
RF_SWITCH_CTL_50
C6502
0.1uF
R6508
100
TU_Q/W_KR/BR/TW/CO/JP
L6507
IC6501
AP2132MP-2.5TRG1
1
TU_Q/N/M/W
R6527
R2
20K
1%
TU_Q/N/M/W
R6528
11K
1%
R6529 R1
10K
1%
8
PG
2
TU_Q/N/M/W
R6523
10K
+1.8V_TU
EN
GND
7
ADJ
3
6
TU_Q/N/M/W
VOUT
VIN
TU_Q/N/M/W
C6533
+5V_NORMAL
10uF
10V
FE_DEMOD1_TS_ERROR
+1.23V_D_Demod
[EP]
TU_Q/N/M/W
C6540
0.1uF
+1.23V_D_Demod
C6516
BLM18PG121SN1D
0.1uF
16V
TU_N/M/Q/W_KR/CN/BR/JP
5%
TU_Q/N/M/W
+3.3V_TU
9
RF_SWITCH_CTL_TU
1K
RF_SWITCH_CTL
R6505
10K
THERMAL
1
2
R6500 1K
TU_N/M_TW/BR
TU_N/M_TW/BR
C6501
0.1uF
2A
4
5
NC
VCTRL
TU_Q/N/M/W
C6549
EAN61387601
10uF
FE_DEMOD1_TS_SYNC
10V
Global F/E Option Name
1. TU
2. Tuner Name = TDS’S’,TDS’Q’...
3. Country Name = T,T2,S2,KR,US,BR ...
18
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_VAL
19
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_CLK
TU_Q/N/M/W
C6535
1uF
Vout=0.6*(1+R1/R2)
20 FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[0-7]
21 FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[0]
Example of Option name
TU_Q_T2 = apply TDSQ type tuner and T2 country
TU_M/W = apply TDSM&TDSW Type Tuner
22 FE_DEMOD1_TS_DATA[2]
13’ Tuner Type
TDS’S’-G501D :
TDS’Q’-G501D :
TDS’Q’-G601D :
TDS’Q’-G651D :
TDS’M’-C601D :
TDS’W’-J551F :
24 FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[1]
CHB : Max mA
else : Max mA
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
23 FE_DEMOD1_TS_DATA[3]
+3.3V_TU
FE_DEMOD1_TS_DATA[4]
for Global
T/C Half NIM Horizontal Type
T/C/S2 Combo Horizontal type
T2/C/S2 Combo Horizontal Type
T2/C/S2 Combo Vertical Type
China NIM with Isolater Type
Japan Dual NIM
+1.8V_TU
FE_DEMOD1_TS_DATA[5]
IC6503
FE_DEMOD1_TS_DATA[6]
25 FE_DEMOD1_TS_DATA[5]
AZ1117BH-1.8TRE1
FE_DEMOD1_TS_DATA[7]
IN
26 FE_DEMOD1_TS_DATA[6]
3
2
OUT
1
ADJ/GND
27 FE_DEMOD1_TS_DATA[7]
TU_Q/W
+1.23V_D_Demod
L6501
BLM18PG121SN1D
30
31
+1.23V_D_Demod_TU
C6515
0.1uF
TU_Q/W
/S2_RESET_TU
32
+3.3V_TU
33
LNB_TX
34
I2C_SCL4_TU
35
I2C_SDA4_TU
R6531
1
C6546
10uF
10V
C6548
10uF
10V
TU_W
R6513-*1
1K
5%
TU_Q
R6513
10
/S2_RESET
+3.3V_TU
+3.3V_TU
LNB_TX
TU_Q/W_KR/BR/CO/TW R6503
36
22
C6521
0.1uF
OPT
I2C_SCL4
TU_Q/W
LNB_OUT
C6531
0.1uF
C6504
18pF
50V
TU_Q/W_KR/BR/CO/TW
R6504
22
C6538
10uF
10V
C6542
0.1uF
I2C_SDA4
TU_Q/W
LNB_OUT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C6500
18pF
50V
Close to the tuner
TUNER
2012.07.10
65
LGE Internal Use Only
TU6600
TDSS-G501D(B)
TU6601
TDSQ-G501D(B)
LNB_TX
FE_DEMOD3_TS_ERROR
LNB_OUT
FE_DEMOD2_TS_ERROR
TU6602
TDSW-J501F(B)
TU_Q_T2/S2
TU6601-*1
TDSQ-G601D(B)
TU_S_T
NC_1
TU_W_JP
TU_Q_T/S2
NC_1
1
1
2
1
1
+5V_OR_+3.3V_SPLITTER
3
RF_SWITCH_CTL_TU
1
4
5
RESET
RESET
2
2
2
RESET_T1
6
/TU_RESET1_TU
2
7
8
SCL
SCL
3
3
3
SCL_T
9
I2C_SCL6_TU
3
10
11
SDA
4
3.3V
TU6503
TDSM-C601D(B)
I2C_SCL6_TU
I2C_SDA6_TU
5
SDA
4
4
SDA_T
12
I2C_SDA6_TU
4
13
14
+B1[3.3V]
5
5
+3.3V_T1
15
+3.3V_TU
5
16
17
NC_2
+3.3V_TU
6
NC_2
6
6
NC_1
18
TUNER_SIF_TU
6
19
20
1.8V
TUNER_SIF_TU
7
TU_M_CN
+B2[1.8V]
7
7
+1.8V_T1
21
TU_+1.8V_TU
7
22
23
NC_3
TU_+1.8V_TU
8
NC_3
CVBS 8
8
8
NC_2
24
TU_CVBS_TU
8
25
26
IF_AGC
IF_AGC
NC_1 9
9
9
9
NC_3
27
IF_AGC_TU
9
28
29
DLIF_[P]
10
DIF[P]
NC_2 10
10
10
NC_4
30
IF_P
10
31
32
DLIF_[N]
1