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VHDL AXI3 and AXI4 Slave BFMs set_data_valid_delay() AXI4 Example -- Create a slave transaction. Creation returns tr_id to identify -- the transaction. create_write_transaction(tr_id, bfm_index, axi4_tr_if_0(bfm_index)); -- Set the read channel RVALID delay to 3 ACLK cycles for the first data -- phase (beat) of the tr_id transaction. set_data_valid_delay(3, 0, tr_id, bfm_index, axi4_tr_if_0(bfm_index)); -- Set the read channel RVALID delay to 2 ACLK cycles for the second data -- phase (beat) of the tr_id transaction. set_data_valid_delay(2, 1, tr_id, bfm_index, axi4_tr_if_0(bfm_index)); 408 Mentor VIP AE AXI3/AXI4 User Guide, V10.1d April 2013
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