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TVP5160EVM User’s Guide
SLEU063 – March 2005
TVP5160EVM User’s Guide
Digital Video Department
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Contents
Functional Description......................................................................................................................3
1.1 Description Overview ...................................................................................................................3
Board Level Description ...................................................................................................................4
2.1 Analog Inputs ...............................................................................................................................4
2.2 Anti-Aliasing Filters ......................................................................................................................5
2.3 Analog Output ..............................................................................................................................5
2.4 Tuner Interface.............................................................................................................................5
2.5 VBI Decoder Interface..................................................................................................................6
2.6 Testpoints and Jumpers ..............................................................................................................6
2.7 SDRAM ........................................................................................................................................7
2.8 Common Board Interface.............................................................................................................7
2.9 Video Encoder Analog Outputs ...................................................................................................7
System Level Description.................................................................................................................8
Required Hardware and Equipment ................................................................................................9
Hardware Setup................................................................................................................................10
Software Installation........................................................................................................................11
WinVCC4 Quick Start.......................................................................................................................12
WinVCC4 in Depth ...........................................................................................................................15
8.1 Starting WinVCC4......................................................................................................................15
8.2 WinVCC4 Configuration Dialog Box ..........................................................................................16
8.3 I2C System Test.........................................................................................................................17
8.4 Real Time Polling .......................................................................................................................17
8.5 Main Menu .................................................................................................................................19
8.5.1 System Initialization .......................................................................................................20
8.5.2 Register Editing..............................................................................................................24
8.5.3 Property Sheets .............................................................................................................29
Troubleshooting...............................................................................................................................32
9.1 Troubleshooting Guide...............................................................................................................32
9.2 Corrective Action Dialogs ..........................................................................................................34
9.2.1 Setting the PC Parallel Port Mode .................................................................................35
9.2.2 General I2C Error Report ...............................................................................................36
TVP5160EVM Schematics ...............................................................................................................37
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Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figures
TVP5160EVM Block Diagram.............................................................................................. 4
TVP5160EVM System Level Block Diagram ..................................................................... 8
WinVCC4 – I2C Configuration Screen.............................................................................. 12
WinVCC4 – Real Time Polling Screen............................................................................. 13
WinVCC4 – Main Screen.................................................................................................... 13
WinVCC4 – System Initialization ...................................................................................... 13
WinVCC4 Multiple Occurrences Error Message............................................................. 15
WinVCC4 I2C Address Configuration............................................................................... 16
I2C System Failure.............................................................................................................. 17
Real Time Polling Dialog Box........................................................................................... 18
WinVCC4 – Main Screen.................................................................................................... 19
System Initialization........................................................................................................... 20
Register Map Editor........................................................................................................... 24
Encoder Module Editor...................................................................................................... 26
Generic I2C Register Editor............................................................................................... 27
Indirect Register Editor ..................................................................................................... 28
Property Sheets.................................................................................................................. 30
I2C System Failure Dialog Box.......................................................................................... 34
Corrective Action Dialog Box ........................................................................................... 34
Corrective Action Required.............................................................................................. 35
Corrective Action Required.............................................................................................. 35
I2C Error............................................................................................................................... 36
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Tables
Analog Inputs and Pin Terminals....................................................................................... 5
Tuner Interface Pinout (H2)................................................................................................. 5
VBI Decoder Interface Pinout ............................................................................................. 6
Main Menu Summary......................................................................................................... 19
Register Map Editor Controls........................................................................................... 25
Indirect Register Controls................................................................................................. 28
Use of Property Sheet Controls ....................................................................................... 31
Property Sheet Button Controls....................................................................................... 31
TVP5160EVM Troubleshooting......................................................................................... 32
I2C Troubleshooting........................................................................................................... 33
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1
Functional Description
The TVP5160EVM refers to both the TVP5160 board and the ADV7311 board when they are
connected together. Both boards share a common interface via a 120-pin connector. This
interface provides all data, clocks, I2C communication, and 5-V power to each board.
The ADV7311 is a professional grade, 12-bit, 216-MHz, video encoder. This device minimizes
potential artifacts caused by the re-encode process. When evaluating the TVP5160 decoder, it
is highly recommended that the YPbPr component video outputs of the ADV7311 be used. This
will ensure the video decoder within the display monitor will not be used.
1.1
Description Overview
The TVP5160EVM is powered by a single, 5-V, universal supply. I2C communication is
emulated using a PC parallel port configured for ECP (extended capability port) or bidirectional
mode. The parallel port mode can be changed using the PC BIOS setup, available during the
reboot process.
The TVP5160 video decoder converts the analog video input signal into digital component data.
This digital data and the associated clocks from the video decoder are sent to the ADV7311
video encoder. The video encoder converts the digital data back into analog video. The analog
video outputs provided by the ADV7311 encoder include CVBS, S-Video (SV), and YPbPr.
These are all output simultaneously.
Control of the TVP5160EVM is provided by WinVCC4, a Windows-based application developed
by Texas Instruments and provided free of charge. This application uses the parallel port to
provide I2C communication to the TVP5160EVM. WinVCC4 provides a graphics user interface
(GUI) and a register level interface to program and vary the controls available within the
TVP5160 decoder and the ADV7311 encoder.
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2
Board Level Description
Figure 1 illustrates the various features available on the TVP5160EVM.
DB25 (I2C)
5V
Power
Analog Output
Power
Good
LED
Tuner Interface
VBI
Decoder
Interface
TVP5160
YPbPr
(SD/ED)
Power
Down
Testpoints
S-Video
120-pin Header Connector
Composite
120-pin Header Connector
Composite
Power
Good
LED
Reset
YPbPr
(SD/ED)
Testpoints
Reset
FSS
I2C
Select Address
Select
Figure 1.
2.1
ADV7311
I2C
Address
Select
SDRAM
SCART
S-Video
TVP5160EVM Block Diagram
Analog Inputs
The TVP5160EVM makes use of all the available inputs on the TVP5160 decoder. The
following inputs are available for use:
?
Composite (CVBS)
?
S-Video
?
YPbPr (SD/ED)
?
SCART (CVBS and component RGB)
?
Tuner interface (CVBS)
?
VBI decoder interface (analog/digital RGB)
NOTE: The S-Video (Y/C) input is shared with the SCART (CVBS and R) inputs and must not be
connected simultaneously.
Table 1 shows the pins used for the inputs described above.
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Table 1.
Analog Inputs and Pin Terminals
Input Type
2.2
TVP5160 Pin(s)
CVBS
VI_1
S-Video
VI_3(Y), VI_9(C)
YPbPr
VI_5(Y), VI_11(Pb), VI_8(Pr)
SCART
VI_3(CVBS), VI_9(R), VI_6(G), VI_12(B)
Tuner interface (CVBS)
VI_2
VBI decoder interface (analog RGB)
VI_7(R), VI_4(G), VI_10(B)
Anti-Aliasing Filters
Each analog input has an anti-alias filter installed by default to ensure the input to the TVP5160
decoder is of the best quality and does not alias. The filters are elliptical in design in order to
minimize the cost and still provide the best roll-off. Details on the anti-aliasing filters, including
frequency response and the group delay, are provided in a separate application note.
The filter on any analog input may be bypassed by removing the 0-? resistors currently installed
(JP1-6, 9, 10) and shorting one of them across 1-2. Since the S-Video input is shared with the
SCART (CVBS and R), these inputs share the same anti-aliasing filters.
2.3
Analog Output
The analog output from the TVP5160 decoder is made available on the TVP5160EVM. The
output is buffered using a simple emitter follower and the output signal is automatically
determined by the TVP5160 decoder. If a CVBS is selected as the input, then the analog output
is the same looped-through CVBS output. If S-Video or YPbPr is the selected input, then only Y
is output since it contains the sync information. Typically, the analog output is used for VCR
record functions in some CE applications.
2.4
Tuner Interface
The tuner interface provides a method of connecting an analog TV tuner to the TVP5160EVM.
The expected output from the tuner module to the TVP5160EVM is baseband composite video.
Termination for the 75-? input source is already provided on the TVP5160EVM tuner input. The
pinout of the tuner interface is provided in Table 2.
Table 2.
Tuner Interface Pinout (H2)
Description
CVBS output (from tuner)
Pin Number
10
SDA (I 2C data)
29
SCL (I2C address)
31
GND
1-9, 11-28, 30, 32-36
D5V
37-40
To supply the tuner module, D5V supply and GND pins are provided. The I2C pins, SDA and
SCL, are connected to the I2C communications bus on the TVP5160EVM. Control of the tuner
module is available within the TVP5160EVM software as discussed later.
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2.5
VBI Decoder Interface
This interface provides a method of connecting an external VBI decoder module to the
TVP5160EVM via the H3 and H4 headers. The VBI decoder may be a closed-caption decoder,
teletext decoder, or any other VBI decoder currently available on the market that provides the
same signals. The pinout of the VBI decoder interface is provided below.
Table 3.
VBI Decoder Interface Pinout
H3 Pin Number
H4 Pin Number
Tuner CVBS input (from tuner I/F)
Description
1
-
CVBS input (from TVP5160EVM)
3
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11, 9, 7 (R, G, B)
-
4
-
Analog RGB
HSYNC
VSYNC
6
-
10
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Digital RGB
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7, 9, 11 (DR, DG, DB)
SDA (I 2C data)
-
8
-
10
FSS (for analog overlay)
2
SCL (I C address)
FSO (for digital overlay)
-
12
GND
2, 5, 8, 12
5, 6
D5V
-
1-4
With this interface, there are two methods of overlaying the RGB character data output from the
VBI decoder onto the input signal to the TVP5160 decoder:
?
Analog RGB overlay
?
Digital RGB overlay
Separate sets of the RGB inputs are provided depending on which overlay method is preferred.
The analog RGB inputs are connected to the TVP5160 analog inputs as discussed in Section
2.1. The digital RGB inputs and FSO are connected to the digital R, G, and B inputs and FSO
which are shared with the C bus, C6-9, respectively.
2.6
Test Points and Jumpers
Various test points are available on the TVP5160EVM for the user. This includes the various
power supplies as well as a few GND test points. The primary test-point header is H6 and
provides access to the video data, video clocks, I2C, 5 V, and GND.
There are three jumpers available on the TVP5160 board that configure the power down mode,
I2C address select, and the FSS select. Each jumper is set by default in its preferred state for
the TVP5160EVM. Next to each jumper on the TVP5160 board is the silkscreen that describes
the two states of the jumper configuration.
If the I2C address is changed on either the TVP5160 board or the ADV7311 board while the
TVP5160EVM is powered up, then that device will not recognize the new I2C address. The reset
button on the TVP5160EVM must be pressed and WinVCC4 must be reconfigured for the new
I2C address.
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2.7
SDRAM
On the TVP5160EVM, there are three SDRAM footprints: 50-pin, 54-pin, and 86-pin. These are
provided to accommodate the user’s choice of SDRAM that will be used in their final product.
By default, the TVP5160EVM is provided with 64-Mbit SDRAM (54TSOPII).
If the SDRAM is changed, then the SDRAM configuration register (0x59) will also need to be
updated with the correct memory size. This must be programmed before 3DYC or 3DNR is
enabled.
2.8
Common Board Interface
The TVP5160EVM uses a 120-pin connector to connect the TVP5160 board to the ADV7311
board. This interface shares all common signals including the I2C and the 5-V supply. The
purpose is to modularize the TVP5160 board and allow users to interface it to a variety of other
Texas Instruments products including triple video DACs, DVI transmitters, or to any other
platform that shares the same interface.
This connector shares all digital video data (Y[9:0], C[9:0]), all video clocks (SCLK, VS, HS,
GLCO, AVID, and FID), reset, I2C, and 5-V as mentioned above.
2.9
Video Encoder Analog Outputs
The analog outputs of the ADV7311 board include CVBS, S-Video, and YPbPr. All of the
outputs are available simultaneously. For evaluation purposes, it is recommended that the
YPbPr component video outputs be used in order to bypass the video decoder internal to the
display monitor.
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3
System Level Description
The system block diagram illustrated in Figure 2 provides an example of how the TVP5160EVM
may be used for evaluation. Typically, the analog input is a CVBS signal provided by a video
source such as a pattern generator or a DVD player running a test DVD.
The TVP5160EVM itself is configured with the provided 5-V supply and the parallel port cable.
The analog output is typically YPbPr to reduce the number of artifacts caused by backend
processing or re-encoding. These outputs are then fed into a high-end or studio-quality display
monitor such as a Sony Trinitron.
At the same time, the CVBS output from the encoder may also be fed into a video test
measurement system such as the Tektronix VM700. This allows various tests to be run and
also allows the user to analyze the video waveform or vectorscope.
5V
Supply
PC
Tektronix
TG2000
Video
Source
CVBS
Figure 2.
8
TVP5160EVM
Y
Pb
Pr
NTSC/PAL CVBS
Monitor
Tektronix
VM700
Video
Measurement
TVP5160EVM System Level Block Diagram
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Required Hardware and Equipment
The following lists the required hardware and equipment necessary to use the TVP5160EVM:
-
TVP5160EVM (provided)
-
Universal 5-V power supply (provided)
-
Parallel cable (provided)
-
Windows-based PC
-
1 composite RCA video cable
-
1 YPbPr component RCA video cable
-
Video source (pattern generator, DVD player, etc)
-
TV or display monitor that supports YPbPr component video inputs
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5
Hardware Setup
The following describes how to set up the hardware for the TVP5160EVM.
1. Connect the TVP5160EVM boards together using the 120-pin board connector on
each board.
2. Connect a CVBS input to the TVP5160 board and a component cable to the YPbPr
outputs of the ADV7311 board.
NOTE: For evaluation it is recommended that the YPbPr component video outputs be
used in order to bypass the internal video decoder of the TV or video display.
3. Connect the parallel port cable from the TVP5160EVM to the PC.
NOTE: There are footprints for a dc jack and a DB25 connector on the ADV7311 board,
but the default power and I2C is provided by the TVP5160 board via the 120-pin
connector, P2.
4. Connect the 5-V power supply to the dc jack on the TVP5160 board. A green LED on
each board should now be lit.
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6
Software Installation
WinVCC4 is a Windows application that uses the PC parallel port to emulate I2C, providing
access to each device on the I2C bus. WinVCC4 makes use of CMD files, a text editable file
that allows preset video setups to be programmed easily.
This feature allows the user to easily set multiple I2C registers with the press of a button.
WinVCC4 also has “Property Sheets” for the TVP5160 which allows the user to control the I2C
registers with a GUI.
All necessary software for the TVP5160EVM is provided on the enclosed CD. The following
provides the steps required to install WinVCC4:
1. Insert the provided TVP5160EVM CD.
2. Install Port95NT.exe. This is the parallel port driver used by WinVCC4. This driver
must be installed and the PC must be rebooted before WinVCC4 will operate correctly.
3. Install Setup.exe. Click Next at all prompts and click Finish to complete the installation
process. This will install WinVCC4 onto the PC. No reboot is required.
4. Run WinVCC4.exe
NOTE: A shortcut to WinVCC4 should now be available on the desktop. WinVCC4 and
additional TVP5160 related documentation can also be found at Start->Programs->
TVP5160EVM Software.
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7
WinVCC4 Quick Start
The following describes the steps to take within WinVCC4 in order to get video out of the
TVP5160EVM.
1. Once WinVCC4 is executed, the WinVCC4 Configuration screen appears. This dialog
box is used to configure the I2C bus. Next to VID_DEC, select the TVP5160 and ensure
the I2C address is set to 0xB8. This should match the I2C ADDR jumper on the
TVP5160 board.
NOTE: If WinVCC4 is running and the TVP5160 board I2C address is changed, power
must be cycled on the EVM.
Figure 3.
WinVCC4 – I2C Configuration Screen
2. Next to VID_ENC, select the ADV7311 and ensure the I2C address is set to 0x54. This
should match the I2C ADDR jumper on the ADV7311 board.
3. Ensure that all other boxes are selected as Not Used and that all “Program Options”
buttons are set to Enabled. Click OK.
4. If there are no I2C communication issues, then the Real-Time Polling window will display
next. If there are I2C issues, an I2C Test Report box will display. Completely exit out of
WinVCC4, double check the parallel port cable connections, cycle power on the
TVP5160EVM and re-run WinVCC4.
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5. At the Real-Time Polling window, ensure that VIDEO-STANDARD AUTO_SWITCH
POLLING is enabled and click OK.
Figure 4.
WinVCC4 – Real Time Polling Screen
6. Load the provided TVP5160EVM.CMD file into WinVCC4 by clicking on Tools ->
System Initialization -> Browse. The CMD should be available by default as seen
below.
Figure 5.
WinVCC4 – Main Screen
7. Click the “TVP5160 (SD) + ADV7311” dataset in the window and then click the Program
Dataset button to initialize the TVP5160EVM.
Figure 6.
WinVCC4 – System Initialization
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8. With a video source provided at the composite video input, video should be viewable on
the TV/display monitor. All ADV7311 outputs are enabled simultaneously.
NOTE: To ensure the TVP5160 is working properly, go to Video Status by clicking on
Edit -> Property Sheets -> TVP5160PNP -> Video Decoder Status and check the H/V/C
lock status and the video standard. This is only a check on the TVP5160 board and not
the ADV7311 board or the TV/display monitor.
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8
WinVCC4 in Depth
The following describes how to use WinVCC4 in depth. It discusses various features and
screens which the user m ay encounter while evaluating the TVP5160EVM.
8.1
Starting WinVCC4
The Port95NT parallel port driver must be installed before using WinVCC4. WinVCC4 may be
started by clicking on Start->All Programs->TVP5160EVM Software->WinVCC4.
If the dialog shown in the figure below is displayed, it means one of two things:
1. WinVCC4 did not run to completion the last time it ran. In this case, click OK to exit
the program and restart WinVCC4.
2. There is more than one instance of WinVCC4 running at the same time. In this case,
click OK to exit the program. Then, press CTRL-ALT-DELETE to bring up the Task
Manager. Select and click End Task on all occurrences of WinVCC4 or WinVCC4
CONFIGURATION. Then restart WinVCC4.
Figure 7.
WinVCC4 Multiple Occurrences Error Message
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8.2
WinVCC4 Configuration Dialog Box
The WinVCC4 Configuration dialog box, as seen in Figure 8, should now be visible. This dialog
configures the I2C bus on the TVP5160EVM. All settings from this dialog box are stored in the
Windows registry and are restored the next time the program is started. After initial installation,
VID_DECTM will be set to TVP5160 and VID_ENC will be set to ADV7311.
The I2C slave address for each device must match the I2C slave address selected by jumpers on
the TVP5160EVM. These jumpers are set by the factory to use 0xB8 for the video decoder and
0x54 for the video encoder.
It is also important to select the correct specific devices. The TVP5160 and ADV7311 must be
selected for the TVP5160EVM.
All Program Options must be enabled. Disabling these options is only required if you are
debugging a problem with the I2C bus itself.
Clicking OK begins I2C communication with the selected devices.
Figure 8.
16
WinVCC4 I2C Address Configuration
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8.3
I2C System Test
The I2C system test of selected registers runs immediately after closing the WinVCC4
Configuration dialog box with OK (unless the I2C system test program options button was
disabled).
If the I2C system test passes, then only a PASS message will appear. If the test failed, then a
dialog box like Figure 9 will appear. See Section 9, Troubleshooting, for details on how to
resolve this issue.
The I2C system test can be run at anytime by clicking Run System I2C Test in the Tools menu.
Figure 9.
8.4
I2C System Failure
Real-Time Polling
Real-time polling provides polling functions that execute in the background continuously, when
enabled via the Real-Time Polling dialog. There are two polling functions. The function that
applies to the TVP5160 decoder is VIDEO–STANDARD AUTO–SWITCH POLLING.
When the TVP5160 decoder detects a change in the input video standard, it automatically
switches to operation in the detected standard (which includes all necessary I2C register
initialization) for proper decoding of the input video. The ADV7311 encoder does not have this
feature. For this reason WinVCC4 must update the video encoder.
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If the WinVCC4 autoswitch polling function is enabled, then the detected video standard status
from the TVP5160 decoder is polled until a change in the input video standard (or in the
TVP5160 sampling mode) is detected. When a change is detected, the video encoder is
reprogrammed as needed for the detected standard. Using this feature, the video source can
change its video standard and the system will display using the new standard without user
intervention.
To enable autoswitch polling (recommended), the video-standard autoswitch polling function
must be enabled in the Real–Time Polling dialog box as shown in Figure 10. The Real–Time
Polling dialog can also be accessed once WinVCC4 is up and running by clicking Real–Time
Polling in the Tools menu.
Figure 10. Real-Time Polling Dialog Box
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8.5
Main Menu
After closing the Real–Time Polling dialog, the main menu is displayed as shown in Figure 11.
The menus, which are used to operate WinVCC4, are File, Edit, Tools, Window, and Help. The
File menu’s only function is Exit, which terminates the program. The following table summarizes
the main menu contents.
Figure 11. WinVCC4 – Main Screen
Table 4.
Main Menu Summary
Menu
Contents
File
Exit
Edit
Register Map
TVP5160PNP
7311 Encoder Module Editor
Generic I2C Editor
Property Sheets
TVP5160PNP
7311 Encoder Module Editor
Tools
System Initialization
Real-time Polling
TV Tuner Control (FQ12xx series only)
Multiple-Byte I 2C Transfers
Set I2C Bit Rate
Run System I2C Test
Run Continuous I2C Test
Read VBI FIFO
Capture Live VBI Data
Window
Allows selection of the active window. Multiple windows can be open at the same time.
Help
Displays program version
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8.5.1 System Initialization
Clicking System Initialization in the Tools menu displays the dialog shown below. This provides
the means for initializing the video decoder and/or video encoder for a particular video mode.
The details of the initialization are contained in the command file (with a CMD file extension).
The command file is loaded using the Browse… button. Once the command file is opened, a
text list displays descriptions of the individual data sets contained within the command file.
Click once on the desired data set description to select it. Click the Program Device(s) Using
Selected Dataset button to run the selected data set, which loads the devices via the I2C bus.
When the device initialization has completed, the status indicator reads Ready.
NOTE: If Ready does not display, then the devices are not initialized and the I2C bus is not
communicating. See Section 9, Troubleshooting, for possible solutions.
Click the Close button to close the dialog box. Each time the System Initialization dialog is
closed, the initialization file pathname and the data set selection number are saved in the
Windows™ registry to allow these settings to be retained for the next time WinVCC4 runs.
Figure 12. System Initialization
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8.5.1.1
Adding a Custom Data Set
After you program the EVM via the System Initialization tool using the factory-supplied command
file, and by using the Property Sheets tool, you can customize the device register settings to suit
your needs. To save your custom settings:
1. Reopen the System Initialization dialog via the Tools menu.
2. Click the Append Current Device Settings to Command File button. A dialog
requesting a description of the new data set appears.
3. Optionally, click the drop-down box and select one of the existing descriptions.
4. Modify the description text or type your own description.
5. Click OK. All nondefault register values from the decoder and encoder will be
appended to the current command file as an additional data set.
Now, you can select your custom data set and send it with a press of the Program… button.
NOTE: The command file (.CMD) must be saved as plain text.
8.5.1.2
Command Files
The command file is a text file that can be generated using any common editor; however, it must
be saved as plain text. Command files are especially useful for quickly switching between the
various system configurations. These .CMD files are unrelated to the typical WindowsTM .CMD
files.
A default command file has been provided on the CD. This command file should contain most of
the desired setups. This command file is located at:
c:\Program Files\Texas Instruments\WinVCC4\TVP5160\Initialization Files\Initialize.cmd
A command file can contain up to 250 data sets. A data set is a set of register settings to
initialize the video decoder and/or video encoder for a particular video mode. Each data set
includes a description that is displayed in one row of the dataset descriptions list. The register
settings may be located in the command file itself and/or may be stored in separate include
file(s) (with an .INC file extension) and be included into the command file using the INCLUDE
statement.
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8.5.1.3
Example Command File
An example of one data set within a command file is shown below. Each command file may
contain individual write to register (WR_REG) commands.
BEGIN_DATASET
// Dataset 1
DATASET_NAME,"TVP5160 (SD) & ADV7311 - CVBS in, 10-bit ITU-656, 3DYC, 3DNR Enabled,
CVBS, SV & YPbPr out"
WR_REG,VID_DEC,0x01,0xEE,0x01
WR_REG,VID_DEC,0x01,0xEA,0xB0
WR_REG,VID_DEC,0x01,0xE9,0x00
WR_REG,VID_DEC,0x01,0xE8,0x63
WR_REG,VID_DEC,0x01,0xE0,0x01
WR_REG,VID_DEC,0x01,0xEE,0x00
// TVP5160 I2C Registers - SD
WR_REG,VID_DEC,0x01,0x04,0x3F
WR_REG,VID_DEC,0x01,0x06,0x40
WR_REG,VID_DEC,0x01,0x34,0x11
WR_REG,VID_DEC,0x01,0x35,0x2A
WR_REG,VID_DEC,0x01,0x36,0xAF
WR_REG,VID_DEC,0x01,0x75,0x1A
WR_REG,VID_DEC,0x01,0x7F,0x01
WR_REG,VID_DEC,0x01,0x59,0x07
WR_REG,VID_DEC,0x01,0x0D,0x84
// Holds processor in reset
// Enables fast processor mode
// Releases processor reset
//
//
//
//
//
//
//
//
//
Auto Switch Mask
Pedestal off
Outputs Enabled
GPIO =0; GLCO, AVID and FID Enabled
HS and VS Enabled
F & V Bit Control
Analog Output Enabled
Enabled SDRAM and set SDRAM size
Chrominance Processing Ctrl 1 Reg – 3DYC, 3DNR Enabled
// ADV7311 I2C Registers - NTSC, all DACs Output
WR_REG,0x54,0x01,0x01,0x08
// CLK Align Enabled, SD Oversampled
WR_REG,0x54,0x01,0x40,0x10
// Selects NTSC, SSAF Luma Filter
WR_REG,0x54,0x01,0x42,0x41
// Enables DAC Outputs, PrPb SSAF
WR_REG,0x54,0x01,0x44,0x06
// RTC Enabled
WR_REG,0x54,0x01,0x48,0x14
// Enables Double Buffering, SD 10-bit, DNR disabled
WR_REG,0x54,0x01,0x7C,0x02
// Global 10-bit enable
END_DATASET
1. The comment indicator is the double-slash //.
2. The command file is not case-sensitive and ignores all white-space characters.
3. All numbers can be entered as hexadecimal (beginning with 0x) or as decimal.
4. Every data set in a command file begins with BEGIN_DATASET and ends with
END_DATASET. The maximum number of datasets is 250.
5. The dataset text description is entered between double quotes using the
DATASET_NAME command. The enclosed text can be up to 128 characters in length.
This text appears in the System Initialization dialog when the command file is opened.
6. The INCLUDE command inserts the contents of an include file (with an .INC file
extension) in-line in place of the INCLUDE command. Therefore, the include file should
not contain the BEGIN_DATASET, END_DATASET, and DATASET_NAME commands.
NOTE: All included files must be located in the same directory as the command (CMD)
file.
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TVP5160EVM User’s Guide
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7. The write to register command is written as follows:
WR_REG, <DeviceFamily>, <Number of data bytes (N)>, <subaddress>,
<Data1>,…, <DataN>
or
WR_REG, <Literal slave address>, <Number of data bytes (N)>, <subaddress>,
<Data1>,…, <DataN>
The valid device family mnemonics are:
VID_DEC for the video decoders
VID_ENC for the video encoders
THS8200 for the THS8200 device
WinVCC4 translates the device family mnemonic to the slave address that was selected
on the WinVCC4 Configuration dialog upon program startup. This eliminates having to
edit command files if the alternate slave address must be used.
If the literal slave address method is used, then the slave address entered will be used
directly. This method is normally used for programming the video encoder.
8. A delay may be inserted between commands using the WAIT command, which is written
as follows:
WAIT,<# milliseconds>
TVP5160EVM User’s Guide
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8.5.2 Register Editing
The next section describes the four available modes of register editing: Register Map Editor,
Encoder Module Editor, Generic I2C Register Editor, and Property Sheets. Each of these
functions can be selected from the Edit menu.
8.5.2.1
Register Map Editor
The register map editor, as shown in Figure 13, allows the display and editing of the entire used
register space of the device within a simple scrolling text box. To open this, click on Edit
Register Map in the Edit menu and click on the device type to edit. If the intended device type is
not shown, then use the Windows menu to activate the existing window.
Figure 13. Register Map Editor
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Table 5.
Control
Register Map Editor Controls
Definition
Register Window
Scrolling text box that displays the address and data for the I2C registers that are defined
for the device.
Address Edit Box
This contains the I2C subaddress that will be accessed using the Write and Read
buttons. Clicking on a row selects an address, which then appears in the address edit
box.
NOTE: After clicking on a row, the Data Edit box contains the data that was in the
register window. The device has not yet been read.
The address up/down arrows are used to jump to the next/previous subaddress that is
defined for the device. If an address is not defined for the device, then it can still be
accessed by typing the subaddress in the Address Edit box.
Data Edit Box
This contains the data which will be written to or was read from the I2C subaddress.
The data up/down arrows incr/decr the data value by 1.
Write Button
Writes the byte in the Data Edit box to the address in the Address Edit box.
The I2C register is written to whether or not the data is different from the last time the
register was read.
Reads the data from the address in the Address Edit box into the Data Edit box and the
register window.
Reads all defined readable registers from the device and updates the register window.
Read Button
Read All Button
Hex Button
Dec Button
Close Button
Loop Count
Edit Indirect Registers
Converts all values in the register window and address and data edit boxes to
hexadecimal.
Converts all values in the register window and address and data edit boxes to decimal.
Closes the dialog.
NOTE: Multiple edit register map windows can be open at the same time (one for each
device). Use the Window menu to navigate.
Causes subsequent write or read operations to be performed N times. N is entered as a
decimal number from 1 to 999.
Opens the indirect register editor of the TVP5160.
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8.5.2.2
Encoder Module Editor
The encoder module editor, as shown in Figure 14, allows the display and editing of the video
encoder registers. This editor works like the Register Map Editor.
To open this, click on Edit Register Map in the Edit menu and click on Encoder Module.
Figure 14. Encoder Module Editor
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8.5.2.3
Generic I2C Register Editor
The Generic I2C Editor, as shown in Figure 15, allows the display and editing of any device on
the I2C bus. This editor works like the Register Map Editor, except that the I2C slave address
must be entered and the Read All button is disabled.
To open this, click on Edit Register Map in the Edit menu and then click on Generic I2C.
The video encoder module registers can be edited using I2C subaddress 0x54 (default) or 0x56,
if the alternate slave address is being used.
Figure 15. Generic I2C Register Editor
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8.5.2.4
Indirect Register Editor
The indirect register editor, as shown in Figure 16, allows the display and editing of the indirect
registers (or hardware registers) of the device.
To open this, first open the register map editor in the Edit menu for the TVP5160. Then, click
the Edit Indirect Registers button. The operation of the controls of the indirect register editor is
explained in Table 6.
Figure 16. Indirect Register Editor
Table 6.
Control
Definition
Base Address Selector
The indirect registers use a 24-bit address internally. The base address selector
allows quick entry of the base address. The list contains base addresses for the
major functional blocks of the TVP5160 decoder.
Base Address Edit Box
This allows the 24-bit base address to be typed in directly.
Address Offset Edit Box
This contains the lowest byte of the 24-bit internal address. The full 24-bit address
is formed by adding the base address to the address offset.
The address up/down arrows increment/decrement the address offset by 4.
Data Edit Boxes
This contains the 32-bit data word that will be written to or read from the indirect
address. The LSB data is at the lowest address. The data is written/read LSB first.
The data up/down arrows increment/decrement the data value by 1.
Writes the (4) bytes in the Data Edit boxes starting at the 24-bit indirect address
BASE+OFFSET.
Reads (4) consecutive data bytes starting at the 24-bit indirect address
BASE+OFFSET to the Data Edit boxes.
Causes subsequent write or read operations to be performed N times. N is
entered as a decimal number from 1 to 999.
Closes the dialog.
NOTE: The indirect register editor can remain open with other windows. Use the
Window menu to navigate.
Write Button
Read Button
Loop Count Edit Box
Close Button
28
Indirect Register Controls
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8.5.3 Property Sheets
The Property Sheets represent the register data in a user-friendly format. The data is organized
by function, with each function having its own page and being selectable via tabs at the top.
To open this, click on Edit Property Sheets in the Edit menu and select the device type to edit.
When the property sheet function is started or whenever you tab to a different page, all readable
registers in the device are read from hardware to initialize the dialog pages. Values on the page
are changed by manipulating the various dialog controls as seen in Figure 17.
There are OK, Cancel, and Apply buttons at the bottom of each property page. These are
explained in detail below.
8.5.3.1
Reading the Register Map
The property sheets were designed so that the data displayed is always current. Certain actions
cause the entire register map to be read from the device and to update the property sheets.
This happens when:
1.
Property sheets are initially opened.
2. When tabbing from one page to another.
3. When Read All is clicked.
4. When making the Property Sheets window the active window (by clicking on it).
5. When making a Register Map Editor window the active window (by clicking on it).
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8.5.3.2
Auto–Update from Device
Items 4 and 5 above are referred to as the Auto–Update feature. Auto–Update can be disabled
by setting its program option button to DISABLED. This button is located on the initial dialog box
(WinVCC4 Configuration).
With Auto–Update enabled (default), the user can open both the Property Sheets and the
Register Map Editor at the same time. Changes made to the Property Sheets (and applied) are
updated in the register map window as soon as the Register Map window is clicked on. It also
works the other way; changes made in the Register Map Editor are updated in the Property
Sheets as soon as the Property Sheets window is clicked on.
Figure 17. Property Sheets
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Table 7.
Use of Property Sheet Controls
What Do I Do With It?
When is Hardware Updated?
Dialog Control
Read–Only Edit Box
Read status information
N/A
Check Box
Toggle a single bit
After Apply
Drop–Down List
Select from a text list
After Apply
Edit Box
Type a number
After Apply
Edit Box with
Up/Down arrows
Use up/down arrows or type a number
Up/Down Arrows: Immediately
Type a number: After Apply
Slider
Slide a lever
Immediately
Pushbutton
Initiate an action
Immediately
Table 8.
Button Control
Property Sheet Button Controls
Definition
OK
Writes to all writeable registers whose data has changed. A register is flagged as changed if the
value to be written is different from the value last read from that address.
Closes the dialog.
Cancel
Causes all changes made to the property page since the last Apply to be discarded. Changes made
to dialog controls with ‘immediate hardware update’ are not discarded, since they have already been
changed in hardware.
Does not write to hardware.
Closes the dialog.
Apply
Writes to all writeable registers whose data has changed. A register is flagged as changed if the
value to be written is different from the value last read from that address.
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9
Troubleshooting
This chapter discusses ways to troubleshoot the TVP5160EVM.
9.1
Troubleshooting Guide
If you are experiencing problems with the TVP5160EVM hardware or the WinVCC4 software,
see Table 9 for available solutions.
Table 9.
Symptom
TVP5160EVM Troubleshooting
Cause
Solution
At startup, the error message
Cannot find DLL file
DLPORTIO.DLL appears.
The parallel port driver supplied with
the EVM has not been installed.
Run Port95NT.EXE on the CD to
install the driver.
Blank screen
Wrong video input is selected.
Go to Edit->Property Sheets->
TVP5160, Analog Video page, select
the correct video input(s) and click
Apply.
(The Composite Video 1 input is
default.)
Source is connected to the wrong input Connect source to the correct input
connector.
connector.
YCbCr outputs or clock output is
disabled.
No color
GLCO pin is not set to output the
GLCO signal.
Screen colors are only magenta Wrong YCbCr output format.
and green.
32
Go to Edit->Property Sheets->
TVP5160, Output Control, check the
Enable YCbCr Outputs and Enable
Clock Outputs check boxes and click
Apply.
Go to Edit->Property Sheets->
TVP5160, GPIO page, set the drop
down box labeled “GLCO/I2CA
Terminal” to Genlock Output and
click Apply.
Go to Edit->Property Sheets->
TVP5160, Output Control, set the
YCbCr output format to 10-bit 4:2:2
ITU-R BT.656 with embedded syncs
mode and click Apply.
Video standard auto–switch
does not work on the video
decoder side.
Autoswitch masks are not set correctly. Go to Edit->Property Sheets->
TVP5160, Mode Selection page,
check all standards to be included in
auto–switch processing and click
Apply.
Video decoder is not in auto–switch
Go to Edit->Property Sheets->
TVP5160, Mode Selection page, set
mode.
the drop–down box to Multi–Standard
and click Apply.
Video standard auto–switch
does not work on the video
encoder side.
Auto–switch polling is not enabled.
TVP5160EVM User’s Guide
Click Real–Time Polling in the Tools
menu. Click Enable All and OK.
SLEU063
Table 10.
Symptom
2
No I C
communication
I2C Troubleshooting
Cause
2
Solution
I C slave address is wrong.
Close and restart WinVCC4. Choose the alternate slave
address in the WinVCC4 Configuration dialog.
Parallel cable is not connected from
PC parallel port to the EVM DB25
connector.
Connect cable.
EVM is not powered on.
The power supply must be plugged into a 100-V to 240-V/
47-Hz to 63-Hz power source and the cord must be
plugged into the power connector on the EVM.
Some parallel cables are not wired straight through pinfor-pin. Use the cable supplied with the EVM.
Reboot PC, enter BIOS setup program, set parallel port
LPT1 mode (Addr 378h) to ECP mode or bidirectional
mode (sometimes called PS/2 mode or byte mode). If
already set to one of these two modes, switch to the other
setting.
See Section 4.2.1.
Wrong type of parallel cable.
PC parallel port mode is not set
correctly.
Device was placed in power–down
mode.
EVM was configured for an external
I2C master.
Still no I2C communication
Press the reset button on the TVP5160EVM.
Reinstall 0-? resistors R5 and R6. Control EVM using the
PC parallel port.
The PC may not be capable of operating in the required
parallel port mode. This is true of some laptop computers.
Use a different computer, preferably a desktop PC.
When WinVCC4 is started and the WinVCC4 Configuration dialog box is closed with OK, the I2C
system test is performed (unless the I2C System Test program options button was disabled).
If the I2C system test fails, a dialog box will appear. Figure 18 reports that a read from TVP5160
failed, using slave address 0xB8, subaddress 0xBD. The data read was 0x00. The expected
data was 0x01.
After noting which device had a problem, click OK to continue. Next, the Corrective Action
Dialog box appears to help fix the problem.
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Figure 18. I2C System Failure Dialog Box
9.2
Corrective Action Dialogs
After closing the I2C system test report dialog box, the dialog in Figure 19 appears.
Figure 19. Corrective Action Dialog Box
1. If the cable is NOT connected from the PC parallel port to the TVP5160EVM or if the EVM
power is not on:
a. Click NO.
b. The dialog shown in Figure 20 appears instructing you to correct the problem.
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c. Correct the problem.
d. Click OK to continue. The real-time polling dialog should appear. See Section 3.2.3.
Figure 20. Corrective Action Required
2. If the cable is connected from the PC parallel port to the TVP5160EVM AND the EVM power is
on:
a. Click Yes.
b. The dialog shown in Figure 21 appears. This dialog appears if the PC parallel port mode
setting may need to be changed.
NOTE: Only run the PC BIOS setup program if the I2C communication problem cannot be
resolved in another way. (Correct slave address settings, reset or power cycle the EVM and/or
check that the device type selected was TVP5160).
c. Click OK to continue.
d. The real-time polling dialog appears. Click OK to close it and get to the main menu.
e. Click Exit in the File menu to exit the program.
f.
See troubleshooting guide above.
Figure 21. Corrective Action Required
9.2.1 Setting the PC Parallel Port Mode
NOTE: Only run the PC BIOS setup program if the I2C communication problem cannot be
resolved in another way. (Correct slave address settings, reset or power cycle the EVM, and/or
check that the device type selected was TVP5160).
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1. Restart the PC.
2. During the boot process, enter the BIOS setup program by pressing the required key
(usually the initial text screen tells you which key to press).
3. Find the place where the parallel port settings are made.
4. Set the parallel port LPT1 at address 378h to ECP mode or bidirectional mode
(sometimes called PS/2 mode or byte mode). If one of these two modes is already
selected, change to the opposite mode.
5. Exit and save changes.
9.2.2 General I 2C Error Report
The error report shown in Figure 22 appears when an I2C error occurs at any time other than
after the I2C system test. In this example, there was an acknowledge error at slave address
0x54 (the video decoder module). The error occurred on Read Cycle Phase 1 on the device
(slave) address byte.
Figure 22. I2C Error
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10
TVP5160EVM Schematics
This chapter contains the TVP5160EVM schematics.
TVP5160EVM User’s Guide
37
1
2
3
4
5
6
ADV7311 Board
Revision 1.0
D
D
Feb 2005
Connector
Connector
C
SCL
SDA
CONN_RESET
RESET
ADV7311 MODULE REV 1.0
Power
Power
I2C
I2C
C
ADV7311
ADV7311
CONN_RESET
G/Y
/RESET
SCL
SDA
SCL
SDA
Y[9..0]
CLKIN
/HSYNC
/VSYNC
/BLANK
Y[9..0]
CLKIN
/HSYNC
/VSYNC
/BLANK
UV[9..0]
C[9..0]
B/Pb
R/Pr
RTC
RTC
SV
DVI Tx
DVI Tx
B
CVBS
RTC
SCL
SDA
Y[9..0]
UV[9..0]
CLKIN
/HSYNC
/VSYNC
/BLANK
B
Testpoints
Testpoints
A
A
Title
ENCODER EVM - BLOCK DIAGRAM
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 1.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\ADV7311EVM_MODULE_REV1.0\ADV7311EVM_MODULE_REV1.0.Ddb
Drawn By:
6
1
2
3
4
5
6
D
D
D3_3V
C1
0.1uF
R2
2.2k
2.2k
R1
R3
2.2k
C
27
C
P3
U2C
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
U2D
6
5
9
R6
SCL
SCL
0
74AHC05
DB15
74AHC05
U2F
DB17
13
12
D3_3V
74AHC05
U2A
1
2
74AHC05
7
DB9
R8
2.2k
14
R7
2.2k
DB11
U2B
4
26
8
DB25F
R4
2.2k
3
0
SDA
SDA
R9
R5
2.2k
74AHC05
B
B
U2E
11
10
74AHC05
A
A
Title
ENCODER EVM - I2C
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 1.0
16-Feb-2005
Sheet of
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1
2
3
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5
6
D
D
OPTIONAL 5V, 3.0A DC INPUT
MAIN SUPPLY FROM CONNECTOR
D5V
F1
P1
PJ-002BH
FUSE
L1
H1
1
3
2
C
3
2
1
D1
ZENER
A5V
C2
47uF
L2
C3
22uF
A3_3V
C6
22uF
C7
0.1uF
C
SS26
HEADER 3
D5V
U1
1
2
3
C4
1uF
POWER ON LED (+5V)
D3_3V
IN
OUT
GND
BYPASS
5
4
EN
TPS76233
C5
0.01uF
C8
22uF
RESET ON POWER UP
D3_3V
Remove R8 to disable
D5V
R12
RESET from Connector
R10
330
100k
R11
CONN_RESET
U3
0
1
2
3
4
S1
PB
LED1
LED
C9
1uF
B
CONTROL
VDD
/RESIN
SENSE
CT
RESET
GND
/RESET
C10 0.1uF
8
7
6
5
RESET
RESET
TLC7733IPW
B
A
A
Title
ENCODER EVM - POWER
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 1.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\ADV7311EVM_MODULE_REV1.0\ADV7311EVM_MODULE_REV1.0.Ddb
Drawn By:
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1
2
3
4
5
6
D
D
Y[9..0]
Y[9..0]
H2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
C
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
C
HEADER 10X2
UV[9..0]
UV[9..0]
H3
UV0
UV1
UV2
UV3
UV4
UV5
UV6
UV7
UV8
UV9
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
HEADER 10X2
H4
RTC
1
3
5
7
9
11
RTC
B
/HSYNC
/VSYNC
/BLANK
2
4
6
8
10
12
CLKIN
/HSYNC
/VSYNC
/BLANK
CLKIN
B
HEADER 6X2
TP
TP1
TP
1
SDA
SDA
TP
TP2
TP
1
SCL
SCL
A
A
Title
ENCODER EVM - TESTPOINTS
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 1.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\ADV7311EVM_MODULE_REV1.0\ADV7311EVM_MODULE_REV1.0.Ddb
Drawn By:
6
1
2
3
4
5
6
D
D
D5V
D5V
D5V
D5V
P2
SCL
SDA
C
SCL
SDA
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
5V
5V
GND
GND
GND
SCL/PHI_ACK
SDA/PHI_RWW
PHI_DS/RD
PHI_CS
PHI_A1
PHI_A0
PHI_D7
PHI_D6
PHI_D5
PHI_D4
PHI_D3
PHI_D2
PHI_D1
PHI_D0
GND
CLK5/M1
FPDAT/VSYA/M2
FFRSTW/CBFLAG
FSY/HC/HSYA/~BLNK
VGAV/SYNC_T
FFIE/CCVALID
FFWE/DVALID
FFRSTWIN/~SCLK
FFRE/DIG_H
FFOE/DIG_V
5V
5V
GND
GND
GND
AMXCLK
ALRCLK
ASCLK
AMCLK
GND
GPIO7
GPIO6
GPIO5
GPIO4
GND
GPIO3
GPIO2
GPIO1
GPIO0
INTREQ
GPCL
GND
ITRDY
SOGOUT
VACTIVE
D_SCLK
D_RDY
D_PREF
D_HS
D_VS
CONN_RESET
CONN_RESET
/HSYNC
/BLANK
/HSYNC
/BLANK
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
5V
GND
GND
RCr9
RCr8
RCr7
RCr6
RCr5
RCr4
RCr3
RCr2
RCr1
RCr0
GND
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
RESET
PALI
HSYNC
AVID
PREF
UV[9..0]
Y[9..0]
RTC
/VSYNC
CLKIN
UV[9..0]
UV9
UV8
UV7
UV6
UV5
UV4
UV3
UV2
UV1
UV0
Y[9..0]
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
RTC
/VSYNC
CLKIN
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
5V
GND
GND
BCb9
BCb8
BCb7
BCb6
BCb5
BCb4
BCb3
BCb2
BCb1
BCb0
GND
GY9
GY8
GY7
GY6
GY5
GY4
GY3
GY2
GY1
GY0
GND
FID
GLCO
VSYNC
PCLK
SCLK
C
SAMTEC_TMMS_120PIN_F_RA
B
B
A
A
Title
ENCODER EVM - CONNECTOR
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 1.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\ADV7311EVM_MODULE_REV1.0\ADV7311EVM_MODULE_REV1.0.Ddb
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6
1
2
D3_3V
3
4
5
A3_3V
6
C17
C14
0.1uF
U4A
AD8062
L3
I2C ADDRESS SELECTION
CVBS
3
10uH
R15
604
1-2 Base Addr 0x56
1
C15
NO POP
C19
R17
604
2
CVBS
RCA
R21
2
75
22pF
2-3 Base Addr 0x54 - Default
C21
R23
D
C23
1uF
NO POP
A5V
1
C13
0.1uF
8
C12
0.1uF
4
NO POP
C11
0.1uF
0
C24
0.1uF
D
D3_3V
CLKIN
R13
10k
1
/BLANK
/BLANK
/VSYNC
/VSYNC
/HSYNC
/HSYNC
2
C18
JP1
JMP3
NO POP
4
ALSB
R20 560
R19
560
CLKIN
U5A
AD8062
1
R14
10k
3
10uH
R16
604
C16
NO POP
C20
R18
604
2
VAA1
Y[9..0]
C22
8
Y[9..0]
R22
75
22pF
1
3
3
L4
SV_Y
R29
NO POP
4
A3_3V
L5
SV_C
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
R25
604
C26
NO POP
C28
6
C
R31
75
VAA1
8
GND_IO
CLKIN_B
S9
S8
S7
S6
S5
DGND
VDD
S4
S3
S2
S1
S0
/S_HSYNC
/S_VSYNC
A3_3V
R32 0
A5V
C29
R24
1.1k
/BLANK
RSET1
VREF
COMP1
CVBS
SV_Y
SV_C
1
V+
NC
2
R27
560
3
V-
560
AD1580
A3_3V
R33
4.7k
Pr/R
/RESET
C33
4.7uF
U8A
AD8062
R49 75
1
3
R48
300
2
4
Y/G
Pb/B
Pr/R
COMP2
RSET2
EXT_LF
/RESET
NO POP
C31
0.1uF
R30
U10
C25
0.1uF
C30
1uF
4
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
/S_BLANK
RSET1
VREF
COMP1
DAC A
DAC B
DAC C
VAA
AGND
DAC D
DAC E
DAC F
COMP2
RSET2
EXT_LF
/RESET
C3
C4
I2C
ALSB
SDA
SCLK
/P_HSYNC
/P_VSYNC
/P_BLANK
C5
C6
C7
C8
C9
RTC_SCR_TR
CLKIN_A
L10
U8B
AD8062
7
L11
5
1.2uH
0
C43
C44
NO POP
270pF
VAA2
8
R50
75
6
VAA2
C45
NO POP
8
Y8
Y9
C0
C1
C2
VDD_IO
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
VDD
DGND
Y8
Y9
C0
C1
C2
7
R26
604
22pF
U9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
U5B
AD8062
5
10uH
C49
1uF
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
ADV7311
R52
YPBPR
RCA_RGB
B
2
4
1
RTC
Y/G
U6A
AD8062
R36 75
1
3
C[9..0]
R34
300
2
L6
L8
1.2uH
0
8
U6B
AD8062
7
5
C34
C36
NO POP
270pF
R38
75
VAA3
4
6
VAA3
C38
NO POP
8
SCL
SCL
SDA
SDA
560
CLKIN
C5
C6
C7
C8
C9
C[9..0]
A5V
4
B
R51
560
I2C
ALSB
SDA
SCL
/HSYNC
/VSYNC
/BLANK
C3
C4
R53 0
C46
0.1uF
C32
A3_3V
C50
1uF
EXT_LF
820pF
3.9nF
R46
680
R40
560
R47
4.99k
A5V
C47
0.1uF
6
560
5
C40
R42
D3_3V
R54 0
3
D3_3V
/HSYNC
/VSYNC
CLKIN
C27
C
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
560
2
4
R28
560
SV
SVIDEO_0
5
6
7
NO POP
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
U7A
AD8062
R37 75
1
RSET1
Pb/B
A3_3V
R44
3.01k
3
R35
300
C41
0.1uF
4
4
I2C
L7
5
0
C35
C37
NO POP
270pF
VAA4
8
COMP1
U7B
AD8062
7
L9
1.2uH
2
R39
75
6
VAA4
8
C39
NO POP
A3_3V
C51
1uF
A
R43
C42
0.1uF
RSET2
R41
560
COMP2
R45
3.01k
R55 0
A5V
C48
0.1uF
A
560
Title
ENCODER EVM - ADV7311
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 1.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\ADV7311EVM_MODULE_REV1.0\ADV7311EVM_MODULE_REV1.0.Ddb
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2
3
TVP5160EVM Rev 2.0
AOUT
Revision 2.0
6
Power
Power
I2C
I2C
Feb 2005
D
Tuner Interface
Tuner Interface
VBI Decoder Interface
VBI Decoder Interface
DG
DB
DR
FSO
CVBS
VSYNC
HSYNC
DG
DB
DR
FSO
SCL
SDA
T_CVBS
CVBS_IN
SCL
SDA
TUNER_CVBS
GREEN
BLUE
RED
FSS_RGB
Tuner
SCL
SDA
Connector
Connector
TUNER_CVBS
C
Anti-Aliasing Filters
Anti-Aliasing Filters
CVBS_IN
CVBS_OUT
Y_IN
C_IN
Y_OUT
C_OUT
Y/G_IN
Pb/B_IN
Pr/R_IN
Y/G_IN
Pb/B_IN
Pr/R_IN
Y/G_OUT
Pb/B_OUT
Pr/R_OUT
C[9..0]
Y[9..0]
DATACLK
HS_CS
VS_VBLNK
AVID
FID
GLCO
INTREQ_OUT
HSYNC
VSYNC
AVID
FID
GLCO
INTREQU
SCART_VIDSTAT
SCART_DATA
SCART_CVBS_OUT
SCART_CLK
Y/G_OUT
Pb/B_OUT
Pr/R_OUT
SCRT_CVBS_IN
SCRT_GRN_IN
SCRT_BLUE_IN
SCRT_RED_IN
TSOPII-50 SDRAM
TSOPII-50 SDRAM
TSOPII-54 SDRAM
TSOPII-54 SDRAM
/RAS
/CAS
/WE
DQM
/CS
BA0
BA1
AQ[11..0]
DQ[15..0]
CLK
/RAS
/CAS
/WE
DQM
/CS
BA0
BA1
AQ[11..0]
DQ[15..0]
CLK
CLK
DQ[15..0]
AQ[11..0]
A
BA0
/CS
DQM
/WE
/CAS
/RAS
Testpoints
Testpoints
A
Title
TVP5160EVM - BLOCK DIAGRAM
Size
TSOPII-86 SDRAM
TSOPII-86 SDRAM
2
3
4
Number
Revision
REV 2.0
B
Date:
File:
1
SCART_CLK
SCART_CVBS_OUT
SCART_DATA
SCART_VIDSTAT
SCL
SDA
SCRT_GRN_OUT
SCRT_BLUE_OUT
SCART
SCRT_GRN_OUT
SCRT_BLUE_OUT
B
HSYNC
VSYNC
AVID
FID
GLCO
INTREQ_TP
SCRT_CVBS_IN
SCRT_GRN_IN
SCRT_BLUE_IN
SCRT_RED_IN
C
/RESET
Y[9..0]
C[9..0]
DATACLK
Pr/R
/RESET
RAS#
CAS#
WE#
DQM
/CS
Pb/B
Y_OUT
C_OUT
SCL
SDA
C[9..0]
Y[9..0]
DATACLK
Y_IN
C_IN
A[11..0]
DQ[15..0]
CLK
Y/G
CVBS_IN
CVBS_OUT
A_GREEN
A_BLUE
A_RED
FSS_RGB
ANALOG_OUT
TVP5160
TVP5160
SV
B
5
SCL
SDA
BA0
BA1
D
4
/RESET
1
5
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_
Drawn By:
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1
2
3
4
5
6
D
D
D3_3V
C1
T2
TP
POUT
TP
T1
TP
NACK
TP
TP
T0
0.1uF
C
1
1
1
1
R52
2.2k
27
1
R24
2.2k
2.2k
R8
C
P3
U2C
U2D
6
5
26
9
R6
SCL
0
DB15
74AHC05
U2F
13
DB17
12
D3_3V
74AHC05
U2A
1
DB9
R9
2.2k
14
R7
2.2k
2
74AHC05
DB11
U2B
4
DB25
8
74AHC05
7
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
R53
2.2k
0
3
SDA
SDA
R5
R54
2.2k
74AHC05
U2E
B
11
B
10
74AHC05
A
A
Title
TVP5160EVM - I2C
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 2.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_REV
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2.0.ddb
6
1
2
3
4
5
6
D
D
D5V
H2
C
TUNER_CVBS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
C
SDA
SCL
SAMTEC SSW-120-02-G-D
B
B
A
A
Title
TVP5146EVM - TV TUNER INTERFACE
Size
Number
Revision
REV 2.0
C
Date:
File:
1
2
3
4
5
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_REV
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6
1
2
3
4
6
5
D
D
D5V
C
R60 0
T_CVBS
CVBS_IN
BLUE
GREEN
RED
H3
1
3
5
7
9
11
C
H4
2
4
6
8
10
12
HSYNC
VSYNC
FSS_RGB
SAMTEC SSW-106-02-G-D
DR
DG
DB
1
3
5
7
9
11
2
4
6
8
10
12
SDA
SCL
FSO
SAMTEC SSW-106-02-G-D
B
B
A
A
Title
TVP5160EVM - VBI DECODER INTERFACE
Size
B
Date:
File:
1
2
3
4
5
Number
Revision
REV 2.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_
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2
3
4
6
5
D
D
COMPONENT - YPbPr
Y/G_IN
Y/G_IN
C3
5.6pF
L1
1.8uH
Y/G_OUT
C7
220pF
C
Pr/R_IN
Pr/R_IN
C6
8.2pF
L2
2.2uH
CVBS & S-VIDEO
Y/G_OUT
CVBS_IN
CVBS_IN
C9
220pF
L7
Pr/R_OUT
Pr/R_OUT
Y_IN
Y_IN
C10
330pF
1.8uH
C16 8.2pF
CVBS_OUT
CVBS_OUT
SCRT_GRN_IN
SCRT_GRN_IN
C14
220pF
L4
2.2uH
C13
330pF
L6
2.2uH
SCRT_GRN_OUT
C18
330pF
SCRT_GRN_OUT
C20
330pF
C
C27 8.2pF
Y_OUT
Y_OUT
SCRT_BLUE_IN
C15
330pF
SCRT_BLUE_IN
L9
2.2uH
SCRT_BLUE_OUT
C29
330pF
SCRT_BLUE_OUT
C31
330pF
C24 8.2pF
2.2uH
Pb/B_OUT
Pb/B_OUT
C22
330pF
B
L3
C12
220pF
C21 8.2pF
Pb/B_IN
5.6pF
C11 8.2pF
C8
330pF
Pb/B_IN
C4
SCART - CVBS & RGB (RED & CVBS shared w/ SV)
C_IN
C_IN
C23
330pF
L8
2.2uH
C25
330pF
C_OUT
C_OUT
C26
330pF
B
NOTE: SV- (Y/C) is shared with SCART - (CVBS/RED)
These anti-aliasing filters are used for both sets of inputs.
A
A
Title
TVP5160EVM - ANTI-ALIASING FILTERS
Size
B
Date:
File:
1
2
3
4
5
Number
Revision
REV 2.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_
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D
D
5V, 3.0A DC INPUT
D5V
FUSE
L11
A5V
2
F1
P1
PJ-002BH
C33
47uF
H1
D1
ZENER
3
2
1
HEADER 3
C34
22uF
SS26
1
1
3
2
TVP5160 POWER SUPPLY
VOUT1 IS 3.3V 1A
VOUT2 IS 1.8V 2A
L12
A3_3V
C39
47uF
R20
249k
C
C35
22uF
D5V
C37
0.1uF
R19
330
C36
22uF
0
C38
0.1uF
GND
GND
VIN1A
VOUT1A
VIN1B
VOUT1B
NC
VSENSE1/FB1
/MR
NC
/EN1
PG1
/EN2
PG2
/RESET
NC
GND
VSENSE2/FB2
VIN2A
VOUT2A
VIN2B
VOUT2B
GND
GND
24
23
22
21
20
19
18
17
16
15
14
13
C
NO POP
R12
D3_3V
L14
C41
22uF
R21 249k
R22 249k
L13
C44
0.1uF
D1_8V
R61
0
NO POP
R11
TPS70451
25
LED1
LED
1
2
3
4
5
6
7
8
9
10
11
12
PP
D5V
C43
0.1uF
R10
U8
POWER ON LED (+5V)
C40
22uF
C49
22uF
C50
0.1uF
A1_8V
L15
C48
47uF
C42
22uF
C45
0.1uF
RESET ON POWER UP
D3_3V
R23
B
B
100k
U3
1
2
3
4
RESET
RESET
C46
1uF
CONTROL
VDD
/RESIN
SENSE
CT
RESET
GND
/RESET
C47 0.1uF
8
7
6
5
/RESET
/RESET
TLC7733IPW
A
A
Title
TVP5160EVM - POWER
Size
Number
Revision
REV 2.0
C
Date:
File:
1
2
3
4
5
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_REV
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1
2
3
4
6
5
D3_3V
C51
0.1uF
C52
0.1uF
C53
0.1uF
C54
0.1uF
C55
0.1uF
C56
0.1uF
D
D
DQ[15..0]
DQ[15..0]
D3_3V
U4
DQ0
DQ1
C
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
/WE
/CAS
/RAS
/CS
BA0
DQM
/WE
/CAS
/RAS
/CS
BA0
AQ10
AQ0
AQ1
AQ2
AQ3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
VDD
DQ0
DQ1
VSSQ
DQ2
DQ3
VDDQ
DQ4
DQ5
VSSQ
DQ6
DQ7
VDDQ
DQML
WE_
CAS_
RAS_
CS_
BA
A10
A0
A1
A2
A3
VDD
VSS
DQ15
DQ14
VSSQ
DQ13
DQ12
VDDQ
DQ11
DQ10
VSSQ
DQ9
DQ8
VDDQ
NC
DQMH
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
VSS
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
DQ15
DQ14
C
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQM
CLK
CLK
AQ9
AQ8
AQ7
AQ6
AQ5
AQ4
SDRAM_50TSOPII
B
B
AQ[11..0]
AQ[11..0]
A
A
Title
TVP5160EVM - SDRAM 50-PIN TSOP II
Size
B
Date:
File:
1
2
3
4
5
Number
Revision
REV 2.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_
Drawn By:
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1
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D3_3V
C57
0.1uF
C58
0.1uF
C59
0.1uF
C60
0.1uF
C61
0.1uF
C62
0.1uF
C63
0.1uF
C64
0.1uF
C65
0.1uF
C66
0.1uF
C67
0.1uF
C68
0.1uF
D
D
DQ[15..0]
DQ[15..0]
D3_3V
U5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
C
DQ7
DQM
/WE
/CAS
/RAS
/CS
AQ11
BA0
BA0
BA1
BA1
AQ10
AQ0
AQ1
AQ2
DQM
/WE
/CAS
/RAS
/CS
B
VDD
D0
VDDQ
D1
D2
VSSQ
D3
D4
VDDQ
D5
D6
VSSQ
D7
NC
VDD
DQM0
/WE
/CAS
/RAS
/CS
A11
BA0
BA1
A10/AP
A0
A1
A2
DQM2
VDD
NC
D16
VSSQ
D17
D18
VDDQ
D19
D20
VSSQ
D21
D22
VDDQ
D23
VDD
VSS
D15
VSSQ
D14
D13
VDDQ
D12
D11
VSSQ
D10
D9
VDDQ
D8
NC
VSS
DQM1
NC
NC
CLK
CKE
A9
A8
A7
A6
A5
A4
A3
DQM3
VSS
NC
D31
VDDQ
D30
D29
VSSQ
D28
D27
VDDQ
D26
D25
VSSQ
D24
VSS
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
C
DQ8
DQM
CLK
CLK
AQ9
AQ8
AQ7
AQ6
AQ5
AQ4
AQ3
B
SDRAM_86TSOPII
AQ[11..0]
AQ[11..0]
R4
330
A
A
Title
TVP5160EVM - SDRAM 86-PIN TSOP II
Size
B
Date:
File:
1
2
3
4
5
Number
Revision
REV 2.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_
Drawn By:
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D3_3V
C69
0.1uF
C70
0.1uF
C71
0.1uF
C72
0.1uF
C73
0.1uF
C74
0.1uF
C75
0.1uF
D
D
DQ[15..0]
DQ[15..0]
D3_3V
U6
Reference
DQ0
DQ1
DQ2
C
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
/WE
/CAS
/RAS
/CS
BA0
BA1
DQM
/WE
/CAS
/RAS
/CS
BA0
BA1
AQ10
AQ0
AQ1
AQ2
AQ3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Vcc
DQ0
VccQ
DQ1
DQ2
VssQ
DQ3
DQ4
VccQ
DQ5
DQ6
VssQ
DQ7
Vcc
LDQM
WE
CAS
RAS
CS
BA0
BA1
A10
A0
A1
A2
A3
Vcc
Vss
DQ15
VssQ
DQ14
DQ13
VccQ
DQ12
DQ11
VssQ
DQ10
DQ9
VccQ
DQ8
Vss
NC
UDQM
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
Vss
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
DQ15
DQ14
DQ13
C
DQ12
DQ11
DQ10
DQ9
DQ8
DQM
CLK
CLK
AQ11
AQ9
AQ8
AQ7
AQ6
AQ5
AQ4
SDRAM_54TSOPII
B
B
AQ[11..0]
AQ[11..0]
A
A
Title
TVP5160EVM - SDRAM 54-PIN TSOP II
Size
B
Date:
File:
1
2
3
4
5
Number
Revision
REV 2.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_
Drawn By:
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D
D
D5V
D5V
D5V
D5V
P2
C
SCL
SDA
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
5V
5V
GND
GND
GND
SCL/PHI_ACK
SDA/PHI_RWW
PHI_DS/RD
PHI_CS
PHI_A1
PHI_A0
PHI_D7
PHI_D6
PHI_D5
PHI_D4
PHI_D3
PHI_D2
PHI_D1
PHI_D0
GND
INTREQU
CLK5/M1
FPDAT/VSYA/M2
FFRSTW/CBFLAG
FSY/HC/HSYA/~BLNK
VGAV/SYNC_T
FFIE/CCVALID
FFWE/DVALID
FFRSTWIN/~SCLK
FFRE/DIG_H
FFOE/DIG_V
INTREQU
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
5V
5V
GND
GND
GND
AMXCLK
ALRCLK
ASCLK
AMCLK
GND
GPIO7
GPIO6
GPIO5
GPIO4
GND
GPIO3
GPIO2
GPIO1
GPIO0
INTREQ
GPCL
GND
ITRDY
SOGOUT
VACTIVE
D_SCLK
D_RDY
D_PREF
D_HS
D_VS
/RESET
HSYNC
AVID
/RESET
HSYNC
AVID
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
5V
GND
GND
RCr9
RCr8
RCr7
RCr6
RCr5
RCr4
RCr3
RCr2
RCr1
RCr0
GND
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
RESET
PALI
HSYNC
AVID
PREF
C[9..0]
Y[9..0]
C[9..0]
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
Y[9..0]
FID
GLCO
VSYNC
DATACLK
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
FID
GLCO
VSYNC
DATACLK
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
5V
GND
GND
BCb9
BCb8
BCb7
BCb6
BCb5
BCb4
BCb3
BCb2
BCb1
BCb0
GND
GY9
GY8
GY7
GY6
GY5
GY4
GY3
GY2
GY1
GY0
GND
FID
GLCO
VSYNC
PCLK
SCLK
C
SAMTEC_TMMS_120PIN_M_RA
B
B
A
A
Title
TVP5160EVM - CONNECTOR
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 2.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_REV
Drawn By:
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1
2
3
4
5
6
D
D
D5V
H6
C
SCL
SDA
Y[9..0]
GND2
GND
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
C[9..0]
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VS_VBLNK
HSYNC
FID
AVID
DATACLK
GLCO
INTREQ_TP
C
C[9..0]
VSYNC
HSYNC
FID
AVID
DATACLK
GLCO
INTREQ_TP
TP
D1.8V
1_8V
A1_8V
A1.8V
1_8V
D1_8V
S_CVBS_OUT
TP
A3.3V
3_3V
1
D3.3V
3_3V
TP
A3_3V
1
1
D3_3V
TP
TP
A5V
A5V
1
A5V
Y[9..0]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
HEADER 20X2
1
1
TP
GND1
GND
SCL
SDA
SCART_CVBS_OUT
SCART_CVBS_OUT
TP
B
SCART_DATA
1
1
1
TP
B
TP
S_DATA
SCART_DATA
1
TP
S_CLK
SCART_CLK
SCART_CLK
1
TP
S_VIDSTAT
SCART_VIDSTAT
SCART_VIDSTAT
A
A
Title
TVP5160EVM - TESTPOINTS
Size
Number
Revision
C
Date:
File:
1
2
3
4
5
REV 2.0
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_REV
Drawn By:
2.0.ddb
6
1
2
A1_8V
3
4
5
6
A3_3V
A5V
C78
0.1uF
C80
0.1uF
C82
0.1uF
C86
0.1uF
C88
0.1uF
C90
0.1uF
R27
22
R29
12k
Q1
ANALOG
RCA
C81
0.1uF
C83
0.1uF
C84
0.1uF
C85
0.1uF
C87
0.1uF
C89
0.1uF
C91
0.1uF
C92
0.1uF
C93
0.1uF
2
ANALOG_OUT
R30
22k
75
D
22uF
2N2222
AOUT R26
1
R28
1k
A1_8V
CVBS
RCA
A3_3V
1
2
JP1
2
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
0.1uF
C97
0.1uF
C98
0.1uF
Y/G
C99
0.1uF
SCRT_GRN
C100
0.1uF
Y/CVBS
75
R42
A_GREEN
2
Y_OUT
Y_OUT
75
R46
1
Y_IN
Y_IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
VI_1
VI_2
VI_3
VI_4
VI_5
VI_6
4
3
1
3
0.1uF
C95
Y/CVBS
D4 R34
75
SVIDEO
C94
TUNER_CVBS
2
4
2
SVIDEO
A_RED
R65 75
SV_C/SCRT_RED 1
2
JP3
2
C/RED
D5 R35
75
C_OUT
R66 75
C_OUT
1
C_IN
C_IN
0.1uF
C102
0.1uF
C/RED
C103
0.1uF
C104
0.1uF
Pb/B
C105
0.1uF
SCRT_BLU
C106
0.1uF
A_BLUE
4
3
C
C101
Pr/R
VI_7
VI_8
VI_9
VI_10
VI_11
VI_12
D3_3V
R64
10k
2
Pr/R
D3_3V
Y_2
Y_3
Y_4
IOGND
IOVDD
Y_5
Y_6
Y_7
Y_8
Y_9
DGND
DVDD
DATACLK
GLCO/GPIO/I2CA0
GPIO/I2CA1
A3
A2
A1
A0
A10
BA1
IOGND
IOVDD
BA0
RAS#
CAS#
WE#
A4
A5
A6
DGND
DVDD
D3_3V D1_8V
Pr/R_OUT
VS
LED
1
Pr/R_IN
Y_2
Y_3
Y_4
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
Y_5
Y_6
Y_7
Y_8
Y_9
HS
LED
AVID
LED
2
1
2
R1
330
4
3
3
Y/G_OUT
2
JP6
1
2
R2
330
R3
330
2-3 Analog RGB Overlay
1
3
4
3
5
FSS_RGB
Pb/B_OUT
B
FSS SEL
JMP3
2
1
FSS
SDRAM_/CS
/CS
DATACLK
GLCO
/CS
100
A[11..0]
R37
A_3
A_2
A_1
A_0
A_10
SDRAM_BA1
SDRAM_BA0
SDRAM_RAS#
R38
SDRAM_CAS#
SDRAM_WE#
A_4
A_5
A_6
A_7
A_8
A_9
A_7
A_8
A_9
A_11
SDRAM_CLK
SDRAM_DQM
D_8
D_9
D_10
D_11
D_12
D_13
D_14
D_15
D_7
D_6
D_5
D_4
D_3
D_2
D_1
D_0
RESETB
PWDN
D6 R41
75
Pb/B_IN
DATACLK
GLCO
A[11..0]
A3
A2
A1
A0
A10
BA1
BA0
RAS#
BA1
BA0
RAS#
100
1-2 SCART - Default
Pb/B
DATA_CLK
GLCO/I2CA
C
FSS SELECTION
VS_VBLNK
HS_CS
AVID
1
Y/G_IN
6
R39
SDRAM_BA0
SDRAM_RAS#
SDRAM_CAS#
SDRAM_WE#
A_4
A_5
A_6
Y/G
D7 R40
75
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
100
DATA_CLK
GLCO/I2CA
SDRAM_/CS
A_3
A_2
A_1
A_0
A_10
SDRAM_BA1
JP5
4
Y_2
Y_3
Y_4
Y_5
Y_6
Y_7
Y_8
Y_9
TVP5160
4
3
1
D3 R36
75
PP
1
SCL
SDA
INTREQ
Y[9..0]
R31
A33GND
A33VDD
VI_1
VI_2
VI_3
NC
VI_4
VI_5
VI_6
NC
A18VDD
A18GND
A18VDD
A18GND
A18GND
A18VDD
VI_7
VI_8
VI_9
NC
VI_10
VI_11
VI_12
NC
A33VDD
A33GND
A33GND
NSUB
TMS
SCL
SDA
INTREQ
129
2
2
JP4
Y[9..0]
100
D3_3V
D1_8V
A33GND
ANALOG_OUT
A33GND
A33VDD
PLL18GND
PLL18VDD
XTAL2
XTAL1
AGND
FSS1
VS/VBLK/GPIO
HS/CS/GPIO
FID/GPIO/FSS2
AVID/GPIO/FSS3
C_0/GPIO/FSS4
C_1/GPIO/FSS5
DGND
DVDD
C_2/GPIO
C_3/GPIO
C_4/GPIO
C_5/GPIO
IOGND
IOVDD
C_6/GPIO/RED
C_7/GPIO/GREEN
C_8/GPIO/BLUE
C_9/GPIO/FSO
DGND
DVDD
Y_0
Y_1
CVBS
JP2
YPBPR
RCA_RGB
Y_0
Y_1
DVDD
DGND
PWDN
RESETB
IOVDD
IOGND
D0
D1
D2
D3
D4
D5
D6
D7
DVDD
DGND
D15
D14
D13
D12
D11
D10
D9
D8
IOVDD
IOGND
DQM
CLK
A11
A9
A8
A7
CVBS_OUT
1
CVBS_OUT
SV_Y/SCRT_CVBS
1
5
6
7
D1_8V
D
C4
C5
C6
C7
C8
C9
Y0
Y1
U7
4
3
1
CVBS_IN
VS_VBLNK
HS_CS
FID
AVID
C[9..0]
R33
CVBS
D2 R25
75
CVBS_IN
D3_3V
VS_VBLNK
HS_CS
FID
AVID
C0
C[9..0]
C1
C2
C3
100
C_4
C_5
C_6/DR
C_7/DG
C_8/DB
C_9/FSO
Y_0
Y_1
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
2
D1_8V
XTAL2
XTAL1
C79
0.1uF
2
C77
0.1uF
C96
1
FSS
D3_3V
ANALOG_OUT
D1_8V
R32
VSYNC/VBLK
HSYNC/CS
FID/GPIO
AVID/GPIO
C_0
C_1
C_2
C_3
VSYNC/VBLK
HSYNC/CS
FID/GPIO
AVID/GPIO
C_0
C_1
C_2
C_3
C_4
C_5
C_6/DR
C_7/DG
C_8/DB
C_9/FSO
3
C76
0.1uF
FSS_SCART
CAS#
WE#
A4
A5
A6
A7
A8
A9
CAS#
WE#
100
R43
A_11
SDRAM_CLK
SDRAM_DQM
D_8
D_9
D_10
D_11
D_12
A11
CLK
DQM
DQ8
DQ9
DQ10
DQ11
DQ12
CLK
DQM
B
100
R44
D_13
D_14
D_15
D_7
D_6
D_5
D_4
D_3
SCART
SCART
DQ13
DQ14
DQ15
DQ7
DQ6
DQ5
DQ4
DQ3
100
3
1
Vidstatus
B/CVBS*
ALI
BGND
AudioGND
ALO
ARI
ARO
SCART_CLK
8
SCART_VIDSTAT
1-2 Base Addr 0xBA
1-2 Normal Operation - Default
2-3 Base Addr 0xB8 - Default
2-3 Power Down
DQ2
DQ1
DQ0
DQ[15..0]
100
D3_3V
R51
100k
6
JP9
4
FID/GPIO
SCART_GREEN1
2
R49
10k
SCRT_GRN
2
SCRT_GRN_IN
SCRT_GRN_OUT
GLCO/I2CA 2
I2C ADDR
JMP3
21
3
2
2
C108
33pF
SCART_CVBS_OUT
SCART_CVBS_OUT
SCART_DATA
SCART_DATA
SCART_CLK
SCART_CLK
SCART_VIDSTAT
SCART_VIDSTAT
C8
C7
C6
R50
10k
FID/GPIO
INTREQ_OUT
FSO
DB
DG
DR
RESETB
SDA
SCL
FSS_RGB
A_GREEN
A_RED
A_BLUE
TUNER_CVBS
AOUT
FSS_RGB
A_GREEN
A_RED
A_BLUE
A
TUNER_CVBS
ANALOG_OUT
Title
TVP5146EVM - MAIN
1
SCRT_BLUE_OUT
Size
Number
Revision
REV 2.0
C
Date:
File:
2
/RESET
SDA
SCL
4
3
C107
33pF
PWDN
JMP3
2
SCRT_BLU
D11R48
75
SCRT_BLUE_IN
PWDN
INTREQ
C9
JP10
SCART_BLUE 1
14.31818MHz
14.31818MHz
D3_3V
D10R47
75
A
1
DQ[15..0]
XTAL2
SCART_DATA
XTAL1
GGND
12
10
R14
NO POP
3
5
CLKout
14
D_2
D_1
D_0
I2C ADDRESS SELECTION PWDN SELECTION
1
7
Data
G/CVBS*
NO POP
FSS_SCART
1
9
SCART_BLUE
DataGND
R/C_GND
R45
R13
2
11
R/C
16
1
13
SCART_GREEN
RGBstatus/FSS
4
SV_C/SCRT_RED 15
CVBS/YinGND
CVBS/YoutGND
20 SV_Y/SCRT_CVBS
18
3
17
CVBS/Yin
CVBS/Yout
Shield
SCART_CVBS_OUT
19
3
4
5
16-Feb-2005
Sheet of
C:\Userdata\EVM Design Files\MODULARIZED_EVMS\TVP5160EVM\TVP5160EVM_MODULE_REV2.0\TVP5160EVM_MODULE_REV
Drawn By:
2.0.ddb
6
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