Download Texas Instruments MSP50C614 User's Manual
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Reduced Power Modes In order to wake the device using a programmable interrupt, the interrupt mask register must have the respective bit set to enable interrupt service (see Section 2.7, Interrupt Logic). In some cases, the ARM bit must also be set, in order for the interrupts to be visible during sleep Table 2–3. After the C614 wakes from sleep, the program counter assumes a specific location, resuming normal operation of the device. Normally, the destination of the program on wake-up is the interrupt service routine associated with the interrupt which initiated the wake-up. The start of the interrupt service routine is defined by the program location stored in the respective interrupt vector (see Section 2.6.3, Interrupt Vectors). This wake-up response requires that the global interrupt enable is set before going to sleep (use the INTE instruction). If the global interrupt enable is CLEAR before going to sleep, then the programmed interrupt can still wake the device, provided that the respective IMR and ARM bits are set as in Table 2–5 Instead of waking to the interrupt service routine, however, the program counter assumes the location immediately following the IDLE instruction which initiated the sleep. This type of wake-up response may be useful for putting the C614 into a hold sleep; whereby, any number of programmable interrupts can wake the device, yet they all return the program to the very same location. In order to accomplish this, each of the necessary interrupts should be enabled in the IMR. The global interrupt enable, however, is cleared using the INTD instruction. Table 2–6 lists the various possible destinations of the program counter on wake-up, provided that the wake-up is bound to occur under the given conditions. Table 2–6. Destination of Program Counter on Wake-Up Under Various Conditions State of Interrupt Controls before IDLE Instruction Assuming Wake-Up can occur… Destination of Program Counter after Wake-Up • Global interrupt enable is SET • Respective IMR bit is SET Program counter goes to the location stored in the interrupt vector associated with the waking Interrupt. • Global interrupt enable is CLEAR • Respective IMR bit is SET Program counter goes to the next instruction immediately following the IDLE which initiated sleep. • Global interrupt enable is SET • Respective IMR bit is CLEAR Wake-up cannot occur from the programmed Interrupt under these conditions. If RESET low-to-high occurs, then program goes to the location stored in the RESET interrupt vector. 2-40