Download Elixir DDR3 1GB

M2F1G64CBH4B5P/ M2F1G64CBH4B9P
M2F(X)2G64CB88B7N / M2F(X)2G64CB88BHN
M2F(X)4G64CB8HB5N / M2F(X)4G64CB8HB9N
1GB: 128M x 64 / 2GB: 256M x 64 / 4GB: 512M x 64
PC3-8500 / PC3-10600 / PC3-12800
Unbuffered DDR3 SDRAM DIMM
Ordering Information
Part Number
Speed
Organization
M2F1G64CBH4B5P-BE
DDR3-1066
PC3-8500 533MHz (1.875ns @ CL = 7)
M2F1G64CBH4B5P-CG
DDR3-1333
PC3-10600 667MHz (1.5ns @ CL = 9)
M2F2G64CB88B7N-BE
DDR3-1066
PC3-8500 533MHz (1.875ns @ CL = 7)
M2F2G64CB88B7N-CG
DDR3-1333
PC3-10600 667MHz (1.5ns @ CL = 9)
M2X2G64CB88B7N-DG
DDR3-1600
PC3-12800 800MHz (1.25ns @ CL=9)
M2F4G64CB8HB5N-BE
DDR3-1066
PC3-8500 533MHz (1.875ns @ CL = 7)
M2F4G64CB8HB5N-CG
DDR3-1333
PC3-10600 667MHz (1.5ns @ CL = 9)
M2X4G64CB8HB5N-DG
DDR3-1600
PC3-12800 800MHz (1.25ns @ CL=9)
M2F1G64CBH4B9P-BE
DDR3-1066
PC3-8500 533MHz (1.875ns @ CL = 7)
M2F1G64CBH4B9P-CG
DDR3-1333
PC3-10600 667MHz (1.5ns @ CL = 9)
M2F2G64CB88BHN-BE
DDR3-1066
PC3-8500 533MHz (1.875ns @ CL = 7)
M2F2G64CB88BHN-CG
DDR3-1333
PC3-10600 667MHz (1.5ns @ CL = 9)
M2X2G64CB88BHN-DG
DDR3-1600
PC3-12800 800MHz (1.25ns @ CL=9)
M2F4G64CB8HB9N-BE
DDR3-1066
PC3-8500 533MHz (1.875ns @ CL = 7)
M2F4G64CB8HB9N-CG
DDR3-1333
PC3-10600 667MHz (1.5ns @ CL = 9)
M2X4G64CB8HB9N-DG
DDR3-1600
PC3-12800 800MHz (1.25ns @ CL=9)
Power
Leads
1.5V
Gold
Note
128Mx64
256Mx64
512Mx64
128Mx64
256Mx64
512Mx64
Pin Description
Pin Name
Description
Pin Name
Description
CK0, CK1
Clock Inputs, positive line
DQ0-DQ63
, 
Clock Inputs, negative line
DQS0-DQS8
Data strobes
Clock Enable
-
Data strobes complement
CKE0, CKE1

Row Address Strobe

Column Address Strobe

, 
DM0-DM8
Data input/output
Data Masks

Temperature event pin
Write Enable

Reset pin
Chip Selects
VREFDQ , VREFCA
A0-A9, A11, A13-A15 Address Inputs
A10/AP
Address Input/Auto-Precharge
A12/
Address Input/Burst Chop
VDDSPD
Input/Output Reference
SPD and Temp sensor power
SA0, SA1
Serial Presence Detect Address Inputs
Vtt
Termination voltage
BA0-BA2
SDRAM Bank Address Inputs
VSS
Ground
ODT0, ODT1
Active termination control lines
VDD
Core and I/O power
SCL
Serial Presence Detect Clock Input
NC
No Connect
SDA
Serial Presence Detect Data input/output
REV 1.0
05/2010
2
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