Download Intel Core C2D T5270

Transcript
5.2
5.3
5.1.3 Digital Thermal Sensor .......................................................................... 111
Out of Specification Detection............................................................................ 112
PROCHOT# Signal Pin ...................................................................................... 112
Figures
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Core Low-Power States .............................................................................................12
Package Low-Power States ........................................................................................13
Dynamic FSB Frequency Switching Protocol..................................................................22
Active VCC and ICC Loadline for Standard Voltage, Low-Power SV (25 W) and Dual-Core,
Extreme Edition Processors ........................................................................................43
Deeper Sleep VCC and ICC Loadline for Standard-Voltage, Low-Power SV (25 W) and DualCore Extreme Edition Processors ................................................................................44
Deeper Sleep VCC and ICC Loadline for Low-Power Standard-Voltage Processors ..............45
Active VCC and ICC Loadline for Low-Voltage, Ultra-Low-Voltage and Power Optimized
Performance Processor ..............................................................................................46
Deeper Sleep VCC and ICC Loadline for Low-Voltage, Ultra-Low-Voltage and Power Optimized
Performance Processor ..............................................................................................47
6-MB and 3-MB on 6-MB Die Micro-FCPGA Package Drawing (Sheet 1 of 2) ......................52
3-MB die Micro-FCPGA Processor Package Drawing (Sheet 1 of 2) ...................................53
3-MB Die Micro-FCPGA Processor Package Drawing (Sheet 2 of 2)...................................54
3-MB Die Micro-FCBGA Processor Package Drawing (Sheet 1 of 2) ..................................55
3-MB Die Micro-FCBGA Processor Package Drawing (Sheet 2 of 2) ..................................56
Intel Core 2 Duo Mobile Processor (POP and LV) Die Micro-FCBGA Processor Package
Drawing ..................................................................................................................57
Intel Core 2 Duo Mobile Processor (ULV SC and ULV DC) Die Micro-FCBGA Processor Package
Drawing ..................................................................................................................58
Processor Pinout (Top Package View, Left Side) ............................................................59
Processor Pinout (Top Package View, Right Side) ..........................................................60
Intel Core 2 Duo Mobile Processor in SFF Package Top View Upper Left Side .....................80
Intel Core 2 Duo Mobile Processor in SFF Package Top View Upper Right Side ...................81
Intel Core 2 Duo Mobile Processor in SFF Package Top View Lower Left Side .....................82
Intel Core 2 Duo Mobile Processor in SFF Package Top View Lower Right Side ...................83
Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
4
Coordination of Core Low-Power States at the Package Level..........................................13
Voltage Identification Definition ..................................................................................26
BSEL[2:0] Encoding for BCLK Frequency......................................................................29
FSB Pin Groups ........................................................................................................30
Processor Absolute Maximum Ratings..........................................................................31
Voltage and Current Specifications for the Dual-Core, Extreme Edition Processors .............32
Voltage and Current Specifications for the Dual-Core, Standard-Voltage Processors ...........34
Voltage and Current Specifications for the Dual-Core, Low-Power Standard-Voltage Processors
(25 W) in Standard Package ......................................................................................35
Voltage and Current Specifications for the Dual-Core, Power Optimized Performance (25 W)
SFF Processors.........................................................................................................37
Voltage and Current Specifications for the Dual-Core, Low-Voltage SFF Processor .............38
Voltage and Current Specifications for the Dual-Core, Ultra-Low-Voltage SFF Processor .....40
Voltage and Current Specifications for the Ultra-Low-Voltage, Single-Core
(5.5 W) SFF Processor...............................................................................................41
AGTL+ Signal Group DC Specifications ........................................................................48
CMOS Signal Group DC Specifications..........................................................................49
Open Drain Signal Group DC Specifications ..................................................................49
Datasheet