Download Audio SC-120A Datasheet

TLV320AIC3107
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SLOS545D – NOVEMBER 2008 – REVISED DECEMBER 2014
Table 18. Page 0 / Register 12:
BIT
D7–D6
READ/
WRITE
R/W
RESET
VALUE
00
D5–D4
R/W
00
D3
R/W
0
D2
R/W
0
D1
R/W
0
D0
R/W
0
DESCRIPTION
Left ADC Highpass Filter Control
00: Left ADC highpass filter disabled
01: Left ADC highpass filter –3 dB frequency = 0.0045 × ADC Fs
10: Left ADC highpass filter –3 dB frequency = 0.0125 × ADC Fs
11: Left ADC highpass filter –3 dB frequency = 0.025 × ADC Fs
Right ADC Highpass Filter Control
00: Right ADC highpass filter disabled
01: Right ADC highpass filter –3 dB frequency = 0.0045 × ADC Fs
10: Right ADC highpass filter –3 dB frequency = 0.0125 × ADC Fs
11: Right ADC highpass filter –3 dB frequency = 0.025 × ADC Fs
Left DAC Digital Effects Filter Control
0: Left DAC digital effects filter disabled (bypassed)
1: Left DAC digital effects filter enabled
Left DAC De-emphasis Filter Control
0: Left DAC de-emphasis filter disabled (bypassed)
1: Left DAC de-emphasis filter enabled
Right DAC Digital Effects Filter Control
0: Right DAC digital effects filter disabled (bypassed)
1: Right DAC digital effects filter enabled
Right DAC De-emphasis Filter Control
0: Right DAC de-emphasis filter disabled (bypassed)
1: Right DAC de-emphasis filter enabled
Table 19. Page 0 / Register 13:
BIT
D7
READ/
WRITE
R/W
RESET
VALUE
0
D6-D5
R
00
D4-D2
R/W
000
D1-D0
R/W
00
Audio Codec Digital Filter Control Register
Headset / Button Press Detection Register A
DESCRIPTION
Headset Detection Control
0: Headset detection disabled
1: Headset detection enabled
Headset Type Detection Results
00: No headset detected
01: Stereo headset detected
10: Cellular headset detected
11: Stereo + cellular headset detected
Headset Glitch Suppression Debounce Control for Jack Detection
000: Debounce = 16msec( sampled with 2ms clock)
001: Debounce = 32msec( sampled with 4ms clock)
010: Debounce = 64msec( sampled with 8ms clock)
011: Debounce = 128msec( sampled with 16ms clock)
100: Debounce = 256msec( sampled with 32ms clock)
101: Debounce = 512msec( sampled with 64ms clock)
110: Reserved, do not write this bit sequence to these register bits.
111: Reserved, do not write this bit sequence to these register bits.
Headset Glitch Suppression Debounce Control for Button Press
00: Debounce = 0msec
01: Debounce = 8msec(sampled with 1ms clock)
10: Debounce = 16msec(sampled with 2ms clock)
11: Debounce = 32msec(sampled with 4ms clock)
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