Download Philips 26PFL3512D/12 Specifications

Transcript
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.8
9.9
1080p Panel (if present)
In the LC7.x chassis with 1080p full-HD LCD panel (e.g. the
42PFL7662D), an extra module called “1080p panel” is
needed, because the main video processor supports only
“single LVDS”, while the full HD LCD panel requires “dual
LVDS”.
On this panel, a “Genesis” scaler IC performs the processing.
The input is a “single LVDS” signal from the Trident video
processor, while the output is a “dual LVDS” signal for the HD
display.
Communication is done via I2C, and controlled by the Reneas
microprocessor on the SSB.
DC -DC
REGU
LATOR
TRIDENT
CX32
SINGLE LVDS
8
2
RENESIS
M16C
IC
THINE
LVDS RX
4x32Mb
DDR
9.
EN 91
Audio Processing
The audio decoding is done entirely via the Multistandard
Sound Processor (MSP) 4450P (item 7411).
This processor covers the processing of both analogue and
(NICAM) digital input signals by processing the (analogue) IF
signal-in to processed (analogue) AF-out (baseband audio). An
internal 40 ms (stereo) audio delay line (LIP SYNC) is foreseen
and therefore no external delay line is necessary.
All internal clock signals are derived from an external
18.432 MHz oscillator, which, in NICAM or I2S-mode, on its
turn is locked to the corresponding source.
The following functionality is included:
• Automatic Standard Detection (ASD) automatically detects
the actual broadcasted TV standard
• Automatic Sound Select (ASS) automatically switches
(without any I2C-bus action) between mono/stereo/
bilingual mode when the broadcast mode changes.
12V BOLT-ON
PSU
LC7.2E LA
512kB
FLASH
RBG 24BIT
32kb
NVM
DUAL LVDS
GENESIS
GM1601
1080p
LCD PANEL
9.9.1
Audio Application
RESET
MSP 4450P
ANALOGUE
FRONT END
LCD_PWR
_ON; BL ON/OFF
2 nd SIF
ANA_IN1+
BL DIMMING (PWM)
I2S1
G_16860_093.eps
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DVB / MOJO
(if present)
DACM
LOUDSPEAKER
CLASS D
AMPLIFIER
I2S_DA_IN1
I2S_WS
I2S_CL
DACA
Figure 9-10 1080p block diagram
SCART 1 IN
Some features of the board are:
• Single LBVDS input, dual LVDS output.
• LVDS output enable/disable.
• Hue, saturation, and flesh tone adjustment (= skin tone).
• Brightness and contrast adjustment.
• Motion adaptive de-interlacer (in 1080i).
• Supported SD formats:
– HDMI and YPbPr: 480i&p, 576i&p (50 and 60 Hz).
• Supported HD 720p formats:
– HDMI and YPbPr: 720p (50 and 60 Hz).
• Supported HD 1080i formats:
– HDMI: 1080i (50 and 60 Hz).
– YPbPr: 1080i (50, 59.94, and 60 Hz).
• Supported HD 1080p formats:
– HDMI and YPbPr: 1080p (25 and 30 Hz).
• Upgradable software (via UART). Please refer to chapter 5
and/or ComPair.
COMP IN
SIDE IN
HDMI IN HDMI
IC
HP AMPLIFIER
SC1-IN
SCART 2 IN
SC2-IN
SC1-OUT
SCART 1 OUT
SC3-IN
SC2-OUT
SCART 2 OUT
SC4-IN
AUDIO
DAC
SC5-IN
G_16860_055.eps
090307
Figure 9-11 Block diagram audio processing - EU application
In EU applications, the MSP features:
• Sound IF input for signals coming from the analogue
front-end
• Three I2S-inputs for signals (“DATA”, “CLK” and “WS”)
coming from the MOJO in case of digital reception
• Five analogue inputs: for EXT1 to EXT4 and HDMI
• Loudspeaker output path
• Headphone output path
• SCART-1 output path (RF)
• SCART-2 output path (WYSIWYG = monitor).
Digital audio signals coming from HDMI sources are fed to a
digital-to-analogue converter and then fed to the MSP.
In case of reception of digital TV signals, digital audio signals
coming from the MOJO are directly fed to the MSP via the
I2S_DA_IN1, I2S_WS1 and I2S_CL1 lines. This ensures a
“true digital path”.
The microprocessor (item 7311) controls the audio part with the
following control lines:
• MUTEn: used to mute the Class D amplifiers
• ANTI_PLOP: used to detect any DC failure in the Class D
amplifiers
• DC_PROT: used to detect any DC failure in the Class D
amplifiers.
9.9.2
Audio Amplifier
The audio amplifier is an integrated class-D amplifier
(TDA8932T, item 7A01). It combines a good performance with
a high efficiency, resulting in a big reduction in heat generation.