Download Clevo M728T Service manual

Preface
Notebook Computer
M720T/M728T/M729T/M730T
Service Manual
Preface
I
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes.
Preface
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
July 2008
Trademarks
Intel, Celeron and Intel Core are trademarks of Advanced Micro Devices, Inc.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and./or registered trademarks of their respective companies.
II
Preface
About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the M720T/
M728T/M729T/M730T series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Preface
Appendix A, Part Lists
Appendix B, Schematic Diagrams
III
Preface
FCC Statement
(Federal Communications Commission)
You are cautioned that changes or modifications not expressly approved by the party responsible for compliance could
void the user's authority to operate the equipment.
Warning
Preface
Use only shielded cables to connect I/O devices
to
this
equipment. You are
cautioned that changes or modifications not
expressly approved by
the manufacturer for
compliance with the
above standards could
void your authority to
operate the equipment.
If your purchase option
includes both Wireless LAN and 3.5G
modules, then the appropriate antennas will
be installed. Note that
In order to comply with
FCC RF exposure
compliance
requirements, the antenna
must not be co-located
or operate in conjunction with any other antenna or transmitter.
IV
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee
that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or
television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct
the interference by one or more of the following measures:
•
•
•
•
Re orient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the service representative or an experienced radio/TV technician for help.
Operation is subject to the following two conditions:
1. This device may not cause interference.
And
2. This device must accept any interference, including interference that may cause undesired operation of the device.
FCC RF Radiation Exposure Statement:
1.
2.
This Transmitter must not be co-located or operating in conjunction with any other antenna or transmitter.
This equipment complies with FCC RF radiation exposure limits set forth for an uncontrolled environment. This equipment
should be installed and operated with a minimum distance of 20 centimeters between the radiator and you body.
Preface
IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit (DC Output 19V, 3.42A OR 18.5V, 3.5A (65W) minimum AC/DC Adapter).
Preface
CAUTION
Always disconnect all telephone lines from the wall outlet before servicing or disassembling this equipment.
TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,
TELECOMMUNICATION LINE CORD
This Computer’s Optical Device is a Laser Class 1 Product
V
Preface
Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1.
Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer
to any shock or vibration.
2.
Preface
Do not leave it in a place
where foreign matter or moisture may affect the system.
Don’t use or store the computer in a humid environment.
Do not place the computer on
any surface which will block
the vents.
Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power
until you properly shut down
all programs.
VI
Do not place anything heavy
on the computer.
Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive
heat or direct sunlight.
3.
Do not place it on an unstable
surface.
Do not turn off any peripheral
devices when the computer is
on.
Do not disassemble the computer by yourself.
Perform routine maintenance
on your computer.
Preface
4.
5.
Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data.
Take care when using peripheral devices.
Use only approved brands of
peripherals.
Unplug the power cord before
attaching peripheral devices.
Power Safety
Preface
The computer has specific power requirements:
•
•
•
•
•
•
Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power
cord if you are wet.
Do not use the power cord if
it is broken.
Do not place heavy objects
on the power cord.
Power Safety
Warning
Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.
VII
Preface
Battery Precautions
Preface
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not remove any batteries from the computer while it is powered on.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of
its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal
waste stream. Check with your local solid waste officials for details in your area for recycling options or proper
disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions.
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.
VIII
Preface
Contents
Introduction ..............................................1-1
Disassembly ...............................................2-1
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Hard Disk Drive .......................................................2-6
Removing the Optical (CD/DVD) Device ......................................2-8
Removing the System Memory (RAM) ........................................2-10
Removing the Inverter Board ........................................................2-12
Removing the Processor ................................................................2-13
Removing the Wireless LAN Module ...........................................2-15
Removing the Bluetooth Module ..................................................2-16
Removing the Keyboard ................................................................2-17
Removing the Modem ...................................................................2-18
Part Lists ..................................................A-1
Schematic Diagrams................................. B-1
IX
Preface
Overview .........................................................................................1-1
System Specifications ................................. 1-2
................................................... 1-4
External Locator - Top View with LCD Panel Open ......................1-5
External Locator - Front & Right side Views .................................1-6
External Locator - Left Side & Rear View .....................................1-7
External Locator - Bottom View .....................................................1-8
Mainboard Overview - Top (Key Parts) .........................................1-9
Mainboard Overview - Bottom (Key Parts) ..................................1-10
Mainboard Overview - Top (Connectors) .....................................1-11
Mainboard Overview - Bottom (Connectors) ...............................1-12
Part List Illustration Location ........................................................ A-2
Top with Fingerprint (M720T) ...................................................... A-3
Top without Fingerprint (M720T) ................................................. A-4
Bottom (M720T) ............................................................................ A-5
LCD (M720T) ................................................................................ A-6
HDD (M720T) ............................................................................... A-7
COMBO (M720T) ......................................................................... A-8
DVD-Dual Drive (M720T) ............................................................ A-9
Top with Fingerprint (M728T) .................................................... A-10
Top without Fingerprint (M728T) ............................................... A-11
Bottom (M728T) .......................................................................... A-12
LCD (M728T) .............................................................................. A-13
HDD (M728T) ............................................................................. A-14
COMBO (M728T) ....................................................................... A-15
DVD-Dual Drive (M728T) .......................................................... A-16
Top with Fingerprint (M729T) .................................................... A-17
Top without Fingerprint (M729T) ............................................... A-18
Bottom (M729T) .......................................................................... A-19
LCD (M729T) .............................................................................. A-20
HDD (M729T) ............................................................................. A-21
COMBO (M729T) ....................................................................... A-22
DVD-Dual Drive (M729T) .......................................................... A-23
Top with Fingerprint (M730T) .................................................... A-24
Top without Fingerprint (M730T) ............................................... A-25
Bottom (M730T) .......................................................................... A-26
LCD (M730T) .............................................................................. A-27
HDD (M730T) ............................................................................. A-28
COMBO (M730T) ....................................................................... A-29
DVD-Dual Drive (M730T) .......................................................... A-30
Preface
Preface
System Block Diagram ................................................................... B-2
Intel Penryn (Socket-P) 1/2 ............................................................ B-3
Intel Penryn (Socket-P) 2/2 ............................................................ B-4
Cantiga 1/6 - Host .......................................................................... B-5
Cantiga 2/6 - VGA, CRT ................................................................ B-6
Cantiga 3/6 - DDR .......................................................................... B-7
Cantiga 4/6 - Power ........................................................................ B-8
Cantiga 5/6 - Power ........................................................................ B-9
Cantiga 6/6 - GND ....................................................................... B-10
DDRII CHANNEL A ................................................................... B-11
DDRII CHANNEL B ................................................................... B-12
Panel, Inverter, CRT ..................................................................... B-13
ICH9-M 1/5 - SATA .................................................................... B-14
ICH9-M 2/5 - PCIE, PCI, USB .................................................... B-15
ICH9-M 3/5 - GPIO, PWR Management .................................... B-16
ICH9-M 4/5 - Power .................................................................... B-17
ICH9-M 5/5 - GND ...................................................................... B-18
Clock Generator ........................................................................... B-19
Multi I/O, ODD, CCD, BT, TPM ................................................ B-20
New Card, Mini PCIE .................................................................. B-21
LED, FAN, TP, FP, USB ............................................................. B-22
JMB385 Card Reader ................................................................... B-23
PCI-E LAN RTL8111C ............................................................... B-24
Audio Codec ALC662 .................................................................. B-25
Audio AMP2056 .......................................................................... B-26
KBC-ITE IT8512E ....................................................................... B-27
System Power, LED BKLT .......................................................... B-28
Power VDD3, VDD5 ................................................................... B-29
Power 1.5VS, 1.05VS, 3.3V, 5V .................................................. B-30
Power 1.8V, 0.9VSM ................................................................... B-31
Power VCORE ............................................................................. B-32
Power AC-IN, Charger ................................................................. B-33
X
Multi I/O Board 1/2 ......................................................................B-34
Multi I/O Board 2/2 ......................................................................B-35
Finger Printer Board .....................................................................B-36
Click Board ...................................................................................B-37
M730T ODD Bridge Board ..........................................................B-38
M730T Audio Board .....................................................................B-39
Power Sequence Diagram .............................................................B-40
Power Sequence v3.0 ....................................................................B-41
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the M720T/M728T/M729T/M730T series notebook
computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual.
Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows XP, Windows Vista, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.
1.Introduction
The M720T/M728T/M729T/M730T series notebook is designed to be upgradeable. See “Disassembly” on page 2 - 1
for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
Introduction
System Specifications
Feature
1.Introduction
Processor
Specification
Intel® Core™2 Duo Processor
35W - (478-pin) Micro-FC-PGA Package - Socket-P
T9400/ T9600
45nm (45 Nanometer) Process Technology
6MB On-die L2 Cache & 1006MHz FSB
2.53/ 2.8 GHz
Intel® Core™2 Duo Processor
25W - (478-pin) Micro-FC-PGA Package - Socket-P
P8400/ P8600
45nm (45 Nanometer) Process Technology
3MB On-die L2 Cache & 1006MHz FSB
2.4/ 2.53 GHz
Core Logic
Intel GM45 + ICH9M Chipset
LCD
M720T/M728T/M729T:
M730T:
12.1" WXGA (1280 * 800) TFT LCD
13.3" WXGA (1280 * 800) TFT LCD
Memory
64-bit Wide DDRII (DDR2) Data Channel
Supports Dual Channel DDRII (DDR2) SDRAM
Two 200 Pin SO-DIMM Sockets Supporting DDRII (DDR2) 667MHz/800MHz RAM Modules
Memory Expandable up to 4GB (1024/2048 MB DDR2 Modules)
Video Adapter
Intel GM45 Integrated Video
High Preference 3D/2D Graphic Accelerator
Supports Dynamic Video Memory Technology DVMT (up to 256MB dynamically allocated from system memory where
needed)
Supports DirectX10 3D Graphics Engine Accelerator
Security
Security (Kensington® Type) Lock Slot
Fingerprint ID Reader Module (Factory Option)
BIOS Password
Trusted Platform Module
BIOS
One 32Mb SPI Flash ROM
Phoenix™ BIOS
Storage
One Changeable 12.7mm(h) SATA (Serial) Optical Device (CD/DVD) Type Drive (see “Optional” on page 1 - 4)
Easy Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD
Audio
High Definition Audio (HDA)
Compliant with Microsoft UAA (Universal Audio
Architecture)
Direct Sound 3D™ Compatible
2 * Built-In Speakers
Built-In Microphone
Keyboard &
Pointing Device
Winkey Keyboard
Built-In TouchPad with Scrolling Function
1 - 2 System Specifications
Introduction
Feature
Specification
One RJ-11 Modem Jack
One RJ-45 LAN Jack
One DC-In Jack
One External Monitor Port
Three USB 2.0 Ports
One Headphone-Out Jack
One Microphone-In Jack
One S/PDIF Out Jack
One Internal Microphone
Card Reader
Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/ MMC/ RS MMC/ MS Duo) Note: MS Duo/ Mini SD/ RS
MMC Cards require a PC adapter
ExpressCard Slot
One ExpressCard/34(54) Slot
Communication
10M/ 100/ 1000Mb Base-TX Ethernet LAN
Azalia 56K Modem V.90 & V.92 Compliant
Intel® WiFi Link 5300 Series (3*3 - 802.11a/g/n) Wireless LAN Mini-Card Module (Option)
Intel® WiFi Link 5100 Series (1*2 - 802.11a/g/n) Wireless LAN Mini-Card Module (Option)
3rd Party 802.11b/g Wireless LAN Mini-Card Module with USB interface (Option)
Bluetooth 2.0 + EDR (Enhanced Data Rate) Module (Factory Option)
1.3M or 2.0M Pixel PC Camera Module with USB interface (Factory Option)
*Note:
The 3.5G
and Intel Turbo
Memory Modules
cannot coexist. There
is only one slot available for either of
these factory option
modules.
1.Introduction
Interface
3.5G Module (see sidebar):
*UMTS/HSPDA-based 3.5G Mini-Card Module with USB Interface (Factory Option)
Quad-band GSM/GPRS (850 MHz, 900 MHz, 1800 MHz, 1900 MHz)
UMTS WCDMA FDD (2100 MHz)
UMTS Modes
Note that UMTS modes CAN NOT be used in North America.
Power
Management
Supports ACPI 3.0
Supports Wake on LAN
Supports Resume from Modem Ring
Power
Full Range AC/DC Adapter AC Input 100 - 240V, DC Output 50 - 60Hz, 19V, 3.42A or 18.5V, 3.5A (65 Watts)
Battery
4 Cell Smart Lithium-Ion Battery Pack, 14.8V/2.4AH
8 Cell Smart Lithium-Ion Battery Pack, 14.8V/4.4AH (Option)
System Specifications 1 - 3
Introduction
Feature
Environmental
Spec
Dimensions
& Weight
Optional
*Note:
1.Introduction
The 3.5G
and Intel Turbo
Memory Modules
cannot coexist. There
is only one slot available for either of
these factory option
modules.
Specification
Temperature
Operating:
Non-Operating:
5°C - 35°C
-20°C - 60°C
20% - 80%
10% - 90%
M720T/M728T/M729T:
M730T:
299mm (w) * 219mm (d) * 26.5-35.7mm (h)
1.88 kg With 4 Cell Battery and ODD
310mm (w) * 233mm (d) * 30-36mm (h)
2.0 kg With 4 Cell Battery and ODD
Optical Drive Module Options:
SATA DVD/CD-RW Combo Drive Module
SATA DVD Dual (Super Multi) Drive Module
Fingerprint ID Reader Module (Factory Option)
Intel® WiFi Link 5300 Series (3*3 - 802.11a/g/n) Wireless
LAN Mini-Card Module
Intel® WiFi Link 5100 Series (1*2 - 802.11a/g/n) Wireless
LAN Mini-Card Module
3rd Party 802.11b/g Wireless LAN Mini-Card Module with
USB interface
8 Cell Smart Lithium-Ion Battery Pack
1.3M or 2.0M Pixel USB PC Camera Module (Factory
Option)
Bluetooth 2.0 + EDR (Enhanced Data Rate) Module
(Factory Option)
1 - 4
Relative Humidity
Operating:
Non-Operating:
*Intel Turbo Memory (Robson) NAND Flash Memory
Card Module (Factory Option)
OR
*UMTS/HSPDA-based 3.5G Module with Mini Card
Interface (Factory Option)
Quad-band GSM/GPRS (850 MHz, 900 MHz, 1800
MHz, 1900 MHz)
UMTS WCDMA FDD (2100 MHz)
UMTS Modes
Note that UMTS modes CAN NOT be used in
North America.
Introduction
External Locator - Top View with LCD Panel Open
Figure 1
Top View
1
1
2
2
3
6
5
11
4
6
5
7
7
8
8
9
10
11
9
M720T/M728T/M729T
4
10
*Note: This model may have
M730T
either a fingerprint module or
card reader module, depending on your purchase configuration.
6
6
5
4
5
4
External Locator - Top View with LCD Panel Open 1 - 5
1.Introduction
3
1. Optional Built-In
PC Camera
2. LCD
3. Speakers
4. Power Button
5. Hot Key Buttons
6. LED Status
Indicators
7. Keyboard
8. Touchpad &
Buttons
9. LED Power &
Communication
Indicators
10. Fingerprint
(Optional)
11. Built-In
Microphone
Introduction
Figure 2
External Locator - Front & Right side Views
1.Introduction
Front Views
1. LED Power &
Communication
Indicators
2. 7-in-1 Card
Reader
3. S/PDIF-Out Jack
4. Microphone-In
Jack
5. Headphone-Out
Jack
M720T/M728T/M729T
1
3 4 5
2
M730T
1
2
3 4 5
Figure 3
Right Side Views
1. Optical Device
Drive Bay
2. USB 2.0 Port
3. RJ-11 Phone
Jack
4. Security Lock
Slot
1 - 6 External Locator - Front & Right side Views
M720T/M728T/M729T
1
2
3
2
3
4
M730T
1
4
Introduction
External Locator - Left Side & Rear View
Figure 4
Left Side View
M720T/M728T/M729T
2
1
4
3
6
5
5
M730T
1. DC-In Jack
2. RJ-45 LAN Jack
3. External Monitor
Port
4. Vent/Fan Intake/
Outlet
5. 2 * USB 2.0 Ports
6. ExpressCard Slot
1
2
4
3
1
5
1.Introduction
6
5
M720T/M728T/M729T
Figure 5
Rear View
1. Battery
1
M730T
External Locator - Left Side & Rear View 1 - 7
Introduction
External Locator - Bottom View
Figure 6
1.Introduction
Bottom View
1. Battery (M730T 8
Cell Battery
Pictured)
2. Hard Disk Bay
Cover
(3.5G Module
Location)
3. RAM & CPU Bay
Cover
4. Vent/Fan Intake/
Outlet
(M730T Only)
5. Speakers
(M730T Only)
Overheating
To prevent your computer from overheating
make sure nothing
blocks the vent/fan intakes while the computer is in use.
1 - 8 External Locator - Bottom View
1
1
2
2
3
3
4
5
M720T/M728T/M729T
5
M730T
4
Introduction
Mainboard Overview - Top (Key Parts)
Figure 7
Mainboard Top
Key Parts
1. Transformer
2. VT6103L
3. ExpressCard
Connector
4. ENE MR510
5. KBC ITE IT8512E
1
1.Introduction
2
3
5
4
Mainboard Overview - Top (Key Parts) 1 - 9
Introduction
Figure 8
Mainboard Overview - Bottom (Key Parts)
1.Introduction
Mainboard Bottom
Key Parts
1. CPU Socket (no
CPU installed)
2. Northbridge
3. Memory Slots
DDR2 SO-DIMM
4. ICS
5. Card Reader
Socket
6. Southbridge
7. Audio Codec
8. Mini-Card
Connector (WLAN
Module)
1
8
2
3
6
4
7
5
1 - 10 Mainboard Overview - Bottom (Key Parts)
Introduction
Mainboard Overview - Top (Connectors)
Figure 9
Mainboard Top
Connectors
1
2
4
6
5
3
Mainboard Overview - Top (Connectors) 1 - 11
1.Introduction
1. Hot-key
Connector
2. LCD Cable
Connector
3. Keyboard Cable
Connector
4. Audio Board
Connector
5. Microphone
Cable Connector
6. TouchPad Cable
Connector
Introduction
Figure 10
Mainboard Overview - Bottom (Connectors)
Mainboard Bottom
Connectors
1.Introduction
7
1. BT Cable
Connector
2. Multi Board
Connector
3. CD-ROM
Connector
4. HDD Connector
5. CMOS Bat.
Connector
6. CPU Fan Cable
Connector
7. DC-In Jack
8. USB Port
1
4
2
5
3
1 - 12 Mainboard Overview - Bottom (Connectors)
6
8
8
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the M720T/M728T/M729T/M730T series notebook’s
parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also.
Information
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.
Warning
Overview 2 - 1
2.Disassembly
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
2.Disassembly
•
•
•
•
•
•
M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap
Connections
Connections within the computer are one of four types:
2 - 2 Overview
Locking collar sockets for ribbon connectors
To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors
To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors
To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets
To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:
Power Safety
Warning
Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
2.Disassembly
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies.
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery:
1. Remove the battery
To remove the Wireless LAN Module:
page 2 - 5
1. Remove the battery
2. Remove the wireless LAN
page 2 - 5
page 2 - 6
To remove the Bluetooth Module:
To remove the HDD:
2.Disassembly
1. Remove the battery
2. Remove the HDD
To remove the Optical Device:
1. Remove the battery
2. Remove the Optical device
page 2 - 5
page 2 - 8
To remove the System Memory:
1. Remove the battery
2. Remove the system memory
page 2 - 5
page 2 - 10
To remove the Inverter Board:
1. Remove the battery
2. Remove the inverter board
page 2 - 5
page 2 - 12
To remove and install a Processor:
1. Remove the battery
2. Remove the processor
2 - 4 Disassembly Steps
page 2 - 5
page 2 - 13
1. Remove the battery
2. Remove the Bluetooth
page 2 - 5
page 2 - 15
page 2 - 5
page 2 - 16
To remove the Keyboard:
1. Remove the battery
2. Remove the keyboard
page 2 - 5
page 2 - 17
To remove the Modem:
1.
2.
3.
4.
5.
6.
7.
Remove the battery
Remove the HDD
Remove the system memory
Remove the Optical device
Remove the processor
Remove the keyboard
Remove the modem
page 2 - 5
page 2 - 6
page 2 - 10
page 2 - 8
page 2 - 13
page 2 - 17
page 2 - 18
Disassembly
Removing the Battery
1.
2.
3.
4.
Turn the computer off, and turn it over.
Slide the latch 1 in the direction of the arrow.
Slide the latch 2 in the direction of the arrow, and hold it in place.
Slide the battery 63 in the direction of the arrow 4 .
Figure 1
Battery Removal
a. Slide the latch and hold
in place.
b. Slide the battery in the direction of the arrow.
a.
2
2.Disassembly
1
b.
3
4
3. Battery
Removing the Battery 2 - 5
Disassembly
Removing the Hard Disk Drive
Figure 2
HDD Assembly
Removal
a. Locate the HDD bay
cover and remove the
screw(s).
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
(h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Chapter 4 of the User’s Manual) when setting up a new hard disk.
Hard Disk Upgrade Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screw 1 & 2 .
2.Disassembly
a.
1
Note:
2
Only one model is pictured
here, however the component locations are the same
for both models.
HDD System Warning
New HDD’s are blank. Before you begin make sure:
You have backed up any data you want to keep from your old HDD.
• 2 Screws
You have all the CD-ROMs and FDDs required to install your operating system and programs.
If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan
to install. Copy these to a removable medium.
2 - 6 Removing the Hard Disk Drive
Disassembly
3.
4.
5.
6.
7.
Remove the hard disk bay cover 63 .
Grip the tab and slide the hard disk in the direction of arrow 4 .
Lift the hard disk out of the bay 5 .
Remove the screw 6 & 7 and the adhesive cover 68 from the hard disk 69 .
Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
Figure 3
HDD Assembly
Removal (cont’d.)
b.
3
e.
2.Disassembly
6
b. Remove the HDD bay
cover.
c. Grip the tab and slide the
HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screw and
adhesive cover.
8
c.
7
4
9
d.
5
3. HDD Bay Cover
7. Adhesive Cover
8. HDD
• 2 Screws
Removing the Hard Disk Drive 2 - 7
Disassembly
Figure 4
Optical Device
Removal
a. Remove the screws.
b. Disconnect the fan cable
and remove the cover.
c. Remove the screw.
d. Push the optical device
out off the computer at
point 8.
Removing the Optical (CD/DVD) Device
1.
2.
3.
4.
5.
6.
Turn off the computer, and remove the battery (page 2 - 5).
M720T/M728T/M729T: (see over for M730T) Locate the component bay cover 1 and remove screws 2 - 5 .
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
Carefully disconnect the fan cable 6 , and remove the cover 1 .
Remove the screw at point 7 , and use a screwdriver to carefully push out the optical device 9 at point 8 .
Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
7. Restart the computer to allow it to automatically detect the new device.
c.
a.
2.Disassembly
4
2
3
5
7
1
M720T/M728T/M729T
b.
d.
1. Component Bay Cover
9. Optical Device
• 5 Screws
2 - 8 Removing the Optical (CD/DVD) Device
1
6
9
8
Disassembly
8.
9.
10.
11.
12.
M730T: Locate the component bay cover 1 and remove screws 2 & 5 .
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
Carefully disconnect the fan cable 6 and remove the bay cover 1 .
Remove the screw at point 7 , and use a screwdriver to carefully push out the optical device 9 at point 8 .
Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
13. Restart the computer to allow it to automatically detect the new device.
e.
g.
4
2
3
Figure 5
Optical Device
Removal (cont’d.)
e. Remove the screws.
f. Disconnect the fan cable
and remove the cover.
g. Remove the screw.
h. Push the optical device
out off the computer at
point 8.
5
2.Disassembly
1
7
M730T
f.
h.
1
6
9
8
1. HDD Bay Cover
8. Optical Device
• 4 Screws
Removing the Optical (CD/DVD) Device 2 - 9
Disassembly
Figure 6
RAM Module
Removal
a. Remove the screws.
b. Remove the cover.
Removing the System Memory (RAM)
The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting
DDR2 667/800MHz. The main memory can be expanded up to 4GB. The SO-DIMM modules supported are 1024MB,
and 2048MB and DDRII Modules. The total memory size is automatically detected by the POST routine once you turn
on your computer.
Memory Upgrade Process
2.Disassembly
Contact Warning
Be careful not to touch
the metal pins on the
module’s connecting
edge. Even the cleanest hands have oils
which can attract particles, and degrade the
module’s
performance.
1.
2.
3.
4.
Turn off the computer, remove the battery (page 2 - 5).
Locate the component bay cover 1 , and remove screws 2 - 5 .
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
Carefully disconnect the fan cable 6 , and remove the cover 1 .
a.
2
4
3
4
2
5
3
5
1
1
M720T/M728T/M729T
M730T
b.
Note:
1
1. Component Bay
Cover
• 3 Screws
6
2 - 10 Removing the System Memory (RAM)
Only one model is pictured
here, however the component locations are the same
for both models.
Disassembly
5. Gently pull the two release latches ( 7 & 8 ) on the sides of the memory socket in the direction indicated by the
arrows (Figure 7c).
c.
d.
Figure 7
RAM Module
Removal (cont’d.)
c. Pull
the
release
latch(es).
d. Remove the module(s).
7
9
8
2.Disassembly
6.
7.
8.
9.
The RAM module(s) 9 will pop-up (Figure 7d), and you can then remove it.
Pull the latches to release the second module if necessary.
Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
will go. DO NOT FORCE the module; it should fit without much pressure.
10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
11. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay
cover).
e.
Note:
Only one model is pictured
here, however the component locations are the same
for both models.
9. RAM Module(s)
12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
Removing the System Memory (RAM) 2 - 11
Disassembly
Figure 8
2.Disassembly
Inverter Board
Removal
a. Remove the 6 screws
and unsnap the LCD
front panel module from
the back.
b. Remove the screw and
discharge the remaining
power from the inverter
board and lift the board
up slightly.
c. Disconnect the cables
from the inverter.
d. Remove the inverter.
Removing the Inverter Board
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Remove any rubber covers, screws 1 - 6 (Figure 8a), then run your finger around the middle of the frame to
carefully unsnap the LCD front panel module 7 from the back.
3. Discharge the remaining system power (see “Inverter Power Warning” below).
4. Remove screws 8 - 9 (Figure 8b) from the inverter, and carefully lift the inverter board up slightly.
5. Disconnect cables 10 & 11 (Figure 8c) from the inverter, then remove the inverter 12 (Figure 8d) from the top
case assembly.
a.
2
3
4
5
b.
8
9
c.
1
6
10
11
7
7. LCD Front Panel
12. Inverter Board
• 8 Screws
Inverter Power Warning
In order to prevent a short circuit when removing
the inverter it is necessary to discharge any remaining system power. To do so, press the computer’s power button for a few seconds before
disconnecting the inverter cable.
2 - 12 Removing the Inverter Board
d.
12
Disassembly
Removing the Processor
1.
2.
3.
4.
Figure 9
Turn off the computer, and remove the battery (page 2 - 5) and the CPU/RAM bay cover (page 2 - 10).
The CPU heat sink will be visible at point 1 on the mainboard.
Loosen screws 2 - 4 from the heat sink in the order indicated.
Carefully lift up the heat sink 5 (Figure c) off the computer.
Note:
a.
Processor Removal
a. Remove the cover and
Iocate the heat sink.
b. Remove the 3 screws in
the order indicated.
c. Remove the heat sink.
1
b.
c.
2.Disassembly
Only one model is pictured
here, however the component locations are the same
for both models.
3
4
2
5
5. Heat Sink
Removing the Processor 2 - 13
Disassembly
Figure 10
Processor Removal
Sequence
5.
6.
7.
8.
Turn the release latch 6 towards the unlock symbol
, to release the CPU (Figure d).
Carefully (it may be hot) lift the CPU 7 up out of the socket (Figure e).
Reverse the process to install a new CPU.
When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
d. Turn the release latch to
unlock the CPU.
e. Lift the CPU out of the
socket.
d.
6
2.Disassembly
6
Unlock
Lock
e.
7
Caution
7. CPU
2 - 14 Removing the Processor
The heat sink, and CPU area in
general, contains parts which are
subject to high temperatures. Allow
the area time to cool before removing these parts.
Disassembly
Removing the Wireless LAN Module
1.
2.
3.
4.
5.
Figure 11
Wireless LAN
Module Removal
Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 10).
The Wireless LAN module will be visible at point 1 on the mainboard.
Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket.
The Wireless LAN module 5 will pop-up.
Lift the Wireless LAN module (Figure 11d) up and off the computer.
a.
a. Remove the cover.
b. Disconnect the cables
and remove the screw.
c. The WLAN module will
pop up.
d. Lift the WLAN module
out.
b.
Note:
1
4
3
2
Note: Make sure you
reconnect the antenna
cable to “1” + “2”
socket (Figure b).
d.
c.
5
5. WLAN Module.
• 1 Screw
Removing the Wireless LAN Module 2 - 15
2.Disassembly
Only one model is pictured here, however
the component locations are the same for
both models.
Disassembly
Figure 12
Bluetooth Removal
a. Remove the cover and
locate the Bluetooth
module.
b. Remove the screw and
disconnect the cable and
seperate the connector.
c. Lift the Bluetooth module
out.
Removing the Bluetooth Module
1.
2.
3.
4.
Turn off the computer, remove the battery (page 2 - 5).
The Bluetooth module will be visible at point 1 on the mainboard.
Remove screw 2 and carefully disconnect the cable 3 and separate the module from the connector 4 .
Lift the Bluetooth module 5 up and off the computer.
c.
a.
1
Note:
2.Disassembly
Only one model is pictured here, however
the component locations are the same for
both models.
b.
2
3
5. Bluetooth Module
• 1 Screw
2 - 16 Removing the Bluetooth Module
4
5
Disassembly
Removing the Keyboard
Figure 13
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Press the three keyboard latches at the top of the keyboard to elevate the keyboard from its normal position (you
may need to use a small screwdriver to do this).
3. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable (Figure 13b).
4. Disconnect the keyboard ribbon cable 4 from the locking collar socket 5 .
5. Carefully lift up the keyboard 6 (Figure 13c) off the computer.
a.
b.
2
1
3
4
a. Press the three latches
to release the keyboard.
b. Lift the keyboard up and
disconnect the cable
from the locking collar.
c. Remove the keyboard.
Re-Inserting the Keyboard
When re-inserting the
keyboard firstly align
the three keyboard
tabs at the bottom of
the keyboard with the
slots in the case.
c.
6
6
6. Keyboard Module.
Keyboard Tabs
Removing the Keyboard 2 - 17
2.Disassembly
5
Keyboard Removal
Disassembly
Figure 14
Modem Removal
2.Disassembly
a. Disconnect the connectors from under the keyboard.
b. Remove the screws.
c. Remove the screws and
disconnect the connectors from the mainboard.
d. Remove the top case.
Removing the Modem
1. Turn off the computer, remove the battery (page 2 - 5), HDD (page 2 - 6), component bay cover (page 2 - 10),
optical device (page 2 - 8), CPU (page 2 - 13), bluetooth (page 2 - 16) and keyboard (page 2 - 17).
2. Disconnect the connectors 1 - 3 from under the keyboard and turn it over.
3. Remove screws 4 - 5 from the rear of the computer.
a.
b.
4
2
1
5
3
4. Remove the screws 6 - 21 from the bottom case and disconnect the connectors 22 - 23 on the mainboard.
5. Carefully lift up the top case 24 off the computer.
c.
7
16
6
22
d.
15
18
21
17
8
23
19
24
14
20
13
24. Top Case
• 18 Screws
9
2 - 18 Removing the Modem
10
11
12
Disassembly
Remove screws 25 - 27 and disconnect the connectors 28 - 30 from the mainboard.
Separate the bottom case 31 from the mainboard 32 and turn it over.
Remove the screws 33 - 34 and disconnect the connector 35 from the modem.
Lift the modem 37 up off the socket 36 .
6.
7.
8.
9.
g.
e.
25
28
26
30
33
29
34
35
Figure 15
Modem Removal
Sequence
27
h.
f.
37
31
32
36
31. Bottom Case
32. Main Board
37. Modem
• 5 Screws
Removing the Modem 2 - 19
2.Disassembly
e. Remove the screws and
and disconnect the connectors.
f. Separate the bottom
case from the mainboard.
g. Remove the screws and
and disconnect the connector.
h. Lift the modem up off
the socket.
2.Disassembly
Disassembly
2 - 20
Part Lists
Appendix A: Part Lists
This appendix breaks down the M720T/M728T/M729T/M730T series notebook’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
A.Part Lists
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part Lists
Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location
A.Part Lists
Parts
M720T
M728T
M729T
M730T
Top with Fingerprint
page A - 3
page A - 10
page A - 17
page A - 24
Top without Fingerprint
page A - 4
page A - 11
page A - 18
page A - 25
Bottom
page A - 5
page A - 12
page A - 19
page A - 26
LCD
page A - 6
page A - 13
page A - 20
page A - 27
HDD
page A - 7
page A - 14
page A - 21
page A - 28
COMBO
page A - 8
page A - 15
page A - 22
page A - 29
DVD-Dual Drive
page A - 9
page A - 16
page A - 23
page A - 30
A - 2 Part List Illustration Location
Part Lists
Top with Fingerprint (M720T)
Figure A - 1
黑色 無鉛
白色 無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
型
無鉛
型
無鉛
型
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鋁箔
無鉛
材質
設變材質
無鉛
無鉛
Top with Fingerprint (M720T) A - 3
A.Part Lists
Top with
Fingerprint
(M720T)
Part Lists
Top without Fingerprint (M720T)
A.Part Lists
Figure A - 2
Top without
Fingerprint
(M720T)
黑色 無鉛
白色 無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
型
無鉛
型
無鉛
型
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鋁箔
無鉛
材質
設變材質
A - 4 Top without Fingerprint (M720T)
無鉛
無鉛
Part Lists
Bottom (M720T)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
凱碩
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Figure A - 3
Bottom
(M720T)
無鉛
無鉛
無鉛
海華
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
側壁加肉
無鉛
無鉛
無鉛
拉帶加長 無鉛
無鉛
藍天3 互億
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Bottom (M720T) A - 5
A.Part Lists
無鉛
Part Lists
LCD (M720T)
A.Part Lists
Figure A - 4
LCD
(M720T)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
灰色 精乘
無鉛
黑色 精乘
黑色
無鉛
精乘
無鉛
無鉛
富佑鴻
無鉛
無鉛
無鉛
無鉛
無鉛
中性
無鉛
無鉛
無鉛
無鉛
無鉛
黑色
精乘
無鉛
無鉛
無鉛
無鉛
硬式保護膜
透明
無鉛
無鉛
A - 6 LCD (M720T)
Part Lists
HDD (M720T)
Figure A - 5
無鉛
無折切痕(設變)(無鉛)
HDD (M720T) A - 7
A.Part Lists
HDD
(M720T)
Part Lists
COMBO (M720T)
A.Part Lists
Figure A - 6
COMBO
(M720T)
無鉛
無鉛
無鉛
無鉛
觸點高度降低
A - 8 COMBO (M720T)
(世華)無鉛
Part Lists
DVD-Dual Drive (M720T)
Figure A - 7
無鉛
無鉛
無鉛
無鉛
觸點高度降低
(世華)無鉛
DVD-Dual Drive (M720T) A - 9
A.Part Lists
DVD-Dual Drive
(M720T)
Part Lists
Top with Fingerprint (M728T)
A.Part Lists
Figure A - 8
Top with
Fingerprint
(M728T)
黑色
無鉛
無鉛
無鉛
無鉛
型
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鋁箔
A - 10 Top with Fingerprint (M728T)
無鉛
Part Lists
Top without Fingerprint (M728T)
Figure A - 9
黑色
無鉛
無鉛
無鉛
無鉛
型
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鋁箔
無鉛
Top without Fingerprint (M728T) A - 11
A.Part Lists
Top without
Fingerprint
(M728T)
Part Lists
Bottom (M728T)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
凱碩
無鉛
無鉛
無鉛
無鉛
無鉛
A.Part Lists
Figure A - 10
無鉛
無鉛
無鉛
Bottom
(M728T)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
海華
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
側壁加肉
無鉛
無鉛
無鉛
拉帶加長 無鉛
無鉛
藍天3 互億
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
A - 12 Bottom (M728T)
Part Lists
LCD (M728T)
Figure A - 11
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
黑色
灰色 精乘
無鉛
黑色 精乘
無鉛
精乘
無鉛
無鉛
富佑鴻
無鉛
無鉛
無鉛
無鉛
無鉛
中性
電鑄薄膜鍍亮鉻
偉鎮(無鉛
無鉛
無鉛
背膠
無鉛
無鉛
LCD (M728T) A - 13
A.Part Lists
LCD
(M728T)
Part Lists
HDD (M728T)
A.Part Lists
Figure A - 12
HDD
(M728T)
無鉛
無折切痕(設變)(無鉛)
A - 14 HDD (M728T)
Part Lists
COMBO (M728T)
Figure A - 13
無鉛
無鉛
無鉛
無鉛
觸點高度降低
(世華)無鉛
COMBO (M728T) A - 15
A.Part Lists
COMBO
(M728T)
Part Lists
DVD-Dual Drive (M728T)
A.Part Lists
Figure A - 14
DVD-Dual Drive
(M728T)
無鉛
無鉛
無鉛
無鉛
觸點高度降低
A - 16 DVD-Dual Drive (M728T)
(世華)無鉛
Part Lists
Top with Fingerprint (M729T)
Figure A - 15
黑色
無鉛
無鉛
無鉛
無鉛
型
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鋁箔
無鉛
Top with Fingerprint (M729T) A - 17
A.Part Lists
Top with
Fingerprint
(M729T)
Part Lists
Top without Fingerprint (M729T)
A.Part Lists
Figure A - 16
Top without
Fingerprint
(M729T)
黑色
無鉛
無鉛
無鉛
無鉛
型
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鋁箔
A - 18 Top without Fingerprint (M729T)
無鉛
Part Lists
Bottom (M729T)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
凱碩
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Figure A - 17
Bottom
(M729T)
無鉛
無鉛
海華
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
側壁加肉
無鉛
無鉛
無鉛
拉帶加長 無鉛
無鉛
藍天3 互億
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Bottom (M729T) A - 19
A.Part Lists
無鉛
Part Lists
LCD (M729T)
A.Part Lists
Figure A - 18
LCD
(M729T)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
黑色
灰色 精乘
無鉛
黑色 精乘
無鉛
精乘
無鉛
無鉛
富佑鴻
無鉛
無鉛
無鉛
無鉛
無鉛
中性
電鑄薄膜鍍亮鉻
偉鎮(無鉛
無鉛
無鉛
無鉛
A - 20 LCD (M729T)
Part Lists
HDD (M729T)
Figure A - 19
無鉛
無折切痕(設變)(無鉛)
HDD (M729T) A - 21
A.Part Lists
HDD
(M729T)
Part Lists
COMBO (M729T)
A.Part Lists
Figure A - 20
COMBO
(M729T)
無鉛
無鉛
無鉛
無鉛
觸點高度降低
A - 22 COMBO (M729T)
(世華)無鉛
Part Lists
DVD-Dual Drive (M729T)
Figure A - 21
無鉛
無鉛
無鉛
無鉛
觸點高度降低
(世華)無鉛
DVD-Dual Drive (M729T) A - 23
A.Part Lists
DVD-Dual Drive
(M729T)
Part Lists
Top with Fingerprint (M730T)
A.Part Lists
Figure A - 22
Top with
Fingerprint
(M730T)
黑色
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
A - 24 Top with Fingerprint (M730T)
Part Lists
Top without Fingerprint (M730T)
Figure A - 23
黑色
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Top without Fingerprint (M730T) A - 25
A.Part Lists
Top without
Fingerprint
(M730T)
Part Lists
Bottom (M730T)
無鉛
兩個孔徑尺寸由
改為
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
凱碩
無鉛
A.Part Lists
Figure A - 24
無鉛
無鉛
無鉛
Bottom
(M730T)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
黑色
惠貿無鉛
無鉛
無鉛
無鉛
海華
無鉛
無鉛
全卡
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
藍天3 互億
無鉛
無鉛
無鉛
拉帶加長 無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
A - 26 Bottom (M730T)
Part Lists
LCD (M730T)
Figure A - 25
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
黑色
惠貿
無鉛
無鉛
黑色
惠貿
無鉛
無鉛
無鉛
黑色
惠貿 無鉛
無鉛
中性
電鑄薄膜鍍亮鉻
無鉛
無鉛
無鉛
無鉛
黑色
惠貿無鉛
無鉛
LCD (M730T) A - 27
A.Part Lists
LCD
(M730T)
Part Lists
HDD (M730T)
A.Part Lists
Figure A - 26
HDD
(M730T)
無鉛
無折切痕(設變)(無鉛)
A - 28 HDD (M730T)
Part Lists
COMBO (M730T)
Figure A - 27
無鉛
無鉛
無鉛
無鉛
無鉛
COMBO (M730T) A - 29
A.Part Lists
COMBO
(M730T)
Part Lists
DVD-Dual Drive (M730T)
A.Part Lists
Figure A - 28
DVD-Dual Drive
(M730T)
無鉛
無鉛
無鉛
無鉛
無鉛
A - 30 DVD-Dual Drive (M730T)
Schematic Diagrams
Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the M720T/M728T/M729T/M730T notebook’s PCB’s. The following table indicates where to find the appropriate schematic diagram.
Diagram - Page
Diagram - Page
Diagram - Page
ICH9-M 3/5 - GPIO, PWR Management - Page B - 16
Power 1.5VS, 1.05VS, 3.3V, 5V - Page B - 30
Intel Penryn (Socket-P) 1/2 - Page B - 3
ICH9-M 4/5 - Power - Page B - 17
Power 1.8V, 0.9VSM - Page B - 31
Intel Penryn (Socket-P) 2/2 - Page B - 4
ICH9-M 5/5 - GND - Page B - 18
Power VCORE - Page B - 32
Cantiga 1/6 - Host - Page B - 5
Clock Generator - Page B - 19
Power AC-IN, Charger - Page B - 33
Cantiga 2/6 - VGA, CRT - Page B - 6
Multi I/O, ODD, CCD, BT, TPM - Page B - 20
Multi I/O Board 1/2 - Page B - 34
Cantiga 3/6 - DDR - Page B - 7
New Card, Mini PCIE - Page B - 21
Multi I/O Board 2/2 - Page B - 35
Cantiga 4/6 - Power - Page B - 8
LED, FAN, TP, FP, USB - Page B - 22
Finger Printer Board - Page B - 36
Cantiga 5/6 - Power - Page B - 9
JMB385 Card Reader - Page B - 23
Click Board - Page B - 37
Cantiga 6/6 - GND - Page B - 10
PCI-E LAN RTL8111C - Page B - 24
M730T ODD Bridge Board - Page B - 38
DDRII CHANNEL A - Page B - 11
Audio Codec ALC662 - Page B - 25
M730T Audio Board - Page B - 39
DDRII CHANNEL B - Page B - 12
Audio AMP2056 - Page B - 26
Power Sequence Diagram - Page B - 40
Panel, Inverter, CRT - Page B - 13
KBC-ITE IT8512E - Page B - 27
Power Sequence v3.0 - Page B - 41
ICH9-M 1/5 - SATA - Page B - 14
System Power, LED BKLT - Page B - 28
ICH9-M 2/5 - PCIE, PCI, USB - Page B - 15
Power VDD3, VDD5 - Page B - 29
Schematic
Diagrams
B.Schematic Diagrams
System Block Diagram - Page B - 2
Table B - 1
Version Note
The schematic diagrams in this chapter
are based upon version 6-7P-M72T6-005.
If your mainboard (or
other boards) are a later version, please
check with the Service
Center for updated diagrams (if required).
B - 1
Schematic Diagrams
System Block Diagram
A C- IN ,Ch ar ge r
Sy st em Po we r
CLEVO M720T System Block Diagram
M ul ti I/ O Bo ar d
VD D3 ,VD D5
14.318 MHz
S PK _R, R J- 11, L ED
L ID , H OT K EY, U SB , 3 G
Sy ste m Me mo ry
C ol ck Ge ne rat or
ID T
IC S9 LPR 36 3EG LF
In te l Pe nr yn
Pr oc es sor
64pins TSSOP
B.Schematic Diagrams
M 72 0T /M7 30 T Cl ic k
B oa rd
17. 1*8. 1*1. 2mm
Memory Termination
478pins uFCPGA
Soket P
M 73 0T OD D Bo ar d
Sheet 1 of 40
System Block
Diagram
M 73 0T Au di o Bo ar d
< 15 "
LC D Con ne ct or,
In ve rte r
810602-1703
0 .5" ~5 .5 "
667/800/1066 MHz
M73 0T
LED B AC KLI GH T
DRI VE R
RJ-11
2 5*21 *2 .0 5mm
< =8 "
DM I
S ou th B ri dge
IC H9 -M
EC S MB US
S ma rt
F AN
INT SPK L
48pins LQFP
9*9*1. 6mm
AM P.
ANP AC
A PA2 05 6A
28pins TSSOP
9. 8*6.4 *1.2 mm
24 MHz
P CI
33 MHz
1" ~16 "
P CI e
100 MHz
<1 2"
676 mBGA
3 1*31 *2 .5 mm
Sm ar t
Ba tt ery
32.768KHz
Multi I/O
Board
<1 2"
SA TA I /II 3 .0 Gb /s
SA TA I /II 3 .0 Gb /s
U SB 2. 0
3G Ca rd /
Ra bos on
Min i ca rd
S oc ke t
( US B2 )
REALTEK
JMicron
RTL8111C
JMB385
64pins QFN
128pins LQFP
9 *9*1.0 mm
14 *1 4*1. 4mm
<1 2"
25
M Hz
1 "~ 16 "
Multi I/O
Board
US B3
Ca rd Re ad er
LAN
Ne w Car d
S oc ket
( US B4)
( USB 5)
480 Mbps
FINGER PRINTER BOARD
Bl ue too th
( US B9)
C CD
(U SB 7)
(U SB 11)
Fin ge rP rin t
12 MHz
M720T
INT SPK R
INT MIC
A za li a
aS C75 25
B - 2 System Block Diagram
INT SPK L
0. 1" ~1 3
SA TA
HD D
US B1
INT SPK R
HP
OUT
Aza li a C od ec
Re alt ek
AL C66 2
MD C
Co nn ec tor
LP C 33 MHz
0 .5 "~ 11"
S PI RO M
16 Mb
14 *1 4*1. 6mm
MIC
IN
M720T
Az al ia
MD C
Mo du le
X4
128pins LQFP
U SB0
SPDIF
OUT
1329 FCBGA
TP M1 .2
SA TA
OD D
VC OR E
M730T
EC
I TE
IT 85 12E /E X
Th erm al
Se nso r
D DR 2
S O- DI MM 1
Multi I/O
Board
No rt h Br id ge
< 8"
32.768 KHz
INT K /B
1. 8V ,0. 9V
533/667/800 MHz
Ca nt ig a GM CH
EC S PI RO M
51 2K b
D DR 2
S O- DI MM 0
FS B
CR T Con ne ct or
To uc h Pad
Co nn ec tor
Sy na pt ic
1. 05 VM, 1. 5V S
Min i PC Ie
Ech o Pe ak
WiF i/ Wi Max
RJ-45
7 IN1
SO CKE T
Schematic Diagrams
Intel Penryn (Socket-P) 1/2
CPU ONLY SUPPORT TO 35W
H _ A D S TB # 1
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
D5
C6
B4
A3
H_ S T P CL K #
[ 1 3 ] H _I N TR
[ 1 3 ] H _N MI
[ 1 3 ] H _S M I #
M4
N5
T2
V3
B2
D2
D 22
D3
F6
E Q[ 0 ] #
E Q[ 1 ] #
E Q[ 2 ] #
E Q[ 3 ] #
E Q[ 4 ] #
S V D[0 1 ]
S V D[0 2 ]
S V D[0 3 ]
S V D[0 4 ]
S V D[0 5 ]
S V D[0 6 ]
S V D[0 7 ]
S V D[0 8 ]
S V D[0 9 ]
B P M[ 0 ] #
B P M[ 1 ] #
B P M[ 2 ] #
B P M[ 3 ] #
P RD Y #
P R E Q#
TC K
T DI
TD O
TM S
T R S T#
D BR#
H5
F21
E1
H_ DE F E R # [4 ]
H_ DR DY #
[ 4]
H_ DB S Y # [4 ]
F1
H_ B RE Q #
D2 0
B3
[4 ]
H _I E R R #
H_ INIT #
H4
[1 3 ]
H _ L OC K #
C1
F3
F4
G3
G2
H _C P U R S T#
[ 4]
[4 ] H _ DS T B N# 0
[ 4 ] H _D S TB P #0
[ 4 ] H _D I N V # 0
H_ CP U RS T # [4 ]
H_ RS # 0 [4 ]
H_ RS # 1 [4 ]
H_ RS # 2 [4 ]
H_ T RDY # [4 ]
G6
E4
[4 ]
P R OC H O T#
TH E R MD A
T H E R MD C
T H E R MT R I P #
HCLK
BCL K[0 ]
BCL K[1 ]
H _ D # [ 6 3: 0 ]
H_ D# 1 6
H_ D# 1 7
H_ D# 1 8
H_ D# 1 9
H_ D# 2 0
H_ D# 2 1
H_ D# 2 2
H_ D# 2 3
H_ D# 2 4
H_ D# 2 5
H_ D# 2 6
H_ D# 2 7
H_ D# 2 8
H_ D# 2 9
H_ D# 3 0
H_ D# 3 1
H_ HIT # [4 ]
H _ H I T M#
[ 4]
AD 4
AD 3
AD 1
AC 4
AC 2
AC 1
AC 5
AA6
AB3
AB5
AB6
C2 0
H _P R E Q#
H _T C K
H _T D I
H _T M S
H _T R S T#
Layout Note:
0.5" max, Zo= 55 Ohms
[ 4 ] H _D S TB N # 1
[ 4] H _ D S T B P # 1
[ 4] H _ D I N V # 1
THERM AL
S T P CL K #
L INT 0
L INT 1
SM I#
R
R
R
R
R
R
R
R
R
LO C K #
H I T#
H I T M#
A [1 7 ]#
A [1 8 ]#
A [1 9 ]#
A [2 0 ]#
A [2 1 ]#
A [2 2 ]#
A [2 3 ]#
A [2 4 ]#
A [2 5 ]#
A [2 6 ]#
A [2 7 ]#
A [2 8 ]#
A [2 9 ]#
A [3 0 ]#
A [3 1 ]#
A [3 2 ]#
A [3 3 ]#
A [3 4 ]#
A [3 5 ]#
A D S TB [ 1] #
A 2 0 M#
F E R R#
IG NNE #
IER R#
I N I T#
R E S E T#
RS[0 ]#
RS[1 ]#
RS[2 ]#
T RD Y #
I CH
A6
A5
C4
[ 1 3 ] H _A 2 0 M#
[ 1 3] H _ F E R R #
[ 13 ] H _ I GN N E #
[1 3 ]
H_ D# 0
H_ D# 1
H_ D# 2
H_ D# 3
H_ D# 4
H_ D# 5
H_ D# 6
H_ D# 7
H_ D# 8
H_ D# 9
H_ D# 1 0
H_ D# 1 1
H_ D# 1 2
H_ D# 1 3
H_ D# 1 4
H_ D# 1 5
[ 4]
[4 ]
[ 4]
D 2 1 H _ P R OC H OT #
A 2 4 H _ T H E R MD A _ R
B 2 5 H _ T H E R MD C _ R
R 1 96
R 1 95
C7
A2 2
A2 1
[ 5 , 1 3, 2 8 ]
[ 4, 1 8 ]
[ 4, 1 8 ]
[ 4, 1 8 ]
C L K _ C P U _ B C LK [ 1 8]
C L K _ C P U _ B C LK #
[ 18 ]
CP U_ B S E L 0
CP U_ B S E L 1
CP U_ B S E L 2
C P U_ B S E L 0
C P U_ B S E L 1
C P U_ B S E L 2
N 22
K2 5
P2 6
R 23
L23
M 24
L22
M 23
P2 5
P2 3
P2 2
T24
R 24
L25
T25
N 25
L26
M 26
N 24
AD 2 6
C 23
D 25
C 24
AF2 6
AF 1
A2 6
C 3
B2 2
B2 3
C 21
H_ T HE RM DA
H_ T HE RM DC
*1 0 mi l _s h o rt
*1 0 mi l _s h o rt
P M_ T H R M T R I P #
E2 2
F24
E2 6
G 22
F23
G 25
E2 5
E2 3
K2 4
G 24
J24
J23
H 22
F26
K2 2
H 23
J26
H 26
H 25
C P U _ GT L R E F
12mils
R5
[0 ]#
[1 ]#
[2 ]#
[3 ]#
[4 ]#
[5 ]#
[6 ]#
[7 ]#
[8 ]#
[9 ]#
[ 1 0] #
[ 1 1] #
[ 1 2] #
[ 1 3] #
[ 1 4] #
[ 1 5] #
S T B N[0 ]#
S T B P [ 0] #
INV [0 ]#
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
[ 1 6] #
[ 1 7] #
[ 1 8] #
[ 1 9] #
[ 2 0] #
[ 2 1] #
[ 2 2] #
[ 2 3] #
[ 2 4] #
[ 2 5] #
[ 2 6] #
[ 2 7] #
[ 2 8] #
[ 2 9] #
[ 3 0] #
[ 3 1] #
S T B N[1 ]#
S T B P [ 1] #
INV [1 ]#
C8
R4
Put it at central of
CPU socket
H _P R E Q#
*1 U _ 6 . 3V _ X 5 R _ 06
0. 0 1 U _ 1 6V _ X 7R _ 04
2 K _1 % _0 4
C P U TE M P
R 18 1
54 . 9 _ 1% _ 04
H _T D I
R 17 4
54 . 9 _ 1% _ 04
H _T MS
R 19 8
54 . 9 _ 1% _ 04
H _P R OC H OT #
R 19
*5 1 _1 % _0 4
H _C P U R S T#
R2 1 0
3 .3 V
Q 18
S
V _ TH R M
R 2 09
R2 1 1
* 33 0 K _ 04
R2 0 0
C 3 36
*1 0 0K _ 0 4
1 U _6 . 3 V _ 04
*1 00 K _ 0 4
H _T R S T#
D
H _T C K
64 9 _ 1% _ 06
V _T H R M
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
H _D # [ 63 : 0 ]
# 48
# 49
# 50
# 51
# 52
# 53
# 54
# 55
# 56
# 57
# 58
# 59
# 60
# 61
# 62
# 63
[4 ]
H _D S T B N # 3 [ 4 ]
H _D S T B P #3
[ 4]
H _D I N V # 3 [ 4 ]
E5
B5
D2 4
D6
D7
AE6
C
C
C
C
*A O 3 40 9
D
H _ D P R S T P # [ 5 , 1 3 , 31 ]
H _ D P S L P # [ 1 3]
H _ DP W R#
[ 4]
H _ P W R GD [ 1 3 ]
H _ CP US L P # [4 ]
P S I # [ 31 ]
OM
OM
OM
OM
0.5" Max, Zo=27.4 Ohms
0.5" Max, Zo=55
Ohms
is 18 mils wide trace for outer
mils wide trace if on internal
P0
P1
P2
P3
R1 9 4
[2 6 ]
T H E R M_ R S T #
Q1 9
C 3 35
1 0 0 0P _ 5 0 V _X 7 R _ 0 4
G
*2 N 7 0 02 W
H _ TH E R M D C
1 0K _ 0 4
1
2
3
5
S
54 . 9 _ 1% _ 04
R 17 1
C OM P 0
C OM P 1
C OM P 2
C OM P 3
Sheet 2 of 40
Intel Penryn
(Socket-P) 1/2
H _D S T B N # 2 [ 4 ]
H _D S T B P #2
[ 4]
H _D I N V # 2 [ 4 ]
COMP0, COMP2:
COMP1, COMP3:
Best estimate
layers and 14
layers.
H _ TH E R M D A
R 17 3
R2 6
U2 6
AA1
Y1
[4 ]
Layout note:
[2 6 ]
*1 0 m li _ sh o rt
C3 3 7
*0 . 0 1U _ 16 V _ X 7R _0 4
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H _D # [ 63 : 0 ]
# 32
# 33
# 34
# 35
# 36
# 37
# 38
# 39
# 40
# 41
# 42
# 43
# 44
# 45
# 46
# 47
G
H _I E R R #
54 . 9 _ 1% _ 04
AE2 4
A D2 4
AA2 1
AB2 2
AB2 1
A C2 6
A D2 0
AE2 2
AF2 3
A C2 5
AE2 1
A D2 1
A C2 2
A D2 3
AF2 2
A C2 3
AE2 5
AF2 4
A C2 0
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
10mils
1. 0 5 V S
56 _ 0 4
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
1. 0 5 V S
*T S M 1A 1 0 3 H 3 4D 3R
R 7
D [ 48 ] #
D [ 49 ] #
D [ 50 ] #
D [ 51 ] #
D [ 52 ] #
D [ 53 ] #
D [ 54 ] #
D [ 55 ] #
D [ 56 ] #
D [ 57 ] #
D [ 58 ] #
D [ 59 ] #
D [ 60 ] #
D [ 61 ] #
D [ 62 ] #
D [ 63 ] #
DS T B N[3 ]#
D S TB P [ 3 ] #
DINV [3 ]#
Y2 2
AB2 4
V2 4
V2 6
V2 3
T 22
U2 5
U2 3
Y2 5
W22
Y2 3
W24
W25
AA2 3
AA2 4
AB2 5
Y2 6
AA2 6
U2 2
CPU_GRFE=0.7V
C7
MOL E X _ 47 4 30 -6 2 15
R 19 7
D [ 32 ] #
D [ 33 ] #
D [ 34 ] #
D [ 35 ] #
D [ 36 ] #
D [ 37 ] #
D [ 38 ] #
D [ 39 ] #
D [ 40 ] #
D [ 41 ] #
D [ 42 ] #
D [ 43 ] #
D [ 44 ] #
D [ 45 ] #
D [ 46 ] #
D [ 47 ] #
DS T B N[2 ]#
D S TB P [ 2 ] #
DINV [2 ]#
C O MP [ 0 ]
G TL R E F
MISC C O MP [ 1 ]
TEST1
C O MP [ 2 ]
TEST2
C O MP [ 3 ]
TEST3
TEST4
TEST5
DP RS T P #
TEST6
DP S L P #
TEST7
D P W R#
B S E L[ 0 ]
P W R G OO D
B S E L[ 1 ]
SL P#
B S E L[ 2 ]
P S I#
MOL E X _ 47 4 30 -6 2 15
1 K _ 1 %_ 0 4
Layout Note:
TR 1
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
DATAGRP 2
_A # 1 7
_A # 1 8
_A # 1 9
_A # 2 0
_A # 2 1
_A # 2 2
_A # 2 3
_A # 2 4
_A # 2 5
_A # 2 6
_A # 2 7
_A # 2 8
_A # 2 9
_A # 3 0
_A # 3 1
_A # 3 2
_A # 3 3
_A # 3 4
_A # 3 5
CONTROL
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
R
R
R
R
R
B R 0#
XDP/ITP SIGNALS
K3
H2
K2
J3
L1
E Q# 0
E Q# 1
E Q# 2
E Q# 3
E Q# 4
D E F ER#
DRD Y #
D BSY#
H_ A DS #
H_ B NR #
H_ B P RI#
B.Schematic Diagrams
_R
_R
_R
_R
_R
A DS #
BN R#
B P RI#
H1
E2
G5
DATA GRP 1
H
H
H
H
H
A[3 ]#
A[4 ]#
A[5 ]#
A[6 ]#
A[7 ]#
A[8 ]#
A[9 ]#
A [1 0 ]#
A [1 1 ]#
A [1 2 ]#
A [1 3 ]#
A [1 4 ]#
A [1 5 ]#
A [1 6 ]#
A D S TB [ 0] #
ADDR
GROUP_1
[4 ]
H _ A #[ 3 5 : 3 ]
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
DATA GRP 0
[4 ]
_A # 3
_A # 4
_A # 5
_A # 6
_A # 7
_A # 8
_A # 9
_A # 1 0
_A # 1 1
_A # 1 2
_A # 1 3
_A # 1 4
_A # 1 5
_A # 1 6
ADDR
GROUP_0
[ 4 ] H _ A D S TB # 0
[ 4] H _ R E Q #[ 4 : 0 ]
U9 B
H _ D # [ 6 3: 0 ]
U9 A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
RESERVED
H _ A #[ 3 5 : 3 ]
DATAGRP 3
[4 ]
[4 ]
U1 3
VD D
D +
T HER M
AL ER T
D G ND
S D A TA
S C LK
4
6
7
8
R1 9 2
R1 9 3
*1 0 mi l _s h o rt
* 0_ 0 4
D 15
A S D 7 5 1V
C
S M D _ C P U _T H E R M
S M C _ C P U _T H E R M
T H E R M_ A L E R T #
A
P M _T H R M#
R8
R6
R1 8 2
R1 8 3
5 4. 9 _ 1 %_ 0 4
2 7. 4 _ 1 %_ 0 4
5 4. 9 _ 1 %_ 0 4
2 7. 4 _ 1 %_ 0 4
[ 2 6]
[1 5 ]
[ 26 ]
[ 26 ]
aS C 75 2 5
? ADT7421 Colay
Layout Note:
Layout Note:
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil spacing.
Near to Thermal
IC
[ 3 . . 5 , 7 , 8, 1 3 , 16 , 2 9 ] 1 . 0 5V S
[ 1 2. . 1 7 , 1 9, 2 0 , 23 , 2 9 , 30 ] 3. 3 V
Intel Penryn (Socket-P) 1/2 B - 3
Schematic Diagrams
Intel Penryn (Socket-P) 2/2
VCO R E
V C OR E
V C OR E
B.Schematic Diagrams
U9 C
Sheet 3 of 40
Intel Penryn
(Socket-P) 2/2
A7
A9
A1 0
A1 2
A1 3
A1 5
A1 7
A1 8
A2 0
B7
B9
B1 0
B1 2
B1 4
B1 5
B1 7
B1 8
B2 0
C9
C1 0
C1 2
C1 3
C1 5
C1 7
C1 8
D9
D1 0
D1 2
D1 4
D1 5
D1 7
D1 8
E7
E9
E1 0
E1 2
E1 3
E1 5
E1 7
E1 8
E2 0
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA1 0
AA1 2
AA1 3
AA1 5
AA1 7
AA1 8
AA2 0
AB9
A C1 0
AB1 0
AB1 2
AB1 4
AB1 5
AB1 7
AB1 8
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
[ 0 0 1]
[ 0 0 2]
[ 0 0 3]
[ 0 0 4]
[ 0 0 5]
[ 0 0 6]
[ 0 0 7]
[ 0 0 8]
[ 0 0 9]
[ 0 1 0]
[ 0 1 1]
[ 0 1 2]
[ 0 1 3]
[ 0 1 4]
[ 0 1 5]
[ 0 1 6]
[ 0 1 7]
[ 0 1 8]
[ 0 1 9]
[ 0 2 0]
[ 0 2 1]
[ 0 2 2]
[ 0 2 3]
[ 0 2 4]
[ 0 2 5]
[ 0 2 6]
[ 0 2 7]
[ 0 2 8]
[ 0 2 9]
[ 0 3 0]
[ 0 3 1]
[ 0 3 2]
[ 0 3 3]
[ 0 3 4]
[ 0 3 5]
[ 0 3 6]
[ 0 3 7]
[ 0 3 8]
[ 0 3 9]
[ 0 4 0]
[ 0 4 1]
[ 0 4 2]
[ 0 4 3]
[ 0 4 4]
[ 0 4 5]
[ 0 4 6]
[ 0 4 7]
[ 0 4 8]
[ 0 4 9]
[ 0 5 0]
[ 0 5 1]
[ 0 5 2]
[ 0 5 3]
[ 0 5 4]
[ 0 5 5]
[ 0 5 6]
[ 0 5 7]
[ 0 5 8]
[ 0 5 9]
[ 0 6 0]
[ 0 6 1]
[ 0 6 2]
[ 0 6 3]
[ 0 6 4]
[ 0 6 5]
[ 0 6 6]
[ 0 6 7]
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
C[
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
CP [0 1 ]
CP [0 2 ]
CP [0 3 ]
CP [0 4 ]
CP [0 5 ]
CP [0 6 ]
CP [0 7 ]
CP [0 8 ]
CP [0 9 ]
CP [1 0 ]
CP [1 1 ]
CP [1 2 ]
CP [1 3 ]
CP [1 4 ]
CP [1 5 ]
CP [1 6 ]
AB2 0
AB7
A C7
A C9
A C1 2
A C1 3
A C1 5
A C1 7
A C1 8
A D7
A D9
A D1 0
A D1 2
A D1 4
A D1 5
A D1 7
A D1 8
AE9
AE1 0
AE1 2
AE1 3
AE1 5
AE1 7
AE1 8
AE2 0
AF9
AF1 0
AF1 2
AF1 4
AF1 5
AF1 7
AF1 8
AF2 0
06 8 ]
06 9 ]
07 0 ]
07 1 ]
07 2 ]
07 3 ]
07 4 ]
07 5 ]
07 6 ]
07 7 ]
07 8 ]
07 9 ]
08 0 ]
08 1 ]
08 2 ]
08 3 ]
08 4 ]
08 5 ]
08 6 ]
08 7 ]
08 8 ]
08 9 ]
09 0 ]
09 1 ]
09 2 ]
09 3 ]
09 4 ]
09 5 ]
09 6 ]
09 7 ]
09 8 ]
09 9 ]
10 0 ]
G2 1
V6
J6
K6
M6
J2 1
K2 1
M2 1
N2 1
N6
R2 1
R6
T2 1
T6
V2 1
W21
1 . 05 V S
2.5A
Layout Note:
Place near pin B26, C26
1. 5 V S
0.5A
C 3 28
C 32 7
0 .0 1 U_ 1 6 V _ X 7 R_ 0 4
1 0 U_ 6 .3 V _ X 5 R_ 0 8
B2 6
C2 6
V C CA [0 1 ]
V C CA [0 2 ]
VI
VI
VI
VI
VI
VI
VI
U 9D
47A
A D6
AF5
AE5
AF4
AE3
AF3
AE2
D[0 ]
D[1 ]
D[2 ]
D[3 ]
D[4 ]
D[5 ]
D[6 ]
AF7
V CC S E N S E
AE7
VS SSEN SE
MO L E X _4 7 4 3 0 -6 21 5
.
H
H
H
H
H
H
H
_V
_V
_V
_V
_V
_V
_V
ID0
ID1
ID2
ID3
ID4
ID5
ID6
[3 1 ]
[3 1 ]
[3 1 ]
[3 1 ]
[3 1 ]
[3 1 ]
[3 1 ]
C P U_ V C C S E N S E
[ 3 1]
C P U_ V S S S E N S E
[3 1 ]
A4
A8
A1 1
A1 4
A1 6
A1 9
A2 3
AF2
B6
B8
B1 1
B1 3
B1 6
B1 9
B2 1
B2 4
C 5
C 8
C1 1
C1 4
C1 6
C1 9
C 2
C2 2
C2 5
D 1
D 4
D 8
D1 1
D1 3
D1 6
D1 9
D2 3
D2 6
E3
E6
E8
E1 1
E1 4
E1 6
E1 9
E2 1
E2 4
F5
F8
F11
F13
F16
F19
F2
F22
F25
G 4
G 1
G2 3
G2 6
H 3
H 6
H2 1
H2 4
J2
J5
J22
J25
K1
K4
K2 3
K2 6
L3
L6
L21
L24
M2
M5
M2 2
M2 5
N 1
N 4
N2 3
N2 6
P3
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
S [ 0 0 1]
S [ 0 0 2]
S [ 0 0 3]
S [ 0 0 4]
S [ 0 0 5]
S [ 0 0 6]
S [ 0 0 7]
S [ 0 0 8]
S [ 0 0 9]
S [ 0 1 0]
S [ 0 1 1]
S [ 0 1 2]
S [ 0 1 3]
S [ 0 1 4]
S [ 0 1 5]
S [ 0 1 6]
S [ 0 1 7]
S [ 0 1 8]
S [ 0 1 9]
S [ 0 2 0]
S [ 0 2 1]
S [ 0 2 2]
S [ 0 2 3]
S [ 0 2 4]
S [ 0 2 5]
S [ 0 2 6]
S [ 0 2 7]
S [ 0 2 8]
S [ 0 2 9]
S [ 0 3 0]
S [ 0 3 1]
S [ 0 3 2]
S [ 0 3 3]
S [ 0 3 4]
S [ 0 3 5]
S [ 0 3 6]
S [ 0 3 7]
S [ 0 3 8]
S [ 0 3 9]
S [ 0 4 0]
S [ 0 4 1]
S [ 0 4 2]
S [ 0 4 3]
S [ 0 4 4]
S [ 0 4 5]
S [ 0 4 6]
S [ 0 4 7]
S [ 0 4 8]
S [ 0 4 9]
S [ 0 5 0]
S [ 0 5 1]
S [ 0 5 2]
S [ 0 5 3]
S [ 0 5 4]
S [ 0 5 5]
S [ 0 5 6]
S [ 0 5 7]
S [ 0 5 8]
S [ 0 5 9]
S [ 0 6 0]
S [ 0 6 1]
S [ 0 6 2]
S [ 0 6 3]
S [ 0 6 4]
S [ 0 6 5]
S [ 0 6 6]
S [ 0 6 7]
S [ 0 6 8]
S [ 0 6 9]
S [ 0 7 0]
S [ 0 7 1]
S [ 0 7 2]
S [ 0 7 3]
S [ 0 7 4]
S [ 0 7 5]
S [ 0 7 6]
S [ 0 7 7]
S [ 0 7 8]
S [ 0 7 9]
S [ 0 8 0]
S [ 0 8 1]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P6
P2 1
P2 4
R2
R5
R2 2
R2 5
T1
T4
T 23
T 26
U3
U6
U2 1
U2 4
V2
V5
V2 2
V2 5
W1
W4
W23
W26
Y3
Y6
Y2 1
Y2 4
AA2
AA5
AA8
AA1 1
AA1 4
AA1 6
AA1 9
AA2 2
AA2 5
AB1
AB4
AB8
AB1 1
AB1 3
AB1 6
AB1 9
AB2 3
AB2 6
AC 3
AC 6
AC 8
A C 11
A C 14
A C 16
A C 19
A C 21
A C 24
AD 2
AD 5
AD 8
A D 11
A D 13
A D 16
A D 19
A D 22
A D 25
AE1
AE4
AE8
AE1 1
AE1 4
AE1 6
AE1 9
AE2 3
AE2 6
A2
AF6
AF8
AF1 1
AF1 3
AF1 6
AF1 9
AF2 1
A2 5
AF2 5
[ 0 82 ]
[ 0 83 ]
[ 0 84 ]
[ 0 85 ]
[ 0 86 ]
[ 0 87 ]
[ 0 88 ]
[ 0 89 ]
[ 0 90 ]
[ 0 91 ]
[ 0 92 ]
[ 0 93 ]
[ 0 94 ]
[ 0 95 ]
[ 0 96 ]
[ 0 97 ]
[ 0 98 ]
[ 0 99 ]
[ 1 00 ]
[ 1 01 ]
[ 1 02 ]
[ 1 03 ]
[ 1 04 ]
[ 1 05 ]
[ 1 06 ]
[ 1 07 ]
[ 1 08 ]
[ 1 09 ]
[ 1 10 ]
[ 1 11 ]
[ 1 12 ]
[ 1 13 ]
[ 1 14 ]
[ 1 15 ]
[ 1 16 ]
[ 1 17 ]
[ 1 18 ]
[ 1 19 ]
[ 1 20 ]
[ 1 21 ]
[ 1 22 ]
[ 1 23 ]
[ 1 24 ]
[ 1 25 ]
[ 1 26 ]
[ 1 27 ]
[ 1 28 ]
[ 1 29 ]
[ 1 30 ]
[ 1 31 ]
[ 1 32 ]
[ 1 33 ]
[ 1 34 ]
[ 1 35 ]
[ 1 36 ]
[ 1 37 ]
[ 1 38 ]
[ 1 39 ]
[ 1 40 ]
[ 1 41 ]
[ 1 42 ]
[ 1 43 ]
[ 1 44 ]
[ 1 45 ]
[ 1 46 ]
[ 1 47 ]
[ 1 48 ]
[ 1 49 ]
[ 1 50 ]
[ 1 51 ]
[ 1 52 ]
[ 1 53 ]
[ 1 54 ]
[ 1 55 ]
[ 1 56 ]
[ 1 57 ]
[ 1 58 ]
[ 1 59 ]
[ 1 60 ]
[ 1 61 ]
[ 1 62 ]
[ 1 63 ]
M O LE X_ 4 7 4 3 0- 62 1 5
.
C3 2 3
C 321
C 319
C 2 82
C 28 3
10 U _ 6 . 3V _ X5 R _ 08
1 0 U _ 6. 3 V _X 5 R _0 8
1 0 U _6 . 3 V _ X 5 R _ 0 8
1 0 U_ 6 .3 V _ X 5 R_ 0 8
1 0 U_ 6 .3 V _ X 5 R_ 0 8
C2 8 0
C 320
C 318
C 3 22
C 33 3
22 U _ 6 . 3V _ X5 R _ 08
2 2 U _ 6. 3 V _X 5 R _0 8
2 2 U _6 . 3 V _ X 5 R _ 0 8
2 2 U_ 6 .3 V _ X 5 R_ 0 8
2 2 U_ 6 .3 V _ X 5 R_ 0 8
C3 3 0
C 37
C 281
C 38
C 36
22 U _ 6 . 3V _ X5 R _ 08
2 2 U _ 6. 3 V _X 5 R _0 8
2 2 U _6 . 3 V _ X 5 R _ 0 8
2 2 U_ 6 .3 V _ X 5 R_ 0 8
2 2 U_ 6 .3 V _ X 5 R_ 0 8
C2 9 6
C 302
C 295
C 3 01
C 27 8
C3 3 2
1U _ 6 . 3 V _ 0 4
1 U _ 6 . 3V _ 04
1 U _ 6. 3 V _0 4
1 U _6 . 3 V _ 0 4
1 U_ 6 .3 V _ 0 4
1 U_ 6 .3 V _ 0 4
C3 2 9
C 305
C 39
C 3 34
C 32 4
C3 0 3
1U _ 6 . 3 V _ 0 4
1 U _ 6 . 3V _ 04
1 U _ 6. 3 V _0 4
1 U _6 . 3 V _ 0 4
1 U_ 6 .3 V _ 0 4
1 U_ 6 .3 V _ 0 4
C2 9 9
C 298
C 279
C 3 31
C 30 4
C2 9 1
0. 01 U _ 16 V _X 7 R _0 4
0 . 1 U _ 10 V _X 7 R _0 4
0 . 1 U _1 0 V _ X 7 R _ 0 4
0 .1 U_ 1 0 V _ X 7 R_ 0 4
0 .1 U_ 1 0 V _ X 7 R_ 0 4
0 . 0 1U _ 1 6 V _ X7 R _ 0 4
C3 1 3
C 309
C 316
C 3 11
C 31
C1 7
15 0 U _ 4V _B 2
0 . 1 U _ 10 V _X 7 R _0 4
0 . 1 U _1 0 V _ X 7 R _ 0 4
0 .1 U_ 1 0 V _ X 7 R_ 0 4
0 .1 U_ 1 0 V _ X 7 R_ 0 4
0 . 1 U _ 1 0 V _ X 7R _ 0 4
C3 1 2
C 308
C 315
C 35
C 36 2
*0 . 1 U _ 1 0 V _ X 7 R _ 0 4
* 0 .1 U_ 1 0 V _ X 7 R_ 0 4
* 0 . 1 U _ 1 0 V _ X 7R _ 0 4
* 0. 1U _ 1 0V _ X7 R _ 04
0 .1 U_ 1 0 V _ X 7 R_ 0 4
VCO R E
VCO R E
VCO R E
VCO R E
VCO R E
1 .0 5 VS
1 .0 5 VS
[ 2 , 4 , 5 , 7, 8, 13 , 1 6 , 2 9 ] 1. 05 V S
[ 8 , 13 , 1 4 , 1 6 , 1 9 , 2 0, 29 ] 1 . 5 V S
[ 31 ] V C OR E
B - 4 Intel Penryn (Socket-P) 2/2
Schematic Diagrams
Cantiga 1/6 - Host
U15A
R 213
100_1%_04
75_1%_04
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
R29
24.9_1%_04
16.9_1%_04
H_SWING
1.05VS
R2
12
221_1%_04
12mils
R213
C353
100_
1%_04
0.1U_10V_X
7R_04
F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
C5
E3
R29
H_SWING
H_RCOM
P
24.9_1
%_04
C12
E11
R2
19
H_
A#_3
H_
A#_4
H_
A#_5
H_
A#_6
H_
A#_7
H_
A#_8
H_
A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_CPURST#
H_CPUSLP#
1K_1%_04
A11
B11
12mils
H_ADS#
H_
ADST
B#_0
H_
ADST
B#_1
H_BNR#
H_BPRI #
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20
H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_A#[ 35: 3
]
[2]
CPU_BSEL[2:0] (FSB) D AEFULT SETTING
CPU_BSEL2 CPU_BSEL1 CPU_BSEL0
266
200
L
L
L
H
L
L
166
L
H
H
1.05VS
R208
*56_04
[2,18] CPU_BSEL0
H_ADS# [2]
H_ADSTB#0 [2]
H_ADSTB#1 [2]
H_BNR# [2]
H_BPRI# [2]
H_BREQ# [2]
H_DEFER# [2]
H_DBSY# [2]
CLK_MCH_BCLK [18
]
CLK_MCH_BCLK# [ 1
8]
H_DPWR# [ 2
]
H_DRDY# [2]
H_HI T
# [2]
H_HI T
M# [2]
H_LO
CK# [2]
H_TRDY# [2]
CLK_BSEL0 [2,18]
R202
R203
1K_04
1K_0
4
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_
DSTBP#_0
H_
DSTBP#_1
H_
DSTBP#_2
H_
DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
J8
L3
Y13
Y1
L10
M7
AA5
AE6
L9
M8
AA6
AE5
B15
K13
F13
B13
B14
B6
F12
C8
H_DI NV#0
H_DI NV#1
H_DI NV#2
H_DI NV#3
MCH_BSEL0 [ 5
]
R206
1K_0
4
[2]
[2]
[2]
[2]
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
[2]
[2]
[2]
[2]
H_REQ
#0
H_REQ
#1
H_REQ
#2
H_REQ
#3
H_REQ
#4
CLK_BSEL1 [2,18]
R207
[2]
[2]
[2]
[2]
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
Sheet 4 of 40
Cantiga 1/6 - Host
1.05VS
[2,18] CPU_BSEL1
H_RS#_0
H_RS#_1
H_RS#_2
H_VREF
[2] H_CPURST#
[2] H_CPUSLP#
1.05VS
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
1K_0
4
MCH_BSEL1 [ 5
]
1.05VS
R205
1K_0
4
[2]
[2]
[2]
[2]
[2]
[2,18] CPU_BSEL2
CLK_BSEL2 [2,18]
R204
1K_0
4
H_RS#0 [2]
H_RS#1 [2]
H_RS#2 [2]
MCH_BSEL2 [ 5
]
H_AVREF
H_DVREF
CANTIGA-EB8
8CTGM
R218
C366
C363
2K_1%_04
0.1U_10V_X
7R_04
0.1U_10V_X7R_04
[2,3,5,7,8,13,16
,2
9]
1.05VS
Cantiga 1/6 - Host B - 5
B.Schematic Diagrams
C PU
Dual Core
Quad Core
H_D#[63:0]
HOST
[2]
Schematic Diagrams
Cantiga 2/6 - VGA, CRT
1. 0 5 V M_ P E G
M C H _ C F G8
M C H _C F G1 2
M C H _C F G1 3
[9 ]
M C H _C F G1 6
[9 ]
[9 ]
M C H _C F G1 9
M C H _C F G2 0
[ 1 5] P M_ S Y N C #
[ 2 , 1 3, 3 1 ] H _D P R S T P #
M C H _ C F G1 7
M C H _ C F G1 8
R 55
R 2 16
R 30
R 32
R 60
P M_ S Y N C #
P M_ D P R S T P #
P M_ E X T _T S # _ 0
P M_ E X T _T S # _ 1
PW RO K
RS T IN #
T H E R MT R I P #
DP R S L P V R
K E _0
K E _1
K E _0
K E _1
S A _C
S A _C
S B _C
S B _C
S # _0
S # _1
S # _0
S # _1
S A _ O D T _0
S A _ O D T _1
S B _ O D T _0
S B _ O D T _1
S M _R C O MP
S M_ R C O MP #
S M_ R C OMP _ V O H
S M _R C O MP _ V OL
S M _V R E F
S M_ P W R OK
S M_ R E XT
S M_ D R A MR S T#
P E G_ C L K
P E G_ C LK #
D MI _ R
D MI _ R
D MI _ R
D MI _ R
XN
XN
XN
XN
_0
_1
_2
_3
D M I _R X P _0
D M I _R X P _1
D M I _R X P _2
D M I _R X P _3
D MI _ T XN _0
D MI _ T XN _1
D MI _ T XN _2
D MI _ T XN _3
D MI _ T X P _0
D MI _ T X P _1
D MI _ T X P _2
D MI _ T X P _3
M _C LK _D D R #0
M _C LK _D D R #1
M _C LK _D D R #2
M _C LK _D D R #3
B C 28
A Y 28
A Y 36
BB3 6
M
M
M
M
_C
_C
_C
_C
KE0
KE1
KE2
KE3
[1 0 ]
[1 0 ]
[1 1 ]
[1 1 ]
BA1 7
A Y 16
AV1 6
A R 13
M
M
M
M
_C
_C
_C
_C
S# 0
S# 1
S# 2
S# 3
[ 10 ]
[ 10 ]
[ 11 ]
[ 11 ]
B D 17
A Y 17
BF1 5
A Y 13
B G 22
B H 21
M _O D T 0
M _O D T 1
M _O D T 2
M _O D T 3
S M_ R C OMP
S M_ R C OMP #
BF2 8
B H 28
AV4 2
A R 36
BF1 7
B C 36
R2 2 6
R2 2 2
[1 2 ]
[1 0 ]
[1 0 ]
[1 1 ]
[1 1 ]
[1 0 ]
[1 0 ]
[1 1 ]
[1 1 ]
[ 12 ]
1. 8 V
1. 8 V
R 68
S M _V R E F
F43
E4 3
AE4 0
AE3 8
AE4 8
A H 40
AE3 5
AE4 3
AE4 6
A H 42
A D 35
AE4 4
AF4 6
A H 43
E NA V D D
[ 1 2 , 27 ]
[ 1 2 , 27 ]
[ 1 2 , 27 ]
LV D S -L 0N
LV D S -L 1N
LV D S -L 2N
[ 1 2 , 27 ]
[ 1 2 , 27 ]
[ 1 2 , 27 ]
LV D S -L 0P
LV D S -L 1P
LV D S -L 2P
H 47
E 46
G 40
A 40
LV D S _ L3 P
H 48
D 45
F 40
B 40
A 41
H 38
G 37
J 37
C1 3 1
R 69
0 . 1 U _ 10 V _ X 7R _0 4
1 0 K _ 1% _ 0 4
B 42
G 38
F 37
K 37
100MHz
D
D
D
D
MI _ T XN
MI _ T XN
MI _ T XN
MI _ T XN
0
1
2
3
D
D
D
D
MI _ T XP 0
MI _ T XP 1
MI _ T XP 2
MI _ T XP 3
D
D
D
D
MI _ R X N 0
MI _ R X N 1
MI _ R X N 2
MI _ R X N 3
[ 14 ]
[ 14 ]
[ 14 ]
[ 14 ]
D MI _ R X P 0
D MI _ R X P 1
D MI _ R X P 2
D MI _ R X P 3
[1 4 ]
[1 4 ]
[1 4 ]
[1 4 ]
14 ]
14 ]
14 ]
14 ]
R 42
R 43
R 44
7 5 _0 4
7 5 _0 4
7 5 _0 4
C 31
E 32
[ 1 2]
1. 0 5 V S
[1 2 ]
R 63
D A C_ B L UE
D A C _B L U E
D A C _ GR E E N
D A C _ GR E E N
[1 2 ]
D A C_ RE D
D A C_ RE D
C A N T I GA -E B 8 8 C T GM
B - 6 Cantiga 2/6 - VGA, CRT
GR AP HI CS V ID
ME
MI SC
A _ S Y NC
A _ SDO
A _ SDI
A _ RS T #
A _ BCL K
G
G
G
G
G
F X_ V I D
F X_ V I D
F X_ V I D
F X_ V I D
F X_ V I D
_0
_1
_2
_3
_4
G F X _V R _ E N
B3 3
B3 2
G 33
F33
E3 3
GF X _V
GF X _V
GF X _V
GF X _V
GF X _V
ID0
ID1
ID2
ID3
ID4
C 34
GF X _V R E N
C1 1 8
R 62
0 . 1U _1 0 V _ X7 R _0 4
5 1 1_ 1 % _0 4
[ 12 ]
D A C _V S Y N C
R5 3
R5 2
3 0 . 1_ 1 % _0 4
1 K _ 1% _ 0 4
R5 4
3 0 . 1_ 1 % _0 4
1 .8 V
A H 37
A H 36
A N 36
AJ 3 5
A H 34
DDP C _ CT RL CL K
DDP C _ CT RL DA T A
SDVO _ CT RL CL K
S DV O _ CT RL DA T A
C LK R E Q#
I CH_ S Y NC#
T S A T N#
B1 2
R 3 61
L _ V D D _E N
L V D S _I B G
L V D S _V B G
L V D S _V R E F H
L V D S _V R E F L
L V D S A _C L K #
L V D S A _C L K
L V D S B _C L K #
L V D S B _C L K
L VD
L VD
L VD
L VD
S A _D
S A _D
S A _D
S A _D
A T A #_ 0
A T A #_ 1
A T A #_ 2
A T A #_ 3
L VD
L VD
L VD
L VD
S A _D
S A _D
S A _D
S A _D
A T A _0
A T A _1
A T A _2
A T A _3
L V D S B _D A T A #_ 0
L V D S B _D A T A #_ 1
L V D S B _D A T A #_ 2
L V D S B _D A T A #_ 3
L V D S B _D A T A _0
L V D S B _D A T A _1
L V D S B _D A T A _2
L V D S B _D A T A _3
T VA _ DAC
T VB _ DAC
T V C _D A C
T V _ RT N
J 28
H 32
J 32
J 29
E 29
L 29
P E G_ R X # _ 0
P E G_ R X # _ 1
P E G_ R X # _ 2
P E G_ R X # _ 3
P E G_ R X # _ 4
P E G_ R X # _ 5
P E G_ R X # _ 6
P E G_ R X # _ 7
P E G_ R X # _ 8
P E G_ R X # _ 9
P E G _R X# _ 1 0
P E G _R X# _ 1 1
P E G _R X# _ 1 2
P E G _R X# _ 1 3
P E G _R X# _ 1 4
P E G _R X# _ 1 5
T V _ D C ON S E L_ 0
T V _ D C ON S E L_ 1
C R T _ B LU E
C R T _ GR E E N
C RT _ RE D
C RT _ IRT N
C
C
C
C
C
RT _ DDC _ CL K
RT _ DDC _ DA T A
RT _ HS Y N C
R T _ TV O _ I R E F
RT _ VSY N C
P E G_ R X _ 0
P E G_ R X _ 1
P E G_ R X _ 2
P E G_ R X _ 3
P E G_ R X _ 4
P E G_ R X _ 5
P E G_ R X _ 6
P E G_ R X _ 7
P E G_ R X _ 8
P E G_ R X _ 9
P E G_ R X _ 1 0
P E G_ R X _ 1 1
P E G_ R X _ 1 2
P E G_ R X _ 1 3
P E G_ R X _ 1 4
P E G_ R X _ 1 5
P E G_ TX # _ 0
P E G_ TX # _ 1
P E G_ TX # _ 2
P E G_ TX # _ 3
P E G_ TX # _ 4
P E G_ TX # _ 5
P E G_ TX # _ 6
P E G_ TX # _ 7
P E G_ TX # _ 8
P E G_ TX # _ 9
P E G_ T X# _ 1 0
P E G_ T X# _ 1 1
P E G_ T X# _ 1 2
P E G_ T X# _ 1 3
P E G_ T X# _ 1 4
P E G_ T X# _ 1 5
P E G _T X _ 0
P E G _T X _ 1
P E G _T X _ 2
P E G _T X _ 3
P E G _T X _ 4
P E G _T X _ 5
P E G _T X _ 6
P E G _T X _ 7
P E G _T X _ 8
P E G _T X _ 9
P E G_ TX _ 1 0
P E G_ TX _ 1 1
P E G_ TX _ 1 2
P E G_ TX _ 1 3
P E G_ TX _ 1 4
P E G_ TX _ 1 5
H4 4
J4 6
L4 4
L4 0
N4 1
P 48
N4 4
T4 3
U4 3
Y4 3
Y4 8
Y3 6
A A 43
AD3 7
AC4 7
AD3 9
H4 3
J4 4
L4 3
L4 1
N4 0
P 47
N4 3
T4 2
U4 2
Y4 2
W 47
Y3 7
A A 42
AD3 6
AC4 8
AD4 0
J4 1
M4 6
M4 7
M4 0
M4 2
R4 8
N3 8
T4 0
U3 7
U4 0
Y4 0
A A 46
A A 37
A A 40
AD4 3
AC4 6
J4 2
L4 6
M4 8
M3 9
M4 3
R4 7
N3 7
T3 9
U3 6
U3 9
Y3 9
Y4 6
A A 36
A A 39
AD4 2
AD4 6
3. 3V S
C L_ C L K 0 [ 1 5 ]
C L_ D A TA 0
[ 15 ]
C L_ P W R OK [ 12 , 1 5 , 17 , 2 6]
C L_ R S T# 0 [ 1 5 ]
CL _ V RE F
N 28
M 28
G 36
E3 6
K 3 6 M C H _ C L K R E Q#
H 36
L _ CT RL _ DA T A
L _ DD C_ CL K
L _ DD C_ DA T A
T3 7
T3 6
C A N T I G A -E B 8 8C TG M
R 23 2
S M_ R C OMP _ V O H
CL _ CL K
CL _ DA T A
C L_ P W R OK
C L_ R S T#
C L _V R E F
E 28
G 28
G 29
[ 12 ] D A C _ D D C A C L K
[ 12 ] D A C _ D D C A D A T A
[1 2 ] DAC _ HSY N C
C L _V R E F
1 K _ 1 %_ 0 4
C 3 99
C3 9 8
2 . 2 U _ 6 . 3V _0 6
0 . 01 U _1 6 V _X 7 R _ 0 4
R 23 0
3 . 0 1 K _1 % _ 04
H DA
HD
HD
HD
HD
HD
NC
A2 8
C2 9
B2 9
B3 0
B2 8
_1
_2
_3
_4
_5
_6
_7
_8
_9
_1 0
_1 1
_1 2
_1 3
_1 4
_1 5
_1 6
_1 7
_1 8
_1 9
_2 0
_2 1
_2 2
_2 3
_2 4
_2 5
_2 6
P E G_ C O MP I
P E G_ C OM P O
Zdiff= 100O? 5%
1 K _ 1% _ 0 4
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
F 25
H 25
K 25
H 24
12mils
B G4 8
BF4 8
B D4 8
B C4 8
B H4 7
B G4 7
BE4 7
B H4 6
BF4 6
B G4 5
B H4 4
B H4 3
BH6
BH5
B G4
BH3
BF 3
BH2
B G2
BE2
B G1
BF 1
BD1
BC1
F1
A4 7
49 . 9 _1 % _ 04
L _ B K L T_ C T R L
L _ B K L T_ E N
L _ CT RL _ CL K
100MHz
[ 1 4]
[ 1 4]
[ 1 4]
[ 1 4]
[
[
[
[
M 29
C 44
B 43
E 37
E 38
C 41
C 40
B 37
A 37
LV D S _ L3 N
96MHz
C L K _P C I E _ 3G P L L [ 1 8]
C L K _P C I E _ 3G P L L# [ 18 ]
AE4 1
AE3 7
AE4 7
A H 39
1 0 K _ 1% _ 0 4
12mils
C L K _D R E F
[ 1 8]
C L K _D R E F # [ 18 ]
C L K _D R E F S S [ 1 8]
C L K _D R E F S S #
[ 18 ]
R2 3 6
2 . 3 7 K _1 % _0 4
[ 1 2 , 27 ] L V D S -LC L K N
[ 12 , 2 7 ] L V D S -L C LK P
S M_ P W R O K
S M_ R E X T
B3 8
A3 8
E4 1
F41
M 33
K 33
J 33
[ 12 , 2 7 ] P _ D D C _ C L K
[ 12 , 2 7 ] P _ D D C _ D A T A
8 0 . 6 _1 % _0 4
8 0 . 6 _1 % _0 4
S M _ R C O MP _ V OH
S M _ R C O MP _ V OL
L 32
G 32
M 32
G M_ B L ON
VGA
*1 0m i l _s h or t
*1 0m i l _s h or t R 2 9
B7
N3 3
P3 2
A T4 0
1 0 0_ 0 4
A T1 1
*1 0m i l _s h or t T2 0
*1 0m i l _s h or t R 3 2
P M_ E X T TS _ E C #
P M_ E X T TS _ D D R #
SA_ C
SA_ C
SB_ C
SB_ C
DP L L _ RE F _ CL K
D P LL _ R E F _ C LK #
D P L L _R E F _ S S C L K
D P LL _ R E F _ S S C LK #
PM
[ 1 0 , 1 1] P M_ E X T TS _ D D R #
[ 1 7, 3 1 ] D E LA Y _ P W R G D
[ 1 4 , 1 9] P L T_ R S T#
[ 2, 13 , 2 8] P M_ T H R MT R I P #
[ 1 5 , 31 ] P M_ D P R S LP V R
M C H _ C F G1 1
M C H _ C F G1 4
M C H _ C F G1 5
K # _0
K # _1
K # _0
K # _1
[ 10 ]
[ 10 ]
[ 11 ]
[ 11 ]
TV
[9 ]
[9 ]
_0
_1
_2
_3
_4
_5
_6
_7
_8
_9
_ 10
_ 11
_ 12
_ 13
_ 14
_ 15
_ 16
_ 17
_ 18
_ 19
_ 20
S A _C
S A _C
S B _C
S B _C
M _C LK _D D R 0
M _C LK _D D R 1
M _C LK _D D R 2
M _C LK _D D R 3
A R 24
A R 21
A U 24
AV2 0
GRAPHICS
MC H _ C F G 5
MC H _ C F G 6
MC H _ C F G 7
[ 9] MC H _ C F G 9
[ 9 ] M C H _C F G1 0
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
CF G
K _0
K _1
K _0
K _1
R 64
PCI-EXPRESS
[ 9]
[ 9]
[ 9]
M C H _ C F G3
M C H _ C F G4
T2 5
R2 5
P2 5
P2 0
P2 4
C2 5
N2 4
M2 4
E2 1
C2 3
C2 4
N2 1
P2 1
T2 1
R2 0
M2 0
L2 1
H2 1
P2 9
R2 8
T2 8
22
23
24
25
CL K
Sheet 5 of 40
Cantiga 2/6 VGA, CRT
M CH_ B S E L 0
M CH_ B S E L 1
M CH_ B S E L 2
RS V D
RS V D
RS V D
RS V D
DM I
[4 ]
[4 ]
[4 ]
RS V D 2 0
C FG
B.Schematic Diagrams
B G2 3
BF2 3
B H1 8
BF1 8
RS V D 1 5
RS V D 1 6
RS V D 1 7
SA_ C
SA_ C
SB_ C
SB_ C
U 1 5C
AP2 4
AT2 1
AV2 4
A U 20
LVDS
AY2 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
R SV D
B3 1
B2
M1
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
RS V D
DDR CLK/ CONTROL/COMPENSATION
U 15 B
M3 6
N3 6
R3 3
T3 3
AH9
A H1 0
A H1 2
A H1 3
K1 2
A L3 4
AK3 4
A N3 5
A M3 5
T2 4
S M_ R C OM P _V OL
M C H _ C LK R E Q# [ 1 8 ]
M CH_ IC H_ S Y N C# [1 5 ]
5 6 _0 4
1 . 05 V S
C 3 92
C3 9 5
R 22 9
2 . 2 U _ 6 . 3V _0 6
0 . 01 U _1 6 V _X 7 R _ 0 4
1 K _ 1 %_ 0 4
[ 8 ] 1 . 05 V M _P E G
[ 8 . . 1 6, 1 8 . . 2 7, 3 1 ] 3 . 3 V S
[ 2 . . 4 , 7, 8 , 1 3 , 16 , 2 9] 1 . 05 V S
[ 7 , 8, 10 , 1 1, 3 0 ] 1 . 8 V
MC H _ C L K R E Q#
P M_ E X T TS _ E C #
P M_ E X T TS _ D D R #
R6 5
R5 8
R5 9
10 K _ 04
10 K _ 04
10 K _ 04
D A C _ B LU E
D A C _ GR E E N
DA C _ RE D
R4 9
R4 7
R4 8
15 0 _1 % _ 04
15 0 _1 % _ 04
15 0 _1 % _ 04
S M_ R E XT
S M_ P W R OK
R2 2 1
R6 1
49 9 _1 % _ 04
*1 0 m li _ sh o rt
Schematic Diagrams
Cantiga 3/6 - DDR
S A _D
S A _D
S A _D
S A _D
S A _D
S A _D
S A _D
S A _D
M_ 0
M_ 1
M_ 2
M_ 3
M_ 4
M_ 5
M_ 6
M_ 7
S A _D
S A _D
S A _D
S A _D
S A _D
S A _D
S A _D
S A _D
QS _ 0
QS _ 1
QS _ 2
QS _ 3
QS _ 4
QS _ 5
QS _ 6
QS _ 7
S A_ DQ
S A_ DQ
S A_ DQ
S A_ DQ
S A_ DQ
S A_ DQ
S A_ DQ
S A_ DQ
S #_ 0
S #_ 1
S #_ 2
S #_ 3
S #_ 4
S #_ 5
S #_ 6
S #_ 7
S A _ MA _ 0
S A _ MA _ 1
S A _ MA _ 2
S A _ MA _ 3
S A _ MA _ 4
S A _ MA _ 5
S A _ MA _ 6
S A _ MA _ 7
S A _ MA _ 8
S A _ MA _ 9
S A _ M A _1 0
S A _ M A _1 1
S A _ M A _1 2
S A _ M A _1 3
S A _ M A _1 4
M_ A B S 0
M_ A B S 1
M_ A B S 2
BB2 0
BD2 0
AY2 0
M_ A _ R A S #
M_ A _ C A S #
M_ A _ W E #
A M3 7
A T 41
AY4 1
AU3 9
BB1 2
AY6
AT 7
AJ 5
M_ A _ D M0
M_ A _ D M1
M_ A _ D M2
M_ A _ D M3
M_ A _ D M4
M_ A _ D M5
M_ A _ D M6
M_ A _ D M7
A J 44
A T 44
BA4 3
BC3 7
AW 1 2
BC8
AU8
A M7
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
0
1
2
3
4
5
6
7
A J 43
A T 43
BA4 4
BD3 7
AY1 2
BD8
AU9
A M8
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
M_ A _ D QS
#0
#1
#2
#3
#4
#5
#6
#7
BA2 1
BC2 4
B G2 4
BH2 4
B G2 5
BA2 4
BD2 4
B G2 7
BF 2 5
AW 2 4
BC2 1
B G2 6
BH2 6
BH1 7
AY2 5
M_ A _ A 0
M_ A _ A 1
M_ A _ A 2
M_ A _ A 3
M_ A _ A 4
M_ A _ A 5
M_ A _ A 6
M_ A _ A 7
M_ A _ A 8
M_ A _ A 9
M_ A _ A 10
M_ A _ A 11
M_ A _ A 12
M_ A _ A 13
M_ A _ A 14
M _ ABS0
M _ ABS1
M _ ABS2
M_ B _ D Q [ 63 : 0 ]
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
[ 1 0]
[ 1 0]
[ 1 0]
M _ A _R A S # [ 1 0 ]
M _ A _C A S # [ 1 0 ]
M _ A _W E # [ 10 ]
M _A _D M[ 7 : 0 ]
[1 0 ]
M _A _D QS [ 7 : 0 ]
[1 0 ]
M _A _D QS # [ 7 : 0]
M _A _A [ 1 4 : 0 ]
[ 1 0]
[1 0 ]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
AK4 7
A H4 6
AP4 7
AP4 6
AJ 4 6
AJ 4 8
A M4 8
AP4 8
A U4 7
A U4 6
BA4 8
AY4 8
AT4 7
A R4 7
BA4 7
B C4 7
B C4 6
B C4 4
B G4 3
BF4 3
BE4 5
B C4 1
BF4 0
BF4 1
B G3 8
BF3 8
B H3 5
B G3 5
B H4 0
B G3 9
B G3 4
B H3 4
B H1 4
B G1 2
B H1 1
BG 8
B H1 2
BF1 1
BF8
BG 7
BC 5
BC 6
AY 3
AY 1
BF6
BF5
BA1
BD 3
AV2
AU 3
AR 3
AN 2
AY 2
AV1
AP3
AR 1
AL 1
AL 2
AJ 1
AH 1
AM 2
AM 3
AH 3
AJ 3
C A N T I GA -E B 8 8 C T GM
H14
? ?
? ?
6-34-M52NS-020
6-34-M52GS-020
H16,H26,H18
S B _R A S #
S B _C A S #
SB_ W E#
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
S B _D
? ?
6-36-12181-20E
H 26
C 23 7 D 8 7
H1 6
C 2 1 7D 8 7
M2
M-MA R K 1
M6
M-M A R K 1
H1
1
M TH 31 5 D 1 1 1
9
8
7
6
2
3
4
5
H1 0
1
M TH 3 15 D 1 1 1
9
8
7
6
2
H1 2
4
1
3
5
M TH 3 15 D 1 1 1 B
QS _ 0
QS _ 1
QS _ 2
QS _ 3
QS _ 4
QS _ 5
QS _ 6
QS _ 7
#_ 0
#_ 1
#_ 2
#_ 3
#_ 4
#_ 5
#_ 6
#_ 7
S B _ MA _ 0
S B _ MA _ 1
S B _ MA _ 2
S B _ MA _ 3
S B _ MA _ 4
S B _ MA _ 5
S B _ MA _ 6
S B _ MA _ 7
S B _ MA _ 8
S B _ MA _ 9
S B _ MA _1 0
S B _ MA _1 1
S B _ MA _1 2
S B _ MA _1 3
S B _ MA _1 4
B C1 6
BB1 7
BB3 3
M_ B B S 0
M_ B B S 1
M_ B B S 2
A U1 7
B G1 6
BF1 4
M_ B _ R A S #
M_ B _ C A S #
M_ B _ W E #
A M4 7
AY4 7
B D4 0
BF3 5
B G1 1
BA3
AP1
AK2
M_ B _ D M0
M_ B _ D M1
M_ B _ D M2
M_ B _ D M3
M_ B _ D M4
M_ B _ D M5
M_ B _ D M6
M_ B _ D M7
A L 47
AV4 8
B G4 1
B G3 7
B H9
BB2
A U1
A N6
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
0
1
2
3
4
5
6
7
A L 46
AV4 7
B H4 1
B H3 7
B G9
B C2
AT2
A N5
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
M_ B _ D QS
#0
#1
#2
#3
#4
#5
#6
#7
AV1 7
BA2 5
B C2 5
A U2 5
AW 2 5
BB2 8
A U2 8
AW 2 8
A T 33
B D3 3
BB1 6
AW 3 3
AY3 3
B H1 5
A U3 3
M_ B _ A 0
M_ B _ A 1
M_ B _ A 2
M_ B _ A 3
M_ B _ A 4
M_ B _ A 5
M_ B _ A 6
M_ B _ A 7
M_ B _ A 8
M_ B _ A 9
M_ B _ A 10
M_ B _ A 11
M_ B _ A 12
M_ B _ A 13
M_ B _ A 14
M3
M-M A R K 1
M4
M -MA R K 1
M9
M-MA R K 1
M _B B S 0
M _B B S 1
M _B B S 2
[ 1 1]
[ 1 1]
[ 1 1]
M _B _R A S # [ 1 1]
M _B _C A S # [ 1 1]
M _B _W E #
[ 11 ]
M _B _D M[ 7 : 0 ]
[1 1 ]
M _B _D QS [ 7 : 0 ]
[1 1 ]
M _B _D QS # [ 7 : 0]
M _B _A [ 1 4 : 0 ]
Sheet 6 of 40
Cantiga 3/6 -DDR
[ 1 1]
[1 1 ]
M8
M-M A R K 1
M H1
H 4_ 0
? ?
6-34-D90C0-021
02/26
H 18
C 2 17 D 8 7
H 29
C 2 37 D 1 4 6
M7
M -MA R K 1
M5
M-MA R K 1
M1
M-M A R K 1
M1 0
M-M A R K 1
M 11
M -MA R K 1
M1 4
M-MA R K 1
2
3
4
5
H 22
9
2
1
H 13
4
2
1
6
MT H 3 1 5D 11 1 A
3
H 15
4
1
5
MT H 3 1 5D 11 1 B
3
5
MT H 3 1 5D 11 1 B
2
3
4
5
H 9
1
M T H 3 15 D 11 1
9
8
7
6
2
3
4
5
H 19
H2 0
O 4 0X 1 0 2D 40 X 1 02 O4 0 X 10 2 D 4 0 X1 0 2
H 21
1
M T H 3 15 D 11 1
9
8
7
6
2
3
4
5
H 17
1
9
8
7
6
MT H 31 5 D 1 1 1-3 _ 4
2
3
4
5
H2
1
MT H 3 1 5 D 1 11
9
8
7
6
2
3
4
5
MH 2
H 4 _0
MH 3
H4 _ 0
MH 4
H4 _ 0
H5
C4 4 D4 4
H 6
C 44 D 4 4
H2 8
C 2 3 7D 9 1
H 8
C 44 D 4 4
M1 3
M-M A R K 1
S1
S MD 8 0 X 80
1
2
3
4
5
M_ 0
M_ 1
M_ 2
M_ 3
M_ 4
M_ 5
M_ 6
M_ 7
S B _ D QS
S B _ D QS
S B _ D QS
S B _ D QS
S B _ D QS
S B _ D QS
S B _ D QS
S B _ D QS
1
H1 4
C 2 1 7D 11 1
SB_ BS_ 0
SB_ BS_ 1
SB_ BS_ 2
H29
For M720T
H 24
H 25
H 27
C 35 5 B 2 64 D 1 8 6 C 35 5 B 2 64 D 18 6 C 3 55 B 2 6 4D 18 6
S B _ D Q_ 0
S B _ D Q_ 1
S B _ D Q_ 2
S B _ D Q_ 3
S B _ D Q_ 4
S B _ D Q_ 5
S B _ D Q_ 6
S B _ D Q_ 7
S B _ D Q_ 8
S B _ D Q_ 9
S B _ D Q_ 1 0
S B _ D Q_ 1 1
S B _ D Q_ 1 2
S B _ D Q_ 1 3
S B _ D Q_ 1 4
S B _ D Q_ 1 5
S B _ D Q_ 1 6
S B _ D Q_ 1 7
S B _ D Q_ 1 8
S B _ D Q_ 1 9
S B _ D Q_ 2 0
S B _ D Q_ 2 1
S B _ D Q_ 2 2
S B _ D Q_ 2 3
S B _ D Q_ 2 4
S B _ D Q_ 2 5
S B _ D Q_ 2 6
S B _ D Q_ 2 7
S B _ D Q_ 2 8
S B _ D Q_ 2 9
S B _ D Q_ 3 0
S B _ D Q_ 3 1
S B _ D Q_ 3 2
S B _ D Q_ 3 3
S B _ D Q_ 3 4
S B _ D Q_ 3 5
S B _ D Q_ 3 6
S B _ D Q_ 3 7
S B _ D Q_ 3 8
S B _ D Q_ 3 9
S B _ D Q_ 4 0
S B _ D Q_ 4 1
S B _ D Q_ 4 2
S B _ D Q_ 4 3
S B _ D Q_ 4 4
S B _ D Q_ 4 5
S B _ D Q_ 4 6
S B _ D Q_ 4 7
S B _ D Q_ 4 8
S B _ D Q_ 4 9
S B _ D Q_ 5 0
S B _ D Q_ 5 1
S B _ D Q_ 5 2
S B _ D Q_ 5 3
S B _ D Q_ 5 4
S B _ D Q_ 5 5
S B _ D Q_ 5 6
S B _ D Q_ 5 7
S B _ D Q_ 5 8
S B _ D Q_ 5 9
S B _ D Q_ 6 0
S B _ D Q_ 6 1
S B _ D Q_ 6 2
S B _ D Q_ 6 3
C A N T I GA -E B 8 8 C T GM
M 12
M -MA R K 1
H24,H25,H27
U1 5 E
B
S A _R A S #
S A _C A S #
SA_ W E#
[ 1 1]
BD2 1
B G1 8
A T 25
MEMORY
SA_ BS_ 0
SA_ BS_ 1
SA_ BS_ 2
SYSTEM
S A _ D Q_ 0
S A _ D Q_ 1
S A _ D Q_ 2
S A _ D Q_ 3
S A _ D Q_ 4
S A _ D Q_ 5
S A _ D Q_ 6
S A _ D Q_ 7
S A _ D Q_ 8
S A _ D Q_ 9
S A _ D Q_ 1 0
S A _ D Q_ 1 1
S A _ D Q_ 1 2
S A _ D Q_ 1 3
S A _ D Q_ 1 4
S A _ D Q_ 1 5
S A _ D Q_ 1 6
S A _ D Q_ 1 7
S A _ D Q_ 1 8
S A _ D Q_ 1 9
S A _ D Q_ 2 0
S A _ D Q_ 2 1
S A _ D Q_ 2 2
S A _ D Q_ 2 3
S A _ D Q_ 2 4
S A _ D Q_ 2 5
S A _ D Q_ 2 6
S A _ D Q_ 2 7
S A _ D Q_ 2 8
S A _ D Q_ 2 9
S A _ D Q_ 3 0
S A _ D Q_ 3 1
S A _ D Q_ 3 2
S A _ D Q_ 3 3
S A _ D Q_ 3 4
S A _ D Q_ 3 5
S A _ D Q_ 3 6
S A _ D Q_ 3 7
S A _ D Q_ 3 8
S A _ D Q_ 3 9
S A _ D Q_ 4 0
S A _ D Q_ 4 1
S A _ D Q_ 4 2
S A _ D Q_ 4 3
S A _ D Q_ 4 4
S A _ D Q_ 4 5
S A _ D Q_ 4 6
S A _ D Q_ 4 7
S A _ D Q_ 4 8
S A _ D Q_ 4 9
S A _ D Q_ 5 0
S A _ D Q_ 5 1
S A _ D Q_ 5 2
S A _ D Q_ 5 3
S A _ D Q_ 5 4
S A _ D Q_ 5 5
S A _ D Q_ 5 6
S A _ D Q_ 5 7
S A _ D Q_ 5 8
S A _ D Q_ 5 9
S A _ D Q_ 6 0
S A _ D Q_ 6 1
S A _ D Q_ 6 2
S A _ D Q_ 6 3
DDR
U1 5 D
A
AJ 3 8
AJ 4 1
AN3 8
A M3 8
AJ 3 6
AJ 4 0
A M4 4
A M4 2
AN4 3
AN4 4
AU4 0
AT 3 8
AN4 1
AN3 9
AU4 4
AU4 2
AV3 9
AY4 4
BA4 0
BD4 3
AV4 1
AY4 3
BB4 1
BC4 0
AY3 7
BD3 8
AV3 7
AT 3 6
AY3 8
BB3 8
AV3 6
AW 3 6
BD1 3
AU1 1
BC1 1
BA1 2
AU1 3
AV1 3
BD1 2
BC1 2
BB9
BA9
AU1 0
AV9
BA1 1
B D9
A Y8
BA6
AV5
AV7
AT9
A N8
A U5
A U6
AT5
AN1 0
A M1 1
A M5
AJ 9
AJ 8
AN1 2
A M1 3
AJ 1 1
AJ 1 2
MEMORY
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
H7
C4 4 D4 4
H 3
C 44 D 4 4
H 4
C 4 4D 44
H2 3
C 2 37 D 91
H1 1
1
6
M TH 5 _5 D 2 _ 8
Cantiga 3/6 - DDR B - 7
B.Schematic Diagrams
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
SYSTEM
M_ A _ D Q [ 63 : 0 ]
DDR
[ 1 0]
Schematic Diagrams
Cantiga 4/6 - Power
1.05VS
U1
5F
VCC_SM_4
0
VCC_SM_4
2
VCC_
SM
_36/NC
VCC_
SM
_37/NC
_38/NC
VCC_
SM
VCC_
SM
_39/NC
VCC_
SM
_40/NC
VCC_
SM
_41/NC
VCC_
SM
_42/NC
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
VCC_AXG_
SENSE
VSS_AXG_SENSE
AJ14
AH14
VCC_
AXG
_1
VCC_
AXG
_2
VCC_
AXG
_3
VCC_
AXG
_4
VCC_
AXG
_5
VCC_
AXG
_6
VCC_
AXG
_7
VCC_
AXG
_8
VCC_
AXG
_9
VCC_
AXG
_10
VCC_
AXG
_11
VCC_
AXG
_12
VCC_
AXG
_13
VCC_
AXG
_14
VCC_
AXG
_15
VCC_
AXG
_16
VCC_
AXG
_17
VCC_
AXG
_18
VCC_
AXG
_19
VCC_
AXG
_20
VCC_
AXG
_21
VCC_
AXG
_22
VCC_
AXG
_23
VCC_
AXG
_24
VCC_
AXG
_25
VCC_
AXG
_26
VCC_
AXG
_27
VCC_
AXG
_28
VCC_
AXG
_29
VCC_
AXG
_30
VCC_
AXG
_31
VCC_
AXG
_32
VCC_
AXG
_33
VCC_
AXG
_34
VCC_
AXG
_35
VCC_
AXG
_36
VCC_
AXG
_37
VCC_
AXG
_38
VCC_
AXG
_39
VCC_
AXG
_40
VCC_
AXG
_41
VCC_
AXG
_42
VCC GFX NCTF
1.05VS
8.7A
CLOSE TO GMCH
1.05
VS
3A
C11
2
C94
C85
C117
C420
10U_6.3V_X5R_0
8
0
.1
U_10V_X7R_04
0.1U_
10V_X7R_04
0.1U_10V_X7R_04
*22
0U_4V_D
AE3
3
AC3
3
AA3
3
Y3
3
W3
3
V3
3
U3
3
AH2
8
AF2
8
AC2
8
AA2
8
AJ2
6
AG2
6
AE2
6
AC2
6
AH2
5
AG2
5
AF2
5
AG2
4
AJ2
3
AH2
3
AF2
3
1.05
VS
C76
C78
C59
C68
0.47U_10V_04
1
U_6.3V_04
10U_6.3V_X5R_08
*330U_2.5V_D3
C77
C60
C62
C69
10U_6.3V_X5R_0
8
0
.1
U_10V_X7R_04
0.1U_
10V_X7R_04
1U_6.3V_X5R_06
AG3
4
AC3
4
AB3
4
AA3
4
Y3
4
V3
4
U3
4
AM3
3
AK3
3
AJ3
3
AG3
3
AF3
3
1.05
VS
T3
2
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
1
.8
V
C40
7
C405
C40
6
C409
0.01U_16V_X7R_
04
1
0U_6.3V_X5R_08
10U_6.3V_X5R_08
15
0U_4V_B2
All trace width are 10mils
VCC_
AXG
_SENSE
VSS_AXG
_SENSE
CANTIG
A-EB88CT
GM
B - 8 Cantiga 4/6 - Power
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM2
1
AL21
AK21
W21
V21
U21
AM2
0
AK20
W20
U20
AM1
9
AL19
AK19
AJ19
AH1
9
AG1
9
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM1
7
AK17
AH1
7
AG1
7
AF17
AE17
AC1
7
AB17
Y17
W17
V17
AM1
6
AL16
AK16
AJ16
AH1
6
AG1
6
AF16
AE16
AC1
6
AB16
AA16
Y16
W16
V16
U16
VCC_SM_36
C113
*0.1U_
10V_X7R_04
VCC_SM_37
C73
*0.1U_
10V_X7R_04
VCC_SM_38
C65
*0.1U_
10V_X7R_04
VCC_SM_40
C63
*0.1U_
10V_X7R_04
VCC_SM_42
C64
*0.1U_
10V_X7R_04
All trace width are 10mils
VCC_SM
_LF1
VCC_SM
_LF2
VCC_SM
_LF3
VCC_SM
_LF4
VCC_SM
_LF5
VCC_SM
_LF6
VCC_SM
_LF7
AV44
BA37
AM4
0
AV21
AY5
AM1
0
BB13
SM_L
F1
SM_L
F2
SM_L
F3
SM_L
F4
SM_L
F5
SM_L
F6
SM_L
F7
C140
C114
C127
C72
C52
C56
C58
1.05VS
VCC NCTF
BA36
BB24
BD16
BB21
AW16
AW13
AT13
VCC_AX
G_NCTF_1
VCC_AX
G_NCTF_2
VCC_AX
G_NCTF_3
VCC_AX
G_NCTF_4
VCC_AX
G_NCTF_5
VCC_AX
G_NCTF_6
G_NCTF_7
VCC_AX
VCC_AX
G_NCTF_8
VCC_AX
G_NCTF_9
VCC_
AXG
_NCTF_10
VCC_
AXG
_NCTF_11
VCC_
AXG
_NCTF_12
VCC_
AXG
_NCTF_13
VCC_
AXG
_NCTF_14
VCC_
AXG
_NCTF_15
VCC_
AXG
_NCTF_16
VCC_
AXG
_NCTF_17
VCC_
AXG
_NCTF_18
VCC_
AXG
_NCTF_19
VCC_
AXG
_NCTF_20
VCC_
AXG
_NCTF_21
VCC_
AXG
_NCTF_22
VCC_
AXG
_NCTF_23
VCC_
AXG
_NCTF_24
VCC_
AXG
_NCTF_25
VCC_
AXG
_NCTF_26
VCC_
AXG
_NCTF_27
VCC_
AXG
_NCTF_28
VCC_
AXG
_NCTF_29
VCC_
AXG
_NCTF_30
VCC_
AXG
_NCTF_31
VCC_
AXG
_NCTF_32
VCC_
AXG
_NCTF_33
VCC_
AXG
_NCTF_34
VCC_
AXG
_NCTF_35
VCC_
AXG
_NCTF_36
VCC_
AXG
_NCTF_37
VCC_
AXG
_NCTF_38
VCC_
AXG
_NCTF_39
VCC_
AXG
_NCTF_40
VCC_
AXG
_NCTF_41
VCC_
AXG
_NCTF_42
VCC_
AXG
_NCTF_43
VCC_
AXG
_NCTF_44
VCC_
AXG
_NCTF_45
VCC_
AXG
_NCTF_46
VCC_
AXG
_NCTF_47
VCC_
AXG
_NCTF_48
VCC_
AXG
_NCTF_49
VCC_
AXG
_NCTF_50
VCC_
AXG
_NCTF_51
VCC_
AXG
_NCTF_52
VCC_
AXG
_NCTF_53
VCC_
AXG
_NCTF_54
VCC_
AXG
_NCTF_55
VCC_
AXG
_NCTF_56
VCC_
AXG
_NCTF_57
VCC_
AXG
_NCTF_58
VCC_
AXG
_NCTF_59
VCC_
AXG
_NCTF_60
VCC SM LF
VCC_SM_3
6
VCC_SM_3
7
VCC_SM_3
8
VCC SM
Sheet 7 of 40
Cantiga 4/6 - Power
VCC GFX
B.Schematic Diagrams
3A
POWER
1
.0
5VS
VCC_
SM
_1
VCC_
SM
_2
VCC_
SM
_3
VCC_
SM
_4
VCC_
SM
_5
VCC_
SM
_6
VCC_
SM
_7
VCC_
SM
_8
VCC_
SM
_9
VCC_
SM
_10
VCC_
SM
_11
VCC_
SM
_12
VCC_
SM
_13
VCC_
SM
_14
VCC_
SM
_15
VCC_
SM
_16
VCC_
SM
_17
VCC_
SM
_18
VCC_
SM
_19
VCC_
SM
_20
VCC_
SM
_21
VCC_
SM
_22
VCC_
SM
_23
VCC_
SM
_24
VCC_
SM
_25
VCC_
SM
_26
VCC_
SM
_27
VCC_
SM
_28
VCC_
SM
_29
VCC_
SM
_30
VCC_
SM
_31
VCC_
SM
_32
VCC_
SM
_33
VCC_
SM
_34
VCC_
SM
_35
VCC CORE
U15G
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
POWER
1.8V
1U_6.3V_X5
R_06
1U_6.3V_X5
R_06
0.47U_1
0V_
04
0.22U_1
0V_
04
0.22U_1
0V_
04
0.1U_10
V_X
7R_04
0.1U_10
V_X
7R_04
CANTIGA-EB88CTGM
[5,8,10,11,30] 1.8V
[2..5,8,13,16,29] 1.05
VS
VCC_NCT
F_1
VCC_NCT
F_2
VCC_NCT
F_3
VCC_NCT
F_4
VCC_NCT
F_5
VCC_NCT
F_6
VCC_NCT
F_7
VCC_NCT
F_8
VCC_NCT
F_9
VCC_
NCTF_10
VCC_
NCTF_11
VCC_
NCTF_12
VCC_
NCTF_13
VCC_
NCTF_14
VCC_
NCTF_15
VCC_
NCTF_16
VCC_
NCTF_17
VCC_
NCTF_18
VCC_
NCTF_19
VCC_
NCTF_20
VCC_
NCTF_21
VCC_
NCTF_22
VCC_
NCTF_23
VCC_
NCTF_24
VCC_
NCTF_25
VCC_
NCTF_26
VCC_
NCTF_27
VCC_
NCTF_28
VCC_
NCTF_29
VCC_
NCTF_30
VCC_
NCTF_31
VCC_
NCTF_32
VCC_
NCTF_33
VCC_
NCTF_34
VCC_
NCTF_35
VCC_
NCTF_36
VCC_
NCTF_37
VCC_
NCTF_38
VCC_
NCTF_39
VCC_
NCTF_40
VCC_
NCTF_41
VCC_
NCTF_42
VCC_
NCTF_43
VCC_
NCTF_44
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y3
2
W32
U3
2
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y3
0
W30
V30
U3
0
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y2
9
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
Schematic Diagrams
Cantiga 5/6 - Power
1. 0 5 V S
10mils
3 . 3V S _A T V D A C
H C B 10 0 5K F -12 1 T 20
1 . 0 5V M_ D P L L A
C 61 6
C3 9 4
C 39 3
4 . 7 U _ 6 . 3V _ X 5 R _ 0 6
0. 1U _1 0 V _ X7 R _ 0 4
0 . 0 1U _ 16 V _ X7 R _0 4
C 41 7
C4 1 5
10 U _6 . 3 V _ X5 R _ 0 8
10mils
0 . 1 U _ 10 V _ X 7R _ 04
C 61 7
C3 8 9
C 39 0
4 . 7 U _ 6 . 3V _ X 5 R _ 0 6
0. 1U _1 0 V _ X7 R _ 0 4
0 . 0 1U _ 16 V _ X7 R _0 4
U 1 5H
B 27
A 26
A 25
B 25
V C C A _ C R T_ D A C _ 1
V C C A _ C R T_ D A C _ 2
C RT
L2 7
V C C A _ D A C _B G
V S S A _ D A C_ B G
1 . 0 5V S
AE1
1 . 0 5V M _ MP L L
1. 8 V _ T XL V D S
C1 4 3
J 48
J 47
V C CA _ DP L L B
V C CA _ HP L L
V C C A _ MP L L
V C CA _ L V DS
V S SA _ L V DS
10 0 0 P _5 0 V _ X7 R _0 4
1 . 0 5V S
10mils
1 .5 V S
L2 4
C4 2 4
H C B 10 0 5K F -12 1 T 20
0. 1U _1 0 V _ X7 R _ 0 4
10mils
A A 48
1 . 0 5V M_ H P L L
C3 3 8
C 34 7
10 U _6 . 3 V _ X5 R _ 0 8
0 . 1 U _ 10 V _ X 7R _ 04
1. 0 5 V M_ P E G P LL
50mils
1. 0 5 V S
1 . 0 5V S
C6 0 6
C6 0 7
1U _ 6. 3 V _ 0 4
C6 6
1U _ 6. 3 V _ 0 4
1U _ 6. 3 V _ X 5R _0 6
A R 20
A P 20
A N 20
A R 17
A P 17
A N 17
A T 16
A R 16
A P 16
V C C A _ P E G_ B G
V C C A _ P E G_ P L L
VC
VC
VC
VC
VC
VC
VC
VC
VC
C A _ S M_ 1
C A _ S M_ 2
C A _ S M_ 3
C A _ S M_ 4
C A _ S M_ 5
C A _ S M_ 6
C A _ S M_ 7
C A _ S M_ 8
C A _ S M_ 9
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
C A _ S M_ C K
0. 1U _1 0 V _ X7 R _ 0 4
3. 3 V S _ A T V D A C
L71
H C B 10 0 5 K F -12 1 T 20
10mils
3 . 3V S
C3 8 1
C3 8 0
0. 1U _1 0 V _ X7 R _ 0 4
0. 01 U _ 1 6 V _X 7 R _ 0 4
1. 5V S
0. 1 U _1 0 V _ X7 R _ 0 4
0 . 0 1U _1 6 V _ X7 R _0 4
1 . 5V S
C3 9 7
C3 9 6
0. 1U _1 0 V _ X7 R _ 0 4
0. 01 U _ 1 6 V _X 7 R _ 0 4
10mils
12mils
10mils
1 . 5V S _ Q D A C
1. 0 5 V S
1. 0 5 V M_ P E G P LL
02/12
Remove R360
1 0U _ 6. 3 V _ X 5R _0 8
C4 2 6
0 . 1U _ 10 V _ X 7R _0 4
C4 2 5
0 . 1U _ 10 V _ X 7R _0 4
L 28
AF1
A A 47
V C C_ HD A
V C CD_ T V DA C
V C CD_ Q DA C
V C C D _ H P LL
V C C D _ P E G _P LL
V C CD_ L V DS _ 1
V C CD_ L V DS _ 2
C A N T I GA -E B 88 C TG M
1 . 8 V _ LV D S
1 . 8V
R 3 93
C 3 51
C5 5
C5 7
C3 5 2
C 54
C 3 49
*0 . 1U _ 10 V _ X7 R _0 4
0 . 1U _ 10 V _ X 7R _0 4
0 . 1U _ 10 V _ X 7R _0 4
*0 . 1 U _ 1 0V _ X 7 R _ 04
0 . 1 U _ 1 0V _X 7 R _ 0 4
0 . 1 U _ 1 0V _X 7 R _ 0 4
B2 2
B2 1
A2 1
R2 2 0
0 _0 4
BF
BH
BG
BF
21
20
20
20
K4 7
C 35
B3 5
A3 5
Sheet 8 of 40
Cantiga 5/6 - Power
1 . 0 5V S
C 3 76
C 3 72
1U _6 . 3 V _ X5 R _0 6
*1 0U _6 . 3 V _ X5 R _0 8
L 26
H C B 1 00 5 K F -1 21 T 2 0
12mils
1 .8 V
C 3 83
C3 8 4
0. 1 U _ 1 0 V _X 7 R _ 0 4
1 0U _ 6. 3 V _ X 5R _0 8
L9
H C B 1 00 5 K F -1 21 T 2 0
10mils
1 .8 V
C 1 38
C1 3 3
10 0 0P _ 5 0 V _X 7 R _ 0 4
1 0U _ 6. 3 V _ X 5R _0 8
12mils
R 2 35
C 6 35
1 0 _0 6
C
D 17
R B 5 5 1V -3 0
A
1 .0 5 V S
Close to U15
0. 1 U _ 1 0 V _X 7 R _ 0 4
V C C A _ T V _D A C _ 1
V C C A _ T V _D A C _ 2
0. 1U _1 0 V _ X7 R _ 0 4
H C B 1 0 0 5K F -1 2 1 T2 0
C4 3 1
M 25
M 38
L 37
C3 4 5
1 . 0 5V S
* 10 U _6 . 3 V _ X5 R _ 0 8
1 . 05 V M_ P E G
A 32
02/12
10mils
C 82
V C C _H V _ 1
V C C _H V _ 2
V C C _H V _ 3
L28
H C B 16 0 8 K F -1 21 T 25
1.8A
V CC
V CC
V CC
V CC
V CC
_P E G
_P E G
_P E G
_P E G
_P E G
_1
_2
_3
_4
_5
V C C_ DM I_ 1
V C C_ DM I_ 2
V C C_ DM I_ 3
V C C_ DM I_ 4
VT TL F
10mils
*1 0 m li _ sh o rt
02/12
1 . 5 V S _ QD A C
C8 3
C 3 41
1 0 U _ 6 . 3V _X 5 R _ 0 8
V C C_ HD A
PE G
R3 6 3
H C B 10 0 5K F -12 1 T 20
B 24
A 24
C 3 40
2 . 2U _ 6. 3 V _ 0 6
3. 3 V S
DM I
L7
* 0 _0 4
CT F _ 1
CT F _ 2
CT F _ 3
CT F _ 4
CT F _ 5
CT F _ 6
CT F _ 7
CT F _ 8
H DA
R3 6 2
C3 4 3
1 U _ 6 . 3V _ 0 4
1 . 8 V _T X L V D S
V C C _ T X_ L V D S
HV
1U _ 6. 3 V _ 0 4
02/12
_1
_2
_3
_4
_5
_N
_N
_N
_N
_N
_N
_N
_N
A CK
C8 1
C3 5 0
1 U _ 6 . 3V _ X 5 R _ 06
TV
C6 0 8
A P 28
A N 28
A P 25
A N 25
A N 24
A M 28
A M 26
A M 25
A L 25
A M 24
A L 24
A M 23
A L 23
DT V/ CRT
0 . 1 U _ 10 V _ X 7R _ 04
1. 0 5 V S
L VD S
10 U _6 . 3 V _ X5 R _ 0 8
L2 9
V C C _ S M _C K _ 1
V C C _ S M _C K _ 2
V C C _ S M _C K _ 3
V C C _ S M _C K _ 4
30mils
1 . 0 5V M_ MP L L
C3 4 2
*1 U _ 6. 3V _ X 5R _ 06
1 . 0 5V M _ A XF
V C C_ A X F _ 1
V C C_ A X F _ 2
V C C_ A X F _ 3
POWER
H C B 10 0 5K F -12 1 T 20
C 34 6
1. 0 5 V S
C 3 44
1 . 8 V _ S MC K
L2 3
C3 3 9
1A
20mils
A SM
A D 48
V TT
V C CA _ DP L L A
U 13
T13
U 12
T12
U 11
T11
U 10
T10
U 9
T9
U 8
T8
U 7
T7
U 6
T6
U 5
T5
V3
U 3
V2
U 2
T2
V1
U 1
V T T LF 1
V T T LF 2
V T T LF 3
V4 8
U 48
V4 7
U 47
U 46
AH
AF
AH
AG
48
48
47
47
1 .0 5 V S
C 4 27
C4 2 8
C 4 33
0. 1 U _ 1 0 V _X 7 R _ 0 4
0 . 1U _ 10 V _ X 7R _0 4
1 0 U _ 6 . 3V _X 5 R _ 0 8
1 . 05 V M_ D MI
L72
0 _0 4 02
0.5A
A8
L1
AB 2
C 4 32
C4 2 3
C 4 22
10 U _ 6 . 3 V _X 5 R _ 0 8
0 . 1U _ 10 V _ X 7R _0 4
0 . 1 U _ 1 0V _X 7 R _ 0 4
D03BCN? ? 0 OHM
Within 10mils
C 3 61
C4 8
C 3 48
0. 47 U _ 1 0 V _0 4
0. 47 U _ 1 0 V _0 4
0. 47 U _ 1 0 V _0 4
10mils
0 _ 04
C1 0 9
1U _ 6. 3 V _ 0 4
[ 5 ] 1. 0 5 V M_ P E G
[ 5, 7 , 1 0 , 11 , 3 0 ] 1 . 8 V
[ 3 , 13 , 1 4 , 16 , 1 9 , 20 , 2 9 ] 1 . 5V S
[ 5 , 9 . . 16 , 1 8 . . 27 , 3 1 ] 3 . 3V S
[ 2 . . 5 , 7 , 13 , 1 6 , 29 ] 1. 0 5 V S
Cantiga 5/6 - Power B - 9
B.Schematic Diagrams
10mils
0 . 1 U _ 10 V _ X 7R _ 04
L 48
A D1
AX F
1 . 0 5V M_ D P L L B
C 42 9
C4 3 0
10 U _6 . 3 V _ X5 R _ 0 8
10mils
12mils
1 . 0 5V M _ H P L L
SM CK
10mils
1 . 0 5V M _D P L LB
H C B 10 0 5K F -12 1 T 20
P LL
1 . 0 5 V M_ D P L L A
L3 0
F 47
A P EG A L VD S
10mils
VTT_ 1
VTT_ 2
VTT_ 3
VTT_ 4
VTT_ 5
VTT_ 6
VTT_ 7
VTT_ 8
VTT_ 9
V TT _ 1 0
V TT _ 1 1
V TT _ 1 2
V TT _ 1 3
V TT _ 1 4
V TT _ 1 5
V TT _ 1 6
V TT _ 1 7
V TT _ 1 8
V TT _ 1 9
V TT _ 2 0
V TT _ 2 1
V TT _ 2 2
V TT _ 2 3
V TT _ 2 4
V TT _ 2 5
Schematic Diagrams
Cantiga 6/6 - GND
U1 5 J
A M3 6
AE3 6
P3 6
L 36
J 36
F36
B3 6
A H3 5
AA3 5
Y3 5
U3 5
T 35
BF3 4
A M3 4
A J 34
AF3 4
AE3 4
W34
B3 4
A3 4
B G3 3
B C3 3
BA3 3
AV3 3
A R3 3
A L 33
A H3 3
AB3 3
P3 3
L 33
H3 3
N3 2
K3 2
F32
C3 2
A3 1
A N2 9
T 29
N2 9
K2 9
H2 9
F29
A2 9
B G2 8
B D2 8
BA2 8
AV2 8
A T 28
A R2 8
A J 28
A G2 8
AE2 8
AB2 8
Y2 8
P2 8
K2 8
H2 8
F28
C2 8
BF2 6
A H2 6
AF2 6
AB2 6
AA2 6
C2 6
B2 6
B H2 5
B D2 5
BB2 5
AV2 5
A R2 5
A J 25
A C2 5
Y2 5
N2 5
L 25
J 25
G2 5
E2 5
BF2 4
A D1 2
AY2 4
A T 24
A J 24
A H2 4
AF2 4
AB2 4
R2 4
L 24
K2 4
J 24
G2 4
F24
E2 4
B H2 3
A G2 3
Y2 3
B2 3
A2 3
AJ 6
BG 2 1
L12
AW 2 1
AU 2 1
AP2 1
AN 2 1
AH 2 1
AF 2 1
AB2 1
R 21
M 21
J21
G 21
BC 2 0
BA2 0
AW 2 0
AT 2 0
AJ 2 0
AG 2 0
Y 20
N 20
K2 0
F20
C 20
A2 0
BG 1 9
A1 8
BG 1 7
BC 1 7
AW 1 7
AT 1 7
R 17
M 17
H 17
C 17
BA1 6
AU 1 6
AN 1 6
N 16
K1 6
G 16
E1 6
BG 1 5
AC 1 5
W15
A1 5
BG 1 4
AA1 4
C 14
BG 1 3
BC 1 3
BA1 3
AN 1 3
AJ 1 3
AE1 3
N 13
L13
G 13
E1 3
BF 1 2
AV1 2
AT 1 2
AM 1 2
AA1 2
J12
A1 2
BD 1 1
BB1 1
AY 1 1
AN 1 1
AH 1 1
Y 11
N 11
G 11
C 11
BG 1 0
AV1 0
AT 1 0
AJ 1 0
AE1 0
AA1 0
M 10
BF 9
BC 9
AN 9
AM 9
AD 9
G 9
B 9
BH 8
BB 8
AV 8
AT8
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
S _1 9 9
S _2 0 0
S _2 0 1
S _2 0 2
S _2 0 3
S _2 0 4
S _2 0 5
S _2 0 6
S _2 0 7
S _2 0 8
S _2 0 9
S _2 1 0
S _2 1 1
S _2 1 2
S _2 1 3
S _2 1 4
S _2 1 5
S _2 1 6
S _2 1 7
S _2 1 8
S _2 1 9
S _2 2 0
S _2 2 1
S _2 2 2
S _2 2 3
S _2 2 4
S _2 2 5
S _2 2 6
S _2 2 7
S _2 2 8
S _2 2 9
S _2 3 0
S _2 3 1
S _2 3 2
S _2 3 3
DMI X2 Select
VSS
V S S _2 3 5
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
S _2 3 7
S _2 3 8
S _2 3 9
S _2 4 0
S _2 4 1
S _2 4 2
S _2 4 3
S _2 4 4
S _2 4 5
S _2 4 6
S _2 4 7
S _2 4 8
S _2 4 9
S _2 5 0
S _2 5 1
S _2 5 2
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
S _2 5 5
S _2 5 6
S _2 5 7
S _2 5 8
S _2 5 9
S _2 6 0
S _2 6 1
S _2 6 2
S _2 6 3
S _2 6 4
S _2 6 5
S _2 6 6
S _2 6 7
S _2 6 8
S _2 6 9
S _2 7 0
S _2 7 1
S _2 7 2
S _2 7 3
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
S _2 7 5
S _2 7 6
S _2 7 7
S _2 7 8
S _2 7 9
S _2 8 0
S _2 8 1
S _2 8 2
S _2 8 3
S _2 8 4
S _2 8 5
S _2 8 6
S _2 8 7
S _2 8 8
S _2 8 9
S _2 9 0
S _2 9 1
S _2 9 2
S _2 9 3
S _2 9 4
S _2 9 5
S _2 9 6
VS S NCT F
VSS
V S S _ 10 0
V S S _ 10 1
V S S _ 10 2
V S S _ 10 3
V S S _ 10 4
V S S _ 10 5
V S S _ 10 6
V S S _ 10 7
V S S _ 10 8
V S S _ 10 9
V S S _ 11 0
V S S _ 11 1
V S S _ 11 2
V S S _ 11 3
V S S _ 11 4
V S S _ 11 5
V S S _ 11 6
V S S _ 11 7
V S S _ 11 8
V S S _ 11 9
V S S _ 12 0
V S S _ 12 1
V S S _ 12 2
V S S _ 12 3
V S S _ 12 4
V S S _ 12 5
V S S _ 12 6
V S S _ 12 7
V S S _ 12 8
V S S _ 12 9
V S S _ 13 0
V S S _ 13 1
V S S _ 13 2
V S S _ 13 3
V S S _ 13 4
V S S _ 13 5
V S S _ 13 6
V S S _ 13 7
V S S _ 13 8
V S S _ 13 9
V S S _ 14 0
V S S _ 14 1
V S S _ 14 2
V S S _ 14 3
V S S _ 14 4
V S S _ 14 5
V S S _ 14 6
V S S _ 14 7
V S S _ 14 8
V S S _ 14 9
V S S _ 15 0
V S S _ 15 1
V S S _ 15 2
V S S _ 15 3
V S S _ 15 4
V S S _ 15 5
V S S _ 15 6
V S S _ 15 7
V S S _ 15 8
V S S _ 15 9
V S S _ 16 0
V S S _ 16 1
V S S _ 16 2
V S S _ 16 3
V S S _ 16 4
V S S _ 16 5
V S S _ 16 6
V S S _ 16 7
V S S _ 16 8
V S S _ 16 9
V S S _ 17 0
V S S _ 17 1
V S S _ 17 2
V S S _ 17 3
V S S _ 17 4
V S S _ 17 5
V S S _ 17 6
V S S _ 17 7
V S S _ 17 8
V S S _ 17 9
V S S _ 18 0
V S S _ 18 1
V S S _ 18 2
V S S _ 18 3
V S S _ 18 4
V S S _ 18 5
V S S _ 18 6
V S S _ 18 7
V S S _ 18 8
V S S _ 18 9
V S S _ 19 0
V S S _ 19 1
V S S _ 19 2
V S S _ 19 3
V S S _ 19 4
V S S _ 19 5
V S S _ 19 6
V S S _ 19 7
V S S _ 19 8
V S S _ 19 9
V SS S CB
Sheet 9 of 40
Cantiga 6/6 - GND
VSS_ 1
VSS_ 2
VSS_ 3
VSS_ 4
VSS_ 5
VSS_ 6
VSS_ 7
VSS_ 8
VSS_ 9
VSS_ 1 0
VSS_ 1 1
VSS_ 1 2
VSS_ 1 3
VSS_ 1 4
VSS_ 1 5
VSS_ 1 6
VSS_ 1 7
VSS_ 1 8
VSS_ 1 9
VSS_ 2 0
VSS_ 2 1
VSS_ 2 2
VSS_ 2 3
VSS_ 2 4
VSS_ 2 5
VSS_ 2 6
VSS_ 2 7
VSS_ 2 8
VSS_ 2 9
VSS_ 3 0
VSS_ 3 1
VSS_ 3 2
VSS_ 3 3
VSS_ 3 4
VSS_ 3 5
VSS_ 3 6
VSS_ 3 7
VSS_ 3 8
VSS_ 3 9
VSS_ 4 0
VSS_ 4 1
VSS_ 4 2
VSS_ 4 3
VSS_ 4 4
VSS_ 4 5
VSS_ 4 6
VSS_ 4 7
VSS_ 4 8
VSS_ 4 9
VSS_ 5 0
VSS_ 5 1
VSS_ 5 2
VSS_ 5 3
VSS_ 5 4
VSS_ 5 5
VSS_ 5 6
VSS_ 5 7
VSS_ 5 8
VSS_ 5 9
VSS_ 6 0
VSS_ 6 1
VSS_ 6 2
VSS_ 6 3
VSS_ 6 4
VSS_ 6 5
VSS_ 6 6
VSS_ 6 7
VSS_ 6 8
VSS_ 6 9
VSS_ 7 0
VSS_ 7 1
VSS_ 7 2
VSS_ 7 3
VSS_ 7 4
VSS_ 7 5
VSS_ 7 6
VSS_ 7 7
VSS_ 7 8
VSS_ 7 9
VSS_ 8 0
VSS_ 8 1
VSS_ 8 2
VSS_ 8 3
VSS_ 8 4
VSS_ 8 5
VSS_ 8 6
VSS_ 8 7
VSS_ 8 8
VSS_ 8 9
VSS_ 9 0
VSS_ 9 1
VSS_ 9 2
VSS_ 9 3
VSS_ 9 4
VSS_ 9 5
VSS_ 9 6
VSS_ 9 7
VSS_ 9 8
VSS_ 9 9
NC
B.Schematic Diagrams
U 1 5I
A U 48
A R 48
A L 48
B B 47
A W 47
A N 47
A J 47
A F 47
A D 47
A B 47
Y 47
T 47
N 47
L 47
G 47
B D 46
B A 46
A Y 46
A V 46
A R 46
A M 46
V 46
R 46
P 46
H 46
F 46
B F 44
A H 44
A D 44
A A 44
Y 44
U 44
T 44
M 44
F 44
B C 43
A V 43
A U 43
A M 43
J 43
C 43
B G 42
A Y 42
A T 42
A N 42
A J 42
A E 42
N 42
L 42
B D 41
A U 41
A M 41
A H 41
A D 41
A A 41
Y 41
U 41
T 41
M 41
G 41
B 41
B G 40
B B 40
A V 40
A N 40
H 40
E 40
A T 39
A M 39
A J 39
A E 39
N 39
L 39
B 39
B H 38
B C 38
B A 38
A U 38
A H 38
A D 38
A A 38
Y 38
U 38
T 38
J 38
F 38
C 38
B F 37
B B 37
A W 37
A T 37
A N 37
A J 37
H 37
C 37
B G 36
B D 36
A K 15
A U 36
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
S _2 9 7
S _2 9 8
S _2 9 9
S _3 0 0
S _3 0 1
S _3 0 2
S _3 0 3
S _3 0 4
S _3 0 5
S _3 0 6
S _3 0 7
S _3 0 8
S _3 0 9
S _3 1 0
S _3 1 1
S _3 1 2
S _3 1 3
S _3 1 4
S _3 1 5
S _3 1 6
S _3 1 7
S _3 1 8
S _3 1 9
S _3 2 0
S _3 2 1
S _3 2 2
S _3 2 3
S _3 2 4
S _3 2 5
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
S _3 2 7
S _3 2 8
S _3 2 9
S _3 3 0
S _3 3 1
S _3 3 2
S _3 3 3
S _3 3 4
S _3 3 5
S _3 3 6
S _3 3 7
S _3 3 8
S _3 3 9
S _3 4 0
S _3 4 1
S _3 4 2
S _3 4 3
S _3 4 4
S _3 4 5
S _3 4 6
S _3 4 7
S _3 4 8
S _3 4 9
S _3 5 0
VS
VS
VS
VS
S _3 5 1
S _3 5 2
S _3 5 3
S _3 5 4
V S S _N C T F _ 1
V S S _N C T F _ 2
V S S _N C T F _ 3
V S S _N C T F _ 4
V S S _N C T F _ 5
V S S _N C T F _ 6
V S S _N C T F _ 7
V S S _N C T F _ 8
V S S _N C T F _ 9
V S S _ N C TF _ 1 0
V S S _ N C TF _ 1 1
V S S _ N C TF _ 1 2
V S S _ N C TF _ 1 3
V S S _ N C TF _ 1 4
V S S _ N C TF _ 1 5
V S S _ N C TF _ 1 6
V S S _S
V S S _S
V S S _S
V S S _S
V S S _S
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
CB _ 1
CB _ 2
CB _ 3
CB _ 4
CB _ 5
C_ 2 6
C_ 2 7
C_ 2 8
C_ 2 9
C_ 3 0
C_ 3 1
C_ 3 2
C_ 3 3
C_ 3 4
C_ 3 5
C_ 3 6
C_ 3 7
C_ 3 8
C_ 3 9
C_ 4 0
C_ 4 1
C_ 4 2
A H8
Y8
L8
E8
B8
AY7
A U7
A N7
A J7
AE7
AA7
N7
J7
B G6
B D6
AV6
A T6
A M6
M6
C6
BA5
A H5
A D5
Y5
L5
J5
H5
F5
BE4
R2 2 8
R3 9
B H4 8
B H1
A 48
C1
A3
[5 ]
LOW : DMI=2
2 . 2 K _ 1% _ 0 4
iTPM Host Interface
MC H _ C F G 6
[5 ]
LOW : Enable
Default
Intel Management Engine Crypto Strap
R4 0
* 2. 2 K _ 1 %_ 0 4
MC H _ C F G 7
LOW : ATM Firmware use TLS cipher
suite with no
confidentiality
HIGH: ATM Firmware use TLS cipher
suite with confidentiality
[5 ]
Default
PCIE Graphics Lane
R3 7
* 2. 2 K _ 1 %_ 0 4
MC H _ C F G 9
[5 ]
LOW : Reverse Lane
Default
HIGH: Normal operation
R3 6
* 2. 2 K _ 1 %_ 0 4
PCIE Loopback Enable
MC H _ C F G 1 0
[ 5]
LOW : Enable
HIGH: Disable
MCH_CFG13
R3 1
R3 4
R3 8
R4 6
R4 1
R5 6
* 2. 2 K _ 1 %_ 0 4
* 2. 2 K _ 1 %_ 0 4
MC H _ C F G 1 2
MC H _ C F G 1 3
[ 5]
[ 5]
* 1 0m i _l s h ort
* 1 0m i _l s h ort
* 1 0m i _l s h ort
* 1 0m i _l s h ort
* 2. 2 K _ 1 %_ 0 4
MCH_CFG12
Default
Configuration
LOW
LOW
Reserved
HIGH
LOW
XOR Mode Enable
LOW
HIGH
All-Z Mode Enable
HIGH
HIGH
Nomal Operation
MC H _ C F G 1 6
[ 5]
LOW : Disable
HIGH: Enable
3 .3 VS
R5 0
* 4. 0 2 K _ 1% _ 0 4
Default
FSB Dynamic ODT
Default
DMI Lane Reversal
MC H _ C F G 1 9
[ 5]
LOW : Normal
Default
HIGH: Lanes Reversed
Digital Display Port
R5 1
* 4. 0 2 K _ 1% _ 0 4
MC H _ C F G 2 0
LOW : Only Digital Display Port
(SDVO/DP/iHDMI) or PCIE
is operational
[ 5]
HIGH: Digital Display Port
(SDVO/DP/iHDMI) and PCIE
are operational simultaneously
via PEG port
E1
D2
C3
B4
A5
A6
A 43
A 44
B 45
C4 6
D4 7
B 47
A 46
F 48
E 48
C4 8
B 48
C A N T I G A -E B 8 8C TG M
C A N TI G A -E B 8 8C T GM
[ 5, 8 , 1 0 . . 16 , 1 8. . 27 , 3 1]
B - 10 Cantiga 6/6 - GND
Default
HIGH: Disable
R3 3
A F 32
A B 32
V 32
A J3 0
A M2 9
A F 29
A B 29
U2 6
U2 3
A L2 0
V 20
A C1 9
A L1 7
A J1 7
A A 17
U1 7
MC H _ C F G 5
HIGH: DMI=4
B C3
AV3
A L3
R3
P3
F3
BA2
AW 2
A U2
A R2
AP2
A J2
A H2
AF2
AE2
A D2
A C2
Y2
M2
K2
A M1
AA1
P1
H1
U2 4
U2 8
U2 5
U2 9
* 2. 2 K _ 1 %_ 0 4
3 . 3V S
Default
Schematic Diagrams
DDRII CHANNEL A
SO-DIMM 1
JDIMM_1 Terminator
[6 ]
M_ A _ A [ 1 4: 0 ]
M_ A B S 2
[ 6 ] M_ A B S 0
[ 6 ] M_ A B S 1
[ 5 ] M_ C S #0
[ 5 ] M_ C S #1
[ 5 ] M _C LK _ D D R 0
[ 5] M_ C L K _ D D R # 0
[ 5 ] M _C LK _ D D R 1
[ 5] M_ C L K _ D D R # 1
[ 5 ] M_ C K E 0
[ 5 ] M_ C K E 1
[ 6 ] M_ A _ C A S #
[ 6 ] M_ A _ R A S #
[ 6 ] M _A _ W E #
R 28
R2 7
1 0 K _ 04
10 K _ 04
[ 1 1, 1 5 , 18 ]
[ 1 1, 1 5 , 18 ]
[ 6]
M _ ABS2
M _ ABS0
M _ ABS1
M _ CS # 0
M _ CS # 1
M _ CK E 0
M _ CK E 1
M _ A _C A S #
M _ A _R A S #
M _ A _W E #
S A 0_ D I M 0
S A 1_ D I M 0
I C H _ S MB C L K 0
I C H _ S MB D A T 0
[6 ]
[ 6]
_ A _A 0
_ A _A 1
_ A _A 2
_ A _A 3
_ A _A 4
_ A _A 5
_ A _A 6
_ A _A 7
_ A _A 8
_ A _A 9
_ A _A 1 0
_ A _A 1 1
_ A _A 1 2
_ A _A 1 3
_ A _A 1 4
[ 5 ] M_ O D T 0
[ 5 ] M_ O D T 1
M _A _ D M [ 7 : 0]
M_ A _ D QS [ 7 : 0 ]
M_ A _ D QS # [ 7 : 0 ]
1 02
1 01
1 00
99
98
97
94
92
93
91
1 05
90
89
1 16
86
84
85
1 07
1 06
1 10
1 15
30
32
1 64
1 66
79
80
1 13
1 08
1 09
1 98
2 00
1 97
1 95
M _ OD T 0
M _ OD T 1
1 14
1 19
M
M
M
M
M
M
M
M
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
M0
M1
M2
M3
M4
M5
M6
M7
10
26
52
67
1 30
1 47
1 70
1 85
M
M
M
M
M
M
M
M
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
QS 0
QS 1
QS 2
QS 3
QS 4
QS 5
QS 6
QS 7
13
31
51
70
1 31
1 48
1 69
1 88
M
M
M
M
M
M
M
M
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
_ A _D
QS # 0
QS # 1
QS # 2
QS # 3
QS # 4
QS # 5
QS # 6
QS # 7
11
29
49
68
1 29
1 46
1 67
1 86
J D I MM_ 1 A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A1 0 /AP
A1 1
A1 2
A1 3
A1 4
A1 5
A 1 6 _B A 2
BA0
BA1
S0 #
S1 #
C K0
C K 0#
C K1
C K 1#
C KE0
C KE1
C AS#
R AS#
W E#
SA0
SA1
SC L
SD A
O DT 0
O DT 1
D
D
D
D
D
D
D
D
M0
M1
M2
M3
M4
M5
M6
M7
D
D
D
D
D
D
D
D
QS 0
QS 1
QS 2
QS 3
QS 4
QS 5
QS 6
QS 7
D
D
D
D
D
D
D
D
QS 0 #
QS 1 #
QS 2 #
QS 3 #
QS 4 #
QS 5 #
QS 6 #
QS 7 #
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 8
DQ 9
DQ 1 0
DQ 1 1
DQ 1 2
DQ 1 3
DQ 1 4
DQ 1 5
DQ 1 6
DQ 1 7
DQ 1 8
DQ 1 9
DQ 2 0
DQ 2 1
DQ 2 2
DQ 2 3
DQ 2 4
DQ 2 5
DQ 2 6
DQ 2 7
DQ 2 8
DQ 2 9
DQ 3 0
DQ 3 1
DQ 3 2
DQ 3 3
DQ 3 4
DQ 3 5
DQ 3 6
DQ 3 7
DQ 3 8
DQ 3 9
DQ 4 0
DQ 4 1
DQ 4 2
DQ 4 3
DQ 4 4
DQ 4 5
DQ 4 6
DQ 4 7
DQ 4 8
DQ 4 9
DQ 5 0
DQ 5 1
DQ 5 2
DQ 5 3
DQ 5 4
DQ 5 5
DQ 5 6
DQ 5 7
DQ 5 8
DQ 5 9
DQ 6 0
DQ 6 1
DQ 6 2
DQ 6 3
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M_ A _D
M _A _ D Q [ 63 : 0 ]
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q1 0
Q1 1
Q1 2
Q1 3
Q1 4
Q1 5
Q1 6
Q1 7
Q1 8
Q1 9
Q2 0
Q2 1
Q2 2
Q2 3
Q2 4
Q2 5
Q2 6
Q2 7
Q2 8
Q2 9
Q3 0
Q3 1
Q3 2
Q3 3
Q3 4
Q3 5
Q3 6
Q3 7
Q3 8
Q3 9
Q4 0
Q4 1
Q4 2
Q4 3
Q4 4
Q4 5
Q4 6
Q4 7
Q4 8
Q4 9
Q5 0
Q5 1
Q5 2
Q5 3
Q5 4
Q5 5
Q5 6
Q5 7
Q5 8
Q5 9
Q6 0
Q6 1
Q6 2
Q6 3
[6 ]
0 .9 V S M
1 .8 V
J D I MM_ 1 B
1 12
1 11
1 17
96
95
1 18
81
82
87
1 03
88
1 04
20mils
VDD SPD
[ 5 , 1 1]
P M_ E X TT S _ D D R #
20mils
MV R E F _D I M0
C1 6 7
C 17 4
2 . 2U _6 . 3 V _ 06
0 . 1 U _ 10 V _ X 7R _0 4
1 99
83
1 20
50
69
1 63
1
2 01
2 02
47
1 33
1 83
77
12
48
1 84
78
71
72
1 21
1 22
1 96
1 93
8
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
V D DS P D
N
N
N
N
N
C1
C2
C3
C4
CT E S T
VR EF
G ND0
G ND1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS1 0
VSS1 1
VSS1 2
VSS1 3
VSS1 4
VSS1 5
V S S 16
V S S 17
V S S 18
V S S 19
V S S 20
V S S 21
V S S 22
V S S 23
V S S 24
V S S 25
V S S 26
V S S 27
V S S 28
V S S 29
V S S 30
V S S 31
V S S 32
V S S 33
V S S 34
V S S 35
V S S 36
V S S 37
V S S 38
V S S 39
V S S 40
V S S 41
V S S 42
V S S 43
V S S 44
V S S 45
V S S 46
V S S 47
V S S 48
V S S 49
V S S 50
V S S 51
V S S 52
V S S 53
V S S 54
V S S 55
V S S 56
V S S 57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
M_ A _ R A S #
M_ C S # 0
M_ OD T 0
M_ A _ A 1 3
1
2
3
4
8
7
6
5
R N 16
8 P 4R X5 6 _0 4
M_ A _ A 4
M_ A _ A 2
M_ A _ A 0
M_ A B S 1
1
2
3
4
8
7
6
5
R N 17
8 P 4R X5 6 _0 4
M_ C K E 1
M_ A _ A 1 1
M_ A _ A 7
M_ A _ A 6
1
2
3
4
8
7
6
5
R N 20
8 P 4R X5 6 _0 4
M_ C K E 0
M_ A _ A 1 4
M_ A B S 2
1
2
3
4
8
7
6
5
RN 7
8 P 4R X5 6 _0 4
M_ A _ A 9
M_ A _ A 8
M_ A _ A 1 2
M_ A _ A 5
1
2
3
4
8
7
6
5
RN 5
8 P 4R X5 6 _0 4
M_ A _ A 1
M_ A _ A 3
M_ A B S 0
M_ A _ A 1 0
1
2
3
4
8
7
6
5
RN 3
8 P 4R X5 6 _0 4
M_ A _ C A S #
M_ A _ W E #
M_ C S # 1
M_ OD T 1
1
2
3
4
8
7
6
5
RN 1
8 P 4R X5 6 _0 4
C1 0 3
0 . 1 U _ 10 V _ X7 R _0 4
C9 7
0 . 1 U _ 10 V _ X7 R _0 4
C1 4 7
0 . 1 U _ 10 V _ X7 R _0 4
C1 1 5
0 . 1 U _ 10 V _ X7 R _0 4
C1 0 1
0 . 1 U _ 10 V _ X7 R _0 4
C8 9
0 . 1 U _ 10 V _ X7 R _0 4
C1 2 9
0 . 1 U _ 10 V _ X7 R _0 4
C1 3 2
0 . 1 U _ 10 V _ X7 R _0 4
C1 2 5
0 . 1 U _ 10 V _ X7 R _0 4
C1 3 7
0 . 1 U _ 10 V _ X7 R _0 4
C1 4 2
0 . 1 U _ 10 V _ X7 R _0 4
C1 0 6
0 . 1 U _ 10 V _ X7 R _0 4
C9 3
0 . 1 U _ 10 V _ X7 R _0 4
C1 2 1
0 . 1 U _ 10 V _ X7 R _0 4
C9 8
0 . 1 U _ 10 V _ X7 R _0 4
C1 5 2
1 U _ 6 . 3V _ 0 4
C8 7
1 0 U _ 6. 3 V _ X5 R _0 8
Sheet 10 of 40
DDRII CHANNEL A
L a yo ut n o te :
Pl ac e o ne c ap clo se to ev ery 2 pu ll -u p resi sto rs
t ermin a te d to + VT T _M EM
A S 0A 4 2 1-N 2R N -4 F
CLOSE TO JDIMM_1
MV R E F _D I M0
R8 0
1 .8 V
1 K _ 1% _ 04
R8 1
C 1 76
C 1 73
1 K _1 % _0 4
1U _6 . 3 V _ 04
0. 1 U _ 1 0V _ X 7 R _ 04
A S 0A 4 2 1-N 2 R N -4 F
1 . 8V
CLOSE TO JDIMM_1
C1 6 1
C 38 2
C1 1 1
C1 3 5
C1 4 5
C1 3 9
C 1 49
*1 50 U _4 V _ B 2
22 0 U _ 4 V _D
1 U _ 6. 3 V _ 0 4
1 U _ 6. 3 V _ 0 4
1 U _ 6. 3 V _ 0 4
*0 . 2 2 U _ 16 V _ X7 R _0 6
* 0 . 22 U _ 1 6V _ X 7 R _ 06
3 . 3V S
A
1 .8 V
C1 6 3
C1 5 3
C1 3 0
C8 6
C1 0 0
C1 1 9
*1 50 U _4 V _ B 2
10 U _6 . 3 V _X 5 R _ 0 8
1 0U _6 . 3 V _ X5 R _ 0 8
1 0U _6 . 3 V _ X5 R _ 0 8
4 . 7U _6 . 3 V _ X5 R _ 0 6
4 . 7U _ 6. 3 V _ X5 R _ 0 6
C1 2 4
C1 3 6
C1 2 3
C9 1
C3 9 1
C9 0
C1 1 0
C 14 4
0. 1 U _1 0 V _X 7 R _ 0 4
0. 1U _1 0 V _X 7 R _ 0 4
0 . 1U _1 0 V _ X7 R _ 0 4
0 . 1U _1 0 V _ X7 R _ 0 4
0 . 1U _1 0 V _ X7 R _ 0 4
0 . 1U _ 10 V _ X7 R _ 0 4
0 . 1U _ 10 V _ X7 R _0 4
0 . 1 U _ 10 V _ X7 R _0 4
D8
VD DSPD
R B 5 5 1 V -30
C
0 . 9V S M
C4 6
C 47
C 1 54
C1 4 8
*2 . 2 U _ 6. 3 V _ 0 6
0 . 1 U _ 16 V _ 0 4
1 0 U _ 1 0V _ 0 8
10 U _1 0 V _0 8
1 .8 V
[1 1 ] V D DS P D
[ 11 , 3 0 ] 0 . 9V S M
[ 5, 7 , 8 , 11 , 3 0 ] 1 . 8V
[ 5 , 8 , 9, 1 1 . . 1 6, 1 8 . . 27 , 3 1 ] 3 . 3V S
DDRII CHANNEL A B - 11
B.Schematic Diagrams
[6 ]
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
Schematic Diagrams
DDRII CHANNEL B
SO-DIMM 2
La yo ut no te :
JDIMM_2 is placed farther
from the GMCH than JDIMM_1
B.Schematic Diagrams
[6 ]
M_ B _ A [ 1 4: 0 ]
[6 ]
Sheet 11 of 40
DDRII CHANNEL B
R 26
1 0 K _0 4
R 25
M_ B B S 2
[ 6 ] M_ B B S 0
[ 6 ] M_ B B S 1
[ 5 ] M_ C S #2
[ 5 ] M_ C S #3
[ 5 ] M _C LK _ D D R 2
[ 5] M_ C L K _ D D R # 2
[ 5 ] M _C LK _ D D R 3
[ 5] M_ C L K _ D D R # 3
[ 5 ] M_ C K E 2
[ 5 ] M_ C K E 3
[ 6 ] M_ B _ C A S #
[ 6 ] M_ B _ R A S #
[ 6 ] M _B _ W E #
[ 1 0, 1 5 , 18 ]
[ 1 0, 1 5 , 18 ]
JD I MM _2 A
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
_ B _A 0
_ B _A 1
_ B _A 2
_ B _A 3
_ B _A 4
_ B _A 5
_ B _A 6
_ B _A 7
_ B _A 8
_ B _A 9
_ B _A 1 0
_ B _A 1 1
_ B _A 1 2
_ B _A 1 3
_ B _A 1 4
M_ B B S 2
M_ B B S 0
M_ B B S 1
M_ C S # 2
M_ C S # 3
107
106
110
115
30
32
164
166
79
80
113
108
109
198
200
197
195
M_ C K E 2
M_ C K E 3
M_ B _C A S #
M_ B _R A S #
M_ B _W E #
S A 0_ D I M1
S A 1_ D I M1
I C H _ S MB C L K 0
I C H _ S MB D A T 0
[5 ]
[5 ]
1 0 K _0 4
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
3 .3 V S
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
[6 ]
M_ O D T 2
M_ O D T 3
M_ B _ D M
M_ B _ D M
M_ B _ D M
M_ B _ D M
M_ B _ D M
M_ B _ D M
M_ B _ D M
M_ B _ D M
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
0
1
2
3
4
5
6
7
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
M_ OD T 2
M_ OD T 3
114
119
M_ B _D
M_ B _D
M_ B _D
M_ B _D
M_ B _D
M_ B _D
M_ B _D
M_ B _D
10
26
52
67
130
147
170
185
M0
M1
M2
M3
M4
M5
M6
M7
13
31
51
70
131
148
169
188
S0
S1
S2
S3
S4
S5
S6
S7
11
29
49
68
129
146
167
186
S #0
S #1
S #2
S #3
S #4
S #5
S #6
S #7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0 /A P
A1 1
A1 2
A1 3
A1 4
A1 5
A1 6 _ BA2
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 8
DQ 9
D Q1 0
D Q1 1
D Q1 2
D Q1 3
D Q1 4
D Q1 5
D Q1 6
D Q1 7
D Q1 8
D Q1 9
D Q2 0
D Q2 1
D Q2 2
D Q2 3
D Q2 4
D Q2 5
D Q2 6
D Q2 7
D Q2 8
D Q2 9
D Q3 0
D Q3 1
D Q3 2
D Q3 3
D Q3 4
D Q3 5
D Q3 6
D Q3 7
D Q3 8
D Q3 9
D Q4 0
D Q4 1
D Q4 2
D Q4 3
D Q4 4
D Q4 5
D Q4 6
D Q4 7
D Q4 8
D Q4 9
D Q5 0
D Q5 1
D Q5 2
D Q5 3
D Q5 4
D Q5 5
D Q5 6
D Q5 7
D Q5 8
D Q5 9
D Q6 0
D Q6 1
D Q6 2
D Q6 3
BA0
BA1
S0 #
S1 #
C K0
C K0 #
C K1
C K1 #
C KE0
C KE1
C AS#
R AS#
W E#
SA0
SA1
SC L
SD A
O DT 0
O DT 1
D
D
D
D
D
D
D
D
M0
M1
M2
M3
M4
M5
M6
M7
D
D
D
D
D
D
D
D
QS 0
QS 1
QS 2
QS 3
QS 4
QS 5
QS 6
QS 7
D
D
D
D
D
D
D
D
QS 0 #
QS 1 #
QS 2 #
QS 3 #
QS 4 #
QS 5 #
QS 6 #
QS 7 #
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
12 3
12 5
13 5
13 7
12 4
12 6
13 4
13 6
14 1
14 3
15 1
15 3
14 0
14 2
15 2
15 4
15 7
15 9
17 3
17 5
15 8
16 0
17 4
17 6
17 9
18 1
18 9
19 1
18 0
18 2
19 2
19 4
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
_B _ D Q
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
M _B _ D Q[ 6 3: 0 ]
1. 8 V
11 2
11 1
11 7
96
95
11 8
81
82
87
10 3
88
10 4
20mils
19 9
V DD S P D
[ 5 , 10 ]
83
12 0
50
69
16 3
P M _ E XT T S _D D R #
20mils
1
M V RE F _ DIM 1
C 1 70
C1 7 9
2 . 2 U _ 6 . 3V _ 0 6
0. 1 U _1 0 V _X 7 R _ 0 4
20 1
20 2
47
13 3
18 3
77
12
48
18 4
78
71
72
12 1
12 2
19 6
19 3
8
J D I M M_ 2B
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
1
2
3
4
5
6
7
8
9
10
11
12
VDD SP D
NC1
NC2
NC3
NC4
NCT E S T
VREF
GN D 0
GN D 1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS1 0
VSS1 1
VSS1 2
VSS1 3
VSS1 4
VSS1 5
VSS1 6
VSS1 7
VSS1 8
VSS1 9
VSS2 0
VSS2 1
VSS2 2
VSS2 3
VSS2 4
VSS2 5
VSS2 6
VSS2 7
VSS2 8
VSS2 9
VSS3 0
VSS3 1
VSS3 2
VSS3 3
VSS3 4
VSS3 5
VSS3 6
VSS3 7
VSS3 8
VSS3 9
VSS4 0
VSS4 1
VSS4 2
VSS4 3
VSS4 4
VSS4 5
VSS4 6
VSS4 7
VSS4 8
VSS4 9
VSS5 0
VSS5 1
VSS5 2
VSS5 3
VSS5 4
VSS5 5
VSS5 6
VSS5 7
18
24
41
53
42
54
59
65
60
66
1 27
1 39
1 28
1 45
1 65
1 71
1 72
1 77
1 87
1 78
1 90
9
21
33
1 55
34
1 32
1 44
1 56
1 68
2
3
15
27
39
1 49
1 61
28
40
1 38
1 50
1 62
*2 2 0U _4 V _ D
C 1 22
C 1 62
C9 6
C 1 08
C1 0 4
C1 3 4
C1 2 0
C1 1 6
C1 2 6
10 U _ 6 . 3V _X 5 R _ 08
10 U _ 6 . 3 V _X 5 R _ 08
0. 1 U _ 1 0 V _X 7 R _ 0 4
0. 1 U _1 0 V _X 7 R _ 0 4
0. 1 U _1 0 V _X 7 R _ 0 4
0 . 1U _1 0 V _X 7 R _ 0 4
0 . 1U _1 0 V _ X7 R _ 0 4
4 . 7U _6 . 3 V _ X5 R _ 0 6
4 . 7U _ 6. 3 V _ X5 R _ 0 6
C 4 21
C9 9
C 1 02
C1 4 1
C1 2 8
C9 5
C1 5 0
C1 6 0
1U _6 . 3 V _ 04
1U _6 . 3 V _ 04
1U _6 . 3 V _ 04
0. 1 U _1 0 V _X 7 R _ 0 4
0 . 1U _1 0 V _X 7 R _ 0 4
0 . 1U _1 0 V _ X7 R _ 0 4
*0 . 2 2U _ 16 V _ X7 R _ 0 6
*0 . 2 2U _ 16 V _ X7 R _0 6
C1 5 6
*1 50 U _ 4 V _ B 2
[ 10 , 3 0 ] 0 . 9V S M
[1 0 ] V D DS P D
[ 5, 7 , 8 , 10 , 3 0 ] 1 . 8V
[ 5, 8 . . 1 0, 1 2 . . 1 6, 1 8 . . 27 , 3 1 ] 3 . 3V S
B - 12 DDRII CHANNEL B
8
7
6
5
R N 15
8 P 4R X5 6 _0 4
M_ B B S 0
M_ B _ A 1 0
M_ B _ A 1
M_ B _ A 3
1
2
3
4
8
7
6
5
R N 18
8 P 4R X5 6 _0 4
M_ B _ A 5
M_ B _ A 8
M_ B _ A 9
M_ B _ A 1 2
1
2
3
4
8
7
6
5
R N 19
8 P 4R X5 6 _0 4
M_ B _ R A S #
M_ C S # 2
M_ B _ A 1 3
M_ OD T 2
1
2
3
4
8
7
6
5
RN 2
8 P 4R X5 6 _0 4
M_ B _ A 4
M_ B _ A 2
M_ B _ A 0
M_ B B S 1
1
2
3
4
8
7
6
5
RN 4
8 P 4R X5 6 _0 4
M_ B _ A 1 1
M_ B _ A 1 4
M_ B _ A 6
M_ B _ A 7
1
2
3
4
8
7
6
5
RN 6
8 P 4R X5 6 _0 4
M_ C K E 3
M_ B B S 2
1
2
3
4
8
7
6
5
RN 8
8 P 4R X5 6 _0 4
M_ C K E 2
R2 3 7
5 6 _ 04
0 .9 V S M
C4 0 8
0 . 1 U _ 10 V _ X7 R _0 4
C4 1 2
0 . 1 U _ 10 V _ X7 R _0 4
C4 1 1
0 . 1 U _ 10 V _ X7 R _0 4
C4 0 2
0 . 1 U _ 10 V _ X7 R _0 4
C4 0 4
0 . 1 U _ 10 V _ X7 R _0 4
C4 1 8
0 . 1 U _ 10 V _ X7 R _0 4
C4 0 3
0 . 1 U _ 10 V _ X7 R _0 4
C4 1 6
0 . 1 U _ 10 V _ X7 R _0 4
C4 0 0
0 . 1 U _ 10 V _ X7 R _0 4
C4 1 4
0 . 1 U _ 10 V _ X7 R _0 4
C4 1 9
0 . 1 U _ 10 V _ X7 R _0 4
C1 0 7
0 . 1 U _ 10 V _ X7 R _0 4
C1 0 5
0 . 1 U _ 10 V _ X7 R _0 4
C4 1 3
0 . 1 U _ 10 V _ X7 R _0 4
C1 5 1
0 . 1 U _ 10 V _ X7 R _0 4
C4 1 0
1 U _ 6 . 3V _ 0 4
C3 6 9
*1 0 U _ 6 . 3V _ X 5 R _ 08
Pla ce o n e ca p cl o se to e ve ry 2 p u ll- up re sist ors
te rmin at e d to + VT T_ MEM
CLOSE TO JDIMM_2
M V RE F _ DIM 1
1 .8 V
C 92
1
2
3
4
La y ou t no t e:
1 .8 V
1 .8 V
*1 5 0U _4 V _ B 2
M_ OD T 3
M_ C S # 3
M_ B _ C A S #
M_ B _ W E #
A S 0 A 4 21 -N 2 A N - 4F
A S 0A 42 1 -N 2 A N -4 F
C 75
JDIMM_2 Terminator
16 -5 603 4-4 5A
[ 6]
R7 9
1 K _ 1% _ 04
R 78
C1 7 1
C1 7 7
1 K _ 1% _ 0 4
1 U _ 6 . 3V _ 0 4
0 . 1U _1 0 V _ X7 R _ 0 4
Schematic Diagrams
Panel, Inverter, CRT
5V S
D
Q2 6
2N 70 0 2W
S
D A C_ HS Y NC
G
CRT _ HS Y N C
D
CRT _ V S Y N C
1 K _ 04
D3 1
C
A S D 75 1 V
A
3 . 3V S
2 . 2 K _0 4
3. 3 V S
D A C _ D D C A D A TA
S
R1 9 1
2 . 2 K _0 4
R1 8 9
2 . 2 K _0 4
[5 ]
D A C _ D D C A C LK
C
D1 4
A S D7 5 1 V
A
L63
F C M1 0 05 K F -1 2 1T 0 3
CRT _ HS Y NC_ R
L64
C R T_ V S Y N C
F C M1 0 05 K F -1 2 1T 0 3
CRT _ V S Y N C_ R
L65
C R T_ D D C A C LK
F C M1 0 05 K F -1 2 1T 0 3
CRT _ DD CA CL K _ R
L66
C R T_ D D C A D A T
F C M1 0 05 K F -1 2 1T 0 3
CRT _ DD CA DA T _ R
C R T_ H S Y N C
[5 ]
5V S
C
3
R1 5
R 14
C 31 7
C3 1 4
C 3 10
C3 4
C3 0
C 27
1 50 _ 1% _ 0 4
15 0 _1 % _ 04
1 5 0 _1 % _0 4
2 2 P _5 0 V _0 4
2 2P _ 5 0V _0 4
22 P _ 5 0V _ 0 4
47 P _ 5 0V _ 0 4
47 P _ 50 V _ 0 4
4 7 P _5 0 V _ 04
C
5
6
7
C
A
*0 . 1U _ 16 V _ 04
12
C R T _ D D C A D A T _R
13
C RT _ HS Y N C_ R
14
C R T _ V S Y N C _R
15
C
C 2 97
A
11
4
R1 7
Z 1 10 9
10
D 4
* B A V 99
D2
*B A V 9 9
D1
*B A V 9 9
AC
D AC_ B L UE _ R
9
A
2
AC
D A C _ GR E E N _ R
D1 3
*A S D 7 5 1V
C
1
A
A
C
A
F C M1 0 05 K F -1 2 1T 0 3
5V S
J_ C R T1
C 1 0 50 9 -91 5 0 5-L
D A C _ R E D _R
AC
L62
D A C_ B L UE
D5
BAV9 9
C
F C M1 0 05 K F -1 2 1T 0 3
D6
B A V 99
A
L61
D 7
BAV9 9
AC
F C M1 0 05 K F -1 2 1T 0 3
A C
DA C_ R E D
L60
AC
A
Zo=55 Ohm
C
3 .3 VS
D A C _ GR E E N
[5 ]
2 . 2 K _0 4
R1 9 0
S
Q1 7
2 N 7 00 2 W
D
C R T_ D D C A C LK
[ 5]
R1 8 8
D 3
* BAV9 9
Sheet 12 of 40
Panel, Inverter,
CRT
C R T _ D D C A C L K _R
1
2
3
GN D 1
GN D 2
8
5
4
6 11 7 12 8 13 9 14 10 15
C 28
C2 5
C1 9
C 18
1 0 00 P _ 5 0V _ X 7R _0 4
22 0 P _ 50 V _ 04
2 20 P _ 5 0V _ 0 4
1 0 00 P _ 5 0V _ X 7R _0 4
J_CRT1 Solder side
INVERTER CONNECTOR
P LV D D
L V D S -L2 N
L V D S -L2 P
L V D S -L1 N
L V D S -L1 P
3 . 3V S
P _ DD C_ CL K
P _ DD C_ DA T A
C2 7 3
*0 . 1 U _ 16 V _ 0 4
L V D S -LC LK N
L V D S -LC LK P
C6 2 3
C 6 24
C 62 5
*1 0 P _ 50 V _ 04
*1 0 P _5 0 V _0 4
*1 0P _ 5 0V _ 0 4
* 10 P _ 50 V _ 0 4
LV D
LV D
LV D
LV D
LV D
LV D
LV D
LV D
C6 2 6
C6 2 7
*1 0 P _ 50 V _ 04
C 6 28
*1 0 P _5 0 V _0 4
S -L0 N
S -L0 P
S -L2 N
S -L2 P
S -L1 N
S -L1 P
S -LC LK
S -LC LK
3. 3V
[ 5 , 27 ]
[ 5, 2 7 ]
[ 5 , 27 ]
[ 5, 2 7 ]
[ 5 , 27 ]
[ 5, 2 7 ]
N [ 5 , 2 7]
P [ 5 , 27 ]
R1 8 7
[ 1 5]
*1 0 0 K _0 4
1
S B _ B LO N
[ 2 6]
3
2
B K L _E N
* 10 P _ 50 V _ 0 4
R5 7
1 00 K _ 0 4
4
U1 0 B
7 4L V C 0 8 P W
GM _ B LO N
3. 3V
2 . 2 K _ 04
2 . 2 K _ 04
P _ DD C_ CL K
P _ DD C_ DA T A
P _ D D C _ C L K [ 5 , 27 ]
P _ D D C _ D A T A [ 5 , 2 7]
[ 1 9 , 26 ]
[ 5 , 15 , 1 7 , 26 ]
L I D _S W #
C L_ P W R OK
S Y S 1 5V
2A
R3 7 8
1
1 M_ 04
1 M_ 0 4
2
D
G
R 38 2
C 61 8
D
D
D
D
G
S
6
0. 1 U _ 5 0V _ 0 6
11
U 1 0C
74 L V C 0 8 P W
J _ INV 1
R 3 92
1
2
3
4
5
6
4 7K _ 0 4
R1 8 4
C 3 07
*1 M_ 0 4
0. 1 U _ 1 6V _0 4
87 2 1 2-0 6 G0
13
U1 0 D
7 4L V C 0 8 P W
[ 2 6, 2 7 ]
6-2 0-4 1A 10- 106
I N V _ B LO N
1
B R I GH T N E S S
*0 . 1 U _ 1 6V _ 0 4
5
6
2A
4
S I 34 5 6B D V -T 1-E 3
C6 1 9
R3 8 1
0 . 02 2 U _ 25 V _ X 7R _0 6
*1 0 0K _ 0 4
P L V DD
R 3 79
R 3 80
20 0 _0 6
* 2 00 _ 06
D
Q2 5
2 N 7 0 02 W
G
S
* 10 0 K _0 4
S
E N A V DD
Q2 4
2 N 7 0 02 W
* 0. 1 U _5 0 V _0 6
E
[5 ]
C
3
Q 23
D T C 1 1 4E U A
B
*0 . 1 U _ 1 6V _ 0 4
J_INV1
[ 27 ]
Q2 2
R3 7 7
12
7
3 .3 V
S Y S 1 5V
7
R1 6 4
R1 6 3
V IN_ INV
C 2 93
8
10
14
3 .3 VS
L21
H C B 1 60 8 K F -1 21 T 25
C 30 0
40 mil
9
[5 ]
V IN
C3 0 6
6
5
C 62 9
*1 0P _ 5 0V _ 0 4
U 1 0A
74 L V C 0 8 P W
3. 3 V
14
L V D S -L0 N
L V D S -L0 P
For CCFL Panel only
C6 2 2
L V D S -L 0N
L V D S -L 0P
L V D S -L 2N
L V D S -L 2P
L V D S -L 1N
L V D S -L 1P
L V D S -L C L K N
L V D S -L C L K P
14
0. 1 U _1 6 V _0 4
7
1
2
3
4
5
6
7
8
9
10
1 1 12
1 3 14
1 5 16
1 7 18
1 9 20
8 8 10 7 -20 0 0 1
14
C1
2A
J _ LC D 1
7
PANEL
[ 2 7 . . 29 ] S Y S 1 5V
[ 2 , 13 . . 1 7, 1 9 , 2 0, 2 3 , 29 , 3 0] 3 . 3V
[ 5 , 8 . . 1 1, 1 3 . . 16 , 1 8 . . 27 , 3 1] 3 . 3V S
[ 1 3 , 16 , 1 9, 21 , 2 4, 2 5 , 27 ] 5V S
[ 2 7. . 3 2 ] V I N
[ 2 7] P L V D D
Panel, Inverter, CRT B - 13
B.Schematic Diagrams
[ 5]
[5 ]
1 K _ 04
R3 9 9
D A C_ V S Y N C
D
C R T_ D D C A D A T
[5 ]
AC
Zo=50 Ohm
Q2 7
2N 70 0 2W
S
R3 9 8
Zo=55 Ohm
Q1 6
2 N 7 00 2 W
G
G
5 VS
G
CRT
Schematic Diagrams
ICH9-M 1/5 - SATA
R TC V C C
1 K _ 04
A
R 94
1M _0 4
R 96
33 2 K _ 1% _ 06
I C H _I N T V R M E N
8 52 0 5 -02 0 0 1
I C H _ I N T V R ME N
B 22
A 22
RT CV C C
C 45 3
R2 5 8
0 . 1 U _ 1 6V _0 4
2 4 . 9_ 1 % _0 4
GL A N _ C LK
E 25
LA N _ R S T S Y N C
C 13
LA N _ R X D 0
LA N _ R X D 1
LA N _ R X D 2
F 14
G 13
D 14
LA N _ TX D 0
LA N _ TX D 1
LA N _ TX D 2
D 13
D 12
E 13
GP I O 56
B 10
B 28
B 27
R 95
R7 6
A Z _ B I TC L K
AZ _ SYN C
AF 6
AH4
2 0 K _ 1% _ 0 4
2 0K _1 % _0 4
AZ _ RST #
AE7
S RT CR S T #
RT CR ST #
C 2 13
C1 7 2
1 U _6 . 3 V _ 04
1 U _ 6 . 3V _ 0 4
35mil
[ 2 4]
[ 1 9]
A Z _ SDIN 0
A Z _ SDIN 1
[2 5 ]
S B _ MU T E #
25mil
JO P E N 1
*O P E N _ 3 5m i l
5mil
C lea r CM OS
[ 19 ]
Zo= 55O? 5%
1 5 P _ 50 V _ 0 4
Z diff= 10 0O? 0%
[ 1 9]
[ 1 9]
[ 19 ]
[ 19 ]
R T C_ X 1
2
1
C4 9 6
X4
3 2 . 7 68 K H z
S A T A _L E D #
S A T A _ RX N0
S A T A _ RX P 0
S A T A _ T XN 0
S A T A _ T XP 0
S A T A _ RX N1
S A T A _ RX P 1
S A T A _T X N 1
S A T A _T X P 1
R 2 91
C
C
C
C
H DA _ S DIN 2
H DA _ S DIN 3
AF 4
A G4
AH3
AE5
A Z _ S D OU T
A G5
H DA _ DO CK _ E N #
S B _ M UT E #
A G7
AE8
A G8
5 21
5 31
5 13
5 10
0 . 01 U _ 1 6 V _X 7 R _ 0 4 A J 16
0 . 01 U _ 1 6 V _X 7 R _ 0 4 A H 16
0 . 01 U _ 1 6 V _X 7 R _ 0 4 A F 17
0 . 01 U _ 1 6 V _X 7 R _ 0 4 A G 17
C 2 33
C 2 34
C 2 31
C 2 32
0 . 01 U _ 1 6 V _X 7 R _ 0 4 A H 13
0 . 01 U _ 1 6 V _X 7 R _ 0 4 A J 13
0 . 01 U _ 1 6 V _X 7 R _ 0 4 A G 14
0 . 01 U _ 1 6 V _X 7 R _ 0 4 A F 14
R TC R S T #
S R TC R S T #
I N TR U D E R #
RTC
L PC
A 25
F 20
C 22
F W H 0/ L A D 0
F W H 1/ L A D 1
F W H 2/ L A D 2
F W H 3/ L A D 3
R TC X1
R TC X2
F W H4 /L F RA M E #
L D R Q0 #
L D R Q1 # / GP I O2 3
I N TV R ME N
L A N 1 0 0 _S L P
A 20 G A TE
A 2 0M #
G LA N _ C L K
L A N _ R S TS Y N C
L A N _ R XD 0
L A N _ R XD 1
L A N _ R XD 2
L A N_ T X D0
L A N_ T X D1
L A N_ T X D2
G P I O5 6
G LA N _ C OM P I
G LA N _ C OM P O
DP R S T P #
D PSL P#
F E RR #
C P U P W R GD
IG NN E #
I NIT #
INT R
R CIN #
N MI
SM I#
H D A _ B I T _C L K
H DA _ S Y N C
S TP C L K #
H DA _ RS T #
T H R MT R I P #
H DA _ S DIN 0
H DA _ S DIN 1
H DA _ S DIN 2
H DA _ S DIN 3
TP1 2
H DA _ S DO UT
S AT A 4 RXN
S A TA 4 R XP
S A T A 4 TX N
S A T A 4 T XP
H D A _ D O C K _ E N # / G P I O3 3
H D A _ D O C K _ R S T # / GP I O 3 4
S AT A 5 RXN
S A TA 5 R XP
S A T A 5 TX N
S A T A 5 T XP
SA T A L E D#
SA T A 0 RX N
SA T A 0 RX P
S A T A 0 T XN
S A T A 0 T XP
SA T A 1 RX N
SA T A 1 RX P
S A T A 1 T XN
S A T A 1 T XP
S A T A _ CL K N
S A TA _ C LK P
SA T A RB IA S #
S A T A RB IA S
K5
K4
L6
K2
K3
C4 8 3
1 5 P _ 50 V _ 0 4
LP C _ A D 0
[ 1 9 , 2 6]
L P C _A D 1
L P C _A D 2
LP C _ A D 3
[ 1 9 , 26 ]
[ 1 9 , 26 ]
[ 1 9 , 2 6]
L P C _F R A ME #
[ 19 , 2 6 ]
L P C _D R Q 0#
L D R Q1 #
J3
J1
N7
A J2 7
GA 20
A J2 5
A E 23
I C H _ D P R S TP #
IC H_ DP S L P #
R2 6 3
R2 6 1
* 10 m li _ s ho rt
* 10 m li _ s ho rt
A J2 6
IC H_ F E RR #
R2 6 2
56 _ 0 4
G A 2 0 [ 2 6]
H _ A 20 M#
[ 2]
A D2 2
A F 25
A E 22
A G2 5
L3
R9 3
H_ F E R R#
H _ PW RG D
[ 2]
H _ I GN N E #
[2 ]
H _D P R S T P # [ 2, 5 , 3 1 ]
H _D P S L P # [ 2 ]
H _F E R R #
* 10 m li _ s ho rt
H _I N I T #
[ 2]
[2 ]
H _ N MI [ 2 ]
H _ S MI # [ 2 ]
A H2 7
A G2 6
H_ D PRS T P #
H _ D P S LP #
H _ I N T R [ 2]
K B C_ RS T # [2 6 ]
K B C _R S T #
A F 23
A F 24
H _ S TP C L K #
S B _ T H R MT R I P #
A G2 7
R3 1 9
R3 1 8
*1 0 K _0 4
*1 0 K _0 4
A H9
A J9
A E 10
A F 10
R3 2 4
R3 2 5
*1 0 K _0 4
*1 0 K _0 4
R3 2 6
24 . 9 _ 1% _ 0 4
A J7
A H7
P M _ TH R M TR I P #
[ 2 , 5 , 28 ]
54 . 9 _ 1% _ 0 4
A H1 1
A J1 1
A G1 2
A F 12
A H1 8
A J1 8
[2 ]
P M_ TH R M TR I P #
R2 5 7
C L K _S A T A #
[ 18 ]
C L K _S A T A [ 1 8]
Within 500mil
3 .3 V S
KB C _ RS T #
G A2 0
A Z _ S D OU T
SB _ M UT E#
R 3 48
R 1 29
R 1 35
R 1 24
1 0 K _ 04
1 0 K _ 04
* 1K _ 0 4
1 0 K _ 04
H _F E R R #
H _D P R S T P #
H _D P S L P #
P M _ TH R M TR I P #
R
R
R
R
2 55
2 56
2 54
2 50
5 6 _0 4
* 56 _ 0 4
* 56 _ 0 4
5 6 _0 4
G P I O5 6
R 1 20
1 0 K _ 04
I C H 9 M- N H 8 2 8 01 I B M
1 .0 5 VS
1 0 M_ 0 4
3
4
B.Schematic Diagrams
Sheet 13 of 40
ICH9-M 1/5 - SATA
RT CR S T #
SRT CR S T #
INT RU DE R #
INT RU DE R #
1 .5 V S
RT C V CC
C 23
C 24
LAN / G LA N
C PU
1 2
R 24 5
1U _6 . 3 V _ 04
D 9
A S D7 5 1 V
C
RT C_ X 1
RT C_ X 2
IHD A
2
1
20mils
C 1 69
SAT A
A
V DD 3
J CB A T 1
JCBAT
U2 3 A
D 10
A S D7 5 1 V
C
R T C_ X 2
3 . 3V
Layout Note:
VERY CLOSE TO ICH9M
SATA HDD
J _ HD D1
S1
S2
S3
S4
S5
S6
S7
S A T A _ T XP 0
S A T A _ T XN 0
SA T A _ RX N0
SA T A _ RX P 0
3. 3 V S
1.5A
P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
C 1 6 6 23 -1 22 A 4
P IN G ND 1 ~ 2 = G ND
B - 14 ICH9-M 1/5 - SATA
[ 24 ]
A U D _A Z _ S D OU T
[ 19 ]
MD C _ A Z _ S D OU T
[ 24 ]
A U D _A Z _ B I T C L K
[ 19 ]
MD C _ A Z _ B I TC L K
[ 2 4]
A U D_ AZ _ S YNC
[ 1 9]
MD C _ A Z _ S Y N C
[ 2 4, 2 5 ]
A U D_ A Z _ RS T #
[1 9 ]
C1 4
C2 1
0 . 1U _1 6 V _ 0 4
10 U _ 1 0 V _0 8
M D C _A Z _R S T #
R 13 8
3 3 _0 4
R 12 6
3 3 _0 4
R 13 1
3 3 _0 4
R 13 0
3 3 _0 4
R 13 9
3 3 _0 4
R 12 5
3 3 _0 4
R 13 3
3 3 _0 4
R 12 3
3 3 _0 4
A Z _S D OU T
A Z _B I T C LK
A Z _S Y N C
A Z _R S T #
5 VS
1.0A
C1 1
C 6
C 12
C1 3
C 22
C2 9 4
0 . 1U _1 6 V _ 0 4
0 . 1 U _ 1 6V _ 0 4
0 . 1 U _ 1 6 V _0 4
1U _ 10 V _ 0 6
1 0 U _ 1 0 V _0 8
*1 0 0U _6 . 3 V _ B 2
[ 2 , 1 2, 1 4 . . 1 7, 19 , 2 0, 23 , 2 9 , 30 ] 3. 3 V
[ 2 1 , 26 . . 3 0 , 32 ] V D D 3
[ 5 , 8 . . 1 2, 1 4 . . 1 6, 1 8 . . 2 7 , 31 ] 3. 3 V S
[ 1 2, 1 6 , 1 9, 2 1 , 2 4, 25 , 2 7] 5 V S
[ 3 , 8, 14 , 1 6, 19 , 2 0 , 29 ] 1. 5 V S
[1 6 ] RT C VCC
[ 2 . . 5, 7 , 8 , 1 6 , 29 ] 1. 0 5 V S
Schematic Diagrams
ICH9-M 2/5 - PCIE, PCI, USB
Boot BIOS Strap
SPI
01
Stuff
PCI
10
No stuff
Stuff
11
No stuff
No stuff
LPC(default)
R1 4 8
1 K_ 0 4
No stuff
[2 0 ]
[2 0 ]
[ 20 ]
[ 20 ]
P C I _ G N T #0
Stuff
R1 3 2
* 1K _0 4
P CIE _ RX N3 _ 3 G
P C I E _ R X P 3 _3 G
P C I E _ TX N 3 _ 3 G
P C I E _ TX P 3 _3 G
[ 2 3 ] P C I E _ R X N 4 _L A N
[ 2 3 ] P C I E _ R X P 4_ L A N
[ 2 3 ] P C I E _T X N 4 _L A N
[ 2 3 ] P C I E _T X P 4_ L A N
Disable
P C I E _ T X N 1 _C
P C I E _ T X P 1_ C
N2 9
N2 8
P2 7
P2 6
C4 6 1
C4 6 0
0 . 2 2U _1 6 V _ X7 R _ 0 6 P C I E _ T X N 2 _C
0 . 2 2U _1 6 V _ X7 R _ 0 6 P C I E _ T X P 2_ C
L2 9
L2 8
M2 7
M2 6
C4 5 9
C4 5 8
0 . 1 U _ 10 V _ X 7R _0 4
0 . 1 U _ 10 V _ X 7R _0 4
P C I E _ T X N 3 _C
P C I E _ T X P 3_ C
J2 9
J2 8
K2 7
K2 6
C4 5 7
C4 5 6
0 . 1 U _ 10 V _ X 7R _0 4
0 . 1 U _ 10 V _ X 7R _0 4
P C I E _ T X N 4 _C
P C I E _ T X P 4_ C
G2 9
G2 8
H2 7
H2 6
C4 5 5
C4 5 4
0 . 1 U _ 10 V _ X 7R _0 4
0 . 1 U _ 10 V _ X 7R _0 4
P C I E _ T X N 5 _C
P C I E _ T X P 5_ C
E2 9
E2 8
F27
F26
C4 6 3
C4 6 2
P C I E _ R XN 2_ N E W _C A R D
P C I E _ R XP 2 _ N E W _ C A R D
P C I E _ T XN 2_ N E W _C A R D
P C I E _ T XP 2 _ N E W _ C A R D
[ 19 ]
[ 19 ]
[1 9 ]
[1 9 ]
[ 2 2] P C I E _ R XN 5_ C A R D
[ 22 ] P C I E _ R X P 5 _C A R D
[ 22 ] P C I E _ T XN 5_ C A R D
[ 2 2 ] P C I E _T X P 5 _C A R D
A16 swap override Strap
Enable
No stuff
P C I E _ R XN 1_ W L A N
P C I E _ R XP 1 _ W LA N
P C I E _ T XN 1_ W L A N
P C I E _ T XP 1 _ W LA N
0 . 1 U _ 10 V _ X 7R _0 4
0 . 1 U _ 10 V _ X 7R _0 4
C2 9
C2 8
D2 7
D2 6
De fau lt
P C I _ G N T #3
Zo= 55O? 5%
SPI_SI
iTPM Enable
Stuff
Enable
No stuff
[ 21 ]
Default
Disable
S P I _S C L K
S P I _C S 0 #
S P I _C S 1 #
D2 3
D2 4
F23
S P I _S I
S P I _S O
D2 5
E2 3
U S B _ OC #0 1
[1 9 ]
[2 0 ]
US
US
US
US
US
US
US
US
US
US
US B _ O C# 3
US B _ O C# 4
3 . 3V S
S P I_ S I
* 1K _0 4
R3 4 6
iTPM Enable
HIGH
Enable
LOW
Disable
Default
C# 2
C# 3
C# 4
C# 5
C# 6
C# 7
C# 8
C# 9
C # 10
C # 11
2 2 . 6 _1 % _ 04
Within 500 mils
N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3
A G2
A G1
PERN 1
PERP1
P E T N1
PET P1
PERN 2
PERP2
P E T N2
PET P2
PERN 3
PERP3
P E T N3
PET P3
PERN 4
PERP4
P E T N4
PET P4
PERN 5
PERP5
P E T N5
PET P5
V 27
V 26
U2 9
U2 8
D MI 0 R XN
D M I 0R X P
D MI 0 T XN
D MI 0 T X P
D MI 1 R XN
D M I 1R X P
D MI 1 T XN
D MI 1 T X P
D MI _ R XN 3 [ 5 ]
D MI _ R XP 3 [ 5]
D MI _ T X N 3 [ 5 ]
D MI _ T X P 3 [ 5 ]
T2 6
T2 5
D MI _ C L K N
D M I _C L K P
Z diff= 100O? 5%
D MI _ R XN 2 [ 5 ]
D MI _ R XP 2 [ 5]
D MI _ T X N 2 [ 5 ]
D MI _ T X P 2 [ 5 ]
A D2 7
A D2 6
A C2 9
A C2 8
D MI 3 R XN
D M I 3R X P
D MI 3 T XN
D MI 3 T X P
3 . 3V S
D MI _ R XN 1 [ 5 ]
D MI _ R XP 1 [ 5]
D MI _ T X N 1 [ 5 ]
D MI _ T X P 1 [ 5 ]
AB2 7
AB2 6
AA2 9
AA2 8
D MI 2 R XN
D M I 2R X P
D MI 2 T XN
D MI 2 T X P
C L K _ P C I E _ I C H # [ 18 ]
C L K _ P C I E _ I C H [ 1 8]
AF2 9
AF2 8
D M I _Z C OM P
D MI _ I R C OM P
P E R N 6/ G L A N _ R X N
P E R P 6 / G LA N _R X P
P E T N 6 / GL A N _ T XN
P E T P 6/ G L A N _ TX P
D MI _ R XN 0 [ 5 ]
D MI _ R XP 0 [ 5]
D MI _ T X N 0 [ 5 ]
D MI _ T X P 0 [ 5 ]
Y2 7
Y2 6
W29
W28
R2 6 0
2 4. 9 _ 1% _ 0 4
1 . 5V S
Within 500 mils
A C5
A C4
A D3
A D2
A C1
A C2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2
U S B P 0N
U SBP0 P
U S B P 1N
S P I_ CL K
S P I_ CS 0 #
U SBP1 P
S P I _ C S 1 # / GP I O5 8 / C L GP I O6 U S B P 2N
U SBP2 P
S P I _ MOS I
U S B P 3N
S P I _ MI S O
U SBP3 P
U S B P 4N
U SBP4 P
OC 0# / GP I O5 9
U S B P 5N
OC 1# / GP I O4 0
U SBP5 P
OC 2# / GP I O4 1
U S B P 6N
OC 3# / GP I O4 2
U SBP6 P
OC 4# / GP I O4 3
U S B P 7N
OC 5# / GP I O2 9
U SBP7 P
OC 6# / GP I O3 0
U S B P 8N
OC 7# / GP I O3 1
OC 8# / GP I O4 4
U SBP8 P
OC 9# / GP I O4 5
U S B P 9N
OC 10 # / GP I O 46
U SBP9 P
OC 11 # / GP I O 47
U S B P 1 0N
US B P 1 0 P
U S B P 1 1N
US B R B IA S
US B P 1 1 P
US B R B IA S #
S PI
USB
US B _ P N7 _ CC D
U S B _ P P 7 _C C D
US B _ P N9 _ B T
U S B _ P P 9 _B T
U S B _ P N 1 1 _F P
U S B _ P P 1 1_ F P
[ 2 1]
[ 21 ]
R1 3 6
R1 2 8
1 0 K _ 04
C L GP I O 5
* 10 0 K _ 04
D03 BCN
[ 15 ]
1
R 4 05
J S P I1
*O P E N _ 3 5m i l
S P I _ C S 0# _ R
3. 3 V S
J S P I2
*O P E N _ 3 5m i l
R 3 76
0_ 0 4
7
8
J_ S B S P I 1
* 3 . 3K _ 1 %_ 0 4
1
3
5
7
S P I _ C S # _ C ON
S P I _ S O_ R
S P I _ C S 1# _ R
2
2
4
6
8
S P I _S C L K _R
S P I _S I _R
*S P N Z -0 8S 3 -B -C - 0-P
3. 3 V M _S B S P I 1
8
C 1 65
0. 1 U _ 1 6 V _0 4
R 75
3 . 3K _ 1 % _0 4
SBSPI_ W P# _ R
3
R 74
3 . 3K _ 1 % _0 4
S B S P I_ HO L D#
7
U3
VDD
SI
W P#
CE#
SO
S CK
H OL D #
VSS
MX 2 5L 1 6 05 A 1 6M
5
S P I _ S I _R
2
S P I _ S O_ R
1
S P I _ C S 0 #_ R
6
S P I _ S C L K _R
R8 9
33 _ 0 4
R7 3
33 _ 0 4
R8 2
33 _ 0 4
R7 7
33 _ 0 4
S P I_ S I
C 1 75
*3 3P _ 5 0 V _0 4
S P I_ S O
C 1 66
*3 3P _ 5 0 V _0 4
C 1 68
*3 3P _ 5 0 V _0 4
S P I_ CS 0 #
S P I_ S CL K
4
02/20
Remove C164
R3 7 5
SBSPI_ W P# _ R
* 0 _0 4
S B S P I _W P #
C 6 43
R 40 8
*3 . 3 K _ 1% _ 04
SBSPI_ W P# _ R
*0 . 1U _ 16 V _ 04
R 41 1
*3 . 3 K _ 1% _ 04
S B S P I_ HO L D#
U2 9
VDD
SI
W P#
CE#
SO
3
S CK
7
H OL D #
VSS
*M X2 5 L1 6 0 5A 1 6 M
5
S P I 1 _S I _ R
2
S P I 1 _S O _R
1
S P I _ C S 1 #_ R
6
S P I 1 _S C LK _ R
P CI_ INT # A
P CI_ INT # B
P CI_ INT # C
P CI_ INT # D
J5
E1
J6
C 4
[ 15 ]
3. 3 V M _S B S P I 1
8
D1 1
C 8
D 9
E1 2
E9
C 9
E1 0
B7
C 7
C 5
G1 1
F8
F11
E7
A3
D 2
F10
D 5
D1 0
B3
F7
C 3
F3
F4
C 1
G 7
H 7
D 1
G 5
H 6
G 1
H 3
R 4 06
*3 3 _0 4
R 4 07
*3 3 _0 4
R 4 09
*3 3 _0 4
R 4 10
*3 3 _0 4
S P I_ S I
S P I_ S O
R E Q0 #
GN T 0 #
R E Q 1 #/ G P I O5 0
G N T 1 #/ G P I O5 1
R E Q 2 #/ G P I O5 2
G N T 2 #/ G P I O5 3
R E Q 3 #/ G P I O5 4
G N T 3 #/ G P I O5 5
PC I
C/B E 0 #
C/B E 1 #
C/B E 2 #
C/B E 3 #
IRDY #
PAR
P C IRS T #
DEVS EL #
PERR #
P L OC K #
SERR #
S TO P #
T RDY #
F RA M E #
P L T RST #
P CIC L K
PM E#
I nt err up t I/F
P IRQ
P IRQ
P IRQ
P IRQ
A#
B#
C#
D#
P I R QE # / GP I O
P I R QF # / GP I O
P I R Q G# / GP I O
P I R Q H # / GP I O
2
3
4
5
F1
G4
B6
A7
F 13
F 12
E6
F6
P C I _ R E Q# 0
P C I _ GN T # 0
P C I _ R E Q# 1
P C I _ G N T #1
P C I _ R E Q# 2
P C I _ G N T 2#
P C I _ R E Q# 3
P C I _ G N T #3
D8
B4
D6
A5
P CI_ C
P CI_ C
P CI_ C
P CI_ C
D3
E3
R1
C6
E4
C2
J4
A4
F5
D7
P CI_ IR DY #
P CI_ P A R
P C I _ R S T#
P C I _ D E V S E L#
P CI_ P E R R#
P C I _ L OC K #
P CI_ S E R R#
P C I _ S T OP #
P CI_ T RD Y #
P C I _ F R A ME #
C1 4
D4
R2
P L T_ R S T#
P C L K _ I C H 33
H4
K6
F2
G2
P C I _ I N T# E
P C I _ I N T# F
P C I _ I N T# G
P C I _ I N T# H
RN 1 3
8 P 4R X 8. 2 K _ 0 4
RN 3 4
8 P 4R X 8. 2 K _ 0 4
#8
#5
#9
#7
#4
#6
#1 0
#2
#1 1
*8 . 2 K _ 04
R3 5 1
RN 3 3
8 P 4R X 10 K _ 04
RN 1 4
8 P 4R X 10 K _ 04
1 0K _ 0 4
Sheet 14 of 40
ICH9-M 2/5 - PCIE,
PCI, USB
3. 3 V
1
U6
7 4A H C 1 G0 8 GW
4
2
A D0
A D1
A D2
A D3
A D4
A D5
A D6
A D7
A D8
A D9
A D1 0
A D1 1
A D1 2
A D1 3
A D1 4
A D1 5
A D1 6
A D1 7
A D1 8
A D1 9
A D2 0
A D2 1
A D2 2
A D2 3
A D2 4
A D2 5
A D2 6
A D2 7
A D2 8
A D2 9
A D3 0
A D3 1
RN 1 2
8 P 4R X 8. 2 K _ 0 4
C 2 35
*0 . 1U _ 16 V _ 04
I C H 9 M-N H 8 28 0 1I B M
P CI_ A D0
P CI_ A D1
P CI_ A D2
P CI_ A D3
P CI_ A D4
P CI_ A D5
P CI_ A D6
P CI_ A D7
P CI_ A D8
P CI_ A D9
P CI_ A D1 0
P CI_ A D1 1
P CI_ A D1 2
P CI_ A D1 3
P CI_ A D1 4
P CI_ A D1 5
P CI_ A D1 6
P CI_ A D1 7
P CI_ A D1 8
P CI_ A D1 9
P CI_ A D2 0
P CI_ A D2 1
P CI_ A D2 2
P CI_ A D2 3
P CI_ A D2 4
P CI_ A D2 5
P CI_ A D2 6
P CI_ A D2 7
P CI_ A D2 8
P CI_ A D2 9
P CI_ A D3 0
P CI_ A D3 1
8
7
6
5
8
7
6
5
RN 3 5
8 P 4R X 8. 2 K _ 0 4
[ 1 9]
[ 19 ]
B U F _ P L T _R S T#
[ 19 , 2 0, 22 , 2 3, 2 6 ]
R1 1 3
3
J_SBSPI1
1
2
3
4
1
2
3
4
RN 1 1
8 P 4R X 8. 2 K _ 0 4
[1 9 ]
[ 1 9]
U2 3 B
3 . 3V M_ S B S P I 1
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
U S B _ OC
U S B _ OC
U S B _ OC
U S B _ OC
U S B _ OC
U S B _ OC
U S B _ OC
U S B _ OC
U S B _ OC
Z diff= 90O? 5 %
P L T _ RS T #
3 . 3V
1
P C I _ R E Q #2
P C I _ TR D Y #
2
3
P C I _ R E Q #3
4
P CI_ P E RR #
P CI_ INT # B
1
P CI_ IRD Y #
2
P C I _ LO C K #
3
P C I _ S TO P #
4
P CI_ F RA M E #
1
P CI_ DE V S E L #
2
P CI_ INT # D
3
P C I _ R E Q #1
4
1
P CI_ INT # C
P CI_ INT # A
2
P CI_ S E RR #
3
P CI_ INT # F
4
P CI_ INT # E
1
P CI_ INT # H
2
P CI_ INT # G
3
P C I _ R E Q #0
4
P C I _ GN T 2 #
R1 1 5
3 . 3V
US B _ P N0 [2 1 ]
US B _ P P 0 [2 1 ]
US B _ P N1 [2 1 ]
US B _ P P 1 [2 1 ]
U S B _ P N 2 _ MI N I [ 2 0]
U S B _ P P 2 _M I N I [ 20 ]
US B _ P N3 [1 9 ]
US B _ P P 3 [1 9 ]
US B _ P N4 _ NE W
[ 20 ]
U S B _ P P 4 _N E W [ 2 0 ]
U S B _ P N 5 _ 3G [ 1 9 ]
U S B _ P P 5 _3 G [ 1 9]
5
R8 6
CLGPIO5
B _O
B _O
B _O
B _O
B _O
B _O
B _O
B _O
B _O
B _O
U 23 D
*1 0 0 K _0 4
/ B E #0
/ B E #1
/ B E #2
/ B E #3
P C L K _ I C H 33
R1 4 5
* 10 _ 0 4
C2 6 4
*1 0 P _ 50 V _ 04
P L T_ R S T# [ 5 , 1 9 ]
P C L K _ I C H 33 [ 18 ]
P ME #
[ 26 ]
I C H 9M -N H 82 8 0 1I B M
S P I_ CS 1 #
S P I_ S CL K
4
[ 5 , 8 . . 13 , 1 5 , 16 , 1 8 . . 27 , 3 1] 3 . 3V S
[ 2, 1 2 , 1 3, 1 5 . . 1 7, 1 9 , 20 , 2 3 , 29 , 3 0] 3 . 3V
[ 3, 8 , 1 3 , 16 , 1 9 , 20 , 2 9] 1 . 5V S
ICH9-M 2/5 - PCIE, PCI, USB B - 15
B.Schematic Diagrams
PC I_G NT# 3
[ 2 0]
[ 2 0]
[ 20 ]
[ 20 ]
SPI_CS1#
P CI- Ex pre ss
PCI_GNT#0
D ir ect M ed ia In te rfa ce
Strap
Schematic Diagrams
G P I O1 3
SW I#
P M _ S Y S R S T#
L A N _P W R
8
7
6
5
1
2
3
4
G P I O6 0
S B _B A T L OW #
S B _B L O N
A C _ P R E S E N T _R
[ 1 0 , 1 1, 1 8 ]
[ 1 0 , 1 1, 1 8 ]
I C H _ S MB C L K 0
I C H _ S MB D A T 0
[2 0 ]
[2 0 ]
I C H _ S MB C L K 1
I C H _ S MB D A T 1
NEW CARD, MINI CARD
[2 6 ]
[ 1 9]
P C IE _ W A K E #
1 0 K _0 4
R 3 45
* 10 K _ 0 4
P W R_ B T N#
R 3 03
1 0 K _0 4
IC H_ S M B DA T 1
R 3 08
1 0 K _0 4
IC H_ S M B CL K 1
R 3 09
* 10 0 K _ 04
G P I O2 4
R 1 10
1 0 K _0 4
S U S _ P W R _ A C K _R
R 3 13
2 . 2 K _0 4
IC H_ S M B DA T 0
R 1 11
2 . 2 K _0 4
IC H_ S M B CL K 0
[5 ]
P M _S Y N C #
[2 3 ]
L A N _P W R
[ 1 8]
[ 18 ]
P M _ S TP P C I #
* 10 K _ 0 4
P M _ S TP C P U #
R 3 04
1 0 K _0 4
S A TA _ C LK R E Q#
R 1 06
1 0 0K _ 0 4
G P I O1 7
R 1 46
8 . 2 K _0 4
S E RIRQ
R 2 78
8 . 2 K _0 4
P M _ TH R M #
R 3 49
8 . 2 K _0 4
P M _ CL K RU N#
R 2 77
* 10 K _ 0 4
M C H _I C H _ S Y N C #
R 3 01
1 0 0K _ 0 4
O D D _D E T E C T #
R 1 02
1 0 0K _ 0 4
S M I#
R 97
1 0 0K _ 0 4
S C I#
F19
R 4
G1 9
L A N_ P W R
A1 7
P M_ S T P P C I #
P M_ S T P C P U #
A1 4
E1 9
L4
P CIE _ W A K E #
S E RIR Q
P M_ T H R M#
E2 0
M5
AJ 2 3
V RM _ P W RG D
D2 1
A2 0
[1 4 ]
[ 1 8]
S MI #
OD D _ D E T E C T#
S CI#
[ 26 ] S MI #
OD D _ D E T E C T#
[ 26 ] S C I #
[ 1 2]
* 10 K _ 0 4
R 1 07
SW I#
P M_ S Y S R S T #
P M_ C LK R U N #
P M_ C LK R U N #
[ 19 , 2 0 , 23 ] P C I E _ W A K E #
[ 1 9 , 2 6] S E R I R Q
[ 2 ] P M _T H R M#
3. 3 V S
R 3 11
U 2 3C
G1 6
S MB C LK
A1 3
S MB D A TA
E1 7
LI N K A L E R T # / GP I O 60 / C LG P I O4
C1 7
S ML I N K 0
B1 8
S ML I N K 1
M6
P M_ S T P P C I #
P M_ S T P C P U #
[ 1 9]
[ 1 9]
Sheet 15 of 40
ICH9-M 3/5 - GPIO,
PWR Mangement
SW I#
L P CPD #
I C H _S MB C L K 0
I C H _S MB D A T0
GP I O 6 0
I C H _S MB C L K 1
I C H _S MB D A T1
S B _ B L ON
GP I O 1 3
GP I O 1 7
GP I O 1 8
GP I O 2 0
S B _ B LO N
S B S P I _W P #
S A TA _ C LK R E Q#
S A T A _ CL K RE Q #
S A T A _ C L K R E Q #_ R
R3 4 4
*1 0m i l _s h or t
[1 4 ]
[5 ]
C L G P I O5
[2 4 ] IC H_ S P K R
M CH_ IC H_ S Y N C#
MC H _ I C H _S Y N C #
A G1 9
A H2 1
A G2 1
A2 1
C1 2
C2 1
AE1 8
K1
AF8
AJ 2 2
A9
D1 9
L1
AE1 9
A G2 2
AF2 1
A H2 4
A8
M7
AJ 2 4
B2 1
A H2 0
AJ 2 0
AJ 2 1
RI#
S U S _ S T A T #/ L P C P D #
S Y S _ R E S E T#
S MB A L E R T # / GP I O1 1
CL K RU N#
W AKE#
S E RIR Q
TH R M #
V RM P W RG D
TP 1 1
GP I O 1
GP I O 6
GP I O 7
GP I O 8
GP I O 12
GP I O 13
GP I O 17
GP I O 18
GP I O 20
S C L OC K / GP I O 22
GP I O 27
GP I O 28
S A TA C L K R E Q #/ G P I O3 5
S LO A D / G P I O3 8
S D A T A OU T 0/ G P I O3 9
S D A T A OU T 1/ G P I O4 8
GP I O 49
GP I O 57 / C L G P I O5
SPKR
MC H _ S Y N C #
TP 3
TP 8
TP 9
TP 1 0
I C H 9M -N H 8 28 0 1I B M
R N3 7
8 P 4 R X 1 0 K _0 4
1
2
3
4
8
7
6
5
P I O2 1
P I O1 9
P I O3 6
P I O3 7
CL K 1 4
CL K 4 8
S U S C LK
SL P_ S3 #
SL P_ S4 #
SL P_ S5 #
P MS Y N C # / G P I O0
S TP _ P C I #
S TP _ C P U #
S A T A 0 GP / G
S A T A 1 GP / G
S A T A 4 GP / G
S A T A 5 GP / G
S 4 _ S TA TE # / G P I O2 6
P W R OK
D P R S L P V R / G P I O1 6
B A T LO W #
P W R B TN #
LA N _ R S T #
RS M RS T #
C K _ P W R GD
C LP W R OK
S L P _M #
CL _ CL K 0
CL _ CL K 1
CL _ DA T A 0
CL _ DA T A 1
C L_ V R E F 0
C L_ V R E F 1
CL _ RS T 0 #
CL _ RS T 1 #
M E M_ L E D / G P I O2 4
GP I O 1 0/ S U S _ P W R _ A C K
GP I O1 4/ A C _ P R E S E N T
W O L _E N / GP I O 9
A H2 3
AF1 9
AE2 1
A D2 0
S A T A 0 GP
S A T A 1 GP
S A T A 4 GP
S A T A 5 GP
H1
AF3
C LK _ I C H 1 4
C LK _ I C H 4 8
P1
S U S CL K
C1 6
E1 6
G1 7
SL P_ S5 #
C1 0
S 4 _ S TA TE #
C L K _ I C H 14
C L K _ I C H 48
S L P _ S 3#
S L P _ S 4#
G2 0
M2
S B _ B A T L OW #
R3
P W R _B TN #
D2 0
S B _ L A N R S T#
D2 2
* 10 m i _l s h ort
R9 1
[1 7 ]
P M _D P R S L P V R
P M_ D P R S L P V R
[ 5 , 31 ]
[ 26 ]
R S MR S T#
RS M RS T #
CL K _ P W RG D
R6
CL _ P W RO K
[ 1 7 , 2 6]
[ 1 8]
[ 5 , 1 2 , 17 , 2 6 ]
S L P _ M#
F24
B1 9
CL _ CL K 0
CL _ CL K 1
F22
C1 9
CL _ DA T A 0
CL _ DA T A 1
C2 5
A1 9
[5 ]
[2 0 ]
[5 ]
[2 0 ]
Zo= 55 O? 5%
CL _ V RE F 0
CL _ V RE F 1
F21
D1 8
A1 6
C1 8
C1 1
C2 0
[ 17 ]
[ 17 ]
P W R _B T N #
1 0 0_ 0 4
R5
B1 6
[ 18 ]
[ 18 ]
S B _ P W RO K
R3 5 0
B1 3
CL _ RS T # 0
CL _ RS T # 1
G P I O2 4
S U S _P W R _ A C K _ R
A C _P R E S E N T_ R
G P I O9
[5 ]
[ 2 0]
Zo= 55 O? 5%
R 10 8
*1 0 mi l _s h o rt
S US _ P W R_ A C K
A C_ P RE S E N T
R 12 1
*1 0 mi l _s h o rt
S U S _ P W R _ A C K [ 2 6]
A C _ P R E S E N T [ 2 6]
3 .3 V S
S A TA 0 G P
S A TA 4 G P
S A TA 5 G P
S A TA 1 G P
R8 8
R 99
1 0 K _0 4
R 1 80
* 10 0 K _ 04
P M _ D P R S LP V R
R 1 01
1 M_ 0 4
V R M_ P W R GD
R 92
1 0 K _0 4
R S MR S T #
C 2 04
1 0 0P _ 5 0 V _0 4
R 2 97
1 0 0K _ 0 4
S B _L A N R S T #
3. 24 K _ 1 %_ 0 4
C L _V R E F 0
12mils
C 19 7
R8 7
0 . 1 U _ 1 0V _ X 7 R _ 04
45 3 _ 1% _ 0 6
G P I O9
C L_VRET0/1 =0.405V
3 .3 V
R3 0 2
POWER OK
C L _V R E F 1
VCORE PWRGD
3 .3 V S
3 .3 V S
U 5
3
C 2 18
RS T #
V CC
G ND
2
1
R1 0 4
P M _P W R OK
1 0K _ 0 4
R 11 4
V R M_ P W R GD
* 10 0 K _ 04
D
* G6 90 L 2 93 T 7 3
* 0 . 1U _1 6 V _ 04 ( IMP 80 9)
[ 31 ]
CL K E N#
G
Q4
2 N 70 0 2W
C2 1 5
0 . 03 3 U _ 1 6 V _X 7 R _ 0 4
[ 2 , 1 2 . . 14 , 1 6 , 17 , 1 9 , 20 , 2 3 , 29 , 3 0 ] 3 . 3 V
[ 5 , 8 . . 14 , 1 6 , 18 . . 2 7 , 3 1] 3. 3V S
B - 16 ICH9-M 3/5 - GPIO, PWR Management
3. 24 K _ 1 %_ 0 4
12mils
S
B.Schematic Diagrams
R 1 12
DDR2, CLK GEN
S MB
1
2
3
4
Clocks
R N3 6
8 P 4 R X 1 0 K _0 4
8
7
6
5
S YS G PI O
P ow er M GT
R N9
8 P 4 R X 1 0 K _0 4
M IS C
G PI O
C on tr ol ler L in k
3. 3 V
SATA
GPIO
ICH9-M 3/5 - GPIO, PWR Management
C 50 4
R2 9 8
0 . 1 U _ 1 0V _ X 7 R _ 04
45 3 _ 1% _ 0 6
Schematic Diagrams
ICH9-M 4/5 - Power
U23 F
0. 1U_10V_X7R_04
0.1U_10V_X7R_0 4
10U_10V_08
AE1
CLOSE TO ICH9M
1 0m ils
V5REF
1 0m ils
V5REF_SUS
VCC1_5_ B
L52
HCB1608KF- 121T25
1A
1.5VS
C189
0. 1U_10V_X7R_04
0.1U_10V_X7R_0 4
C209
C21 0
C202
100U_6. 3V_B2
10U_1 0V_08
10 U_10V_ 08
0.1U_10V_X7R_0 4
A
C206
D29
10_04
ASD751V
C
R328
V5REF
C547
C546
1U_16V_X5R_06
0.1 U_10V_ X7R_04
VCCSATAPL L
L11
HCB1005KF- 121T20
10 mi ls
1.5VS
C598
10 U_10V_ 08
1U_6.3V_04
C23 0
C243
1U_ 6.3V_04
0.1U_10V_X7R_0 4
C547 D 03 BCN? ?
5V
1. 7A
3 .3V
A
1 .5VS
D30
10_04
ASD751V
C
R347
V5REF_ SUS
C586
1 .5VS
C585
0.1 U_10V_ X7R_04
C223
1U_ 6.3V_04
0.1U_10V_X7R_0 4
C586 D 03 BCN? ?
AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15
AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10
AC9
1 .5VS
1.5VS
C60 1
C545
1U_ 6.3V_04
0.01U_16 V_X7R_ 04
AC18
AC19
AC21
R259
*10mil_short
G10
G9
1.5VS
VCCGLANPLL
C246
C469
0.1U_10V_X7R_0 4
0.1U_10V_X7R_0 4
AC12
AC13
AC14
AJ5
1.5VS
C60 2
0.1U_1 0V_X7 R_04
3.3VS
C540
VCCGLAN3_ 3
0.1U_10V_X7R_0 4
0.1 U_10V_ X7R_04
TP_VCCLAN105_ ICH1
TP_VCCLAN105_ ICH2
10m il s
10m il s
VCCGLANPLL
VCC1_5 _B
C184
C18 3
0.1 U_10V_ X7R_04
0. 1U_10V_X7R_04
VCCGLAN3_3
A10
A11
A12
B12
A27
D28
D29
E26
E27
10m il s
A26
V_CPU_IO[ 1]
V_CPU_IO[ 2]
AB23
AC23
VCC3_3[ 2]
AJ6
VCC3_3[ 7]
AC10
VCC3_3[ 3]
VCC3_3[ 4]
VCC3_3[ 5]
VCC3_3[ 6]
AD19
AF20
AG24
AC20
VCC1_5_A[1]
VCC1_5_A[2]
VCC1_5_A[3]
VCC1_5_A[4]
VCC1_5_A[5]
VCC1_5_A[6]
VCC1_5_A[7]
VCC1_5_A[8]
VCC1_5_A[9]
VCC1_5_A[10 ]
VCC1_5_A[11 ]
VCC1_5_A[12 ]
VCC1_5_A[13 ]
VCC1_5_A[14 ]
VCC1_5_A[15 ]
VCC1_5_A[16 ]
VCCHDA
VCCSUSHDA
VCCSUS1_05[ 1]
VCCSUS1_05[ 2]
VCCSUS1_5[ 1]
VCCSUS1_5[ 2]
VCC1_5_A[17 ]
VCCSUS3_3[ 5]
VCC1_5_A[18 ]
VCC1_5_A[19 ]
VCC1_5_A[20 ]
VCC1_5_A[21 ]
VCC1_5_A[22 ]
VCC1_5_A[23 ]
VCC1_5_A[24 ]
VCC1_5_A[25 ]
VCCUSBPLL
VCC1_5_A[26 ]
VCC1_5_A[27 ]
VCC1_5_A[28 ]
VCC1_5_A[29 ]
VCC1_5_A[30 ]
VCCLAN1_05[1]
VCCLAN1_05[2]
VCCSUS3_3[ 6]
VCCSUS3_3[ 7]
VCCSUS3_3[ 8]
VCCSUS3_3[ 9]
VCCSUS3_3[1 0]
VCCSUS3_3[1 1]
VCCSUS3_3[1 2]
VCCSUS3_3[1 3]
VCCSUS3_3[1 4]
VCCSUS3_3[1 5]
VCCSUS3_3[1 6]
VCCSUS3_3[1 7]
VCCSUS3_3[1 8]
VCCSUS3_3[1 9]
VCCSUS3_3[2 0]
VCCCL1 _05
VCCCL 1_5
VCCCL3_3[ 1]
VCCCL3_3[ 2]
VCCLAN3_3[1]
VCCLAN3_3[2]
100U_6.3 V_B2
AJ3
L3 3
HCB1005 KF-121T2 0
1.5VS
C448
C46 4
*10U_10V_08
0. 1U_10V_X7R_04
VCCDMI
L1 2
HCB1005 KF-121T2 0
10m il s
1.05VS
C212
4. 7U_6.3V_X5R_ 06
10m il s
1.05VS
C229
C21 7
C225
0.1 U_10V_X7R_04
0. 1U_10V_X7R_04
*4. 7U_6.3V_X5R_0 6
C244
C24 9
C250
0.1 U_10V_X7R_04
0. 1U_10V_X7R_04
0.1U_10V_X7R_0 4
C465
0. 1U_10V_X7R_04
C554
0. 1U_10V_X7R_04
C239
0. 1U_10V_X7R_04
40m il s
Sheet 16 of 40
ICH9-M 4/5 - Power
3.3VS
C55 9
0.1U_10V_X7R_0 4
C56 4
0.1U_10V_X7R_0 4
1 0m ils
3. 3VS
3. 3V
AC8
TP_VCCSUS1 05_ICH1
F17
TP_VCCSUS1 05_ICH2
AD8
TP_VCCSUS1 5_ICH1
F18
TP_VCCSUS1 5_ICH2
1 0m ils
C599
0.1 U_10V_X7R_04
10m il s
A18
D16
D17
E22
C600
0.1 U_10V_X7R_04
AF1
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7
10m il s
G22
TP_VCCCL_ 105
G23
TP_VCCCL_ 15
A24
B24
30m il s
C248
C584
3 .3V
C247
0.0 22U_16V_X7R_04
0.022U_1 6V_X7R_04
0.1 U_10V_X7R_04
C214
0. 1U_10V_X7R_04
1 0m ils
10m il s
3 .3VS
C603
VCCGLANPLL
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCSUS3_3[ 1]
VCCSUS3_3[ 2]
VCCSUS3_3[ 3]
VCCSUS3_3[ 4]
C224
1U_ 6.3V_04
10m il s
B9
F9
G3
G6
J2
J7
K7
AJ4
1.05VS
C24 0
0.1 U_10V_X7R_04
VCCDMIPLL
AG29
VCCSATAPLL
C208
C20 7
*0.1U_10V_X7R_0 4
*1U_6. 3V_0 4
0.1 U_10V_X7R_04
GLAN POWER
C473
10 mi ls
3.3VS
R270
*10mil_short
0.1U_10V_X7R_0 4
AA7
AB6
AB7
AC6
AC7
W23
Y23
VCC3_3[ 8]
VCC3_3[ 9]
VCC3_3[1 0]
VCC3_3[1 1]
VCC3_3[1 2]
VCC3_3[1 3]
VCC3_3[1 4]
1.7 A
C241
R29
VCC_DMI[ 1]
VCC_DMI[ 2]
VCC3_3[ 1]
USB CORE
C242
VCCDMIPLL
ATX
1U_16V_X5R_06
C22 6
AJ19
VCC1_5_B[1]
VCC1_5_B[2]
VCC1_5_B[3]
VCC1_5_B[4]
VCC1_5_B[5]
VCC1_5_B[6]
VCC1_5_B[7]
VCC1_5_B[8]
VCC1_5_B[9]
VCC1_5_B[10 ]
VCC1_5_B[11 ]
VCC1_5_B[12 ]
VCC1_5_B[13 ]
VCC1_5_B[14 ]
VCC1_5_B[15 ]
VCC1_5_B[16 ]
VCC1_5_B[17 ]
VCC1_5_B[18 ]
VCC1_5_B[19 ]
VCC1_5_B[20 ]
VCC1_5_B[21 ]
VCC1_5_B[22 ]
VCC1_5_B[23 ]
VCC1_5_B[24 ]
VCC1_5_B[25 ]
VCC1_5_B[26 ]
VCC1_5_B[27 ]
VCC1_5_B[28 ]
VCC1_5_B[29 ]
VCC1_5_B[30 ]
VCC1_5_B[31 ]
VCC1_5_B[32 ]
VCC1_5_B[33 ]
VCC1_5_B[34 ]
VCC1_5_B[35 ]
VCC1_5_B[36 ]
VCC1_5_B[37 ]
VCC1_5_B[38 ]
VCC1_5_B[39 ]
VCC1_5_B[40 ]
VCC1_5_B[41 ]
VCC1_5_B[42 ]
VCC1_5_B[43 ]
VCC1_5_B[44 ]
VCC1_5_B[45 ]
VCC1_5_B[46 ]
VCC1_5_B[47 ]
VCC1_5_B[48 ]
VCC1_5_B[49 ]
ARX
C59 7
V5REF_SUS
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
VCCGLAN3_3
I CH9M-NH82801I BM
[ 19,21 ,28.. 31] 5 V
[12,1 3,19,2 1,24, 25,27] 5VS
[2,12 ..15, 17,19, 20,23, 29,30] 3.3 V
[ 5,8. .15,18 ..27, 31] 3 .3VS
[ 3,8, 13,14, 19,20, 29] 1 .5VS
[ 2..5, 7,8,1 3,29] 1.05VS
[ 13] RTCVCC
ICH9-M 4/5 - Power B - 17
B.Schematic Diagrams
3. 3VS
C19 0
0.1 U_10V_ X7R_04
VCC1_05[ 1]
VCC1_05[ 2]
VCC1_05[ 3]
VCC1_05[ 4]
VCC1_05[ 5]
VCC1_05[ 6]
VCC1_05[ 7]
VCC1_05[ 8]
VCC1_05[ 9]
VCC1_05[1 0]
VCC1_05[1 1]
VCC1_05[1 2]
VCC1_05[1 3]
VCC1_05[1 4]
VCC1_05[1 5]
VCC1_05[1 6]
VCC1_05[1 7]
VCC1_05[1 8]
VCC1_05[1 9]
VCC1_05[2 0]
VCC1_05[2 1]
VCC1_05[2 2]
VCC1_05[2 3]
VCC1_05[2 4]
VCC1_05[2 5]
VCC1_05[2 6]
V5REF
VCCA 3GP
5VS
C195
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25
VCCRTC
CORE
A6
VCCP _CORE
C211
PCI
C201
VCCPSU S
A23
C20 0
VCCPUS B
2 0m ils
RTCVCC
Schematic Diagrams
ICH9-M 5/5 - GND
VSS_ NCTF[1 ]
VSS_ NCTF[2 ]
VSS_ NCTF[3 ]
VSS_ NCTF[4 ]
VSS_ NCTF[5 ]
VSS_ NCTF[6 ]
VSS_ NCTF[7 ]
VSS_ NCTF[8 ]
VSS_ NCTF[9 ]
VSS_N CTF[10 ]
VSS_N CTF[11 ]
VSS_N CTF[12 ]
3. 3V
C27 2
14
*0.1 U_1 6V_04
1
[15 ,26 ] R SMRST#
3
2
SLP_S3#
SUSB#
[ 20, 23, 26, 27,2 9]
R10 9
*10mil_sh ort
SU SC # [ 26]
3. 3V
14
SL P_ S4#
SYS_PWROK
9
1. 8V_PWRGD
10
U 8C
7 4LVC08 PW
8
SB_ PW ROK [ 15]
R 154
C26 7
*1 0K_04
*0.1 U_1 6V_04
7
[15 ]
3. 3V
[29]
[5 ,31 ]
U 8B
7 4LVC08 PW
4
1 .5VS_PWRG D
6
SY S_ PWR OK
5
DELAY_PWRGD
3. 3V
[30 ]
1.8 V_ PW RGD
[29 ]
1.0 5VM_PWRGD
1. 8V_PWRGD
U 8D
7 4LVC08 PW
12
11
13
CL_ PW ROK [ 5,1 2,1 5,2 6]
R 156
A1
A2
A2 8
A2 9
AH 1
AH 29
AJ 1
AJ 2
AJ 28
AJ 29
B1
B2 9
I CH9M-NH8 2801 IBM
[2, 12. .16 ,19 ,20, 23, 29, 30]
B - 18 ICH9-M 5/5 - GND
U 8A
7 4LVC08 PW
7
[ 15]
14
H5
J23
J26
J27
AC 22
K2 8
K2 9
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P1 2
P1 3
P1 4
P1 5
P1 6
P1 7
P2
P2 3
P2 8
P2 9
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B2 6
U12
U13
U14
U15
U16
U17
AD 23
U26
U27
U3
V1
V1 3
V1 5
V2 3
V2 8
V2 9
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG 28
AH 6
AF2
B2 5
7
VSS[ 107 ]
VSS[ 108 ]
VSS[ 109 ]
VSS[ 110 ]
VSS[ 111 ]
VSS[ 112 ]
VSS[ 113 ]
VSS[ 114 ]
VSS[ 115 ]
VSS[ 116 ]
VSS[ 117 ]
VSS[ 118 ]
VSS[ 119 ]
VSS[ 120 ]
VSS[ 121 ]
VSS[ 122 ]
VSS[ 123 ]
VSS[ 124 ]
VSS[ 125 ]
VSS[ 126 ]
VSS[ 127 ]
VSS[ 128 ]
VSS[ 129 ]
VSS[ 130 ]
VSS[ 131 ]
VSS[ 132 ]
VSS[ 133 ]
VSS[ 134 ]
VSS[ 135 ]
VSS[ 136 ]
VSS[ 137 ]
VSS[ 138 ]
VSS[ 139 ]
VSS[ 140 ]
VSS[ 141 ]
VSS[ 142 ]
VSS[ 143 ]
VSS[ 144 ]
VSS[ 145 ]
VSS[ 146 ]
VSS[ 147 ]
VSS[ 148 ]
VSS[ 149 ]
VSS[ 150 ]
VSS[ 151 ]
VSS[ 152 ]
VSS[ 153 ]
VSS[ 154 ]
VSS[ 155 ]
VSS[ 156 ]
VSS[ 157 ]
VSS[ 158 ]
VSS[ 159 ]
VSS[ 160 ]
VSS[ 161 ]
VSS[ 162 ]
VSS[ 163 ]
VSS[ 164 ]
VSS[ 165 ]
VSS[ 166 ]
VSS[ 167 ]
VSS[ 168 ]
VSS[ 169 ]
VSS[ 170 ]
VSS[ 171 ]
VSS[ 172 ]
VSS[ 173 ]
VSS[ 174 ]
VSS[ 175 ]
VSS[ 176 ]
VSS[ 177 ]
VSS[ 178 ]
VSS[ 179 ]
VSS[ 180 ]
VSS[ 181 ]
VSS[ 182 ]
VSS[ 183 ]
VSS[ 184 ]
VSS[ 185 ]
VSS[ 186 ]
VSS[ 187 ]
VSS[ 188 ]
VSS[ 189 ]
VSS[ 190 ]
VSS[ 191 ]
VSS[ 192 ]
VSS[ 193 ]
VSS[ 194 ]
VSS[ 195 ]
VSS[ 196 ]
VSS[ 197 ]
VSS[ 198 ]
14
Sheet 17 of 40
ICH9-M 5/5 - GND
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10 ]
VSS[11 ]
VSS[12 ]
VSS[13 ]
VSS[14 ]
VSS[15 ]
VSS[16 ]
VSS[17 ]
VSS[18 ]
VSS[19 ]
VSS[20 ]
VSS[21 ]
VSS[22 ]
VSS[23 ]
VSS[24 ]
VSS[25 ]
VSS[26 ]
VSS[27 ]
VSS[28 ]
VSS[29 ]
VSS[30 ]
VSS[31 ]
VSS[32 ]
VSS[33 ]
VSS[34 ]
VSS[35 ]
VSS[36 ]
VSS[37 ]
VSS[38 ]
VSS[39 ]
VSS[40 ]
VSS[41 ]
VSS[42 ]
VSS[43 ]
VSS[44 ]
VSS[45 ]
VSS[46 ]
VSS[47 ]
VSS[48 ]
VSS[49 ]
VSS[50 ]
VSS[51 ]
VSS[52 ]
VSS[53 ]
VSS[54 ]
VSS[55 ]
VSS[56 ]
VSS[57 ]
VSS[58 ]
VSS[59 ]
VSS[60 ]
VSS[61 ]
VSS[62 ]
VSS[63 ]
VSS[64 ]
VSS[65 ]
VSS[66 ]
VSS[67 ]
VSS[68 ]
VSS[69 ]
VSS[70 ]
VSS[71 ]
VSS[72 ]
VSS[73 ]
VSS[74 ]
VSS[75 ]
VSS[76 ]
VSS[77 ]
VSS[78 ]
VSS[79 ]
VSS[80 ]
VSS[81 ]
VSS[82 ]
VSS[83 ]
VSS[84 ]
VSS[85 ]
VSS[86 ]
VSS[87 ]
VSS[88 ]
VSS[89 ]
VSS[90 ]
VSS[91 ]
VSS[92 ]
VSS[93 ]
VSS[94 ]
VSS[95 ]
VSS[96 ]
VSS[97 ]
VSS[98 ]
VSS[99 ]
VSS[10 0]
VSS[10 1]
VSS[10 2]
VSS[10 3]
VSS[10 4]
VSS[10 5]
VSS[10 6]
7
B.Schematic Diagrams
U2 3E
AA2 6
AA2 7
AA3
AA6
AB1
AA2 3
AB2 8
AB2 9
AB4
AB5
AC1 7
AC2 6
AC2 7
AC3
AD1
AD1 0
AD1 2
AD1 3
AD1 4
AD1 7
AD1 8
AD2 1
AD2 8
AD2 9
AD4
AD5
AD6
AD7
AD9
AE1 2
AE1 3
AE1 4
AE1 6
AE1 7
AE2
AE2 0
AE2 4
AE3
AE4
AE6
AE9
AF1 3
AF1 6
AF1 8
AF2 2
AH2 6
AF2 6
AF2 7
AF5
AF7
AF9
AG1 3
AG1 6
AG1 8
AG2 0
AG2 3
AG3
AG6
AG9
AH1 2
AH1 4
AH1 7
AH1 9
AH2
AH2 2
AH2 5
AH2 8
AH5
AH8
AJ1 2
AJ1 4
AJ1 7
AJ 8
B1 1
B1 4
B1 7
B2
B2 0
B2 3
B5
B8
C2 6
C2 7
E1 1
E1 4
E1 8
E2
E2 1
E2 4
E5
E8
F1 6
F2 8
F2 9
G1 2
G1 4
G1 8
G2 1
G2 4
G2 6
G2 7
G8
H2
H2 3
H2 8
H2 9
3 .3V
*1 0K_04
Schematic Diagrams
Clock Generator
CLOCK GENERATOR
Layout note:
3 .3 VS
Insatlled: Differential clock
level is higher
3 . 3 V M_ C L K
L39
R 29 6
H C B 1 60 8 K F -1 21 T 2 5
PLACE CRYSTAL WITHIN
500 MILS OF
ICS9LPR363EGLF
R 2 95
3 0 0_ 1 % _0 4
C 49 2
C 49 7
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
C L K _ C P U _B C L K
C L K _ C P U _B C L K #
C 48 4
C 48 8
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
CL K_ P CIE _ IC H
CL K_ P CIE _ IC H#
C 50 1
C 50 7
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
C L K _ P C I E _ J M3 8 0
C L K _ P C I E _ J M3 8 0#
C 54 1
C 54 2
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
CL K_ P CIE _ M INI
CL K_ P CIE _ M INI#
C 50 5
C 50 9
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
C L K _ P C I E _ G LA N
C L K _ P C I E _ G LA N #
C 54 4
C 54 3
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
C L K _ MC H _ B C L K [ 4 ]
C L K _ MC H _ B C L K # [ 4 ]
CL K_ S A T A
CL K_ S A T A #
C 52 8
C 53 3
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
C L K _ C P U _ B C LK [ 2 ]
C L K _ C P U _ B C LK #
[ 2]
C L K _ P C I E _ M I N I _ 3G
C L K _ P C I E _ M I N I _ 3G #
C 51 2
C 51 9
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
C L K _ P C I E _ N E W _C A R D
C L K _ P C I E _ N E W _C A R D #
C 53 7
C 53 6
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
C L K _ P C I E _ 3 GP L L
C L K _ P C I E _ 3 GP L L #
C 49 8
C 49 9
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
CL K_ DR E F S S
CL K_ DR E F S S #
C 49 0
C 49 4
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
CL K_ DR E F
CL K_ DR E F #
C 48 1
C 48 7
*1 0P _ 5 0 V _0 4
*1 0P _ 5 0 V _0 4
3 . 3V M _ C L K
30mils
C5 3 4
C 51 1
C 49 1
C 5 02
C 5 32
1 0 U _ 10 V _ 0 8
1 U _ 6 . 3 V _0 4
0 . 1 U _ 1 0V _ X 7 R _ 0 4
0 . 1 U _ 1 0V _X 7 R _ 0 4 0 . 1 U _ 10 V _ X 7R _0 4
C 4 82
C4 6 7
C 46 8
C 47 8
0. 1 U _1 0 V _X 7 R _ 0 4
1U _ 6. 3 V _ 0 4
0 . 1 U _ 1 0V _ X 7 R _ 04
* 10 U _1 0 V _0 8
3 . 3 V M_ C L K
27 P _ 5 0V _ 0 4
27 P _ 5 0V _ 0 4
[2 ,4 ]
C 5 00
C4 8 0
1 0 U _ 1 0V _0 8
1 U _6 . 3 V _ 04
0 . 1 U _ 10 V _ X 7R _0 4
C LK _ I C H 4 8
[1 5 ]
C LK _ I C H 1 4
11
45
58
X TA L _ I N
X TA L _ OU T
57
FSL A
12
2. 2 K _ 0 4
R2 7 9
33 _ 0 4
C L K _ I C H 14
R2 7 2
33 _ 0 4
R E F _ 1 4 . 31 8 M
60
R2 6 9
10 K _ 0 4
FSL C
61
C LK _ B S E L 2
62
63
[ 15 ] P M_ S T P C P U #
[ 1 5 ] P M _S T P P C I #
R2 5 3
[ 2 6]
P C L K _ TP M
P CL K _ K B C
[1 4 ]
[ 1 0 , 1 1, 1 5 ]
[ 1 0 , 1 1, 1 5 ]
[ 1 5]
P C LK _ I C H 3 3
S E L P C I E X 0 _ LC D #
5
P CL K _ T P M
R2 6 6
*3 3 _0 4
Z 1 70 3
4
P CL K _ K B C
R2 6 7
33 _ 0 4
Z 1 70 4
3
3 .3 V S
P C L K _ I C H 33
R2 6 8
10 K _ 0 4
RE Q _ SE L
R2 7 1
33 _ 0 4
S E L L CD_ 2 7 #
9
R2 6 5
10 K _ 0 4
I T P _E N
8
64
54
55
I C H _ S MB C L K 0
I C H _ S MB D A T 0
10
CL K _ P W RG D
3 .3 V S
R2 8 2
1
7
56
C P U T _ L 1F
C P U C _ L 1F
C P U T_ L 0
CP U C_ L 0
X1
X2
P C I e T _L 8 / C P U I TP T_ L 2
P C I e C _ L8 / C P U I T P C _ L 2
*1 0 0K _ 0 4
F S L A / U S B _4 8 MH z
P C I e T_ L 6
P CIe C_ L 6
R E F 0_ 1 4 . 31 8 M
R E F 1/ F S LC / TE S T_ S E L
P C I e T_ L 5
P CIe C_ L 5
C P U _ S T OP #
P C I / P C I E X _ S T OP #
P C I e T_ L 4
P CIe C_ L 4
P C I C L K 3 / *S E L P C I E X 0 _ LC D #
S A T A CL KT _ L
S A TA C L K C _ L
P C I e T_ L 3
P CIe C_ L 3
*P E R E Q4 #
P C ICL K 2
P C ICL K 1
P C I e T_ L 2
P CIe C_ L 2
*P E R E Q3 #
* *P C I C L K 0/ R E Q_ S E L
* S E LL C D _ 27 # / P C I C L K _F 5
P C I C L K _ F 4/ I T P _ E N
S C LK
S D A TA
P C I e T_ L 1
P CIe C_ L 1
* P W RS AV E #
2 7F I X/ L C D _ S S C G T/ P C I e T_ L 0
2 7 S S / L C D _ S S C GC / P C I e C _ L 0
F S L B / T E S T_ M OD E
V T T _P W R _ GD / P D #
G ND
GN D
G ND
GN D
G ND
[ 1 9]
*1 0 K _0 4
V D D4 8
V D DA
P C I e T _L 7 / P E R E Q1 #
P C I eC _L 7 / P E R E Q2 #
R2 8 4
C L K _ I C H 48
C LK _ B S E L 0
[1 5 ]
[2 ,4 ]
C 5 35
VR EF
C 4 71
U2 2
VDD PCI
V D DP C I
V DD RE F
1 4 . 3 18 M H z
C 4 72
GN D A
GN D
GN D
2
V D DP C IE X
V DD P CIE X
V D DP C IE X
V DD CP U
21
28
42
50
X3
1
47
20mils
P C I e T _ L9 / D O T T_ 9 6 MH z L
P C I e C _ L 9/ D OT C _ 9 6 MH z L
49
48
Z 17 1 0
Z 17 1 1
1
2
4 R N2 4
C LK _ MC H _ B C LK
3 4 P 2 R X 3 3 _0 4 C LK _ MC H _ B C LK #
52
51
Z 17 1 2
Z 17 1 3
1
2
C LK _ C P U _ B C L K
4 R N2 2
3 4 P 2 R X 3 3 _0 4 C LK _ C P U _ B C L K #
44
43
Z 17 1 4
Z 17 1 5
3
4
2 R N2 6
C LK _ P C I E _I C H
1 4 P 2 R X 3 3 _0 4 C LK _ P C I E _I C H #
41
40
Z 17 3 8
Z 17 4 0
R 30 6
R 30 7
39
38
Z 17 1 8
Z 17 1 9
1
2
4 R N3 0
C LK _ P C I E _N E W _ C A R D
3 4 P 2 R X 3 3 _0 4 C LK _ P C I E _N E W _ C A R D #
36
35
Z 17 4 1
Z 17 4 2
1
2
4 R N3 1
C LK _ P C I E _G L A N
3 4 P 2 R X 3 3 _0 4 C LK _ P C I E _G L A N #
30
31
Z 17 2 2
Z 17 2 3
2
1
C LK _ P C I E _J M 38 0
3 R N3 2
4 4 P 2 R X 3 3 _0 4 C LK _ P C I E _J M 38 0 #
26
27
Z 17 2 4
Z 17 2 5
4
3
1 R N2 9
C LK _ S A T A
2 4 P 2 R X 3 3 _0 4 C LK _ S A T A #
24
25
33
Z 17 2 6
Z 17 2 7
4
3
C LK _ P C I E _M I N I _ 3 G
1 R N2 8
2 4 P 2 R X 3 3 _0 4 C LK _ P C I E _M I N I _ 3 G#
22
23
32
Z 17 2 8
Z 17 2 9
4
3
1 R N2 7
C LK _ P C I E _M I N I
2 4 P 2 R X 3 3 _0 4 C LK _ P C I E _M I N I #
19
20
34
Z 17 3 0
Z 17 3 1
4
3
1 R N2 5
C LK _ P C I E _3 G P LL
2 4 P 2 R X 3 3 _0 4 C LK _ P C I E _3 G P LL #
17
18
16
Z 17 3 2
Z 17 3 3
F S LB
4
3
1 R N2 3
C LK _ D R E F S S
2 4 P 2 R X 3 3 _0 4 C LK _ D R E F S S #
R2 9 3
14
15
Z 17 3 5
Z 17 3 6
4
3
CL K _ P CIE _ ICH [1 4 ]
C L K _ P C I E _ I C H # [ 1 4]
4 75 _ 1 %_ 0 4
4 75 _ 1 %_ 0 4
S A TA _C LK R E Q#
MC H _ C L K R E Q #
[ 15 ]
[5 ]
C L K _P C I E _ N E W _ C A R D [ 2 0]
C L K _P C I E _ N E W _ C A R D #
[ 20 ]
C L K _ P C I E _ GL A N [ 2 3]
C L K _ P C I E _ GL A N #
[ 23 ]
C L K _ P C I E _ J M3 80
[ 22 ]
C L K _ P C I E _ J M3 80 # [ 2 2 ]
C L K _ S A TA [ 1 3]
C L K _ S A TA #
[ 13 ]
C L K _ P C I E _ MI N I _3 G [ 1 9 ]
C L K _ P C I E _ MI N I _3 G # [ 1 9]
LA N _ C L K R E Q # [ 2 3]
C L K _ P C I E _ MI N I [ 2 0 ]
C L K _ P C I E _ MI N I # [ 2 0]
W LA N _ C L K R E Q # [ 1 9, 2 0 ]
C L K _ P C I E _ 3 GP L L [ 5 ]
C L K _ P C I E _ 3 GP L L # [ 5]
C L K _ I C H 48
C 47 4
*1 0P _ 5 0 V _0 4
P CL K _ K B C
C 45 0
*1 0P _ 5 0 V _0 4
P C L K _ I C H 33
C 46 6
*1 0P _ 5 0 V _0 4
P CL K _ T P M
C 44 9
*1 0P _ 5 0 V _0 4
C L K _ I C H 14
C 47 5
*1 0P _ 5 0 V _0 4
Sheet 18 of 40
Clock Generator
Layout note:
Place termination close
to ICS9LPR363DGLF
CL K _ DRE F SS [5 ]
CL K _ DRE F SS # [5 ]
*1 0 m li _ sh o rt
CL K _ B S E L 1
1 R N2 1
C LK _ D R E F
2 4 P 2 R X 3 3 _0 4 C LK _ D R E F #
[2 ,4 ]
CL K _ DRE F
[5 ]
C L K _ D R E F # [ 5]
46
53
59
2
6
13
29
37
I C S 9 L P R 3 63 E G LF
Pin5
FS LC
FS LB
F SL A
C K5 05
BS EL2
BS EL1
B SE L0
106 6 MHz
Red words must be controlled by BIOS
0
0
0
H os t Clo ck
Fr eq uen cy
26 6 MHz
0
1
0
20 0 MHz
800 M Hz
0
1
1
16 6 MHz
667 M Hz
SAT A_CL KREQ#
(PEREQ1 #)
PCI ECLK 6 (NEW CARD)
WL AN_C LKREQ #
(PEREQ3 #)
PCI ECLK 2 (M INI )
SAT ACL K
PCI ECLK 4 (J M3 85 )
M CH_CL KREQ #
(PEREQ2 #)
PCIECL K 1 ( 3GP LL )
L AN_CL KREQ #
(PEREQ4 #)
PCIECL K 3 ( MI NI_ 3G )
Pin9
Pin14/15
Pin17/18
SELPCIEX0_LCD#/
SELLCD_27#=0
PCIEX9
27FIX/SS
PCI3 = 0 (low)
SELLCD_27#=1
DOT96
LCD(96MHz)
SELPCIEX0_LCD#/
SELLCD_27#=0
PCIEX9
PCIEX0
PCI3 = 1 (high)
SELLCD_27#=1
DOT96
PCIEX0
Default
PCIECL K 8 ( ICH)
PCIECL K 5 ( GL AN)
[ 5 , 8 . . 16 , 1 9. . 27 , 3 1]
3 . 3V S
Clock Generator B - 19
B.Schematic Diagrams
C L K _ MC H _ B C L K
C L K _ MC H _ B C L K #
1 K _ 1% _ 0 4
40mils
Layout note:
Schematic Diagrams
Multi I/O, ODD, CCD, BT, TPM
SATA ODD
TPM 1.2
Layout Note
SATA SINGAL FROM SB TO JODDB1
END OF JODD1
FOR M720T
[ 1 8]
J _O D D _ 7 3
S1
S2
S3
S4
S5
S6
S7
S A T A _ TX P 1
S A T A _ TX N 1
S A T A _ TX P 1
S A T A _ TX N 1
S A T A _ RX N1
S A T A _ RX P 1
P1
P2
P3
P4
P5
P6
S A T A _ RXN1
S A T A _ RXP 1
O D D _ D E T E C T#
1
2
3
4
5
6
7
8
9
10
11
12
[1 3 ]
[ 13 ]
[1 3 ]
[ 1 3]
5 VS
TO SB GPIO
O D D _ D E T E C T#
[1 5 ]
1.6A
[ 1 3 , 26 ]
[ 1 3 , 26 ]
[ 1 3 , 26 ]
[ 1 3 , 26 ]
S A T A _ TX P 1
S A T A _ TX N 1
S A T A _ RX N1
S A T A _ RX P 1
LP C
LP C
LP C
LP C
_A D
_A D
_A D
_A D
26
23
20
17
0
1
2
3
21
P C L K _ TP M
22
16
27
15
[ 1 3 , 26 ] L P C _F R A ME #
[ 5 , 14 ] P LT _ R S T #
[ 15 , 2 6 ] S E R I R Q
[ 1 5] P M_ C L K R U N #
[ 1 5]
28
L P CP D#
OD D _ D E T E C T #
5V S
T P M_ B A D D
9
T P M_ P P
7
1
3
12
*8 5 20 5 -1 2
C 20 5
C1 9 9
C 2 19
C1 9 8
C2 1 6
0 . 1 U _ 16 V _ 04
0 . 1U _1 6 V _ 04
1U _1 0 V _ 06
1 0U _ 10 V _ 08
*1 0 0U _6 . 3 V _B 2
8
C 1 8 53 5 -11 3 0 5-L
U7
LA D
LA D
LA D
LA D
V DD1
V DD2
V DD3
0
1
2
3
10
19
24
3. 3V S
LF R A ME #
LR E S E T #
SE RIR Q
CL K RU N#
VSB
C 26 6
C 26 9
C 2 65
*0 . 1 U _ 1 6V _ 0 4
* 0. 1 U _ 1 6V _0 4
* 0. 1 U _1 6 V _0 4
*1 U _ 10 V _ 06
5
3 . 3V
C5 8 1
LP C P D #
G P IO
GP I O2
TE S T B I / B A D D
X TA L I
*0 . 1 U _ 1 6V _ 0 4
6
2
13
X2
* 3 2. 7 6 8K H z
4
1
3
2
PP
XT A L O
NC_ 1
NC_ 2
NC_ 3
GN D _1
GN D _2
GN D _3
GN D _4
TE S T I
14
4
11
18
25
*S L B 9 6 35 T T
Sheet 19 of 40
Multi I/O, ODD,
CCD, BT, TPM
C5 8 7
TPM
LC LK
C2 7 1
C 27 0
*1 5 P _ 50 V _ 04
* 15 P _ 50 V _ 0 4
Asserted before entering S3
LPC reset timing:
LPCPD# inactive to LRST# inactive 32~96us
Bluetooth
HI
TPM _P P
3. 3 V
L2 0
H C B 1 0 05 K F -1 2 1T 2 0
3 VS_ BT
50m il
TPM _B ADD
US B _ PN9 _ B T
U S B _ P P 9 _B T
[ 2 6] B T_ D E T#
3 .3 V S
C2 9 0
0 . 1 U _ 16 V _ 04
1 0U _1 0 V _0 8
1 0 0K _ 0 4
HI
( De fau lt )
: 4E / 4F h
TP M _P P
R 1 47
*1 0 K _0 4
TP M _B A D D
R 1 52
*1 0 K _0 4
R 1 51
*1 0 K _0 4
R 1 53
*3 3 _0 4
P C L K _ TP M
6
[1 4 ]
3 . 3V
1 .5 V S
3 .3 V S
R 11
60 mil
Q 15
2 N 7 0 02 W
R 13
U S B _O C # 3
5V
87 2 12 -0 6 G0
C2 7 6
C 5
C2 8 8
0. 1 U _1 6 V _0 4
0 . 1 U _ 16 V _ 0 4
0 . 1U _1 6 V _0 4
C3 2
4
U1
3
1U _ 10 V _ 06
H C B 1 00 5 K F -1 21 T 20
C 4
1 0 U _ 10 V _ 08
S
C 2 77
0 . 1 U _ 16 V _ 04
Z 1 9 07
Z 1 9 08
5 V _C C D
Q1 3
A O3 40 9
D
V IN
V OU T
V IN
V OU T
GN D
R T 9 70 1 -C P L
R 1 65
C 27 4
C2 7 5
1 0 0 K _0 4
0 . 1 U _ 16 V _ 0 4
1 0U _1 0 V _ 08
3 .3 VS= 1. 5A 3 . 3V S
J_CCD1
1
5
R1 6 8
1 00 K _ 0 4
33 0 K _ 04
Z 1 9 09
[ 26 ]
C C D _E N
Q1 4
2 N 7 0 02 W
G
J _C C D 1
[ 14 ]
[ 14 ]
D
R1 6 9
US B _ P N7 _ CCD
U S B _ P P 7 _C C D
[ 2 6] C C D _ D E T #
1
2
3
4
5
8 52 0 4 -05 0 01
[ 2 6 ] L E D _ N U M#
[ 2 6] LE D _ C A P #
[ 1 3 ] S A T A _ LE D #
[ 3 0] M_ B T N #
[ 26 ] 3 G _D E T#
[1 3 ] M DC_ A Z _ S DO UT
[1 3 ] M DC_ A Z _ S Y N C
[ 13 ] A Z _S D I N 1
[ 1 3] MD C _A Z _R S T#
[1 3 ] M DC_ A Z _ B IT CL K
[2 5 ] S P K O UT R+
[ 2 5] S P K OU TR -
1
3
5
7
9
11
13
15
17
19
21
23
25
27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
U S B V CC 2
3 .3 V
L E D _ T H R OT TL E # [ 2 6 ]
L E D _ S C R OL L # [ 26 ]
1 .5 V S
W L A N _ C L K R E Q# [ 1 8 , 20 ]
3 G_ E N [ 2 1, 2 6 ]
A P K E Y # [ 3 0]
W E B _ E MA I L# [ 2 6 ]
W E B _ W W W # [2 6 ]
L I D _ S W # [ 1 2 , 26 ]
5 F 1 -2 33 A 1 -A 2 00 0 -21 4
From H8 default HI
[ 16 , 2 1, 2 8 . . 31 ] 5V
[ 1 2 , 13 , 1 6, 21 , 2 4, 2 5 , 27 ] 5V S
[ 2 , 1 2. . 1 7 , 2 0, 2 3 , 29 , 3 0] 3 . 3V
[ 5 , 8. . 1 6 , 18 , 2 0 . . 27 , 3 1] 3 . 3V S
[ 3 , 8, 1 3 , 14 , 1 6 , 20 , 2 9] 1 . 5V S
B - 20 Multi I/O, ODD, CCD, BT, TPM
*1 0P _ 5 0V _ 0 4
2 0 0K _ 1 %_ 0 4
1
1 0 0K _ 1 %_ 0 4
US B V C C2
5
C 16
C 15
C2 0
2
0 . 1 U _ 1 6V _ 0 4
0 . 1 U _ 16 V _ 04
*1 0 U _ 10 V _ 0 8
J _ MF B 2
J_ MF B 1
48 mil
G
L18
C 2 68
60 mil
CCD
5V
3 .3 V S
MULTI I/O CONN
J_BT1
1
G
BT_ EN
S
[ 2 1, 2 6 ]
1
2
3
4
5
6
B T _ E N#
D
R1 7 7
( De fau lt )
L OW : 2E / 2F h
C2 8 9
J _B T 1
[ 14 ]
[ 14 ]
: ACC ES S
L OW : NOR MA L
S
B.Schematic Diagrams
J _O D D _ 7 2
FOR M730T
[ 18 ] C LK _ P C I E _M I N I _ 3G #
[ 18 ] C LK _ P C I E _M I N I _ 3 G
[ 1 4] P C I E _ R X N 3 _ 3 G
[ 14 ] P C I E _ R X P 3_ 3 G
[ 14 ] P C I E _ TX N 3 _ 3 G
[ 14 ] P C I E _ TX P 3 _ 3G
[ 1 5, 2 0 , 23 ] P C I E _ W A K E #
[ 1 4 , 20 , 2 2 , 23 , 2 6] B U F _ P L T_ R S T#
[ 1 8, 2 0 ] W L A N _ C L K R E Q#
[ 14 ] U S B _ P N 5 _ 3G
[ 1 4 ] U S B _P P 5 _ 3 G
[ 1 4]
[ 1 4]
US B _ P N3
US B _ P P 3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
5 F 1 -23 3 A 1 -A 20 0 0-2 1 4
Schematic Diagrams
New Card, Mini PCIE
3 .3 VS
C 4 46
*0 . 1 U _ 1 6V _ 0 4
5
NEW CARD
B U F _ P L T_ R S T #
1
4
2
3 .3 V
U1 9
0 . 1U _1 6 V _ 04
21
A U XI N
P E R S T#
3 .3 VS
C4 4 3
C4 4 2
0 . 1U _1 6 V _ 04
0 . 1U _1 6 V _ 04
C4 4 1
C4 4 5
0 . 1U _1 6 V _ 04
0 . 1U _1 6 V _ 04
A U XO U T
6
5
3 .3 V IN
3 .3 V IN
1 .5 VS
[ 1 7 , 23 , 2 6, 2 7 , 2 9]
2
23
B U F _P L T _R S T#
B U F _P L T _R S T#
[ 14 ] U S B _ OC # 4
1 .5 V IN
1 .5 V IN
S Y S RS T #
O C#
4
SUSB#
1
10
12
13
24
1 . 5V O U T
1 . 5V O U T
CP P E #
C P US B #
NC_ RS T #
20
J_ N E W 1
NC_ 3 .3 V
20 mil
N C _P E R S T #
C 19 1
0 . 1 U _ 16 V _ 0 4
NC_ 3 .3 V S
40 mil
C 19 6
0 . 1 U _ 16 V _ 0 4
C 19 3
0 . 1 U _ 16 V _ 0 4
C 18 1
0 . 1 U _ 16 V _ 0 4
C 18 7
0 . 1 U _ 16 V _ 0 4
6- 01- 74 108 -Q6 1
8
7
15
14
22
3
R2 4 7
* 10 0 K _0 4
R2 4 9
* 10 0 K _0 4
R2 4 2
* 10 K _ 04
[ 1 5 , 19 , 2 3]
3. 3 V
11
25
P CIE _ W A K E #
N C _C P P E #
N C _C P U S B #
P CIE _ W A K E #
9
10
17
4
11
16
[ 1 8] C L K _ P C I E _ N E W _ C A R D
[ 1 8] C L K _ P C I E _ N E W _ C A R D #
[ 14 ]
[ 14 ]
[ 1 4]
[ 1 4]
22
21
25
24
P C I E _ R X P 2 _N E W _C A R D
P CIE _ RX N2 _ NE W _ CA R D
P C I E _ T XP 2 _ N E W _ C A R D
P C I E _ T XN 2 _N E W _C A R D
[ 15 ]
[ 15 ]
3
2
8
7
I C H _ S MB D A T 1
I C H _ S MB C LK 1
P E R S T#
3 .3 V S
+ 3 . 3V A U X
W LA N _C L K R E Q# R 9
14
15
19
18
[ 1 4 ] U S B _P P 4 _ N E W
[ 14 ] U S B _ P N 4 _N E W
ENE P 223 1 p in 3,4 ,14 ,1 5,2 2
has i nte rna ll y p ull ed hi gh
( 1 70 K o hmS )
13
12
40 mil
NC_ 1 .5 V S
16
17
STBY#
N C
R C LK E N
N C
S HD N#
N C
GN D
N C
N C
GN D
P 22 3 1T H LF C 1
U1 8
74 A H C 1 G0 8G W
*1 0 K _ 04
+ 3 . 3V
+ 3 . 3V
+ 1 . 5V
+ 1 . 5V
C PPE#
C P US B #
W AKE#
C LK R E Q#
R EF CL K+
R EF CL KR E S E RV E D
P E R p0 R E S E R V E D
P E R n0
PET p 0
GN D
PET n 0
GN D
GN D
GN D
U S B _D +
GN D
U S B _D GN D
GN D
S M B _D A TA
GN D
S M B _C LK
5
6
Sheet 20 of 40
New Card,
Mini PCIE
1
20
23
26
27
28
29
30
13 0 80 1 -1
GN D 1 ~ 4 = G N D
MINI CARD
P C I E _W A K E #
R 3 83
0 _0 4
[ 1 8, 1 9 ]
W L A N3 .3 V
Q 3
S
20mil
3 .3 V
* A O3 4 09
D
C 33
*0 . 1U _1 6 V _0 4
G
C2 9
*1 0 U _ 10 V _ 0 8
20mil
W L A N_ CL K RE Q #
W L A N_ CL K RE Q #
[ 1 8 ] C L K _ P C I E _ MI N I #
[ 1 8 ] C L K _ P C I E _ MI N I
R 10
C 26
* 10 0 K _ 04
*0 . 1 U _ 1 6V _ 0 4
* 10 0 K _ 04
D
[ 14 ] P C I E _R X N 1 _W L A N
[ 1 4 ] P C I E _ R XP 1 _ W LA N
[1 4 ]
[ 1 4]
Q2
*2 N 7 0 02 W
G
W L A N _P W R
P C I E _ T X N 1 _W L A N
P C I E _ T XP 1 _ W LA N
[ 2 6] W L A N _ D E T #
S
[ 26 ]
J_ MI N I 1
W AKE#
BT _ DAT A
B T _ CHC L K
C LK R E Q#
G ND0
R E F CL K R E F CL K +
G ND1
3. 3 V _ 0
GN D 5
1. 5 V _ 0
U I M_ P W R
U I M _D A TA
U I M _C LK
U I M _R E S E T
U I M _V P P
2
4
6
8
10
12
14
16
20 mil
W L A N3 .3 V
W L A N1 .5 V S
KEY
R 16
R1 2
*3 3 0K _ 0 4
1
3
5
7
9
11
13
15
W L A N 3. 3 V
[ 1 5]
CL _ CL K 1
R2 4
*1 0m i l _s h ort
[ 1 5]
CL _ DA T A 1
R2 3
*1 0m i l _s h ort
[ 1 5]
C L _ R S T #1
R2 2
*1 0m i l _s h ort
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
N C3
N C4
G ND2
PETn 0
PETp 0
G ND3
G ND4
P E R n0
P E R p0
G ND1 1
N C6
3 . 3 V _3
3 . 3 V _4
N C9
N C1 0
N C1 1
N C1 2
N C1 3
GN D 6
W _D I S A B L E #
P E RS E T #
3. 3 V _ 2
GN D 7
1. 5 V _ 1
N C (S M B _C LK )
N C (S M B _D A TA )
GN D 8
N C (U S B _ D -)
N C (U S B _D +)
GN D 9
N C (L E D _ W W A N #)
LE D _ W LA N #
N C (L E D _W P A N #)
1. 5 V _ 2
GN D 1 0
3. 3 V _ 1
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
W L A N_ E N
B U F _ P L T_ R S T #
[ 2 1, 2 6 ]
W L A N 3 . 3V
20 mil
R 21
R 20
*0 _0 4
*0 _0 4
W L A N 1 . 5V S
I C H _ S MB C LK 1
I C H _ S MB D A T1
U S B _P N 2_ M I N I
U S B _P P 2 _ MI N I
20 mil
[1 5 ]
[1 5 ]
[1 4 ]
[ 1 4]
W L A N1 .5 V S
W L A N3 .3 V
88 9 08 -5 2 04
For Kedron WLAN Device
W L A N3 .3 V
W LA N 1. 5 V S
R1 8
0 _0 4
C 23
C4 4
C4 5
C2 4
C 40
C4 2
C4 1
C 43
0 . 1 U _ 16 V _ 0 4
1 0U _1 0 V _ 08
0. 1 U _1 6 V _0 4
10 U _ 1 0V _ 0 8
0 . 1 U _ 16 V _ 0 4
0. 1 U _1 6 V _0 4
0. 1 U _ 1 6V _ 0 4
0 . 1 U _ 16 V _ 0 4
1 . 5V S
[ 3 , 8, 1 3 , 14 , 1 6 , 19 , 2 9] 1 . 5V S
[ 2 , 1 2. . 1 7 , 1 9, 2 3 , 29 , 3 0] 3 . 3V
[ 5 , 8 . . 1 6, 1 8 , 19 , 2 1 . . 27 , 3 1] 3 . 3V S
New Card, Mini PCIE B - 21
B.Schematic Diagrams
[ 14 , 1 9, 2 2 , 2 3, 2 6 ]
18
19
3 . 3V O U T
3 . 3V O U T
9
3
C4 4 0
Schematic Diagrams
LED, FAN, TP, FP, USB
LED
V D D3
V DD3
3. 3 V S
FAN CONTROL
3 .3 V S
5V S
22 0 _0 4
3
L E D_ A C IN#
L E D_ P W R #
[ 26 ]
[ 1 9, 2 6 ]
D1 9
Z 2 1 12
F A N _ D C _ V OL _R
F A N _D C _ V OL
B
W LA N _E N
R 2 44
1 0 K _1 % _0 4
[ 2 0 , 26 ]
Q 7
DT C1 1 4 E UA
3
+
2
-
1
Z 21 1 5
G
U 1 6A
LM 35 8 L
10 U _1 0 V _0 8
D2 0
R B 5 5 1V - 30
Q 20
A O3 4 09
J_ F A N 1
30mils
E
E
C4 3 8
30mils
R 2 43
4 . 9 9K _ 1 %_ 0 4
B
BT_ EN
5 VS_ FAN
L3 1
H C B 1 0 05 K F -1 2 1T 2 0
R Y -S P 1 55 H Y Y G4
Q8
D T C 1 1 4E U A
F A N _ D C _ V OL
1
2
3
C4 3 9
[ 26 ]
V D D3
Sheet 21 of 40
LED, FAN, TP, FP,
USB
V DD3
1 00 U _ 6 . 3V _ B 2
CP U_ F A N
8 5 20 5 -03 0 01
3 .3 V S
J_FAN1
[ 2 6]
R 15 9
R 1 55
2 20 _ 04
22 0 _0 4
D2 2
C
D 21
1
A
R B 5 51 V -3 0
D2 3
R Y -S P 1 72 Y G 34
4
R Y -S P 15 5 H Y Y G4
Z 2 1 14
Q 9
B
C
LE D _B A T _ C H G#
L E D _ B A T _ F U L L#
[ 26 ]
FP CONN
3G LED
C
BAT LED
[ 26 ]
4 . 7 K _ 04
A
3
1
4
R2 4 6
3 . 3V S
Z 2 1 13
Z 2 1 06
SG
3
2
Y
1
3
C P U _F A N S E N
R 1 62
22 0 _0 4
Z 21 0 5
2
3 G _E N
[ 1 9, 2 6 ]
J _ FP1
3. 3 V S _ F P
L8
H C B 1 0 05 K F -1 2 1T 2 0
1
2
3
4
DT C1 1 4 E UA
E
U S B _ P P 11 _ F P
U S B _ P N 1 1 _F P
3 .3 V S
[1 4 ]
[ 14 ]
C 88
0 . 1 U _ 16 V _ 0 4
85 2 01 -0 40 5 1
J_FP1
4
1
U S B V CC0 1
U2 1
60mil
4
C 49 3
3
1 U _ 1 0V _ 0 6
L3 6
60mil
V IN
V OU T
V IN
V OU T
GN D
1
5
C 4 86
C 50 3
C4 9 5
2
0. 1 U _ 1 6V _ 0 4
0 . 1 U _ 16 V _ 0 4
*1 0 U _ 1 0V _ 0 8
R T 9 70 1 -C P L
[ 1 4]
[ 1 4]
US B _ P N1
US B _ P P 1
US B _ V CC0 1 _ 1
60 mil
H C B 16 0 8K F -1 2 1T 2 5
C5 0 8
C5 2 9
1 00 U _ 6 . 3V _B 2
0 . 1U _ 16 V _ 04
L4 1
*W C M 20 1 2F 2S -1 6 1T 0 3
1
2
4
3
CLICK CONN
1
US B _ P N1 _ R
2
U S B _ P P 1 _R
3
4
J _ US B 2
V+
D A TA _ L
5 VS
D A TA _ H
GN D
G ND2
5V
US B V C C0 1
G ND 1
USB PORT
R7 0
R 71
10 K _ 04
1 0 K _ 04
C1 4 6
C 1 58
C 15 9
C 15 7
1 U _ 10 V _ 06
47 P _ 50 V _ 0 4
4 7 P _ 50 V _ 04
* 10 U _ 1 0V _ 0 8
[ 1 4]
US B _ P N0
[ 1 4]
US B _ P P 0
H C B 16 0 8K F -1 2 1T 2 5
C4 4 4
C4 4 7
1 00 U _ 6 . 3V _B 2
0 . 1U _ 16 V _ 04
6
1
R3 0 0
2 00 K _ 1 %_ 0 4
L3 4
*W C M 20 1 2F 2S -1 6 1T 0 3
1
2
4
3
1
2
3
4
8 5 20 1 -0 40 5 1
1
US B _ P N0 _ R
2
U S B _ P P 0 _R
3
4
J _ US B 1
V+
D A TA _ L
D A TA _ H
GN D
G ND2
U S B _O C # 0 1
J _ TP 1
J_TP1
60 mil
G ND 1
[1 4 ]
US B _ V CC0 1 _ 0
4
Place under the common
bead body and same as
USB trace requirment
US B V C C0 1
R2 9 9
1 00 K _ 1 %_ 0 4
L3 5
5
C 1 07 7 7-1 0 4 A 3-L
L ay out n ote :
6
C 1 07 7 7-1 0 4 A 3-L
5
B.Schematic Diagrams
[ 26 ]
5 VS
7
U1 6 B
L M3 58 L
C
Z 21 1 1
-
A
WLAN/BT LED
C
POWER ON LED
+
6
S
4
5
*0 . 1U _1 6 V _ 04
D
3
2
2
1
R Y -S P 15 5 H Y Y G4
4
D1 8
C 4 37
Z 2 1 10
Y
SG
1
Z 21 0 9
3
1
SG
4
Y
3
2
2
1
2 20 _ 0 4
Z 2 1 02
8
22 0 _0 4
Z 21 0 1
R 1 61
4
2 20 _ 04
R 1 60
4
R 1 57
C
R 15 8
[ 13 , 2 6 . . 30 , 3 2] V D D 3
[ 1 2 , 13 , 1 6, 19 , 2 4, 2 5 , 27 ] 5V S
[ 16 , 1 9, 2 8 . . 31 ] 5V
[ 5 , 8 . . 1 6, 1 8 . . 20 , 2 2 . . 27 , 3 1] 3 . 3V S
B - 22 LED, FAN, TP, FP, USB
T P _D A T A [ 2 6]
T P _C L K [ 2 6]
Schematic Diagrams
JMB385 Card Reader
JMB385 CARD READER
02/12
3. 3V S
3 .3 V S _ CA R D
R4 0 3
4 . 7K _ 0 4
S D _ CD#
R3 1 0
4 . 7K _ 0 4
M S _ INS#
R3 3 1
1 0K _ 0 4
SD W P#
R3 4 3
1 0K _ 0 4
M D I O 13
R3 3 5
1 0K _ 0 4
M DIO 7
R3 5 3
2 00 K _ 0 4
M D I O 12
R3 3 9
2 00 K _ 0 4
M D I O 14
3 .3 V S _ CA R D
0 _0 6
40mil
40mil
3 .3 V S_ CAR D
V C C_ CA R D
M D I O 12
DV1 .8 V
3 .3 V S _ CA R D
S D / MS C L K
R 38 4
2 2 _ 04
3 .3 VS _ CA R D
MDIO1 2
MDIO1 4
LOW
On Borad
Add-in Card
CR1_PCTLN
High
Active
CR1_LEDN
High
Active
C5 6 1
0 . 1U _ 16 V _ 0 4
CR1_PCTLN
Low
Active
CR1_LEDN
Low
Active
18
IE S _ E N
IE S
I O7
I O6
I O5
I O4
33
I O3
I O2
I O1
I O0
GN D
M D I O 13
M D I O 14
C R _L E D N
D V 33
RE G _ CT RL
D V 18
C R1 _ P CT L N
CR1 _ CD 0 N
CR1 _ CD 1 N
S E ECL K
S E EDA T
JMB385
1
2
3
4
5
6
7
8
9
10
11
12
MDIO7
HIGH
DV
PC
PC
MD
MD
MD
MD
DV
MD
MD
MD
MD
NC
N C
NC
G ND
GN D
G ND
T AV3 3
M D I O8
M DIO 9
M D I O1 0
M D I O 11
M D I O1 2
U 27
37
38
39
40
M DIO 7
41
SD W P#
S D / MS C L K _R 4 2
S D CM D/M S B S 4 3
44
45
S D / MS _ D 3
S D / MS _ D 2
46
47
S D / MS _ D 1
48
S D / MS _ D 0
[ 1 4 , 19 , 2 0 , 23 , 2 6 ]
24
23
22
21
20
19
18
17
16
15
14
13
M D I O 13
M D I O 14
3 . 3 V S _C A R D
D V1 .8 V
V C C_ CA R D
S D _ CD#
M S _ INS #
C 59 2
Layout Note:
Must > 30mil
J MB 38 5 -L GE Z 0 B
C 54 9
C 55 0
B U F _ P L T_ R S T#
[ 1 8 ] C L K _P C I E _ J M3 8 0#
[ 18 ] C L K _ P C I E _J M3 8 0
0 . 1U _ 10 V _ X 7R _ 04
0 . 1U _ 10 V _ X 7R _ 04
P C I E _R X P 5_ C A R D
P C I E _R X N 5 _C A R D
[1 4 ]
[1 4 ]
P C I E _ TX N 5_ C A R D
P C I E _ TX P 5 _ C A R D
[1 4 ]
[ 1 4]
D V1 .8 V
DV 1 .8 V
R 32 7
3. 3 V S _ C A R D
Sheet 22 of 40
JMB385 Card Reader
C5 8 3
0 . 1U _ 16 V _ 0 4
0 . 1 U _ 1 6 V _0 4
X RS T N
XT EST
A P C LK N
A P CL K P
APVD D
A P GN D
APR EXT
A P RX P
APR XN
A P V 18
APT XN
AP TXP
0 . 1U _ 16 V _ 0 4
36
35
34
33
32
31
30
29
28
27
26
25
C5 7 3
3 .3 V S _ CA R D
8 . 2K _ 1 % _0 4
V C C_ CA R D
S D / MS C L K
C 59 0
C 59 1
C5 2 2
C5 1 7
C5 2 4
1 0 U _ 1 0V _0 8
0 . 1 U _ 1 6 V _0 4
1 0P _ 5 0 V _0 4
0 . 1U _ 16 V _ 0 4
0 . 1U _ 16 V _ 0 4
Near Cardreader CONN
M720T Card Reader
Connector
M730T Card Reader
Connector
V CC _ CA R D
S D/M S CL K
S D/M S _ D0
S D/M S _ D1
S DW P #
V CC _ CA R D
S D/M S CL K
S D/M S _ D3
MS _ I N S #
S D/M S _ D2
S D/M S _ D0
S D/M S _ D1
S D C MD / MS B S
P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
P1 6
P1 7
P1 8
P1 9
P2 0
P2 1
CD _ S D
D A T2 _ S D
C D / D A T3 _ S D
CM D_ S D
VSS_ SD
V D D_ S D
CL K _ S D
VSS_ SD
D A T0 _ S D
D A T1 _ S D
W P_ SD
VSS_ M S
V C C _ MS
S C LK _ M S
D A T3 _ MS
I N S _M S
D A T2 _ MS
S D I O/ D A T0 _ MS
D A T1 _ MS
P2 2
B S _ MS
GN D P 2 3
VSS_ M S
GN D
M D R 01 9 -C 0 -0 0 10 (R ev ers e )
Layout note:
Layout note:
V er y clo se d to pi n 5( Tr ac e w id th /l eng th :
2 0m il / < 12 0m il )
Ve ry c los ed b et wee n
p in 1 0
3 .3 V S _ CA R D
DV 1 .8 V
J _ C A R D -R _7 3
J _ C A R D -R _7 2
S D_ C D#
S D/M S _ D2
S D/M S _ D3
S D C MD / MS B S
Layout note:
Ve ry cl os ed b et wee n
pi n 19 an d pi n 20
S D_ C D#
S D/M S _ D2
S D/M S _ D3
S D C MD / MS B S
V CC _ CA R D
S D/M S CL K
S D/M S _ D0
S D/M S _ D1
S DW P #
V CC _ CA R D
S D/M S CL K
S D/M S _ D3
MS _ I N S #
S D/M S _ D2
S D/M S _ D0
S D/M S _ D1
S D C MD / MS B S
P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
P1 6
P1 7
P1 8
P1 9
P2 0
P2 1
CD _ S D
D A T2 _ S D
C D / D A T3 _ S D
CM D_ SD
VSS_ SD
V D D_ SD
CL K_ SD
VSS_ SD
D A T0 _ S D
D A T1 _ S D
W P_ SD
VSS_ M S
V C C _ MS
S C LK _ M S
D A T3 _ MS
I N S _M S
D A T2 _ MS
S D I O/ D A T0 _ MS
D A T1 _ MS
B S _ MS
VSS_ M S
GN D
GN D
C5 5 7
C6 0 5
C6 0 4
C5 5 2
C5 5 3
C5 5 1
0 . 1U _ 16 V _ 0 4
0 . 1U _ 16 V _ 0 4
0 . 1U _ 16 V _ 0 4
1 00 0 P _ 50 V _ X 7R _ 04
1 0U _1 0 V _ 0 8
0 . 1U _ 16 V _ 0 4
P2 2
P2 3
* MD R 0 1 9-C 0 -00 1 0 (R e v e rse )
[ 5 , 8. . 16 , 1 8 . . 21 , 2 3 . . 2 7, 3 1 ]
3 .3 VS
JMB385 Card Reader B - 23
B.Schematic Diagrams
R3 3 2
Schematic Diagrams
PCI-E LAN RTL8111C
LA N _ V D D 3
R4 0 0
60mil
3. 3V
Q2 9
*2 N 70 0 2 W
S
R4 1 2
C 64 4
*3 3 0K _0 4
* 0. 1 U _1 6 V _ 04
*A O 3 40 9
D
LA N _ V D D 3
R 4 13
G
L A N _P W R
G
[1 5 ]
60mil
0_ 0 4
Q2 8
S
M A 1 /E E DI
R4 5
3. 6 K _ 0 6
E N _ LA N 1 2
R2 1 7
0_ 0 4
R 21 7
* 10 0 K _ 0 4
D
RTL 81 11 C
S tu ff
RTL 81 02 E
U ns tu ff
R4 1 4
* 10 0 K _ 04
L A N_ V D D3
L1 9
LA N _ V D D 3
20mils
20mils
RTL 81 11 C
G ST 50 09L F / LG -24 13 S- 1
RTL 81 02 E
L F- H6 442 S- 1
EEC S
MA 2 / E E S K
MA 1 / E E D I
MA 0 / E E D O
1
2
3
4
C3 5 4
C3 8 5
C 84
C3 8 8
C3 8 6
C3 7 8
C5 1
* 10 U _1 0 V _ 08
0. 1 U _1 6 V _ 04
0 . 1 U _ 16 V _ 0 4
0 . 1 U _ 1 6 V _0 4
0. 1 U _1 6 V _ 04
0 . 1U _ 16 V _ 0 4
0. 1U _1 6 V _ 04
0. 1 U _1 6 V _ 04
U1 4
C 6 45
C3 5 5
C 35 6
C 3 57
*1 0 U _ 1 0 V _0 8
0 . 1 U _ 1 6 V _0 4
0. 1U _1 6 V _ 04
0 . 1 U _ 1 6V _ 0 4
0 . 1 U _ 1 6 V _0 4
A V D D 3 3/ N C
A VD D3 3
20mils
C5 3
8
11
14
58
22
28
L A N_ E V DD 1 2
23
24
[ 1 4 ] P C I E _T X P 4 _L A N
[ 1 4 ] P C I E _ TX N 4_ L A N
0 . 1 U _ 1 0V _ X 7 R _ 0 4
0 . 1 U _ 1 0V _ X 7 R _ 0 4
P C I E _ R X P 4 _ LA N _ C
P CIE _ RX N4 _ L A N_ C
26
27
[ 18 ] C L K _ P C I E _ G LA N
[ 1 8 ] C L K _P C I E _ GL A N #
33
20
L A N _ C LK R E Q#
B U F _ P L T_ R S T#
6 0mi ls a nd le ng th < 20 0m il
60 mi ls a nd le ng th < 20 0mi l
L4
S W F 2 52 0 C F -4 R 7M -M
1
1. 2V _ L A N
2 2 U _ 6 . 3 V _X 5 R _ 0 8
C4 9
0. 1U _1 6 V _ 04
SW F2 520 CF -4 R7 M-M
0 _0 4
RT L81 11 C
R4 01
R4 04
MD I P 2 / N C
MD I N 2 / N C
MD I P 3 / N C
MD I N 3 / N C
C L K R E Q#
P E R S T#
LE D 0
LE D 1
LE D 2
LE D 3
S RO UT 1 2 /V CT RL 1 2 A
E N _ LA N 1 2
62
64
C3 6 0
2 2U _ 6. 3 V _ X 5R _ 08
0. 1 U _1 6 V _ 04
EEC S
M A 2/ E E S K
M A 1/ E E D I
M A 0/ E E D O
50
51
3
4
M D I O 0+
M D I O 0-
6
7
M D I O 1+
M D I O 1-
9
10
M D I O 2+
M D I O 2-
12
13
M D I O 3+
M D I O 3-
I S OL A T E #
L ANW AK E#
V _D A C
C2 8 4
0 . 0 1 U _ 16 V _ X 7R _ 04
V _D A C
C2 8 5
0 . 0 1 U _ 16 V _ X 7R _ 04
V _D A C
C2 8 6
0 . 0 1 U _ 16 V _ X 7R _ 04
V _D A C
C2 8 7
0 . 0 1 U _ 16 V _ X 7R _ 04
J_ R J-4 5
L MX 1+
L MX 1L MX 2+
L MX 2-
1
2
3
6
L MX 3+
L MX 3L MX 4+
L MX 4-
4
5
7
8
M X1 +
M X1 -
M X2 +
R TL8 11 1C
S tu ff
R TL8 10 2E
U ns tu ff
M X2 -
02/22
M X3 +
3 .3 V S
M X3 -
36
I S OL A T E #
R2 2 3
* 1K _0 4
D A+
D AD B+
D BD
D
D
D
s hi e l d
s hi e l d
G ND 1
G ND 2
C+
CD+
D-
R2 2 4
* 1 0m i _l s h ort
R2 2 5
19
SUS B#
Place under the common
bead body and same as
LAN trace requirment
[ 1 7, 2 0 , 2 6, 2 7 , 2 9]
* 15 K _ 0 4
P CIE _ W A K E #
L67
*W C M2 0 12 F 2 S -1 61 T 0 3
4
3
1
2
L68
*W C M2 0 12 F 2 S -1 61 T 0 3
4
3
1
L MX 2 +
L MX 2 -
2
L69
*W C M2 0 12 F 2 S -1 61 T 0 3
4
3
1
L MX 1 +
L MX 1 -
L MX 3 +
L MX 3 -
2
La yo ut n ot e:
[ 15 , 1 9 , 20 ]
M X4 +
M X4 -
61
L70
*W C M2 0 12 F 2 S -1 61 T 0 3
4
3
1
2
L MX 4 +
L MX 4 -
X1
2 5 MH z
E NS R/NC
RS E T
CK T A L 1
60
R T L8 1 11 C -V B -GR
C3 6 8
C 3 65
22 P _ 5 0V _ 0 4
2 2 P _ 50 V _ 0 4
L5
Layout note:
C358 must close
to U14 pin5
R 40 2, C6 41
RT L8 11 1C
Un stu ff
RT L8 10 2E
St uff
R 4 02
C6 4 1
* 0_ 0 4
1 . 2 V _ LA N
1 . 2 V _ LA N
C3 67
R17 8, R1 79
RT L81 11 C
St uf f
M CT 1
R 17 5
7 5_ 0 4
RT L81 02 E
M CT 2
R 17 6
7 5_ 0 4
M CT 3
R 17 8
7 5_ 0 4
M CT 4
R 17 9
7 5_ 0 4
C 61
R TL 81 11C
HC B1 005 KF -1 21T 20
S tu ff
Un st uff
R TL 81 02E
0_ 04 02
U ns tu ff
St uf f
Un st uf f
C 2 92
10 0 0P _2 K V _ 1 2
L5
H C B 1 0 0 5K F - 12 1 T2 0
L A N_ E V D D1 2
15mils
*0 . 1 U _ 1 6 V _0 4
C 37 1
C3 6 7
C6 1
0 . 1 U _ 1 6V _ 0 4
0 . 1 U _ 16 V _ 0 4
*4 . 7 U _ 6 . 3V _X 5 R _ 0 6
[ 5, 8 . . 1 6 , 1 8. . 2 2 , 2 4. . 2 7 , 3 1] 3 . 3V S
[ 2, 1 2 . . 1 7, 1 9 , 2 0, 29 , 3 0 ] 3 . 3 V
B - 24 PCI-E LAN RTL8111C
MC T 1
MX 1 +
MX 1 MC T 2
MX 2 +
MX 2 MC T 3
MX 3 +
MX 3 MC T 4
MX 4 +
MX 4 -
24
23
22
21
20
19
18
17
16
15
14
13
C2 86 ,C 28 7
57
56
55
54
V D D S R / V C T R L 1 2D
2 . 4 9 K _ 1% _ 0 4
C6 7
44
48
47
45
F B 1 2 / A V D D 12
R 2 15
*0 _ 0 4
RT L81 02 E
MD I P 1
M DIN 1
RT L8 111 C/
RT L8 102 E
63
Uns tu ff
0_ 08 05
4 0m il s and l en gth < 2 00m il
R 40 4
HS O P
HS O N
CK T A L 2
Stu ff
1 . 2V _ L A N
GP I
GP O
MD I P 0
M DIN 0
0 . 1U _ 16 V _ 0 4
L4
RT L81 02 E
R 40 1
E ECS
EESK
E E DI/A U X
E EDO
GND
0 . 1U _ 16 V _ 0 4
C 1 0 09 1 -1 08 A 4
HS I P
HS I N
RE F CL K _ P
RE F CL K _ N
MC T 1
M X1 +
MX 1 MC T 2
M X2 +
MX 2 MC T 3
M X3 +
MX 3 MC T 4
M X4 +
MX 4 -
G S T 50 0 9 LF
P CI -E LA N
EV D D1 2
EV D D1 2
C3 5 8
RT L81 11 C
LA N _ V D D 3
5
1 . 2 V _L A N
C6 4 0
0 . 1 U _ 1 6 V _0 4
AV D D1 2
A V D D 1 2/ N C
A V D D 1 2/ N C
A V D D 1 2/ D V D D 1 2
C3 7 3
1
C 49
C 3 75
0. 1 U _1 6 V _ 04
E GN D
EG ND
[1 8 ]
[ 1 4 , 1 9, 2 0 , 2 2, 26 ]
29
30
C 3 64
0. 1U _1 6 V _ 04
T CT 1
T D1 +
T D1 T CT 2
T D2 +
T D2 T CT 3
T D3 +
T D3 T CT 4
T D4 +
T D4 -
31
25
C3 7 4
C3 7 7
P C I E _ R X P 4 _L A N
P C I E _ R X N 4_ L A N
C3 8 7
0 . 1U _ 16 V _ 0 4
1
2
3
4
5
6
7
8
9
10
11
12
2
L53
0 _ 04
[1 4 ]
[ 14 ]
V _D A C
MD I O 0 +
MD I O 0 V _D A C
MD I O 1 +
MD I O 1 V _D A C
MD I O 2 +
MD I O 2 V _D A C
MD I O 3 +
MD I O 3 -
52
49
43
38
32
21
0 . 1U _ 16 V _ 0 4
C3 7 9
D V DD1 2 /NC
DVD D1 2
DV DD1 2
D V D D 1 2/ N C
DV DD1 2 /NC
D V DD 1 2
0 . 1 U _ 16 V _ 0 4
53
46
37
16
C3 5 9
59
2
1 . 2 V _ LA N
C3 7 0
8
7
6
5
VCC
NC
OR G
GN D
L19
L A N_ A V D D3
15mils
VD D3 3
V D D 33
VD D3 3
V D D 33
Sheet 23 of 40
PCI-E LAN
RTL8111C
L3
0_ 0 4
N C
NC
N C
NC
N C
NC
N C
NC
N C/DV DD1 2
L A N _V D D 3
CS
SK
DI
DO
H T9 3 L C 4 6 -A 18 P B
C 50
42
41
40
39
35
34
18
17
15
B.Schematic Diagrams
1. 2V _ L A N
U 2
Schematic Diagrams
Audio Codec ALC662
Layout Note:
C los e t o cod ec pi n 3 8
Layout Note:
Clo se to co dec p in 25
3 . 3V S
3. 3 V S _ A U D
L 38
5 V S _A U D
C 5 06
C5 1 4
C 2 36
C 23 7
0. 1 U _ 1 6 V _0 4
1 0U _1 0 V _0 8
0. 1 U _ 1 6V _0 4
0 . 1 U _ 1 6V _ 0 4
C 5 75
C 56 7
C5 7 0
0. 1 U _1 6 V _0 4
1 0 U _ 1 0V _ 0 8
0 . 1 U _ 1 6V _ 0 4
1 0U _ 10 V _ 08
R3 1 2
5
6
8
10
11
A Z _ S DIN0 _ R
3 3 _0 4
E A P D _ MO D E
47
S P DIF O
BEEP
A UDG
R 1 17
4 7K _ 0 4
R 1 16
4 . 7K _ 0 4
C 23 8
C 5 23
1 0 0P _ 5 0V _ 0 4
MI C _S E N S E
R 3 23
2 0K _ 1 % _0 4
HP _ S E NS E
R 3 20
3 9. 2 K _ 1 %_ 0 4
I N T _ MI C
MI C 1-L
MI C 1-R
C5 5 6
C5 6 0
R 3 29
R 3 30
13
34
37
29
Z 2 40 8
Z 2 40 9
25
38
VR EF
MI C 1 -V R E F O -L
MI C 1-V R E F O-R
DIG ITA L
S U R R -O U T -L
S U R R -OU T -R
EAPD
M I C 2 -V R E F O
L I N E 2 -V R E F O
S P DIF O
F R ON T-O U T -L
F R O N T -OU T -R
PCBE EP
C 56 3
4 . 7 U _ 6. 3 V _ X5 R _0 6
Z 2 41 0
Z 2 41 1
16
17
18
19
20
21
22
CEN
LFE
ANALOG
N.C .
N.C .
MI C 2-L
MI C 2-R
N.C .
C D -L
C D -GN D
C D -R
J DR E F
MI C 1-L
MI C 1-R
A L C 6 6 2-G R
L I N E 1 -L
L I N E 1 -R
27
Z2412
28
32
M I C 1 -V R E F O -L
M I C 1 -V R E F O -R
Close to codec
F OR M7 20 T
A UDG
30
31
S P DIF O
M I C 2 -V R E F O
L5 4
F C M1 0 05 K F -1 02 T 02
C5 7 4
0. 0 1 U _ 1 6V _ X 7R _0 4
35
36
F R ON T-L
F R ON T-R
14
15
H P _O U T -L
H P _O U T -R
[2 5 ]
[ 2 5]
R3 3 7
C5 8 0
2 20 _ 04
10 0 0 P _5 0 V _X 7 R _ 0 4
J _ S PDIF _ 7 2
Z2424
Z2425
5
4
3
Z2426
Z2427
2
L
6
1
C 1 2 10 3 -1 06 0 9-L
R
SPDIF O UT
BLACK
[ 2 5]
[ 25 ]
43
44
MI C _ S E N S E
45
46
R 38 6
33
40
*0 _0 4 S P D I F O _7 3
R 38 5
39
41
Z2421
R1 4 2
2 0 K _1 % _ 04
23
24
*0 _0 4
MI C 1-R _7 3
MI C 1 -R
L48
F C M1 00 5 K F -1 21 T 03
Z2428
MI C 1 -L
L47
F C M1 00 5 K F -1 21 T 03
Z2429
Z2430
AUD G
R 38 7
*0 _0 4 MI C 1-L _ 73
C5 7 8
C5 7 9
6 80 P _ 50 V _ X 7R _0 4
68 0 P _ 50 V _ X7 R _ 0 4
5
4
3
J _ MI C _7 2
Sheet 24 of 40
Audio Codec
ALC662
R
2
L
6
1
C 1 2 10 3 -D 0 6 09 -L
MIC IN
PINK
26
42
C 56 5
4 . 7 U _ 6. 3 V _ X5 R _0 6
L I N E 2 -L
L I N E 2 -R
S e ns e A (JD 1 )
S e ns e B (JD 2 )
N.C .
N.C .
1 U _1 0 V _0 6
A U DG
C5 6 6
1 0 U _ 1 0V _ 0 8
A V D D1
A V DD2
1
9
4
7
S D A T A -OU T
B I T -C L K
S D A T A -I N
SYN C
RE S E T #
A UD G
C 5 76
Layout Note:
1 U _ 10 V _ 06
JD _S E N S E 1
JD _S E N S E 2
4 . 7U _6 . 3 V _ X5 R _ 0 6
4 . 7U _6 . 3 V _ X5 R _ 0 6
1 K _0 4
1 K _0 4
48
Z 2 4 04 1 2
Z 2 40 3
GP I O 0
GP I O 1
A U DG
L16
H C B 1 60 8 K F -1 21 T 25
HP_ SENSE
A UD G
*0 _0 4 H P -R _7 3
R 38 8
5
4
3
Lay ou t N ot e:
Cod ec pi n 1 ~ 11 an d p in 47 ~ 48
are D igi tal s ign als .
The o the rs ar e a nal og si gna ls.
[ 2 5]
[ 25 ]
[2 5 ]
H P -R
H P -L
H P -R
L46
F C M1 00 5 K F -1 21 T 03
H P -L
L50
F C M1 00 5 K F -1 21 T 03
R 38 9
[2 6 ]
[1 5 ]
K B C _B E E P
IC H_ S PK R
C2 2 7
1 U _ 10 V _ 0 6
C2 2 8
1 U _ 10 V _ 0 6
*0 _0 4 H P -L _ 73
For M730T
R385,R386,R387,R388,
R389
B EEP
C5 8 8
C5 7 7
HEADPHO NE
6 80 P _ 50 V _ X 7R _0 4
68 0 P _ 50 V _ X7 R _ 0 4
GREEN
2
Layout Note:
FO R M7 30T
M I C 1 -V R E F O -L
MI C 2 -V R E F O
MI C 1-V R E F O-R
J_I NT MIC 1
2 1
Ve ry clo se to Au dio C ode c
J_ A U D _7 3
1
2
3
4
5
6
7
8
9
10
11
12
S P D I F O_ 7 3
MI C _ S E N S E
MI C 1 -R _ 7 3
MI C 1 -L _7 3
HP _ S E NS E
H P -R _ 7 3
H P -L _7 3
H P _ P LU G
Z 24 0 8
Z 24 0 9
C5 4 8
C5 5 5
0. 1U _1 6 V _0 4
0. 1U _1 6 V _0 4
Z 24 1 0
Z 24 1 1
C5 5 8
C5 6 2
0. 1U _1 6 V _0 4
0. 1U _1 6 V _0 4
R3 3 3
R 33 4
R7 2
2 . 2K _ 0 4
2 . 2 K _0 4
4 . 7K _ 0 4
MI C 1 -R
MI C 1 -L
A UD G
1
6
3
4
5
J _I N T MI C 1
I N T _ MI C
1
2
C5 6 8
C 56 9
C1 5 5
6 80 P _ 50 V _ X7 R _0 4
6 8 0P _ 5 0V _ X 7 R _ 04
6 80 P _ 50 V _ X7 R _0 4
AUD G
R
2
L
6
1
C 1 2 10 3 -6 06 0 9-L
H P _P L U G
HP _ P L UG
J _ HP_ 7 2
8 82 6 6 -02 0 01
P C B F o o t pri n t = 8 8 26 6 -2 L
AU DG
*8 7 15 1 -12 0 71 G
[ 12 , 1 3, 1 6 , 19 , 2 1 , 25 , 2 7] 5V S
[ 5 , 8. . 1 6 , 18 . . 2 3, 2 5 . . 2 7, 3 1 ] 3 . 3V S
Audio Codec ALC662 B - 25
B.Schematic Diagrams
A U D _A Z _ S D O U T
A U D _A Z _ B I T C L K
[1 3 ] A Z _ S DIN 0
[ 1 3] A U D _A Z _ S Y N C
[ 1 3 , 25 ] A U D _ A Z _ R S T #
2 2 P _5 0 V _ 04
A U DG
AVSS1
AVSS2
C 5 30
D VDD1
DV DD 2
2
3
C O D E C _E A P D #
DV SS 1
D VSS2
U 25
[ 1 3]
[ 1 3]
L45
5 VS
H C B 1 00 5 K F -1 21 T 20
C2 5 9
A UDG
[2 5 ]
5V S _ A U D
H C B 10 0 5 K F -12 1 T2 0
Schematic Diagrams
Audio AMP2056
5 VS
5
C 642
*0 . 1 U _ 1 6 V _ 0 4
[2 4 ]
5V S
1
CO DE C_ E A P D #
4
2
U2 8
*7 4 A H C 1 G0 8 G W
C 518
3
[ 2 6]
0_ 0 4
R3 1 5
*0 _ 04
S Y S M U T E A MP #
1 0 0K _0 4
1
MU T E A M P #
4
2
U 24
7 4 A H C 1 G 0 8G W
A U D _ A Z _R S T #
C5 3 9
0 .1 U_ 1 6 V _ 0 4
C 245
C2 5 6
C2 5 8
C5 2 0
* 0 . 1 U _ 1 6 V _ 04
0. 1 U _ 16 V _ 0 4
0. 1 U _ 16 V _ 0 4
0. 1U _ 1 6V _0 4
Z 25 2 0
3
[1 3 ,2 4 ]
S B _ MU T E #
R3 1 4
30mils
R 13 7
5
K B C _ MU T E #
[1 3 ]
5 VS_ AM P
* 0 . 1 U _ 1 6 V _ 04
Low mute!
[2 4 ]
3. 0 1 K _ 1 % _ 04
C 2 57
4 . 7 U _ 6. 3 V _ X 5 R _ 0 6
C 2 51
4 . 7 U _ 6. 3 V _ X 5 R _ 0 6
C 2 55
H P _ O U T -L
4 . 7 U _ 6. 3 V _ X 5 R _ 0 6
Z2505
R 13 4
4 . 7 U _ 6. 3 V _ X 5 R _ 0 6
3 9 K _ 04
R 14 0
3 9 K _ 04
3
Z2506
5
Z2509
4
Z2510
6
Z2513
27
R _ I N _ A MP
L _I N _ A M P
AU DG
20
10
1
U2 6
PVD D
P VDD
VD D
R1 4 1
F R O N T -L
H P _ O U T -R
C 2 62
BE EP
SD #
3. 0 1 K _ 1 % _ 04
R _ OU T +
R _ OU T-
R_ IN _ HP
L _ OU T +
L _I N _ H P
L _ OU T-
AP A205 6A
C6 3 6
R1 2 7
24
0. 01 U _ 16 V _ X 7 R _ 0 4
3.01K_1%_04
1 0K _0 4
5.6K_04
[ 2 4]
D03
BCN
Q 5
D T C 11 4 E U A
D3 2
MU T E A M P #
C
HP_ E N
L _ O UT _ HP
12
C5 7 1
B
H P _ P L UG
R_ O UT _ HP
Near CP+ and CP-
C
R141
A MP _E N #
2 . 2 U _ 1 6 V _ X5 R _ 06
14
15
16
C5 7 2
A S D7 5 1 V
A
CP+
CVD D
HVD D
CPCVS S
HVS S
S PKO UT R +
21
S PKO UT R -
8
S PKO UT L +
D03 BCN
? ? APA2057A
A U DG
S PKO UT L -
R3 9 0
270_04
18
L _ HP _ O
R3 9 1
270_04
SPKO UT L +
SPKO UT L -
L1
F C M 1 00 5 K F - 12 1 T 0 3
L2
F C M 1 00 5 K F - 12 1 T 0 3
For M730T
J _S P K L _ 72
S P K O U TL + _ R
S P K O U TL -_ R
C1 0
18 0 P _ 5 0 V _ 04
C9
J_SPK*_*
2
1
2
1
S P K O UT R+
S P K O UT R-
L57
* F C M 1 0 05 K F -1 21 T 0 3
8 8 2 66 -0 2 0 0 1_ R
18 0 P _ 5 0 V _ 0 4
L56
* F C M 1 0 05 K F -1 21 T 0 3
P C B F o o t p ri nt = 88 2 6 6 -02 R
5 VS
J_ S P K R _ 7 3
S P K O U T R +_ R 1
S P K O U T R -_ R 1
C 6 12
* 1 80 P _ 5 0 V _ 0 4
1
2
C 613
C6 3 7
0 .1 U_ 1 6 V _ 0 4
1U _ 1 0V _0 6
AU DG
3 .3 VS _ AM P L 5 5
H C B 1 0 0 5 K F -1 2 1 T2 0
3 .3 VS
C2 5 3
C2 6 0
0 . 1 U _ 1 6 V _ 04
0 . 1 U _ 1 6 V _ 04
A U DG
A U DG
Z 2 5 09
C6 2 0
6 8P _5 0 V _ 0 4
R _ HP _ O
Z 2 5 10
C6 2 1
6 8P _5 0 V _ 0 4
L _ H P _O
5V S _ A MP
L37
H C B 1 0 0 5 K F -1 2 1T 2 0
C 538
C 51 5
C 51 6
C 25 4
0 . 1 U _1 0 V _ X 7 R _ 0 4
*1 0 U _1 0 V _ 0 8
*1 0 U _1 0 V _ 0 8
1 U_ 1 0 V_ 0 6
C2 6 3
AU DG
1
2
C 6 14
C 615
* 1 80 P _ 5 0 V _ 0 4
* 1 80 P _ 5 0 V _ 0 4
*8 8 2 6 6- 02 0 0 1 _R
P C B F o o t p rin t = 8 8 2 6 6-0 2 R
[ 5, 8 . . 1 6 , 1 8 . . 2 4 , 2 6, 2 7 , 3 1 ] 3. 3 V S
[ 1 2, 1 3 , 1 6 , 1 9 , 21 , 2 4 , 2 7 ] 5 V S
B - 26 Audio AMP2056
C 2 61
1 U _ 10 V _ 0 6
P C B F o o t p rin t = 8 8 2 6 6-0 2 R
[2 4 ]
[2 4 ]
5V S _ A MP
19
C 252
J_ S P K L _7 3
S P K O UT L + _ R1
S P K O U T L -_ R 1
L59
* F C M 1 0 05 K F -1 21 T 0 3
H P -L
*8 8 2 6 6- 02 0 0 1 _R
* 1 80 P _ 5 0 V _ 0 4
L58
* F C M 1 0 05 K F -1 21 T 0 3
S P K OU T L+
S P K OU T L-
H P -R
11
A UD G
A U DG
For M720T
[ 1 9]
R_ H P_ O
Z 2 5 19
D03
BCN
[1 9 ]
S P K O U TR -
17
A P A 2 0 5 6A
2 . 2 U _ 1 6 V _ X5 R _ 06
S P K O U TR +
9
B IAS
1 0 K_ 0 4
PG ND
P GN D
R 3 22
22
25
Z 2 5 12
7
23
6.2K_1%_04
10 0 K _ 0 4
CG ND
3.01K_1%_04
R3 2 1
5V S
GN D
G ND
R144
M730T
13
M720T
29
2
Sheet 25 of 40
Audio AMP2056
E
B.Schematic Diagrams
[2 4 ]
[2 4 ]
R1 4 4
F R O N T -R
28
26
A UD G
[2 4 ]
*0 . 1 U _ 1 6 V _ 0 4
Schematic Diagrams
KBC-ITE IT8512E
L 10
H C B 1 0 0 5K F -1 2 1 T2 0
R2 9 4
V D D3
V DD 3
C4 7 0
C 1 86
C 1 78
C 2 20
C1 8 8
C1 8 5
C 18 0
10 U _1 0 V _0 8
0. 1 U _ 1 6 V _0 4
0. 1 U _ 1 6 V _0 4
0 . 1 U _ 1 6V _ 0 4
0. 1 U _1 6 V _0 4
*0 . 1 U _ 1 6V _ 0 4
* 0. 1 U _1 6 V _0 4
K B C _ A GN D
Z 2 60 8
FOR M720T
126
4
16
20
[1 9 ]
23
15
[ 30 ] A P _K E Y #
W E B _ E MA I L #
76
77
78
79
80
81
C P U_ F AN_ R
[ 2 0 ] W L A N _P W R
[ 20 , 2 1 ] W L A N _ E N
[2 5 ]
K B C _ MU T E #
[ 2] C P U TE M P
[ 1 9 ] 3 G_ D E T #
[ 1 9] C C D _ D E T #
[2 ]
[2 ]
[3 2 ] S M C_ BA T
[3 2 ] S M D_ BA T
S M C _ C P U _ TH E R M
S M D _ C P U _ TH E R M
66
67
68
69
70
71
72
73
BA T _ DET
B A T _ V OL T _R
C U R _ S E N S E _R
T OT A L _C U R _R
C P U T E MP
3 G_ D E T #
C CD_ DET #
M OD E L _ I D
110
S MC _ B A T
111
S MD _ B A T
S M C _ C P U _T H E R M 1 1 5
S M D _ C P U _T H E R M 1 1 6
117
118
L C D _B R I GH TN E S S
LOW ACTIVE
[ 24 ] K B C _ B E E P
[ 1 9 ] L E D _ S C R OL L #
[ 19 ] L E D _N U M#
[ 19 ] L E D _C A P #
[ 2 1] L E D _ B A T _C H G#
[ 2 1 ] L E D _ B A T _ F U L L#
[2 1 ] L E D_ P W R#
8 0 CL K
3 IN1
8 0 DE T #
[ 14 ] P ME #
[2 1 ] T P _ CL K
[2 1 ] T P_ DAT A
24
25
28
29
30
31
32
34
85
86
87
88
89
90
[1 9 ]
33
W EB_ W W W #
108
109
[ 1 9 , 21 ] B T_ E N
[ 12 ] B K L_ E N
A C 0 / GP J 0
A C 1 / GP J 1
A C 2 / GP J 2
A C 3 / GP J 3
A C 4 / GP J 4
A C 5 / GP J 5
[2 1 ]
[ 1 2 , 27 ]
CP U _ F A N
FLASH
ADC
C 0 / GP I 0
C 1 / GP I 1
C 2 / GP I 2
C 3 / GP I 3
C 4 / GP I 4
C 5 / GP I 5
C 6 / GP I 6
C 7 / GP I 7
F L F R A ME # / GP G 2
F L A D0 /S CE #
F L A D1 /S I
F L AD2 /SO
F L A D 3 / GP G 6
F L CL K /S CK
( P D )F LR S T #/ W U I 7 / TM / GP G 0
SMBUS
( P D )K S O1 6 / GP C 3
( P D )K S O1 7 / GP C 5
AD
AD
AD
AD
AD
AD
AD
AD
SM
SM
SM
SM
SM
SM
C L K 0 / GP B 3
D A T 0 / GP B 4
C L K 1 / GP C 1
D A T 1 / GP C 2
C L K 2 / GP F 6 ( P U )
D A T 2 / GP F 7 ( P U )
(
(
(
(
(
(
(
PWM
PW
PW
PW
PW
PW
PW
PW
PW
M0 / GP A 0 (
M1 / GP A 1 (
M2 / GP A 2 (
M3 / GP A 3 (
M4 / GP A 4 (
M5 / GP A 5 (
M6 / GP A 6 (
M7 / GP A 7 (
PU
PU
PU
PU
PU
PU
PU
PU
)
)
)
)
)
)
)
)
2C
2D
2C
2D
2C
2D
LK 0 / G
A T0 / G
LK 1 / G
A T1 / G
LK 2 / G
A T2 / G
PD
PD
PD
PD
PD
PD
PD
0 . 1U _1 6 V _ 04
R8 4
*1 0 mi l _s h o rt
L C D _ B R I GH TN E S S
58
59
60
61
62
63
64
65
K B -S I 0
K B -S I 1
K B -S I 2
K B -S I 3
K B -S I 4
K B -S I 5
K B -S I 6
K B -S I 7
4
5
6
8
11
12
14
15
K B -S I 0
K B -S I 1
K B -S I 2
K B -S I 3
K B -S I 4
K B -S I 5
K B -S I 6
K B -S I 7
4
5
6
8
11
12
14
15
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
K B -S O0
K B -S O1
K B -S O2
K B -S O3
K B -S O4
K B -S O5
K B -S O6
K B -S O7
K B -S O8
K B -S O9
K B -S O1 0
K B -S O1 1
K B -S O1 2
K B -S O1 3
K B -S O1 4
K B -S O1 5
1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24
K B -S O0
K B -S O1
K B -S O2
K B -S O3
K B -S O4
K B -S O5
K B -S O6
K B -S O7
K B -S O8
K B -S O9
K B -S O1 0
K B -S O1 1
K B -S O1 2
K B -S O1 3
K B -S O1 4
K B -S O1 5
1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24
100
101
102
103
104
105
106
K B C_ S P I_ CE #
K B C_ S P I_ S I
K B C_ S P I_ S O
1
CC D_ EN
0
1
2
3
4
5
6
( P D )E G A D / GP E 1
( P D )E G C S # / GP E 2
( P D )E G C L K / GP E 3
WAKE UP
P F 0(
P F 1(
P F 2(
P F 3(
P F 4(
P F 5(
PU
PU
PU
PU
PU
PU
)
)
)
)
)
)
( P D )W U I 5 / GP E 5
( P D ) LP C P D # / W U I 6 / GP E 6
PWM/COUNTER
( P D )T A C H 0 / GP D 6
( P D )T A C H 1 / GP D 7
( P D )T MR I 0/ W U I 2 / GP C 4
( P D )T MR I 1/ W U I 3 / GP C 6
( P D )C R X / GP C 0
( P D )C TX / GP B 2
GP INTERRUPT
LPC/WAKE UP
( P D )L 80 H LA T / GP E 0
G I N T / GP D 5 ( P U )
R X D / GP B 0 ( P U )
T X D / G P B 1( P U )
93
94
95
96
97
98
99
S US B #
S US C #
0 . 1 U _ 16 V _ 0 4
( P D )R I N G# / P W R F A I L# / L P C R S T# / GP B 7
CLOCK
R 41 5
C K 32 K E
C K 32 K
W DT _ E N
107
B A T _ DE T
W L A N_ DE T # [2 0 ]
B T _D E T#
[ 19 ]
D D _O N [ 28 ]
[ 3 2]
C H G_ C U R
35
17
R S M R S T # [ 1 5, 1 7 ]
K B C _ R S T# [ 1 3 ]
47
48
C P U _F A N S E N
S M D_ B A T
AC
D 12
BAV9 9
AC
D 25
BAV9 9
B A T _ V OL T
AC
D 24
BAV9 9
C H G_ C U R
AC
D 26
BAV9 9
T OT A L _C U R
T OT A L _ C U R
112
[3 1 ]
[ 5 , 1 2, 1 5 , 17 ]
R 2 39
R1 0 5
X5
4
3
C2 2 1
M73 5T
R 27 6
10 K _ 0 4
R 28 5
*1 0 K _0 4
VD D3
Sheet 26 of 40
KBC-ITE IT8512E
V D D3
3 G_ D E T #
R 26 4
10 K _ 0 4
CC D_ DE T #
R 27 5
10 K _ 0 4
A
S MC _C P U _ T H E R M
R 20 1
4. 7 K _ 0 4
C
S MD _C P U _ T H E R M
R 19 9
4. 7 K _ 0 4
A
C P U TE M P
R 37 0
*1 K _ 1% _ 04
P C LK _ K B C
B A T _ V OL T
A
C H G_ C U R
C
T OT A L _C U R
R9 0
* 10 _ 04
R2 8 0
1 0 0_ 0 4
C4 7 7
B A T_ V OL T _R
1 0 0_ 0 4
C4 7 9
C U R _S E N S E _ R
1 0 0_ 0 4
C4 8 5
T O TA L _ C U R _ R
R2 8 6
R2 8 9
C1 9 4
*1 0 P _ 50 V _ 04
1 U _ 1 0V _ 0 6
1 U _ 1 0V _ 0 6
1 U _ 1 0V _ 0 6
A
KBC_SPI_*_R = 0.1"~0.5"
0 . 1 U _ 16 V _ 0 4
U 17
VD D
3. 3 K _ 1 %_ 0 4
Z 2 61 2
SI
SO
3. 3 K _ 1 %_ 0 4
K B C _ F LA S H 3
W P#
C E#
SC K
7
H OL D #
V SS
5 K B C _S P I _ S I _ R
2 K B C _S P I _ S O _R
R2 5 1
R2 4 0
R2 4 1
1 K B C _S P I _ C E #_ R
R2 5 2
6 K B C _S P I _ S C LK _ R
4
1 5 _1 % _0 4
K B C _ S P I _S I
1 5 _1 % _0 4
C4 5 1
K B C _ S P I _S O
1 5 _1 % _0 4
C4 3 5
K B C _ S P I _C E #
1 5 _1 % _0 4
C4 3 6
K B C _ S P I _S C L K
C4 5 2
*3 3 P _ 50 V _ 04
*3 3 P _ 50 V _ 04
*3 3 P _ 50 V _ 04
*3 3 P _ 50 V _ 04
E N 2 5P 0 5 -50 G C P
[ 32 ]
* 10 M _0 4
MP ? ? ?
J_ECDBG1
3 2. 7 6 8 K H z
1
2
1 5P _ 5 0V _0 4
M7 20T /M7 30 T
0V
C
C
[1 5 ]
[1 5 ]
C H G_ E N
M ODE L_ ID
3 .3V
A
A
AC
D 27
BAV9 9
V DD3
C 4 34
R 2 48
SW I#
VO LTA GE
X
10 K
C
[ 2 1]
S U S _ P W R _A C K
19
R2 85
[1 5 ]
V C O R E _ ON
CL _ PW RO K
119
123
5mil
C
8
120
124
25mil
3 IN1
10 K _ 04
4. 7 K _ 0 4
4. 7 K _ 0 4
B A T _ DE T
[ 19 , 2 1]
[ 32 ]
35mil
1 U _1 0 V _0 6
A T 35 1 0 I GV -2 . 9 3-C -C -T 1
AC
D 11
BAV9 9
S M C_ B A T
B A T _V O LT
S MI # [ 1 5 ]
S CI# [1 5 ]
P W R_ B T N#
K B C_ W RE S E T #
C 4 89
V D D3
R2 8 1
R2 7 3
R2 7 4
[ 3 2]
3 G_ E N
D
Q2 1
2 N 7 0 02 W
MO D E L _I D
L E D _ TH R O TT L E # [ 1 9]
A C_ P RE S E NT [1 5 ]
82
83
84
2
128
[3 2 ]
Z2609S
4
W DI
X
[ 19 ]
[ 17 , 2 0, 2 3 , 2 7, 2 9 ]
[ 1 7]
1
R E S E T#
G ND
1 0 0 K _0 4
1 0K
CL K RU N#
CIR
R I 1 #/ W U I 0/ GP D 0 ( P U )
R I 2 #/ W U I 1/ GP D 1 ( P U )
UART
56
57
VC C
R 276
24
J_KB1
M R#
2
J1
*OP E N _ 35 m li
R 2 90
MODEL ID SELECTOR
K B C_ S P I_ S CL K
EXT GPIO
P W R S W / GP E 4( P U )
D 03 A
B OM ? ?
)I D 0 / GP H
)I D 1 / GP H
)I D 2 / GP H
)I D 3 / GP H
)I D 4 / GP H
)I D 5 / GP H
)I D 6 / GP H
( P D )I D 7 / GP G 1
PS/2
PS
PS
PS
PS
PS
PS
J _ K B _7 3
*8 52 0 2 -24 0 51
GPIO
1 20 K _ 1% _ 0 4
C P U_ F AN_ R
C1 8 2
B R I GH T N E S S
74
IT 85 12 E
I T8 5 1 2E / E X
R8 5
VBAT
DAC
D
D
D
D
D
D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
18
21
[ 30 ] P W R _ S W #
[ 1 2, 1 9 ] L I D _ S W #
A V CC
E C S C I # / GP D 3 ( P U )
E C S MI # / GP D 4 ( P U )
1
12
27
49
91
11 3
1 22
125
T H E R M_ R S T #
K S O0 / P D 0
K S O1 / P D 1
K S O2 / P D 2
K S O3 / P D 3
K S O4 / P D 4
K S O5 / P D 5
K S O6 / P D 6
K S O7 / P D 7
K S O8 / A C K #
K S O 9/ B U S Y
K S O 10 / P E
K S O1 1 / E R R #
K S O1 2/ S L C T
KSO 1 3
KSO 1 4
KSO 1 5
G A 2 0/ G P B 5
K B R S T #/ G P B 6 ( P U )
P W U R E Q #/ GP C 7 ( P U )
L 8 0 LL A T / GP E 7 ( P U )
WAKE UP
[2 ]
3
26
50
92
11 4
121
12 7
VST BY
VST BY
VST B Y
VST BY
VST BY
VST BY
11
W RS T #
AVSS
14
K B C _W R E S E T #
[ 1 3] GA 2 0
[ 3 2] A C _ I N #
[ 2 1] LE D _ A C I N #
[ 2] T H E R M _ A LE R T#
K/B
K S I 0 / S TB #
K S I1 /A F D #
K S I 2/ I N I T #
K S I 3/ S L I N #
KS I4
KS I5
MATRIX
KS I6
KS I7
75
P C LK _ K B C
L AD 0
L AD 1
L AD 2
L AD 3
L PC CL K
L F R A ME #
LPC
S E RIRQ
L P C R S T #/ W U I 4 / GP D 2( P U )
J_ K B _ 7 2
8 5 20 2 -24 0 5 1
W D _D I S A B L E
U 20
5
C4 7 6
10 K _ 04
2
C 2 22
1 5 P _ 50 V _ 0 4
10
W D T _E N
1
9
3 IN1
J _ E C D B G1
2
4
6
8
10
1
3
5
7
9
V DD3
8 0 CL K
8 0 DE T #
S P U F Z -1 0S 3-V B -0 -B
0_04
N C1
*N C _0 4
R 41 5
I T8 512 E/ EX -- -0 _0 4 O HM
C1 9 2
*0 . 1 U _ 1 6V _ 0 4
K B C _ A GN D
I T8 502 E- J-- - -0. 1U _16 V_0 4
[ 1 3, 2 1 , 27 . . 3 0 , 32 ]
[ 5 , 8 . . 1 6, 1 8 . . 25 , 2 7 , 31 ]
V DD3
3. 3 V S
KBC-ITE IT8512E B - 27
B.Schematic Diagrams
10
9
8
7
13
6
5
22
VC C
U4
[ 1 3 , 19 ] L P C _A D 0
[ 1 3 , 19 ] L P C _A D 1
[ 1 3 , 19 ] L P C _A D 2
[ 1 3 , 19 ] L P C _A D 3
[ 1 8] P C L K _ K B C
[ 1 3, 1 9 ] L P C _ F R A ME #
[ 15 , 1 9] S E R I R Q
[ 1 4, 1 9 , 2 0, 2 2 , 23 ] B U F _ P L T_ R S T #
3
FOR M730T
W D _D I S A B L E
1 0 0 K _0 4
R2 8 8
3 . 3V S
0. 1 U _1 6 V _0 4
W D T _E N
V DD3
R 67
1 0K _ 0 4
K B C _ A GN D
C2 0 3
10 K _ 04
R2 9 2
G
K B C_ A V DD
VDD 3
Schematic Diagrams
System Power, LED BKLT
5VS,3.3VS
S Y S 15 V
6A
3A
1 00 K _ 04
PR9 7
SU SB
4
D
P R 1 54
3A
1 M_ 04
P Q2 4
2 N 7 00 2 W
G
5 VS
1 M_ 0 4
PC1 0 1
PC1 0 4
P R9 5
0 . 1U _1 6 V _ 04
*1 0 U _ 10 V _ 08
10 0 K _0 4
SUSB
PQ 2 5
2 N 7 0 0 2W
G
S US B
P C 1 05
PR9 1
0 . 1 U _ 1 6V _ 0 4
*1 0U _1 0 V _ 08
10 0 K _ 04
1 0 0P _ 5 0 V _0 4
S
P Q3 2
2 N 7 00 2 W
G
P C1 0 3
P R 20 0
*1 0 _ 06
S
G
Sheet 27 of 40
System Power,
LED BKLT
M735T LED PANEL BACKLIGHT DRIVER
V IN
L E D_ P W R+
P L1 0
P D2 3
A
*4 . 7u H
*F M2 6 0
C
V DD5
P C 20 1
* 10 U _ 2 5V _ 1 2
[ 12 , 2 6 ]
OV P=3 5V
P C 20 2
P R1 8 5
* 10 U _ 2 5 V _1 2
*9 0 . 9K _ 1 % _0 4
P C 20 5
B RIG HT NE S S
P C2 0 3
P C2 0 4
*1 U _ 5 0 V _1 2
*1 U _ 5 0V _ 1 2
P Q5 9
*2 N 7 0 02 W
2 0 K -2 MH z
D
S
22
O VP
23
24
EN
A GN D
PW M
EP
APW M
P GN D
S K IP
P GN D
C O MP
S
3
4
F s w = 2 MH z
I N V _B LO N
6
2
G
G
20
P Q6 0
*2 N 7 00 2 W
P R 1 88
P C 2 06
*1 . 05 K _ 1 %_ 0 4
L E D = 20 m A
5
7
S E L3
FSET
S E L2
IS E T
S E L1
L E D1
L E D2
26
SEL2
SEL3
0
0
0
Only LED1 on
LEDx Output
1
0
0
LED1 throgh LED2 on
0
1
0
LED1 throgh LED3 on
1
1
0
LED1 throgh LED4 on
0
0
0
LED1 throgh LED5 on
1
0
1
LED1 throgh LED6 on
0
1
1
LED1 throgh LED7 on
1
1
1
LED1 throgh LED8 on
27
1
21
S GN D
V DD5
18
S E L 3 = H P R1 8 7
*1 0K _ 0 4
17
S E L 2 = L P R1 8 9
*0 _0 4
16
S E L 1 = H P R1 9 0
*1 0K
30mil
L E D_ P W R+
S G ND
*1 00 K _ 04
D
1 0 0 - 4 0 0H z
SW
19
P R 1 86
SW
PU 9
V IN
V DD 5
25
R.OVP = (V.OVP-30)/54.9uA
[ 12 ]
SEL1
* 1U _1 0 V _ 06
S GN D
L E D1 L E D3 L E D5 L E D6 L E D4 L E D2 -
15
L E D 2-
L E D4
14
L E D8
LG N D
L E D6
13
S G ND
12
S G ND
11
S GN D
L ED 7
*1 2 K _0 4
L E D5
PR1 9 2
* 13 K _ 1% _ 04
10
P R 19 1
*0 . 1U _1 6 V _ 04
9
P C 2 07
L E D3
* 0 . 1U _1 6 V _0 4
8
B.Schematic Diagrams
P Q 64
* 2N 7 00 2 W
D
*1 0 0P _ 5 0V _ 0 4
S
* 10 0 K _0 4
P C9 8
P C 10 0
D
S
P R 14 7
3 . 3V S
6A
4
V DD5
P R9 8
S US B #
P Q 27
A O 44 6 8
8
7
3
6
2
5
1
D
SYS1 5 V
[ 1 7 , 2 0, 2 3 , 26 , 2 9 ]
P Q2 9
A O4 4 68
8
7
3
6
2
5
1
VD D3
V D D5
[ 5, 1 2 ]
[ 5, 1 2 ]
*A 8 5 00
L V D S -L 0 N
L V D S -L 0 P
2A
P L V DD
3 .3 V S
Fsw = 26.03/R.FSET
1.23/I.SET * 210
(mA/LED)
ID =
L E D 4-
L E D 5P R 1 93
*0 _ 06
[ 5, 1 2 ]
[ 5, 1 2 ]
L E D 6-
L V D S -L 2 N
L V D S -L 2 P
[ 5 , 1 2] P _ D D C _C LK
[ 5 , 12 ] P _ D D C _ D A T A
L E D 3L E D 1-
[ 5, 1 2 ]
[ 5, 1 2 ]
S GN D
[ 5 , 1 2]
[ 5 , 1 2]
L V D S -L 1 N
L V D S -L 1 P
L V D S -L C L K N
L V D S -L C L K P
J _ LE D 1 _7 3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
* 20 3 7 4-0 3 0E -3 1
[ 12 , 2 8. . 3 2 ] V I N
[ 1 2] P L V D D
[ 1 2, 2 8 , 29 ] S Y S 1 5V
[ 28 , 2 9] V D D 5
[ 1 3, 2 1 , 26 , 2 8 . . 30 , 3 2] V D D 3
[ 12 , 1 3, 1 6 , 1 9, 2 1 , 24 , 2 5] 5 V S
[ 5 , 8 . . 16 , 1 8 . . 26 , 3 1] 3 . 3V S
B - 28 System Power, LED BKLT
Schematic Diagrams
Power VDD3, VDD5
VDD3,VDD5
V IN
35mil
E
SYS5 V
25mil
P C1 8 8
5mil
B
V IN 2
+
0 . 1 U _ 25 V _ X 7R _0 6
LD O5 V
*1 5 U _ 2 5V _ D 2
A
P C1 9 4
P D2 2
P C1 9 3
P R 17 1
F M0 5 4 0-N
4 . 7U _ 6. 3 V _ X5 R _0 6
F M0 54 0 -N
0 . 1U _ 10 V _ X7 R _0 4
* 1M _0 4
22
19
T G2
P R1 5 7
*1 0 _0 6
0 . 1U _ 10 V _ X7 R _0 4
14
4
PL 9
2. 5 U H _ 6. 8 *7 . 3 *3 . 5
23
25 mo hm_ NE C
P R 1 61
1 0_ 0 4
P R 1 60
1 0_ 0 4
20
B G1
27
B G2
S E NS E 1 +
SENSE2 +
LG A TE 2
17
S E NS E 1 -
S E NS E 2 -
P C 18 1
P R 17 6
2
VF B1
24
1 0 K _ 04
25
L D O5 V
R UN2
P R 1 63
*0 _ 04
VFB2
F R E Q / P L LF L T R
P R1 6 6
S GN D 4
1
1 5 0U _ 6. 3 V _ V
P R 1 81
1 0_ 0 4
0 . 1 U _ 10 V _ X 7R _0 4
2 5m ohm _NE C
3. 3 2 K _ 1% _ 06
9
2 20 P _ 5 0V _ 0 4
P R1 7 3
47 K _ 0 4
P R 17 2
P C 1 92
6 3 . 4K _ 1 %_ 0 6
* 1 00 P _ 50 V _ 0 4
1 0 0 P _5 0 V _ 04
S G ND 4
MO D E / P L L I N
I LI M
* 10 m li _ s ho rt
P R1 5 9
1 0_ 0 4
5
P C1 9 6
10
P R 16 2
IT H2
P GO OD
T K/SS1
L D O5 V
F M 58 2 2
P R 1 82
P C 17 4
5V
P C 19 5
3
12
2 0K _ 1 %_ 0 6
+P C 17 7
0 _0 6
11
* 10 0 P _ 50 V _ 0 4
T K/SS2
P C1 8 6
P R1 6 7
E X T V CC
IT H1
1
1 05 K _ 1% _ 0 6
P Q 54
A O 44 6 8
1 00 0 P _ 50 V _ X 7R _0 4
7
22 0 P _ 50 V _ 0 4
6
47 K _ 04
S GN D 4
RU N1
* 2 2P _ 5 0V _ 0 4
P R1 6 4
4
7A
Sheet 28 of 40
Power VDD3, VDD5
*O P E N _ 5 mm
P D 16
8
PJ 1 3
V DD 3
P C1 9 8
1 00 0 P _5 0 V _ X7 R _0 4
28
26
P R1 6 8
SY S3 V
7A
13
P C1 8 4
P C 1 87
P R 1 58
8m _ 25
C
SW 2
5
6
7
8
L GA T E 1
4
F M5 82 2
1 50 U _6 . 3 V _V
SW 1
P Q5 2
A O4 46 8
3
2
1
0. 1U _1 0 V _ X7 R _ 0 4
P D1 5
+P C 1 7 1
A
0. 1 U _ 1 0 V _X 7 R _ 0 4
8
7
6
5
1
P C1 6 2
2
P C 1 63
P Q 55
A O 44 6 8
PL 8
4 . 7 U H _6 . 8 *7 . 3 *3 . 5
A
P R 1 56
10 m _1 2
1
2
3
5A
S Y S 5V
C
5A
PJ 1 2
*O P E N _ 5 mm
P C 1 76
*1 00 0 P _ 50 V _ X7 R _0 4
1
2
3
T G1
P C1 9 7
3
2
1
4
V IN
8
7
6
5
0 . 1U _ 10 V _ X7 R _0 4
P Q5 3
A O 44 6 8
18
B O OS T 1
P R 16 5
* 10 _ 0 6
IN T V CC
P C1 8 5
P C1 8 0
*1 00 0 P _ 50 V _ X 7R _0 4
P GN D
4
16
P R 17 0
2 0 K _1 % _0 4
PU 8
L T C 3 85 0
PIN 29 = SGND4
S G ND4
S GN D 4
S GN D 4
10 0 0P _5 0 V _X 7 R _ 0 4
P C 18 3
10 0 0P _5 0 V _X 7 R _ 0 4
E N_ 5 V
P R 1 74
T K/SS2
S G ND 4
E N _3 V
E N_ 3 V
P C 19 9
SYS5 V
* 0_ 0 4
35mil
D
P R1 7 5
P C2 0 0
P C 18 2
P R 1 83
*0 _0 4
0. 0 2 2 U _ 16 V _ X 7R _0 4
0 . 0 1U _ 50 V _ X7 R _0 4
*1 0K _ 0 4
L GA T E 1
P C 1 89
0. 0 1 U _ 5 0V _ X 7 R _ 04
S GN D 4
S G ND 4
S GN D 4
C
P D 17
A
P D 18
P C 1 90
0. 0 1 U _ 5 0V _ X 7 R _ 04
LD O5 V
25mil
C
P D 19
A
S Y S 5V
F M0 54 0 -N
C
F M0 54 0 -N
A
S Y S 10 V
P C1 7 8
2 20 0 P _ 50 V _ X7 R _0 4
F M0 54 0 -N
5mil
S
S
D
5V
P Q 57
* 2N 70 0 2 W
G
L D O5 V
02/22
E N _ 5V
P Q5 6
*2 N 7 0 02 W
G
P R1 8 4
* 10 m i _l s ho rt
P R1 7 7
P R 17 9
*1 0 K _0 4
* 10 K _ 04
A
P D 20
C
F M0 54 0 -N
S Y S 15 V
P C1 7 9
2 20 0 P _ 50 V _ X7 R _0 4
S GN D 4
PR1 7 8
PJ 1 4
P C 1 91
*1 00 K _ 0 4
*O P E N _ 3 5m i l
* 0 . 1U _1 6 V _ 04
P Q 58
* 2N 70 0 2 W
G
P R1 8 0
*0 _ 0 4
P M _T H R MT R I P #
[ 2, 5 , 1 3]
P NC 1
S
D
S GN D 4
S GN D 4
*N C _0 4
[ 1 2, 2 7 , 2 9. . 3 2 ] V I N
[ 1 3 , 21 , 2 6 , 27 , 2 9 , 30 , 3 2] V D D 3
[ 27 , 2 9] V D D 5
[ 32 ] S Y S 5 V
[ 12 , 2 7 , 29 ] S Y S 1 5V
[ 1 6, 1 9 , 2 1, 2 9 . . 31 ] 5V
Power VDD3, VDD5 B - 29
B.Schematic Diagrams
21
C
1 00 K _ 0 4
P D2 1
2
20 0 K _ 1% _ 0 4
5
6
7
8
PR1 4 1
0 . 1 U _ 1 6V _ 0 4
C
P C 1 48
* OP E N _3 5 m li
15
PJ 9
B OO S T 2
P R 85
VDD 5
P C2 1 1
[ 3 0]
G
DD_ O N
1 0 _0 4
6 -06 -0 054 0- 021
15 U _2 5 V _D 2
D D _O N H
S
[ 26 ]
P R1 6 9
V IN1
PC2 1 0
+
A
P Q 18
2 N 7 0 02 W
PQ 2 1
D T A 11 4 E U A
C
D D _ ON #
D
[ 2 9, 3 0 ]
Schematic Diagrams
Power 1.5VS, 1.05VS, 3.3V, 5V
1.05VS
5V
A
V IN
P C 90
P C 21 9
P R 2 05
0 . 0 1U _ 16 V _ X7 R _ 0 4
2 0 P _5 0 V _ 04
2 4 . 9 K _1 % _0 6
4
DL
P D 25
4
F M5 82 2
17
PAD
P C 2 14
+
2 2 0U _ 4V _ D
P C 2 15
+
15
14
16
D H
N.C
P C 2 17
0 . 1U _ 16 V _ 04
1U _1 0 V _ 06
1.5V
5V
PC1 5 4
V1 .8
P R1 5 1
3 .3 V
35mil
[ 1 7]
P R1 4 8
5V
1 0 K _0 4
5
9
7
1 0 0K _ 0 4
P R1 4 9
G
GN D
P C 1 52
P C 1 59
P C 16 0
10 0 0P _5 0 V _X 7 R _ 04
0. 1 U _ 1 6V _0 4
1 0 U _ 1 0V _ 0 8
VO UT
VO UT
VF B
6
V 1 .5
2. 5A
4
3
2
A P L 5 9 13
PC1 5 1
8 2P _ 5 0V _ 0 4
P R1 5 0
17 . 4 K _1 % _ 04
P C 15 8
PC1 5 6
10 U _ 1 0V _ 0 8
1 0 U _ 10 V _ 0 8
0 . 1U _ 16 V _ 04
1 9. 6 K _ 1% _ 06
G
S USB #
P Q 46
2 N 7 00 2 W
P J 27
* OP E N _3 5 mi l
S
[ 17 , 2 0, 2 3 , 2 6, 2 7 ]
S Y S 15 V V D D 5
3 .3 V
3A
PR9 4
P R 96
P C 10 2
1M _0 4
4
P R9 0
D
1 M_ 0 4
3A
4 7 0P _ 5 0V _ X 7R _ 04
P Q2 6
A O4 46 8
8
7
3
6
2
5
1
5V
3A
P R 93
4
3A
P Q2 8
A O4 4 6 8
8
7
3
6
2
5
1
1 00 K _ 0 4
1 00 K _ 0 4
P Q3 1
2N 70 0 2 W
D D _ ON #
*1 00 P _ 5 0V _ 0 4
D D _ ON #
P Q3 0
2N 70 0 2W
G
D D _O N #
[ 2 8 , 30 ]
S
G
PC9 9
D
S Y S1 5 V VDD 3
B - 30 Power 1.5VS, 1.05VS, 3.3V, 5V
PJ 1 0
1 . 5V S
* OP E N _3 m m
1
2
P C 1 53
PR1 5 2
S
SUS BL
SU SBL
EN
V CNT L
1 U _ 10 V _ 06
D
[ 30 ]
VIN
VIN
P OK
1
P Q4 7
2 N 7 0 02 W
1 00 K _ 0 4
PU 7
8
D
5mil
2. 5A
1. 5 V S _ P W R G D
25mil
3.3V,5V
P C2 1 6
*2 20 U _ 4 V _D
[ 27 , 2 8] V D D 5
[ 1 3, 2 1 , 26 . . 2 8 , 30 , 3 2] V D D 3
[ 1 2, 2 7 , 28 ] S Y S 1 5V
[ 16 , 1 9 , 21 , 2 8, 3 0 , 31 ] 5V
[ 2 , 1 2. . 1 7 , 1 9, 2 0 , 23 , 3 0] 3 . 3V
[ 2. . 5 , 7 , 8 , 13 , 1 6] 1. 05 V S
[ 3 , 8, 1 3 , 14 , 1 6 , 19 , 2 0] 1 . 5V S
[3 0 ] V 1 .8
[ 12 , 2 7 , 28 , 3 0. . 3 2 ] V I N
1 . 05 V S
2
1 0m m
P Q6 6
I R F 7 8 32 Z T R P B F
3
P J 28
1
C
2
V 1 .0 5
15A
A
P C 21 8
PL 1 1
2. 5 U H + / -20 % _B C I H P 1 0 40
1
2
0. 1 U _ 5 0V _ 0 6
5
1 0 . 7K _ 1 % _0 4
G ND
FB
N.C
0 _ 04
LX
BST
6
P R 20 4
P C 2 13
1
VC C
V OU T
8
P R 20 3
S
B.Schematic Diagrams
9
Sheet 29 of 40
Power 1.5VS,
1.05VS, 3.3V, 5V
P Q6 5
I R F 7 4 13 Z P B F
2
3
1
P U1 0
S C4 1 2 A
P GD
RT N
10
EN
N.C
13
11
1. 05 V M_ P W R G D
IL IM
12
N.C
1 0K _ 0 4
7
[ 1 7]
4
0 . 0 33 U _ 1 6 V _X 7 R _ 04
5
6
7
8
P Q 23
2 N 7 00 2 W
P R 2 02
3 . 3V
F M0 54 0 -N
2
3
1
G
P C 2 12
+
15 U _ 2 5 V _D
PD2 4
5 . 1K _1 % _0 4
S
S US B L
PR2 0 1
5
6
7
8
E N _ 1. 0 5 V S
D
1 00 K _ 04
C
P R7 8
5V
Schematic Diagrams
Power 1.8V, 0.9VSM
1.8V,0.9VSM
5V
V 1 .8
P R 39
P R4 7
1 M_ 0 4
10 _ 0 6
1 0 0 P _5 0 V _ 0 4
2 . 2K _1 % _ 0 4
1 U _1 0 V _ 0 6
1U _ 10 V _ 0 6
2
9
Rb
10
5
PC 5 3
P C 48
P R 42
1 U_ 1 0 V _ 0 6
*0 . 0 6 8 U _ 1 0V _0 4
0 _ 06
PC 4 2
1 0 00 P _ 5 0 V _ X7 R _0 4
VS SA
1U _ 1 0V _ 0 6
DL
4
12
13
V 1 .8
PR 4 0
P C5 5
P C6 7
2 0 K _ 1% _ 0 4
4 . 7U _ 6. 3V _ X 5 R _ 0 6
1 0 U _1 0 V _ 0 8
PC 4 9
PC5 2
1 0 U _ 1 0 V _ 08
1 U _ 1 0V _0 6
1
11
P C 14 0
* 4 . 7U _ 25 V _ X 5 R _ 0 8
0 . 1 U _ 5 0 V _0 6
21
PQ 4 3
I R F 7 41 3 Z P B F
4
P R2 5
4 .7 K_ 0 4
PL 5
2 . 5 U H _ 6 . 8 *7 . 3 *3 . 5
1
2
22
19
V D DP 1
20
P D7
P C3 5
VTTEN
22 0 U _ 4 V _ D
PQ 4 2
A O 4 45 6
1 U _1 0 V _ 0 6
P GN D 1
P GN D 1
P GN D 2
P C1 4 6
+
F M5 8 22
4
5V
V D DP 2
V D DP 2
E N /P S V
P J4
7A
1
18
16
17
2
1. 8 V
Sheet 30 of 40
Power 1.8V,
0.9VSM
* OP E N _ 8 m m
VSSA
VTT
VTT
V 1 .8
PC 7 7
PC7 4
0 . 1 U _ 1 6 V _ 04
0 . 01 U _5 0 V _ X 7R _ 0 4
P R5 6
0 _0 6
VSSA
S C 4 86
P R3 0
2 20 K _ 1 % _ 04
D
5V
G
D D _ ON #
V D D3
PQ 4 0
2N 7 0 02 W
V IN
500mA
VA
P Q1 5
N D S 3 5 2A P _N L
S
D
P R1 4 5
0 . 1 U _ 1 6 V _ 04
V IN1
PD 8
A
F M0 5 40 -N
C
PD 9
A
F M0 5 40 -N
C
1 0 K_ 0 4
S
[ 2 8, 29 ]
1 .8 V EN
PC 3 8
P W R_ S W #
P Q 17
2 N 7 0 0 2W
D
[2 6 ]
P R 14 3
1 0 0 K _0 4
PR 1 4 2
20 K _ 1 % _ 04
AP_ KEY #
[2 6 ]
C
P C 1 49
0. 1 U _5 0 V _ 0 6
PC 4 6
P R 14 0
1 0 0 K _0 4
G
B
PQ 1 6
D TA 11 4 E U A
S US B L
G
PQ 9
2N 7 0 02 W
0 . 1 U _ 1 6 V _ 04
P R 14 4
[1 9 ]
[2 8 ]
P C 15 0
10 0 K _ 0 4
0 . 1 U _ 5 0 V _0 6
D
D
G
G
1 0 K_ 0 4
M_ B T N #
D D_ O NH
E
VIN
C
P C 20 9
0 . 1 U _5 0 V _ 0 6
P R 19 6
[ 1 9]
PR 1 9 4
PQ 6 3
D TA 11 4 E U A
B
[2 9 ]
G
P R1 4 6
P Q6 2
2 N 70 0 2 W
S
E
V IN
P Q 61
2 N 7 0 0 2W
S
VTTEN
4 7 K _ 04
PQ 1 3
2 N 70 0 2 W
S
P R4 1
S
5V
D
S
P Q 14
2 N 7 0 0 2W
D
G
D
* OP E N _ 3m m
IL IM
LX
14
15
1.5A
S
0 .9 VS M
V C CA
PC 5 6
*4 . 7 U _ 2 5 V _X 5 R _0 8
P R5 7
0_06
23
VTTS
P C4 4
P C1 4 2
0 . 1U _ 25 V _ X 7 R _ 0 6
5
6
7
8
1 0K _ 1 % _ 04
P C3 6
G
1 0 _ 06
V IN
C O MP
D H
*0 . 1 U _1 6 V _ 0 4
24
FB
RE F
P C 51
P R1 3 2
[ 17 ]
1 00 K _ 0 4
P R 1 95
P C2 0 8
1 0 0 K _0 4
0. 1 U _5 0 V _ 0 6
1 0 K _ 04
APKE Y#
[ 10 , 1 1 ] 0 . 9 V S M
[ 5 , 7 , 8 , 1 0, 11 ] 1 . 8V
[ 29 ] V 1 . 8
[ 1 6 , 1 9, 2 1 , 2 8 , 2 9, 3 1 ] 5V
[ 2 , 1 2 . . 1 7 , 19 , 2 0 , 2 3, 29 ] 3 . 3V
[ 1 3, 2 1 , 2 6 . . 2 9, 3 2 ] V D D 3
[ 1 2 , 2 7 . . 29 , 3 1 , 3 2 ] V I N
Power 1.8V, 0.9VSM B - 31
B.Schematic Diagrams
PR 5 4
T ON
BST
6
8
1 . 8 V _ P W R GD
P R2 6
0_06
C
P C1 3 6
P R 5 1 1 0 _ 06
1
1 0 0 K _ 04
A
PC 1 3 9
7
5
6
7
8
P R6 2
PG D
1
2
3
PC 5 0
V D DQ S
1
2
3
3
C
1 0 _0 6
Ra
PJ 2
PR 5 0
PD 1 2
F M 0 5 40 -N
P U3
P R1 3 3
2
3 .3 V
A
V IN
Schematic Diagrams
Power VCORE
VCORE
VI N
5V
A
V -R C 1
P D1 1
1 00 0 P _ 50 V _ X 7R _ 04
F M0 5 4 0-N
1 U _ 1 0V _ 0 6
P R2 4
BST1
P Q3 6
I R F 7 4 13 Z P B F
* 0_ 0 4
P C2 3
D P R S L_ S T P
E N_ V CO RE
DP RS L
10 0 _ 1% _ 0 4
*1 0 0P _5 0 V _ 04
*1 00 P _ 5 0V _ 0 4
C
5
6
7
8
P C 13 0
+
* 33 0 U _ 2 . 5V _D 3
P C 12 3
+
*3 3 0 U _ 2. 5 V _ D 3
P C1 3 1
+
33 0 U _ 2 . 5V _D 3
P C 12 4
+
3 3 0U _ 2. 5 V _ D 3
A
2
3
1
T G2
BG 2
1 00 P _ 5 0V _0 4
0_06
PC5 9
P C2 0
0. 1 U _5 0 V _0 6
0 . 1U _5 0 V _ 06
5
6
7
8
0 . 1 U _ 25 V _ X 7 R _ 0 6
P C 29
0 . 0 15 U _5 0 V _ 06
C S 2P
P R4 8
0 . 1 U _ 5 0 V _0 6
P C1 3 8
+
1 5U _ 25 V _ D 2
PR 3 2
0 _ 06
P Q4 4
I R F 7 4 13 Z P B F
P Q4 1
I R F 7 8 32 Z T R P B F
20A
PL 4
0. 5 U H _ 10 *1 0 *4 . 1
S GN D 3
P R4 9
P C4 3
P C4 5
1 00 0 P _ 50 V _ X 7R _ 04
1U _2 5 V _ 08
PD4
P D1 3
P C4 1
F M0 5 40 -N
1 U _ 10 V _ 0 6
4
4
F M5 8 22
A
V -R C 2
1 00 _ 1 %_ 0 4
A
5
6
7
8
5V
C
S GN D 3
P C1 2 9
+
33 0 U _ 2 . 5V _D 3
C
* 10 0 P _5 0 V _ 04
7. 5 K _ 1 %_ 0 4
V P N2
P C 1 33
0_06
P C5 8
DR N2
P C1 3 5
S G ND3
PC3 0
PR 2 1
1K _1 % _0 4
E -R C
1 U _ 1 0V _ 0 6
S GN D 3
P R2 0
R1 7 2
P C 11 6
+
3 30 U _2 . 5 V _ D 3
4
V C OR E _ V R E F
P C 13 7
P R3 8
V IN
2
3
1
* 10 m li _ s ho rt
10 0 0P _5 0 V _ X 7R _0 4
SC4 5 2
Z 2 8 01
FB+
FBZ 2 8 02
D RP D RP +
*1 0m i l _s h or t
1 0_ 0 4
1 0_ 0 4
V C OR E
40A
PD3
F M5 8 22
2
3
1
44
43
42
41
40
39
38
37
36
35
34
45
*6 8 0_ 0 4
2
3
1
P R 1 28
P R1 3 0
1 K _ 04
P C 25
PR 3 1
P R 1 31
PR 3 3
P R 29
4
PQ 7
* I R F 7 8 32 Z T R P B F
PQ 3 9
I R F 7 83 2 Z T R P B F
PC 3 1
15 0 0 P _5 0 V _ 04
D E L A Y _P W R GD
CP U_ V C CS E N S E
C P U_ V S S S E N S E
[2 ] P S I#
1 00 _ 1 %_ 0 4
33
3 2 CS 1 N
3 1 CS 2 N
30
29
2 8 VCC A
27
2 6 DA C
2 5 V C _S S
24
23
P C3 2
[ 5 , 1 7]
[3 ]
[3 ]
R 17 0
GN D
3 . 3V S
S GN D 3
TRERMAL PAD
C S1 +
C S 1C S 2C S2 +
E R R OU T
V C CA
A GN D
D AC
SS
DR P +
D RP-
P C 13 4
1 0 00 P _ 50 V _ X 7R _ 04
C LK E N #
VR EF
H YS
C LS E T
V ID 6
V ID 5
V ID 4
V ID 3
V ID 2
V ID 1
V ID 0
1 5 U _ 2 5V _D 2
C S 2N
1 0 0P _ 5 0V _0 4
H_ V ID6
H_ V ID5
H_ V ID4
H_ V ID3
H_ V ID2
H_ V ID1
H_ V ID0
0 . 0 22 U _1 6 V _ X 7R _0 4
P R 22
13 0 K _ 1% _ 0 4
P C3 3
1
2
3
4
5
6
7
8
9
10
11
V C OR E _ V R E F
V C OR E _ H Y S
V C OR E _ C LS E T
[ 3]
[ 3]
[ 3]
[ 3]
[ 3]
[ 3]
[ 3]
4
P C3 7
P R 18
13 0 K _ 1% _ 0 4
P C3 4
V C OR E
DP R S L
VPN 1
V IN1
BST 1
T G1
D RN1
B G1
V5 _ 1
EN
NC
IS H
2 2 0K _ 1 % _0 4
P W RG D
VPN 2
V IN2
BST2
T G2
D RN2
B G2
V5 _ 2
P S I#
F B+
FB -
3 3 K _1 % _ 04
P R2 3
P U2
6 80 _ 0 4
12
13
14
15
16
17
18
19
20
21
22
P R1 7
P R1 9
P C 1 32
+
PL 3
0. 5 U H _ 10 *1 0 *4 . 1
20A
C S 1N
Sheet 31 of 40
Power VCORE
CL K E N#
1 0 0P _ 5 0V _0 4
0 . 1 U _ 5 0V _ 0 6
D RN1
BG 1
IS H
[ 1 5]
P C2 8
P C 22
0 . 1 U _ 50 V _ 0 6
P C2 7
0 . 01 5 U _ 5 0V _ 0 6
T G1
3 . 3V S
P C 19
0 . 1U _ 50 V _ 06
5
6
7
8
4 9 9 _1 % _0 4
close to IMVP6
P C2 1
2
3
1
0_04
P R1 2 2
4
5
6
7
8
P R1 0
0_ 0 6
DR N1
PR1 2 9
0_06
VC _ SS
P R 13
*0 _ 04
5V
B S T2
V IN
P Q8
*I R F 7 83 2 Z T R P B F
S GN D 3
P C1 8
* 0 . 1U _1 6 V _ 04
P C 26
P R 1 26
1 0 K _0 4
E N _ V C OR E
DRN 1
P R 12 4
D
P R 12 5
1 00 K _ 0 4
V C OR E _ ON
P R1 2 7
*1 0 m li _ sh o rt
PJ 6
*O P E N _ 3 5m i l
G
PQ 3 7
2 N 7 0 0 2W
S
D
G
[ 26 ]
P R 27
1 7. 4 K _ 1 %_ 0 4
*1 0 K _ 04
1
D RP _ L 1 2
2 8K _ 1 % _0 4
1 0 0K _N TC _ 06
P C3 9
P Q3 8
2 N 7 00 2 W
DRN 2
35mil
4 7 K _ 04
P R3 7
47 K _ 0 4
0 . 0 33 U _ 1 6 V _X 7 R _ 0 4
P C4 0
P R2 8
6 80 P _ 5 0V _ X 7 R _ 0 4
9. 1 K _ 1 %_ 0 6
DRP -
P RT 1
25mil
5mil
DRP +
4 7 K _ 04
P R4 4
P C4 7
P R 46
1 7. 4 K _ 1 %_ 0 4
D P RS L _ S T P
P R 45
D RP _ L 2 2
2 8K _ 1 % _0 4
1
C S2 N
10 0 K _ N T C _ 0 6
[ 1 6 , 19 , 2 1 , 28 . . 3 0 ] 5 V
[3 ] V CO RE
[ 5 , 8. . 1 6 , 1 8. . 2 7 ] 3 . 3 V S
[ 1 2 , 2 7. . 3 0 , 3 2] V I N
B - 32 Power VCORE
P R 11
*0 _ 0 4
P R 12
*0 _ 0 4
4
2
P R3 6
47 K _ 0 4
0 . 0 33 U _ 1 6 V _X 7 R _ 0 4
P R4 3
DCR _ DR1
DCR _ DR2
C S1 N
D
PQ 6
G
*2 N 7 0 02 W
S
D P RS L
P R 35
1
P U1
*7 4A H C T 1 G0 2 GW
3
P RT 2
5V
S G ND3
5
*0 . 0 2 2U _ 16 V _ X 7R _0 4
C L KEN#
S
B.Schematic Diagrams
H _ D P R S TP #
P M_ D P R S L P V R
VPN 1
[ 2 , 5 , 13 ]
P R1 5
1 U _ 25 V _ 0 8
PR 1 4
7 . 5K _ 1 % _0 4
2
3
1
S GN D 3
[ 5 , 15 ]
V IN
1 0_ 0 6
5
6
7
8
1 00 _ 1 %_ 0 4
P R 16
P C 24
P C1 2 8
C
P R1 2 3
S GN D 3
Schematic Diagrams
Power AC-IN, Charger
AC IN & CHARGER
P R1 0 5
* 10 m i _l s ho rt
VA
P Q 35 A
S P 8K 10 S F D 5 T B
2
1
7
PR 9 9
0 . 1U _ 50 V _ 06
4 . 7 U _ 25 V _ X 5R _0 8
1 0 K _ 08
P R1 0 1
3
0 _0 4
P C1 4
2 0 0 K _1 % _0 4
1 0K _ 1 % _0 4
P R7
0 _0 4
PR 5
P R 1 17
P Q 35 B
S P 8 K 1 0S F D 5 TB
4. 7 U _ 2 5 V _X 5 R _ 0 8
BAT
V _B A T
PF2
5A
P C 11 4
4. 7 U _2 5 V _X 5 R _0 8
P C 10 8
P C1 1 3
4 . 7 U _ 2 5V _ X 5 R _ 0 8
0. 1 U _ 5 0 V _0 6
4
P C 1 06
0 . 1 U _ 50 V _ 0 6
P C1 1 2
4 . 7 U _ 25 V _ X 5 R _ 08
P C 17
1 30 K _ 1 %_ 0 4
P C 10 7
To tal P owe r 60W
P R 10 4
3 0 m_ 2 0
P C 1 11
4 . 7U _2 5 V _ X 5R _0 8
3
2
1
Ch arg e Vol ta ge 16. 8V
PL 2
10 U H _6 . 8 *7 . 3 *3 . 5
1
2
P C 11 0
4. 7 U _ 2 5 V _X 5 R _0 8
P R9
30 m _ 20
P C1 0 9
4 . 7 U _ 2 5V _ X 5 R _ 0 8
P R1 0 0
8
7
6
5
P Q3 3
A M4 8 35 P
5
6
1
2
G ND1
G ND2
G ND3
G ND4
VA
4
PL 1
H C B 4 5 3 2K F -8 0 0 T6 0
1
2
3
8
J_ D C -J A C K 1
2D C -G2 1 3 -B 20 0
Ch arg e Cur re nt 2.0 A
P Q 34
A M 48 3 5P
5
6
7
8
4
VIN
P C1 1 5
0 . 1U _ 50 V _ 06
BA T
PC 6
P C7
0 . 1 U _ 5 0V _ 0 6
P R 1 16
P C8
0. 1 U _ 5 0 V _0 6
C
PD 2
F M0 5 40 -N
P C1 6
1 U _ 2 5V _0 8
A
1 0 0 K _1 % _0 4
0 . 1U _ 50 V _ 06
P C 12 2
0 . 1 U _ 1 6V _ 0 4
P C1 2
P C1 1
PC 1 0
0. 1 U _ 5 0 V _0 6
0 . 1U _ 50 V _ 06
0 . 1 U _ 5 0V _ 0 6
S GN D 5
P R 1 15
P R 1 10
1 0 . 2 K _1 % _ 04
22 0 0 P _5 0 V _ X7 R _ 0 4
10 K _ 1 %_ 0 4
P C 12 1
P C 1 19
10 0 K _ 04
D
C H G_ E N
S GN D 5
S GN D 5
P C 12 0
[ 26 ]
PQ 4
2N 70 0 2 W
T OT A L _ C U R
[ 2 6]
C H G_ C U R
0 .7 5V/ 1A
P R 11 2
0 _ 04
P R 10 3
22 K _ 1 %_ 0 4
P R 1 02
1 K _ 1% _ 04
0 .7 5V/ 1A
P R 11 1
0 _ 04
S G ND 5
S G ND 5
S
P Q3
G
CHARGE
CURRENT
ADJ
1 0 00 P _ 5 0V _ X 7R _ 04
D
[2 6 ]
G
0. 1 U _5 0 V _0 6
C TL 1
2 2 K _1 % _ 04
1 00 0 P _ 50 V _ X 7R _0 4
CT L 1
Z 3 22 8
1 0 0 P _5 0 V _ 04
*2 2 P _5 0 V _ 04
P R 10 9
P R1 1 8
1 00 K _ 0 4
P C4
0 . 1 U _ 5 0V _ 0 6
S GN D 5
S Y S 5V
P R 12 1
P C 1 27
3 9. 2 K _ 1 %_ 0 4
P C1 2 6
S G ND5
SY S5 V
1 K _ 1 %_ 0 4
P R 1 20
PC 5
S GN D 5
02/22
P R1 0 7
TOTAL
POWER
ADJ
0 _0 6
0 . 1 U _ 5 0V _ 0 6
P R 1 08
*1 0 m li _ sh o rt
P R 1 19
MB 3 9 A 13 2
10 K _ 1 %_ 0 4
P R 1 14
P C1 1 7
0 . 1 U _ 16 V _ 0 4
P R1 1 3
24
23
22
21
20
19
18
17
33
P C 11 8
1 0 K _ 1% _ 04
TRERMAL PAD
VIN
C T L1
GN D
V RE F
RT
CS
A D J3
B A TT
S GN D
S G ND 5
P R1 0 6
4 9 . 9K _ 1 % _0 4
0 . 1U _5 0 V _ 06
VC C
-I N C 1
+ INC 1
A C IN
A C OK
-I N E 3
AD J 1
C OMP 1
VA
9
10
11
12
13
14
15
16
P C 13
1
2
3
4
5
6
7
8
CT L 2
C B
OU T -1
LX
VB
OU T -2
P G ND
CEL L S
P U6
-I N E 1
O UT C 1
OU T C 2
+ INC 2
-I N C 2
A DJ 2
C OM P 2
C O MP 3
V IN
32
31
30
29
28
27
26
25
VA
35mil
PJ 1
*O P E N _ 3 5 mi l
S
2 N 7 0 02 W
V_ BAT
25mil
P MB A T 1
5mil
5
[ 26 ]
[ 26 ]
[2 6 ]
V D D3
PR 4
BAT
PQ 2
D TA 1 1 4 E U A
E
C
Z 3 22 9
P R8
3 0 K _ 1% _ 0 4
B A T _ V OL T
1 0 K _0 4
A C_ IN#
[2 6 ]
P R3
P R2
P R1
1 0 0 _0 4
1 0 0 _0 4
1 0 0 _0 4
B tt er y Vol ta ge :
1 2V ~1 6. 8V
Z 32 2 5
Z 32 2 6
Z 32 2 7
PC 1
PC 2
PC 3
3 0 P _ 50 V _ 04
3 0 P _ 50 V _ 04
3 0 P _5 0 V _ 04
4
3
2
1
B T D -0 5 T I 1G
B
B
D TD 11 4 E K
PC 9
* 0. 1 U _1 6 V _0 4
Z 3 2 30
PQ 1
D
Z 3 23 1
S Y S 5V
G
P R6
P C1 5
6 . 04 K _ 1 %_ 0 4
0 . 1U _ 16 V _ 04
P Q5
2N 70 0 2W
S
U D Z 1 6B
A
E
C
[2 6 ]
S MC _ B A T
S MD _ B A T
B A T _ DE T
C
P D1
VA
Sheet 32 of 40
Power AC-IN,
Charger
[ 13 , 2 1, 26 . . 3 0] V D D 3
[ 1 2 , 2 7. . 3 1 ] V I N
[ 28 ] S Y S 5 V
Power AC-IN, Charger B - 33
B.Schematic Diagrams
P C1 2 5
0 . 1 U _ 25 V _ X 7R _0 6
Schematic Diagrams
Multi I/O Board 1/2
For M720T
SPEAKER
LID SWITCH
HOT KEY & POWER SWITCH
SW8
SW6
M J_S PK R_7 2
MS W 2
T JG -5 33 -S -V -T / R
1
2
3
4
1
M 3. 3 V
1
2
1
8 82 6 6-0 2 00 1
P C B F o o t p rin t = 88 2 66 -2 L
M C1 7
MC 16
1 8 0P _ 5 0V _ 0 4
1 80 P _ 50 V _ 0 4
M U1
2
1
MGN D
M3 . 3 V S
POWER SWITCH
LED
M 3 . 3V S
HDD/ODD
LED
5
6
3
4
3
1
3
MS W 3
T JG -5 33 -S -V -T / R
2
4
M3 . 3V S
NUM LOCK
LED
SW2
1
3
MC 19
0 . 1U _1 6 V _ 04
B
M S A T A _L E D #
MG N D
THROTTLE
LED
MS 2
S MD 80 X 80
MR 6
MR 5
MR 4
MR 3
2 20 _ 04
2 20 _ 0 4
2 20 _ 04
22 0 _ 04
M S1
S M D 8 0 X8 0
C
M GN D
A
M D4
R Y -S P 1 7 2Y G3 4
R Y -S P 1 72 Y G 3 4
MC A P _ LE D #
MN U M_ L E D #
M GN D
3/31 MS1? ? 180?
BY? ? ? ?
C
M D3
R Y -S P 1 7 2Y G3 4
C
R Y -S P 17 2 Y G 34
M D2
R Y -S P 1 7 2Y G3 4
C
R Y -S P 1 50 D N B 84 -5 / 1 X
MG N D
M D1
C
MD 6
A
A
A
A
2 2 0 _0 4
MD 5
A
M R7
M 73 0T/ M73 5T D0 3
B CN ? ? 470
MT H R OT TL E _ L E D #
MS C R OL L _ LE D #
M GN D
FOR M720T
3.3 VS= 2A
M3 . 3V S
M J _M F B 1_ 7 2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
MN U M_ LE D #
MC A P _ L E D #
MS A T A _L E D #
MM_ B T N #
M3 G_ D E T #
MA Z _ S D OU T
MA Z _ S Y N C
MA Z _ S D I N 1
MA Z _ R S T #
MA Z _ B I TC LK
MS P K R +
MS P K R -
[ 3 4 ] M3 G_ D E T#
[ 3 4 ] M A Z _S D OU T
[ 34 ] MA Z _ S Y N C
[ 34 ] MA Z _ S D I N 1
[ 3 4 ] MA Z _ R S T#
[ 3 4 ] M A Z _B I T C LK
2
4
6
8
10
12
14
16
18
20
22
24
26
28
MU S B V C C 2
M TH R OT T LE _L E D #
M S C R O LL _ L E D #
M3 . 3 V
M1 . 5 V S
MW L A N _C LK R E Q#
M3 G_ E N
MA P K E Y #
MW E B _ E M A I L#
MW E B _ W W W #
ML I D _ S W #
MW L A N _C LK R E Q#
M3 G_ E N [ 3 4]
[3 4 ]
[ 3 4] MC L K _ P C I E _ MI N I _ 3G #
[ 3 4] MC LK _ P C I E _ MI N I _ 3G
[ 3 4] MP C I E _R XN 3 _3 G
[ 34 ] MP C I E _ R X P 3 _ 3G
[ 34 ] MP C I E _ T XN 3 _3 G
[ 3 4 ] M P C I E _ TX P 3 _ 3G
[3 4 ] M P CIE _ W A K E #
[ 3 4] MB U F _P L T _ R S T #
[ 3 4] MW L A N _ C L K R E Q#
[ 3 4 ] M U S B _ P N 5 _ 3G
[ 3 4 ] M U S B _ P P 5 _3 G
[ 3 4]
[ 34 ]
MU S B _P N 3
M US B _ P P 3
MJ _ MF B 2 _7 2
MC LK _ P C I E _M I N I _ 3G #
1
2
MC LK _ P C I E _M I N I _ 3G
3
4
MP C I E _R X N 3 _3 G
5
6
MP C I E _R X P 3_ 3 G
7
8
MP C I E _T X N 3 _ 3G
9
10
MP C I E _T X P 3 _3 G
11
12
MP C I E _W A K E #
13
14
MB U F _P L T _ R S T #
15
16
MW L A N _ C LK R E Q#
17
18
MU S B _P N 5 _3 G
19
20
MU S B _P P 5_ 3 G
21
22
23
24
MU S B _P N 3
25
26
MU S B _P P 3
27
28
5P 1 -2 51 A 4 -1 3V 0 0 -21 4
M US B V CC 2
MG N D
MG N D
FOR M730T
3. 3V S=2 A
M 3. 3 V S
M
M
M
M
M
M
M
M
M
M
M
M
N U M_ LE D #
CA P _ L E D#
S A T A _L E D #
M_ B T N #
3G _ D E T #
A Z _ S D OU T
A Z _ S Y NC
A Z _ S DIN1
AZ _ RST #
A Z _ B I TC LK
SP KR+
SP KR-
M J_ MF B 1_ 7 3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
MU S B V C C 2
MT H R OT T LE _ L E D # M3 . 3 V
MS C R O LL _ LE D #
M1 . 5 V S
MW L A N _ C L K R E Q#
M3 G_ E N
MA P K E Y #
MW E B _ E MA I L#
MW E B _ W W W #
ML I D _ S W #
MC LK _ P C I E _M I N I _ 3G # _1 3
MC LK _ P C I E _M I N I _ 3G _ 13
MP C I E _R X N 3 _3 G_ 1 3
MP C I E _R X P 3_ 3 G_ 13
MP C I E _T X N 3 _ 3G _1 3
MP C I E _T X P 3 _3 G_ 1 3
MP C I E _W A K E #
MB U F _P LT _ R S T #
MW L A N _ C LK R E Q#
MU S B _P N 5 _3 G_ 1 3
MU S B _P P 5_ 3 G_ 13
MU S B _P N 3 _1 3
MU S B _P P 3_ 1 3
*5 P 1-2 5 1A 4 -1 3 V 00 -2 14
MG N D
MJ _ MF B 2 _ 73
1
3
5
7
9
11
13
15
17
19
21
23
25
27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
* 5P 1 -2 51 A 4 -1 3V 0 0 -21 4
MG N D
M P C I E _ R X N 3 _ 3G
M P C I E _ R X P 3 _3 G
2
1
3
4
MR N 2
*4 P 2 R X 0_ 0 4
M P C I E _ TX N 3 _ 3 G
M P C I E _ TX P 3 _ 3G
2
1
3
4
MR N 3
*4 P 2 R X 0_ 0 4
MP C I E _ R XN 3_ 3 G_ 13
MP C I E _ R XP 3 _ 3G _1 3
MP C I E _ T X N 3 _3 G_ 1 3
MP C I E _ T X P 3_ 3 G_ 13
M USB _ PN3
M USB _ PP 3
2
1
3
4
MR N 5
*4 P 2 R X 0_ 0 4
MU S B _ P N 3_ 1 3
MU S B _ P P 3 _ 13
M U S B _ P N 5 _3 G
M U S B _ P P 5_ 3 G
2
1
3
4
MR N 4
*4 P 2 R X 0_ 0 4
MU S B _ P N 5_ 3 G_ 13
MU S B _ P P 5 _ 3G _1 3
M C L K _P C I E _ MI N I _ 3 G#
M C L K _P C I E _ MI N I _ 3 G
2
1
3
4
MR N 1
*4 P 2 R X 0_ 0 4
MC L K _ P C I E _ MI N I _3 G #_ 1 3
MC L K _ P C I E _ MI N I _3 G _1 3
[3 4 ]
M GN D
MU S B V C C 2
[ 3 4] M3 . 3 V
[ 3 4] M3 . 3 V S
[ 3 4] M1 . 5 V S
M3 . 3 V S
M C9
MC 11
* 0 . 1U _1 6 V _0 4
*0 . 1 U _ 1 6V _ 0 4
M GN D
5 P 1- 25 1 A 4-1 3 V 00 -2 1 4
M GN D
B - 34 Multi I/O Board 1/2
1
MQ 1
D T A 11 4 E U A
1
C
22 0 _0 4
MC 18
MG N D
M 3. 3 V S
SCROLL LOCK
LED
MA P K E Y #
0 . 1U _1 6 V _ 04
1
MR 2
MS W 4
T JG -5 33 -S -V -T / R
2
4
MG N D
M 3 . 3V S
CAPS LOCK
LED
1
2
MW E B _E M A I L#
5
6
M3 . 3 V S
MSW 1~ 4
E
LED
MG N D
MG N D
SW4
FO R E MI
C
B.Schematic Diagrams
MG N D
MU 1
MG N D
Sheet 33 of 40
Multi I/O Board 1/2
MM_ B T N #
M LI D _S W #
3
MH -2 4 8
MG N D
MG N D
O UT
VCC
M C1
0 . 1 U _ 16 V _ 04
0 . 1U _1 6 V _ 04
5
6
M S P K R -_ R
M S P K R + _R
ML 7
F C M 10 0 5K F - 12 1 T0 3
MS W 1
T JG -5 33 -S -V -T / R
2
4
MC 22
10 0 K _ 04
GN D
MS P K R MS P K R +
MW E B _W W W #
5
6
M R1
MJ _ S P K R _ 7 2
2
ML 6
F C M 10 0 5K F - 12 1 T0 3
1
3
1
2
MG N D
M1 . 5 V S
MC 8
0. 1 U _ 1 6V _ 0 4
M GN D
Schematic Diagrams
Multi I/O Board 2/2
3G/Raboson
M C2 1
1 50 U _ 6 . 3V _V
20 mil
[3 3 ]
1
3
5
7
9
11
13
15
M P CIE _ W A K E #
M R8
MW L A N _ C LK R E Q#
*0 _0 4
[ 3 3 ] M C L K _P C I E _ MI N I _ 3 G#
[ 3 3 ] M C L K _P C I E _ MI N I _ 3 G
MJ _3 G1
W AKE #
B T _ DA T A
B T _ CH CL K
C LK R E Q#
G ND0
R E F CL K R E F CL K +
G ND1
3. 3 V _ 0
GN D 5
1. 5 V _ 0
U I M_ P W R
U I M _D A TA
U I M _C LK
U I M _R E S E T
U I M _V P P
MC 3
2
4
6
8
10
12
14
16
0 . 1 U _ 16 V _ 04
MU I M_ C L K _ R
MU I M_ R S T
MU I M_ P W R
M U I M _C LK
M3 . 3 V S
MU I M
MU I M
MU I M
MU I M
MU I M
_P W R
_D A TA
_C LK
_R S T
_V P P
M1 . 5 V S
C3
C2
C1
U I M_ C L K
U I M_ R S T
U I M_ P W R
U I M_ D A TA
U I M_ V P P
U I M_ GN D
C 7
C 6
C 5
MU I M_ D A T A _ R
M C2 8
MGN D
OP EN
* 2 2P _ 5 0V _ 0 4
MC 24
0 . 1 U _ 1 6V _ 0 4
*4 . 7 K _ 04
LOC K
(TO P VIE W)
M R1 3
*1 0m i l _s h ort
[3 3 ]
MR 1 2
MU I M_ P W R
M J_ S I M 1
M GN D
S I M L OC K 1 7 70 6 6 1-1
M GN D
M GN D
MR 1 4
*1 0m i _l s h ort
MC 2 5
M C2 6
*2 2 P _ 50 V _ 04
* 22 P _ 50 V _ 0 4
MG N D
MU I M_ D A T A
MU I M_ V P P
MC 27
*2 2 P _5 0 V _0 4
MG N D
MGN D
KEY
MP C I E _ R X N 3 _3 G
MP C I E _R XP 3 _ 3G
MP C I E _T X N 3 _3 G
M P C I E _ T XP 3 _ 3G
[ 3 3] M3 G_ D E T #
M3 . 3 V S
M C2
MC 23
0 . 1 U _ 16 V _ 04
1 0U _1 0 V _ 08
MG N D
MG N D
GN D 6
W _ DIS A B L E #
P E RS E T #
3 . 3V A U X
GN D 7
1. 5 V _ 1
N C (S M B _C LK )
N C (S M B _D A TA )
GN D 8
N C (U S B _ D -)
N C (U S B _D +)
GN D 9
N C (L E D _W W A N #)
L E D _ W LA N #
N C (L E D _W P A N #)
1. 5 V _ 2
GN D 1 0
3. 3 V _ 1
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
M 3G _ E N [ 3 3 ]
M B U F _ P L T_ R S T #
M3 . 3 V S
[3 3 ]
M1 . 5 V S
M U S B _ P N 5 _ 3G
M U S B _ P P 5 _3 G
La you t?
1. SI M? ? ? ? ? ? ? ? (1 0m il)
2. ? ? ? ? ? ? ? ? GN D
3. SI M h ol d ? ? ? ? ? GN D? ?
4. SIM CO NN ? ? MI NI CAR D CON N
MU S B V C C 2
M L5
H C B 1 60 8 K F -1 21 T 25
[3 3 ]
[ 3 3]
MU S B V C C
60 mil
MC 1 4
MC 13
10 0 U _ 6 . 3V _ B 2
0 . 1U _1 6 V _0 4
M1 . 5 V S
ML 4
*W C M 20 1 2F 2 S -1 6 1T 0 3
1
2
M3 . 3 V S
M C2 0
88 9 10 -5 2 04
MG N D
USB PORT
M GN D
1 5 0 U _ 6. 3 V _ V
[3 3 ]
MU S B _P N 3
[ 33 ]
MU S B _ P P 3
4
1
3
M US B _ P N3 _ R
2
M U S B _ P P 3 _R
3
4
M GN D
M1 . 5V S
0 . 1U _1 6 V _0 4
MGN D
RJ-11
M C5
La you t not e:
0 . 1 U _ 1 6V _ 0 4
Place under the common
bead body and same as
USB trace requirment
M GN D
MDC MODULE
? ? ? ? ? ? ? ? ?
? ? 2.5mm ? ?
1 2
MJ _ MOD E M1
Z 3 50 1
1
Z 3 50 2
2
85 2 0 5-0 2 00 1
B K 16 0 8H S 12 1
B K 16 0 8H S 12 1
D A T A _H
G ND
[3 3 ]
Z 3 5 03
Z 3 5 04
1
2
M A Z _S D OU T
[ 33 ] MA Z _ S Y N C
[ 33 ] MA Z _ S D I N 1
[ 3 3 ] MA Z _ R S T#
MJ _ R J -1 1
MR 11
2 2_ 0 4
M GN D
1
3
5
7
9
11
MA Z _ S D I N 1_ R
MG N D
1
MR 1 5
M J_ MD C 1
2
4
6
8
10
12
GN D
R E S E RV E D
A za l ai _ S D O
R E S E RV E D
GN D
3. 3 V Ma i n/ au x
A za l ai _ S Y N C
G ND
A za l ai _ S D I
G ND
A za l ai _ R S T #
A za il a _B C L K
*1 0 mi l _ sh o rt
10mil
M3 . 3 V
ML 1
H C B 1 00 5 K F -1 21 T 20
M3 . 3 V
M A Z _B I T C LK
8 8 01 8 -12 0 G
TI P
RING
P J S -02 F B 3 G
P I N GN D 1 ~ 2= MG N D
C 10 7 B 3 -10 4 03 -Y
11
2
RJ -11
3 /3 1 D EL
* MC 12 FO R
E MI
ML 2
ML 3
D A T A _L
MJ_MDC1
12
MJ_MODEM1
MODEM
V +
M3 . 3 V S
MC 4
Sheet 34 of 40
Multi I/O Board 2/2
MJ _ U S B 1
MG N D
MG N D
MC 6
MC 7
0 . 1U _1 6 V _0 4
22 P _ 50 V _ 0 4
MGN D
[ 33 ]
M GN D
3/ 31 DE L
*M C1 5 F OR EM I
2
3
4
5
? ?
6-34-D90T0-010-1
? ?
6-34-M56AS-011
? ?
6-34-M72SS-020
? ?
FOR M720T
FOR M730T
IH 7
C 23 7 D 1 4 6
IH 8
C 23 7 D 1 4 6
IH4
C 2 56 D 1 4 6
IH5
C 2 56 D 14 6
IH9
C 2 76 D 1 8 6
IH1 0
C 2 37 D 14 6
IH1 1
C 2 3 7D 14 6
MGN D
MG N D
MG N D
MG N D
MG N D
MG N D
M GN D
9
8
7
6
1
2
3
4
5
M TH 3 15 D 1 1 1
6-34M72SS-010
FOR M720T
IH1
M GN D
IH2
1
2
3
4
5
MT H 3 1 5D 1 11
MG N D
[3 3 ]
9
8
7
6
IH 6
1
M T H 3 15 D 1 1 1
M GN D
9
8
7
6
2
3
4
5
IH 3
1
9
8
7
6
MT H 2 37 D 11 1
MG N D
MG N D
MU S B V C C 2
[ 3 3] M1 . 5 V S
[ 3 3] M3 . 3 V
[ 3 3] M3 . 3 V S
Multi I/O Board 2/2 B - 35
B.Schematic Diagrams
[ 3 3]
[ 33 ]
N C3
N C4
G ND2
PET n 0
PET p 0
G ND3
G ND4
P E R n0
P E R p0
G ND1 1
N C6
N C7
N C8
N C9
N C1 0
N C1 1
N C1 2
N C1 3
GN D 1
G N D 2s hi e dl
s h ei l d
GN D 3
G N D 4sh i e dl
s h ei l d
[3 3 ]
[ 3 3]
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
Schematic Diagrams
Finger Printer Board
Finger Printer
F 3 .3 V
1
1
2
3
4
4
FJ_FP1
FJ _ FP1
F US B _ P P 1
F U S B _ P N1
F T C_ VD D
F G P I O0 / I N T
FR 19
1 . 5 K _ 04
F U S B _ P P 1 _R
FR 21
2 7 . 4 _1 % _ 04
FU SB_ PP1
F C2 0
8 52 0 1 -04 0 5 1
4 7P _ 5 0 V _0 4
F GN D
3/31 ? ? FUSB_PN1 BOT? ? -? Case ? ?
F G ND
F DAT A2
F R1 3
4 7K _ 0 4
F DAT A1
F R1 1
4 7K _ 0 4
F DAT A0
F R1 2
4 7K _ 0 4
F GP I O 1
F R7
3 30 K _ 0 4
F MI S O / MO D E 3
F R9
4 7K _ 0 4
F U4
Sheet 35 of 40
Finger Printer
Board
M U X OU T
A V DD
MC S
P A D _ V D D 1B
M ISO
D V DD
GP I O 1
A G ND
D AT A0
D AT A1
GP I O 0
MC LK
U S B _ DN
US B _ DP
M OS I
P D _ RE G
NRE S E T
DG ND
D AT A2
E X T _R I N G 1
P V DD
XT A L I N
P G ND
XT A L OU T
F G RID 0 /S E NS E
TC S4 B
3 3P _5 0V_ 04
TC S4 C
2 2P _5 0V_ 04
C1
D1
Z3701
FC 12
3 3 P _ 50 V _ 0 4
FC 15
J1
A2
2 7 . 4 _1 % _ 04
F U S B _ P N1
F TC _ V D D
F R1 8
F C1 9
1 00 K _ 0 4
4 7P _ 5 0 V _0 4
F MI S O / MO D E 3
F MO S I
F MC S
F MC L K
F G ND
F G ND
F A V DD
F M CS
1 U _ 1 0 V _ 06
0 . 1 U _ 1 6 V _0 4
S
Q
CS #
SCK
VD D
VSS
H OL D #
W P#
8
3
FC 8
0 . 1 U _ 1 6 V _0 4
4
7
M9 5 12 8 W M N 6 T P
F GN D
F GN D
F G ND
F 3 .3 V
F D V DD 1
F G P I O1
F U3
F G ND
F T C_ V D D
F M I S O/ M OD E 3
FC 16
5
2
1
6
F G ND
G1
H1
FR 20
F E S D _G N D
E1
F1
F U S B _ P N1 _ R
B2
C2
FD ATA0
D2
FD ATA1
E2
F G P I O0 / I N T
F2
F M CL K
G2
FL1
H C B 1 60 8 K F -1 2 1T 2 5
F U S B _ P P 1 _R
J2
F M OS I
A3
F P D _ RE G
B3
F N RESE T
0 . 1 U _ 1 6 V _0 4
F GR I D 0 / S E N S E
FC 9
0 . 1U _ 25 V _ X 7R _ 06
Z3706
F R1 0
1 00 _ 0 6
D3
FD ATA2
E3
F E S D_ RIN G
FR 14
4 7 K _ 04
FC 13
1 U _ 6 . 3 V _ 04
F Q1
N D S 3 52 A P _ N L
G
F G _ F ET
FC 14
1 U _ 1 0 V _ 06
F T C_ VD D
F C1
F G ND
0 . 02 2 U _ 1 6 V _X 7 R _ 0 4
3 30 K _ 0 6
* 47 P _ 5 0 V _0 6
1
F U2
3
R C al m p 05 0 2 B
F G ND
T CS 4B
Un st uf f
T CS 4C
47 P_ 50 V_0 6
F R1 6
F G ND
F X O UT
2
1
3
4
F GN D
F R1 7
1 5 _ 06
F 3 . 3V
FC 10
F R4
F GN D
F C1 1
1 U _ 1 0 V _ 06
3 3_ 0 6
F X1
H S X 5 3 1S _ 1 2 MH z
T CS 4 B
F A V DD
FR 15
F T C_ V D D
H3
FC 7
*0 _ 06
F3
F X IN
10mil
F R8
2
F T C_ VD D
F G ND
F E S D _R I N G
F GN D
F 3 .3 V
C3
J3
FC 22
1 U _ 1 0 V _ 06
F U S B _ P N1 _ R
H2
G3
FC 21
F E S D _G N D
S
R ING
F E S D_ RIN G
B1
D
CR IDO
A1
0 . 1U _ 16 V _ 0 4
E
E X T _R I N G 2
B
F D VDD 1
*1 M_ 0 4
F C1 8
F C1 7
F C5
1 8P _ 5 0 V _0 6
1 8P _ 5 0 V _0 6
1 U _ 10 V _ 0 6
F Q2
2 S B 1 19 8 K R / T 1 4 6
TC S4 B
U ns tu ff
TC S4 C
3 30 K_ 04
F G ND
F 3 .3 V
C
FC 4
0 . 1U _ 16 V _ 0 4
T CS 4B
Un st uf f
T CS 4C
1U _6 .3 V_0 4
F R6
F C6
*3 3 0K _0 4
*1 U _ 6 . 3 V _ 04
F P D _ REG
F G ND
C
F GN D
F G ND
F G ND
F U1
1
Z 3 70 2
2
A#
VC C
B
Rx /Cx
FR 3
FC 3
1 0 0 K _0 4
1 U _ 1 0 V _ 06
F 3. 3 V
3
4
CL R#
GN D
Cx
Q
S N 7 4 L V C 1 G1 2 3 D C T
F GN D
B - 36 Finger Printer Board
F GN D
8
7
Z 3 70 3
6
Z 3 70 4
5
Z 3 70 5 F R 2
FR 1
F R5
3 3 0 K _0 4
0 _0 4
FD 1
*R B 5 51 V -3 0
A
B.Schematic Diagrams
F GN D
FC 2
2 . 2U _ 6. 3 V _ 0 6
1 0K _ 0 4
F E S D _G N D
F G_ F E T
F GN D
Schematic Diagrams
Click Board
CLICK BOARD
C J_TP1
CJ_T P1
CGND
CTP_DATA
CTP_CL K
1
CJ_ TP2
1
2
3
4
CJ _TP2
4
1
12
8520 1-04 051_ R
CG ND
6-2 0-94A2 0-112
CGND
Sheet 36 of 40
Click Board
CSW 1~2
2
1
LIFT
KEY
4
3
RIGHT
KEY
1
3
C GND
CH1
9
8
7
6
1
CTPBU TTON_ R
CH4
2
3
4
5
MTH2 37D9 1
CG ND
CTPBU TTON_ L
C TPBU TTON_ R
C GND
2
3
4
5
For M720T
CSW2
TJG-5 33-S- V- T/R
2
4
5
6
CTPBU TTON_ L
5
6
CSW1
TJG-5 33-S- V- T/R
1
2
3
4
1
9
8
7
6
2
3
4
5
MTH23 7D91
CGND
C H3
1
9
8
7
6
2
3
4
5
MTH237 D91
CGND
CGND
CH2
1
9
8
7
6
MTH2 37D9 1
CG ND
CGND
For M730T
CR 1
0 _04
CR 3
0 _04
CTPBTN_L _72
CTPBUTTON_L
CTPBTN_R _72
CTPBUTTON_R
CR2
*0_04
CR4
*0_04
C TPBTN _L_7 3
C TPBTN _R_7 3
Click Board B - 37
B.Schematic Diagrams
CTPBTN_ L_73
1
CTPBTN_ R_72
2
CTPBTN_ L_72
3
CTPBTN_ R_73
4
5
6
CGND
7
8
CTP_C LK
9
CTP_D ATA
10
C5V
11
12
CC2
8 7151 -12 071G
0.1U _16V_0 4
CC1
0 .1U_ 16V_04
C5V
Schematic Diagrams
M730T ODD Bridge Board
B.Schematic Diagrams
M730T ODD BRIDGE BOARD
Sheet 37 of 40
M730T ODD Bridge
Board
BJ_SATA1
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
BSATA_R XN 1
BSATA_R XP1
BGND
BODD _D ETEC T#
1.6A
BGND
BH1
BH 4
BH 2
BH 3
C236D110 C 236D 110 C 45D45N C 45D45N
B - 38 M730T ODD Bridge Board
B5VS
12
11
10
9
8
7
6
5
4
3
2
1
*88266-12
BSATA_TXP1
BSATA_TXN1
BSATA_RXN1
BSATA_RXP1
BOD D_DETECT#
B5VS
BGN D
*C18535-11305-L
BGN D
BJ ODD 2
BSATA_TXP1
BSATA_TXN 1
BGND
Schematic Diagrams
M730T Audio Board
M730T AUDIO BRIDGE BOARD
AJSPDIF1
ASPDIFO
AL4
*FCM1005KF- 102T02
AC1
*0.01U_16V_X7R_04
R
2
L
6
1
*C12103-10609
-L
AR2
AC5
*220_04
*100
0P_50V_X
7R_04
Sheet 38 of 40
M730T Audio Board
SP DIF OUT
BLA CK
AAGND
AAG
ND
3/31 ? ? ? NET? ? ? ? ? ,? ? ? ?
AJ_AUD2
AJMIC1
*871
51-12071G
5
4
3
AMIC_
SENSE
1
2
3
4
5
6
7
8
9
10
11
12
ASPDIFO
AM
IC_SENSE
AM
IC1-R
AM
IC1-L
AMIC1
-R
AL1
*FCM1005KF-121T03
AMIC1
-L
AL2
*FCM1005KF-121T03
AHP_
SENSE
AHP-R
AHP-L
AHP_
PLUG
R
2
L
6
1
*C12103-D0609-L
AC3
AC4
*680
P_50
V_X7
R_04
*680
P_50V_X7R_04
MIC IN
PIN K
AAG
ND
2
AAG
ND
6
AHP_SENSE
AHP-R
AL3
*FCM1005KF-121T03
AHP-L
AL5
*FCM1005KF-121T03
3
4
1
5
4
3
5
AJHP1
R
2
L
6
1
*C12103-606
09-L
AHP_PLUG
AC2
AC6
HE AD PHON E
*680
P_50
V_X7
R_04
*680
P_50V_X7R_04
GREE N
AAG
ND
AH2
AH1
C315D110 C315D110
AAGND
AH4
AH3
C45D45N C45D45N
AAG
ND
M730T Audio Board B - 39
B.Schematic Diagrams
5
4
3
Schematic Diagrams
Power Sequence Diagram
M720T V0.0 BOOT BLOCK DIAGRAM
9
PW R_ SW #
1
13
M ULT I I/ O BO AR D
? ? ? ? ? ?
CL _P WR OK
DE LA Y_ PW RG D
NORTH BRIDGE
B.Schematic Diagrams
Cantiga
V DD 3/ VD D5
VR
LT C3 85 0
EC
Sheet 39 of 40
Power Sequence
Diagram
DD _O N
3
5V
3
2
DR AM V R
I TE 85 12 E
S C4 86
DE LAY
DD _ON
75 ms
3 .3 V
PW R_ BT N#
4a
PM _R SM RS T#
4b
SU SC #
5a
SU SB #
5b
1 .8 V
3
0 .9 VS M
6
7
G FX _V RE N
8
V GF X_ CO RE
17
H _C PU RS T#
16
P LT _R ST #
GFX VR
S C4 72 B
Other
Platform
Devices
SOUTH BRIDGE
15
H_P WR GD
Processor
Penryn
CL _P WR OK
D EL AY
C L_ PW RO K
1 50 m s
VC OR E_ ON
VC OR E
9
9
ICH9-M
C L_ PW RO K
16
Other
PCI
PCI _R ST #
Devices
10
VCORE VR
11
CL KE N#
SC 45 2
12
V RM _P WR GD
14
S B_ PW RO K
1 2- 1 CLK _P WR GD
C lo ck G en era to r
IC S9 LP R3 63E GL F
DE LA Y_ PW RGD
1. 5V S_ PW RGD
13
1. 8V _P WR GD
5b
1. 5V S
S US B#
SL P_ M#
5b
9
6
A PL 59 13
6
1.0 5V S
6
3.3 VS
6
5VS
1. 05 VM _P WR GD
M OS FE T
SC 41 1
MOS FE T
FO R ME
FOR M E
6
1 .0 5V M
6
B - 40 Power Sequence Diagram
3 .3 VM
CL _P WRO K
Schematic Diagrams
Power Sequence v3.0
M720T V3.0 POWER ON SEQUENCE
560ms
1
PWR_SW#
2
DD_ON
3
5V
3
V5REF_SUS
3
3.3V
3
1.8V
164.7ms
370us
515.4us
568.0us
6.215ms
4a
RSMRST#
4b
PWR_BTN#
206.4ms
120.8ms
85.6ms
Sheet 40 of 40
Power Sequence
v3.0
174.4ms
5a
SUSC#
5b
SUSB#
61.10us
365.6us
6
5VS
6
V5REF
6
3.3VS
6
1.05VS
6
0.9VSM
6
1.5VS
371.5us
482.8us
690.8us
1.5912ms
3.932ms
7
8
920us
9
ms
CL_PWROK
107.6ms
10
VCORE_ON
11
VCORE
12
VRM_PWRGD
1.17V
2.64ms (950mV)
3.32ms
12-1
2.981ms
CLK_PWRGD
9.36ms
13
DELAY_PWRGD
14
SB_PWROK
9.4ms
9.36ms
15
H_PWRGD
16
PLT_RST#
17
H_CPURST#
10.44ms
(1.05V)
105.6ms
(440mV)
12ms
Power Sequence v3.0 B - 41
B.Schematic Diagrams
76.4ms
B.Schematic Diagrams
Schematic Diagrams
B - 42