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Current sampling
Table 4.
Adv. timer
TIM1
TIM8
4.1.1
UM1052
3-shunt current reading, used resources (single drive, or dual drive, F103
HD, F2xx, F4xx)
DMA
None
None
ISR
ADC
Note
TIM1_UP
ADC1
ADC2
Used by first or second motor configured in
three-shunt, according to user selection.
ADC is used in time sharing. Trigger
selection is performed in the TIM_UP ISR.
TIM8_UP
ADC1
ADC2
Used by first or second motor configured in
three-shunt, according to user selection.
ADC is used in time sharing. Trigger
selection is performed in the TIM_UP ISR.
Tuning delay parameters and sampling stator currents in three-shunt
resistor topology
Figure 24 shows one of the three inverter legs with the related shunt resistor:
Figure 24. Inverter leg and shunt resistor position
To indirectly measure the phase current I, it is possible to read the voltage V provided that
the current flows through the shunt resistor R.
It is possible to demonstrate that, whatever the direction of current I, it always flows through
the resistor R if transistor T2 is switched on and T1 is switched off. This implies that, in order
to properly reconstruct the current flowing through one of the inverter legs, it is necessary to
properly synchronize the conversion start with the generated PWM signals. This also means
that current reading cannot be performed on a phase where the duty cycle applied to the low
side transistor is either null or very short.
As discussed in Section 4.1, to reconstruct the currents flowing through a generic threephase load, it is sufficient to simultaneously sample only two out of three currents, the third
one being computed from the relation given in Section 4.1. Thus, depending on the space
vector sector, the A/D conversion of voltage V will be performed only on the two phases
where the duty cycles applied to the low side switches are the highest. Looking at Figure 19,
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Doc ID 18458 Rev 3