Download 5. The Instruction Set

Chapter 5: The Instruction Set
Instruction Notation
The tables in this chapter list the assembler format for each load, store, computational,
jump, branch, coprocessor, and special instruction. The format consists of an op-code and
a list of operand formats. The tables list groups of closely related instructions; for those
instructions, you can use any op-code with any specified operand.
Operands can take any of these formats:
•
Memory references. For example, a relocatable symbol +/– an expression(register).
•
Expressions (for immediate values).
•
Two or three operands. For example, ADD $3,$4 is the same as ADD $3,$3,$4.
The operands in the table in this chapter have the following meanings
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Operand
Description
address
Symbolic expression (see Chapter2)
breakcode
Value that determines the break
destination
Destination register
destination/src1
Destination register is also source register 1
dest-copr
Destination coprocessor register
dest-gpr
Destination general register
expression
Absolute value
immediate
Expression with an immediate value
label
Symbolic label
operation
Coprocessor-specific operation
return
Register containing the return address
source
Source register
src1, src2
Source registers
src-copr
Coprocessor register from which values are assigned
src-gpr
General register from which values are assigned
target
Register containing the target
z
Coprocessor number in the range 0..2