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MG1264 Low Power H.264 and AAC Codec for Mobile Devices User Manual
• How to read encoded bitstreams from the Media Processor firmware.
All eight of these interface elements are described in this document. The physical connection
between the System Host CPU and the Media Processor Controller is presented first, followed
by the logical interface of the firmware, and then the bitstream interfaces for the encoder and
decoder.
10.1 Host Interface and the Hardware Abstraction Layer
The MG1264 Codec interfaces with an external System Host CPU through its MG1264 Codec
Host Interface, which is accessed through a 16-bit SRAM-like asynchronous bus. In this
configuration, the System Host CPU is the bus Master, and the MG1264 Codec is the Slave.
The MG1264 Codec Host Interface provides the System Host CPU with the ability to read/write
the MG1264 Codec’s DRAM, read/write the MG1264 Codec’s Configuration/Status Registers
(CSR), and send bitstream data to the decoder. The MG1264 Codec Host Interface is also used
to implement an inter-processor communication protocol using special mailbox registers and
the System Host CPU interrupt signal.
The QHAL is Mobilygen's Hardware Abstraction Layer that implements the control logic
required to use the host bus effectively. The QHAL is meant to be ported and executed on the
System Host CPU, and is written in ANSI-C.
The QHAL is made up of the external memory driver (qhal_em), the CSR register driver
(qhal_qcc), the bitstream transfer driver (qhal_bs), the mailbox control driver (qhal_mbox), and
the host bus register driver (qhal_host, also known as the low-level driver). The qhal_host driver
is the only module that must change when moving between different host processors. Once the
qhal_host is properly functioning, the rest of the QHAL modules will work. For the purposes
of this document, qhal_host and qhal_qcc can be ignored. The firmware API can be
implemented only with qhal_em, qhal_bs, and qhal_mbox calls. The qhal_qcc API is used
primarily for booting the MG1264 Codec.
The structure of the QHAL is shown in Figure 10-1.
Customer Provided
Host Application
Bitstream
Memory
API
API
Module
Configuration
API
Host Adaptation Layer
Mailbox API
(Interprocessor
Communication)
Mobilygen Provided
(Mobilygen/Customer)
Provided
Figure 10-1 QHAL Structure
10.1.1 QHAL_EM
The qhal_em is the driver used to access the MG1264 Codec’s external DRAM. This driver
configures the memory channel and provides interfaces to the read/write blocks of memory.
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