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Download Intel® 64 and IA-32 Architectures Software Developer`s Manual
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DEBUGGING AND PERFORMANCE MONITORING 63 4 0 Last Branch From 0H Last Branch To 8H 10H Branch Predicted Figure 18-25. 64-bit Branch Trace Record Format 63 0 RFLAGS 0H RIP 8H RAX 10H RBX 18H RCX 20H RDX 28H RSI 30H RDI 38H RBP 40H RSP 48H R8 50H ... ... R15 88H Figure 18-26. 64-bit PEBS Record Format 18.15.6 Programming the Performance Counters for Non-Retirement Events The basic steps to program a performance counter and to count events include the following: 1. Select the event or events to be counted. 2. For each event, select an ESCR that supports the event using the values in the ESCR restrictions row in Table A-5, Appendix A. 18-70 Vol. 3B
