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Download ECE5465/Intel arch reference/Intel 64 and 32 Arch Sw Dev Man V3B
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PERFORMANCE MONITORING Table 30-11. Requirements to Program PEBS (Contd.) For Processors based on Intel Core microarchitecture For Processors based on Intel NetBurst microarchitecture Allocate buffer for PEBS states. Allocate a buffer in memory for the precise information. Program the IA32_DS_AREA MSR. Program the IA32_DS_AREA MSR. Configure the PEBS buffer management records. Configure the PEBS buffer management records in the DS buffer management area. Configure/Enable PEBS. Set Enable PMC0 bit in IA32_PEBS_ENABLE MSR (0x3F1). Configure MSR_PEBS_ENABLE, MSR_PEBS_MATRIX_VERT and MSR_PEBS_MATRIX_HORZ as needed. Enable counters. Set Enable bits in MSR_PERF_GLOBAL_CTRL MSR (0x38F). Set each CCCR enable bit 12 - 1. NOTES: 1. Counters read while enabled are not guaranteed to be precise with event counts that occur in timing proximity to the RDMSR. 30.5 PERFORMANCE MONITORING (PROCESSORS BASED ON INTEL® ATOM™ MICROARCHITECTURE) Intel Atom processor family supports architectural performance monitoring capability with version ID 3 (see Section 30.2.2.2) and a host of non-architectural monitoring capabilities. The initial implementation of Intel Atom processor family provides two general-purpose performance counters (IA32_PMC0, IA32_PMC1) and three fixed-function performance counters (IA32_FIXED_CTR0, IA32_FIXED_CTR1, IA32_FIXED_CTR2). Non-architectural performance monitoring in Intel Atom processor family uses the IA32_PERFEVTSELx MSR to configure a set of non-architecture performance monitoring events to be counted by the corresponding general-purpose performance counter. The list of non-architectural performance monitoring events is listed in Table A-8. Architectural and non-architectural performance monitoring events in Intel Atom processor family support thread qualification using bit 21 of IA32_PERFEVTSELx MSR. The bit fields within each IA32_PERFEVTSELx MSR are defined in Figure 30-6 and described in Section 30.2.1.1 and Section 30.2.2.2. Vol. 3 30-25
