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D3.8 ALMA design framework guidelines for multicore systems (final version)
ALMA
Preface
This document is a collection of end-user guidelines for the ALMA tool chain. The
user perspective for most parts of the ALMA tool flow components will be presented.
It provides advice for an optimal use of the ALMA tool chain to create faster
applications on Multiprocessor and Multicore systems.
Abstract
The ALMA project main product is the ALMA tool chain that is an end-to-end tool
chain from a high-level program representation directly to embedded Multiprocessor
System-on-Chip (MPSoC) platforms. The ALMA tool chain is not tailored to a specific
platform, but rather abstracts the underlying parallel hardware architecture by the
introduction of the Architecture Description Language. Various intermediate code
representation optimizations, including polyhedral analysis and control and data flow
graph optimization are introduced, before the parallel code is presented to the
platform specific tools. This document provides end-user guidelines towards
extracting the best performance from applications created using the ALMA tool chain.
List of Figures
Figure 1: ALMA tool flow from the user perspective .................................................. 8
Figure 2: ALMA tool chain architecture ...................................................................... 9
Figure 3: Fine-grain Flow ........................................................................................ 15
Figure 4: Multicore Simulator................................................................................... 23
Figure 5: Parallel Matrix Multiplication Scilab Code – File matrixmul_parallel.sce
......................................................................................................................... 28
Figure 6: GeCoS Script matrixmul_parallel.cs: First part, Front End ................ 28
Figure 7: GeCoS Script: Coarse grain parallelism extraction and fine grain parallelism
optimization ...................................................................................................... 29
Figure 8: GeCoS Script demonstrating the use of CoarseGrain .............................. 30
Figure 9: The top level HTG layer for matrixmul_parallel ............................... 31
Figure 10: The parallel processor assignment for the top level HTG layer for
matrixmul_parallel (processors are encoded as colours) ......................... 31
Figure 11: GeCoS Script matrixmul_parallel.cs: parallel code generation ........ 32
Figure 12: GeCoS Script matrixmul_parallel.cs: parallel code generation ........ 32
Figure 13: GeCoS Script: compiling and simulating the application ......................... 33
List of Tables
Table 8-1: Command line argument list for systemsim ............................................ 23
Table 8-2: Command line argument format ............................................................. 24
Table 8-3: Available systemsim commands............................................................. 24
Table 8-4: Descriptor for module-specific command line arguments........................ 24
Table 8-5: Escape character for module-specific descriptor .................................... 25
Table 8-6: Descriptor for instance-specific command line arguments ...................... 25
Table 8-7: Escape character for instance-specific descriptor ................................... 25
Table 8-8: Configuration file format ......................................................................... 26
Table 8-9: Kahrisma specific simulator options........................................................ 27
Table 8-10: Extract of Xentium simulator options. .................................................. 27
Table 8-11: Extract of Xentium profiler options. ...................................................... 27
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Version: v1.02 / FINAL
Public (PU)