Download SPRS439 - Texas Instruments
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TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 www.ti.com SPRS439M – JUNE 2007 – REVISED AUGUST 2012 Contents 1 TMS320F2833x, TMS320F2823x DSCs 1.1 1.2 2 Introduction 2.1 2.2 3 3.3 3.4 3.5 3.6 3.7 4 .......................................................................................................... 33 Memory Maps .............................................................................................................. Brief Descriptions .......................................................................................................... 3.2.1 C28x CPU ....................................................................................................... 3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 3.2.3 Peripheral Bus .................................................................................................. 3.2.4 Real-Time JTAG and Analysis ................................................................................ 3.2.5 External Interface (XINTF) .................................................................................... 3.2.6 Flash ............................................................................................................. 3.2.7 M0, M1 SARAMs ............................................................................................... 3.2.8 L0, L1, L2, L3, L4, L5, L6, L7 SARAMs ..................................................................... 3.2.9 Boot ROM ........................................................................................................ 3.2.9.1 Peripheral Pins Used by the Bootloader ........................................................ 3.2.10 Security .......................................................................................................... 3.2.11 Peripheral Interrupt Expansion (PIE) Block ................................................................. 3.2.12 External Interrupts (XINT1–XINT7, XNMI) .................................................................. 3.2.13 Oscillator and PLL .............................................................................................. 3.2.14 Watchdog ........................................................................................................ 3.2.15 Peripheral Clocking ............................................................................................. 3.2.16 Low-Power Modes .............................................................................................. 3.2.17 Peripheral Frames 0, 1, 2, 3 (PFn) ........................................................................... 3.2.18 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 3.2.19 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 3.2.20 Control Peripherals ............................................................................................. 3.2.21 Serial Port Peripherals ......................................................................................... Register Map ............................................................................................................... Device Emulation Registers .............................................................................................. Interrupts .................................................................................................................... 3.5.1 External Interrupts .............................................................................................. System Control ............................................................................................................ 3.6.1 OSC and PLL Block ............................................................................................ 3.6.1.1 External Reference Oscillator Clock Option .................................................... 3.6.1.2 PLL-Based Clock Module ......................................................................... 3.6.1.3 Loss of Input Clock ................................................................................ 3.6.2 Watchdog Block ................................................................................................. Low-Power Modes Block ................................................................................................. Peripherals 4.1 4.2 4.3 4.4 4.5 4.6 4.7 2 ...................................................................................................................... 12 Pin Assignments ........................................................................................................... 14 Signal Descriptions ........................................................................................................ 23 Functional Overview 3.1 3.2 .................................................................................. 10 Features .................................................................................................................... 10 Getting Started ............................................................................................................. 11 ....................................................................................................................... 64 DMA Overview ............................................................................................................. 32-Bit CPU-Timer 0, CPU-Timer 1, CPU-Timer 2 ..................................................................... Enhanced PWM Modules ................................................................................................ High-Resolution PWM (HRPWM) ....................................................................................... Enhanced CAP Modules ................................................................................................. Enhanced QEP Modules ................................................................................................. Analog-to-Digital Converter (ADC) Module ............................................................................ 4.7.1 ADC Connections if the ADC Is Not Used .................................................................. Contents 34 41 41 41 41 42 42 42 42 43 43 44 44 46 46 46 46 46 46 47 47 47 48 48 49 51 52 56 57 58 59 60 61 62 63 64 66 68 72 73 75 77 81 Copyright © 2007–2012, Texas Instruments Incorporated