Download VXI-MIO Series User Manual Multifunction I/O Modules for VXIbus

Chapter 4
Signal Connections
Figure 4-29 shows the timing requirements for the GPCTR0_SOURCE
signal.
tp
tw
tw
t p = 50 ns minimum
t w = 23 ns minimum
Figure 4-29. GPCTR0_SOURCE Signal Timing
The maximum allowed frequency is 20 MHz, with a minimum pulse
width of 23 ns high or low. There is no minimum frequency limitation.
The 20 MHz or 100 kHz timebase normally generates the
GPCTR0_SOURCE signal unless you select some external source.
GPCTR0_GATE Signal
Any PFI pin can externally input the GPCTR0_GATE signal, which is
available as an output on the PFI9/GPCTR0_GATE pin.
As an input, the GPCTR0_GATE signal is configured in the
edge-detection mode. You can select any PFI pin as the source for
GPCTR0_GATE and configure the polarity selection for either rising or
falling edge. You can use the gate signal in a variety of different
applications to perform actions such as starting and stopping the
counter, generating interrupts, saving the counter contents, and so on.
As an output, the GPCTR0_GATE signal reflects the actual gate signal
connected to general-purpose counter 0. This is true even if the gate is
being externally generated by another PFI. This signal is set to input
(High-Z) at startup.
Figure 4-30 shows the timing requirements for the GPCTR0_GATE
signal.
 National Instruments Corporation
4-39
VXI-MIO Series User Manual