Download ER-OLED0.91-2 - Display Future

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ER-OLED0.91-2
LCD Module User Manual
REV Descriptions
1.0
Preliminay Release
Release Date
Nov-24-2008
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Contents
1. Basic Specifications ............................................................................... 1~5
1.1
1.2
1.3
1.4
1.5
1.6
Display Specifications ............................................................................................. 1
Mechanical Specifications ....................................................................................... 1
Active Area & Pixel Construction............................................................................ 1
Mechanical Drawing ............................................................................................... 2
Pin Definition.......................................................................................................... 3
Block Diagram ........................................................................................................ 5
2. Absolute Maximum Ratings.........................................................................6
3. Ellectriica
al Chara
actteristticss .......................................................................7~12
3.1 DC Characteristics................................................................................................... 7
3.2 AC Characteristics................................................................................................... 8
3.2.1 6800-Series MPU Parallel Interface Timing Characteristics ........................... 8
3.2.2 8080-Series MPU Parallel Interface Timing Characteristics ........................... 9
3.2.3 Serial Interface Timing Characteristics ........................................................ 10
3.2.4 I2C Interface Timing Characteristics ............................................................ 11
3.3 Optics & Electrical Characteristics ........................................................................ 12
3.4 General Electrical Specification............................................................................. 12
4. Fu
unctionall Speciificatio
on......................................................................13~14
4.1 Commands ............................................................................................................ 13
4.2 Power down and Power up Sequence..................................................................... 13
4.2.1 Power up Sequence...................................................................................... 13
4.2.2 Power down Sequence ................................................................................. 13
4.3 Reset Circuit.......................................................................................................... 13
4.4 Actual Application Example .................................................................................. 14
5. Reliability ...................................................................................................15
5.1 Contents of Reliability Tests.................................................................................. 15
5.2 Lifetime................................................................................................................. 15
5.3 Failure Check Standard.......................................................................................... 15
6. Outgoing Quality Control Specifications .............................................16~20
6.1 Environment Required........................................................................................... 16
6.2 Sampling Plan ....................................................................................................... 16
6.3 Criteria & Acceptable Quality Level...................................................................... 16
6.3.1 Cosmetic Check (Display Off) in Non-Active Area...................................... 16
6.3.2 Cosmetic Check (Display Off) in Active Area .............................................. 19
6.3.3 Pattern Check (Display On) in Active Area .................................................. 20
7. Pa
ackagee Speccifiica
ations ..............................................................................21
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8. Precautions When Using These OEL Display Modules.......................22~24
8.1
8.2
8.3
8.4
8.5
Handling Precautions............................................................................................. 22
Storage Precautions ............................................................................................... 23
Designing Precautions ........................................................................................... 23
Precautions when disposing of the OEL display modules....................................... 24
Other Precautions .................................................................................................. 24
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1. Ba
asic Speciffications
1.1 Display Specifications
1)
2)
3)
Display Mode:
Display Color:
Drive Duty:
Passive Matrix
Monochrome (Blue)
1/32 Duty
1.2 Mechanical Specifications
1)
2)
3)
4)
5)
6)
7)
Outline Drawing:
Number of Pixels:
Panel Size:
Active Area:
Pixel Pitch:
Pixel Size:
Weight:
According to the annexed outline drawing number
128 × 32
26.9 × 13.7 × 1.5 (mm)
22.38 × 5.58 (mm)
0.175 × 0.175 (mm)
0.155 × 0.155 (mm)
TBD (g)
P0.175x32-0.02=5.58
1.3 Active Area & Pixel Construction
P0.175x128-0.02=22.38
Display Pattern
0.175
0.155
Segment 129
( Column 1 )
Common 32
( Row 31 )
Common 47
0.155
0.175
( Row 1 )
Segment 2
( Column 128 )
Common 0
( Row 32 )
Common 15
( Row 2 )
0 5±0 5
(1 26)
(2 26)
(2 1)
(1 1)
0 5±0 5
13 7±0 2 (P
l Si e)
4 1±0 2
5±0 2
5 58 (A/A)
7 58 (V/A)
8 8 (Polarizer)
9 8±0 2 (Cap Size)
25 R0.2
.5
W=0 32±0 03
15±0 1 (Alignment Hole)
P0 65x(25-1)=15 6±0 05
16 8±0 2
R0
5
8±0.05
(1 68)
Segment 2
( Row 2 )
( Row 32 )
Common 15
( Row 1 )
Common 0
Common 47
( Row 31 )
( Column 128 )
Common 32
Segment 129
( Column 1 )
Display Pattern
P0 175x128-0 02=22 38
Date
20061113
0 375
0 75
1 5±0 3
Unit
mm
Tolerance
Dimension ±0 3
Angle
±1
General Roughness
By
Date
Title
Drawn
Kirin_Zhuang
20061113
Panel / E
Gary Lin
20061113
Rev
A
Sheet
1 of 1
Size
A3
Material
Soda Lime / Polyimide
Drawing Number
Pin Symbol
NC
1
VCC
2
VSS
3
VDD
4
5 VDDIO
BS1
6
BS2
7
CS
8
RES
9
D/C
10
WR
11
RD
12
D0
13
D1
14
D2
15
D3
16
D4
17
D5
18
D6
19
D7
20
IREF
21
22 VCOMH
23
VCC
VSS
24
NC
25
Remark
Original Drawing
PM
EE
Simon Lee Migrant Chang Scale
20061113
20061113
1:1
ER-OLED0.91-2
EASTRISING TECHNOLOGY CO.,LTD
(1 6)
Unless Otherwise Specified
Contact Side
Customer Approval
Signature
0 15
Contact Side
3M #1318B
15x8x0 063mm
Polarizer
t=0 2mm
(7 84)
O 0 .2
2- O0.
5
P0 175x32-0 02=5 58
Notes:
1 OLED Color: Blue
2 Driver IC: SSD1305Z
3 FPC Number: UT-0205-P02
4 Interface:
8-bits 68XX/80XX Parallel, 4-SPI, I2C
5 General Tolerance: ±0 20
6 The total thickness (1 50 Max)is without polarizer protective film & remove tape
The actual assembled total thickness with above materials should be 1 65 Max
1
11 32
Active Area 0.91"
128 x 32 Pixels
10
1 4±0 1
Display Pattern
Scale (5:1)
0 175
26 9±0 2 (Panel Size)
26 9±0 2 (Cap Size)
25 9 (Polarizer)
24 38 (V/A)
22 38 (A/A)
0 175
0 155
0 155
Glue
Item
A
1.4 Mechanical Drawing
8
9 8±0 3
2
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1.5 Pin Definition
Pin Number
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Symbol
Type
Function
Power Supply Pins
4
VDD
P
Power Supply for Core Logic Operation
This is a voltage supply pin. It must be connected to external
source.
Power Supply for Interface Logic Level
5
VDDIO
P
This is a voltage supply pin. It should be match with MCU
interface voltage level.
lower than VDD.
VDDIO must always be equal or
Ground of OEL System
3, 24
VSS
P
2, 23
VCC
P
This is a ground pin. It also acts as a reference for the logic
pins, the OEL driving voltages, and the analog circuits. It must
be connected to external ground.
Poweer Supply for OEL
L Panell
This is the most positive voltage supply pin of the chip.
It must be connected to external source.
Syssteem Control Pins
Curren
nt Reeference for Briightn
ness Adju
ustm
men
nt
21
IREF
I
This pin is segment current reference pin. A resistor
should be connected between this pin and VSS. Set the
current at 10uA.
Volttage Outp
put Hiigh Leevell for COM
M Signal
22
VCOMH
O
This pin is the input pin for the voltage output high level
for COM signals. A capacitor should be connected
between this pin and VSS.
Commu
unicatiing Prrotocol Selecct
6
7
BS1
BS2
I
These pins are MCU interface selection input. See the
following table:
I2C 6800-parallel 8080-parallel Serial
BS1
1
0
1
0
BS2
0
1
1
0
Note: “0” is connected to VSS; “1” is connected to VDDIO.
MPU Interface Pins
Chip Select
8
CS
I
9
RES
I
This pin is the chip select input. The chip is enabled for
MCU communication only when CS# is pulled low.
Poweer Ressett fo
or Contrrollerr and Driiverr
This pin is reset signal input. When the pin is low,
initialization of the chip is executed.
Data
a/Co
ommand Contrrol
10
D/C
I
This pin is Data/Command control pin. When the pin is
pulled high, the input at D7~D0 is treated as display data.
When the pin is pulled low, the input at D7~D0 will be
transferred to the command register.
In I2C mode, this pin acts as SA0 for slave address
selection.
For detail relationship to MCU interface signals, please
refer to the Timing Characteristics Diagrams.
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1.5 Pin Definition (Continued)
Pin Number
Symbol
Type
Function
MP
PU Interffacee Pin
ns (Contin
nued)
Read/Write Select or Write
11
WR
I
This pin is MCU interface input. When interfacing to a
68XX-series microprocessor, this pin will be used as
Read/Write (R/W#) selection input. Pull this pin to
“High” for read mode and pull it to “Low” for write
mode.
When 80XX interface mode is selected, this pin will be
the Write (WR#) input. Data write operation is initiated
when this pin is pulled low and the CS# is pulled low.
Read/W
Writte Enable or Reead
12
RD
I
This pin is MCU interface input. When interfacing to a
68XX-series microprocessor, this pin will be used as the
Enable (E) signal. Read/write operation is initiated when
this pin is pulled high and the CS# is pulled low.
When connecting to an 80XX-microprocessor, this pin
receives the Read (RD#) signal. Data read operation is
initiated when this pin is pulled low and CS# is pulled
low.
Hostt Da
ata In
nput/Ou
utput Bu
us
13~20
D0~D7
These are 8-bit bi-directional data bus to be connected to
the microprocessor’s data bus.
When serial interface mode is selected, D0 will be the
I/O serial clock input: SCLK; D1 will be the serial data input:
SDIN and D2 should be left opened.
When I2C mode is selected, D2, D1 should be tied together
and serve as SDAout, SDAin in application and D0 is the
serial clock input, SCL.
Reserved Pins
1, 25
NC
-
No Connectiion
4
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1.6 Block Diagram
~
COM 15
COM 0
SEG 2
SEG 129
~
COM 32
COM 47
Active Area 0.91"
128 x 32 Pixels
VCC
VSS
NC
VCOMH
IREF
~
D7
BS1
BS2
CS
RES
D/C
WR
RD
D0
VDD
VDDIO
VSS
NC
VCC
SSD1305
C1
C2
R1
C3
C4
VCC
VDD
VDDIO
MCU Interface Selection:
BS1 and BS2
Pins connected to MCU interface: D7~D0, RD, WR, D/C, RES, and CS
C1, C2, C3, C4:
R1:
4.7µF
910kΩ, R1 = (Voltage at IREF - VSS) / IREF
5
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2. Abso
olute Maximum
m Ratings
Parameter
Symbol
Min
Max
Unit
Notes
Supply Voltage
VDD
-0.3
4
V
1, 2
Driver Supply Voltage
VCC
0
16
V
1, 2
Operating Temperature
TOP
-30
70
°C
-
Storage Temperature
TSTG
-40
80
°C
-
Note 1: All the above voltages are on the basis of “GND = 0V”.
Note 2: When this module is used beyond the above absolute maximum ratings,
permanent breakage of the module may occur. Also, for normal operations, it is
desirable to use this module under the conditions according to Section 3.
“Electrical Characteristics”. If this module is used beyond these conditions,
malfunctioning of the module can occur and the reliability of the module may
deteriorate.
6
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3. Elecctriccal Characteriisticcs
3.1 DC Characteristics
Characteristics
Symbol
Conditions
Min
Typ
Supply Voltage
VDD
-
2.4
2.8
3.5
V
Driver Supply Voltage
VCC
-
7
8
9
V
High Level Input
VIH
-
-
VDD
V
Low Level Input
VIL
-
0.8×VDD
0
-
V
High Level Output
VOH
-
V
Low Level Output
VOL
Iout = 100µA, 3.3MHz 0.9×VDD
Iout = 100µA, 3.3MHz 0
0.2×VDD
VDD
-
0.1×VDD
V
Max Unit
7
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3.2 AC Characteristics
3.2.1 6800-Series MPU Parallel Interface Timing Characteristics:
Symbol Description
Min
Max
Unit
tcycle
System Cycle Time
300
-
ns
tAS
Address Setup Time
0
-
ns
tAH
Address Hold Time
0
-
ns
tDSW
Write Data Setup Time
40
-
ns
tDHW
tDHR
tOH
tACC
Write Data Hold Time
Read Data Hold Time
Output Disable Time
Access Time
Chip Select Low Pulse Width (Read)
Chip Select Low pulse width (Write)
Chip Select High Pulse Width (Read)
7
20
120
60
60
70
140
ns
ns
ns
ns
-
ns
-
ns
Chip Select High Pulse Width (Write)
60
PWCSL
PWCSH
tR
Rise Time
-
15
ns
tF
Fall Time
-
15
ns
* VDD~VSS = 2.4 to 3.5V, TA=25℃
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3.2.2 8080-Series MPU Parallel Interface Timing Characteristics:
Symbol Description
Min
Max
Unit
tcycle
System Cycle Time
300
-
ns
tAS
Address Setup Time
0
-
ns
tAH
Address Hold Time
0
-
ns
tDSW
Write Data Setup Time
40
-
ns
tDHW
Write Data Hold Time
7
-
ns
tDHR
Read Data Hold Time
20
-
ns
tOH
Output Disable Time
-
70
ns
tACC
Access Time
-
140
ns
-
ns
-
ns
15
15
ns
ns
PWCSL
PWCSH
tR
tF
Chip Select Low Pulse Width (Read)
120
Chip Select Low pulse width (Write)
60
Chip Select High Pulse Width (Read)
60
Chip Select High Pulse Width (Write)
Rise Time
Fall Time
60
-
* VDD~VSS = 2.4 to 3.5V, TA=25℃
9
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3.2.3 Serial Interface Timing Characteristics:
Symbol Description
Min
Max
Unit
tcycle
Clock Cycle Time
250
-
ns
tAS
Address Setup Time
150
-
ns
tAH
Address Hold Time
150
-
ns
tCSS
Chip Select Setup Time
120
-
ns
tCSH
Chip Select Hold Time
60
-
ns
tDSW
Write Data Setup Time
50
-
ns
tDHW
Write Data Hold Time
15
-
ns
tCLKH
Serial Clock High Time
100
-
ns
tCLKL
Serial Clock Low Time
100
-
ns
tR
Rise Time
-
15
ns
tF
Fall Time
-
15
ns
* VDD~VSS = 2.4 to 3.5V, TA=25℃
10
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3.2.4 I2C Interface Timing Characteristics:
Symbol Description
tcycle
tHSTART
tSD
tSSTART
tSSTOP
Min
Max
Unit
Clock Cycle Time
2.5
-
us
Start condition Hold Time
0.6
-
us
Data Setup Time
Start condition Setup Time (Only
relevant for a repeated Start condition)
Stop condition Hold Time
100
-
ns
0.6
-
us
0.6
-
us
300
ns
-
us
tR
Rise Time for data and clock pin
Idle Time before a new transmission
tIDLE
can start
* VDD~VSS = 2.4 to 3.5V, TA=25℃
1.3
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3.3 Optics & Electrical Characteristics
Characteristics
Symbol
Conditions
Brightness
Lbr
(x)
(y)
CR
With Polarizer
C.I.E. (Blue)
Dark Room Contrast
Without Polarizer
View Angle
Min
Typ
Max Unit
40
60
cd/m2
0.12 0.16 0.20
0.22 0.26 0.30
- >100:1 >160
-
-
degree
Note 3: Optical measurement taken at 1/32 duty.
3.4 General Electrical Specification
Characteristics
Symbol
Conditions
Min
Typ
Max Unit
Supply Voltage
Driver Supply Voltage
VDD
VCC
-
2.4
7
2.8
8
3.5
9
V
V
Operating Current for
VDD
IDD
Note 4
-
0.2
1
mA
Note 5
-
0.2
1
mA
Operating Current for
VCC
ICC
Note 4
-
TBD TBD
mA
Note 5
-
TBD TBD
mA
Sleep Mode Current for
IDD, SLEEP
<1
µA
1
VDD
Sleep Mode Current for
ICC, SLEEP
<1
µA
1
VCC
Note 4: VDD = 2.8V, VCC = 8V, Frame Rate =TBD Hz, Contrast Setting = TBD,
50% Display Area Turn on.
Note 5: VDD = 2.8V, VCC = 8V, Frame Rate = TBD Hz, Contrast Setting = TBD,
100% Display Area Turn on.
1
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4.. Funcctional Specifiication
n
4.1. Commands
Refer to the Technical Manual for the SSD1305
4.2 Power down and Power up Sequence
To protect OEL panel and extend the panel life time, the driver IC power up/down
routine should include a delay period between high voltage and low voltage power
sources during turn on/off. It gives the OEL panel enough time to complete the
action of charge and discharge before/after the operation.
4.2.1 Power up Sequence:
1.
2.
3.
4.
5.
6.
Power up VDD
Send Display off command
Driver IC Initial Setting
Clear Screen
Power up VCC
Delay 100ms
(When VDD is stable)
7. Send Display on command
VDD
D, on
VCC on
Display on
VCC
VDD/VDDIO
VSS/Ground
4.2.2 Power down Sequence:
1. Send Display off command
2. Power down VCC
3. Delay 100ms
(When VCC is reach 0 and panel
is completely discharges)
4. Power down VDD
Dissplay offf
VCC off
VDD, off
VCC
VDD/VDDIO
VSS/Ground
4.3 Reset Circuit
When RES# input is low, the chip is initialized with the following status:
1. Display is OFF
2. 132×64 Display Mode
3. Normal segment and display data column and row address mapping (SEG0
mapped to column address 00H and COM0 mapped to row address 00H)
4. Shift register data clear in serial interface
5. Display start line is set at display RAM address 0
6. Column address counter is set at 0
7. Normal scan direction of the COM outputs
8. Contrast control register is set at 80H
9. Normal display mode (Equivalent to A4h command)
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4.4 Actual Application Example
TBD
14
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5. Reliability
5.1 Contents of Reliability Tests
Item
Conditions
High Temperature Operation
70°C, 240 hrs
Low Temperature Operation
-30°C, 240 hrs
High Temperature Storage
80°C, 240 hrs
Low Temperature Storage
High Temperature/Humidity
Operation
-40°C, 240 hrs
Criteria
The brightness
should be greater
than 50% of the
initial brightness.
60°C, 90% RH, 120 hrs
The operational
-40°C ⇔ 85°C, 24 cycles functions work.
Thermal Shock
1hr dwell
* No moisture condensation is observed during tests.
5.2 Lifetime
End of lifetime is specified as 50% of initial brightness.
An average operating lifetime of more than 10,000 hrs at room temperature is
approached by high temperature operations.
5.3 Failure Check Standard
After the completion of the described reliability test, the samples were left at room
temperature for 2 hrs prior to conducting the failure test at 23±5°C; 55±15% RH.
15
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6. Outgoing Quality Control Specifications
6.1 Environment Required
Customer’s test & measurement are required to be conducted
conditions:
Temperature:
Humidity:
Fluorescent Lamp:
Distance between the Panel & Lamp:
Distance between the Panel & Eyes of the Inspector:
Finger glove (or finger cover) must be worn by the inspector.
Inspection table or jig must be anti-electrostatic.
under the following
23 ± 5°C
55 ± 15 %RH
30W
≥ 50 cm
≥ 30 cm
6.2 Sampling Plan
Level II, Normal Inspection, Single Sampling, MIL-STD-105E
6.3 Criteria & Acceptable Quality Level
Partition
AQL
Major
Minor
0.65
1.0
Definition
Defects in Pattern Check (Display On)
Defects in Cosmetic Check (Display Off)
6.3.1 Cosmetic Check (Display Off) in Non-Active Area
Check Item
Classification
Criteria
X > 6 mm (Along with Edge)
Y > 1 mm (Perpendicular to edge)
X
Panel
General Chipping
Y
Minor
X
Y
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6.3.1 Cosmetic Check (Display Off) in Non-Active Area (Continued)
Check Item
Classification
Criteria
Any crack is not allowable.
Panel Crack
Minor
Cupper Exposed
(Even Pin or Film)
Minor
Film or Trace Damage
Minor
Not Allowable by Naked Eye
Inspection
Not Allowable
Terminal Lead Twist
Minor
Not Allowable
Terminal Lead Broken
Minor
Terminal Lead Prober
Mark
Acceptable
Ok
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6.3.1 Cosmetic Check (Display Off) in Non-Active Area (Continued)
Check Item
Classification
Criteria
NG if any bent lead cause lead
shorting.
Minor
Terminal Lead Bent
(Not Twist or Broken)
NG for horizontally bent lead more
than 50% of its width.
Minor
Glue or Contamination
on Pin
(Couldn’t Be Removed
by Alcohol)
Minor
Ink Marking on Back
Side of panel
(Exclude on Film)
Acceptable
Ignore for Any
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6.3.2 Cosmetic Check (Display Off) in Active Area
Check Item
Any Dirt & Scratch on
Protective Film
Classification
Criteria
Acceptable
Ignore for Any
Scratches, Fiber, Line-Shape
Defect
(On Polarizer)
Minor
Dirt, Spot-Shape Defect
(On Polarizer)
Minor
W ≤ 0.1
W > 0.1 &
L≤2
L>2
Φ ≤ 0.1
0.1 <Φ ≤ 0.25
0.25 <Φ
Φ ≤ 0.5
0.5 < Φ
Ignore
n≤1
n=0
Ignore
n≤1
n=0
n=1
n=0
Bubbles, or Dent
Minor
(On Polarizer)
Fingerprint, Flow Mark
Minor
Not Allowable
(On Polarizer)
* Protective film should not be tear off when cosmetic check.
** Definition of W & L & Φ (Unit: mm):
Φ = (a + b) / 2
L
b: Minor Axis
W
a: Major Axis
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6.3.3 Pattern Check (Display On) in Active Area
Check Item
Classification
No Display
Major
Flicker
Major
Missing Line
Major
Pixel Short
Major
Darker Pixel
Major
Wrong Display
Major
Un-uniform
Major
Criteria
Not Allowable
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7. Package Sp
pecifiications
EPE COVER FOAM 351x212x1,
ANTISTATIC x 1 Pcs
x 1 pcs (Empty)
16 Pcs Tray Vacuum packing
Module
EPE PROTECTTIVE
x 15 pcs
Staggered Stacking
Tray 420x285 T=0.8mm
Exsiccator x 2 pcs
Brimary Box 4 SET
Wrapped with adhesive tape
x 16 pcs
Vacuum packing bag
EPE PROTECTTIVE
370mm x 280mm x 20mm
CARTON BOX
Label
Primary L450mm x W296 x H110, B wave
x 4Pcs
Part ID :
Label
Lot ID :
Q'ty :
QC :
Carton Box L464mm x W313mm x H472mm, AB wave
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8. Preca
autionss Wheen Ussin
ng Theesee OEL Disp
playy Modulles
8.1 Handling Precautions
1)
2)
3)
4)
5)
6)
7)
8)
9)
10)
Since the display panel is being made of glass, do not apply mechanical
impacts such us dropping from a high position.
If the display panel is broken by some accident and the internal organic
substance leaks out, be careful not to inhale nor lick the organic substance.
If pressure is applied to the display surface or its neighborhood of the OEL
display module, the cell structure may be damaged and be careful not to apply
pressure to these sections.
The polarizer covering the surface of the OEL display module is soft and easily
scratched. Please be careful when handling the OEL display module.
When the surface of the polarizer of the OEL display module has soil, clean the
surface. It takes advantage of by using following adhesion tape.
* Scotch Mending Tape No. 810 or an equivalent
Never try to breathe upon the soiled surface nor wipe the surface using cloth
containing solvent such as ethyl alcohol, since the surface of the polarizer will
become cloudy.
Also, pay attention that the following liquid and solvent may spoil the
polarizer:
* Water
* Ketone
* Aromatic Solvents
Hold OEL display module very carefully when placing OEL display module
into the system housing. Do not apply excessive stress or pressure to OEL
display module. And, do not over bend the film with electrode pattern layouts.
These stresses will influence the display performance. Also, secure sufficient
rigidity for the outer cases.
Do not apply stress to the LSI chips and the surrounding molded sections.
Do not disassemble nor modify the OEL display module.
Do not apply input signals while the logic power is off.
Pay sufficient attention to the working environments when handing OEL
display modules to prevent occurrence of element breakage accidents by static
electricity.
* Be sure to make human body grounding when handling OEL display
modules.
* Be sure to ground tools to use or assembly such as soldering irons.
* To suppress generation of static electricity, avoid carrying out assembly work
under dry environments.
* Protective film is being applied to the surface of the display panel of the OEL
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display module. Be careful since static electricity may be generated when
exfoliating the protective film.
11) Protection film is being applied to the surface of the display panel and removes
the protection film before assembling it. At this time, if the OEL display
module has been stored for a long period of time, residue adhesive material of
the protection film may remain on the surface of the display panel after
removed of the film. In such case, remove the residue material by the method
introduced in the above Section 5).
and be careful
to avoid
12) Ifcorroded
electric current
is applied
whenthe
theabove.
OEL display module is being dewed or
when it is placed under high humidity environments, the electrodes may be
8.2 Storage Precautions
1)
2)
When storing OEL display modules, put them in static electricity preventive
bags avoiding exposure to direct sun light nor to lights of fluorescent lamps, etc.
and, also, avoiding high temperature and high humidity environments or low
temperature (less than 0°C) environments.
At that time, be careful not to let water drops adhere to the packages or bags nor
let dewing occur with them.
If electric current is applied when water drops are adhering to the surface of the
OEL display module, when the OEL display module is being dewed or when it
is placed under high humidity environments, the electrodes may be corroded
and be careful about the above.
8.3 Designing Precautions
1)
2)
3)
4)
5)
6)
7)
8)
The absolute maximum ratings are the ratings which cannot be exceeded for
OEL display module, and if these values are exceeded, panel damage may be
happen.
To prevent occurrence of malfunctioning by noise, pay attention to satisfy the
VIL and VIH specifications and, at the same time, to make the signal line cable
as short as possible.
We recommend you to install excess current preventive unit (fuses, etc.) to the
power circuit (VDD). (Recommend value: 0.5A)
Pay sufficient attention to avoid occurrence of mutual noise interference with
the neighboring devices.
As for EMI, take necessary measures on the equipment side basically.
When fastening the OEL display module, fasten the external plastic housing
section.
If power supply to the OEL display module is forcibly shut down by such errors
as taking out the main battery while the OEL display panel is in operation, we
cannot guarantee the quality of this OEL display module.
The electric potential to be connected to the rear face of the IC chip should be
as follows: SSD1305
* Connection (contact) to any other potential than the above may lead to
rupture of the IC.
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8.4 Precautions when disposing of the OEL display modules
1)
Request the qualified companies to handle industrial wastes when disposing of
the OEL display modules. Or, when burning them, be sure to observe the
environmental and hygienic laws and regulations.
8.5 Other Precautions
1)
2)
3)
4)
5)
When an OEL display module is operated for a long of time with fixed pattern
may remain as an after image or slight contrast deviation may occur.
Nonetheless, if the operation is interrupted and left unused for a while, normal
state can be restored. Also, there will be no problem in the reliability of the
module.
To protect OEL display modules from performance drops by static electricity
rapture, etc., do not touch the following sections whenever possible while
handling the OEL display modules.
* Pins and electrodes
* Pattern layouts such as the COF
With this OEL display module, the OEL driver is being exposed. Generally
speaking, semiconductor elements change their characteristics when light is
radiated according to the principle of the solar battery. Consequently, if this
OEL driver is exposed to light, malfunctioning may occur.
* Design the product and installation method so that the OEL driver may be
shielded from light in actual usage.
* Design the product and installation method so that the OEL driver may be
shielded from light during the inspection processes.
Although this OEL display module stores the operation state data by the
commands and the indication data, when excessive external noise, etc. enters
into the module, the internal status may be changed. It therefore is necessary
to take appropriate measures to suppress noise generation or to protect from
influences of noise on the system design.
We recommend you to construct its software to make periodical refreshment of
the operation statuses (re-setting of the commands and re-transference of the
display data) to cope with catastrophic noise.
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