Download PCF8523 Real-Time Clock (RTC) and calendar

PCF8523
NXP Semiconductors
Real-Time Clock (RTC) and calendar
VHWDODUP
IODJ$)
$)$/$50
)/$*
&/($5
6(7
WRLQWHUIDFH
UHDG$)
$,(
IURPLQWHUIDFH
FOHDU$)
RIIVHWFLUFXLW
DGGVXEWUDFWSXOVH
IURPLQWHUIDFH
FOHDU&,(
VHWEDWWHU\
IODJ%6)
&,(
38/6(
*(1(5$725
&/($5
6(7
%6)%$77(5<
)/$*
6(7
&/($5
IURPLQWHUIDFH
FOHDU%6)
VHWEDWWHU\
ORZIODJ%/)
%/)%$77(5<
/2:)/$*
6(7
&/($5
WRLQWHUIDFH
UHDG%6)
%6,(
WRLQWHUIDFH
UHDG%/)
%/,(
IURPEDWWHU\
ORZGHWHFWLRQ
FLUFXLWFOHDU%/)
6,(
6(&21'6&2817(5
,17
,17&/.287
WRLQWHUIDFH
UHDG6)
6)
6(&21')/$*
6(7
&/($5
38/6(
*(1(5$725
75,**(5 &/($5
6,(
&/.287
7$0
IURPLQWHUIDFH
FOHDU6)
&2817'2:1
&2817(5$
7$& WRLQWHUIDFH
UHDG&7$)
&7$)
&2817'2:1
7,0(5$)/$*
&/($5
6(7
38/6(
*(1(5$725
75,**(5 &/($5
(1$%/(
7$0
&7$,(
IURPLQWHUIDFH
FOHDU&7$)
:$7&+'2*
&2817(5$
7$& :7$)
:$7&+'2*
7,0(5)/$*
&/($5
6(7
(1$%/(
38/6(
*(1(5$725
75,**(5 &/($5
0&8ORDGLQJ
ZDWFKGRJFRXQWHU
RUUHDGLQJ:7$)
&2817'2:1
&2817(5%
7%& (1$%/(
WRLQWHUIDFH
UHDG:7$)
&7%)
&2817'2:1
7,0(5%)/$*
&/($5
6(7
WRLQWHUIDFH
UHDG&7%)
38/6(
*(1(5$725
75,**(5 &/($5
7$0
:7$,(
7%0
&7%,(
,17
IURPLQWHUIDFH
FOHDU&7%)
DDD
When SIE, CTAIE, WTAIE, CTBIE, AIE, CIE, BSIE, BLIE, and clock-out are disabled, then INT1 remains high-impedance.
When CTBIE is disabled, then INT2 remains high-impedance.
Fig 8.
Interrupt block diagram
PCF8523
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 28 April 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
14 of 78