Download SH7760 Group USB Host Module Application Note

frame specified by StartingFrame. When the difference between the HcFmNumber register and the
StartingFrame is R, data packets are isochronously transferred until R has been incremented from
0 to the number in FrameCount. Offset[R] determines the first buffer address of each frame. The
lower 12 bits are always specified by Offset[R]. The upper 20 bits are given by BufferPage0 when
the 12th bit of Offset[R] is 0 and by the 20 higher-order bits of BufferEnd when the 12th bit of
Offset [R] is 1. The last address in the buffer for each frame from R = 0 to FrameCount−1 is
defined by Offset[R+1] −1 and the same 20 higher-order bits as are defined for the first address.
The last address of the last data packet (R = FrameCount) is BufferEnd. On completion of the
transfer of each frame, the Offset/PSWN fields of the frame become PSWN fields; the
ConditionCode and SizeOfPacket data are written to these fields.
Table 2.3
Field Definitions for Isochronous TD
Name
HC Access
Description
SF
R
StartingFrame
Indicates the transfer start frame of data packet.
DI
R
DelayInterrupt
As the field of GTD, indicates how long the interrupt generation is
delayed when ITD is completed.
FC
R
FrameCount
Indicates the number of data packet transferred (the number of frame to
be transferred) from ITD.
FrameCount = 0: One data packet
FrameCount = 7: Eight data packets
CC
R/W
ConditionCode
Stores the condition code when the Isochronous TD is moved to the
Done Queue.
BP0
R
BufferPage0
Indicates the first address of the data buffer.
NextTD
R/W
NextTD
Indicates the address of the next IsochronousTD.
BE
R
BufferEnd
Indicates the last address of a buffer.
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