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C868
Memory Organization
3.3.2.4
Software Unlock Sequence
A special software unlock sequence is required to enter or exit the various chip modes
supported.
The bits ESWC and SWC in SFR SYSCON1 are implemented in a way to prevent
unintentional changing of the bits SWAP and BSLEN. Any change of the bits SWAP or
BSLEN not accompanied by the software unlock sequence will have no effect and the
above bits will revert back to their previous values two instructions after being changed.
The following programming steps must be executed at the ESWC/SWC unlock
sequence:
i) First Instruction:
This instruction should set the ESWC bit and modify of SWAP and/or BSLEN, as
necessary.
MOV SYSCON1,#10000X0YB ;X is BSLEN, Y is SWAP
ii) Second Instruction :
The second instruction must set the SWC bit. If this instruction sequence is followed,
then only the mode change in the previous instructions will come into effect. Otherwise
the previous mode will be retained and both bits ESWC and SWC are cleared.
The new chip mode becomes effective after the end of the second instruction after the
writing of the bit SWC.
MOV SYSCON1,#11000X0YB ;X is BSLEN, Y is SWAP
iii) Third Instruction:
The instruction following this sequence should be used for initialization of the program
counter to the 16 bit start-address of the new code memory resource, e.g. with :
LJMP 0XXXXH ;XXXX is the 16-bit hexadecimal address in new code memory
If both SWAP and BSLEN bits are set in the first instruction, both modes will still be
entered. It is, in any case, the responsibility of the user to provide the appropriate
relocation address depending on the mode prior to the execution of this sequence. The
special software unlock instruction sequence cannot be interrupted by an interrupt
request. Any read or write operation to SFR SYSCON1 will block the interrupt
generation for the first cycle of the directly following instruction. Therefore, the response
time of an interrupt request may be additionally delayed.
User’s Manual
3-8
V 1.0, 2003-01