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C868
On-Chip Peripheral Components
Register PISELH contains bitfields selecting the actual input signal for the module inputs.
PISELH
Port Input Select Register
Reset Value: [00H]
7
6
5
4
3
2
1
0
-
-
ISPOS2
ISPOS1
ISPOS0
r
r
rw
rw
rw
Field
Bits
Type Description
ISPOS0
[1:0]
rw
Input Select for CCPOS0
This bitfield defines the source, that is used for the
CCPOS0 input signal.
00
The input for CCPOS0 is external (from P1.5/
CCPOS0/T2/INT0/AN0).
01
The input for CCPOS0 is internal (from P1.5
latch).
else reserved (is held on ’1’)
ISPOS1
[3:2]
rw
Input Select for CCPOS1
This bitfield defines thesource, that is used for the
CCPOS1 input signal.
00
The input for CCPOS1 is external (from P1.6/
CCPOS1/T2EX/INT1/AN1).
01
The input for CCPOS1 is internal (from P1.6
latch).
else reserved (is held on ’1’)
ISPOS2
[5:4]
rw
Input Select for CCPOS2
This bitfield defines the source, that is used for the
CCPOS2 input signal.
00
The input for CCPOS2 is external (from P1.7/
CCPOS2/INT2/AN2).
01
The input for CCPOS2 is internal (from P1.7
latch).
else reserved (is held on ’1’)
0
[7:6]
r
reserved;
returns ’0’ if read; should be written with ’0’;
User’s Manual
4-99
V 1.0, 2003-01