Download USER` MANUAL

DOT MATRIX
LIQUID CRYSTAL DISPLAY
MODULE
T14432Z001
Serial
USER
USER‘‘ MANUAL
PROPOSED BY
Design
Approved
APPROVED
CONTENTS
1.
2
3.
Mechanical Specification
Mechanical Diagram
Interface Pin Connections
4.
5.
6.
Absolute Maximum Rating
Electrical Characteristics
Optical Characteristics
7.
8.
9.
Optical Definitions
Display Address
Interface to MPU
PAGE
2
2
2
3
3
3
3
3
9.1 Interface to Z-80 CPU
9.2 Interface to MC6800 CPU
9.3 Interface to 4-bit CPU ( HMCS43C )
9.4 Interface to HD6805 MP
10. Timing Control
10.1 Write and Read Operation
10.2 Busy fla g check timing
11. Initializa tion of LCM
12. Instruction Set
13. User Font Patterns
14. Icon RAM Data
4
4
4
4
4
4
4
4
5
6
7
7
15. Graph Display RAM Address
16. Software Example
16.1 8-bit operation ( 8 bits 2 lines )
16.2 4-bit operation ( 4 bits 2 lines )
17. Reliability Condition
18. Function Test & Inspection Criteria
19 Character Generator ROM Map
PAGE 1
8
8
8
8
9
9
10
1.
Mechanical Specification
ITEM
NUMBER OF CHARACT ERS
CHARACT ER FOR MAT
MODULE DIMENSION
VIEWING DISPLA Y AREA
ACT IVE DISPLA Y AREA
DOT SIZE
DOT PITCH
LED Backlight Col or
LED Backlight Input
Backlight Half-Li ft Ti me
E Mode LED Backlight Col or
E Mode LED Backlight Input
E mode Backlight Half-Li ft Ti me
2.
STANDARD VALUE
9 CHAR ACTERS X 2 LINES (16*16 Chinese Font)
16 X 16 DOTS
80.0 (W) X 36.0 (H) X 9.0 (T)
80.0 (W) X 36.0 (H) X 13.2 (T)
65.0 (W) X 16.0 (H)
60.4 5 (W) X 13.41 (H)
0.39 (W) X 0.39 (H)
0.42 (W) X 0.42 (H)
DC +3.3V
/5.0V
DC +3.3V
/5.0V
Yellow Green
V
50,000
Yellow Green
V
30,000
UNIT
--mm
mm
mm
mm
mm
100
mA
HR.
40
mA
HR.
Mechanical Diagram
LED
BACKLIGHT TYPE
3. Interface Pin Connections
NO
1
2
3
4
5
6
7
8
SYMBOL
VSS
VDD
N.C
CS
SID
E
DB0
DB1
LEVEL
-H/L
-H/L
H/L
H,H→L
H/L
H/L
FUNCT ION
GND ( 0V)
DC +3.3V
N.C
Register select
Read/Write
Enable signal
Data Bit 0
Data Bit 1
PAGE 2
NO
9
10
11
12
13
14
15
16
SYMBOL
DB2
DB3
DB4
DB5
DB6
DB7
A(+)
K(-)
LEVEL
H/L
H/L
H/L
H/L
H/L
H/L
DC +3.3V
0V
FUNCT ION
Data Bit 2
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
LED Backlight +
LED Backlight -
4. Absolute Maximum Ratings
ITEM
OPERATING TEMPERATURE
STORAGE TEMPERATURE
INPUT VOLAGE
SUPPLY VOLTAGE FOR LOGIC
SUPPLY VOLTAGE FOR LCD
STATIC ELECT RICITY
MIN.
SYMBOL
TYPE
TOP
-20
-TST
-30
-VI
VSS
-VDD-VSS
-3.3
VDD-VO
--Be sure that you are grounded when handing LCM.
MAX.
+70
+80
VDD
4.0
4.0
UNIT
℃
℃
V
V
V
5. Electrical Characteristics
ITEM
SUPPLY VOLTAGE FOR LOGIC
SYN
VDD-VSS
MIN.
3.0
----
TYPE
3.3
6.1
5.8
5.5
MAX.
4.0
----
UNIT
V
V
V
V
VIH
VIL
VOH
VOL
IDD
CONDITION
-Ta= 0 ℃
Ta= +25 ℃
Ta= +50 ℃
----VDD=+3.3V
SUPPLY VOLTAGE FOR LCD
VDD-VO
INPUT HIGH VOLTAGE
INPUT LOW VOLTAGE
OUTPUT HIGH VOLTAGE
OUTPUT LOW VOLTAGE
SUPPLY CURRENT
2.2
0
2.4
---
----3.0
VDD
0.6
-0.4
4.5
V
V
V
V
mA
SYM
θ
φ
CR
TON
TOFF
CONDITION
CR ≧2
CR ≧2
----
MIN.
-10
-30
----
TYPE
--5
180
100
MAX.
40
30
-230
150
UNIT
deg.
deg.
-mS
mS
6. Optical Characteristics
ITEM
VIEW ANGLE (V)
VIEW ANGLE (H)
CONTRAST RATIO
RESPONSE TIME
RESPONSE TIME
7. Optical Definitions
Response Ti me
Contrast Ration
View Angle
8. Display Address
1
Line 1
Line 2
Line 3
Line 4
2
3
80H
90H
88H
98H
17
4
5
81H
91H
89H
99H
18
19
6
7
82H
92H
8AH
9AH
20
21
8
9
83H
93H
8BH
9BH
22
Line 1
Line 2
Line 3
Line 4
*A Ram Bank is 16-bits (2 bytes)
PAGE 3
23
10
11
84H
94H
8CH
9CH
24
25
12
13
85H
95H
8DH
9DH
26
27
14
15
86H
96H
8EH
9EH
28
29
16
87H
97H
8FH
9FH
30
31
32
9. Interface to MPU
9.1
Interface to Z-80 CPU
9.2
Interface to MC6800 CPU
9.3 Interface to 4-bi t CPU ( HMCS43C )
9.4
Interface to HD6805 MP
10. Timing Control
10.1 Write and Read Operation
Write Operation
Item
Enable Cycle Ti me
Enable Pules Width ( High level )
Enable Rise/Fall Ti me
Address Set-Up Ti me ( RS,R/W,E )
Address Hole Ti me
Data Set-Up Ti me
Data Delay Ti me
Data Hol d Ti me
Read Operation
Symbol
tCYCE
PWEH
tER,tEF
tAS
tAH
tDSW
tDDR
tDHR
Li mit (Min.)
1200
140
-10
20
40
-20
10.2 Busy flag check timing
Note : IR7, IR3 : Instruction 7th bit , 3rd bit ; AC3 : Address Counter 3rd bit.
PAGE 4
Li mit (Max.)
--25
---190
--
Unit
ns
ns
ns
ns
ns
ns
ns
ns
11. Initializa tion of LCM
The LCM automatically init ializes ( reset ) when power is turned on using the internal reset circuit. If the power supply
conditions for correctly operating of the internal reset circuit are not met, initialization by instruction is required. Use the
procedure is next page for initialization.
Internal Power Suppl y reset
4.5V
0.2V
Vcc
toff
→
←
←－－－－－－→
trcc
(Note 1) 10 ms ≧ trcc ≧ 0.1 ms , toff ≧ 1 ms.
(Note 2) toff stipulates the time of power OFF for momen tary power supply dip or when power supply cycles ON and OFF.
Item
Power suppl y rise time
Power suppl y off time
1)
Symbol
trcc
toff
Test condi tion
---
Li mit (Min.)
0.1
1
Li mit (Max.)
10
--
8 Bit Interface
Unit
ms
ms
2) 4 Bit Interface
Power On
Power On
Wait 40 m s or more after VDD reaches 4.5V
Wait 40 m s or more after VDD reaches 4.5V
Busy flag can‘t be checked.
Function set : 8 bits
before this instruction
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
1
1
*
0
*
*
RS
0
R/W
0
Wait 4.1ms or more
DB7
0
DB6
0
DB5
1
DB4
1
DB6
0
DB5
1
DB4
1
DB6
0
DB5
1
DB4
1
Wait 4.1ms or more
Busy flag can‘t be checked.
Function set : 8 bits
RS E/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
1
1
*
0
*
*
RS
0
R/W
0
Wait 100 µs or more
DB7
0
Wait 100 µs or more
Busy flag can‘t be checked.
Function set : 8 bits
before this instruction
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
1
1
*
0
*
*
RS
0
R/W
0
R/W
0
0
0
0
0
0
0
0
0
DB7
0
0
*
0
1
0
0
0
0
DB7
0
Function set : 8 bits
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
1
1
*
0
*
*
Function Set
0
0
0
0
0
0
1
D
C
B
Display Off
0
0
0
0
0
0
0
0
0
1
Display Clear
0
0
0
0
0
0
0
1
I/D
S
Entry Mode Set
End of
Initialization
�
RS
0
0
0
0
0
0
0
0
0
DB6
0
0
0
0
D
0
0
0
1
DB5
1
1
*
0
C
0
0
0
I/D
End of
Initialization
Busy flag is checked after instructions are completed. If busy flay isn‘t checked, the wait ing time between
instructions should be longer than execut ion time of these instructions.
PAGE 5
DB4
1
0
*
0
B
0
1
0
S
12. Instruction Set
Instruction Table: ( RE=0: Enable basic instruction. )
Instruction
Instruction Code
Description
Ex.
Time
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
540KHz
Clear Display 0
0
0
0
0
0
0
0
0
1 Clear entire display and return the cursor to home 4.6ms
position ( address 0 ).
Return Home 0
0
0
0
0
0
0
0
1
X Return cursor to the home position. Also returns the 4.6ms
display being shifted to the original position.
DDRAM contents remain unchanged.
72μs
Entry Mode Set 0
0
0
0
0
0
0
1
I/D
S Sets cursor move direction and specifies display
shift. These operation are performed during data
rite/read. For normal operation.
I/D=1 : increment ; 0 :decrement ;
S=1 : accompanies display shift when data is
written, for normal operation, set to zero.
Display
0
0
0
0
0
0
1
D
C
B D=1: ON display ; 0:OFF display.
72μs
ON/OFF
C=1: ON cursor ; 0: OFF cursor.
control
B=1: ON blink cursor ; 0: OFF blink cursor.
Cursor or
0
0
0
0
0
1
S/C R/L X
X S/C=1: Display shift; 0:Cursor move. R/L=1: shift
72μs
Display shift
to right; 0: shift to left.
Function
0
0
0
0
1
DL
X
0
X
X DL=1: Interface is 8 bits. 0: Interface is 4 bits.
72μs
Set
RE
RE=0: Normal instruction .1: Extended instruction.
(Modify)
Set CGRAM
0
0
0
1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter.
72μs
address
Set DDRAM
0
0
1
0 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address counter.
72μs
address
Read Busy flag 0
1
BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 Whether during internal operation or not can be 0μs
and address
known by reading BF. The contents of address
counter can also be read.
Write data to
1
0
D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM.
72μs
RAM
(DDRAM/CGRAM/IRAM/GRAM)
Read data from 1
1
D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM.
72μs
RAM
(DDRAM/CGRAM/IRAM/GRAM)
Instruction Table ( RE=1: Enable extension instruction. )
Instruction
Instruction Code
Description
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Standby Mode
0
0
0
0
0
0
0
0
0
Start Row
Enable
Reverse Line
select
Sleep mode and
set GRAM page
Function
Set
(Modify)
Set Iram/Start
Row address
Set Graphic
RAM address
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
R1
Enter standby mode, only Icon areas display
Standby mode can be released by any other
instructions.
SR SR=1: Allow change start display Row.
SR=0: Disable start display Row change.
R0 Choice one of 4 line which data is reverse display.
0
0
0
0
0
0
1
SL
X
X
0
0
0
0
1
DL
X
1
RE
0
0
0
1
0
0
1
AC5 AC4 AC3 AC2
AC6 AC5 AC4 AC3 AC2
0
0
0
AC3 AC2
PAGE 6
1
SL=0:Enter sleep mode.
1:Wake-up from sleep mode
G
0 DL=1: Interface is 8 bits. 0: Interface is 4 bits.
RE=1: Extended instruction.0: Normal instruction.
G=1: Graphic display ON. 0: Graphic display OFF
AC1 AC0 SR=1: AC5 – AC0 is start Row.
SR=0: AC5 – AC0 is ICON RAM address.
AC1 AC0 Set GDRAM address counter. Execute once set the
address of display row (AC6-AC3). Execute again
set the address of display column (AC3-AC0).
AC1 AC0
Ex.
Time
540KHz
72μs
72μs
72μs
72μs
72μs
72μs
72μs
13.
User Font Patterns ( CG RAM Character )
Character Code (DDRAM data)
B15 – B4
CGRAM data (High byte)
CGRAM data (Low byte)
B3 B2 B1 B0 B5 B4 B3 B2 B1 B0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0
X
0
14.
CGRAM Address
X
00
01
X
X
00
01
0
0
0
0
0
1
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
1
0
1
1
1
1
0
0
0
1
0
0
0
1
0
0
0
0
0
0
1
1
0
1
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
1
0
0
0
1
0
0
0
1
0
1
0
0
0
0
1
0
0
0
0
1
0
1
0
1
0
1
0
0
0
1
0
0
0
0
1
0
0
0
0
1
1
0
0
1
0
1
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
1
1
0
0
1
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
1
1
0
1
0
0
0
0
1
1
1
1
1
1
1
1
0
1
0
1
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
1
1
0
1
0
0
1
0
0
1
0
0
0
0
1
0
0
0
1
1
0
0
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
0
1
1
0
1
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
1
0
0
1
0
0
0
0
1
0
1
0
1
0
1
0
0
0
0
1
0
0
1
0
1
0
0
0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
1
0
1
0
1
0
0
0
1
1
1
1
1
0
0
0
0
1
0
1
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
1
0
0
1
0
0
1
0
0
0
0
1
1
1
1
1
1
1
0
0
1
0
1
0
0
0
1
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
1
1
1
0
1
0
1
0
0
0
1
1
1
1
1
0
0
0
1
1
0
0
1
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
1
1
0
1
0
0
1
1
1
0
0
0
0
0
1
0
0
0
0
0
1
1
1
0
1
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Icon RAM Data
Icon RAM
Address
AC3 AC2 AC1
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
0
0
1
0
0
1
0
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
Icon RAM Data
AC0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D15
Seg0
Seg16
Seg32
Seg48
Seg64
Seg80
Seg96
Seg112
Seg128
Seg144
Seg160
Seg176
Seg192
Seg208
Seg224
Seg240
D14
Seg1
Seg17
Seg33
Seg49
Seg65
Seg81
Seg97
Seg113
Seg129
Seg145
Seg161
Seg177
Seg193
Seg209
Seg225
Seg241
D13
Seg2
Seg18
Seg34
Seg50
Seg66
Seg82
Seg98
Seg114
Seg130
Seg146
Seg162
Seg178
Seg194
Seg210
Seg226
Seg242
High Byte
D12
D11
Seg3
Seg4
Seg19 Seg20
Seg35 Seg36
Seg51 Seg52
Seg67 Seg68
Seg83 Seg84
Seg99 Seg100
Seg115 Seg116
Seg131 Seg132
Seg147 Seg148
Seg163 Seg164
Seg179 Seg180
Seg195 Seg196
Seg211 Seg212
Seg227 Seg228
Seg243 Seg244
D10
Seg5
Seg21
Seg37
Seg53
Seg69
Seg85
Seg101
Seg117
Seg133
Seg149
Seg165
Seg181
Seg197
Seg213
Seg229
Seg245
PAGE 7
D9
Seg6
Seg22
Seg38
Seg54
Seg70
Seg86
Seg102
Seg118
Seg134
Seg150
Seg166
Seg182
Seg198
Seg214
Seg230
Seg246
D8
Seg7
Seg23
Seg39
Seg55
Seg71
Seg87
Seg103
Seg119
Seg135
Seg151
Seg167
Seg183
Seg199
Seg215
Seg231
Seg247
D7
Seg8
Seg24
Seg40
Seg56
Seg72
Seg88
Seg104
Seg120
Seg136
Seg152
Seg168
Seg184
Seg200
Seg216
Seg232
Seg248
D6
Seg9
Seg25
Seg41
Seg57
Seg73
Seg89
Seg105
Seg121
Seg137
Seg153
Seg169
Seg185
Seg201
Seg217
Seg233
Seg249
D5
Seg10
Seg26
Seg42
Seg58
Seg74
Seg90
Seg106
Seg122
Seg138
Seg154
Seg170
Seg186
Seg202
Seg218
Seg234
Seg250
Low Byte
D4
D3
Seg11 Seg12
Seg27 Seg28
Seg43 Seg44
Seg59 Seg60
Seg75 Seg76
Seg91 Seg92
Seg107 Seg108
Seg123 Seg124
Seg139 Seg140
Seg155 Seg156
Seg171 Seg172
Seg187 Seg188
Seg203 Seg204
Seg219 Seg220
Seg235 Seg236
Seg251 Seg252
D2
Seg13
Seg29
Seg45
Seg61
Seg77
Seg93
Seg109
Seg125
Seg141
Seg157
Seg173
Seg189
Seg205
Seg221
Seg237
Seg253
D1
Seg14
Seg30
Seg46
Seg62
Seg78
Seg94
Seg110
Seg126
Seg142
Seg158
Seg174
Seg190
Seg206
Seg222
Seg238
Seg254
D0
Seg15
Seg31
Seg47
Seg63
Seg79
Seg95
Seg111
Seg127
Seg143
Seg159
Seg175
Seg191
Seg207
Seg223
Seg239
Seg255
15. Graph Display RAM Address
GDRAM Column
Address
0
1
2
:
61
62
63
GDRAM Row Address
-1
D15 -> D0
D15 -> D0
D15 -> D0
D15 -> D0
D15 -> D0
D15 -> D0
:
:
D15 -> D0
D15 -> D0
D15 -> D0
D15 -> D0
D15 -> D0
D15 -> D0
0
D15 -> D0
D15 -> D0
D15 -> D0
:
D15 -> D0
D15 -> D0
D15 -> D0
15
D15 -> D0
D15 -> D0
D15 -> D0
:
D15 -> D0
D15 -> D0
D15 -> D0
16. Software Example
16.1 8-bi t operation ( 8 bi ts 2 lines )
Function
R R D D D D D D D D
S W 7 6 5 4 3 2 1 0
Display
Power on delay
Description
Function set
0 0 0 0 1 1 0 0 0 x
Display OFF
0 0 0 0 0 0 1 0 0 0
Initialization. No display appears.
Sets to 8-bit operation and selects 2-line display character font.
( Note: number of display lines and character fonts cannot be
change after this. )
Turn off display.
Display ON
0 0 0 0 0 0 1 1 1 0
Turn on display and cursor
Entry Mode
Set
0 0 0 0 0 0 0 1 1 0
Write data to
CG/DD RAM
Write data to
CG/DD RAM
Set DD RAM
1
1
1
1
0
Write data to
CG/DD RAM
Cursor or display
shift
Write data to
CG/DD RAM
Entry Mode
Set
Write data to
CG/DD RAM
Write data to
CG/DD RAM
Return Home
0
0
0
0
0
1
1
1
0
1
0
0
1
1
0
1
1
0
0
1
1
0
0
0
0
0
1
0
1
0
1
1
1
1
0
1
1
0
0
0
0 雄__
1
1 雄鐸
1
0 雄鐸
0 0 0
1 0 0
0 0 0
Write “鐸”” .
雄鐸
CR
0 0 1 0 0 x x 雄鐸
CR
*
雄鐸
CO., LTD.
*
0 0 0 0 1 1 1 雄鐸
CO., LTD.
鐸
1 1 1 1 0 0 0 ., LTD. x
*
*
0 0 0 0 0 1 0 雄鐸
CO., LTD.
*
*
0 0 0
Set mode to increment the address by one and to shift the cursor
to the right, at the time of write, to the DD/CG RAM Display is
not shifted.
to right.
Write “雄””. Cursor incremented by one and shift
shiftto
Set RAM address so that the cursor is propositioned
at the head of the second line.
Write “C” , and “R”.
Shift only the cursor position to the left.
Write “O., LTD.
LTD.”” .
at the time during writing operation.
Set display mode shift
shiftat
to
Write “ x”. Cursor incremented by one and shift
shiftto
right. ( The display move to left. )
Write other characters.
Return both display and cursor to the original position ( Set
address to zero).
16.2 4-bi t operation ( 4-bi t, 1 line )
Function
RS R/ D7 D6 D5 D4
W
power on delay
Function set
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
1
1
0
0
1
0
1
0
x
0
0
0
0
Write data to CG/DD RAM 1
1
1
1
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
1
1 雄__
0
0
1
Function set
Entry Mode Set
Description
initialization. No display appears.
Sets to 4-bit operation. In this case, operation is
handled as 8-bits by initialization, and only this
instruction completes with one write.
Sets 4-bit operation and selects 1-line display character font
on and resetting is needed. ( number of display lines and
character fonts cannot be changed hence after ).
Turn on display and cursor.
0
Display ON/OFF Control
Display
Set mode to incremented the address by one and to shift the
cursor to the right, at the time of write. to the DD/CG RAM
display is not shifted.
to right.
Write “雄””. Cursor incremented by one and shift
shiftto
same as 8-bi t operation
PAGE 8
17. Reliability Condition
TN Type
Normal Temp.
Wide Temp.
STN Type
Normal Temp.
Wide Temp.
Horizon tal Φ
Vertical Θ(㎜)
Operating Temperature
Storage Temperature
High Temperature (Power Off)
±30 °
±30 °
±30 °
±30 °
10 °to 30°
10 °to 30°
-10 °to 40 °
-10 °to 40 °
* -20 to 70 ℃
-10 to 70 ℃
-25 to 80 ℃
0 to 50℃
* -30 to 80 ℃
-20 to 80 ℃
-35 to 90 ℃
-20 to 70 ℃
240 Hours
240 Hours
240 Hours
240 Hours
@70℃
@90℃
@65℃
@75℃
Low Temperature (Power Off)
240 Hours
240 Hours
240 Hours
240 Hours
@-20 ℃
@-35 ℃
@-15 ℃
@-25 ℃
High Temperature (Power On)
240 Hours
240 Hours
240 Hours
240 Hours
@70℃
@80℃
@60℃
@70℃
Low Temperature (Power On)
240 Hours
240 Hours
240 Hours
240 Hours
@-10 ℃
@-25 ℃
@-10 ℃
@-20 ℃
High Temperature & High Humid ity
55 ℃/90%R H
75 ℃/90%R H
45 ℃/90%R H
65 ℃/90%R H
240 Hours
240 Hours
240 Hours
240 Hours
Thermal Shock
C
A
60min@-20 ℃
60min@-35 ℃
60min@-20 ℃
60min@-30 ℃
5 Cycle
B
B
5min@25 ℃
5min@25 ℃
5min@25 ℃
5min@25 ℃
A
C
60min@70℃
60min@90℃
60min@70℃
60min@80℃
Expected Lift
50,000 Hours
50,000 Hours
50,000 Hours
50,000 Hours
*Wide temp. version may not available for some products, Please consult our sales engineer or respresentative.
Viewing
Angle
18. Functiona l Test & Inspection Criteria
18.1 Sample pla n
Sample pla n according to MIL-STD-105D level 2, and acceptance/rejection criter ia is.
Base on :
Major defect : AQL 0.65
Minor defect : AQL 2.5
18.2 Inspection condition
Viewing dista nce for cosmetic inspection is 30cm with bare eyes, and under an environment of
800 lus (20W) light intensity. All direction for inspecting the sample should be within 45°
against perpend icular line.
18.3 Definition of Inspection Zone in LCD
A
Zone A :
Zone B :
Zone C :
Note :
B
C
Character / Digit area
Viewing area except Zone A ( Zone A + Zone B = minimum Viewing area )
Outside viewing area ( invisible area after assembly in customer ’s product )
As a genera l rule, visua l defects in Zone C are permissible, when it is no trouble for
quality and assembly of customer ’s product.
18.4 Major Defect
All functiona l defects such as open ( or missing segment ), short, contrast differentia l, excess
power consumption, smearing, leakage, etc. and overa ll outline dimension beyond the drawing.
Are classified as major defects.
PAGE 9
18.5 Minor Defect
Except the Major defects above, all cosmetic defects are classified as minor defects.
Item No.
1.
2.
3.
4.
Item to be Inspected
Spot defect
( Defects in spot from )
Inspection Standard
Classification of defects
Acceptable Qty
Minor
A
B
C
Φ≦0.15
Acceptable ( clutering of Acceptaspot not allo wed )
ble
0.15 ≦Φ≦0.20
1
2
0.20 ≦Φ≦0.25
0
1
Φ>0.25
0
0
Remarks : for dark/white spot, size Φ is defined as
Φ=1/ 2(X+Y)
Line defect ( Defects in
Size (mm)
Acceptable Qty
Minor
line form )
L
W
Zone
Length
Width
A
B
C
AccepW≦0.02
AccepAcceptable
table
table
L≦3.0
W≦0.03
2
L>2.5
W≦0.03
0
L≦3.0
0.03 <W≦0.05
2
L>2.5
0.03 <W≦0.05
0
W>0.05
Counted as spot defect
( Follo ws item 18.5.1 )
Remarks: The total of spot defect and line defect
shall not exceed four.
Orientation defect
Minor
Not allo wed inside viewing area ( Zone A or Zone B )
( such as misalignment
of L/ C)
Polarizing
18.5.4.1 Polarizer Position
Minor
1. Shifting in Position Should not exceed the
glass outline dimension.
2. Incomplete covering of the viewing area due to
Shifting is not allo wed.
18.5.4.2 Seratches, bubble or dent on Glass/
Polarizer/ Reflector, Bubble between
Polarizer & Reflector/Glass:
Size (mm)
Acceptable Qty
Zone
A
B
C
Φ≦0.20
Acceptable
Acceptable
0.20 <Φ≦0.50
3
0.50 <Φ≦1.00
2
Φ>1.00
0
Zone size (mm)
19. Character Generator ROM Map
High 4-bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
►
◄
！
１
Ａ
Ｑ
ａ
ｑ
↕
“
２
Ｂ
Ｒ
ｂ
ｒ
‼
＃
３
Ｃ
Ｓ
ｃ
ｓ
¶
＄
４
Ｄ
Ｔ
ｄ
ｔ
§
％
５
Ｅ
Ｕ
ｅ
ｕ
▄
＆
６
Ｆ
Ｖ
ｆ
ｖ
０
＠
Ｐ
‘
ｐ
Low 4-bit
7
8
9
A
B
C
D
E
F
↑
（
８
Ｈ
Ｘ
ｈ
ｘ
↓
）
９
Ｉ
Ｙ
ｉ
ｙ
→
＊
：
Ｊ
Ｚ
ｊ
ｚ
←
＋
；
Ｋ
〔
ｋ
｛
∟
，
＜
Ｌ
＼
ｌ
｜
↔
－
＝
Ｍ
〕
ｍ
｝
▲
．
＞
Ｎ
︿
ｎ
〜
▼
／
？
Ｏ
ˍ
ｏ
△
↕
‘
７
Ｇ
Ｗ
ｇ
ｗ
字型碼 , 前 127 碼為標準 ASCII 碼 , 在中文為半形 , 中文碼由 A140 開始 , 共 8000 字 ,
編碼方式為 BIG-5 碼.
PAGE 10